Semiconductor Devices

Abstract

To provide a semiconductor device having a high breakdown voltage.SOLUTION: A semiconductor device comprises a semiconductor part, first to fourth electrodes, and first and second insulating films. The semiconductor part includes a first semiconductor layer of a first conductivity type and a second semiconductor layer of a second conductivity type. The first and second electrodes are provided on a rear face and a front face of the semiconductor part, respectively. The second semiconductor layer is provided between the first semiconductor layer and the second electrode. The third and fourth electrodes extend in the first semiconductor layer from the front face side of the semiconductor part. The third electrodes are arranged so as to be separated from each other, and the fourth electrode surrounds a region where the plurality of third electrodes is provided. The first insulating film is provided between the semiconductor part and the third electrodes. The second insulating film is provided between the semiconductor part and the fourth electrode, having a thickness larger than that of the first insulating film.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The embodiments relate to a semiconductor device. [Background technology]

[0002] Power control semiconductor devices are required to have a high breakdown voltage. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Special Publication No. 2015-510696 Summary of the Invention [Problem to be solved by the invention]

[0004] Embodiments provide semiconductor devices with high breakdown voltages. [Means for solving the problem]

[0005] The semiconductor device according to the embodiment includes a semiconductor portion, first to fourth electrodes, and first and second insulating films. The semiconductor portion includes a first semiconductor layer of a first conductivity type and a second semiconductor layer of a second conductivity type. The first electrode is provided on the back surface of the semiconductor portion, and the second electrode is provided on the front surface side of the semiconductor portion. The first semiconductor layer extends between the first electrode and the second electrode. The second semiconductor layer is provided between the first semiconductor layer and the second electrode and is electrically connected to the second electrode. The third electrode and the fourth electrode extend from the front surface side of the semiconductor portion into the first semiconductor layer. The third electrodes are arranged spaced apart from each other in a direction along the back surface of the semiconductor portion and are electrically connected to the second electrode. The fourth electrode surrounds the region in which the third electrode is provided and is electrically connected to the second electrode. The first insulating film is provided between the semiconductor portion and the third electrode and electrically insulates the third electrode from the semiconductor portion. The second insulating film is provided between the semiconductor portion and the fourth electrode, electrically insulates the fourth electrode from the semiconductor portion, and has a thickness greater than that of the first insulating film. [Brief explanation of the drawings]

[0006] [Figure 1] 1 is a schematic cross-sectional view showing a semiconductor device according to an embodiment; [Figure 2] 1 is a schematic plan view showing a semiconductor device according to an embodiment; [Figure 3] 5A to 5C are schematic cross-sectional views showing a manufacturing process of the semiconductor device according to the embodiment. [Figure 4] 4A to 4C are schematic cross-sectional views showing the manufacturing process following FIG. 3. [Figure 5] 5A to 5C are schematic cross-sectional views showing the manufacturing process following FIG. 4. [Figure 6] 10A and 10B are schematic diagrams showing characteristics of a semiconductor device according to a comparative example. [Figure 7] 5A and 5B are schematic diagrams showing characteristics of the semiconductor device according to the embodiment; DETAILED DESCRIPTION OF THE INVENTION

[0007] Hereinafter, embodiments will be described with reference to the drawings. Identical parts in the drawings are assigned the same numbers, and detailed descriptions thereof will be omitted as appropriate, and different parts will be described. Note that the drawings are schematic or conceptual, and the relationship between the thickness and width of each part, the size ratio between parts, etc., are not necessarily the same as those in reality. Furthermore, even when the same part is shown, the dimensions and ratios may be different depending on the drawing.

[0008] Furthermore, the arrangement and configuration of each part will be explained using the X-axis, Y-axis, and Z-axis shown in each figure. The X-axis, Y-axis, and Z-axis are mutually perpendicular and represent the X-direction, Y-direction, and Z-direction, respectively. In addition, the Z-direction may be explained as upward and the opposite direction as downward.

[0009] Fig. 1 is a schematic cross-sectional view showing a semiconductor device 1 according to an embodiment. Fig. 1 is a cross-sectional view taken along line VV shown in Fig. 2(a). The semiconductor device 1 is, for example, a MOSFET.

[0010] 1, the semiconductor device 1 includes a semiconductor portion 10, a first electrode 20, a second electrode 30, a third electrode 40, a fourth electrode 50, and a control electrode 60. The semiconductor portion 10 is made of, for example, silicon.

[0011] The first electrode 20 is provided on the back surface 10B of the semiconductor portion 10. The first electrode 20 is, for example, a drain electrode. The first electrode 20 is, for example, a metal layer containing nickel (Ni), aluminum (Al), or the like.

[0012] The second electrode 30 is provided on the front surface 10F side of the semiconductor portion 10. The second electrode 30 is, for example, a source electrode. The first electrode 20 is, for example, a metal layer containing titanium nitride (TiN), tungsten (W), aluminum (Al), or the like.

[0013] The third electrode 40 is disposed inside a trench TH provided on the front surface side of the semiconductor portion 10. The trench TH is a hole that has, for example, a circular or polygonal opening and extends in a direction from the front surface side of the semiconductor portion 10 toward the back surface (for example, in the −Z direction).

[0014] The third electrode 40 is electrically insulated from the semiconductor portion 10 by the first insulating film 45. The first insulating film 45 covers the inner surface of the trench TH and is provided between the semiconductor portion 10 and the third electrode 40. The first insulating film 45 is, for example, a silicon oxide film.

[0015] The fourth electrode 50 is disposed inside a trench TG provided on the front surface side of the semiconductor portion 10. The trench TG extends, for example, in a direction from the front surface side of the semiconductor portion 10 toward the back surface (for example, the -Z direction). The trench TG is provided in the shape of a groove surrounding an area in which the plurality of third electrodes 40 are arranged (see FIG. 2(a)). The fourth electrode 50 extends along the opening of the trench TG and is provided so as to surround the area in which the plurality of third electrodes 40 are arranged.

[0016] The fourth electrode 50 is electrically insulated from the semiconductor portion 10 by the second insulating film 55. The second insulating film 55 covers the inner surface of the trench TG and is provided between the semiconductor portion 10 and the fourth electrode 50. The second insulating film 55 is, for example, a silicon oxide film. The second insulating film 55 has a film thickness FT2 that is thicker than the film thickness FH1 of the first insulating film 45.

[0017] The second insulating film 55 has, for example, a two-layer structure including a first layer 55a and a second layer 55b. The first layer 55a is provided between the semiconductor portion 10 and the fourth electrode 50. The second layer 55b is provided between the semiconductor portion 10 and the first layer 55a.

[0018] However, the embodiment is not limited to the above example. For example, the first layer 55a may contain a material different from the material of the second layer 55b. For example, the first layer 55a may contain silicon nitride, and the second layer 55b may contain silicon oxide.

[0019] The control electrode 60 is provided, for example, in the trench TH, between the semiconductor portion 10 and the third electrode 40. The control electrode 60 is, for example, a gate electrode. The control electrode 60 is provided in the upper part of the trench TH. The upper surface of the control electrode 60 is located, for example, near the opening of the trench TH.

[0020] The control electrode 60 is electrically insulated from the semiconductor portion 10 by a third insulating film 63. The third insulating film 63 is, for example, a gate insulating film. The third insulating film 63 covers the upper part of the inner surface of the trench TH and is provided between the semiconductor portion 10 and the control electrode 60. The third insulating film 63 is, for example, a silicon oxide film.

[0021] The control electrode 60 is provided to surround the third electrode 40, for example, in a plan view parallel to the surface 10F of the semiconductor portion 10. The control electrode 60 is electrically insulated from the third electrode 40 by a fourth insulating film 65. The fourth insulating film 65 is provided between the third electrode 40 and the control electrode 60. The fourth insulating film 65 is, for example, a silicon oxide film.

[0022] The semiconductor portion 10 includes, for example, a first semiconductor layer 11 of a first conductivity type, a second semiconductor layer 13 of a second conductivity type, a third semiconductor layer 15 of the first conductivity type, and a fourth semiconductor layer 17 of the first conductivity type. In the following description, the first conductivity type is referred to as n-type and the second conductivity type is referred to as p-type.

[0023] The first semiconductor layer 11 extends between the first electrode 20 and the second electrode 30. The first semiconductor layer 11 is, for example, an n-type drift layer. The trenches TH and TG are each provided to extend from the front surface side of the semiconductor portion 10 into the first semiconductor layer 11. The third electrode 30 faces the first semiconductor layer 11 with a first insulating film 45 interposed therebetween. The fourth electrode 50 faces the first semiconductor layer 11 with a second insulating film 55 interposed therebetween.

[0024] The second semiconductor layer 13 is provided between the first semiconductor layer 11 and the second electrode 30. The second semiconductor layer 13 is, for example, a p-type diffusion layer. The second semiconductor layer 13 is provided so as to face the control electrode 60 with a third insulating film 63 interposed therebetween.

[0025] The third semiconductor layer 15 is provided partially between the second semiconductor layer 13 and the second electrode 30. The third semiconductor layer 15 is provided so as to be in contact with the third insulating film 63. The third semiconductor layer 15 is, for example, an n-type source layer.

[0026] The fourth semiconductor layer 17 is provided, for example, between the first semiconductor layer 11 and the first electrode 20. The fourth semiconductor layer 17 contains a first conductivity type impurity at a concentration higher than the concentration of the first conductivity type impurity in the first semiconductor layer 11. The fourth semiconductor layer 17 is, for example, an n-type buffer layer. The first electrode 20 is electrically connected to the fourth semiconductor layer 17.

[0027] The semiconductor device 1 further includes a fifth insulating film 33, a sixth insulating film 35, a first wiring 47, a second wiring 57, and a third wiring 67.

[0028] The fifth insulating film 33 and the sixth insulating film 35 are provided between the semiconductor portion 10 and the second electrode 30. The fifth insulating film 33 is provided between the semiconductor portion 10 and the sixth insulating film 35. The sixth insulating film 35 is provided between the fifth insulating film 33 and the second electrode 30. The fifth insulating film 33 and the sixth insulating film 35 are, for example, interlayer insulating films. The fifth insulating film 33 and the sixth insulating film 35 are, for example, silicon oxide films.

[0029] The fifth insulating film 33 covers the front surface 10F of the semiconductor portion 10, the trench TH, and the trench TG. The first wiring 47, the second wiring 57, and the third wiring 67 are provided between the fifth insulating film 33 and the sixth insulating film .

[0030] The first wiring 47 is electrically insulated from the third electrode 40 through a contact hole provided in the fifth insulating film 33. The second wiring 57 is electrically insulated from the fourth electrode 50 through another contact hole provided in the fifth insulating film 33. The third wiring 67 is electrically insulated from the control electrode 60 through yet another contact hole provided in the fifth insulating film 33. The first wiring 47 is also electrically connected to the second semiconductor layer 13 and the third semiconductor layer 15 through other contact holes provided in the third insulating film 33.

[0031] The second electrode 30 is connected to the first wiring 47 and the second wiring 57, respectively, via contact holes provided in the sixth insulating film 35. That is, the third electrode 40 and the fourth electrode 50 are electrically connected to the second electrode 30. In addition, the second semiconductor layer 13 and the third semiconductor layer 15 are also electrically connected to the second electrode 30.

[0032] 2(a) and 2(b) are schematic plan views showing the semiconductor device 1 according to the embodiment. Fig. 2(a) is a cross-sectional view taken along line HH in Fig. 1. Fig. 2(b) is a partial cross-sectional view showing a part of Fig. 2(a).

[0033] 2(a), the trench TG is provided so as to surround the region in which the plurality of third electrodes 40 are arranged. The trench TG has, for example, a rectangular outer edge with four chamfered corners. The fourth electrode 50 extends along the trench TG and surrounds the plurality of third electrodes 40.

[0034] The third electrodes 40 are arranged, for example, in the Y direction. The multiple rows of the third electrodes 40 arranged in the Y direction are arranged in the X direction. For example, one of the third electrodes 40 is disposed adjacent to the other third electrodes 40 in the X direction in the space between the adjacent third electrodes 40 in the Y direction.

[0035] 2(b) is a plan view showing one corner of the trench TG. As shown in FIG. 2(b), the trench TH has, for example, a regular hexagonal cross-sectional shape. The third electrode 40 is provided, for example, in the center of the regular hexagon.

[0036] The third electrodes 40 are arranged such that the distance between two adjacent first insulating films 45 in the Y direction is the minimum distance Dmin. The third electrodes 40 are also arranged such that the distance between two adjacent first insulating films 45 in a diagonal direction Dd intersecting the X and Y directions is the minimum distance Dmin.

[0037] Further, the trench TH arranged along the trench TG is arranged so that the interval De between the trench TH and the trench TG is equal to the minimum interval Dmin, for example.

[0038] Next, a method for manufacturing the semiconductor device 1 will be described with reference to Figures 3(a) to 5(b). Figures 3(a) to 5(b) are schematic cross-sectional views showing the manufacturing process of the semiconductor device 1 according to the embodiment.

[0039] 3(a), trenches TH and TG are formed on the front surface 10F side of the semiconductor portion 10, and then an insulating film 101 is formed. In this case, the semiconductor portion 10 is, for example, an n-type silicon wafer.

[0040] The trenches TH and TG are formed by, for example, using an etching mask (not shown) to selectively remove the semiconductor portion 10. The trenches TH and TG are formed by, for example, anisotropic RIE (Reactive Ion Etching).

[0041] The insulating film 101 is formed to cover the inner surfaces of the trenches TH and TG, leaving spaces inside the trenches TH and TG. The insulating film 101 is formed, for example, by thermally oxidizing the semiconductor portion 10. The insulating film 101 is, for example, a silicon oxide film.

[0042] 3(b), a resist mask 103 is formed to fill the space within the trench TG and cover the opening of the trench TG. The trench TH is exposed on the front surface side of the semiconductor portion 10. The resist mask 103 is formed using, for example, photolithography.

[0043] As shown in FIG. 4(a), the insulating film 101 is selectively removed. The insulating film 101 is selectively etched using a resist mask 103. The insulating film 101 is removed by, for example, wet etching. The resist mask 103 is removed after the insulating film 101 is selectively etched.

[0044] As shown in FIG. 4(b), an insulating film 105 is formed on the inner surface of the trench TH and between the insulating film 101 and the semiconductor portion 10. The insulating film 105 is formed by thermally oxidizing the semiconductor portion 10 again. Inside the trench TG, the semiconductor portion 10 is thermally oxidized through the insulating film 101. The insulating film 105 is formed so as to leave spaces inside the trenches TH and TG. The insulating film 105 is, for example, a silicon oxide film.

[0045] 5(a), a conductive film 107 is formed so as to fill the spaces inside the trenches TH and TG. The conductive film 107 is, for example, polysilicon having conductivity. The conductive film 107 is formed by, for example, CVD (Chemical Vapor Deposition).

[0046] 5(b), the insulating film 105 and the conductive film 107 formed on the surface 10F of the semiconductor portion 10 are removed. The insulating film 105 and the conductive film 107 are removed by using, for example, isotropic dry etching or CMP (Chemical Mechanical Polishing).

[0047] Next, the second semiconductor layer 13, the fourth semiconductor layer 15, the control electrode 60, the first to third wirings, and the second electrode 30 are formed on the front surface side of the semiconductor section 10 (see FIG. 1). In addition, the fourth semiconductor layer 17 and the first electrode 20 are formed on the back surface side of the semiconductor section 10 (see FIG. 1), thereby completing the semiconductor device 1.

[0048] 6(a) and (b) are schematic diagrams showing the characteristics of a semiconductor device 2 according to a comparative example. FIG. 6(a) is a cross-sectional view showing the semiconductor device 2. FIG. 6(b) is a graph showing the electric field strength distribution when the semiconductor device 2 is turned off. The horizontal axis represents the position in the horizontal direction (Y direction). The vertical axis represents the electric field strength.

[0049] 6(a), in the semiconductor device 2, a first insulating film 45 is provided between the first semiconductor layer 11 and the third electrode 40, and between the first semiconductor layer 11 and the fourth electrode 50. That is, the thickness of the insulating film between the first semiconductor layer 11 and the third electrode 40 is the same as the thickness of the insulating film between the first semiconductor layer 11 and the fourth electrode 50.

[0050] 6(b), the electric field distribution in the first insulating film 45 provided therein differs due to differences in the planar shapes of the trench TH and the trench TG. As a result, the electric field intensities Em1 and Em2 at the interface between the first semiconductor layer 11 and the first insulating film 45 differ. The electric field intensity Em1 is, for example, the electric field value at the interface between the hole-shaped trench TH extending in the Z direction and the first semiconductor layer 11. The electric field intensity Em2 is, for example, the electric field value at the interface between the groove-shaped trench TG and the first semiconductor layer 11.

[0051] 6(b), the electric field strength Em2 is higher than the electric field strength Em1. Therefore, in the semiconductor device 2, the electric field strength Em2 in the termination region surrounding the region where the multiple third electrodes 30 are provided becomes large, making avalanche breakdown more likely to occur. In other words, the breakdown voltage in the termination region decreases.

[0052] 7(a) and (b) are schematic diagrams showing the characteristics of the semiconductor device 1 according to the embodiment. FIG. 7(a) is a cross-sectional view showing the semiconductor device 1. FIG. 7(b) is a graph showing the electric field strength distribution when the semiconductor device 1 is turned off. The horizontal axis represents the position in the horizontal direction (Y direction). The vertical axis represents the electric field strength.

[0053] As shown in FIG. 6(a), in the semiconductor device 1, the second insulating film 55 provided between the first semiconductor layer 11 and the fourth electrode 50 is thicker than the first insulating film 45 provided between the first semiconductor layer 11 and the third electrode 40. Therefore, the electric field intensity Em2 at the interface between the first semiconductor layer 11 and the second insulating film 55 can be made equal to or lower than the electric field intensity Em1 at the interface between the first semiconductor layer 11 and the first insulating film 45. In other words, the breakdown voltage of the termination region surrounding the region where the multiple third electrodes 30 are provided can be increased. As a result, the semiconductor device 1 has a higher breakdown voltage than the semiconductor device 2.

[0054] Although several embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be embodied in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their modifications are included within the scope and spirit of the invention, and are also included in the scope of the invention and its equivalents as defined in the claims. [Explanation of symbols]

[0055] 1, 2...semiconductor device, 10...semiconductor portion, 10B...rear surface, 10F...surface, 11...first semiconductor layer, 13...second semiconductor layer, 15...third semiconductor layer, 17...fourth semiconductor layer, 20...first electrode, 30...second electrode, 33...fifth insulating film, 35...sixth insulating film, 40...third electrode, 45...first insulating film, 47...first wiring, 50...fourth electrode, 55...second insulating film, 55a...first layer, 55b...second layer, 57...second wiring, 60...control electrode, 63...third insulating film, 65...fourth insulating film, 67...third wiring, 101, 105...insulating film, 103...resist mask, 107...conductive film, TG, TH...trench

Claims

1. a semiconductor portion including a first semiconductor layer of a first conductivity type and a second semiconductor layer of a second conductivity type; a first electrode provided on a rear surface of the semiconductor portion; a second electrode provided on a surface side of the semiconductor portion, the first semiconductor layer extending between the first electrode and the second electrode, the second semiconductor layer being provided between the first semiconductor layer and the second electrode and configured to be electrically connected to the second electrode; third electrodes extending from the front surface side of the semiconductor portion into the first semiconductor layer, arranged spaced apart from each other in a direction along the back surface of the semiconductor portion, electrically connected to the second electrode, and arranged inside holes having circular or polygonal openings; a fourth electrode extending from the front surface side of the semiconductor portion into the first semiconductor layer, surrounding a region where the third electrode is provided, electrically connected to the second electrode, and extending along an opening of a groove-shaped trench; a first insulating film provided between the semiconductor portion and the third electrode, electrically insulating the third electrode from the semiconductor portion; a second insulating film provided between the semiconductor portion and the fourth electrode, electrically insulating the fourth electrode from the semiconductor portion and having a thickness greater than a thickness of the first insulating film; Equipped with a control electrode provided between the second semiconductor layer and the third electrode; a third insulating film provided between the second semiconductor layer and the control electrode; a fourth insulating film provided between the third electrode and the control electrode; Furthermore, the third electrode is provided to face the first semiconductor layer with the first insulating film interposed therebetween; the semiconductor portion further includes a third semiconductor layer of the first conductivity type, the third semiconductor layer is partially provided between the second semiconductor layer and the second electrode and is provided so as to be in contact with the third insulating film; a fifth insulating film provided between the semiconductor portion and the second electrode; a sixth insulating film provided between the fifth insulating film and the second electrode; a first wiring provided between the fifth insulating film and the sixth insulating film and electrically connected to the second electrode and the third electrode; a second wiring provided between the fifth insulating film and the sixth insulating film and electrically connected to the second electrode and the fourth electrode; a third wiring provided between the fifth insulating film and the sixth insulating film and electrically connected to the control electrode; The semiconductor device further comprises:

2. The semiconductor device according to claim 1 , wherein the first wiring is also electrically connected to the second semiconductor layer and the third semiconductor layer.

3. 3. The semiconductor device according to claim 1, wherein the second insulating film includes a first layer provided between the semiconductor portion and the fourth electrode, and a second layer provided between the semiconductor portion and the first layer.

4. The semiconductor device according to claim 3 , wherein the first layer of the second insulating film contains the same material as the first insulating film.

5. 5. The semiconductor device according to claim 3, wherein the first layer of the second insulating film contains the same material as the second layer.

6. 6. A semiconductor device according to claim 1, wherein the third electrodes are arranged so that there is a minimum distance between two adjacent third electrodes in a first direction and a second direction in a plane parallel to the rear surface of the semiconductor portion, and the second direction intersects with a third direction perpendicular to the first direction and the first direction in a plane parallel to the rear surface.

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