Nitride semiconductor, semiconductor device, and method for manufacturing nitride semiconductor

Abstract

To provide a nitride semiconductor capable of improving the characteristics thereof, a semiconductor device, and a method for manufacturing a nitride semiconductor.SOLUTION: According to an embodiment, a nitride semiconductor includes a substrate including boron, a first nitride region including Alx1Ga1-x1N (0.98<x1≤1), and a second nitride region including Alx2Ga1-x2N (0≤x2<1, x2<x1). A concentration of boron in the substrate is 1×1019 cm-3 or more. The first nitride region is between the substrate and the second nitride region. The first nitride region includes a first surface facing the substrate and a second surface facing the second nitride region. A second concentration of boron in the second surface is 1 / 8000 or less of a first concentration of boron in the first surface.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] Embodiments of the present invention relate to a nitride semiconductor, a semiconductor device, and a method for manufacturing a nitride semiconductor.

Background Art

[0002] For example, there is a semiconductor device using a nitride semiconductor such as GaN. Improvement of the characteristics of the semiconductor device is desired.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] Embodiments of the present invention provide a nitride semiconductor, a semiconductor device, and a method for manufacturing a nitride semiconductor capable of improving characteristics.

Means for Solving the Problems

[0005] According to an embodiment of the present invention, the nitride semiconductor includes a substrate containing boron, a first nitride region containing Al x1 Ga 1-x1 N(0.98 < x1 ≦ 1), and a second nitride region containing Al x2 Ga 1-x2 N(0 ≦ x2 < 1, x2 < x1). The concentration of boron in the substrate is 1 × 10 19 cm -3 or more. The first nitride region is between the substrate and the second nitride region. The first nitride region includes a first surface facing the substrate and a second surface facing the second nitride region. The second concentration of boron on the second surface is 1 / 8000 or less of the first concentration of boron on the first surface.

Brief Description of the Drawings

[0006] [Figure 1] FIG. 1 is a schematic cross-sectional view illustrating the nitride semiconductor according to the first embodiment. [Figure 2] 2(a) and 2(b) are graphs illustrating nitride semiconductors. [Figure 3] 3(a) and 3(b) are images illustrating nitride semiconductors. [Figure 4] 4(a) and 4(b) are graphs illustrating the characteristics of nitride semiconductors. [Figure 5] FIG. 5 is a schematic cross-sectional view illustrating the nitride semiconductor according to the first embodiment. [Figure 6] FIG. 6 is a schematic cross-sectional view illustrating the semiconductor device according to the second embodiment. [Figure 7] FIG. 7 is a schematic cross-sectional view illustrating the semiconductor device according to the second embodiment. [Figure 8] FIG. 8 is a flowchart illustrating a method for manufacturing a nitride semiconductor according to the third embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0007] Hereinafter, embodiments of the present invention will be described with reference to the drawings. The drawings are schematic or conceptual, and the relationship between the thickness and width of each part, the size ratio between parts, etc. are not necessarily the same as those in reality. Even when the same part is shown, the dimensions and ratios may be different depending on the drawing. In this specification and in each drawing, elements similar to those previously described with reference to the previous drawings are designated by the same reference numerals, and detailed descriptions thereof will be omitted where appropriate.

[0008] (First embodiment) FIG. 1 is a schematic cross-sectional view illustrating the nitride semiconductor according to the first embodiment. 1, the nitride semiconductor 110 according to the embodiment includes a base 10s, a first nitride region 10, and a second nitride region 20. The first nitride region 10 is located between the base 10s and the second nitride region 20.

[0009] The substrate 10s contains boron. The concentration of boron in the substrate 10s is 1×10 19 cm -3 or more. The substrate 10s contains silicon. The substrate 10s is, for example, a silicon substrate.

[0010] The first nitride region 10 contains Al x1 Ga 1-x1 N (0.98 < x1 ≤ 1). The first nitride region 10 contains, for example, AlN. The first nitride region 10 is, for example, an AlN layer.

[0011] The second nitride region 20 contains Al x2 Ga 1-x2 N (0 ≤ x2 < 1, x2 < x1). The second nitride region 20 contains at least one of an AlGaN layer and a GaN layer.

[0012] In this example, the second nitride region 20 contains the first nitride layer 11. The first nitride layer 11 contains Al y1 Ga 1-y1 N (0 < y1 < 1, y1 < x1). The first nitride layer 11 is, for example, an AlGaN layer. In one example, the composition ratio y1 is 0.2 or more and 0.5 or less. For example, the first nitride layer 11 is in contact with the first nitride region 10.

[0013] Let the first direction D1 from the substrate 10s to the first nitride region 10 be the Z-axis direction. Let one direction perpendicular to the Z-axis direction be the X-axis direction. Let the direction perpendicular to the Z-axis direction and the X-axis direction be the Y-axis direction.

[0014] The substrate 10s, the first nitride region 10, and the second nitride region 20 are along the X-Y plane. The first nitride region 10 and the second nitride region 20 are in a layered form substantially parallel to the X-Y plane.

[0015] In this example, the second nitride region 20 includes a second nitride layer 12 and a third nitride layer 13. The second nitride layer 12 is located between the first nitride layer 11 and the third nitride layer 13 in the first direction D1. The second nitride layer 12 contains Al y2 Ga 1-y2 N (0 ≤ y2 < 1). The composition ratio y2 is, for example, 0 or more and 0.1 or less. The second nitride layer 12 is, for example, a GaN layer. The third nitride layer 13 contains Al y3 Ga 1-y3 N (y2 < y3 < x1). The composition ratio y3 is, for example, 0.15 or more and 0.3 or less. The third nitride layer 13 is, for example, an AlGaN layer.

[0016] The second nitride layer 12 includes a region facing the third nitride layer 13. A carrier region is formed in this region. The carrier region is, for example, a two-dimensional electron gas. The nitride semiconductor 110 is used as a semiconductor device 120. The semiconductor device 120 includes the nitride semiconductor 110. In the operation of the semiconductor device 120, the carrier region is utilized. The second nitride layer 12 and the third nitride layer 13 are, for example, functional layers.

[0017] The first nitride layer 11 functions, for example, as part of a buffer layer. The first nitride region 10 functions, for example, as at least part of a buffer layer. By providing the buffer layer, warping is suppressed in a structure including the substrate 10s, the first nitride region 10, and the second nitride region 20. Good crystallinity is obtained in the functional layer.

[0018] As already described, the substrate 10s contains boron. Thereby, for example, warping is more effectively suppressed in a structure including the substrate 10s, the first nitride region 10, and the second nitride region 20. Since the substrate 10s contains boron, conductivity occurs in the substrate 10s. For example, the influence of static electricity and the like is suppressed. Practical nitride semiconductors and semiconductor devices can be easily obtained.

[0019] When the substrate 10s contains boron, the boron may diffuse toward the functional layer. For example, if boron diffuses into a buffer layer containing Al and Ga (e.g., the first nitride layer 11), the buffer layer is likely to become non-uniform. It is preferable that the boron contained in the substrate 10s is blocked in the first nitride region 10, thereby suppressing the diffusion of boron.

[0020] As shown in FIG. 1, the first nitride region 10 includes a first surface 10f and a second surface 10g. The first surface 10f faces the substrate 10s. The second surface 10g faces the second nitride region 20. The boron concentration in the first surface 10f is high due to the influence of boron contained in the substrate 10s. On the other hand, the boron concentration in the second surface 10g is low. For example, the boron concentration in the first nitride region 10 drops sharply.

[0021] It was found that the boron concentration varies depending on the conditions for forming the first nitride region 10. An example of the boron concentration profile in a structure including the first nitride region 10 and the second nitride region 20 will now be described.

[0022] 2(a) and 2(b) are graphs illustrating nitride semiconductors. Figure 2(a) corresponds to a sample in the first configuration SPL1. Figure 2(b) corresponds to a sample in the second configuration SPL2. These figures show the results of SIMS (Secondary Ion Mass Spectrometry) analysis of the sample. The horizontal axis represents the position Pz in the Z-axis direction. The vertical axis on the left represents the boron concentration C (B). The vertical axis on the right represents the Al ion intensity Int (Al).

[0023] The nitride region is formed by, for example, a method such as MOCVD using a gas containing a raw material containing aluminum and a raw material containing nitrogen. In the first configuration SPL1, the first nitride region 10 is formed in two parts. As shown in FIG. 1, a part (the first part 10a) of the first nitride region 10 is formed at a low first temperature. Another part (the second part 10b) of the first nitride region 10 is formed at a second temperature higher than the first temperature. In this example, the first temperature is 830 °C. The second temperature is 1040 °C. The thickness t10a of the first part 10a is about 20 nm. The thickness t10b of the second part 10b is about 180 nm. The thickness t10 of the first nitride region 10 is about 200 nm. In the second configuration SPL2, the entire first nitride region 10 is formed at the second temperature. In these configurations, the first nitride region 10 is AlN.

[0024] In these samples, a first nitride layer 11 (at least a part of the second nitride region 20) is formed on the first nitride region 10. In this example, the first nitride layer 11 contains Al y1 Ga 1-y1 N (0 < y1 < 1, y1 < x1). In this example, the composition ratio y1 is 0.48.

[0025] As shown in FIG. 2(a), in the first configuration SPL1, the concentration of boron (the first concentration C1) on the first surface 10f of the first nitride region 10 is 7×10 19 cm -3 . The concentration of boron (the second concentration C2) on the second surface 10g of the first nitride region 10 is 4×10 15 cm -3 . The concentration of boron (the third concentration C3) in the first nitride layer 11 is 6×10 14 cm -3 . For example, the third concentration C3 is 6×10 14 cm -3 or less (below the detection limit). In the first configuration SPL1, the concentration C(B) of boron decreases rapidly in the first nitride region 10. The diffusion of boron is effectively suppressed.

[0026] As shown in FIG. 2(b), in the second configuration SPL2, the concentration of boron in the first surface 10f of the first nitride region 10 (first concentration C1) is 7×10 19 cm -3 The concentration of boron in the second surface 10g of the first nitride region 10 (second concentration C2) is 5×10 16 cm -3 The concentration of boron in the first nitride layer 11 (third concentration C3) is 9×10 14 cm -3 In the second configuration SPL2, the reduction in the boron concentration C(B) is insufficient in the first nitride region 10. The suppression of boron diffusion in the second configuration SPL2 is insufficient compared to the first configuration SPL1.

[0027] 3(a) and 3(b) are images illustrating nitride semiconductors. These figures are AFM (Atomic Force Microscope) images of the sample. FIG. 3(a) corresponds to the first configuration SPL1. FIG. 3(b) corresponds to the second configuration SPL2. These AFM images are AFM images of the surface of the first nitride region 10. In these AFM images, the first nitride layer 11 is not formed.

[0028] As shown in FIG. 3(b), in the second configuration SPL2, multiple dark spots are observed in the image. The multiple dark spots are pits. In contrast, as shown in FIG. 3(a), no dark spots are observed in the first configuration SPL1. In the first configuration SPL1, high flatness is obtained on the surface of the first nitride region 10.

[0029] In the first configuration SPL1, the first nitride region 10 is formed in two temperature stages. It is believed that the formation of the first portion 10a at a low first temperature continuously and uniformly covers the surface of the substrate 10s containing boron. Then, the formation of the second portion 10b at a high second temperature results in AlN with high crystal quality. It is believed that the continuous and uniform coverage of the surface of the substrate 10s containing boron suppresses boron diffusion.

[0030] On the other hand, in the second configuration SPL2, the entire first nitride region 10 is formed at a high second temperature. In this case, it is considered that AlN is continuously formed on the surface of the substrate 10s containing boron. For example, nuclei that become the origin of pits are formed, and then the pits are formed. It is considered that the boron contained in the substrate 10s diffuses upward, for example, through the pits.

[0031] In this way, the first configuration SPL1 and the second configuration SPL2 have a difference in uniformity (for example, pits) of the first nitride region 10. The difference in uniformity results in a difference in the boron profile.

[0032] As will be explained below, such differences in the first nitride regions 10 result in differences in leakage current.

[0033] 4(a) and 4(b) are graphs illustrating the characteristics of nitride semiconductors. These figures illustrate the electrical characteristics of the sample. A first electrode electrically connected to the substrate 10s is provided in the sample. A second electrode electrically connected to the second nitride region 20 is formed on the upper surface of the second nitride region 20. The current (leakage current) is measured when a voltage is applied to these electrodes. The horizontal axis of Figures 4(a) and 4(b) represents the applied voltage V1. The vertical axis represents the current density J1 of the leakage current. Figure 4(a) corresponds to the first configuration SPL1. Figure 4(b) corresponds to the second configuration SPL2. The characteristics of six measurement samples are illustrated for each of the first configuration SPL1 and the second configuration SPL2.

[0034] As shown in Figure 4(a), in the first configuration SPL1, the current density J1 is relatively low and the variation is small. As shown in Figure 4(b), in the second configuration SPL2, the current density J1 is high and the variation is large. In this way, in the first configuration SPL1, the leakage current can be suppressed.

[0035] Such a difference in leakage current is believed to be based on the above-described difference in the first nitride region 10 (for example, the presence or absence of pits, etc.) and is believed to be caused by a difference in the boron profile in the first nitride region 10.

[0036] As described with reference to FIG. 2(a), in the first configuration SPL1, the boron concentration C(B) drops sharply in the first nitride region 10. In this example, the second concentration C2 is 1 / 14,000 of the first concentration C1. In an embodiment, the second concentration C2 may be 1 / 10,000 or less of the first concentration C1. The second concentration C2 may be 1 / 8,000 or less of the first concentration C1. In the first nitride region 10 where the boron concentration C(B) drops sharply, for example, pits are suppressed, and leakage current can be suppressed.

[0037] As shown in FIGS. 2(a) and 2(b), in this example, the concentration C0 of boron in the substrate 10s in the first configuration SPL1 and the second configuration SPL2 is 1.5×10 19 cm -3 Even at such a high boron concentration C0, the boron concentration C(B) in the first nitride region 10 in the first configuration SPL1 drops sharply. This is because boron diffusion is effectively suppressed in the first configuration SPL1. The second concentration C2 may be 1 / 2500 or less of the boron concentration C0 in the substrate 10s.

[0038] On the other hand, the boron concentration C0 in the substrate 10s is 1×10 19 cm -3 In the reference examples, the second concentration C2 on the second surface 10g may be low. This is thought to be due to the boron supply rate being limited by the low boron concentration C0 in the base 10s. However, in the reference examples in which the boron concentration C0 in the base 10s is low, it is difficult to obtain the desired characteristics (warpage suppression and appropriate conductivity).

[0039] In an embodiment, the concentration of boron C is 1×10 19 cm -3In the case of the above-described base body 10s, the diffusion of boron can be effectively suppressed by the appropriate first nitride region 10.

[0040] 2(a), a first concentration C1 of boron in the first surface 10f is higher than a concentration C0 of boron in the substrate 10s. The first surface 10f corresponds to the interface between the substrate 10s and the first nitride region 10. It is believed that boron tends to be localized at the interface.

[0041] As shown in FIG. 2(a), the third concentration C3 of boron in the second nitride region 20 (in this example, the first nitride layer 11) is less than or equal to the second concentration C2. In the embodiment, the third concentration C3 is 1×10 16 cm -3 In the embodiment, the second concentration C2 is preferably 8×10 16 cm -3 In the embodiment, the first concentration C1 is preferably 5×10 19 cm -3 It is preferable that this is equal to or greater than this.

[0042] 1, the thickness t10 of the first nitride region 10 is preferably 100 nm or more and 250 nm or less. The thickness t10 is the thickness of the first nitride region 10 in the first direction D1 from the base 10s to the first nitride region 10.

[0043] FIG. 5 is a schematic cross-sectional view illustrating the nitride semiconductor according to the first embodiment. 5, in the nitride semiconductor 111 according to the embodiment, the second nitride region 20 includes a fourth nitride layer 14 in addition to the first nitride layer 11, the second nitride layer 12, and the third nitride layer 13. In this example, the second nitride region 20 further includes a fifth nitride layer 15. Except for the above, the configuration of the nitride semiconductor 111 may be similar to that of the nitride semiconductor 110.

[0044] The fourth nitride layer 14 is between the first nitride layer 11 and the second nitride layer 12. In this example, the fourth nitride layer 14 is between the first nitride layer 11 and the fifth nitride layer 15.

[0045] The fourth nitride layer 14 includes a plurality of first films 14a and a plurality of second films 14b. The plurality of first films 14a contain Al z1 Ga 1-z1 N (0 ≦ z1 < 1). The plurality of second films 14b contain Al z2 Ga 1-z2 N (0 < z2 ≦ 1, z1 < z2). The plurality of first films 14a are, for example, GaN films or AlGaN films. The plurality of second films 14b are, for example, AlN films. One of the plurality of second films 14b is between one of the plurality of first films 14a and another one of the plurality of first films 14a in the first direction D1. One of the plurality of first films 14a is between one of the plurality of second films 14b and another one of the plurality of second films 14b in the first direction D1. For example, the first film 14a and the second film 14b are provided alternately. In this example, one of the plurality of second films 14b is in contact with the first nitride layer 11. In this example, another one of the plurality of second films 14b is in contact with the fifth nitride layer 15. One of the plurality of first films 14a and one of the plurality of second films 14b may be in contact with the first nitride layer 11. One of the plurality of first films 14a and one of the plurality of second films 14b may be in contact with the fifth nitride layer 15 or the second nitride layer 12.

[0046] The thickness t14a of one of the plurality of first films 14a in the first direction D1 is 20 nm or more and 30 nm or less. The thickness t14b of one of the plurality of second films 14b in the first direction D1 is 3 nm or more and 8 nm or less. The fourth nitride layer 14 is, for example, a superlattice layer. By providing the fourth nitride layer 14, for example, high crystallinity can be easily obtained.

[0047] The fifth nitride layer 15 is provided between the fourth nitride layer 14 and the second nitride layer 12. The fifth nitride layer 15 contains Al y5 Ga 1-y5 N (0 ≦ y5 < 1, y5 < x1). The fifth nitride layer 15 contains, for example, carbon. The fifth nitride layer 15 is, for example, a GaN layer containing carbon. By the fifth nitride layer 15, for example, dislocations are suppressed and higher crystallinity is obtained.

[0048] (Second embodiment) The second embodiment relates to a semiconductor device. As shown in Fig. 1, a semiconductor device 120 according to the embodiment includes at least a portion of the nitride semiconductor 110 according to the embodiment. As shown in Fig. 5, a semiconductor device 121 according to the embodiment includes at least a portion of the nitride semiconductor 111 according to the embodiment. As described below, the semiconductor device may include an electrode.

[0049] FIG. 6 is a schematic cross-sectional view illustrating the semiconductor device according to the second embodiment. 6, the semiconductor device 122 according to the second embodiment includes the nitride semiconductor 112 according to the first embodiment, first to third electrodes 51 to 53, and an insulating member 61. In the nitride semiconductor 112, the fifth nitride layer 15 is omitted. As in the nitride semiconductor 111, the fifth nitride layer 15 may be provided in the nitride semiconductor 112.

[0050] The direction from the first electrode 51 to the second electrode 52 is along the second direction D2. The second direction D2 intersects with the first direction D1. The second direction D2 is, for example, the X-axis direction.

[0051] The position of the third electrode 53 in the second direction D2 is between the position of the first electrode 51 in the second direction D2 and the position of the second electrode 52 in the second direction D2.

[0052] The second nitride layer 12 includes a first partial region 12a, a second partial region 12b, a third partial region 12c, a fourth partial region 12d, and a fifth partial region 12e. The direction from the first partial region 12a to the first electrode 51 is along the first direction D1. The direction from the second partial region 12b to the second electrode 52 is along the first direction D1. The position of the third partial region 12c in the second direction D2 is between the position of the first partial region 12a in the second direction D2 and the position of the second partial region 12b in the second direction D2. The direction from the third partial region 12c to the third electrode 53 is along the first direction D1. The fourth partial region 12d is between the first partial region 12a and the third partial region 12c in the second direction D2. The fifth partial region 12e is between the third partial region 12c and the second partial region 12b in the second direction D2.

[0053] The third nitride layer 13 includes a sixth partial region 13f and a seventh partial region 13g. The direction from the fourth partial region 12d to the sixth partial region 13f is along the first direction D1. The direction from the fifth partial region 12e to the seventh partial region 13g is along the first direction D1. The insulating member 61 includes a first insulating region 61p. At least a portion of the first insulating region 61p is provided between the third partial region 12c and the third electrode 53 in the first direction D1.

[0054] The current flowing between the first electrode 51 and the second electrode 52 can be controlled by the potential of the third electrode 53. The potential of the third electrode 53 may be, for example, a potential based on the potential of the first electrode 51. The first electrode 51 functions as, for example, a source electrode. The second electrode 52 functions as, for example, a drain electrode. The third electrode 53 functions as, for example, a gate electrode. The first insulating region 61p functions as, for example, a gate insulating film. The semiconductor device 122 is, for example, a transistor.

[0055] As already explained, the second nitride layer 12 includes a region facing the third nitride layer 13. A carrier region (for example, two-dimensional electron gas) is formed in this region. The semiconductor device 122 is, for example, a HEMT (High Electron Mobility Transistor).

[0056] In this example, at least a portion of the third electrode 53 is located between the sixth partial region 13f and the seventh partial region 13g. The semiconductor device 122 is, for example, a normally-off type transistor.

[0057] FIG. 7 is a schematic cross-sectional view illustrating the semiconductor device according to the second embodiment. 7, in the semiconductor device 123 according to the embodiment, the third electrode 53 does not overlap with the third nitride layer 13 in the second direction D2. Except for this, the configuration of the semiconductor device 123 may be the same as the configuration of the semiconductor device 122. The semiconductor device 123 is, for example, a normally-on transistor.

[0058] The first electrode 51 includes, for example, at least one selected from the group consisting of aluminum, titanium, nickel, and gold. The second electrode 52 includes, for example, at least one selected from the group consisting of aluminum, titanium, nickel, and gold. The third electrode 53 includes, for example, at least one selected from the group consisting of TiN, WN, Ni, Au, Pt, and Ti. The third electrode 53 may include, for example, conductive silicon or polysilicon. The insulating member 61 includes an element including at least one selected from the group consisting of silicon, aluminum, and hafnium, and an element including at least one selected from the group consisting of oxygen and nitrogen. The insulating member 61 includes, for example, silicon oxide.

[0059] (Third Embodiment) FIG. 8 is a flowchart illustrating a method for manufacturing a nitride semiconductor according to the third embodiment. As shown in FIG. 8, the method for manufacturing a nitride semiconductor according to the embodiment includes forming a part (for example, the first part 10a) of the first nitride region 10 including Al x1 Ga 1-x1 N (0.98 < x1 ≦ 1) on a substrate 10s containing boron at a first temperature (step S110). The concentration of boron (concentration C0) in the substrate 10s is 1 × 10 19 cm -3 or more.

[0060] The manufacturing method includes forming another part (the second part 10b) of the first nitride region 10 on the above part (the first part 10a) of the first nitride region 10 at a second temperature (step S120). The second temperature is higher than the first temperature.

[0061] The manufacturing method includes forming a second nitride region 20 including Al x2 Ga 1-x2 N (0 ≦ x2 < 1, x2 < x1) on the other part of the first nitride region 10 (step S130).

[0062] This manufacturing method can obtain, for example, the boron profile shown in FIG. 2(a). Even when a desired high boron concentration C0 is applied to the substrate 10s, boron diffusion is suppressed. A first nitride region 10 with suppressed pits is obtained. For example, leakage current is suppressed.

[0063] In the embodiment, the first temperature is, for example, not less than 800° C. and not more than 900° C. The second temperature is, for example, not less than 1000° C. and not more than 1100° C. The first nitride region 10 is formed by MOCVD or the like using a gas containing, for example, an aluminum-containing source (trimethylaluminum: TMAl) and a nitrogen-containing source (ammonia: NH3).

[0064] For example, the formed first nitride region 10 includes a first surface 10f facing the substrate 10s and a second surface 10g facing the second nitride region 20. A second concentration C2 of boron in the second surface 10g is, for example, 1 / 8000 or less of the first concentration C1 of boron in the first surface 10f.

[0065] Information about the concentration or composition of elements can be obtained by, for example, SIMS (Secondary Ion Mass Spectrometry) or EDX (Energy Dispersive X-ray spectroscopy), etc. Information about thickness can be obtained by observation with an electron microscope, etc.

[0066] According to the embodiments, it is possible to provide a nitride semiconductor, a semiconductor device, and a method for manufacturing a nitride semiconductor that can improve characteristics.

[0067] In this specification, "electrically connected" includes a state in which multiple conductors are physically in contact with each other and a current flows between these multiple conductors. "Electrically connected" also includes a state in which multiple conductors are connected to each other and a current flows between these multiple conductors.

[0068] The embodiments of the present invention have been described above with reference to specific examples. However, the present invention is not limited to these specific examples. For example, the specific configuration of each element, such as a nitride region included in a nitride semiconductor, can be appropriately selected by a person skilled in the art from known ranges to implement the present invention in a similar manner and obtain similar effects, and these selections are within the scope of the present invention.

[0069] Furthermore, any combination of two or more elements of each specific example within the scope of technical feasibility is also included within the scope of the present invention as long as it includes the gist of the present invention.

[0070] In addition, all nitride semiconductors, semiconductor devices, and methods for manufacturing nitride semiconductors that can be implemented by a person skilled in the art by making appropriate design modifications based on the nitride semiconductors, semiconductor devices, and methods for manufacturing nitride semiconductors described above as embodiments of the present invention also fall within the scope of the present invention, as long as they include the gist of the present invention.

[0071] In addition, within the scope of the concept of the present invention, a person skilled in the art may come up with various modifications and alterations, and these modifications and alterations are also considered to fall within the scope of the present invention.

[0072] Although several embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be embodied in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their modifications are included within the scope and spirit of the invention, and are also included in the scope of the invention and its equivalents as defined in the claims. [Explanation of symbols]

[0073] 10...first nitride region, 10a, 10b...first, second portion, 10f, 10g...first, second surface, 10s...substrate, 11-15...first to fifth nitride layer, 12a-12e...first to fifth partial region, 13f, 13g...sixth, seventh partial region, 14a, 14b...first, second film, 20...second nitride region, 51-53...first-third electrode, 61...insulating member, 61p...first insulating region, 110-112...nitride semiconductor, 120-123...semiconductor device, C(B)...concentration, C0...concentration, C1-C3...first-third concentration, D1, D2...first and second directions, Int(Al)...ion strength, J1...current density, Pz...position, SPL1, SPL2...first and second configurations, t10, t10a, t10b, t14a, t14b...thickness

Claims

1. A substrate containing boron, wherein the concentration of boron in the substrate is 1×10 １９ cm －３ The substrate as described above, Al ｘ１ Ga １－ｘ１ a first nitride region including N (0.98<x1≦1); Al ｘ２ Ga １－ｘ２ a second nitride region including N (0≦x2<1, x2<x1); Equipped with the first nitride region is between the substrate and the second nitride region; the first nitride region includes a first surface facing the substrate and a second surface facing the second nitride region; a second concentration of boron in the second surface is 1 / 8000 or less of a first concentration of boron in the first surface; A nitride semiconductor, wherein the thickness of the first nitride region in the direction from the base to the first nitride region is 100 nm or more and 250 nm or less.

2. The nitride semiconductor according to claim 1 , wherein the second concentration is 1 / 10,000 or less of the first concentration.

3. 3. The nitride semiconductor according to claim 1, wherein the second concentration is 1 / 2500 or less of the concentration of boron in the base.

4. 4. The nitride semiconductor according to claim 1, wherein the substrate contains silicon.

5. 5. The nitride semiconductor according to claim 1, wherein the first concentration is higher than the concentration of boron in the base.

6. 6. The nitride semiconductor according to claim 1, wherein a third concentration of boron in said second nitride region is equal to or lower than said second concentration.

7. The third concentration is 1×10 １６ cm －３ The nitride semiconductor according to claim 6, wherein:

8. The first concentration is 5×10 １９ cm －３ The nitride semiconductor according to any one of claims 1 to 7.

9. The second concentration is 8×10 １６ cm －３ The nitride semiconductor according to any one of claims 1 to 8, wherein:

10. 10. The nitride semiconductor according to claim 1, wherein the first nitride region contains AlN.

11. The second nitride region is Al ｙ１ Ga １－ｙ１ a first nitride layer comprising N(0<y1<1, y1<x1); 11. The nitride semiconductor according to claim 1, wherein the first nitride layer is in contact with the first nitride region.

12. The second nitride region is Al ｙ２ Ga １－ｙ２ a second nitride layer including N (0≦y2<1); Al ｙ３ Ga １－ｙ３ a third nitride layer including N (y2<y3<x1); Including, The nitride semiconductor of claim 11 , wherein the second nitride layer is located between the first nitride layer and the third nitride layer in a first direction from the substrate to the first nitride region.

13. the second nitride region further comprises a fourth nitride layer; the fourth nitride layer is between the first nitride layer and the second nitride layer; The fourth nitride layer is Al ｚ１ Ga １－ｚ１ a plurality of first films including N (0≦z1<1); and Al ｚ２ Ga １－ｚ２ N (0<z2≦1, z1<z2), one of the plurality of second films is located between one of the plurality of first films and another of the plurality of first films in the first direction; The nitride semiconductor according to claim 12 , wherein the one of the plurality of first films is located between the one of the plurality of second films and another one of the plurality of second films in the first direction.

14. a thickness of one of the plurality of first films in the first direction is 20 nm or more and 30 nm or less; The nitride semiconductor according to claim 13 , wherein the thickness of one of the plurality of second films in the first direction is not less than 3 nm and not more than 8 nm.

15. The second nitride region is Al ｙ２ Ga １－ｙ２ a second nitride layer including N (0≦y2<1); Al ｙ３ Ga １－ｙ３ a third nitride layer including N (y2<y3<x1); Including, The nitride semiconductor according to any one of claims 1 to 11, wherein the second nitride layer is located between the first nitride region and the third nitride layer in a first direction from the substrate to the first nitride region.

16. A substrate containing boron, wherein the concentration of boron in the substrate is 1×10 １９ cm －３ The substrate as described above, Al ｘ１ Ga １－ｘ１ a first nitride region including N (0.98<x1≦1); Al ｘ２ Ga １－ｘ２ a second nitride region including N (0≦x2<1, x2<x1); Equipped with the first nitride region is between the substrate and the second nitride region; the first nitride region includes a first surface facing the substrate and a second surface facing the second nitride region; a second concentration of boron in the second surface is 1 / 8000 or less of a first concentration of boron in the first surface; the second nitride region includes a first nitride layer including Al y1 Ga 1-y1 N (0<y1<1, y1<x1); the first nitride layer is in contact with the first nitride region; The second nitride region is a second nitride layer comprising Al y2 Ga 1-y2 N (0≦y2<1); a third nitride layer comprising Al y3 Ga 1-y3 N (y2<y3<x1); Including, the second nitride layer is between the first nitride layer and the third nitride layer in a first direction from the substrate to the first nitride region; the second nitride region further comprises a fourth nitride layer; the fourth nitride layer is between the first nitride layer and the second nitride layer; the fourth nitride layer includes a plurality of first films including Al z1 Ga 1-z1 N (0≦z1<1) and a plurality of second films including Al z2 Ga 1-z2 N (0<z2≦1, z1<z2); one of the plurality of second films is located between one of the plurality of first films and another of the plurality of first films in the first direction; the one of the plurality of first films is located between the one of the plurality of second films and another one of the plurality of second films in the first direction; a thickness of one of the plurality of first films in the first direction is 20 nm or more and 30 nm or less; The nitride semiconductor, wherein the thickness of one of the plurality of second films in the first direction is 3 nm or more and 8 nm or less.

17. The nitride semiconductor according to any one of claims 12 to 16, A first electrode; A second electrode; A third electrode; an insulating member; Furthermore, a direction from the first electrode to the second electrode is along a second direction intersecting the first direction; a position of the third electrode in the second direction is between a position of the first electrode in the second direction and a position of the second electrode in the second direction; the second nitride layer includes a first partial region, a second partial region, a third partial region, a fourth partial region, and a fifth partial region; a direction from the first partial region to the first electrode is along the first direction; a direction from the second partial region to the second electrode is along the first direction; a position of the third partial region in the second direction is between a position of the first partial region in the second direction and a position of the second partial region in the second direction, and a direction from the third partial region to the third electrode is along the first direction; the fourth partial region is located between the first partial region and the third partial region in the second direction, the fifth partial region is located between the third partial region and the second partial region in the second direction, the third nitride layer includes a sixth partial region and a seventh partial region; a direction from the fourth partial region to the sixth partial region is along the first direction; a direction from the fifth partial region to the seventh partial region along the first direction; The insulating member includes a first insulating region provided between the third partial region and the third electrode in the first direction.

18. The semiconductor device according to claim 17 , wherein at least a portion of the third electrode is located between the sixth partial region and the seventh partial region.

19. Al on a substrate containing boron ｘ１ Ga １－ｘ１ forming a portion of a first nitride region comprising N (0.98<x1≦1) at a first temperature, wherein the concentration of boron in the substrate is 1×10 １９ cm －３ That's all, forming another portion of the first nitride region on the portion of the first nitride region at a second temperature higher than the first temperature; Al on the other portion of the first nitride region. ｘ２ Ga １－ｘ２ forming a second nitride region including N (0≦x2<1, x2<x1); the first nitride region includes a first surface facing the substrate and a second surface facing the second nitride region; a second concentration of boron in the second surface is 1 / 8000 or less of a first concentration of boron in the first surface.

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