Reverse Selective Etch Stop Layer
By selectively depositing an etch stop layer on dielectric materials and controlling metallic material deposition, the method addresses the resistance issue in subtractive etching, resulting in low-resistance metal interconnects with enhanced connectivity.
Patent Information
- Application Number
- JP2022542971
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2020-12-03
- Filing Date
- 2021-12-03
- Publication Date
- 2025-08-13
- Estimated Expiration
- 2041-12-03
AI Technical Summary
Etch-stop materials used in subtractive etching processes increase the resistance of connections between metal layers, adversely affecting device performance.
A method for selectively depositing an etch stop layer on dielectric materials with minimal deposition on metallic materials, followed by depositing a second metallic material and etching to form a conductive path, using a processing system with integrated chambers for controlled deposition and etching.
This approach reduces interconnect resistance and electron scattering, providing low-resistance metal interconnects with improved connectivity between layers.
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Abstract
Description
[Technical Field]
[0001] FIELD OF THE DISCLOSURE Embodiments of the present disclosure generally relate to methods for depositing and integrating reverse selective etch stop layers. In particular, embodiments of the present disclosure relate to subtractive etching using reverse selective etch stop layers. [Background technology]
[0002] Three-dimensional features are an integral part of semiconductor products. Trenches, vias, and holes allow for the stacking and connecting of conductive patterns. These features are often formed by etching processes that rely on certain materials being more resistant to the etching process than other surrounding materials. These resistant materials are called etch-stop layers because the etching process "stops" on them.
[0003] A subtractive etching process is a method of forming a material pattern in which a blanket layer of material is deposited and then selectively removed to form the final pattern. Subtractive etching processes differ from additive processes in that the final pattern is deposited where needed. Subtractive etching processes rely on an etch stop layer to prevent the etch process from damaging the underlying material during the formation of the final pattern.
[0004] During the creation of connections between layers of conductive patterns, the metal material in a via often extends from one layer to an adjacent layer. During manufacturing, it is essential that the adjacent layer connect with this filled via. The etching process described above is particularly useful in ensuring proper connection of patterns between multiple layers.
[0005] However, etch-stop materials are not highly conductive, so when etch-stop layers are used to aid in the fabrication of interconnects, they can adversely affect device performance by increasing the resistance of the connection between the two metal materials.
[0006] Therefore, there is a need for an etch stop layer that is selectively deposited on dielectric materials with little or no deposition on metallic materials. Summary of the Invention
[0007] One or more embodiments of the present disclosure are directed to a method including selectively depositing an etch stop layer on a substrate surface including a first dielectric material having a plurality of features formed therein and a first metallic material within the features. The etch stop layer is deposited on the surface of the first dielectric material overlying the surface of the first metallic material. A second metallic material is deposited on the surface of the first metallic material and on the etch stop layer. The second metallic material is etched to expose a portion of the etch stop layer.
[0008] An additional embodiment of the present disclosure is directed to a method including exposing a substrate including a first dielectric material having a plurality of features formed therein and a first metallic material within the features to a blocking compound to form a passivated surface of the first metallic material. An etch stop layer is selectively deposited on the first dielectric material overlying the passivated surface of the first metallic material. The blocking compound is removed from the surface of the first metallic material. A second metallic material is deposited on the surface of the first metallic material and over the etch stop layer. The second metallic material is etched by photolithography to expose the etch stop layer and form a conductive path between the first metallic material within at least two of the features. The exposed portions of the etch stop layer are removed.
[0009] A further embodiment of the present disclosure is directed to a processing system including a central transfer station having a robot therein configured to transfer one or more substrates between chambers coupled to the central transfer station. A first processing chamber is coupled to the central transfer station and configured to selectively deposit an etch stop layer on the substrate. A second processing chamber is coupled to the central transfer station and configured to deposit a metallic material. A third processing chamber is coupled to the central transfer station and configured to etch the metallic material. A control system is coupled to the central transfer station and the first, second, and third processing chambers. The control system includes a first configuration for transferring the substrate between the first, second, and third processing chambers, a second configuration for supplying one or more process gases to the first processing chamber to selectively deposit the etch stop layer, a third configuration for supplying one or more process gases to the second processing chamber to deposit the metallic material, and a fourth configuration for supplying one or more process gases to the third processing chamber to etch the metallic material.
[0010] So that the above-mentioned features of the present disclosure can be understood in detail, a more particular description of the present disclosure briefly summarized above will be had by reference to embodiments, some of which are illustrated in the accompanying drawings. It should be noted, however, that the present disclosure can admit of other equally effective embodiments, and therefore, the accompanying drawings illustrate only typical embodiments of the present disclosure and should not be considered as limiting the scope of the present disclosure. [Brief explanation of the drawings]
[0011] [Figures 1A-4A] 1A-1C are cross-sectional views of an exemplary substrate during processing in accordance with one or more embodiments of the present disclosure. [Figures 1B-4B] 1A-1C are top views of an exemplary substrate during processing in accordance with one or more embodiments of the present disclosure. [Figure 5]1 is a flowchart of an exemplary processing method according to one or more embodiments of the present disclosure. [Figure 6] FIG. 1 illustrates a processing system for processing substrates in accordance with one or more embodiments of the present disclosure. DETAILED DESCRIPTION OF THE INVENTION
[0012] Before describing several example embodiments of the present disclosure, it is to be understood that the present disclosure is not limited to the details of structure or process steps set forth in the following description. The present disclosure is capable of other embodiments and of being practiced or carried out in various ways.
[0013] As used herein and in the appended claims, the term "substrate" refers to a surface or portion of a surface upon which a process acts. Those skilled in the art will also understand that a reference to a substrate can refer only to a portion of a substrate, unless the context clearly dictates otherwise. Additionally, a reference to deposition on a substrate can refer to both a bare substrate and a substrate upon which one or more films or features have been deposited or formed.
[0014] As used herein, the term "substrate" refers to any substrate surface or material surface formed on a substrate upon which film processing is performed during a manufacturing process. For example, substrate surfaces upon which processing can be performed include materials such as silicon, silicon oxide, strained silicon, silicon-on-insulator (SOI), carbon-doped silicon oxide, amorphous silicon, doped silicon, germanium, gallium arsenide, glass, sapphire, and any other material such as metals, metal nitrides, metal alloys, and other conductive materials, depending on the application. Substrates include, without limitation, semiconductor wafers. Substrates can undergo pretreatment processes to polish, etch, reduce, oxidize, hydroxylate, anneal, UV cure, e-beam cure, and / or bake the substrate surface. In addition to film processing performed directly on the surface of the substrate itself, the present disclosure also recognizes that any of the disclosed film processing steps can also be performed on an underlying layer formed on the substrate, as disclosed in more detail below, and the term "substrate surface" includes such underlying layers as the context indicates. Thus, for example, if a film / layer or partial film / layer is deposited on a substrate surface, the exposed surface of the newly deposited film / layer becomes the substrate surface.
[0015] One or more embodiments of the present disclosure are directed to methods for the deposition and integration of reverse-selective etch stop layers. Some embodiments of the present disclosure advantageously provide metal interconnects with low resistance. Some embodiments of the present disclosure provide metal interconnects with low interfacial electron scattering. Some embodiments of the present disclosure provide a resistance advantage over subtractive etching schemes.
[0016] 1-5, an exemplary substrate 100 is shown during processing according to a method 500 of the present disclosure. For reference, the view labeled A (e.g., FIG. 1A) is a side view of the substrate 100 along line A-A'. The view labeled B (e.g., FIG. 1B) is a top view of the substrate 100.
[0017] 1A and 1B, a substrate 100 includes a first dielectric material 110 and a first metallic material 120. A surface 105 of the substrate has a plurality of features formed therein. The first metallic material 120 is inside the features. In some embodiments shown, the features are vias. In some embodiments not shown, the features are trenches.
[0018] As shown, in some embodiments, the surface 125 of the first metallic material 120 is substantially flush with the surface 115 of the first dielectric material. In some embodiments, the first metallic material 120 does not completely fill the feature. In other words, in some embodiments, the first metallic material 120 is recessed relative to the surface of the first dielectric material 110.
[0019] The first dielectric material 110 can be any suitable dielectric material. In some embodiments, the first dielectric material 110 is a low-k dielectric material. In some embodiments, the first dielectric material 110 comprises silicon oxide, silicon nitride, silicon carbide, or a combination thereof. In some embodiments, the first dielectric material 110 consists essentially of silicon oxide. In some embodiments, the first dielectric material 110 consists essentially of a low-k dielectric material. In this regard, a material "consisting essentially of" a given material is one that, excluding hydrogen, comprises 98% or more, 99% or more, 99.5% or more, or 99.9% or more, on an atomic basis.
[0020] First metallic material 120 can be any suitable conductive material. In some embodiments, first metallic material 120 includes one or more of copper, cobalt, tungsten, ruthenium, or molybdenum. In some embodiments, first metallic material 120 consists essentially of copper.
[0021] In operation 510, an etch stop layer 210 is selectively deposited on the substrate surface 105. The etch stop layer 210 is selectively deposited on the surface of the first dielectric material 110 overlying the surface of the first metallic material 120. The etch stop layer 210 can be any suitable etch stop, including, but not limited to, tantalum nitride (TaN), titanium nitride (TiN), or aluminum oxide (Al2O3).
[0022] As used herein and in the appended claims, the term "selectively deposit on a first surface in preference to a second surface" or the like means that a first amount of film or layer is deposited on the first surface, a second amount of film or layer is deposited on the second surface, and the amount of the second film is less than the amount of the first film, or in some cases no film is deposited on the second surface.
[0023] The term "over" as used in this context does not imply a physical orientation of one surface on top of another, but rather a relationship to the thermodynamic or kinetic properties of a chemical reaction with one surface relative to the other. For example, selectively depositing a cobalt film on a copper surface in preference to a dielectric surface means that the cobalt film will deposit on the copper surface and little or no cobalt will deposit on the dielectric surface, or that forming a cobalt film on the copper surface is thermodynamically or kinetically favored relative to forming a cobalt film on the dielectric surface.
[0024] In some embodiments, "selectively" means that the target material forms on the target surface at a rate that is about 2, 3, 4, 5, 7, 10, 15, or 20 times or more faster than the rate of formation on non-selected surfaces. In other words, the selectivity of the target material surface relative to the non-selected surfaces is equal to or greater than about 2:1, 3:1, 4:1, 5:1, 7:1, 10:1, 15:1, 20:1, 50:1, 100:1, 200:1, or 500:1. In some embodiments, the etch stop layer is deposited with a selectivity of 5 or greater.
[0025] Some embodiments of the present disclosure are described as "reverse selective" deposition processes, or the deposited films are described as "reverse selective" films. Initially, selective processes deposited metallic materials over dielectric materials. However, over time, the reverse has also been observed. Thus, in this context, "reverse selective" processes deposit more material on dielectric surfaces than on metallic surfaces.
[0026] In some embodiments, selectively depositing the etch stop layer 210 in operation 510 includes exposing the substrate to a blocking compound to form a passivated surface of the first metallic material. The etch stop layer 210 is deposited on the first dielectric material 110 covering the passivated surface of the first metallic material 120.
[0027] In some embodiments, the blocking compound comprises one or more of a phosphoric acid, an alkylsilane, a halogenated silane, a thiol, or an unsaturated hydrocarbon. In some embodiments, the blocking compound comprises or consists essentially of 3-hexyne.
[0028] In some embodiments, if a blocking compound is used, the method 500 further includes removing the blocking compound from the passivated surface of the first metallic material 120. In some embodiments, the blocking compound can be removed by a physical process (e.g., pyrolysis, etching, or surface sputtering). In some embodiments, the blocking compound is removed by a chemical process (e.g., a plasma treatment or a heat treatment utilizing H, O, NH, or a fluorine-based reactant).
[0029] In operation 520, a second metal material 310 is deposited on the surface of the first metal material 120 and the etch stop layer 210. In some embodiments, the second metal material 310 covers the substrate surface 105. In some embodiments, if the first metal material 120 is recessed below the first dielectric material 110, the second metal material 310 fills multiple features.
[0030] In some embodiments, the first metallic material and the second metallic material are separate materials. In some embodiments, the first metallic material and the second metallic material are the same material. In some embodiments, the second metallic material 310 comprises one or more of copper, cobalt, tungsten, ruthenium, or molybdenum. In some embodiments, the second metallic material 310 consists essentially of copper.
[0031] In operation 530, the second metal material 310 is etched to expose a portion of the etch stop layer 210. In some embodiments, etching the second metal material 310 forms a conductive path between the first metal material 120 within at least two of the features. In some embodiments, etching the second metal material includes a photolithography process. In some embodiments, in optional operation 540, the exposed portion of the etch stop layer 210 is removed.
[0032] Referring to FIG. 6 , an additional embodiment of the present disclosure is directed to a processing system 900 for performing methods described herein. FIG. 6 illustrates a system 900 that can be used to process substrates according to one or more embodiments of the present disclosure. The system 900 can be referred to as a cluster tool. The system 900 includes a central transfer station 910 having a robot 912 therein. While the robot 912 is illustrated as a single-blade robot, one skilled in the art will understand that other configurations of the robot 912 are within the scope of the present disclosure. The robot 912 is configured to move one or more substrates between multiple chambers coupled to the central transfer station 910.
[0033] At least one pre-clean / buffer chamber 920 is coupled to the central transfer station 910. The pre-clean / buffer chamber 920 may include one or more of a heater, a radical source, or a plasma source. The pre-clean / buffer chamber 920 may be used as a holding area for individual semiconductor substrates or for cassettes of wafers for processing. The pre-clean / buffer chamber 920 may perform a pre-clean process, preheat substrates for processing, or simply be a staging area for a process sequence. In some embodiments, there are two pre-clean / buffer chambers 920 coupled to the central transfer station 910.
[0034] 6, the pre-clean chamber 920 can function as a pass-through chamber between the factory interface 905 and the central transfer station 910. The factory interface 905 can include one or more robots 906 for moving substrates from cassettes to the pre-clean / buffer chamber 920. A robot 912 can then move the substrates from the pre-clean / buffer chamber 920 to other chambers in the system 900.
[0035] A first processing chamber 930 can be coupled to the central transfer station 910. The first processing chamber 930 can be configured as a selective deposition chamber and can be in fluid communication with one or more reactive gas sources to provide one or more flows of reactive gas to the first processing chamber 930. Substrates can be moved to and from the processing chamber 930 by a robot 912 through an isolation valve 914.
[0036] Processing chambers 940 can also be coupled to the central transfer station 910. In some embodiments, the processing chambers 940 comprise deposition chambers and are fluidly coupled to one or more reactive gas sources to provide a reactive gas flow to the processing chambers 940 to perform an isotropic etching process. Substrates can be moved to and from the processing chambers 940 by a robot 912 through an isolation valve 914.
[0037] In some embodiments, a processing chamber 960 is coupled to the central transfer station 910 and configured to function as an etch chamber. The processing chamber 960 can be configured to perform one or more different epitaxial growth processes.
[0038] In some embodiments, each of processing chambers 930, 940, and 960 is configured to perform a different portion of a processing method. For example, processing chamber 930 can be configured to perform a selective deposition process of an etch stop layer, processing chamber 940 can be configured to perform a deposition process of a second metal material, and processing chamber 960 can be configured to perform an etching process to pattern the second metal material. Those skilled in the art will understand that the number and arrangement of individual processing chambers on a tool can vary, and that the embodiment shown in FIG. 6 represents just one possible configuration.
[0039] In some embodiments, processing system 900 includes one or more metrology stations. For example, the metrology station can be located within pre-clean / buffer chamber 920, within central transfer station 910, or within any of the individual processing chambers. The metrology station can be any location within system 900 that allows for measuring recess distances without exposing the substrate to an oxidizing environment.
[0040] At least one controller 950 is coupled to one or more of the central transfer station 910, the pre-clean / buffer chamber 920, the processing chambers 930, 940, 945, or 960. In some embodiments, there are multiple controllers 950 connected to individual chambers or stations, with a primary control processor coupled to each of the separate processors for controlling the system 900. The controller 950 can be one of any form of general-purpose computer processor, microcontroller, microprocessor, etc. that can be used in an industrial environment for controlling various chambers and sub-processors.
[0041] At least one controller 950 may have a processor 952, a memory 954 coupled to the processor 952, input / output devices 956 coupled to the processor 952, and support circuitry 958 for communication between various electronic components. The memory 954 may include one or more of temporary memory (e.g., random access memory) and non-temporary memory (e.g., storage).
[0042] The processor's memory 954, or computer-readable medium, may be one or more of a local or remote, readily available memory, such as a random access memory (RAM), a read-only memory (ROM), a floppy disk drive, a hard disk, or any other form of digital storage. The memory 954 may hold a set of instructions operable by the processor 952 to control parameters and components of the system 900. Support circuits 958 are coupled to the processor 952 for supporting the processor in a conventional manner. The circuits may include, for example, cache, power supplies, clock circuits, input / output circuits, subsystems, etc.
[0043] The processes can generally be stored in memory as software routines that, when executed by a processor, cause the process chamber to perform the processes of the present disclosure. The software routines can also be stored and / or executed by a second processor (not shown) remote from the hardware being controlled by the processor. Some or all of the methods of the present disclosure can also be implemented in hardware. Thus, the processes can be implemented as software and executed in hardware using a computer system, such as, for example, an application-specific integrated circuit or other type of hardware implementation, or a combination of software and hardware. The software routines, when executed by a processor, transform a general-purpose computer into a special-purpose computer (controller) that controls chamber operation to perform the processes.
[0044] In some embodiments, the controller 950 has one or more configurations for executing individual processes or subprocesses to perform the method. The controller 950 can be connected to and configured to operate the intermediate components to perform the functions of the method. For example, the controller 950 can be connected to and configured to control one or more of gas valves, actuators, motors, slit valves, vacuum controls, etc.
[0045] The controller 950 in some embodiments has one or more configurations selected from a configuration for robotically moving substrates between multiple processing chambers, a configuration for loading and / or unloading substrates from the system, a configuration for selectively depositing an etch stop layer, a configuration for depositing a second metal material, a configuration for etching a second metal material, and / or a configuration for removing an etch stop layer.
[0046] References throughout this specification to "one embodiment," "a particular embodiment," "one or more embodiments," or "one embodiment" mean that a particular feature, structure, material, or characteristic described in connection with that embodiment is included in at least one embodiment of the present disclosure. Thus, the appearances of phrases such as "in one or more embodiments," "in a particular embodiment," "in one embodiment," or "in one embodiment" in various places throughout this specification are not necessarily all referring to the same embodiment of the present disclosure. Furthermore, particular features, structures, materials, or characteristics may be combined in any suitable manner in one or more embodiments.
[0047] Although the present disclosure has been described herein with reference to particular embodiments, it will be understood by those skilled in the art that the described embodiments are merely illustrative of the principles and applications of the present disclosure. It will be apparent to those skilled in the art that various modifications and variations can be made to the disclosed method and apparatus without departing from the spirit and scope of the present disclosure. That is, the present disclosure may include modifications and variations that come within the scope of the appended claims and their equivalents.
Claims
1. selectively depositing an etch stop layer on a substrate surface including a first dielectric material having a plurality of features formed therein and a first metallic material within the features, wherein the etch stop layer is deposited on the surface of the first dielectric material in preference to the surface of the first metallic material; depositing a second metallic material over the surface of the first metallic material and the etch stop layer; etching the second metal material to expose a portion of the etch stop layer; A method comprising:
2. The method of claim 1 , wherein the first dielectric material consists essentially of a low-k dielectric.
3. The method of claim 1 , wherein the first metallic material consists essentially of copper.
4. The method of claim 1 , wherein the etch stop layer is deposited with a selectivity of 5 or greater.
5. The method of claim 1 , wherein the first metallic material and the second metallic material are the same material.
6. The method of claim 1 , wherein at least one feature is a via.
7. The method of claim 1 , wherein the surface of the first metallic material is coplanar with the surface of the first dielectric material.
8. The method of claim 1 , wherein the first metallic material does not completely fill the feature.
9. The method of claim 8 , wherein the second metallic material fills the features and is deposited on a top surface of the substrate.
10. selectively depositing the etch stop layer; exposing the substrate to a blocking compound to form a passivated surface of the first metallic material; and depositing the etch stop layer on the first dielectric material preferentially over the passivation surface of the first metallic material; The method of claim 1 , comprising:
11. The method of claim 10 , wherein the blocking compound comprises one or more of a phosphoric acid, an alkyl silane, a halogenated silane, a thiol, or an unsaturated hydrocarbon.
12. The method of claim 10 , further comprising removing the blocking compound from the passivated surface of the first metallic material before depositing the second metallic material.
13. The blocking compound is H 2 The method of claim 12 wherein the metal oxide is removed by exposing the substrate to a plasma comprising:
14. The method of claim 1 , wherein the etch stop layer comprises tantalum nitride (TaN).
15. The method of claim 1 , wherein etching the second metallic material forms a conductive path between the first metallic material within at least two of the features.
16. The method of claim 1 , wherein the step of etching the second metallic material comprises a photolithography process.
17. The method of claim 1 further comprising removing exposed portions of the etch stop layer.
18. 10. The method of claim 1, wherein the resistance between the first metal material and the second metal material is less than the resistance of a similar device formed with a non-selective (blanket) etch stop layer.
19. exposing a substrate including a first dielectric material having a plurality of features formed therein and a first metallic material within said features to a blocking compound to form a passivated surface of said first metallic material; selectively depositing an etch stop layer over the first dielectric material in preference to the passivation surface of the first metallic material; removing the inhibiting compound from the surface of the first metallic material; depositing a second metallic material over the surface of the first metallic material and the etch stop layer; etching the second metal material by photolithography to expose the etch stop layer and form a conductive path between the first metal material within at least two of the features; removing the exposed portion of the etch stop layer; A method comprising:
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