Information processing device and control method

Abstract

To reduce power consumption in firmware update processing while suppressing an increase in firmware update time. The present invention provides a host system that executes firmware update processing. The host system measures the processing speed for each update process, and reduces the power limit value when the reduction in the processing speed relative to the reduction in the host system's power limit value is equal to or less than a predetermined reference amount. The present invention may be implemented in any form, such as an information processing device or a control method.

Description

[Technical Field]

[0001] The present application relates to an information processing apparatus and a control method, for example, updating firmware of a device that constitutes the apparatus. [Background technology]

[0002] In information processing devices such as personal computers (PCs), firmware for the devices that make up the devices may be updated. Firmware may be built into the hardware to control basic functions. Firmware updates are typically performed while the device being updated is stopped. Therefore, it is desirable to minimize the update time.

[0003] For example, the information processing device described in Patent Document 1 identifies one or more first processing blocks, each processing block consisting of multiple update processes executed in parallel, from multiple update processes based on information indicating the execution order of multiple update processes related to multiple modules corresponding to a target device including multiple modules on which software update processes are performed, estimates the update time for each of the identified first processing blocks using information indicating the update time for each of the multiple update processes, and estimates the update time for the target device based on at least one of the information indicating the update time and the estimated update time for each first processing block. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Laid-Open No. 2016-110372 Summary of the Invention [Problem to be solved by the invention]

[0005] Generally, the higher the clock frequency of an information processing device, the faster the processing speed and the greater the power consumption. However, the quantitative relationship between power consumption and firmware update time is not necessarily clear. For example, increasing the power limit value, which is a parameter for power consumption, does not necessarily shorten the firmware update time. Increasing the power limit value increases the power consumption of the information processing device, but may result in wasted power without shortening the firmware update time. [Means for solving the problem]

[0006] The present application has been made to solve the above-mentioned problems, and in one embodiment, an information processing device is an information processing device equipped with a host system that executes a firmware update process, wherein the host system measures the processing speed for each update process and reduces the power limit value when the amount of reduction in the processing speed relative to the amount of reduction in the power limit value of the host system is less than a predetermined reference amount.

[0007] In the information processing device, the host system may reduce the power limit value by a predetermined amount when the amount of reduction from the processing speed of the previous update process to the processing speed of the latest update process is equal to or less than the reference amount.

[0008] In the information processing device, the rate of reduction of the power limit value may be constant.

[0009] In the information processing apparatus, the host system may increase the power limit value when the amount of decrease in the processing speed from the previous update process to the latest update process exceeds the reference amount.

[0010] In the information processing device, the firmware may be a basic input / output system.

[0011] The information processing device may further include an embedded controller, and the firmware may be firmware for the embedded controller.

[0012] A control method according to a second aspect of the present application is a control method for an information processing device that executes a firmware update process, the information processing device measuring a processing speed for each update process; This is a control method for reducing the power limit value when the amount of reduction in the processing speed relative to the amount of reduction in the power limit value of the host system is equal to or less than a predetermined reference amount. [Effects of the Invention]

[0013] According to the embodiment of the present application, it is possible to reduce the power consumption in the update process while preventing the firmware update time from becoming longer. [Brief explanation of the drawings]

[0014] [Figure 1] 1 is a schematic block diagram illustrating an example of the configuration of an information processing device according to an embodiment of the present invention. [Figure 2] FIG. 2 is a schematic block diagram illustrating an example of the functional configuration of a host system according to the present embodiment. [Figure 3] FIG. 10 is a diagram illustrating an example of power consumption during firmware update processing. [Figure 4] 10 is a flowchart illustrating a power limit value setting process according to the present embodiment. [Figure 5] FIG. 10 is an explanatory diagram showing an example of the execution of a power limit value setting process according to the embodiment; DETAILED DESCRIPTION OF THE INVENTION

[0015] Hereinafter, an embodiment of the present application will be described with reference to the drawings. An example of the configuration of an information processing device 1 according to this embodiment will be described. FIG. 1 is a schematic block diagram showing an example of the configuration of an information processing device 1 according to this embodiment. In the example of FIG. 1, the information processing device 1 is configured as a general-purpose personal computer (PC). The information processing device 1 includes a host system 10, a display 14, a ROM (Read Only Memory) 22, an auxiliary storage device 23, a communication module 25, an input / output I / F (Interface) 26, an EC (Embedded Controller) 31, an input device 32, a power supply circuit 33, and a power switch 36.

[0016] The host system 10 is a computer system that forms the core of the information processing device 1. The host system 10 includes a CPU (Central Processing Unit) 11, a main memory 12, a GPU (Graphic Processing Unit) 13, and a chipset 21. In this application, the hardware that constitutes the host system 10 may be referred to as a "host device."

[0017] The CPU 11 controls the overall operation of the information processing device 1. That is, the CPU 11 is a core processing device that executes arithmetic processing instructed by various commands written in software (programs). The CPU 11 performs functions such as reading and writing data from and to storage media such as the main memory 12 and auxiliary storage device 23, reading data from the ROM 22, and inputting and outputting data to and from other devices. Programs executed by the CPU 11 include, for example, an operating system (OS), firmware, device drivers (sometimes simply referred to as "drivers" in this application), utility programs, and application programs. Note that, in this application, executing processing instructed by commands written in a program may be referred to as "executing a program," "executing a program," or the like.

[0018] System firmware is a program for performing input / output with hardware resources. System firmware includes BIOS (Unified Extensible Firmware Interface Basic Input / Output System). BIOS includes a system BIOS based on the UEFI (Unified Extensible Firmware Interface) standard. In this application, system firmware may be referred to as BIOS. CPU 11 starts booting when power is turned on. CPU 11 executes a boot loader and reads the BIOS from ROM 22. CPU 11 executes POST (Power On Self Test) processing according to the BIOS. POST processing includes basic device initialization, consistency verification, device detection, system configuration, and system startup (OS startup).

[0019] The main memory 12 is a writable memory used as a read area for the execution program of the processor 11 or as a work area for writing processing data for the execution program. The main memory 12 is composed of, for example, multiple DRAM (Dynamic Random Access Memory) chips. The processor 11 and main memory 12 constitute the minimum hardware that constitutes the host system 10.

[0020] The GPU 13 is an arithmetic processing device that mainly realizes functions related to image display. The GPU 13 processes drawing commands issued by the CPU 11 (image processing) and writes display data indicating the obtained display information to a video memory provided in the GPU 13. The GPU 13 sequentially reads the written display data from the video memory and outputs the read display data to the display 14. The GPU 13 may share some of the processing with the CPU 11. The GPU 13 may be integrated with the CPU 11 and formed on the same core, or may be formed on a core separate from the CPU 11. The GPU 13 may execute parallel processing other than image processing, or may share some of the processing with the CPU 11.

[0021] The display 14 displays a display screen based on the display data input from the GPU 13. The display 14 may be, for example, a liquid crystal display (LCD), an organic light emitting diode (OLED) display, or the like.

[0022] The chipset 21 includes multiple controllers and can be connected to multiple devices to input and output various types of data. The controller included in the chipset 21 may be, for example, a Universal Serial Bus (USB), a Serial Peripheral Interface (SPI) bus, a PCI-Express bus, etc. In the example of Fig. 1, the chipset 21 is connected to a ROM 22, an auxiliary storage device 23, a communication module 25, an input / output I / F 26, and an EC 31.

[0023] The chipset 21 also includes a management engine 21m. The management engine 21m has functions related to the maintenance and management of the host system 10. The management engine 21m has functions to provide some or all of the following: low power consumption service, out-of-band management service, function license service, anti-theft function, and protected audio / video path. The management engine 21m is a microcontroller separate from the host system 10. The management engine 21m is independent of the power state of the host system 10 and functions immediately after power-on, before the main OS of the host system 10 is fully booted. Immediately after power-on, the management engine 21m reads firmware for the management engine 21m (sometimes referred to herein as "MEFW: Management Engine Firmware") from the ROM 22, executes the read MEFW, and provides its functions.

[0024] The ROM 22 mainly stores firmware. The firmware stored in the ROM 22 includes BIOS, MEFW, and other firmware related to individual devices. The ROM 22 includes a rewritable nonvolatile memory such as an EEPROM (Electrically Erasable Programmable Read Only Memory) or a flash ROM.

[0025] The auxiliary storage device 23 stores various data used in the processing of the host system 10, various data acquired by the processing, various programs, etc. The auxiliary storage device 23 may be, for example, an SSD (Solid State Drive), an HDD (Hard-disk Drive), etc.

[0026] The communication module 25 connects to a communication network so as to be able to send and receive various types of data wirelessly or via a wire. The communication module 25 communicates various types of data with other devices connected to the communication network. The communication module 25 is, for example, a wireless LAN module that connects to a wireless LAN.

[0027] The input / output I / F 26 connects to various devices to input and output data via a wired or wireless connection, and includes, for example, a connector (USB connector) for inputting and outputting data via a wired connection in accordance with the USB standard.

[0028] The EC 31 is a controller that monitors and controls the operations of various devices connected thereto, regardless of the operating state of the host system 10. The EC 31 includes a CPU, ROM, RAM, a timer, and an input / output I / F, separate from the host system 10. Devices with data transfer speeds slower than those of the chipset 21 can be connected to the EC 31. In the example of FIG. 1, an input device 32, a power supply circuit 33, and a power switch 36 are connected to the EC 31.

[0029] The EC31 reads firmware for the EC31 (sometimes referred to herein as "ECFW: Embedded Controller Firmware") from its own ROM, executes the read ECFW, and provides its functions. Instead of its own ROM, the ECFW may be stored in advance in the ROM 22, and the read ECFW may be executed. However, it is necessary to start up the ROM 22 when the EC31 is started up.

[0030] The input device 32 detects a user operation, generates an operation signal in accordance with the detected operation, and outputs the operation signal to the EC 31. The input device 32 may be, for example, a keyboard, a touchpad, or the like.

[0031] The power supply circuit 33 includes a voltage converter. The voltage converter converts the voltage of DC power supplied from an external power supply or a battery (not shown) into a voltage required for the operation of each device constituting the information processing device 1, and supplies the converted voltage to the device. The power supply circuit 33 supplies power to the devices under the control of the EC 31. The power supply circuit 33 includes a charger. The charger charges a battery with the remaining power supplied from the external power supply that is not consumed by each device. When power is not supplied from the external power supply or when the power supplied from the external power supply does not meet the demand, the charger supplies power discharged from the battery to each device. The battery charges with power supplied from the power supply circuit 33 or discharges power stored in itself to the power supply circuit 33. The battery may be, for example, a lithium-ion battery, a sodium-ion battery, or the like.

[0032] Each time a pressing operation is received, the power switch 36 controls the state of power supply to the host system 10 to either power on (Power ON) or power off (Power OFF). When a pressing operation is received, the power switch 36 outputs a pressing signal indicating the pressing to the EC 31. When the information processing device 1 is powered off and a pressing signal is input from the power switch 36, the EC 31 causes the power supply circuit 33 to start supplying power to each device of the information processing device 1 (power on). When power is supplied to the information processing device 1 and a pressing signal is input from the power switch 36, the EC 31 causes the host system 10 to execute a stop process (shutdown).

[0033] Next, the operation of the host system 10 will be described. The functions of the host system 10 are realized by the CPU 11 executing various programs in cooperation with the main memory 12, the chipset 21, and other hardware. Figure 2 is a schematic block diagram showing an example of the functional configuration of the host system 10 according to this embodiment. The host system 10 includes a firmware management unit 10a and a power management unit 10b.

[0034] The firmware management unit 10a manages the firmware used in the information processing device 1. The firmware management unit 10a holds a management table that indicates version information of firmware applied to each device that constitutes the information processing device 1. The firmware management unit 10a executes firmware update processing. The firmware update processing includes, for example, a detection task, an acquisition task, and an update task. The update processing may be executed as part of a maintenance processing. The firmware management unit 10a may execute firmware management during a predetermined maintenance period (for example, a specific time period each day or week), or may execute firmware management at any time in response to a user instruction. The user instruction is transmitted by an operation signal input from the input device 32.

[0035] In the detection task, the firmware management unit 10a detects a newer version of firmware than the version currently applied to the device (sometimes referred to herein as the "current version"). The firmware management unit 10a, for example, inquires at predetermined intervals about the latest version from a firmware provider (not shown), which is a firmware provider. In this case, the firmware management unit 10a sends an inquiry command to the firmware provider to inquire about firmware that can be provided to the firmware provider. The firmware provider has a database that stores firmware versions that can be provided for each device, or has access to the database. The firmware provider is, for example, a firmware management server. The firmware provider may differ depending on the device to which the firmware is to be applied (sometimes referred to herein as the "target device"). The firmware provider is, for example, a cloud server connected to the information processing device 1 via the Internet.

[0036] When the providing device receives an inquiry command from the information processing device 1, it generates response information indicating the firmware versions available at that time (sometimes referred to herein as "available versions"). The providing device transmits the generated response information to the information processing device 1, which is the inquiry source, as a response to the inquiry command. The firmware management unit 10a refers to the management table and identifies, from the available versions indicated in the response information, a version that is different from the current version applied to the target device at that time. If there are multiple different versions, the firmware management unit 10a identifies one of the multiple versions (for example, the latest version). If the available versions indicated in the response information only include the current version, the firmware management unit 10a does not perform the acquisition task and update task described below.

[0037] Note that the target device and version may be specified by user operation. In this case, the firmware management unit 10a refers to the management table to identify the current version for the target device and determines whether the version specified by user operation corresponds to the current version. Even if the version specified by user operation is the current version, the firmware management unit 10a does not perform the acquisition task and update task described below.

[0038] In the acquisition task, the firmware management unit 10a accesses the ROM 22 and determines whether the firmware version for the target device identified in the detection task is stored. If it is stored, the firmware management unit 10a does not acquire firmware from the providing device and proceeds to the update task. If the identified firmware version is not stored in the ROM 22, the firmware management unit 10a acquires the identified firmware version for the target device from the providing device. In this case, the firmware management unit 10a sends a request command to the providing device to request the identified firmware version for the target device.

[0039] The providing device reads out the firmware of the version specified by the request command. In response to the request command, the providing device transmits the read firmware to the information processing device 1 that made the request. The firmware management unit 10a receives the firmware of the version specified by the request command from the providing device and stores the received firmware in the ROM 22. At this time, the current version of firmware stored in the ROM 22 may be erased or may be overwritten with the newly stored version of firmware.

[0040] In the update task, the firmware management unit 10a erases the current version of firmware stored in the working memory of the target device. For a specific target device, before erasing the current version of firmware, the firmware management unit 10a saves (backs up) image data indicating the execution state of the currently running program, including the firmware, in the auxiliary storage device 23. Then, the firmware management unit 10a stops (powers off) the supply of power to the target device. At this time, the firmware stored in the working memory of the target device is erased. Then, the firmware management unit 10a resumes (powers on) the supply of power to the target device, reads the identified version of firmware from the ROM 22, and loads the read firmware in the working memory of the target device. If image data has been stored in the auxiliary storage device 23, the firmware management unit 10a reads the image data from the auxiliary storage device 23 and loads the read image data in the working memory. Then, the firmware management unit 10a starts executing the firmware loaded in the working memory. The firmware management unit 10a updates the management table so that the new version of firmware becomes the current version of firmware.

[0041] The working memory can be a volatile memory (eg, RAM) provided in the target device (eg, management engine 21m, EC 31). If the target device is a host device, the working memory is the main memory 12. Unlike peripheral devices other than host devices (e.g., the management engine 21m, the EC31), power off corresponds to a shutdown, and the firmware to be updated is the BIOS. The new version of the BIOS to be updated is loaded from the ROM 22 to the main memory 12 during the boot process described above after the host system 10 is powered on.

[0042] The power management unit 10b monitors the operation of the host system 10 and controls the power consumption of the host system 10. The control parameters of the host system 10 include, for example, a first power limit. The first power limit is a power limit value equivalent to the rated power and is sometimes called PL1 (Power Limit 1) or Long Term Power Limit. The rated power is a threshold that allows the moving average of power consumption to exceed this value temporarily, but restricts it from constantly exceeding this value (for example, for several seconds to several tens of seconds or more). The window length for the moving average (the observation period for the moving average of power consumption) is, for example, about 1 to 10 seconds.

[0043] The power management unit 10b controls the power consumption of the host system 10 so that the moving average value of the power consumption is equal to or less than the rated power. The power management unit 10b monitors the power consumption of the host system 10, and when the time during which the power consumption exceeds the rated power continues for a predetermined reference duration τ (e.g., 0.2 to 1 second) or more, the power consumption of the host system 10 is reduced until the moving average value of the power consumption is equal to or less than the rated power. Generally, the power consumption of the CPU 11 increases as the operating voltage and clock frequency increase. The power control unit 202 changes either or both of the operating voltage and clock frequency of the CPU 11 to generally limit the power consumption of the host system 10 to equal to or less than the rated power.

[0044] The power management unit 10b according to this embodiment monitors the operating status of the firmware management unit 10a and controls the power consumption related to the firmware update process. Here, the power management unit 10b reduces the power limit value within a range in which the reduction in the processing speed of the update process relative to the reduction in the power limit value of the host system 10 is smaller than a predetermined reference amount. Generally, the processing speed decreases as the power limit value decreases, but the ratio of the decrease in processing speed to the decrease in the power limit value is not necessarily constant. Figure 3 shows an example of the transition of CPU power consumption when BIOS updates are repeated.

[0045] 3, the power consumption of the CPU in the first update process is greater than the power consumption in the second and subsequent update processes. However, the time required for the first update process is not significantly shorter than the time required for the second and subsequent update processes. This embodiment focuses on this point and reduces the ratio of the amount of reduction in processing speed to the amount of reduction in the power limit value within a small range, thereby suppressing a decrease in processing speed and searching for a power limit value that results in less power consumption.

[0046] More specifically, the power management unit 10b determines whether the firmware management unit 10a is currently executing a firmware update process (sometimes referred to herein as an "update"). When the firmware update process is currently in progress, the power management unit 10b measures the processing speed of the update process (sometimes referred to herein as an "update speed"). The power management unit 10b measures the processing time required for the firmware update process (sometimes referred to herein as an "update time") and measures the capacity of the firmware involved in the update (sometimes referred to herein as an "update size"). The power management unit 10b determines the processing speed by dividing the measured capacity by the processing time.

[0047] For example, the power management unit 10b reduces the power limit value by a predetermined amount for each update process until the amount of decrease from the processing speed of the previous update process to the processing speed of the latest update process exceeds a predetermined reference amount. Here, when the amount of decrease from the processing speed of the previous update process to the processing speed of the latest update process is equal to or less than the predetermined reference amount, the power management unit 10b reduces the power limit value at that time by a constant reduction rate. When the amount of decrease from the processing speed of the previous update process to the processing speed of the latest update process exceeds the reference amount, the power management unit 10b does not reduce the power limit value. In this case, the power management unit 10b may increase the power limit value to compensate for the amount of decrease from the previous time.

[0048] Next, an example of the power limit value setting process according to this embodiment will be described. Fig. 4 is a flowchart illustrating the power limit value setting process according to this embodiment. However, the host system 10 is configured to set the initial value of the power limit value related to the update process to a value equal to or greater than the normal power consumption. Parameters such as the power limit value, its initial value, its increase rate, and its decrease rate may be set independently for each target device.

[0049] (Step S102) The power management unit 10b monitors the operating status of the firmware management unit 10a and determines whether a firmware update process is being executed. If an update process is being executed (YES in step S102), the process proceeds to step S104. If an update process is not being executed (NO in step S102), the process of step S102 is repeated. (Step S104) The power management unit 10b measures the time required for the update process as the update time, and measures the capacity of the firmware related to the update process (update size). The power management unit 10b divides the measured update size by the update time to calculate the update speed.

[0050] (Step S106) The power management unit 10b determines whether the calculated latest update rate (current value) exceeds a predetermined factor (for example, 0.8 to 1.0) of the update rate (previous value) related to the immediately preceding update process. If it is determined that it exceeds the predetermined factor (YES in step S106), the process proceeds to step S108. If it is determined that it does not exceed the predetermined factor (NO in step S106), the process proceeds to step S110.

[0051] (Step S108) The power management unit 10b reduces the power limit value currently set in the host system 10 at a predetermined reduction rate (for example, to 0.7 to 0.9 times the current value), and then returns to the processing of step S102. (Step S110) The power management unit 10b increases the power limit value currently set in the host system 10 at a predetermined rate (for example, to 1.1 to 1.4 times the current value). The rate of increase in the power limit value in step S110 may be set to compensate for the decrease in the power limit value in step S108. For example, if the power limit value is decreased to 0.8 times in step S108, the rate of increase in step S110 may be set so that the power limit value is increased to 1.25 times. Then, the processing of FIG. 4 ends.

[0052] Next, an example of the execution of the power limit value setting process according to this embodiment will be described below. Fig. 5 is an explanatory diagram showing an example of the execution of the power limit value setting process according to this embodiment. In the execution example illustrated in FIG. 5, the initial value of the power limit value is 28 W, the predetermined magnification of the update speed in step S106 is 0.9 times, the decrease rate in step S108 is 3 / 4 of the current value, and the increase rate in step S110 is 4 / 3 of the current value.

[0053] In the first update process, the update time is 10 minutes and the update size is 100 kB, so the update speed is 10 kB / min. The power management unit 10b reduces the power limit value to 21 W, which is 3 / 4 times the initial value of 28 W. In the second update process, the update time is 10 minutes and the update size is 100 kB, so the update speed is 10 kB / min. Since the second update speed is equal to the first update speed, the power management unit 10 b reduces the power limit value to 16 W, which is 3 / 4 times 21 W.

[0054] In the third update process, the update time is 8 minutes and the update size is 80 kB, so the update speed is 10 kB / min. Since the third update speed is equal to the second update speed, the power management unit 10 b reduces the power limit value to 12 W, which is 3 / 4 times 16 W. In the fourth update process, the update time is 10 minutes and the update size is 100 kB, so the update speed is 10 kB / min. Since the fourth update speed is equal to the third update speed, the power management unit 10 b reduces the power limit value to 9 W, which is 3 / 4 times 12 W.

[0055] In the fifth update process, the update time is 15 minutes and the update size is 100 kB, so the update speed is 6.7 kB / min. Since the fifth update speed is 0.9 times or less the fourth update speed, the power management unit 10b increases the power limit value to 12 W, which is 4 / 3 times 9 W. In the sixth update process, the update time is 8 minutes and the update size is 80kB, so the update speed is 10kB / min. After that, the process in Figure 4 ends and the power limit value for the firmware update process is set to 12W.

[0056] 4 and 5, the amount of change in the power limit value from the previous value to the current value is shown using an increase rate, a decrease rate, or a magnification of the current value with respect to the previous value, but this is not limiting. The amount of change in the power limit value may also be shown using the difference between the previous value and the current value. Furthermore, the amount of change in the update rate from the previous value to the current value is shown using the magnification of the current value with respect to the previous value, but this is not limiting. The amount of change in the update rate may also be shown using a decrease rate or the difference between the previous value and the current value.

[0057] The process of step S110 may be omitted from the process of Fig. 4. In this case, if it is determined in step S106 that the current value of the update rate does not exceed the predetermined multiple of the previous value of the update rate (NO in step S106), the power management unit 10b ends the process of Fig. 4.

[0058] As described above, the information processing device 1 according to this embodiment includes the host system 10 that executes firmware update processing. The host system 10 measures the processing speed for each update processing, and reduces the power limit value when the amount of reduction in the processing speed (i.e., update speed) relative to the amount of reduction in the power limit value of the host system 10 is equal to or less than a predetermined reference amount. With this configuration, the power limit value is controlled so that it decreases when the processing speed does not decrease or decreases only slightly, thereby preventing the firmware update process from taking too long and reducing power consumption.

[0059] The host system 10 may decrease the power limit value by a predetermined amount when the decrease in the processing speed from the previous update process to the latest update process is equal to or less than a reference amount. According to this configuration, the power limit value is adaptively adjusted so as to maintain the processing speed based on the change in the processing speed measured each time the firmware update process is executed.

[0060] The rate of decrease in the power limit value may also be constant. With this configuration, the smaller the power limit value, the smaller the amount of reduction can be achieved by simple calculation. When adjusting the power limit value while reducing it to a smaller value, the power limit value can be efficiently adjusted until the amount of reduction exceeds a predetermined reference amount.

[0061] Furthermore, the host system 10 may increase the power limit value when the amount of decrease in the processing speed from the previous update process to the latest update process exceeds a reference amount. According to this configuration, even if the processing speed drops significantly due to a reduction in the power limit value, the original processing speed can be restored by compensating by increasing the power limit value.

[0062] The firmware to be updated may be the BIOS. Furthermore, in the information processing device 1 including an embedded controller (for example, the management engine 21m, the EC 31), the firmware to be updated may be the firmware of the embedded controller (for example, the MEFW, the ECFW).

[0063] Although the embodiments of the present invention have been described above in detail with reference to the drawings, the specific configurations are not limited to the above-described embodiments, and the present invention also includes designs that do not deviate from the gist of the present invention. The configurations described in the above-described embodiments can be combined in any manner. [Explanation of symbols]

[0064] 1...information processing device, 10...host system, 10a...firmware management unit, 10b...power management unit, 11...CPU, 12...main memory, 13...GPU, 14...display, 21...chipset, 21m...management engine, 22...ROM, 23...auxiliary storage device, 25...communication module, 26...input / output I / F, 31...EC, 32...input device, 33...power supply circuit, 36...power switch

Claims

1. An information processing device including a host system that executes firmware update processing, the host system measures a processing speed for each update process; When the amount of reduction in the processing speed relative to the amount of reduction in the power limit value of the host system becomes equal to or less than a predetermined reference amount, the power limit value is reduced. Information processing device.

2. The host system When the amount of decrease in the processing speed of the latest update process from the processing speed of the previous update process is equal to or less than the reference amount, Decreasing the power limit value by a predetermined amount The information processing device according to claim 1 .

3. The rate at which the power limit value is reduced is constant. The information processing device according to claim 2 .

4. The host system When the amount of decrease in the processing speed of the latest update process from the processing speed of the previous update process exceeds the reference amount, Increase the power limit The information processing device according to claim 2 .

5. The firmware is a basic input / output system The information processing device according to claim 1 .

6. further comprising an embedded controller; The firmware is the firmware of the embedded controller. The information processing device according to claim 1 .

7. A control method for an information processing device that executes firmware update processing, comprising: the information processing device measures a processing speed for each update process; When the amount of reduction in the processing speed relative to the amount of reduction in the power limit value of the host system becomes equal to or less than a predetermined reference amount, the power limit value is reduced. Control method.

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