Semiconductor Devices

Abstract

To provide a semiconductor device with excellent reliability.SOLUTION: A semiconductor device includes a first oxide, a second oxide, a first layer, and a second layer on the first oxide, an insulator on the second oxide, a first conductor on the insulator, a second conductor on the first layer, and a third conductor on the second layer. Each of the first layer and the second layer includes a region with a thickness of 0.5 nm or more and 3 nm or less. Each of the second conductor and the third conductor is formed of a conductive material with physical properties for extracting hydrogen.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] One embodiment of the present invention relates to a semiconductor device and a manufacturing method of the semiconductor device. One aspect relates to a semiconductor wafer, a module, and an electronic device.

[0002] In this specification and the like, a semiconductor device refers to a device that can function by utilizing semiconductor characteristics. This refers to semiconductor devices in general, including semiconductor elements such as transistors, semiconductor circuits, arithmetic units, and memory devices. The device is one aspect of a semiconductor device. device, lighting device, electro-optical device, power storage device, memory device, semiconductor circuit, imaging device, electronic device etc. may be said to have a semiconductor device.

[0003] Note that one embodiment of the present invention is not limited to the above technical fields. One aspect of the present invention relates to an object, a method, or a manufacturing method. , process, machine, manufacture, or composition of matter (This is related to the above.) [Background technology]

[0004] A technology for constructing transistors using semiconductor thin films formed on substrates with insulating surfaces The transistor is used in integrated circuits (ICs) and image display devices (simply called display devices). It is widely used in electronic devices such as transistors. Silicon-based semiconductor materials are widely known as suitable semiconductor thin films, but other materials include oxides. Compound semiconductors are attracting attention.

[0005] In oxide semiconductors, there are c-axis ally coupled oxides (CAAC) that are neither single crystal nor amorphous. nc (nanocrystalline) structure and nc (nanocrystalline) ) structure has been found (see Non-Patent Documents 1 and 2).

[0006] In Non-Patent Documents 1 and 2, oxide semiconductors having a CAAC structure are used to Techniques for fabricating transistors are disclosed. [Prior art documents] [Non-patent literature]

[0007] [Non-Patent Document 1] S. Yamazaki et al., “SID Symposium Digest of Technical Papers”, 2012, volume 43, issue 1, p.183-186 [Non-patent document 2] S. Yamazaki et al., “Japanese Journal of Applied Physics”, 2014, volume 53, Number 4S, p.04ED18-1-04ED18-10 Summary of the Invention [Problem to be solved by the invention]

[0008] An object of one embodiment of the present invention is to provide a highly reliable semiconductor device. Another object of one embodiment of the present invention is to provide a semiconductor device having favorable electrical characteristics. Another object of one embodiment of the present invention is to provide a semiconductor device with large on-state current. Another embodiment of the present invention provides a semiconductor device that can be miniaturized or highly integrated. Another object of one embodiment of the present invention is to provide a semiconductor device with low power consumption. One of the goals is to

[0009] The description of these problems does not preclude the existence of other problems. It is not necessary for one embodiment to solve all of these problems. The subject matter will be self-evident from the description, drawings, claims, etc. It is possible to extract other issues from the drawings, claims, etc. [Means for solving the problem]

[0010] One aspect of the present invention is a method for manufacturing a semiconductor device comprising a first oxide, a second oxide on the first oxide, a first layer, and a second oxide on the first oxide. and a second layer, an insulator on the second oxide, a first conductor on the insulator, and a a second conductor on the second layer, and a third conductor on the second layer, and the first layer and the second layer are Each of the second and third conductive layers has a region with a film thickness of 0.5 nm or more and 3 nm or less. The conductors are semiconductor devices made of conductive materials with physical properties that remove hydrogen. is.

[0011] In the above, the first oxide is a mixture of indium and an element M (M is aluminum, gallium, a second conductor and a third conductor, each of which comprises a metal (e.g., aluminum, yttrium, or tin) and zinc; Each of the first and second layers contains tantalum and nitrogen. Preferably, the catalyst comprises talc and oxygen.

[0012] In the above, the semiconductor device has a third layer and a fourth layer, Each of the four layers has a region with a thickness of 0.5 nm to 3 nm, and the second oxide is a first region facing the side surface of the second conductor with a third layer interposed therebetween, and a fourth layer interposed therebetween; and a second region facing the side surface of the third conductor.

[0013] In the above, the first oxide is a mixture of indium and an element M (M is aluminum, a second conductor, and a third conductor, The conductors each comprise tantalum and nitrogen, and the first layer, the second layer, the third layer, and Preferably, the first and fourth layers comprise tantalum and oxygen, respectively.

[0014] Another embodiment of the present invention is a method for manufacturing a semiconductor device comprising: a first oxide; a second oxide on the first oxide; a third oxide, a fourth oxide, an insulator on the second oxide, and a first conductive layer on the insulator; a second conductor on the third oxide, and a third conductor on the fourth oxide, The second conductor and the third conductor are materials that can remove hydrogen and are resistant to oxidation. The semiconductor device is made of a conductive material having a high electrical conductivity.

[0015] In the above, the first oxide, the third oxide, and the fourth oxide are each an indium oxide. and element M (where M is aluminum, gallium, yttrium, or tin), and zinc. and in the third oxide, the atomic ratio of element M to indium is In the fourth oxide, the atomic ratio of element M to indium is greater than The atomic ratio of element M to indium in the first oxide is The atomic ratio of the element M is larger than that of the element M, and the third oxide and the fourth oxide each have a thickness of 1n. It is preferable that the thickness of the slab has a region of m or more and 2 nm or less.

[0016] In the above, the second conductor and the third conductor are tantalum and nitrogen, respectively. It is preferable that the material has the following properties: [Effects of the Invention]

[0017] According to one embodiment of the present invention, a highly reliable semiconductor device can be provided. According to one embodiment of the present invention, a semiconductor device having favorable electrical characteristics can be provided. According to one embodiment of the present invention, a semiconductor device with large on-state current can be provided. According to one embodiment of the present invention, a semiconductor device that can be miniaturized or highly integrated can be provided. According to one embodiment of the present invention, a semiconductor device with low power consumption can be provided.

[0018] The description of these effects does not preclude the existence of other effects. An embodiment does not necessarily have all of these effects. Effects other than these may be included in the description. The above is self-evident from the description, drawings, claims, etc. From the above descriptions, it is possible to extract other effects. [Brief explanation of the drawings]

[0019] [Figure 1] 1A is a top view of a semiconductor device according to one embodiment of the present invention, and FIGS. 1B and 1C are cross-sectional views of the semiconductor device according to one embodiment of the present invention. [Figure 2] 2A and 2B are cross-sectional views of a semiconductor device according to one embodiment of the present invention. [Figure 3] 3A is a top view of a semiconductor device according to one embodiment of the present invention, and FIGS. 3B and 3C are cross-sectional views of the semiconductor device according to one embodiment of the present invention. [Figure 4] 4A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 4B and 4C are cross-sectional views illustrating the method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 5] 5A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 5B and 5C are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 6] 6A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 6B and 6C are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 7] 7A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 7B and 7C are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 8] 8A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 8B and 8C are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 9] 9A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 9B and 9C are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 10] 10A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 10B and 10C are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 11] 11A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 11B and 11C are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 12] FIG. 12 is a cross-sectional view illustrating a structure of a memory device according to one embodiment of the present invention. [Figure 13] FIG. 13 is a cross-sectional view illustrating a structure of a memory device according to one embodiment of the present invention. [Figure 14] 14A and 14B are block diagrams illustrating configuration examples of a memory device according to one embodiment of the present invention. [Figure 15] 15A to 15H are circuit diagrams illustrating configuration examples of memory devices according to one embodiment of the present invention. [Figure 16] 16A and 16B are schematic diagrams of a semiconductor device according to one embodiment of the present invention. [Figure 17] 17A to 17E are schematic diagrams of a memory device according to one embodiment of the present invention. [Figure 18] 18A to 18H illustrate electronic devices according to one embodiment of the present invention. [Figure 19] 19(A) and 19(B) are diagrams showing the profiles of the deuterium (D) concentration and the oxygen (18O) concentration in TaNxOy of this example, respectively. [Figure 20] 20(A) and 20(B) are diagrams showing the profile of the deuterium (D) concentration in TaNxOy of this example. DETAILED DESCRIPTION OF THE INVENTION

[0020] Hereinafter, embodiments will be described with reference to the drawings. It is understood that the present invention may be practiced in various different ways without departing from its spirit and scope. It will be readily apparent to those skilled in the art that various changes in form and details may be made. Therefore, the present invention should not be construed as being limited to the description of the following embodiments.

[0021] In the drawings, the size, thickness of layers, or areas may be exaggerated for clarity. Therefore, the drawings are not necessarily limited to the scale. The examples are shown in the drawings as a schematic illustration, and are not limited to the shapes or values ​​shown in the drawings. For example, In the actual manufacturing process, layers and resist masks are damaged by etching and other processes. However, in order to make it easier to understand, this may not be reflected in the diagram. In the drawings, the same parts or parts having similar functions are designated by the same reference numerals between different drawings. In addition, when referring to similar functions, In such cases, the hatch pattern may be the same and no particular reference numeral may be assigned.

[0022] In addition, the invention can be easily understood, especially in top views (also called "plan views") and perspective views. In order to simplify the description, some components may be omitted. The information may be omitted.

[0023] In addition, in this specification, ordinal numbers such as 1st, 2nd, etc. are used for convenience. It does not indicate the order of processes or stacking. For example, "first" may be changed to "second" The term "the" or "third" can be used interchangeably in the description. The ordinal numbers listed may not match the ordinal numbers used to identify an aspect of the present invention. There may be cases where this is the case.

[0024] In addition, in this specification, terms indicating arrangement such as "above" and "below" refer to the relationship between components. The positional relationship is used for convenience in describing the same with reference to the drawings. The relationship changes depending on the direction in which each component is depicted. The terms are not limited to those described above, and can be rephrased appropriately depending on the situation.

[0025] For example, in this specification, it is explicitly stated that X and Y are connected. In this case, X and Y are electrically connected, and X and Y are functionally connected. The case where X and Y are directly connected and the case where X and Y are directly connected are disclosed in the present specification. Therefore, it is not limited to predetermined connection relationships, for example, connection relationships shown in drawings or text. Connections other than those shown in the drawings or text are also disclosed in the drawings or text. Here, X and Y are the object (for example, a device, an element, a circuit, a wiring, an electrode, a terminal, etc.). , conductive film, layer, etc.).

[0026] In this specification, a transistor includes a gate, a drain, and a source. It is an element having at least three terminals including a drain (drain terminal, drain Between the drain electrode and the source terminal The channel forming region is formed in the channel. A current can be passed between the source and the drain through the channel forming region. In this specification and the like, the channel formation region refers to a region through which current mainly flows.

[0027] The functions of the source and drain may differ depending on whether transistors with different polarities are used or whether the circuit This may happen when the direction of the current changes during operation. In the specification, the terms source and drain may be used interchangeably. do.

[0028] Note that the channel length is, for example, the length of a semiconductor (or transistor) in a top view of a transistor. When the transistor is in the on state, the gate electrode overlaps with the semiconductor (the part where current flows). The source (source region or source electrode) in the region where the source is formed or the channel forming region This refers to the distance between the transistor and the drain (drain region or drain electrode). In a transistor, the channel length does not necessarily have the same value in all regions. The channel length of the transistor may not be determined to a single value. In the case of the channel formation region, the channel length is either one value, a maximum value, a minimum value, or is the average value.

[0029] The channel width is, for example, the width of the semiconductor (or transistor) in a top view of the transistor. The area where the gate electrode overlaps with the semiconductor (the part of the semiconductor where current flows when the semiconductor is on). In the channel forming region, the channel is formed in a direction perpendicular to the channel length direction. The length of the formation region. In one transistor, the channel width is the length of the entire region. In other words, the channel width of a transistor does not necessarily take the same value. Therefore, in this specification, the channel width is determined based on the channel forming region. The value is any one of the values, the maximum value, the minimum value, or the average value.

[0030] In this specification and the like, depending on the structure of the transistor, the channel may not actually be formed. The channel width in the region where the transistor is The channel width shown in a top view of the star (hereinafter also referred to as the "apparent channel width") For example, if the gate electrode covers the side of the semiconductor, the effective When the channel width becomes larger than the apparent channel width and its effect cannot be ignored For example, in a transistor that is miniaturized and in which the gate electrode covers the side of the semiconductor, The proportion of the channel formation region formed on the side surface may become large. The effective channel width is larger than the upper channel width.

[0031] In such cases, it may be difficult to estimate the effective channel width through actual measurements. For example, to estimate the effective channel width from the design value, the shape of the semiconductor must be known. Therefore, if the shape of the semiconductor is not known accurately, the effective Channel width is difficult to measure accurately.

[0032] In this specification, when simply referring to the channel width, it refers to the apparent channel width. In this specification, when simply referred to as a channel width, it means an effective channel The channel length, channel width, effective channel width, apparent channel width, The channel width and other parameters can be determined by analyzing cross-sectional TEM images. can.

[0033] The impurities in a semiconductor refer to, for example, anything other than the main component that constitutes the semiconductor. Elements with a concentration of less than 0.1 atomic percent can be considered impurities. This can cause problems such as an increase in the density of defect levels in semiconductors and a decrease in crystallinity. When the semiconductor is an oxide semiconductor, impurities that change the properties of the semiconductor include, for example, , Group 1 elements, Group 2 elements, Group 13 elements, Group 14 elements, Group 15 elements, oxide semiconductors There are transition metals other than the main component, such as hydrogen, lithium, sodium, silicon, These include boron, phosphorus, carbon, and nitrogen. Water can also act as an impurity. Further, for example, oxygen vacancies may be formed in the oxide semiconductor due to the inclusion of impurities.

[0034] In this specification and the like, silicon oxynitride refers to a material having a composition containing more oxygen than nitrogen. Silicon nitride oxide is a material that contains a large amount of silicon dioxide rather than oxygen. It has a high nitrogen content.

[0035] In addition, in this specification, the term "insulator" may be replaced with "insulating film" or "insulating layer." The term "conductor" can also be replaced with "conductive film" or "conductive layer." The term "semiconductor" can also be replaced with "semiconductor film" or "semiconductor layer." can.

[0036] In this specification, "parallel" means that two straight lines are at an angle of -10° or more and 10° or less. Therefore, it includes cases where the angle is between -5° and 5°. "Almost parallel" means that the two lines are arranged at an angle of between -30° and 30°. "Perpendicular" means that two straight lines are arranged at an angle of 80° or more and 100° or less. Therefore, it also includes the case where the angle is between 85° and 95°. " refers to a state in which two straight lines are arranged at an angle of 60° or more and 120° or less.

[0037] In this specification, the term "metal oxide" refers to a metal in a broad sense. Metal oxides are oxides of the following: oxide insulators, oxide conductors (including transparent oxide conductors), ), oxide semiconductor (also called oxide semiconductor or simply OS) For example, when a metal oxide is used in the semiconductor layer of a transistor, Such a metal oxide may be referred to as an oxide semiconductor. In this case, the transistor may be referred to as a transistor having a metal oxide or an oxide semiconductor. can be done.

[0038] In this specification, normally off means that no potential is applied to the gate, or When a ground potential is applied to the gate, the drain current per 1 μm of channel width that flows through the transistor is The input current is 1×10 at room temperature. -20 A or less, 1 x 10 at 85°C -18 Below A , or 1 × 10 at 125°C -16 This means that it is A or below.

[0039] (Embodiment 1) In this embodiment, one example of a semiconductor device including a transistor 200 according to one embodiment of the present invention will be described. An example will be described.

[0040] <Configuration example of semiconductor device> 1A to 1C show a semiconductor device including a transistor 200 according to one embodiment of the present invention. 1A is a top view of the semiconductor device. 1(B) and 1(C) are cross-sectional views of the semiconductor device. 1B) is a cross-sectional view of the portion indicated by the dashed line A1-A2 in FIG. 1A, and shows transistor 2 1(A) is also a cross-sectional view of the channel length direction of 00. 1 is a cross-sectional view of a portion indicated by a dashed line in FIG. 1, and is a cross-sectional view of a transistor 200 in the channel width direction. In the top view of FIG. 1(A), some elements are omitted for clarity.

[0041] The semiconductor device of one embodiment of the present invention includes a transistor 200 and an insulator serving as an interlayer film. 214, insulator 216, insulator 280, insulator 274, and insulator 281. In addition, a conductor 240 (conductor) electrically connected to the transistor 200 and functioning as a plug The conductor 240a functions as a plug. Insulators 241 (insulators 241a and 241b) are provided in contact with the side surfaces of the do.

[0042] [Transistor 200] As shown in FIGS. 1A to 1C, the transistor 200 includes a substrate (not shown). a conductor 205 disposed on the insulator 216 and embedded in the insulator 216; An insulator 222 is disposed on the conductor 216 and on the conductor 205, and a and an oxide 230 (oxide 230a) disposed on the insulator 224. , oxide 230b, and oxide 230c), and an insulator disposed on oxide 230c. 250, and a conductor 260 (conductor 260a and conductor 260b) disposed on the insulator 250. 60b), and conductors 242a and 242b in contact with a portion of the top surface of oxide 230b. a part of the upper surface of the insulator 224, a side surface of the oxide 230a, a side surface of the oxide 230b, and a conductor The conductive material 242a is disposed in contact with the side and top surfaces of the conductive material 242b. and an insulator 254 .

[0043] The oxide 230 is made up of an oxide 230a disposed on the insulator 224 and an oxide 230b disposed on the insulator 224. and an oxide 230b disposed on the oxide 230b, at least a portion of which is oxide. and an oxide 230c in contact with the upper surface of the oxide 230b. b) By having the oxide 230a below the oxide 230a, the structure formed below the oxide 230a Therefore, the diffusion of impurities into the oxide 230b can be suppressed. By having the oxide 230c in the upper portion, the structure formed above the oxide 230c can be This can suppress the diffusion of impurities into the oxide 230b.

[0044] In the transistor 200, the oxide 230 is made up of oxides 230a, 230b, and oxide 230c are stacked, the present invention is not limited to this. For example, a single layer of oxide 230b, a layer of oxide 230a and oxide 230b, Two-layer structure, two-layer structure of oxide 230b and oxide 230c, or laminated structure of four or more layers can be set. Alternatively, each of the oxide 230a, the oxide 230b, and the oxide 230c may be formed as may have a laminated structure.

[0045] Conductors 242 (conductors 242a and 242b) are provided on the oxide 230b. The film thickness of the conductor 242 is, for example, 1 nm or more and 50 nm or less, preferably 2 nm or less. It should be 25nm or more.

[0046] The conductor 260 is a first gate (also called a top gate) electrode of the transistor 200. The conductor 242a and the conductor 242b function as the It functions as a source electrode or a drain electrode.

[0047] Enlarged views of the area enclosed by the dashed line in Figure 1(B) are shown in Figures 2(A) and 2(B). As shown in FIGS. 2A and 2B, the oxide 230 is A region 234 functioning as a channel forming region and a region 235 functioning as a source region or a drain region are provided. and a region 231 (region 231a and region 231b) that can perform the function.

[0048] In addition, in FIG. 2(A) and FIG. 2(B), the region 231 and the region 234 are oxide 2. 30b, but is not limited to this. For example, 31, or region 234 may be formed in oxide 230a and oxide 230b. , oxide 230b and oxide 230c may be formed, or oxide 230a, oxide 230b, and oxide 230c.

[0049] In addition, in FIG. 2(A) and FIG. 2(B), the boundary between the region 231 and the region 234 is formed by an oxide Although the drawing is shown to be approximately perpendicular to the upper surface of 230b, this embodiment is not limited to this. For example, the region 234 does not progress toward the conductor 240 near the surface of the oxide 230b. However, the oxide 230b may have a narrowed shape near the bottom surface thereof.

[0050] The transistor 200 has a channel forming region in an oxide 230, which functions as a semiconductor. It is preferable to use a metal oxide (hereinafter also referred to as an oxide semiconductor) that has a high conductivity. By using the material in the channel formation region of a transistor, a transistor with high field effect mobility can be produced. Furthermore, a highly reliable transistor can be realized.

[0051] The metal oxide preferably has a band gap of 2.0 eV or more. It is more preferable that the band gap is 0.5 eV or more. By using the transistor 30, the off-state current of the transistor can be reduced. By using a transistor, a semiconductor device with low power consumption can be provided.

[0052] The transistor 200 having an oxide semiconductor in a channel formation region has a Since the leakage current is extremely small, a semiconductor device with low power consumption can be provided. Conductors can be deposited using methods such as sputtering, making them ideal for constructing highly integrated semiconductor devices. The transistor 200 can be used.

[0053] For example, the oxide 230 may be a compound having indium (In), element M, and zinc (Zn). In-M-Zn oxide (element M is aluminum, gallium, yttrium, tin, copper, Vanadium, beryllium, boron, titanium, iron, nickel, germanium, zirconium , molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, It is preferable to use a metal oxide such as one or more selected from the group consisting of magnesium, etc. In addition, the element M may be aluminum, gallium, yttrium, or tin. As the oxide 230, In-M oxide, In-Zn oxide, or M-Zn oxide is used. It's fine.

[0054] It is preferable to use a metal oxide with a low carrier density for the transistor. When lowering the carrier density of a material, the impurity concentration in the metal oxide is lowered, and defects are reduced. In this specification and the like, the low impurity concentration and the low defect level density are The term "high purity intrinsic" or "substantially high purity intrinsic" refers to the fact that the impurities in the metal oxide are For example, hydrogen, nitrogen, alkali metals, alkaline earth metals, iron, nickel, silicon, etc. There is.

[0055] In particular, hydrogen contained in metal oxides reacts with oxygen that bonds with metal atoms to form water. In this case, oxygen vacancies may be formed in the metal oxide. If an element defect is included, the transistor may have normally-on characteristics. The defect where hydrogen has entered the oxygen vacancy acts as a donor, generating electrons as carriers. In addition, some of the hydrogen atoms may bond with oxygen atoms that bond with metal atoms, forming electron carriers. Therefore, transistors using metal oxides containing a large amount of hydrogen The starter tends to have normally-on characteristics.

[0056] Therefore, when a metal oxide is used for the oxide 230, the hydrogen in the metal oxide should be as low as possible. Specifically, in the case of metal oxides, secondary ion mass spectrometry (SIMS: Secondary Ion Mass Spectrometry) The resulting hydrogen concentration is 1×10 20 atoms / cm 3 Less than 1 x 10 19 atoms / cm 3 less than 5 × 10 18 atoms / cm 3 Less than, more Preferably 1 x 10 18 atoms / cm 3 Less than 100%. Impurities such as hydrogen are sufficiently reduced. By using this metal oxide in the channel formation region of a transistor, stable electrical characteristics can be achieved. can be granted.

[0057] In addition, when a metal oxide is used for the oxide 230, the conductor 242 (the conductor 242a, and When the oxide 230 comes into contact with the conductor 242b, the oxygen in the oxide 230 is transferred to the conductor 242. The conductor 242 may be oxidized by the oxidation of the conductor 242. It is highly likely that the conductivity of the conductor 242 will decrease. The diffusion of the conductor 242 into the oxide 230 can be rephrased as the absorption of oxygen in the oxide 230 by the conductor 242. This can be done.

[0058] Also, as shown in FIG. 2(B), oxygen in the oxide 230 is converted into the conductor 242 (conductor 242 a, and conductor 242b) to form oxide 230b and conductor 242a. Layer 236a is formed between conductor 242b and oxide 230b. Layer 236b may form between the silicon dioxide layer 230c and oxide 230b.

[0059] The layer 236 (layer 236a and layer 236b) contains more oxygen than the conductor 242. Therefore, it is assumed that the layer 236 has insulating properties. The three-layer structure with the oxide 230b or the oxide 230c is a three-layer structure consisting of a metal, an insulator, and a semiconductor. It can be considered as a layered structure, and is called MIS (Metal-Insulator-Semiconductor). This is sometimes called a ductor structure.

[0060] Here, T1 shown in FIG. 2B is the region sandwiched between the oxide 230b and the conductor 242a. the thickness of the layer 236a in the region sandwiched between the oxide 230b and the conductor 242b. For example, T1 is the thickness of the layer 236a (layer 236b) and the oxide 230b. The position of the interface, the lower surface of the conductor 242a (conductor 242b) and the layer 236a (layer 236b) 2B is the difference between the oxide 230c and the conductor 2. 42a, and the oxide 230c and the conductor 242b. For example, T2 is the thickness of the layer 236a (layer 236b) The position of the interface between the conductor 242a (conductor 242b) and the oxide 230c, and the side of the conductor 242a (conductor 242b) and the layer 2 36a (layer 236b) and the position of the interface with the layer 236a.

[0061] Note that the values ​​of T1 and T2 may differ. For example, oxide 230b and oxide 23 When the composition of 0c is different, the ease of oxygen diffusion into the conductor 242 varies, and the T1 In addition, the oxide 230b and the oxide 230c may have the same composition. Even if the process for forming the oxide 230b is different from the process for forming the oxide 230c, Therefore, the values ​​of T1 and T2 may differ.

[0062] The thickness of the layer 236 was measured by observing the cross-sectional shape of the layer 236 and its surroundings using a transmission electron microscope (T EM: Transmission Electron Microscope) It may be possible to measure it by observing it.

[0063] The thickness of the layer 236 is determined by the energy dispersive X-ray component for the layer 236 and its surroundings. Optical method (EDX:Energy Dispersive X-ray spectrosc) It may be possible to calculate this by performing a line analysis of the composition using a fluoroscopy.

[0064] To calculate T1, first, the direction perpendicular to the substrate surface is taken as the depth direction, and then the thickness of layer 2 is taken as the thickness of layer 2. EDX line analysis is performed on 36 and its surroundings. In the profile of the quantitative values ​​of each element in the thickness direction, the layer 236a (layer 236b) and the acid The depth (position) of the interface with the oxide 230b is determined by the thickness of the oxide 230b, which is the main component of the oxide 230b and is a conductor. This is considered to be the depth at which the quantitative value of the metal that is not the main component of 242a (conductor 242b) becomes half its value. In addition, the interface between the lower surface of the conductor 242a (conductor 242b) and the layer 236a (layer 236b) The depth (position) is regarded as the depth at which the quantitative value of oxygen in the oxide 230b becomes half its value. , T1 can be calculated.

[0065] In addition, as a method of calculating T2, first, the channel length direction is set as the depth direction, and Next, EDX line analysis is performed on the area and its surroundings. In the profile of the quantitative values ​​of each element with respect to the direction, the layer 236a (layer 236b) and the oxide The depth (position) of the interface with the oxide 230c is determined by the thickness of the oxide 230c, which is the main component of the oxide 230c and is the conductor 24 It is considered to be the depth at which the quantitative value of the metal that is not the main component of 2a (conductor 242b) becomes half its value. , the depth of the interface between the side surface of the conductor 242a (conductor 242b) and the layer 236a (layer 236b) (position) is regarded as the depth at which the quantitative value of oxygen in the oxide 230c becomes half its value. 2 can be calculated.

[0066] In FIG. 2B, the layer 236 is a layer between the conductor 242 and the region 231 of the oxide 230b. 242 and oxide 230c. For example, but not limited to, layer 236 may include conductor 242 and region 231 of oxide 230b. The oxide 230c may be formed only between the conductor 242 and the oxide 230c. There are cases where this happens.

[0067] Also, as shown in FIG. 2B, the oxide layer 236a and the oxide layer 230b are interposed between the oxide layer 236a and the oxide layer 230b. Region 238a is formed near the surface of layer 230b between layer 236b and oxide 230b, and In some cases, a region 238b may be formed near the surface of the oxide 230b. 238a, and region 238b) are oxygen-deficient regions of oxide 230b, In this case, the region 238 contains impurities ( Hydrogen, etc.) acts as a donor, increasing the carrier density and forming a low-resistance region in part. This may be the case.

[0068] The area 231a and the area 231b are the areas 238a and 238b, respectively. Therefore, the region 231 has a high carrier density and low resistance. The region 234 has a lower carrier density than the region 231. .

[0069] When the conductor 242 is formed using a conductive material that is easily oxidized, the insulating layer 2 The thickness of the oxide 230 is increased, and the movement of carriers between the conductor 242 and the oxide 230 is suppressed. In addition, the conductor 242 removes oxygen from the oxide 230, and the layer 2 36 is formed, the thicker the layer 236, the larger the area 238. This can cause variations in the electrical characteristics of transistors and a decrease in transistor reliability. On the other hand, when the conductor 242 is formed using a conductive material that is difficult to oxidize, In this case, the layer 236 is formed thinly, so that the conductor 242 and the oxide 230 do not come into contact with each other. Therefore, the interface between the conductor 242 and the oxide 230 is prevented from being deteriorated by the heat treatment. In other words, there is no need to control the formation or thickness of layer 236. be.

[0070] Therefore, the conductor 242 (the conductor 242a and the conductor 242b) is formed in the oxide 230. The hydrogen in the oxide 230 easily diffuses into the conductor 242, and the oxygen in the oxide 230 easily diffuses into the conductor 242. It is preferable that the oxide is made of a conductive material having the property of being difficult to disperse. The hydrogen in the oxide 230 diffuses into the conductor 242, reducing the hydrogen concentration in the oxide 230. This can provide stable electrical characteristics to the transistor 200. The hydrogen in the oxide easily diffuses into the conductor, and the conductor easily diffuses the hydrogen in the oxide. It is sometimes expressed as being easy to extract (easily absorbed). The conductor is resistant to oxidation, and the conductor is resistant to oxidation. , etc.

[0071] The conductive material includes, for example, tantalum (Ta), titanium (Ti), etc. In particular, it is preferable to use a conductor containing tantalum for the conductor 242. The tantalum-containing conductor may contain nitrogen or oxygen. The conductor has a composition formula of TaNxOy (x is a real number greater than 0 and less than or equal to 1.67, and It is preferable that y is a real number of 0 or more and 1.0 or less. Tantalum, tantalum oxide, tantalum nitride, tantalum oxynitride, tantalum oxynitride, etc. Therefore, in this specification and the like, a conductor containing tantalum may be expressed as TaNxOy. do.

[0072] In TaNxOy, the ratio of tantalum is preferably high. The lower the ratio, the better. In other words, the smaller the values ​​of x and y, the better. By increasing the ratio of TaNxOy, the resistivity of TaNxOy decreases, making the TaNxOy a conductor. The transistor 200 used in 242 can have good electrical characteristics.

[0073] In addition, in TaNxOy, a higher nitrogen ratio is preferable. In other words, the value of x is By using TaNxOy with a high nitrogen ratio for the conductor 242, The oxidation of the conductor 242 can be suppressed. The thickness of the layer 236 formed can be reduced.

[0074] TaNxOy is a conductive material in which hydrogen easily diffuses and oxygen does not easily diffuse. Therefore, TaNxOy is suitable for the conductor 242. In the heat treatment in the process after the formation of the conductive film 42, hydrogen in the oxide 230 becomes a conductor. 242, reducing the hydrogen concentration in the oxide 230. 42 and the oxide 230, or the thickness of the layer 236 In addition, even if a heat treatment is performed, oxygen is not released from the oxide 230b. Since the transistor 200 can be manufactured at high temperatures, it can be easily pulled out. It becomes stable against the so-called thermal budget.

[0075] It should be noted that the hydrogen that has diffused into the conductor 242 may remain in the conductor 242. In this case, hydrogen in the oxide 230 may be absorbed by the conductor 242. The hydrogen passes through the conductor 242 and reaches the structure or the trap provided around the conductor 242. The electric field may be released to the outside of the transistor 200 .

[0076] If the layer 236 is not formed between the conductor 242 and the oxide 230, the In the region 101, the hydrogen in the oxide 230 contacts the conductor 242 of the oxide 230. The hydrogen concentration in the region 231 is reduced by diffusion from the region 231 to the conductor 242. As the hydrogen concentration in region 231 is reduced, hydrogen in region 234 diffuses into region 231 . Therefore, the hydrogen concentration in the region 234 can be reduced.

[0077] In the region 102 shown in FIG. 2A, the hydrogen in the region 234 forms the oxide 230c. The hydrogen may diffuse into the conductor 242 through the region 234. It can be reduced.

[0078] In addition, the conductor 242 has a property that hydrogen in the oxide 230 easily diffuses into the conductor 242. The conductive material is formed of a conductive material, and a layer 236 is formed between the conductor 242 and the oxide 230. It is preferable that the conductive material be TaNxOy, for example.

[0079] By using TaNxOy for the conductor 242, the layer 236 can be formed with a thin film thickness. Specifically, the thickness of the layer 236 is set to 0.1 nm or more and 4 nm or less, preferably 0.5 nm or less. The thickness of the oxide layer 230 can be set to 100 nm or more and 3 nm or less. The hydrogen atoms diffuse into the conductor 242 via the hydrogen atoms, thereby reducing the hydrogen concentration in the region 234 .

[0080] Furthermore, since the layer 236 contains tantalum and oxygen, it may have insulating properties. When this occurs, the conductor 242, the layer 236, and the oxide 230 form an MIS structure. By adopting such a configuration, the conductor 242 and the oxide 230 do not come into contact with each other, and the conductor 242 and the oxide The interface between the layer 230 and the layer 23 can be prevented from being deteriorated by the heat treatment. Since the film thickness of the oxide 230 is thin, the current flows easily between the conductor 242 and the oxide 230. This improves the reliability of the transistor.

[0081] In addition, when the hydrogen permeability of the layer 236 is low, for example, in the region 103 shown in FIG. The hydrogen in the region 234 is then transferred to the oxide 230c and the insulator 254, or to the oxide 230c. , insulator 280 and insulator 254 , and into conductor 242 . That is, the conductive material constituting the conductor 242 has the property of extracting hydrogen from the oxide 230. The conductive body 242 may have a structure including at least one of the structures provided around the conductive body 242. It is preferable that the hydrogen concentration in the region 234 can be reduced by the above physical property. There is.

[0082] Moreover, the region 238 shown in FIG. 2(B) is in an oxygen-deficient state and is a region containing many oxygen vacancies. In the oxide 230 having a metal oxide, the hydrogen in the oxygen vacancy is bonded to an oxygen atom. It tends to be more difficult to diffuse than hydrogen that is bonded to or exists between lattices. Region 231, which has region 238, has more hydrogen that is less likely to diffuse than region 234. That is, compared to the hydrogen in the region 231, the hydrogen in the region 234 is more likely to diffuse into the conductor 242. Therefore, the hydrogen concentration in the region 234 may be lower than the hydrogen concentration in the region 231. do.

[0083] In addition, the hydrogen concentration of the oxide 230 is reduced, and a layer is formed between the conductor 242 and the oxide 230. To prevent the formation of the oxide 230, the conductor 242 is formed to prevent the hydrogen in the oxide 230 from diffusing into the conductor 242. The conductive material has a dissipative property, and the conductive material 242 and the oxide 230 are It is preferable to provide a layer having a function of suppressing oxidation of the conductor 242 between the conductive layer 242 and the conductive layer 242. By providing the oxide 230, the conductor 242 and the oxide 230 are not in contact with each other. However, the absorption of oxygen by the oxide 230 can be suppressed.

[0084] For example, as shown in FIGS. 3A to 3C, the transistor 200 includes a conductor 24 2 (conductor 242a and conductor 242b) and oxide 230, and oxygen permeation is prevented. The oxide 243 (oxide 243a and oxide 243b) having the function of suppressing the The conductor 242 and the oxide 243 functioning as the source electrode and the drain electrode are preferably configured as follows. By disposing an oxide 243 having a function of suppressing oxygen permeation between the conductive layer 30b and the conductive layer 30b, The electrical resistance between the body 242 and the oxide 230b can be reduced. This improves the electrical characteristics and reliability of the transistor 200. It can be done.

[0085] The oxide 243 may be a metal oxide containing the element M. In particular, the element M may be an aluminum oxide. Aluminum, gallium, yttrium, or tin can be used. It is preferable that the concentration of element M is higher than that of oxide 230b. Gallium may also be used. In addition, the oxide 243 may be a metal oxide such as In-M-Zn oxide. Specifically, in the metal oxide used for the oxide 243, The atomic ratio of the element M to In in the metal oxide used for the oxide 230b is The atomic ratio of the oxide 243 is preferably larger than that of the element M. The thickness of the oxide 243 is preferably 0.5 nm or more. Preferably, it is 5 nm or less, more preferably 1 nm or more and 3 nm or less, and even more preferably 1 nm or more. The oxide 243 preferably has a crystallinity. When 43 has crystallinity, it can suitably suppress the release of oxygen in the oxide 230. For example, if the crystal structure of the oxide 243 is hexagonal, the release of oxygen from the oxide 230 may be able to suppress it.

[0086] By adopting these configurations, the hydrogen concentration of the oxide 230 can be reduced. This allows the transistor 200 to have good electrical characteristics and reliability.

[0087] As a result, a semiconductor device with good reliability can be provided. Furthermore, it is possible to provide a semiconductor device that can be miniaturized or highly integrated. Furthermore, a semiconductor device with low power consumption can be provided. .

[0088] <Detailed configuration of semiconductor device> The following describes in detail the configuration of a semiconductor device including a transistor 200 according to one embodiment of the present invention. This article explains:

[0089] The insulator 214 prevents impurities such as water and hydrogen from diffusing into the transistor 200 from the substrate side. Therefore, the insulator 214 preferably functions as an insulating barrier film that suppresses the are hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, and nitrogen oxide molecules (NO, NO, The use of insulating materials that have the function of suppressing the diffusion of impurities such as NO2 and copper atoms Alternatively, the diffusion of oxygen (for example, at least one of oxygen atoms, oxygen molecules, etc.) It is preferable to use an insulating material that has the function of suppressing the above.

[0090] In this specification, the function of suppressing the diffusion of impurities or oxygen means the function of suppressing the diffusion of the impurities or oxygen. The function is to suppress the diffusion of either or all of the above oxygen and hydrogen. A membrane that has the function of suppressing the diffusion of hydrogen or oxygen is called a membrane that is difficult for hydrogen or oxygen to permeate, or a membrane that is difficult for hydrogen or oxygen to permeate. a membrane with low hydrogen or oxygen permeability, a membrane with barrier properties against hydrogen or oxygen, a membrane with barrier properties against hydrogen or oxygen In addition, if the barrier film has conductivity, the The barrier film may be called a conductive barrier film.

[0091] For example, the insulator 214 is preferably made of aluminum oxide, silicon nitride, or the like. This allows impurities such as water and hydrogen to pass through the insulator 214 from the substrate side to the transistor. It is possible to suppress the diffusion of the silicon dioxide particles to the insulator 224. It is possible to suppress the diffusion of oxygen from the insulator 214 to the substrate side. 14 may have a laminated structure of two or more layers. In that case, the laminated structure is made of the same material. However, the present invention is not limited to this, and a laminated structure made of different materials may be used. For example, a laminated structure made of aluminum oxide and nitride It may also be laminated with silicon.

[0092] Also, for example, the insulator 214 is a silicon nitride film formed by sputtering. It is preferable to use a hydrogen atom, which can reduce the hydrogen concentration in the insulator 214. Impurities such as water and hydrogen diffuse from the substrate side to the transistor 200 side through the insulator 214. This can further suppress the occurrence of

[0093] The insulator 216, which functions as an interlayer film, preferably has a lower dielectric constant than the insulator 214. By using a material with a low dielectric constant as the interlayer film, it is possible to reduce the parasitic capacitance that occurs between wiring. For example, the insulator 216 can be silicon oxide, silicon oxynitride, or silicon nitride oxide. silicon nitride, silicon oxide with fluorine, silicon oxide with carbon, Silicon oxide doped with hydrogen and nitrogen, silicon oxide having vacancies, etc. may be used appropriately. stomach.

[0094] The insulator 216 has a low hydrogen concentration and an excess of oxygen compared to the stoichiometric composition. region (hereinafter referred to as excess oxygen region) or oxygen released by heating (hereinafter referred to as excess oxygen For example, the insulator 216 is preferably formed by sputtering. It is preferable to use silicon oxide formed using the method described above. It is possible to suppress the inclusion of hydrogen, and also to supply oxygen to the oxide 230, Therefore, the fluctuation of the electrical properties is suppressed and the properties are stable. It is possible to provide a transistor having excellent electrical characteristics and improved reliability. .

[0095] The insulator 216 may have a laminated structure. In any case, an insulator similar to the insulator 214 is provided at the portion in contact with the side surface of the conductor 205. With this configuration, the oxygen contained in the insulator 216 can The conductor 205 can prevent the insulator 216 from being oxidized. It is possible to suppress a decrease in the amount of oxygen contained in the

[0096] The conductor 205 may function as a second gate (also called a bottom gate) electrode. In this case, the potential applied to the conductor 205 is linked to the potential applied to the conductor 260. By changing the threshold voltage (Vth) of the transistor 200 independently, the In particular, applying a negative potential to the conductor 205 can control the transistor. It is possible to increase the Vth of the capacitor 200 and reduce the off-state current. Applying a negative potential to the conductor 205 increases the potential applied to the conductor 260 compared to not applying a negative potential. This can reduce the drain current when the applied potential is 0V.

[0097] The conductor 205 is disposed so as to overlap the oxide 230 and the conductor 260. The conductor 205 is preferably embedded in the insulator 214 or the insulator 216. stomach.

[0098] As shown in FIG. 1B, the conductor 205 is formed by forming a channel in the oxide 230. In particular, as shown in FIG. 1C, the conductor 205 is The oxide 230 extends in the region outside the end portion intersecting with the channel width direction. That is, it is preferable that the conductive layer is formed on the outer side of the side surface of the oxide 230 in the channel width direction. It is preferable that the conductor 205 and the conductor 260 overlap with each other via an insulator. By having this structure, the electric field of the conductor 260 that functions as the first gate electrode and the electric field of the second gate electrode The electric field of the conductor 205, which functions as a gate electrode, causes the channel forming region of the oxide 230 to It can be electrically surrounded.

[0099] As shown in FIG. 1C, the conductor 205 is extended to function as a wiring. However, the present invention is not limited to this, and a conductive material that functions as a wiring may be provided under the conductive material 205. In addition, the conductor 205 does not necessarily have to be provided for each transistor. For example, the conductor 205 may be shared by multiple transistors. Good too.

[0100] In the transistor 200, the first conductor of the conductor 205 and the second conductor of the conductor 205 Although a structure in which a conductor is stacked is shown, one embodiment of the present invention is not limited to this. For example, the conductor 205 may be provided as a single layer or a laminated structure of three or more layers. When the structure has a laminated structure, it may be distinguished by assigning an ordinal number to the order of formation. do.

[0101] Here, the first conductor of the conductor 205 is a hydrogen atom, a hydrogen molecule, a water molecule, a nitrogen atom ... Suppresses the diffusion of impurities such as elementary molecules, nitrogen oxide molecules (N2O, NO, NO2, etc.), and copper atoms It is preferable to use a conductive material that has the function of absorbing oxygen (e.g., oxygen atoms). A conductive material having a function of suppressing the diffusion of at least one of oxygen molecules, etc. is preferred.

[0102] The first conductor of the conductor 205 is made of a conductive material having a function of suppressing the diffusion of oxygen. This prevents the second conductor of the conductor 205 from being oxidized and the conductivity from decreasing. As a conductive material having a function of suppressing the diffusion of oxygen, for example, tantalum It is preferable to use tantalum nitride, ruthenium, ruthenium oxide, etc. The first conductor of the conductor 205 may be a single layer or a multilayer of the above-mentioned conductive material. For example, the first conductor of the conductor 205 may be tantalum, tantalum nitride, ruthenium, or oxide. Ruthenium may be laminated with titanium or titanium nitride.

[0103] The second conductor of the conductor 205 is mainly composed of tungsten, copper, or aluminum. It is preferable to use a conductive material having a single layer of the second conductor of the conductor 205. However, it may have a laminated structure, for example, titanium or titanium nitride and the conductive It may also be laminated with other materials.

[0104] Insulator 222 and insulator 224 function as gate insulators.

[0105] The insulator 222 suppresses the diffusion of hydrogen (e.g., at least one of hydrogen atoms, hydrogen molecules, etc.). It is preferable that the insulator 222 has a function of inhibiting oxygen (for example, oxygen atoms, It is preferable that the material has a function of suppressing the diffusion of at least one of oxygen molecules, etc. For example, Insulator 222 inhibits the diffusion of hydrogen and / or oxygen more than insulator 224. It is preferable that the function be

[0106] The insulator 222 is made of one or both of aluminum and hafnium, which are insulating materials. It is preferable to use an insulator containing an oxide. Examples of the insulator include aluminum oxide and hafnium oxide. oxides containing sulphur, aluminium and hafnium (hafnium aluminate) When the insulator 222 is formed using such a material, 2 is the release of oxygen from the oxide 230 to the substrate side and the removal of oxide from the periphery of the transistor 200. The insulator 222 functions as a layer that suppresses the diffusion of impurities such as hydrogen into the insulator 230. By providing the insulating layer, impurities such as hydrogen are prevented from diffusing into the inside of the transistor 200. This can suppress the generation of oxygen vacancies in the oxide 230. This can prevent the insulator 224 and the oxide 230 from reacting with oxygen.

[0107] Alternatively, the insulator may be, for example, aluminum oxide, bismuth oxide, or germanium oxide. , niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide, oxide Zirconium may be added, or these insulators may be nitrided. The insulator 222 may be silicon oxide, silicon oxynitride, or silicon nitride. may be used in a laminated form.

[0108] The insulator 222 may be made of, for example, aluminum oxide, hafnium oxide, tantalum oxide, Zirconium oxide, lead zirconate titanate (PZT), strontium titanate (SrT Insulators including so-called high-k materials such as (Ba,Sr)TiO3 and (Ba,Sr)TiO3 (BST) The insulating layer may be a single layer or a multilayer. However, thinning the gate insulator may cause problems such as leakage current. By using a high-k material as an insulator that functions as a body, the thickness of the This makes it possible to reduce the gate potential during transistor operation.

[0109] The insulator 224 in contact with the oxide 230 preferably desorbs oxygen when heated. For example, the insulator 224 may be made of silicon oxide, silicon oxynitride, or the like. By providing an insulator containing the compound in contact with the oxide 230, oxygen vacancies in the oxide 230 can be reduced. This reduces the resistance and improves the reliability of the transistor 200.

[0110] Specifically, the insulator 224 is made of an oxide material from which part of the oxygen is released by heating. The oxide film that releases oxygen when heated is called a TDS (Thermal Distribution System). The desorption spectroscopy analysis showed that the amount of desorption of oxygen molecules was 1.0 x10 18 molecules / cm 3 or more, preferably 1.0 × 10 19 molecu les / cm 3 More preferably, 2.0 × 10 19 molecules / cm 3 Below Above, or 3.0 x 10 20 molecules / cm 3 The oxide film is as above. The surface temperature of the film during the TDS analysis is 100°C or higher and 700°C or lower, or 100°C The temperature is preferably in the range of 400°C or more and 400°C or less.

[0111] The insulator 224 may also have a low hydrogen concentration and an excess oxygen region or excess oxygen. It may be preferably provided using the same material as the insulator 216, for example.

[0112] The insulator 222 and the insulator 224 may have a laminated structure of two or more layers. In this case, it is not limited to a laminated structure made of the same material, but may be a laminated structure made of different materials. good.

[0113] The oxide 230 preferably has a layered structure made up of oxides with different chemical compositions. Specifically, in the metal oxide used for the oxide 230a, the metal element that is the main component The atomic ratio of the element M to be used in the oxide 230b is the same as that of the metal oxide that is the main component. It is preferable that the atomic ratio of the element M to the element is larger than that of the element M. In the metal oxide used in the oxide 230b, the atomic ratio of element M to In is In the metal oxide, the atomic ratio of element M to In is preferably larger than that of element M. In the metal oxide used for the oxide 230b, the atomic ratio of In to the element M is In the metal oxide used in 30a, the atomic ratio of In to element M is preferably larger than that of In. In addition, the oxide 230c can be used for the oxide 230a or the oxide 230b. Any metal oxide that can be used can be used.

[0114] Moreover, it is preferable that the oxide 230b and the oxide 230c have crystallinity. For example, the c-axis aligned crystalline lattice (CAAC-OS) It is preferable to use CAAC-OS Crystalline oxides such as these have few impurities and defects (oxygen vacancies, etc.) and are highly crystalline. Therefore, the oxide 23 formed by the source electrode or the drain electrode This prevents oxygen from being extracted from the 0b. Since oxygen extraction from the oxide 230b can be reduced, the transistor 200 can be manufactured It is stable against high temperatures (so-called thermal budget) in the manufacturing process.

[0115] It is also preferable to use CAAC-OS as the oxide 230c. The c-axis of the crystal of the oxide 230c is oriented in a direction substantially perpendicular to the surface on which the oxide 230c is formed or the upper surface of the oxide 230c. It is preferable that the CAAC-OS has a property that oxygen easily migrates in the direction perpendicular to the c-axis. Therefore, the oxygen contained in the oxide 230c is efficiently supplied to the oxide 230b. It is possible.

[0116] The conduction band minimums of the oxides 230a and 230c are greater than the conduction band minimum of the oxide 230b. It is preferable that the oxide 230a and the oxide 230b are closer to the vacuum level than the lower end. The electron affinity of oxide 30c is preferably smaller than the electron affinity of oxide 230b. In this case, the oxide 230c may be made of a metal oxide that can be used for the oxide 230a. In this case, the main path of the carriers is the oxide 230b.

[0117] Here, at the junctions of oxide 230a, oxide 230b, and oxide 230c, In other words, the oxide 230a, the oxide 230b, and the The conduction band edge at the junction of the oxide 230c and the silicon dioxide 230c changes continuously or is called a continuous junction. In order to achieve this, the interface between the oxide 230a and the oxide 230b , and the defect level density of the mixed layer formed at the interface between the oxide 230b and the oxide 230c is It is better to lower it.

[0118] Specifically, oxide 230a and oxide 230b, and oxide 230b and oxide 230c, By having a common element other than oxygen as the main component, a mixed layer with a low defect level density is formed. For example, when the oxide 230b is an In-Ga-Zn oxide, the oxide 23 0a and oxide 230c, such as In-Ga-Zn oxide, Ga-Zn oxide, and gallium oxide. Sodium may also be used.

[0119] Specifically, the oxide 230a is composed of In:Ga:Zn=1:3:4 [atomic ratio], Alternatively, a metal oxide having an atomic ratio of 1:1:0.5 may be used. The atomic ratio is In:Ga:Zn=1:1:1, or In:Ga:Zn=4:2: 3 [atomic ratio] metal oxide may be used. :Zn=1:3:4[atomic ratio], In:Ga:Zn=4:2:3[atomic ratio], Ga: Using metal oxides with Zn=2:1 [atomic ratio] or Ga:Zn=2:5 [atomic ratio] That's fine.

[0120] When a metal oxide film is formed by sputtering, the above atomic ratio is The atomic ratio of the metal oxide is not limited to the atomic ratio of the sputtering target used for forming the metal oxide film. It may also be the atomic ratio of the dots.

[0121] By configuring the oxide 230a and the oxide 230c as described above, the oxide 230a and the oxide The defect density at the interface with oxide 230b and the interface between oxide 230b and oxide 230c Therefore, the influence of interface scattering on carrier conduction is reduced. This allows the transistor 200 to have high on-state current and high frequency characteristics.

[0122] The oxide 230c may have a laminated structure of two or more layers. 30c and an oxide 230 disposed on the first oxide 230c. and a second oxide of c.

[0123] The first oxide of oxide 230c constitutes the metal oxide used for oxide 230b. It is preferable that the metal oxide contains at least one of the metal elements, and it is more preferable that the metal oxide contains all of the metal elements. For example, an In-Ga-Zn oxide is used as the first oxide of the oxide 230c. , as the second oxide of the oxide 230c, In-Ga-Zn oxide, Ga-Zn oxide, Alternatively, gallium oxide may be used. This allows the first oxide 230b and the second oxide 230c to be separated. The defect level density at the interface with the oxide 230 can be reduced. The second oxide of oxide 230c inhibits oxygen diffusion or permeation more than the first oxide of oxide 230c. The first oxide of the insulator 250 and the oxide 230c is preferably a metal oxide. By providing the second oxide 230c between the insulator 280 and the oxide 230c, the oxygen contained in the insulator 280 Therefore, the oxygen can be prevented from diffusing into the insulator 250. The oxygen is easily supplied to the oxide 230b via the first oxide 30c.

[0124] In addition, the conduction band minimum of the second oxide 230a and the oxide 230c is It is preferable that the first oxide 30b and the oxide 230c are closer to the vacuum level than the bottom of the conduction band of the first oxide. In other words, the electrons of the second oxides 230a and 230c The affinity is less than the electron affinity of the first oxide of oxide 230b and oxide 230c. In this case, the second oxide of the oxide 230c is preferably the same as that used for the oxide 230a. The first oxide of the oxide 230c is a metal oxide that can be used for the oxide 230b. It is preferable to use a metal oxide that can be used as the main carrier path. In this case, not only the oxide 230b but also the first oxide 230c serves as the main path for carriers. This may occur.

[0125] Specifically, the first oxide of the oxide 230c is In:Ga:Zn=4:2:3[ The second oxide of oxide 230c is In:Ga:Z. n=1:3:4 [atomic ratio], Ga:Zn=2:1 [atomic ratio], or Ga:Zn= A metal oxide or gallium oxide with an atomic ratio of 2:5 can be used. Defect levels at the interface between the first oxide of oxide 230c and the second oxide of oxide 230c. The density can be reduced.

[0126] In addition, in the metal oxide used for the second oxide of the oxide 230c, the metal that is the main component In the metal oxide used for the first oxide of the oxide 230c, the atomic ratio of In to the element is In the case of the ferroelectric material, the atomic ratio of In to the metal element, which is the main component, is made smaller than that of the ferroelectric material, so that In becomes an insulating material. The insulator 250 can be used as a gate insulator. Therefore, if In gets mixed into the insulator 250, etc., it will cause the transistor characteristics to deteriorate. Therefore, by forming the oxide 230c into a laminated structure, a highly reliable semiconductor device can be provided. It becomes possible to do this.

[0127] It is preferable to use the above-mentioned TaNxOy as the conductor 242. y may contain aluminum. Also, for example, titanium nitride, titanium and aluminum Ruthenium nitride, ruthenium oxide, ruthenium nitride, oxide containing strontium and ruthenium It is also possible to use oxides containing lanthanum and nickel. These materials are resistant to oxidation. It is preferable because it is a material that is electrically conductive and maintains its conductivity even when it absorbs oxygen.

[0128] As shown in FIG. 1B, the insulator 254 is formed on the upper and side surfaces of the conductor 242a and the conductor The top and side surfaces of 242b, the side surfaces of oxide 230a, the side surfaces of oxide 230b, and the insulating It is preferable that the insulating member 224 contacts a part of the upper surface of the insulating member 224. 280 is formed by the insulator 254, the insulator 224, the oxide 230a and the oxide 230b. and are isolated.

[0129] In addition, the insulator 254, like the insulator 222, has a property of diffusing one or both of hydrogen and oxygen. For example, the insulator 254 has a function of suppressing the diffusion of the insulator 224. and has a function of suppressing the diffusion of one or both of hydrogen and oxygen more than the insulator 280. This allows the hydrogen contained in the insulator 280 to be absorbed into the oxide 230a and the oxide 230b. Furthermore, the insulator 222 and the insulating layer 230b can be prevented from diffusing into the insulating layer 230b. By surrounding the insulator 224, the oxide 230, etc. with the body 254, water, hydrogen, etc. Impurities can be prevented from diffusing from the outside into the insulator 224 and the oxide 230. Therefore, the transistor 200 can have good electrical characteristics and reliability. do.

[0130] The insulator 254 is preferably formed by sputtering. The insulating film of the insulator 224 is formed by sputtering in an atmosphere containing oxygen. Oxygen can be added to the area adjacent to the body 254. This allows oxygen to be released from the area. Oxygen can be supplied to the oxide 230 through the insulator 224. 54 has the function of suppressing the upward diffusion of oxygen, and oxygen is isolated from the oxide 230. The insulator 222 can prevent oxygen from diffusing downward. By having the function of suppressing diffusion, it is possible to prevent oxygen from diffusing from the oxide 230 to the substrate side. In this way, oxygen is supplied to the channel forming region of the oxide 230. This reduces the oxygen vacancy in the oxide 230 and prevents the transistor from becoming normally on. It can be controlled.

[0131] The insulator 254 may be, for example, an oxide of aluminum or hafnium or both. In this case, the insulator 254 is formed by atomic layer deposition (ALD). It is preferable to deposit the film using the Atomic Layer Deposition method. The ALD method is a film formation method with good coating properties, so unevenness of the insulator 254 does not cause any step or discontinuity. can be prevented from being formed.

[0132] The insulator 254 may be, for example, an insulator containing aluminum nitride. This allows the film to have excellent insulating properties and thermal conductivity, making it suitable for transistors. This can improve the heat dissipation performance of the heat generated when the actuator 200 is driven. Silicon nitride, silicon oxide, etc. may also be used.

[0133] Alternatively, the insulator 254 may be, for example, an oxide containing gallium. Oxides containing hydrogen and / or oxygen may have the function of suppressing diffusion. In addition, examples of oxides containing gallium include gallium oxide and gallium zinc oxide. Insulator 254 and indium gallium zinc oxide can be used. When using indium gallium zinc oxide, the atomic number of gallium relative to indium is The larger the atomic ratio, the higher the insulating properties of the oxide. It is possible.

[0134] The insulator 254 may have a multi-layer structure of two or more layers. In the case of forming a laminated structure, the lower layer and the upper layer of the insulator 254 are formed by the above method. The lower and upper layers of the insulator 254 may be formed by the same method. For example, the insulator 254 may be sputtered in an oxygen-containing atmosphere. The lower layer of the insulator 254 is deposited using a deposition method, and then the upper layer of the insulator 254 is deposited using an ALD method. The ALD method is a film formation method with good coating properties, so the unevenness of the first layer can This can prevent the formation of gaps and the like.

[0135] The above-mentioned materials can be used for the lower and upper layers of the insulator 254. The lower and upper layers of 4 may be made of the same material or different materials. silicon nitride, silicon oxynitride, silicon nitride oxide or silicon nitride, and an impurity such as hydrogen It may also have a laminated structure of a pure material and an insulator having a function of suppressing oxygen permeation. As an insulator having a function of suppressing the permeation of impurities such as hydrogen and oxygen, for example, Insulators containing oxides of aluminum and / or hafnium can be used. do.

[0136] The insulator 250 functions as a gate insulator. The insulator 250 is preferably made of silicon oxide, oxynitride, or the like. silicon dioxide, silicon nitride oxide, silicon nitride, silicon oxide with fluorine added, carbon Doped silicon oxide, carbon and nitrogen doped silicon oxide, silicon oxide with vacancies In particular, silicon oxide and silicon oxynitride are resistant to heat. It is preferred because it is stable.

[0137] The insulator 250 is made of an insulator that releases oxygen when heated, similar to the insulator 224. It is preferable to form the insulating material 250 as an insulating material from which oxygen is released by heating. By providing the oxide 230b in contact with at least a portion of the oxide 230c, the channel Effectively supplying oxygen to the formation region and reducing oxygen vacancies in the channel formation region of the oxide 230b Therefore, the fluctuation of the electrical characteristics is suppressed, and the electrical characteristics are stable. At the same time, it is possible to provide a transistor with improved reliability. As with the case of 4, it is preferable that the concentration of impurities such as water and hydrogen in the insulator 250 is reduced. The thickness of the insulator 250 is preferably 1 nm or more and 20 nm or less.

[0138] Furthermore, a metal oxide may be provided between the insulator 250 and the conductor 260. The material preferably suppresses the diffusion of oxygen from the insulator 250 to the conductor 260. By providing a metal oxide that suppresses diffusion, the diffusion of oxygen from the insulator 250 to the conductor 260 can be suppressed. In other words, the decrease in the amount of oxygen supplied to the oxide 230 can be suppressed. In addition, oxidation of the conductor 260 due to oxygen in the insulator 250 can be suppressed.

[0139] The metal oxide may function as a part of the gate insulator. Therefore, when silicon oxide or silicon oxynitride is used for the insulator 250, It is preferable to use a metal oxide, which is a high-k material with a high relative dielectric constant. By making the insulation layer of the insulation layer 250 and the metal oxide, it is possible to improve the thermal stability. Therefore, the physical properties of the gate insulator can be improved. It is possible to reduce the gate potential applied during transistor operation while maintaining the film thickness. In addition, it is possible to reduce the equivalent oxide thickness (EOT) of the insulator that functions as the gate insulator. do.

[0140] Specifically, hafnium, aluminum, gallium, yttrium, zirconium, selected from tungsten, titanium, tantalum, nickel, germanium, magnesium, etc. Metal oxides containing one or more of these metals can be used. It is preferable to use an insulator containing oxides of one or both of tungsten and hafnium.

[0141] The metal oxide may also function as a part of the first gate electrode. For example, an oxide semiconductor that can be used as the oxide 230 can be used as the metal oxide. In this case, the conductor 260 can be formed by sputtering. The electrical resistance of the metal oxide can be reduced to make it a conductor.

[0142] By including the metal oxide, the influence of the electric field from the conductor 260 is not weakened. This can improve the on-current of the transistor 200. The physical thickness of the metal oxide maintains the distance between the conductor 260 and the oxide 230. This makes it possible to suppress leakage current between the conductor 260 and the oxide 230. By providing a laminated structure of the insulator 250 and the metal oxide, the conductor 260 and the oxide the physical distance between the conductor 260 and the oxide 230, and the electric field strength from the conductor 260 to the oxide 230. can be easily adjusted appropriately.

[0143] The conductor 260 is made up of a conductor 260a and a conductor 260b disposed on the conductor 260a. For example, the conductor 260a has a bottom surface of the conductor 260b and a It is preferable that it is arranged so as to wrap around the side.

[0144] The conductor 260a is a hydrogen atom, a hydrogen molecule, a water molecule, a nitrogen atom, a nitrogen molecule, or a nitrogen oxide molecule. It is preferable to use a conductive material that has the function of suppressing the diffusion of impurities such as copper atoms. Alternatively, the function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms, oxygen molecules, etc.) It is preferable to use a conductive material having the function.

[0145] In addition, the conductor 260a has a function of suppressing the diffusion of oxygen, so that the insulator 250 The oxygen contained therein can prevent the conductor 260b from being oxidized and the conductivity from decreasing. Examples of conductive materials that have the function of suppressing oxygen diffusion include tantalum and nitride. It is preferable to use tantalum, ruthenium, ruthenium oxide, or the like.

[0146] In addition, since the conductor 260 also functions as wiring, a conductor with high conductivity should be used. For example, the conductor 260b is preferably made primarily of tungsten, copper, or aluminum. The conductor 260b may have a laminated structure. For example, a laminated structure of titanium, titanium nitride and the above conductive material may be used.

[0147] In FIGS. 1B and 1C, the conductor 260 is made up of a conductor 260a and a conductor 260b. Although the two-layer structure is shown, it may be a single-layer structure or a laminated structure of three or more layers. stomach.

[0148] In addition, in the transistor 200, the conductor 260 is formed on the insulator 280, etc. The conductor 260 is formed in a self-aligned manner so as to fill the opening. Thus, the conductor 260 is aligned in the region between the conductor 242a and the conductor 242b. It can be positioned reliably without any problems.

[0149] As shown in FIG. 1B, the upper surface of the conductor 260 is in contact with the upper surface of the insulator 250 and the oxide. The upper surface of the oxide 230c is approximately flush with the upper surface of the oxide 230c.

[0150] As shown in FIG. 1C, the conductive layer 201 is formed in the channel width direction of the transistor 200. The bottom surface of the region of the conductive material 260 where the conductive material 260 and the oxide 230b do not overlap is covered with the oxide 230. The conductor 260, which functions as a gate electrode, is preferably located at a position lower than the bottom surface of the insulator 2. The side and top surfaces of the channel forming region of the oxide 230b are covered via the insulating film 50. This makes it easier for the electric field of the conductor 260 to act on the entire channel formation region of the oxide 230b. Therefore, the on-state current of the transistor 200 is increased, and the frequency characteristics are improved. The oxide 230a and the oxide 23b are formed on the insulating layer 222. The height of the bottom surface of the conductor 260 in the region where the conductor 260 does not overlap with the oxide film 0b is If the difference between the height of the bottom surface of the object 230b and the height of the bottom surface of the object 230b is H1, H1 is 0 nm or more and 100 nm or less, Preferably, it is 3 nm or more and 50 nm or less, and more preferably, it is 5 nm or more and 20 nm or less. .

[0151] The insulator 280 is connected to the insulator 224, the oxide 230a, and the oxide 230b via the insulator 254. 0b and the conductor 242. The upper surface of the insulator 280 is planarized. It's fine.

[0152] The insulator 280 that functions as an interlayer film preferably has a low dielectric constant. By using the material as an interlayer film, the parasitic capacitance between wirings can be reduced. It is preferable that the insulating layer 0 is made of the same material as the insulating layer 216. Silicon and silicon oxynitride are preferred because they are thermally stable. Materials such as silicon oxynitride, silicon oxide with vacancies, etc., are subject to oxygen desorption upon heating. This is preferable because it is possible to easily form a region containing

[0153] It is preferable that the concentration of impurities such as water and hydrogen in the insulator 280 is reduced. The insulator 280 preferably has a low hydrogen concentration and an excess oxygen region or regions. For example, the insulator 280 may be made of the same material as the insulator 216. It may have a laminated structure of more than one layer.

[0154] The insulator 274, like the insulator 214, prevents impurities such as water and hydrogen from entering from above. It is preferable that the insulating barrier film functions as an insulating barrier film that suppresses diffusion into the body 280. The insulator 274, like the insulator 214, has a low hydrogen concentration and functions to suppress the diffusion of hydrogen. It is preferable that the compound has the ability to

[0155] As shown in FIG. 1B, the insulator 274 is made of the conductor 260, the insulator 250, and It is preferable that the insulator 281 contacts the upper surface of the oxide 230c. It is possible to prevent impurities such as hydrogen contained in the insulator 250 from being mixed into the insulator 250. Therefore, it is possible to suppress adverse effects on the electrical characteristics and reliability of the transistor. It is possible.

[0156] It is preferable to provide an insulator 281 that functions as an interlayer film on the insulator 274. The insulating body 281 preferably has a low dielectric constant, similar to the insulating body 216. 281, like the insulator 224, has a reduced concentration of impurities such as water and hydrogen in the film. It is preferable that

[0157] Also, the insulating material 281, the insulating material 274, the insulating material 280, and the insulating material 254 are formed. The conductor 240a and the conductor 240b are placed in the opening. 240b are provided facing each other with the conductor 260 in between. The height of the upper surface of 240b may be flush with the upper surface of the insulator 281.

[0158] The side walls of the openings of the insulators 281, 274, 280, and 254 An insulator 241a is provided in contact with the surface of the insulating layer 241a, and a conductor 240a is formed in contact with the side surface of the insulating layer 241a. A conductor 242a is located at least partially on the bottom of the opening, and a conductor 240 a contacts the conductor 242a. Similarly, the insulators 281, 274, 280, and An insulator 241b is provided in contact with the side wall of the opening of the insulator 254, and A conductor 240b is formed on at least a part of the bottom of the opening. is located, and conductor 240b contacts conductor 242b.

[0159] The conductors 240a and 240b are mainly made of tungsten, copper, or aluminum. It is preferable to use a conductive material containing the component.

[0160] The conductor 240a and the conductor 240b may have a laminated structure. In the star 200, the conductor 240a and the conductor 240b are provided as a two-layer laminated structure. However, the present invention is not limited to this configuration. The layer 0 may be provided as a single layer or as a laminated structure of three or more layers.

[0161] In addition, when the conductor 240a and the conductor 240b are formed into a laminated structure, the conductor 242 and The insulating members 254, 280, 274, and 281 are in contact with each other and are insulated from each other. The conductor in contact with the body 241 has a function of suppressing the permeation of impurities such as water and hydrogen. It is preferable to use a conductive material that has a high conductivity. For example, tantalum, tantalum nitride, titanium nitride, It is preferable to use titanium, ruthenium, ruthenium oxide, etc. Also, water, hydrogen, etc. The conductive material having the function of suppressing the permeation of impurities may be used in a single layer or a multilayer structure. By using this conductive material, oxygen added to the insulator 280 is transferred to the conductor 240a and It is possible to prevent the conductor 240b from absorbing the insulating material 281. Impurities such as water and hydrogen are transported to the oxide 2 through the conductors 240a and 240b. It can prevent the spread to 30.

[0162] Examples of the insulator 241a and the insulator 241b include the insulator 214 and the insulator 254. The insulators 241a and 241b may be made of an insulator that can be used for the following purposes: Since it is provided in contact with the insulator 254, impurities such as water and hydrogen contained in the insulator 280 can be prevented. The diffusion of substances into the oxide 230 through the conductors 240a and 240b is suppressed. In addition, oxygen contained in the insulator 280 can be absorbed by the conductor 240a and the conductor 240b. It can prevent being absorbed into 0b.

[0163] Although not shown, the conductive material 240a and the conductive material 240b are arranged in contact with each other on their upper surfaces. A conductor functioning as a wire may be disposed. The conductor functioning as a wiring may be made of tungsten. It is preferable to use a conductive material containing copper or aluminum as a main component. The conductor may have a laminated structure, for example, a layer of titanium, titanium nitride and the above conductive material. The conductor may be formed so as to be embedded in an opening provided in the insulator. You may do so.

[0164] Although not shown, a thin film having a resistivity of 1.0×10 13 Ωcm or more 1.0×10 15 Ωcm or less, preferably 5.0×10 13 Ωcm or more 5.0×10 14 It is preferable to provide an insulator having a resistivity of Ωcm or less on the conductor. By providing an insulator, the insulator can maintain insulation properties while The charge accumulated between the wiring of the conductor is dispersed, and the transistor and the transistor This is preferable because it can suppress the deterioration of characteristics and electrostatic breakdown of electronic devices having a transistor.

[0165] <Materials for semiconductor devices> The following describes constituent materials that can be used in semiconductor devices.

[0166] <<Substrate>> The substrate on which the transistor 200 is formed may be, for example, an insulating substrate, a semiconductor substrate, or A conductive substrate may be used. Examples of insulating substrates include glass substrates, quartz substrates, and silicon substrates. Fire substrate, stabilized zirconia substrate (yttria stabilized zirconia substrate, etc.), resin substrate The semiconductor substrate may be a semiconductor made of silicon or germanium. Conductor substrate, or silicon carbide, silicon germanium, gallium arsenide, indium phosphide Compound semiconductor substrates made of aluminum, zinc oxide, and gallium oxide are also available. A semiconductor substrate having an insulating region inside a conductive substrate, such as SOI (Silicon On Insulator) Conductive substrates include graphite substrates, metal substrates, and alloy substrates. There are gold substrates, conductive resin substrates, etc., or substrates with metal nitrides, metal oxides, etc. Furthermore, there are substrates in which a conductor or a semiconductor is provided on an insulating substrate. , a substrate in which a conductor or an insulator is provided on a semiconductor substrate, a substrate in which a semiconductor or an insulator is provided on a conductor substrate Alternatively, elements may be provided on these substrates. The elements provided on the substrate include a capacitance element, a resistance element, a switch element, a light emitting element, There are memory elements, etc.

[0167] <<Insulators>> Insulators include oxides, nitrides, oxynitrides, nitride oxides, and metal oxides that have insulating properties. These include metal oxide nitrides, metal oxynitrides, and metal oxynitrides.

[0168] For example, as transistors become smaller and more highly integrated, the gate insulator becomes thinner. This can cause problems such as leakage current. By using high-k materials, the voltage required for transistor operation can be reduced while maintaining the physical film thickness. On the other hand, it is possible to use a material with a low relative dielectric constant for the insulator that functions as the interlayer film. This reduces the parasitic capacitance between the wirings. Therefore, materials should be selected accordingly.

[0169] Insulators with high dielectric constants include gallium oxide, hafnium oxide, and zirconium oxide. oxides with aluminum, aluminum and hafnium, oxides with silicon and hafnium, oxides with silicon and hafnium, Examples include oxynitrides with hafnium, or nitrides with silicon and hafnium.

[0170] Insulators with low dielectric constants include silicon oxide, silicon oxynitride, and silicon nitride oxide. Silicon, silicon nitride, fluorine-doped silicon oxide, carbon-doped silicon oxide, Silicon oxide doped with carbon and nitrogen, silicon oxide with vacancies, or resin be.

[0171] In addition, a transistor using an oxide semiconductor can suppress the permeation of impurities such as hydrogen and oxygen. Insulators having a function of controlling the temperature (insulator 214, insulator 222, insulator 254, and insulator By surrounding the transistor with a metal layer (such as 274), the electrical characteristics of the transistor can be stabilized. Examples of insulators that have the function of suppressing the permeation of impurities such as hydrogen and oxygen include porosity. Uron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon, phosphorus, chlorine , argon, gallium, germanium, yttrium, zirconium, lanthanum, neodymium Insulators including titanium, hafnium, or tantalum may be used in single or multilayer configurations. Specifically, as an insulator that has the function of suppressing the permeation of impurities such as hydrogen and oxygen, Aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, yttria oxide ammonium, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, tantalum oxide Metal oxides such as aluminum nitride, silicon nitride oxide, silicon nitride, etc. Things can be used.

[0172] In addition, the insulator that functions as the gate insulator has a region containing oxygen that is desorbed by heating. For example, it is preferable that the insulating material has a region containing oxygen that is desorbed by heating. By forming a structure in which silicon oxide or silicon oxynitride is in contact with the oxide 230, the oxide The oxygen deficiency of 230 can be compensated for.

[0173] <<Conductors>> Conductors include aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, and titanium. Tantalum, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium Sium, Zirconium, Beryllium, Indium, Ruthenium, Iridium, Strontium Metal elements selected from ammonium, lanthanum, etc., or alloys containing the above-mentioned metal elements It is preferable to use an alloy or the like that combines the above-mentioned metal elements. For example, tantalum nitride titanium nitride, tungsten nitride, nitrides containing titanium and aluminum, tantalum and aluminum Aluminum nitrides, ruthenium oxide, ruthenium nitride, strontium and ruthenium Oxides containing lanthanum and oxides containing lanthanum and nickel are conductive materials that are resistant to oxidation, or It is a preferable material because it maintains conductivity even when it absorbs oxygen. Highly conductive semiconductors, such as polycrystalline silicon containing elements, nickel silicon Silicide such as side may also be used.

[0174] Alternatively, a plurality of conductive layers made of the above materials may be stacked. A laminated structure in which a material containing a metal element and a conductive material containing oxygen are combined may be used. In addition, a laminated layer that combines the material containing the metal element and the conductive material containing nitrogen is also available. In addition, a material containing the above-mentioned metal element, a conductive material containing oxygen, and a material containing nitrogen may be used. A laminated structure may be formed by combining a conductive material containing a silicon dioxide.

[0175] When an oxide is used for the channel formation region of a transistor, The conductor that functions as a conductive material is a material containing the above-mentioned metal element and a conductive material containing oxygen. In this case, it is preferable to use a laminated structure in which a conductive material containing oxygen is used. It is preferable to provide the conductive material containing oxygen on the channel forming region side. This makes it easier for oxygen released from the conductive material to be supplied to the channel formation region.

[0176] In particular, the metal oxide in which the channel is formed is used as a conductor that functions as a gate electrode. It is preferable to use a conductive material containing a metal element and oxygen. Conductive materials containing metal elements and nitrogen may also be used, such as titanium nitride and tantalum nitride. Alternatively, a conductive material containing nitrogen, such as indium tin oxide or tungsten oxide, may be used. Indium oxide containing tungsten, indium zinc oxide containing tungsten oxide, titanium oxide Indium oxide containing titanium dioxide, indium tin oxide, indium zinc oxide Indium tin oxide containing nitrogen may also be used. Mugallium zinc oxide may also be used. By using such a material, the channel is formed. In some cases, hydrogen contained in the metal oxides surrounding the outer insulating layer can be captured. It may be possible to capture hydrogen that is mixed in from the surroundings.

[0177] <<Metal oxides>> As the oxide 230, it is preferable to use a metal oxide that functions as an oxide semiconductor. Metal oxides applicable to the oxide 230 according to the present invention will be described below.

[0178] The metal oxide preferably contains at least indium or zinc. In addition to these, gallium, yttrium, and zinc are preferably contained. It is preferable that the alloy contains boron, titanium, iron, nickel, germanium, etc. nium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tungsten It contains one or more selected from the group consisting of thallium, tungsten, magnesium, etc. Good too.

[0179] Here, the metal oxide is an In-M-Zn oxide having indium, element M, and zinc. The element M can be aluminum, gallium, yttrium, or The element M is tin. Other elements that can be used for M include boron, titanium, iron, and nickel. Ru, Germanium, Zirconium, Molybdenum, Lanthanum, Cerium, Neodymium, Hafnium However, the element M is the same as the element M mentioned above. In some cases, a combination of multiple elements may be used.

[0180] In this specification, metal oxides containing nitrogen are also referred to as metal oxides (metal oxides). Metal oxides containing nitrogen are sometimes collectively called metal oxynitrides (metal oxynitrides). It may also be called tal oxynitride.

[0181] [Metal oxide structures] Oxide semiconductors (metal oxides) are classified into single-crystal oxide semiconductors and other non-single-crystal oxide semiconductors. Non-single-crystal oxide semiconductors are, for example, CAAC-OS, polycrystalline nc-OS (nanocrystalline oxide semiconductor) conductor), pseudo-amorphous oxide semiconductor (a-like OS) and amorphous oxide semiconductors There is the body.

[0182] CAAC-OS has a c-axis orientation and multiple nanocrystals are connected in the ab-plane direction. The crystal structure is distorted by the connection of multiple nanocrystals. In the region, the lattice arrangement is changed between a region with a uniform lattice arrangement and another region with a uniform lattice arrangement. This refers to the point where the direction of the

[0183] Nanocrystals are basically hexagonal, but are not limited to regular hexagonal shapes. They may also have non-regular hexagonal shapes. In addition, the distortion may have lattice arrangements such as pentagons and heptagons. In addition, in CAAC-OS, clear grain boundaries (grain bows) are not observed even near the strain. It is difficult to confirm the grain boundary shape due to the distortion of the lattice arrangement. This is because the CAAC-OS has an oxidized layer in the ab-plane direction. The arrangement of atomic atoms is not dense, and the bond distance between atoms changes when metal elements are substituted. This is because distortion can be tolerated by, for example,

[0184] In addition, the CAAC-OS has a layer containing indium and oxygen (hereinafter referred to as an In layer) and an elemental A layered crystal consisting of layers containing element M, zinc, and oxygen (hereinafter referred to as the (M,Zn) layer). It is noted that indium and element M tend to have a structure (also called a layered structure). When the element M in the (M,Zn) layer is replaced with indium, the (In,M,Zn) ) layer. Also, when indium in the In layer is replaced with element M, it can be expressed as (In, It can also be expressed as the M layer.

[0185] CAAC-OS is a highly crystalline metal oxide. Since it is difficult to identify grain boundaries, the decrease in electron mobility caused by grain boundaries is unlikely to occur. In addition, the crystallinity of metal oxides can be reduced by the incorporation of impurities or the generation of defects. Therefore, CAAC-OS is a metal oxide with few impurities and defects (such as oxygen vacancies). Therefore, the physical properties of metal oxides with CAAC-OS are stable. Therefore, metal oxides with CAAC-OS are heat-resistant and highly reliable.

[0186] nc-OS is a material that can be used in microscopic areas (e.g., areas between 1 nm and 10 nm, especially areas between 1 nm and 10 nm). The atomic arrangement is periodic in the region of 3 nm or less. There is no regularity in the crystal orientation between the crystals. Therefore, no orientation is observed throughout the film. Therefore, depending on the analytical method, nc-OS may be classified as a-like OS or amorphous oxide semiconductor. It may be indistinguishable from the body.

[0187] In-, a type of metal oxide containing indium, gallium, and zinc, Ga-Zn oxide (hereinafter referred to as IGZO) has a stable structure when made into the nanocrystals mentioned above. In particular, IGZO tends to have difficulty growing crystals in the atmosphere, so large crystals may form. Crystals smaller than the crystals (here, crystals of several mm or crystals of several cm) (for example, the above-mentioned Nanocrystals may be structurally more stable.

[0188] The a-like OS is a metal oxide semiconductor with a structure between the nc-OS and the amorphous oxide semiconductor. The a-like OS has pores or low density regions. The ke-OS has lower crystallinity than the nc-OS and CAAC-OS.

[0189] Oxide semiconductors (metal oxides) have a variety of structures, each with different properties. The oxide semiconductor of one embodiment of the present invention may be an amorphous oxide semiconductor, a polycrystalline oxide semiconductor, an a-li The ke-OS, nc-OS, and CAAC-OS may have two or more of them.

[0190] [impurities] Here, the influence of each impurity in the metal oxide will be described.

[0191] When impurities are mixed into an oxide semiconductor, defect states or oxygen vacancies may be formed. Therefore, when impurities are mixed into the channel formation region of the oxide semiconductor, the oxide semiconductor The electrical characteristics of the transistors used may be easily changed, resulting in poor reliability. If the channel formation region contains oxygen vacancies, the transistor will have normally-on characteristics. Cheap.

[0192] The defect levels may include trap levels. Charges trapped in the levels take a long time to disappear, and they act as if they are fixed charges. Therefore, metal oxide with high trap state density is used for the channel formation region. A transistor having such a structure may have unstable electrical characteristics.

[0193] Furthermore, if impurities exist in the channel formation region of the oxide semiconductor, the The crystallinity of the oxide provided in contact with the channel forming region may be reduced. If the crystallinity of the channel formation region is low, the stability or In addition, the reliability tends to deteriorate. Poor crystallinity can lead to the formation of interface states, which can deteriorate the stability or reliability of transistors. There is.

[0194] Therefore, in order to improve the stability or reliability of a transistor, it is necessary to use an oxide semiconductor transistor. It is effective to reduce the impurity concentration in the channel forming region and its vicinity. The elements include hydrogen, nitrogen, alkali metals, alkaline earth metals, iron, nickel, silicon, etc.

[0195] Specifically, SIMS is performed on the channel formation region of the oxide semiconductor and its vicinity. The concentration of the above impurities obtained by 18 atoms / cm 3 Below, preferably 2×1016 atoms / cm 3 Alternatively, a channel of the oxide semiconductor may be formed as follows. The concentration of the above impurities obtained by elemental analysis using EDX in the region and its vicinity The oxide semiconductor is an oxide semiconductor containing element M. When an element M is used, the element M is contained in the channel formation region of the oxide semiconductor and in the vicinity thereof. The concentration ratio of the impurities to the The concentration of element M used in calculating the concentration ratio is the region where the concentration of the impurity is calculated. The concentration may be the concentration in the same region or the concentration in the oxide semiconductor.

[0196] In addition, metal oxides with reduced impurity concentrations have a low defect level density, so the trap level density is The degree may also be lower.

[0197] <Method for manufacturing semiconductor device> Next, a transistor 200 according to one embodiment of the present invention shown in FIGS. 1A to 1C was fabricated. A manufacturing method of the semiconductor device having the above structure will be described with reference to FIGS.

[0198] Figure 4(A), Figure 5(A), Figure 6(A), Figure 7(A), Figure 8(A), Figure 9(A), Figure 10 (A) and FIG. 11(A) show top views. Also, FIG. 4(B), FIG. 5(B), FIG. 6(B) ), Fig. 7(B), Fig. 8(B), Fig. 9(B), Fig. 10(B), and Fig. 11(B) are respectively 4(A), 5(A), 6(A), 7(A), 8(A), 9(A), 1 10(A) and a cross-sectional view corresponding to the portion indicated by the dashed line A1-A2 in FIG. 11(A). 4(C) and 5(D) are cross-sectional views of the transistor 200 in the channel length direction. C), Figure 6(C), Figure 7(C), Figure 8(C), Figure 9(C), Figure 10(C), and Figure 11 (C) are respectively Fig. 4(A), Fig. 5(A), Fig. 6(A), Fig. 7(A), Fig. 8(A), Fig. 9(A), 10(A), and 11(A) correspond to the area indicated by the dashed lines A3-A4. 4 is a cross-sectional view of the transistor 200 taken along the channel width direction. (A), Figure 5(A), Figure 6(A), Figure 7(A), Figure 8(A), Figure 9(A), Figure 10(A) 11A and the top view of FIG. 11A, some elements have been omitted for clarity.

[0199] First, a substrate (not shown) is prepared, and an insulator 214 is formed on the substrate. The 214 film is formed by sputtering, chemical vapor deposition (CVD), or Deposition), Molecular Beam Epitaxy (MBE) Beam Epitaxy, Pulsed Laser Deposition (PLD) This can be done using a deposition method, an ALD method, or the like.

[0200] The CVD method is a plasma CVD (PECVD) method that uses plasma. Enhanced CVD (TCVD) method, and thermal CVD (TCVD) method. These methods can be further classified into the VD method, which uses light, and the Photo CVD method. Depending on the source gas, metal CVD (MCVD) and metal organic CVD are used. (MOCVD: Metal Organic CVD) method.

[0201] The plasma CVD method can produce high-quality films at relatively low temperatures. Since no plasma is used, this is a film formation method that does not cause plasma damage to the object to be treated. The wiring, electrodes, elements (transistors, capacitors, etc.) included in the semiconductor device are It may charge up by receiving charge from Zuma. At this time, the accumulated charge This may destroy wiring, electrodes, elements, etc. included in the semiconductor device. In the case of thermal CVD, which does not use plasma, such plasma damage does not occur, so The yield of semiconductor devices can be increased. In addition, in the thermal CVD method, plasma during film formation Since no damage occurs, a film with few defects can be obtained.

[0202] In addition, the ALD method utilizes the self-regulating properties of atoms to deposit atoms one layer at a time. This allows for ultra-thin film deposition, film deposition on structures with high aspect ratios, and pinholes. It is possible to form films with few defects such as holes, and to form films with excellent coverage, and to form films at low temperatures. In addition, the ALD method uses plasma, which is called PEALD (Plasma ALD). The use of plasma allows for growth at lower temperatures. The precursors used in the ALD method include carbon and other Some films contain impurities. Therefore, films formed by ALD may be damaged by other film formation methods. The film may contain more impurities such as carbon than the film that was provided. X-ray Photoelectron Spectroscopy (XPS) This can be done using fluoroscopy.

[0203] The CVD and ALD methods are film formation methods in which particles emitted from a target are deposited. It is a film forming method in which a film is formed by a reaction on the surface of the object to be treated. Therefore, this is a film forming method that is less affected by the shape of the workpiece and has good step coverage. In addition, the ALD method has excellent step coverage and thickness uniformity, making it suitable for forming thin films with high aspect ratios. However, the ALD method is relatively slow in forming films. Because the deposition rate is slow, it should be used in combination with other deposition methods such as CVD, which has a high deposition rate. may be preferable.

[0204] In the CVD and ALD methods, the composition of the resulting film is controlled by the flow rate ratio of the source gases. For example, in the CVD and ALD methods, the flow rate ratio of the source gases can be adjusted to any value. In addition, for example, in the CVD method and the ALD method, it is possible to form a film having the following composition. By changing the flow rate ratio of the source gases while oxidizing, a film with a continuously changing composition can be formed. When forming a film while changing the flow rate ratio of the source gases, multiple film forming chambers can be used. Compared to forming a film using a vacuum, the time required for film formation is shorter because there is no time required for transport or pressure adjustment. Therefore, the productivity of the semiconductor device can be improved. There is.

[0205] In this embodiment, the insulator 214 is formed by sputtering aluminum oxide. The insulator 214 may have a multilayer structure.

[0206] Next, the insulator 216 is deposited on the insulator 214. The insulator 216 is deposited by sputtering. This can be done by using a deposition method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. In this embodiment, silicon oxynitride is deposited as the insulator 216 by the CVD method.

[0207] Next, an opening is formed in the insulator 216 that reaches the insulator 214. The opening may be, for example, a groove or This also includes slits. The area where an opening is formed may also be referred to as an opening. The openings may be formed by wet etching, but it is more preferable to use dry etching. Insulator 214 is preferably formed by etching insulator 216 to form grooves. It is preferable to select an insulator that functions as an etching stopper film when etching. When silicon oxynitride is used for the insulator 216 forming the groove, the insulator 214 is silicon nitride. Silicon, aluminum oxide, and hafnium oxide are preferably used.

[0208] The dry etching equipment is a capacitively coupled plasma (CCP) with parallel plate electrodes. Capacitively Coupled Plasma etching equipment is used. The capacitively coupled plasma etching apparatus having parallel plate electrodes can Alternatively, a high frequency voltage may be applied to one of the electrodes. A configuration in which a plurality of different high frequency voltages are applied to the electrodes may also be used. Alternatively, a high frequency voltage of the same frequency may be applied to each of the parallel plate electrodes. Alternatively, a high-frequency voltage having a high-density plasma source may be applied. Dry etching equipment with a high density plasma source can be used. The device may be, for example, an inductively coupled plasma (ICP) d Plasma etching equipment or the like can be used.

[0209] After the opening is formed, a conductive film that will become the first conductor of the conductor 205 is formed. It is desirable to include a conductor that has the function of suppressing oxygen permeation. For example, tantalum nitride Alternatively, a material that suppresses oxygen permeation can be used. Conductors with the function of controlling the temperature and tantalum, tungsten, titanium, molybdenum, aluminum The conductive film may be a laminated film of aluminum, copper, or a molybdenum-tungsten alloy. This is done using methods such as sputtering, CVD, MBE, PLD, and ALD. can be done.

[0210] In this embodiment, a conductive film that becomes the first conductor of the conductor 205 is formed by sputtering. By this method, a tantalum nitride film or a film in which titanium nitride is laminated on tantalum nitride is formed. By using such a metal nitride as the first conductor of the conductor 205, Even if a metal that easily diffuses, such as copper, is used as the second conductor of the conductor 205, the metal Diffusion out of the first conductor of the conductor 205 can be prevented.

[0211] Next, a second conductor of the conductor 205 is formed on the conductive film that will become the first conductor of the conductor 205. The conductive film is formed by plating, sputtering, CVD, M This can be done by using a BE method, a PLD method, an ALD method, or the like. The film is formed of tungsten.

[0212] Next, CMP (Chemical Mechanical Polishing) processing By performing this, a part of the conductive film that will become the first conductor of the conductor 205 and the A portion of the conductive film that will become the second conductor is removed to expose the insulator 216. As a result, an opening Only the conductive film that becomes the first conductor of the conductor 205 and the second conductor of the conductor 205 As a result, the first conductor and the second conductor of the conductor 205 are left with a flat upper surface. A conductor 205 including the second conductor of the conductor 205 can be formed (FIG. 4(A) See also Figure 4(C).

[0213] After the conductor 205 is formed, a part of the second conductor of the conductor 205 is removed. A groove is formed in the second conductor of the conductor 205, and the conductor 205 and A step of forming a conductive film on the insulator 216 and performing CMP processing may be performed. By this process, a part of the conductive film is removed to expose the insulator 216. A portion of the second conductor may be removed by dry etching or the like.

[0214] By the above process, a conductor 205 having a flat upper surface and including the conductive film can be formed. By improving the flatness of the top surfaces of the insulator 216 and the conductor 205, the oxide 230 The crystallinity of oxide 230a, oxide 230b, and oxide 230c can be improved. The conductive film may include a first conductive material of the conductive material 205 or a second conductive material of the conductive material 205. It is recommended to use the following materials.

[0215] Hereinafter, a method for forming the conductor 205 that differs from the above will be described.

[0216] A conductive film that will become the conductor 205 is formed on the insulator 214. The conductive film is formed by a spat This can be done using a deposition method, a CVD method, an MBE method, a PLD method, an ALD method, etc. The conductive film may be a multi-layer film. For example, the conductive film may be a tungsten film. The film is formed.

[0217] Next, a conductive film that will become the conductor 205 is processed using lithography. Form.

[0218] In the lithography method, first, the resist is exposed to light through a mask. The resist mask is formed by removing or leaving the resist patterned area using a developer. By etching through the resist mask, conductors, semiconductors, insulators, etc. are formed as desired. For example, KrF excimer laser light, ArF excimer laser light, etc. Laser light, EUV (Extreme Ultraviolet) light, etc. are used to A resist mask can be formed by exposing the substrate to light. It is also possible to use a liquid immersion technique in which the substrate is exposed to light by filling it with a liquid (for example, water). Alternatively, an electron beam or an ion beam may be used. In this case, the mask is not required. dry etching, wet etching, or wet etching after dry etching wet etching, or wet etching followed by dry etching. This can be removed.

[0219] In addition, a hard mask made of an insulator or a conductor may be used instead of the resist mask. When a hard mask is used, an insulating layer that is a hard mask material is formed on the conductive film that is to be the conductor 205. An insulating film or a conductive film is formed, a resist mask is formed on it, and a hard mask material is etched. By this etching, a hard mask of a desired shape can be formed. The etching of the conductive film may be carried out after removing the resist mask, or after removing the resist mask. In the latter case, the resist mask may be removed during etching. After etching the conductive film that will become the conductor 205, the hard mask is removed by etching. On the other hand, if the hard mask material does not affect the subsequent process or can be used in the subsequent process, If the hard mask can be removed, it is not necessary to remove the hard mask.

[0220] Next, an insulating film to become the insulator 216 is formed on the insulator 214 and the conductor 205 . The insulating film is formed so as to be in contact with the upper surface and side surfaces of the conductor 205. Film formation is performed using methods such as sputtering, CVD, MBE, PLD, and ALD. It is possible.

[0221] Here, the thickness of the insulating film that becomes the insulator 216 is preferably equal to or greater than the thickness of the conductor 205. For example, if the thickness of the conductor 205 is 1, the thickness of the insulating film is preferably 1 or more and 3 or less. Let's say.

[0222] Next, a part of the insulating film that will become the insulator 216 is removed by performing CMP processing. This exposes the surface of the conductor 205. This allows the conductor 205 and the insulating The above is a different method for forming the conductor 205.

[0223] Next, the insulator 222 is formed on the insulator 216 and the conductor 205. The film is formed using methods such as sputtering, CVD, MBE, PLD, and ALD. In this embodiment, the insulator 222 is formed by the ALD method using hafnium oxide. A film of aluminum or aluminum oxide is formed.

[0224] Subsequently, it is preferable to carry out a heat treatment. The heat treatment is preferably carried out at a temperature of 250°C or higher and 650°C or lower. Preferably, the temperature is 300°C or higher and 500°C or lower, more preferably 320°C or higher and 450°C or lower. The heat treatment is carried out in an atmosphere of nitrogen gas or inert gas, or in an atmosphere of oxidizing gas for 10 minutes. The heat treatment is carried out in an atmosphere containing more than ppm, more than 1%, or more than 10%. Alternatively, the heat treatment may be performed in a nitrogen gas or inert gas atmosphere. After treatment, oxidizing gas is added at 10 ppm or more, 1% or more, or The heat treatment may be carried out in an atmosphere containing 10% or more of silicon.

[0225] In this embodiment, the heat treatment is performed in a nitrogen atmosphere at 400° C. after the insulator 222 is formed. After that, the temperature was increased to 400°C for 1 hour in an oxygen atmosphere. The heat treatment removes impurities such as water and hydrogen contained in the insulator 222. The heat treatment can be performed after the insulator 224 is formed. It can also be done.

[0226] Next, the insulator 224 is deposited on the insulator 222. The insulator 224 is deposited by sputtering. This can be done by using a deposition method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. In this embodiment, a silicon oxynitride film is formed as the insulator 224 by a CVD method.

[0227] Here, in order to form an excess oxygen region in the insulator 224, a plasma containing oxygen is used under reduced pressure. The oxygen-containing plasma treatment may be, for example, a high-density plasma treatment using microwaves. It is preferable to use a device having a power source that generates plasma. Alternatively, RF ( The plasma may have a power source that applies high-density plasma. By doing so, high density oxygen radicals can be generated, and by applying RF to the substrate side, As a result, oxygen radicals generated by the high-density plasma are efficiently guided into the insulator 224. Alternatively, after performing a plasma treatment containing an inert gas using this apparatus, In order to compensate for the desorbed oxygen, a plasma treatment containing oxygen may be performed. By appropriately selecting the processing conditions, impurities such as water and hydrogen contained in the insulator 224 can be removed. In this case, the heat treatment is not necessary.

[0228] Here, aluminum oxide is formed on the insulator 224 by, for example, a sputtering method. After the film formation, a CMP process may be performed until the insulator 224 is reached. By performing this, the surface of the insulator 224 can be flattened and smoothed. By placing the silicon on the insulator 224 and performing the CMP process, the end point of the CMP process can be easily detected. Furthermore, the CMP process polishes a portion of the insulator 224, and the insulator 224 The thickness of the insulator 224 may be adjusted when the insulator 224 is formed. 224 Planarizing and smoothing the surface prevents a decrease in the coverage of the oxide film that will be formed later. This may prevent a decrease in the yield of the semiconductor device. By forming an aluminum oxide film on the insulating layer 224 by sputtering, This is preferable because oxygen can be added to the

[0229] Next, an oxide film 230A and an oxide film 230B are formed in this order on the insulator 224 (FIG. 4(B) ) and FIG. 4(C). The oxide film 230A and the oxide film 230B are formed in an atmospheric environment. It is preferable to form the film continuously without exposing it to the atmosphere. 230A and oxide film 230B, impurities or moisture from the atmospheric environment are attached to the surface. This can prevent the oxide film 230A from being broken down, and the vicinity of the interface between the oxide film 230A and the oxide film 230B can be kept clean. do.

[0230] The oxide film 230A and the oxide film 230B are formed by sputtering, CVD, MBE, or the like. The method can be carried out using a method such as a PLD method or an ALD method.

[0231] For example, the oxide film 230A and the oxide film 230B are formed by a sputtering method. In this case, oxygen or a mixture of oxygen and a rare gas is used as the sputtering gas. By increasing the oxygen ratio in the sputtering gas, the excess oxygen in the oxide film to be formed can be reduced. In addition, when the oxide film is formed by sputtering, For example, the above-mentioned In-M-Zn oxide target can be used.

[0232] In particular, when forming the oxide film 230A, part of the oxygen contained in the sputtering gas becomes an insulator. Therefore, the oxygen contained in the sputtering gas may The ratio may be 70% or more, preferably 80% or more, and more preferably 100%.

[0233] In addition, when the oxide film 230B is formed by sputtering, the oxide film 230B is formed by sputtering. The proportion of oxygen to be added is more than 30% and not more than 100%, preferably 70% or more and not more than 100%. When the film is formed using the above method, an oxygen-excess oxide semiconductor is formed. The transistor used in the channel formation region has relatively high reliability. In the case where the oxide film 230B is formed by a sputtering method, The proportion of oxygen contained in the sputtering gas is 1% or more and 30% or less, preferably 5% or more and 20% or less. If the film is formed at a concentration of 0% or less, an oxygen-deficient oxide semiconductor is formed. Transistors that use compound semiconductors in the channel formation region have a relatively high field-effect mobility. Furthermore, by forming the film while heating the substrate, the crystallinity of the oxide film can be improved. It can be done.

[0234] In this embodiment, the oxide film 230A is formed by sputtering in a ratio of 1:3:4 [atomic The oxide film 230B is formed using an In-Ga-Zn oxide target with a ratio of 1:1. , In- by the sputtering method, In:Ga:Zn=4:2:4.1 [atomic ratio] The films are formed using a Ga-Zn oxide target. The ratio of the number of atoms may be appropriately selected to form the oxide 230 in accordance with the desired characteristics.

[0235] The insulators 222, 224, oxide films 230A, and oxide films 230B are heated in air. For example, a multi-chamber film forming apparatus is used. Just use

[0236] Next, a heat treatment may be performed. The heat treatment may be performed under the above-mentioned heat treatment conditions. By this heat treatment, the water and hydrogen in the oxide film 230A and the oxide film 230B are removed. In this embodiment, the wafer is heated at 400° C. in a nitrogen atmosphere. After that, the temperature was increased to 400°C for 1 hour in an oxygen atmosphere. Perform processing.

[0237] Next, a conductive film 242A is formed on the oxide film 230B. This can be done using a deposition method, CVD method, MBE method, PLD method, ALD method, etc. See FIG. 4(B) and FIG. 4(C). Before forming the conductive film 242A, a heat treatment is performed. The heat treatment may be performed under reduced pressure, and the conductive film may be continuously formed without being exposed to the air. By performing such a process, the surface of the oxide film 230B may be formed with a film 242A. and the like, and removes moisture and hydrogen adsorbed on the oxide film 230A and the oxide film 230 The water and hydrogen concentrations in B can be reduced. The heat treatment temperature is 100°C. The temperature of the heat treatment is preferably 200° C. or higher and 400° C. or lower. In this embodiment mode, the temperature of the heat treatment is 200° C.

[0238] Next, the oxide film 230A, the oxide film 230B, and the conductive film 242A are processed into islands. The oxide 230a, the oxide 230b, and the conductive layer 242B are formed. In this case, the thickness of the insulator 224 in the region not overlapping with the oxide 230a may be thin (see FIG. See Figures 5(A) to 5(C).

[0239] Here, the oxide 230a, the oxide 230b, and the conductive layer 242B are at least partially The oxide 230a, the oxide 230b, and the conductor 205 are formed so as to overlap with each other. The side surfaces of the conductive layer 242B are preferably approximately perpendicular to the upper surface of the insulator 224. The oxide 230a, the oxide 230b, and the side of the conductive layer 242B are on the insulator 224. By being approximately perpendicular to the surface, when providing a plurality of transistors 200, the area can be reduced, Alternatively, the oxide 230a, the oxide 230b, and the conductive layer 242 may be formed in a single layer. The angle formed by the side surface of B and the top surface of the insulator 224 may be small. In this case, the oxide 230a, the oxide 230b, and the side of the conductive layer 242B and the insulator 224 The angle formed with the upper surface is preferably 60° or more and less than 70°. In the subsequent process, the covering property of the insulator 254 etc. is improved, and defects such as voids are reduced. can be done.

[0240] In addition, a curved surface is provided between the side surface of the conductive layer 242B and the upper surface of the conductive layer 242B. Preferably, the end of the side surface and the end of the top surface are curved. For example, the radius of curvature at the end of the conductive layer 242B is 3 nm or more and 10 nm or less, preferably , 5 nm or more and 6 nm or less. By not having sharp edges at the edges, the film The coverage of the surface is improved.

[0241] The oxide film 230A, the oxide film 230B, and the conductive film 242A are processed by lithography. The processing can be performed using a dry etching method or a wet etching method. Dry etching is suitable for microfabrication. The oxide film 230A, the oxide film 230B, and the conductive film 242A are processed under different conditions. It may also be processed.

[0242] Next, on the insulator 224, the oxide 230a, the oxide 230b, and the conductive layer 242B, Then, an insulating film 254A is formed (see FIGS. 6(B) and 6(C)).

[0243] The insulating film 254A can be formed by a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. The insulating film 254A has a function of suppressing oxygen permeation. For example, it is preferable to use an insulating film made of silicon nitride or Silicon oxide or aluminum oxide is deposited.

[0244] Next, an insulating film that will become the insulator 280 is formed on the insulating film 254A. This is done using methods such as sputtering, CVD, MBE, PLD, and ALD. In this embodiment, the insulating film is formed by a CVD method or a sputtering method. Therefore, a silicon oxide film is formed. Note that a heat treatment may be performed before the formation of the insulating film. The heat treatment is carried out under reduced pressure, and the insulating film is continuously formed without exposure to the atmosphere. By carrying out such a treatment, the particles adsorbed on the surface of the insulating film 254A and the like can be removed. The moisture and hydrogen are removed, and the oxide 230a, the oxide 230b, and the insulating film 25 The water and hydrogen concentrations in 4A can be reduced by using the heat treatment conditions described above. You can be there.

[0245] The insulating film that becomes the insulator 280 may have a multi-layer structure. For example, sputtering A silicon oxide film is formed by a CVD method, and then an oxide silicon film is formed on the silicon oxide film by a CVD method. A silicon film may be formed.

[0246] Next, the insulating film that will become the insulator 280 is subjected to CMP processing to form the insulator 280 with a flat upper surface. (See Figures 6(B) and 6(C)).

[0247] Next, a part of the insulator 280, a part of the insulating film 254A, and a part of the conductive layer 242B are heated. The opening is formed so as to overlap the conductor 205. By forming the opening, the conductor 242a and the conductor 242 b, and an insulator 254 are formed. At this time, the region of the oxide 230b that overlaps with the opening is In some cases, the film thickness may become thin (see FIGS. 7(A) to 7(C)).

[0248] In addition, a part of the insulator 280, a part of the insulating film 254A, and a part of the conductive layer 242B are heated. For example, a part of the insulator 280 may be dry etched. The insulating film 254A is processed by a wet etching method, and a part of the insulating film 254B is processed by a wet etching method. A part of 2B may be processed by dry etching.

[0249] Here, impurities attached to the surface of the oxide 230a, the oxide 230b, etc. or diffused inside the oxide 230a, etc. It is preferable to remove impurities such as the insulator 280, the insulating film 254A, and and the components contained in the conductive layer 242B, and the components used in the device used to form the opening. This may be caused by components contained in the materials used, or components contained in the gas or liquid used in etching. The impurities include, for example, aluminum, silicon, and titanium. Examples include thallium, fluorine, and chlorine.

[0250] In order to remove the above impurities, a cleaning treatment may be carried out. Wet cleaning using purified liquid, plasma treatment using plasma, and cleaning by heat treatment are some of the methods. The above cleaning methods may be combined as appropriate.

[0251] For wet cleaning, ammonia water, oxalic acid, phosphoric acid, hydrofluoric acid, etc. are mixed with carbonated water. Alternatively, the cleaning treatment may be carried out using an aqueous solution diluted with pure water, pure water, carbonated water, or the like. Alternatively, ultrasonic cleaning may be performed using these aqueous solutions, pure water, or carbonated water. These cleaning methods may be combined as appropriate.

[0252] Next, a heat treatment may be performed. The heat treatment is preferably performed in an atmosphere containing oxygen. The heat treatment is carried out under reduced pressure, without exposure to the atmosphere, and the oxide film 2 is continuously formed. 30C may be formed (see FIGS. 8(A) to 8(C)). By this, moisture and hydrogen adsorbed on the surface of the oxide 230b are removed, and further The moisture concentration and hydrogen concentration in the oxide 230a and the oxide 230b can be reduced. The temperature of the heat treatment is preferably 100° C. or more and 400° C. or less. The heat treatment temperature is set to 200°C.

[0253] Oxide film 230C is formed by sputtering, CVD, MBE, PLD, and ALD methods. The oxide film 230 can be formed by using a material such as a silicon dioxide film. A, or the oxide film 230C may be formed using the same film formation method as the oxide film 230B. In this embodiment, the oxide film 230C is formed by sputtering In:Ga:Zn In-Ga-Zn oxide with an atomic ratio of 1:3:4 or 4:2:4.1 Alternatively, the oxide film 230C is formed by sputtering. The film was formed using an In-Ga-Zn oxide target with an atomic ratio of 4:2:4.1. On top of this, an In-Ga-Zn oxide target with an atomic ratio of In:Ga:Zn=1:3:4 is placed. The film is formed using

[0254] In particular, when forming the oxide film 230C, part of the oxygen contained in the sputtering gas is converted into the oxide. 230a and oxide 230b. The proportion of oxygen contained in the sputtering gas is 70% or more, preferably 80% or more, and more preferably Preferably, it should be 100%.

[0255] Next, a heat treatment may be carried out. The heat treatment is carried out under reduced pressure without exposure to the atmosphere. The insulating film 250A may be formed continuously. The moisture and hydrogen adsorbed on the surface of 230C are removed, and further, oxide 230a and acid The moisture concentration and hydrogen concentration in the oxide film 230b and the oxide film 230c can be reduced. The temperature of the heat treatment is preferably 100° C. or higher and 400° C. or lower (see FIGS. 9(A) to 9(C)). See C). ).

[0256] The insulating film 250A can be formed by a method such as sputtering, CVD, MBE, PLD, or ALD. In this embodiment, the insulating film 250A can be formed by the CVD method. The temperature at which the insulating film 250A is formed is: The temperature is preferably 350°C or higher and lower than 450°C, and particularly preferably around 400°C. By depositing the film at 400° C., an insulating film with few impurities can be deposited.

[0257] Next, the conductive film 260A and the conductive film 260B are formed in this order. 260B can be formed by sputtering, CVD, MBE, PLD, ALD, etc. In this embodiment, the conductive film 260A is formed by the ALD method. Then, a conductive film 260B is formed by CVD (see FIGS. 10A to 10C). ).

[0258] Next, the oxide film 230C, the insulating film 250A, the conductive film 260A, and The oxide 230c is then removed by polishing the conductive film 260B until the insulator 280 is exposed. , the insulator 250, and the conductor 260 (the conductor 260a and the conductor 260b) are formed. (See FIGS. 11(A) to 11(C)). As a result, the oxide 230c is It is arranged to cover the inner wall (side wall and bottom surface) of the opening that reaches 230b. The body 250 is disposed so as to cover the inner wall of the opening via the oxide 230c. The conductor 260 is formed so as to fill the opening through the oxide 230c and the insulator 250. will be placed in.

[0259] Next, heat treatment may be performed. In this embodiment, heat treatment is performed in a nitrogen atmosphere at a temperature of 400° C. The heat treatment is carried out for 1 hour. The moisture concentration in the insulators 250 and 280 is reduced by the heat treatment. The degree and hydrogen concentration can be reduced.

[0260] Next, an insulating layer is formed on the oxide 230c, the insulator 250, the conductor 260, and the insulator 280. The insulator 274 is formed by a method such as sputtering, CVD, MBE, or the like. The insulator 274 may be, for example, a spatula. It is preferable to form an aluminum oxide film or a silicon nitride film by a tarpaulin deposition method. It is preferable to form an aluminum oxide film or a silicon nitride film by sputtering. By doing so, the diffusion of hydrogen contained in the insulator 281 into the oxide 230 is suppressed. In addition, by forming the insulator 274 so as to be in contact with the conductor 260, the conductor The oxidation of the body 260 can be suppressed.

[0261] In addition, an aluminum oxide film is formed as the insulator 274 by a sputtering method. By this, oxygen can be supplied to the insulator 280. When the oxide 230b is supplied to the channel forming region through the oxide 230c, In addition, oxygen is supplied to the insulator 280, so that the insulator 274 is formed before the insulator 274 is formed. The oxygen contained in 280 passes through the oxide 230c and enters the channel of the oxide 230b. In some cases, the gas may be supplied to the ion-forming region.

[0262] The insulator 274 may also have a multi-layer structure. For example, an oxide film formed by sputtering may be used. An aluminum oxide film is formed, and then a nitride film is deposited on the aluminum oxide film by a sputtering method. Alternatively, a silicon nitride film may be formed.

[0263] Next, a heat treatment may be carried out. The heat treatment may be carried out under the above-mentioned heat treatment conditions. The heat treatment can reduce the moisture concentration and hydrogen concentration of the insulator 280. Also, oxygen contained in the insulator 274 can be implanted into the insulator 280.

[0264] Before forming the insulator 274, a sputtering process is first performed on the insulator 280. An aluminum oxide film is formed by a coating method, and then heated under the above-mentioned heat treatment conditions. Then, the aluminum oxide film is removed by CMP. This step may allow more excess oxygen regions to be formed in the insulator 280. In this step, a part of the insulator 280, a part of the conductor 260, and the insulator 250 , and some of the oxide 230c may be removed.

[0265] An insulator may be provided between the insulator 280 and the insulator 274. For example, a silicon oxide film formed by sputtering may be used. By providing the body, an excess oxygen region can be formed in the insulator 280.

[0266] Next, an insulator 281 may be deposited on the insulator 274. The deposition of the insulator 281 may be performed by a spat This can be done using a deposition method, a CVD method, an MBE method, a PLD method, an ALD method, etc. (See Figure 11(B) and Figure 11(C)).

[0267] Next, conductor 2 is applied to insulator 254, insulator 280, insulator 274, and insulator 281. An opening is formed that reaches the conductive material 42a and the conductive material 242b. The opening is formed by lithography. This can be done using the - method.

[0268] Next, an insulating film that will become the insulators 241a and 241b is formed, and the insulating film is anisotropically The insulating film is formed by reactive etching. This can be done using methods such as sputtering, CVD, MBE, PLD, and ALD. As the insulating film, an insulating film having a function of suppressing oxygen permeation can be used. For example, it is preferable to form an aluminum oxide film by the ALD method. Alternatively, a silicon nitride film may be formed by using an ALD method or a CVD method. The etching may be performed by dry etching, for example. By forming the conductive layer 240a in this manner, oxygen permeation from the outside is suppressed, and the conductive layer 240a and the conductive layer 240b to be formed next are prevented from permeating. The conductor 240a and the conductor 240b can be prevented from being oxidized. b can prevent impurities such as water and hydrogen from diffusing to the outside.

[0269] Next, a conductive film that will become the conductor 240a and the conductor 240b is formed. It is desirable to have a laminated structure including a conductor that has the function of suppressing the diffusion of impurities such as water and hydrogen. For example, tantalum nitride, titanium nitride, etc., and tungsten, molybdenum, copper, etc. The conductive film can be formed by a method such as sputtering or CVD. The deposition can be carried out by using an MBE method, a PLD method, an ALD method, or the like.

[0270] Next, a CMP process is performed to remove the conductive film that will become the conductors 240a and 240b. A portion of the insulating film is removed to expose the insulator 281. As a result, the conductive film remains only in the opening. By doing so, it is possible to form the conductors 240a and 240b with flat upper surfaces ( (See FIGS. 1A to 1C.) Note that the CMP process causes a part of the insulator 281 to may be removed.

[0271] As a result of the above, a semiconductor device including the transistor 200 shown in FIGS. can be produced.

[0272] According to one embodiment of the present invention, a highly reliable semiconductor device can be provided. According to one embodiment of the present invention, a semiconductor device having favorable electrical characteristics can be provided. According to one embodiment of the present invention, a semiconductor device with large on-state current can be provided. According to one embodiment of the present invention, a semiconductor device that can be miniaturized or highly integrated can be provided. According to one embodiment of the present invention, a semiconductor device with low power consumption can be provided.

[0273] The configurations and methods shown in the present embodiment may be the same as those shown in other embodiments and examples. It can be used in combination with other methods as appropriate.

[0274] (Embodiment 2) In this embodiment, one mode of a semiconductor device (memory device) will be described with reference to FIGS. 12 and 13. explain.

[0275] [Storage device 1] An example of a memory device using a semiconductor device according to one embodiment of the present invention is shown in FIG. In the memory device according to this embodiment, the transistor 200 is provided above the transistor 300. The capacitor 100 is provided above the transistor 200. Preferably, the transistor 300 at least partially overlaps with the transistor 200. As a result, the upper surfaces of the capacitor element 100, the transistor 200, and the transistor 300 Since the area occupied in plan view can be reduced, the memory device according to this embodiment can be miniaturized. The memory device according to this embodiment can be, for example, CPU (Central Processing Unit) or GPU (Graph Logic circuits, such as DRAs, M (Dynamic Random Access Memory) or NVM (No It can be applied to memory circuits such as n-Volatile Memory (NVRAM). .

[0276] The transistor 200 is the same as that described in the previous embodiment. Therefore, the transistor 200 and the layer including the transistor 200 can be In this regard, the description of the above embodiment can be referred to.

[0277] The transistor 200 is a transistor in which a channel is formed in a semiconductor layer including an oxide semiconductor. The transistor 200 is used in a memory device because its off-state current is small. This allows the memory contents to be retained for a long period of time. Since no refresh operation is required or the frequency of refresh operations is extremely low, Power consumption can be reduced sufficiently. Compared to transistors, transistor 200 has better electrical properties at high temperatures. The transistor 200 exhibits good electrical characteristics even in the temperature range of 125°C to 150°C. In addition, in the temperature range of 125°C to 150°C, the transistor 200 In other words, the transistors that use silicon for the semiconductor layer have an on / off ratio of 10 or more orders of magnitude. Compared to a conventional transistor, the transistor 200 has a low on-state current, which is an example of a transistor characteristic. The higher the temperature, the better the frequency characteristics become.

[0278] In the semiconductor device shown in FIG. 12, the wiring 1001 is electrically connected to the source of the transistor 300. The wiring 1002 is electrically connected to the drain of the transistor 300. The wiring 1007 is electrically connected to the gate of the transistor 300. is electrically connected to one of the source and drain of the transistor 200, and the wiring 1004 is electrically connected to the first gate of the transistor 200, and the wiring 1006 is and the second gate of transistor 200. The other of the drains is electrically connected to one of the electrodes of the capacitor 100. The capacitor element 100 is electrically connected to the other electrode of the capacitor element 100 .

[0279] The semiconductor device shown in FIG. 12 is configured such that the capacitance element 1 The ability to retain the charge stored on one of the electrodes makes it possible to write information. The transistor 200 has a source, a gate (top In addition to the gate, drain, and back gate, it is a device with four terminals. Since it is a device, it has MTJ (Magnetic Tunnel Junction) characteristics. The MRAM (Magnetoresistive Random Access Memory) used Memory), ReRAM (Resistive Random Access Me memory, phase-change memory, etc. Compared to a two-terminal device, it has the advantage that the input and output can be controlled independently easily. In addition, MRAM, ReRAM, and phase change memory use atomic-level rewriting technology to rewrite information. On the other hand, the semiconductor device shown in Figure 12 has a structure that can be easily rewritten. When this happens, the transistor and capacitor elements are used to charge or discharge electrons. It has the characteristics of being highly durable against repeated rewriting and undergoing little structural change.

[0280] In addition, the semiconductor device shown in FIG. 12 is arranged in a matrix to form a memory cell array. In this case, the transistor 300 is connected to the memory cell array. The semiconductor device shown in FIG. When the semiconductor device is used as a memory element, for example, the driving voltage is 2.5 V and the evaluation environment temperature is It can achieve an operating frequency of 200MHz or more in the temperature range of -40℃ to 85℃. Cut.

[0281] <Transistor 300> The transistor 300 is provided on a substrate 311 and has a conductor 312 serving as a gate electrode. 16, an insulator 315 serving as a gate insulator, and a semiconductor region consisting of a portion of the substrate 311 313, and low resistance regions 314a which function as source or drain regions, and low resistance region 314b.

[0282] Here, an insulator 315 is disposed on the semiconductor region 313, and a conductor is disposed on the insulator 315. The transistor 300 formed in the same layer is provided with an element isolation insulating layer 316. The insulator 312 serves as a barrier between the semiconductor substrate 10 and the semiconductor substrate 10. ... The transistor 300 can be made of an insulator similar to the insulator 326. The transistor may be either a channel type or an n-channel type.

[0283] The substrate 311 includes a region where the channel of the semiconductor region 313 is formed, a region in the vicinity of the region, a source region, and a semiconductor layer. low resistance region 314a and low resistance region 314b which will be the source region or drain region; In the above, it is preferable that the semiconductor includes a silicon-based semiconductor, and the semiconductor includes single crystal silicon. Alternatively, Ge (germanium), SiGe (silicon germanium), Materials containing GaAs (gallium arsenide), GaAlAs (gallium aluminum arsenide), etc. The effective mass can be controlled by applying stress to the crystal lattice and changing the lattice spacing. Alternatively, GaAs and GaAlAs may be used. The transistor 300 is a HEMT (High Electron Mobility Transistor). Transistor).

[0284] The low resistance region 314a and the low resistance region 314b are formed by the semiconductor layer applied to the semiconductor region 313. In addition to the conductive material, elements that impart n-type conductivity, such as arsenic and phosphorus, or p-type conductivity, such as boron, are added. It contains elements that impart electrical conductivity to the material.

[0285] The conductor 316, which functions as a gate electrode, is made of arsenic, phosphorus, or the like, which provides n-type conductivity. Semiconductor materials such as silicon that contain elements or elements that give them p-type conductivity, such as boron Conductive materials such as aluminum, metal, alloy, or metal oxide materials can be used. .

[0286] In addition, since the work function is determined by the material of the conductor, by changing the material of the conductor, The threshold voltage can be adjusted by using titanium nitride or tantalum nitride as the conductor. It is preferable to use a material such as the following. It is preferable to use a metal material such as tungsten or aluminum as a laminate. Tungsten is preferred in terms of heat resistance.

[0287] Here, the transistor 300 shown in FIG. 12 has a semiconductor region 313 ( The side and top surfaces of the semiconductor region 313 are insulated. A conductor 316 is provided to cover the transistor via an insulating material 315. The transistor 300 is also called a FIN type transistor because it utilizes the protruding portion of the semiconductor substrate. In addition, an insulator is provided in contact with the top of the protrusions and functions as a mask for forming the protrusions. In addition, the case where a part of a semiconductor substrate is processed to form a convex portion is shown here. However, a semiconductor film having a convex shape may be formed by processing an SOI substrate.

[0288] The transistor 300 shown in FIG. 12 is an example, and the structure is not limited to this. Appropriate transistors may be used depending on the structure and driving method.

[0289] As shown in FIG. 12, the semiconductor device includes a transistor 300 and a transistor 200. For example, the transistor 300 is made of a silicon-based semiconductor material. The transistor 200 can be formed using an oxide semiconductor. The semiconductor device shown in the figure is a semiconductor device in which a silicon-based semiconductor material and an oxide semiconductor are mixed in different layers. The semiconductor device shown in FIG. 12 can be formed by using a silicon-based semiconductor material. It can be manufactured using the same process as that using semiconductor device manufacturing equipment that uses materials. It is possible to achieve high integration.

[0290] <Capacitor element> The capacitance element 100 includes an insulator 114 on an insulator 160 and an insulator 140 on an insulator 114. and a conductor 110 disposed within an opening formed in the insulator 114 and the insulator 140. , the insulator 130 on the conductor 110 and the insulator 140, and the conductor 120 on the insulator 130. and an insulator 150 on the conductor 120 and the insulator 130. The conductor 110, the insulator 130, and the conductor 110 are inserted into the openings formed in the insulator 14 and the insulator 140. At least a portion of the electrical conductor 120 is disposed.

[0291] The conductor 110 functions as the lower electrode of the capacitor element 100, and the conductor 120 functions as the 0, and the insulator 130 functions as a dielectric of the capacitive element 100. The capacitor 100 has openings in the insulators 114 and 140, not only on the bottom surface but also on the The upper and lower electrodes are also configured to face each other on the side with a dielectric material between them. Therefore, the deeper the opening, the greater the capacitance per area. In this way, the capacitance of the capacitor 100 can be increased. By increasing the capacitance per unit area, miniaturization or high integration of semiconductor devices can be achieved. can be promoted.

[0292] The insulator 114 and the insulator 150 are made of an insulator that can be used for the insulator 280. The insulator 140 may be formed by etching when forming the opening in the insulator 114. It is preferable to use an insulator that can be used as the insulator 214. That's fine.

[0293] The openings formed in the insulators 114 and 140 have a rectangular shape when viewed from above. Alternatively, the shape may be a polygon other than a square, or the corners of the polygon may be curved. Here, when viewed from above, the opening may have a circular shape including an ellipse. It is preferable that the overlapping area between the gate and the transistor 200 is large. As a result, the area occupied by the semiconductor device having the capacitor element 100 and the transistor 200 can be reduced. This can be done.

[0294] The conductor 110 is disposed in contact with the insulator 140 and an opening formed in the insulator 114. It is preferable that the upper surface of the conductor 110 is substantially flush with the upper surface of the insulator 140. The lower surface of the conductor 110 is in contact with the conductor 152 provided on the insulator 160. The film 10 is preferably formed by ALD or CVD. Any conductor that can be used for 205 may be used.

[0295] The insulator 130 is disposed so as to cover the conductor 110 and the insulator 140. For example, It is preferable to form the insulator 130 by using the ALD method, the CVD method, or the like. 30 is, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, Zirconium oxide, aluminum oxide, aluminum oxide nitride, aluminum oxide nitride, Aluminum nitride, hafnium oxide, hafnium oxynitride, hafnium nitride oxide, hafnium nitride For example, the insulator 1 may be made of aluminum or the like, and may be formed as a laminated layer or a single layer. 30, zirconium oxide, aluminum oxide, zirconium oxide are layered in this order. An insulating film having such a structure can be used.

[0296] The insulator 130 may be made of a material with high dielectric strength, such as silicon oxynitride, or a material with high dielectric strength. It is preferable to use a material with a high dielectric constant (high-k). A stack of dielectric (high-k) materials may also be used.

[0297] Gallium oxide is an example of a high-dielectric-constant (high-k) material (a material with a high relative dielectric constant). , hafnium oxide, zirconium oxide, oxides containing aluminum and hafnium, Oxynitride with aluminum and hafnium, Oxynitride with silicon and hafnium oxides, oxide nitrides with silicon and hafnium, oxide nitrides with silicon and hafnium By using such high-k materials, the insulator 130 can be made thick. Even if the insulator 130 is made thicker, the capacitance of the capacitor element 100 can be sufficiently ensured. This makes it possible to suppress leakage current occurring between the conductor 110 and the conductor 120. Cut.

[0298] On the other hand, materials with high dielectric strength include silicon oxide, silicon oxynitride, and silicon nitride oxide. Silicon, silicon nitride, fluorine-doped silicon oxide, carbon-doped silicon oxide, Examples include silicon oxide doped with carbon and nitrogen, silicon oxide with pores, and resin. For example, silicon nitride film formed by ALD method, silicon oxide film formed by PEALD method The insulating film is made of a laminate of silicon nitride and silicon nitride formed by the ALD method. By using such an insulator with high dielectric strength, the dielectric strength is improved and the capacity is increased. Electrostatic breakdown of the capacitor 100 can be suppressed.

[0299] The conductor 120 is arranged to fill the openings formed in the insulators 140 and 114. The conductor 120 is connected to the wiring 10 via the conductor 112 and the conductor 153. The conductor 120 is formed by using the ALD method, the CVD method, or the like. For example, a conductor that can be used for the conductor 205 may be used. stomach.

[0300] In addition, since the transistor 200 includes an oxide semiconductor, the capacitor 100 Specifically, the transistor 200 including an oxide semiconductor has an off-state Since the current is small, when used in combination with the capacitor element 100, the stored contents can be maintained for a long period of time. It is possible to retain it.

[0301] <Wiring layer> Between each structure, a wiring layer including an interlayer film, wiring, plugs, etc. is provided. In addition, multiple wiring layers can be provided depending on the design. Conductors that function as wiring or wiring may be grouped together and given the same symbol. In addition, in this specification and the like, the wiring and the plug electrically connected to the wiring are integrated. That is, when a part of the conductor functions as a wiring, or when a part of the conductor It may also function as a plug.

[0302] For example, an insulator 320, an insulator 322, an insulator 323, and an insulator 324 are provided over the transistor 300 as interlayer films. The insulating member 320, the insulating member 324, and the insulating member 326 are stacked in this order. Insulators 322, 324, and 326 are provided with conductors 15 which function as terminals. 3, and a conductor 330, etc. are embedded. The conductors 328 and 330 function as plugs or wiring.

[0303] In addition, the insulator that functions as an interlayer film acts as a planarizing film that covers the uneven shape underneath. For example, the top surface of the insulator 322 may be subjected to chemical mechanical polishing (CMP) to improve flatness. The surface may be planarized by a planarization process using a CMP method or the like.

[0304] A wiring layer may be provided on the insulator 326 and the conductor 330. For example, in FIG. In this case, an insulator 350, an insulator 352, and an insulator 354 are stacked in this order. In addition, a conductor 356 is formed on the insulators 350, 352, and 354. The conductor 356 functions as a plug or a wiring.

[0305] On the insulator 354 and the conductor 356, the insulator 210, the insulator 212, the insulator 21 4, and an insulator 216 are laminated in this order. 12, insulator 214, and insulator 216 are provided with conductor 218 and transistor 200. The conductor 218 is embedded in the conductive material (conductor 205) that constitutes the transistor. It functions as a plug or wiring that electrically connects to the transistor 300 .

[0306] Also, the insulators 114, 140, 130, 150, and 15 4, the conductor 112 and the conductors constituting the capacitance element 100 (conductor 120, conductor The conductor 112 is embedded in the capacitor element 100, the transistor 200 or the transistor 300 and the conductor 153 functioning as a terminal. It acts as a plug or wire to connect.

[0307] In addition, a conductor 153 is provided on an insulator 154, and the conductor 153 is covered with an insulator 156. Here, the conductor 153 is in contact with the upper surface of the conductor 112, and the capacitance element 100 , function as a terminal of transistor 200 or transistor 300.

[0308] Insulators that can be used as the interlayer film include oxides and nitrides having insulating properties. oxides, oxynitrides, nitride oxides, metal oxides, metal oxynitrides, metal nitride oxides, etc. For example, by using a material with a low dielectric constant for the insulator that functions as an interlayer film, Therefore, depending on the function of the insulator, the material can be It's good to choose.

[0309] For example, the insulator 320, the insulator 322, the insulator 326, the insulator 352, the insulator 354, The insulators 212, 114, 150, 156, etc. are insulators with low relative dielectric constants. For example, the insulator may be silicon oxide, silicon oxynitride, or nitride. silicon oxide, silicon nitride, fluorine-doped silicon oxide, carbon-doped silicon oxide Silicon, silicon oxide doped with carbon and nitrogen, silicon oxide with voids, resin, etc. Alternatively, the insulator may be silicon oxide, silicon oxynitride, or nitride. silicon oxide, silicon nitride, fluorine-doped silicon oxide, carbon-doped silicon oxide silicon, carbon and nitrogen doped silicon oxide or silicon oxide with vacancies, and resin It is preferable that the silicon oxide and silicon oxynitride have a laminated structure. It is thermally stable, so when combined with resin, it can be used to create a laminated structure that is thermally stable and has a low dielectric constant. Examples of resins include polyester, polyolefin, polyolefin, and the like. Mido (nylon, aramid, etc.), polyimide, polycarbonate, acrylic, etc. .

[0310] In addition, the resistivity of the insulator provided above or below the conductor 152 or the conductor 153 is 1 .0×10 12 Ωcm or more 1.0×10 15 Ωcm or less, preferably 5.0×10 12 Ω cm or more 1.0×10 14 Ωcm or less, more preferably 1.0×10 13 Ωcm or more 5. 0×10 13 Ωcm or less. By setting the resistivity of the insulator to the above range, the insulator can maintain insulation properties while Wiring such as the transistor 200, the transistor 300, the capacitance element 100, and the conductor 152 The charge stored between the transistor and the semiconductor device is dispersed. This is preferable because it can suppress the deterioration of characteristics of the device and electrostatic breakdown. , silicon nitride, or silicon oxynitride can be used. For example, the insulator 160 Alternatively, the resistivity of the insulator 154 may be set within the above range.

[0311] In addition, a transistor using an oxide semiconductor can suppress the permeation of impurities such as hydrogen and oxygen. By surrounding the transistor with an insulator that has the function of suppressing the Therefore, the insulators 324, 350, 210, etc., do not contain impurities such as hydrogen. An insulator having a function of suppressing the permeation of impurities and oxygen may be used.

[0312] Examples of insulators that have the function of suppressing the permeation of impurities such as hydrogen and oxygen include: Boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon, phosphorus, salt Argon, Gallium, Germanium, Yttrium, Zirconium, Lanthanum, Neo Insulators containing zinc, hafnium or tantalum may be used in single or multilayer configurations. Specifically, as an insulator that has the function of suppressing the permeation of impurities such as hydrogen and oxygen, Aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, yttria oxide ammonium, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide or tungsten oxide Metal oxides such as talc, silicon nitride oxide, silicon nitride, etc. can be used. .

[0313] Conductors that can be used for wiring and plugs include aluminum, chromium, copper, silver, Gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium Sodium, niobium, manganese, magnesium, zirconium, beryllium, indium, Materials containing one or more metal elements selected from the group consisting of ruthenium and lithium can be used. Semiconductors with high electrical conductivity, such as polycrystalline silicon containing impurity elements such as silicon dioxide, Silicides such as nickel silicide may also be used.

[0314] For example, conductor 328, conductor 330, conductor 356, conductor 218, conductor 112, The conductors 152, 153, etc. may be metal materials, alloy materials, or the like formed from the above-mentioned materials. Conductive materials such as metal nitride materials or metal oxide materials are used as a single layer or in a laminated form. High-melting-point materials such as tungsten and molybdenum, which have both heat resistance and electrical conductivity, are used. It is preferable to use tungsten. Alternatively, aluminum or It is preferable to form the wiring layer from a low-resistance conductive material such as copper. The wiring resistance can be reduced.

[0315] <Wiring or plug in layer provided with oxide semiconductor> When an oxide semiconductor is used for the transistor 200, excess An insulator having an oxygen region may be provided. In this case, the insulator having the excess oxygen region An insulating material having a barrier property is provided between the insulating material and the conductor provided on the insulator having the excess oxygen region. It is preferable to provide a body.

[0316] For example, in FIG. 12, an insulating layer is formed between an insulator 280 having excess oxygen and a conductor 240. The insulator 241 and the insulator 274 are provided in contact with each other, The conductor 240 and the transistor 200 are sealed with an insulator having a barrier property. It can be structured so that

[0317] In other words, by providing the insulator 241, the excess oxygen contained in the insulator 280 is absorbed by the conductor 24 Furthermore, by having the insulator 241, it is possible to suppress the absorption of impurities. The diffusion of hydrogen, which is a substance, into the transistor 200 via the conductor 240 is suppressed. It is possible.

[0318] Here, the conductor 240 is electrically connected to the transistor 200 or the transistor 300. It functions as a connecting plug or wiring.

[0319] The above is a description of the configuration example. By using this configuration, It is possible to miniaturize or highly integrate semiconductor devices using transistors. Suppressing fluctuations in electrical characteristics in semiconductor devices using transistors having compound semiconductors In addition, reliability can be improved. In addition, a transistor having an oxide semiconductor with low off-state current can be provided. In addition, a semiconductor device with reduced power consumption can be provided. It is possible.

[0320] [Storage device 2] FIG. 13 shows an example of a semiconductor device (memory device) using the semiconductor device according to one embodiment of the present invention. The semiconductor device shown in FIG. 13 is similar to the semiconductor device shown in FIG. 200, a transistor 300, and a capacitor element 100. However, the semiconductor device shown in FIG. The semiconductor device is characterized in that the capacitor element 100 is a planar type, and the transistor 200 and the transistor This differs from the semiconductor device shown in FIG. 12 in that a resistor 300 is electrically connected.

[0321] In the semiconductor device according to one embodiment of the present invention, the transistor 200 is disposed above the transistor 300. The capacitor element 100 is provided above the transistor 300 and the transistor 200. The capacitance element 100 or the transistor 300 is at least partially a transistor. It is preferable that the capacitor element 100 and the transistor 200 overlap each other. 00 and the area occupied by the transistor 300 in top view can be reduced. This allows the semiconductor device according to this embodiment to be miniaturized or highly integrated.

[0322] The transistor 200 and the transistor 300 are the same as the transistor 20 0 and transistor 300 can be used. The above description can be taken into consideration for the transistors 300 and the layers including them. .

[0323] In the semiconductor device shown in FIG. 13, the wiring 2001 is electrically connected to the source of the transistor 300. The wiring 2002 is electrically connected to the drain of the transistor 300. The wiring 2003 is electrically connected to one of the source and drain of the transistor 200. The wiring 2004 is electrically connected to the first gate of the transistor 200, and the wiring 2005 is electrically connected to the first gate of the transistor 200. 006 is electrically connected to the second gate of the transistor 200. The gate of transistor 300 and the other of the source and drain of transistor 200 are connected to a capacitor. The wiring 2005 is electrically connected to one of the electrodes of the capacitor 100. In the following, the gate of the transistor 300 and the other of the source and the drain of the transistor 200 and one of the electrodes of the capacitor 100; The node to which is connected is sometimes called node FG.

[0324] The semiconductor device shown in FIG. 13 is configured such that the transistor 200 is switched on and off. The potential of the gate (node ​​FG) of the transistor 300 can be maintained, which allows for writing information. It can be written, stored, and read.

[0325] In addition, the semiconductor device shown in FIG. 13 is configured as a memory cell array by arranging the memory cells in a matrix. can be configured.

[0326] The layer including the transistor 300 has a structure similar to that of the semiconductor device shown in FIG. The structure below the insulator 354 can be understood from the above description.

[0327] On top of the insulator 354, the insulators 210, 212, 214, and 21 Here, the insulator 210, like the insulator 350, is free from impurities such as hydrogen. An insulator having a function of suppressing the permeation of substances and oxygen may be used.

[0328] The insulators 210, 212, 214, and 216 are connected to the conductors 218. The conductor 218 is embedded in the capacitor element 100, the transistor 200, or the transistor 218. It functions as a plug or wiring that electrically connects to the transistor 300. For example, Conductor 218 is electrically connected to conductor 316, which functions as the gate electrode of transistor 300. It continues.

[0329] The conductor 240 is electrically connected to the transistor 200 or the transistor 300. For example, the conductor 240 functions as a plug or wiring that connects the transistor 20 conductor 242b serving as the other of the source and drain of capacitor 100; The conductor 110 that functions as one of the poles is electrically connected via the conductor 240 .

[0330] The planar capacitor element 100 is provided above the transistor 200. The element 100 includes a conductor 110 that functions as a first electrode, a conductive layer 112 that functions as a second electrode, and a conductive layer 113 that functions as a second electrode. The conductive material 110 has a conductive body 120, and an insulator 130 that functions as a dielectric. The conductive body 120 and the insulator 130 may be the same as those described in the storage device 1. Cut.

[0331] The conductor 153 and the conductor 110 are provided in contact with the upper surface of the conductor 240. 53 is in contact with the top surface of the conductor 240 and is connected to the transistor 200 or the transistor 30 Functions as terminal 0.

[0332] The conductor 153 and the conductor 110 are covered with an insulator 130. The conductor 120 is arranged so as to overlap the conductor 110. An insulator 114 is disposed on the insulator 130 .

[0333] In addition, in FIG. 13, an example in which a planar type capacitance element is used as the capacitance element 100 is shown. However, the semiconductor device described in this embodiment is not limited to this. The capacitor element 100 may be a cylindrical capacitor element 100 as shown in FIG. .

[0334] This embodiment mode may be appropriately combined with the configurations described in other embodiment modes and examples. It is possible to implement.

[0335] (Embodiment 3) In this embodiment, FIGS. 14(A), 14(B), and 15(A) to 15(H) ) according to one embodiment of the present invention, A memory device to which a capacitor is applied (hereinafter, referred to as a The OS memory device is sometimes called an OS memory device. The memory device has a capacitor and an OS transistor that controls the charging and discharging of the capacitor. Since the off-state current of the S transistor is extremely small, the OS memory device has excellent retention characteristics. , it can function as a nonvolatile memory.

[0336] <Storage device configuration example> FIG. 14A shows an example of the configuration of an OS memory device. 411, and a memory cell array 1470. The peripheral circuit 1411 includes a row circuit 142 0, column circuitry 1430, output circuitry 1440, and control logic circuitry 1460. do.

[0337] The column circuitry 1430 includes, for example, a column decoder, a precharge circuit, a sense amplifier, a write The precharge circuit has a function of precharging the wiring. The amplifier has the function of amplifying the data signal read from the memory cell. The lines are wirings connected to memory cells in the memory cell array 1470. The amplified data signal is output via an output circuit 1440 as a data signal RDA TA to the outside of the storage device 1400. It has a decoder, a word line driver circuit, etc., and can select a row to be accessed.

[0338] The storage device 1400 is supplied with a low power supply voltage (VSS) from the outside as a power supply voltage, and a peripheral circuit 14 The high power supply voltage (VDD) for the 11 and the high power supply voltage (VIL) for the memory cell array 1470 are The storage device 1400 also receives control signals (CE, WE, RE), address signals, and The address signal ADDR and the data signal WDATA are input from the outside. The data signal WDATA is input to the write circuit. do.

[0339] The control logic circuit 1460 receives externally input control signals (CE, WE, R E) to generate control signals for the row decoder and column decoder. The control signal WE is a write enable signal, and the control signal R E is a read enable signal. The signal is not limited to this, and other control signals may be input as required.

[0340] The memory cell array 1470 includes a plurality of memory cells MC arranged in a matrix and a plurality of The wiring connecting the memory cell array 1470 and the row circuit 1420 is The number of lines is determined by the configuration of the memory cells MC, the number of memory cells MC in one row, etc. The number of wirings connecting the memory cell array 1470 and the column circuit 1430 is It is determined by the configuration of the memory cells MC, the number of memory cells MC in one row, etc.

[0341] In FIG. 14A, the peripheral circuit 1411 and the memory cell array 1470 are arranged on the same plane. Although an example in which the film is formed on a surface has been shown, the present embodiment is not limited to this. For example, as shown in FIG. 14B, the memory cell array 1411 is provided on a part of the peripheral circuit 1411. 70 may be provided so as to overlap the memory cell array 1470. For example, In this way, a sense amplifier may be provided.

[0342] 15(A) to 15(H) show memory cell configurations that can be applied to the above-described memory cell MC. An example will be described.

[0343] [DOSRAM] 15(A) to 15(C) show examples of circuit configurations of memory cells in a DRAM. In the literature, DRAM using a memory cell of one OS transistor and one capacitor element type is called DO SRAM(Dynamic Oxide Semiconductor Random) The memory cell 14 shown in FIG. 71 includes a transistor M1 and a capacitance element CA. The transistor M1 is It has a gate (sometimes called a top gate) and a back gate.

[0344] The first terminal of the transistor M1 is connected to the first terminal of the capacitance element CA, and the transistor M The second terminal of the transistor M1 is connected to the wiring BIL, and the gate of the transistor M1 is connected to the wiring WOL. The back gate of the transistor M1 is connected to the wiring BGL. The second terminal of A is connected to the wiring CAL.

[0345] The wiring BIL functions as a bit line, and the wiring WOL functions as a word line. CAL functions as a wiring for applying a predetermined potential to the second terminal of the capacitive element CA. When writing and reading data, a low level potential is applied to the wiring CAL. The wiring BGL is preferably used to apply a potential to the back gate of the transistor M1. By applying an arbitrary potential to the wiring BGL, The threshold voltage of M1 can be increased or decreased.

[0346] Here, the memory cell 1471 shown in FIG. 15A corresponds to the memory device shown in FIG. That is, the transistor M1 is the transistor 200, and the capacitance element CA is the capacitance element 10. 0, wiring BIL is wiring 1003, wiring WOL is wiring 1004, wiring BGL is wiring 1 006, the wiring CAL corresponds to the wiring 1005. The memory device 300 is a peripheral circuit 1400 shown in FIG. 14(A) and FIG. 14(B). 11.

[0347] Furthermore, the memory cells MC are not limited to the memory cells 1471, and the circuit configuration may be changed. For example, the memory cell MC can be configured as a memory cell 1472 shown in FIG. In addition, the back gate of the transistor M1 is connected to the wiring WOL instead of the wiring BGL. For example, the memory cell MC may be configured as the memory cell 14 shown in FIG. 73, a transistor with a single gate structure, i.e., a transistor without a back gate. The memory cell may be configured with a transistor M1.

[0348] When the semiconductor device described in the above embodiment is used for the memory cell 1471 or the like, The transistor 200 is used as M1, and the capacitance element 100 is used as the capacitance element CA. By using an OS transistor as the transistor M1, This makes it possible to make the leakage current of the transistor M1 very small. The transistor M1 allows the data to be retained for a long time, reducing the frequency of refreshing the memory cells. Alternatively, the refresh operation of the memory cells can be eliminated. In addition, since the leakage current is very small, the memory cell 1471 and the memory cell 14 72, multi-value data or analog data can be stored in the memory cell 1473. Cut.

[0349] In addition, in the DOSRAM, as described above, the memory cell array 1470 is overlapped with the By providing a sense amplifier as described above, the bit line can be shortened. This reduces the bit line capacitance and the storage capacitance of the memory cell.

[0350] [NOSRAM] 15(D) to 15(G) show a gain cell type memory having two transistors and one capacitor element. The memory cell 1474 shown in FIG. 15D includes a transistor M The transistor M2 has a capacitance element CB. The present specification etc. In the present invention, a gain cell type memory cell using an OS transistor as the transistor M2 is provided. The storage device is called NOSRAM (Nonvolatile Oxide Semiconductor It is sometimes called ductor RAM.

[0351] The first terminal of the transistor M2 is connected to the first terminal of the capacitance element CB, and the transistor M The second terminal of the transistor M2 is connected to the wiring WBL, and the gate of the transistor M3 is connected to the wiring WOL. The back gate of the transistor M2 is connected to the wiring BGL. The second terminal of transistor B is connected to the line CAL. The first terminal of transistor M3 is connected to the line R BL, the second terminal of the transistor M3 is connected to the line SL, and the second terminal of the transistor M The gate of 3 is connected to the first terminal of the capacitance element CB.

[0352] The wiring WBL functions as a write bit line, and the wiring RBL functions as a read bit line. The wiring WOL functions as a word line. The wiring CAL functions as the second wiring of the capacitance element CB. It functions as a wiring for applying a predetermined potential to the terminal. During the data read operation, a low level potential is applied to the wiring CAL. The wiring BGL is a wiring for applying a potential to the back gate of the transistor M2. By applying an arbitrary potential to the wiring BGL, the The threshold voltage can be increased or decreased.

[0353] Here, the memory cell 1474 shown in FIG. 15(D) corresponds to the memory device shown in FIG. That is, the transistor M2 is connected to the transistor 200, and the capacitance element CB is connected to the capacitance element 10. 0, the transistor M3 is connected to the transistor 300, the wiring WBL is connected to the wiring 2003, and the wiring W OL is connected to wiring 2004, wiring BGL is connected to wiring 2006, wiring CAL is connected to wiring 2005, The line RBL corresponds to the wiring 2002, and the wiring SL corresponds to the wiring 2001.

[0354] Furthermore, the memory cells MC are not limited to the memory cells 1474, and the circuit configuration may be changed as appropriate. For example, the memory cell MC can be the memory cell 1475 shown in FIG. In this way, the back gate of the transistor M2 is connected to the wiring WOL instead of the wiring BGL. For example, the memory cell MC may be the memory cell shown in FIG. Like the 1476, it is a single-gate transistor, i.e., it does not have a back gate. The memory cell may be configured with a transistor M2. As shown in FIG. 15G, the wiring WBL and the wiring RBL are connected in a single line. The wiring BIL may be integrated.

[0355] When the semiconductor device described in the above embodiment is used for the memory cell 1474 or the like, The transistor 200 is used as the transistor M2, and the transistor 300 is used as the transistor M3. The capacitance element CB can be a capacitance element 100. By using an OS transistor, the leakage current of transistor M2 is made very small. This allows the written data to be stored for a long time by the transistor M2. Since the memory cells can be maintained at the same level, the frequency of refreshing the memory cells can be reduced. Alternatively, the refresh operation of the memory cells can be made unnecessary. Because it is so small, it is possible to store multi-value data or analog data in the memory cell 1474. The same applies to memory cells 1475 to 1477.

[0356] The transistor M3 is a transistor having silicon in the channel forming region (hereinafter referred to as The conductivity type of the Si transistor may be The Si transistor may be an n-channel type or a p-channel type. The field effect mobility may be higher than that of a read transistor. A Si transistor may be used as the transistor M3 that functions as a By using a Si transistor for transistor M3, a transistor can be stacked on top of transistor M3. Since the memory cell can be provided with the transistor M2, the area occupied by the memory cell can be reduced, and the memory device can be made more efficient. Integration can be achieved.

[0357] The transistor M3 may be an OS transistor. When an OS transistor is used for the transistor M3, the memory cell array 1470 is The circuit can be constructed using only transistors.

[0358] FIG. 15(H) shows an example of a gain cell type memory cell with three transistors and one capacitor. The memory cell 1478 shown in FIG. 15(H) includes transistors M4 to M 6 and a capacitor CC. The capacitor CC is provided as appropriate. is electrically connected to the wiring BIL, wiring RWL, wiring WWL, wiring BGL, and wiring GNDL. The wiring GNDL is a wiring that applies a low level potential. The wiring 478 may be electrically connected to the wiring RBL and the wiring WBL instead of the wiring BIL.

[0359] The transistor M4 is an OS transistor having a back gate. The back gate and gate of the transistor M4 are electrically connected to the wiring BGL. Alternatively, the transistor M4 may have a back gate. It's not necessary.

[0360] The transistors M5 and M6 are n-channel Si transistors. Alternatively, the transistors M4 to M5 may be p-channel Si transistors. In this case, the memory cell array 1470 may be an n-type transistor. The circuit can be constructed using only transistors.

[0361] When the semiconductor device described in the above embodiment is used for the memory cell 1478, the transistor M The transistor M4 is a transistor 200, and the transistors M5 and M6 are transistors M1 and M2. The transistor 300 can be used as the capacitor element CC, and the capacitor element 100 can be used as the capacitor element CC. By using an OS transistor as the transistor M4, the leakage current of the transistor M4 can be reduced. The flow can be very small.

[0362] Note that the configurations of the peripheral circuit 1411, the memory cell array 1470, and the like shown in this embodiment are These circuits, and the wiring and circuits connected to the circuits, The arrangement or function of road elements etc. may be changed, deleted or added as required.

[0363] The structure shown in this embodiment mode may be combined as appropriate with structures shown in other embodiment modes, examples, etc. It can be used as such.

[0364] (Fourth embodiment) In this embodiment, a semiconductor device of the present invention will be described with reference to FIGS. 16(A) and 16(B). The chip 1200 includes a plurality of circuits (system In this way, the technology of integrating multiple circuits (systems) on a single chip is This technology is sometimes called a System on Chip (SoC). .

[0365] As shown in FIG. 16(A), the chip 1200 includes a CPU 1211, a GPU 1212, and a or a plurality of analog arithmetic units 1213, one or a plurality of memory controllers 1214, Or a plurality of interfaces 1215, one or more network circuits 1216, etc. Has.

[0366] The chip 1200 is provided with bumps (not shown), and as shown in FIG. 16(B), Printed Circuit Board (PCB) 1201 No.1 The first surface of the PCB 1201 is connected to the second surface. It is provided and connected to the motherboard 1203.

[0367] The motherboard 1203 is equipped with memory devices such as a DRAM 1221 and a flash memory 1222. For example, the DRAM 1221 may be provided with a DOSR as shown in the previous embodiment. For example, the flash memory 1222 may be configured as The NOSRAM shown in FIG.

[0368] The CPU 1211 preferably has multiple CPU cores. It is preferable that the CPU 1211 and the GPU 1212 have multiple GPU cores. Each of the CPs 212 may have a memory for temporarily storing data. The memory common to U1211 and GPU1212 is provided on chip 1200. The memory may be the above-mentioned NOSRAM or DOSRAM. The GPU1212 is also suitable for parallel calculation of large amounts of data, and is ideal for image processing and multiply-and-accumulate operations. The GPU 1212 can be used as an image processing circuit or By providing a multiply-and-accumulate circuit, image processing and multiply-and-accumulate operations can be performed with low power consumption. This becomes possible.

[0369] In addition, the CPU 1211 and GPU 1212 are mounted on the same chip, The wiring between the CPU1211 and GPU1212 can be shortened, and Data transfer from CPU 1211 to GPU 1212, memory After the data transfer between the GPUs and the calculations in GPU1212, the GPU1212 transfers the data to CPU12. The calculation results can be transferred to 11 at high speed.

[0370] The analog calculation unit 1213 includes an A / D (analog / digital) conversion circuit and a D / A (digital The analog calculation unit 1213 has one or both of a digital / analog conversion circuit. The product-sum calculation circuit may be provided in the

[0371] The memory controller 1214 is a circuit that functions as a controller for the DRAM 1221. , and a circuit that functions as an interface to the flash memory 1222.

[0372] The interface 1215 includes a display device, a speaker, a microphone, a camera, a computer, and the like. The controller has an interface circuit with external devices such as a This includes devices such as mice, keyboards, and game controllers. USB (Universal Serial Bus), HDMI (registered trademark) High-Definition Multimedia Interface) You can be there.

[0373] The network circuit 1216 is a LAN (Local Area Network) or the like. It also has a circuit for network security. Good too.

[0374] The above circuits (systems) can be formed on the chip 1200 in the same manufacturing process. Therefore, even if the number of circuits required for the chip 1200 increases, the manufacturing process can be increased. This eliminates the need for a soldering iron, and the chip 1200 can be produced at low cost.

[0375] A PCB 1201 on which a chip 1200 having a GPU 1212 is mounted, a DRAM 122 1 and a motherboard 1203 provided with a flash memory 1222. It can be called module 1204.

[0376] The GPU module 1204 includes a chip 1200 using SoC technology. Its size can be reduced. Also, it has excellent image processing capabilities, making it suitable for smart devices. Phones, tablets, laptops, portable (portable) game consoles, etc. It is suitable for use in portable electronic devices. Deep neural networks (DNNs), convolutional neural networks (CNN), recurrent neural network (RNN), autoencoder, deep Boltzmann It can implement techniques such as deep belief networks (DBM) and deep belief networks (DBN). Therefore, the chip 1200 is an AI chip, or the GPU module 1204 is an AI system module. It can be used as a module.

[0377] The structure shown in this embodiment mode may be combined as appropriate with structures shown in other embodiment modes, examples, etc. It can be used as such.

[0378] (Embodiment 5) This embodiment mode will describe an application example of a memory device using the semiconductor device described in the above embodiment. The semiconductor device described in the above embodiment can be used in various electronic devices (for example, Terminals, computers, smartphones, e-book readers, digital cameras (including video cameras) The present invention can be applied to storage devices such as video recorders, video playback devices, and navigation systems. Here, computers include tablet computers, notebook computers, desktop computers, This includes desktop computers as well as large computers such as server systems. Alternatively, the semiconductor device described in the above embodiment may be used in a memory card (for example, an SD card). Various removable drives such as flash drives, USB flash drives, and SSDs (Solid State Drives) The present invention is applicable to removable storage devices. Figures 17(A) to 17(E) show some examples of removable storage devices. For example, the semiconductor device described in the above embodiment may be a packaged semiconductor device. It is processed into memory chips and used in various storage devices and removable memory. can be.

[0379] 17A is a schematic diagram of a USB memory. The USB memory 1100 is a housing 1101. 1102, a USB connector 1103, and a substrate 1104. 4 is housed in a housing 1101. For example, the substrate 1104 includes a memory chip 110 5, the controller chip 1106 is installed. The semiconductor device shown in the embodiment can be incorporated.

[0380] Figure 17(B) is a schematic diagram of the external appearance of an SD card, and Figure 17(C) is a schematic diagram of the internal structure of an SD card. The SD card 1110 is a schematic diagram of the structure. The SD card 1110 comprises a housing 1111, a connector 1112, and a base. The substrate 1113 is housed in a housing 1111. For example, 13 has a memory chip 1114 and a controller chip 1115 attached thereto. By providing a memory chip 1114 on the back side of the substrate 1113, the SD card 1110 The capacity can be increased. In addition, a wireless chip having a wireless communication function can be installed on the substrate 1113. This allows the host device and the SD card 1110 to communicate wirelessly. This allows data to be read from and written to the memory chip 1114. The semiconductor device described in the above embodiment can be incorporated into such a device.

[0381] FIG. 17(D) is a schematic diagram of the external appearance of the SSD, and FIG. 17(E) is a schematic diagram of the internal structure of the SSD. The SSD 1150 includes a housing 1151, a connector 1152, and a board 1153. The substrate 1153 is housed in the housing 1151. For example, the substrate 1153 has a memory The memory chip 1154, memory chip 1155, and controller chip 1156 are installed. The memory chip 1155 is a working memory for the controller chip 1156. For example, a DOSRAM chip may be used. By providing the memory chip 115, the capacity of the SSD 1150 can be increased. The semiconductor device described in the above embodiment can be incorporated into the semiconductor device 4 or the like.

[0382] This embodiment may be implemented by appropriately combining with the configurations described in other embodiments, examples, etc. It is possible to do this.

[0383] (Sixth embodiment) A semiconductor device according to one aspect of the present invention is a processor such as a CPU or a GPU, or a chip. 18A to 18H show a CPU according to one embodiment of the present invention. Specific examples of electronic devices equipped with processors or chips such as GPUs are given below.

[0384] <Electronic devices and systems> The GPU or chip according to one embodiment of the present invention can be mounted in various electronic devices. Examples of electronic devices include television sets, desktop or notebook computers, Monitors for information terminals, digital signage (Digital Signage) In addition to electronic devices with relatively large screens, such as billboards, large game machines such as pachinko machines, , digital cameras, digital video cameras, digital photo frames, e-book readers Examples include mobile phones, portable game consoles, personal digital assistants, and audio playback devices. Furthermore, by providing an electronic device with a GPU or chip according to one aspect of the present invention, the electronic device It can be equipped with artificial intelligence.

[0385] The electronic device according to one embodiment of the present invention may include an antenna. By doing so, it is possible to display images, information, etc. on the display unit. If the device has a secondary battery, the antenna may be used for contactless power transmission.

[0386] The electronic device according to one embodiment of the present invention includes a sensor (force, displacement, position, velocity, acceleration, angular velocity, rotation Number, distance, light, liquid, magnetism, temperature, chemicals, sound, time, hardness, electric field, current, voltage, power (including the ability to measure radiation, flow rate, humidity, gradient, vibration, odor or infrared) It may have.

[0387] The electronic device of one embodiment of the present invention can have various functions. (still images, videos, text images, etc.) on the display, touch panel function, calendar Functions such as displaying date and time, running various software (programs) functions, wireless communication functions, and functions to read programs or data recorded on recording media. 18A to 18H show examples of electronic devices.

[0388] [Information terminal] FIG. 18(A) illustrates a mobile phone (smartphone), which is a type of information terminal. The information terminal 5100 has a housing 5101 and a display unit 5102. As an interface, a touch panel is provided on the display unit 5102, and buttons are provided on the housing 510. It is provided in 1.

[0389] The information terminal 5100 uses a chip according to one embodiment of the present invention to perform a function using artificial intelligence. It is possible to run applications that utilize artificial intelligence. For example, the application recognizes conversations and displays the conversation contents on the display unit 5102. The display unit 5102 recognizes characters, figures, etc. input by the user on the touch panel. The application to be displayed on the display unit 5102, the application to perform biometric authentication such as fingerprint or voiceprint, etc. Applications, etc.

[0390] FIG. 18(B) shows a notebook information terminal 5200. 200 includes a main body 5201 of the information terminal, a display unit 5202, and a keyboard 5203. do.

[0391] The notebook information terminal 5200 is similar to the information terminal 5100 described above. The chip can be used to run applications that use artificial intelligence. Examples of applications that use artificial intelligence include design support software, Examples include software for correcting meals and software for automatically generating menus. By using the 5200, new artificial intelligence can be developed.

[0392] In the above, a smartphone and a notebook-type information terminal are used as examples of electronic devices. 18(A) and 18(B), respectively, are shown for a smartphone and a notebook. Information terminals other than information terminals can be applied. Smartphones and notebook-type information terminals Examples of information terminals other than terminals include PDAs (Personal Digital Assistants). Examples include a personal computer, a desktop information terminal, and a workstation.

[0393] [Game consoles] FIG. 18(C) shows a portable game machine 5300, which is an example of a game machine. The system device 5300 includes a housing 5301, a housing 5302, a housing 5303, a display unit 5304, a connection unit The housing 5302 and the housing 5303 are connected to each other. The connector 5305 provided on the housing 5301 can be removed from the housing 5301. By attaching it to another housing (not shown), the image output on the display unit 5304 can be displayed as another image. In this case, the housing 5302 and the housing 5303 can output the image to an imaging device (not shown). 03 can function as an operation unit. This allows multiple players to The game can be played simultaneously. The chip shown in the previous embodiment can be incorporated into a chip provided on a substrate. .

[0394] FIG. 18(D) shows a stationary game machine 5400, which is an example of a game machine. A controller 5402 is connected to the stationary game console 5400 wirelessly or by wire. It is being done.

[0395] One embodiment of the present invention is applied to a game machine such as a portable game machine 5300 or a stationary game machine 5400. By applying the GPU or chip, it is possible to realize a low-power game console. In addition, low power consumption reduces heat generation from the circuit, so This reduces the influence on the circuit itself, peripheral circuits, and modules.

[0396] Furthermore, by applying a GPU or chip according to one embodiment of the present invention to the portable game console 5300, Therefore, a portable game device 5300 having artificial intelligence can be realized.

[0397] Originally, the progress of the game, the behavior of the creatures that appear in the game, the phenomena that occur in the game, etc. The expression is determined by the program that the game has, but the portable game machine 530 By applying artificial intelligence to 0, it becomes possible to express things that are not limited to game programs. For example, the content of the player's questions, the game progress, the time, and the characters that appear in the game. This makes it possible to express how a person's behavior changes depending on the situation.

[0398] In addition, when playing games that require multiple players on the handheld game console 5300, artificial intelligence This allows you to create anthropomorphic game players, so you can turn your opponents into AI. By using multiple game players, you can play the game alone.

[0399] In Fig. 18(C) and Fig. 18(D), a portable game machine and a stationary game machine are shown as examples of game machines. Although the figure shows a gaming machine, it is not intended to be a game machine that applies the GPU or chip of one embodiment of the present invention. The game machine to which the GPU or chip of one embodiment of the present invention is applied is not limited to this. For example, arcade games installed in entertainment facilities (game centers, amusement parks, etc.) Examples include pitching machines for batting practice installed at sports facilities.

[0400] [Mainframe Computer] The GPU or chip according to one embodiment of the present invention can be applied to a mainframe computer.

[0401] FIG. 18(E) shows a supercomputer 5500, which is an example of a large computer. FIG. 18(F) shows the rack-mounted type 55 is a diagram showing a computer 5502.

[0402] The Supercomputer 5500 is a rack-mounted computing The computers 5502 are stored in a rack 5501. The computer 5502 is provided with a plurality of substrates 5504, on which the above-mentioned implementations are The GPU or chip described in the embodiment can be mounted.

[0403] The Supercomputer 5500 is a large computer primarily used for scientific and technological calculations. Scientific and technical calculations require high speed processing of huge amounts of calculations, which consumes a lot of power. The chip generates a large amount of heat. By applying this chip, it is possible to realize a low-power supercomputer. In addition, low power consumption reduces heat generation from the circuit, so This reduces the influence on the circuit itself, peripheral circuits, and modules.

[0404] In Figure 18(E) and Figure 18(F), a supercomputer is used as an example of a large computer. Although the present invention is not limited to the GPU or chip shown in FIG. The present invention is not limited to the above. Examples of such computers include computers that provide services (servers), large general-purpose computers, Examples include computer (mainframe).

[0405] [Moving object] The GPU or chip of one embodiment of the present invention is used in automobiles, which are moving objects, and in the driver's seat of the automobile. It can be applied to the surrounding area.

[0406] FIG. 18(G) shows the area around the windshield in the interior of an automobile, which is an example of a moving object. In FIG. 18(G), a display panel 5701 attached to a dashboard, In addition to the display panel 5702 and the display panel 5703, the display panel 570 attached to the pillar 4 is shown.

[0407] The display panels 5701 to 5703 display a speedometer, a tachometer, It provides various information by displaying the driving distance, fuel gauge, gear status, air conditioning settings, etc. In addition, the display items and layout displayed on the display panel can be adjusted by the user. It can be changed as needed to suit your taste, enhancing the design. The display panels 5701 to 5703 can also be used as lighting devices.

[0408] The display panel 5704 displays an image from an imaging device (not shown) installed in the car. By projecting this image, it is possible to compensate for the blind spot obstructed by the pillar. That is, blind spots are compensated for by displaying images from an imaging device installed on the outside of the vehicle. This can increase safety. In addition, by projecting images that complement the invisible parts, The display panel 5704 is a lighting device. It can also be used as.

[0409] The GPU or chip of one embodiment of the present invention can be applied as a component of artificial intelligence, e.g. For example, the chip can be used in an autonomous driving system for automobiles. This can be used in systems that provide road guidance, risk prediction, etc. The display panel 5704 may be configured to display information such as road guidance and risk prediction. .

[0410] In the above description, an automobile is used as an example of a moving body. For example, the moving object may be a train, a monorail, a ship, an aircraft (helicopter, These include vehicles such as drones, airplanes, and rockets. Applying the chip of one aspect of the present invention to a moving object and providing it with a system that utilizes artificial intelligence can be done.

[0411] [electric appliances] FIG. 18(H) shows an electric refrigerator-freezer 5800, which is an example of an electric appliance. The refrigerator 5800 includes a housing 5801, a refrigerator door 5802, a freezer door 5803, and the like. do.

[0412] By applying the chip of one embodiment of the present invention to the electric refrigerator-freezer 5800, artificial intelligence By utilizing artificial intelligence, an electric refrigerator-freezer 5800 can be realized. The Electric Refrigerator-Freezer 5800 is a refrigerator-freezer that can be used to store food and drink. It has a function to automatically generate menus based on the expiration date of ingredients, and a function to automatically generate menus based on the expiration date of ingredients stored in the electric refrigerator-freezer 5800. It can have a function to automatically adjust the temperature to suit the ingredients being cooked.

[0413] We have explained the electric refrigerator-freezer as an example of an electrical appliance, but other electrical appliances include For example, vacuum cleaners, microwave ovens, electric ovens, rice cookers, water heaters, induction cookers, water heaters, computer servers, heating and cooling appliances including air conditioners, washing machines, dryers, audio equipment Visual equipment, etc.

[0414] Electronic devices described in the present embodiment, functions of the electronic devices, application examples of artificial intelligence, and their effects etc. can be appropriately combined with descriptions of other electronic devices.

[0415] This embodiment may be implemented by appropriately combining with the configurations described in other embodiments, examples, etc. It is possible to do this. [Example]

[0416] In this example, in the laminated structure of metal oxide and TaNxOy, the metal oxide is The ease of diffusion of hydrogen and oxygen into NxOy was evaluated. The samples (Samples 1A to 4A, Sample 1B) were prepared by depositing aNxOy film and then heat-treating the film. SIMS analysis was performed on Samples 1B to 4B.

[0417] The manufacturing methods of Samples 1A to 4A will be described below.

[0418] The surface of a silicon-containing substrate is heat-treated in a hydrogen chloride (HCl) atmosphere, and 1 A silicon oxide film having a thickness of 0.00 nm was then formed on the silicon oxide film by sputtering. A metal oxide film was formed to a thickness of 50 nm by the method. Using an In-Ga-Zn oxide target with an atomic ratio of Ga:Zn=4:2:4.1, The deposition gas was argon gas containing 5% deuterium (D2) at 30 sccm and oxygen gas at 15 sccm, the deposition pressure was 0.4 Pa, the deposition power was 200 W, and the substrate temperature was room temperature. This allows the deposition of a metal oxide film containing deuterium (D). do.

[0419] Next, a TaNxOy film was deposited on the metal oxide film to a thickness of 100 nm by sputtering. The TaNxOy film was deposited using a metal tantalum target. The gas used was argon gas at 50sccm and nitrogen gas at 10sccm, and the deposition pressure was 0. The pressure was 6 Pa, the deposition power was 1 kW, the substrate temperature was room temperature (RT), and the target and substrate The spacing between the plates was 60 mm.

[0420] Next, a heat treatment was carried out. For Samples 1A to 4A, the temperature of the heat treatment was Specifically, Sample 1A was not subjected to heat treatment. Sample 3A was heat-treated in a nitrogen atmosphere at 300°C for 1 hour. The sample was then heat-treated in a nitrogen atmosphere at 350°C for 1 hour. Heat treatment was carried out in a nitrogen atmosphere at 400°C for 1 hour.

[0421] As described above, Samples 1A to 4A were fabricated.

[0422] Next, a method for manufacturing Samples 1B to 4B will be described.

[0423] The surface of a silicon-containing substrate is heat-treated in a hydrogen chloride (HCl) atmosphere, and 1 A silicon oxide film with a thickness of 0.00 nm was then formed on the silicon oxide film by the CVD method. A silicon oxynitride film was formed to a thickness of 300 nm. The deposition gases used were silane (SiH4) gas at 2.3 sccm and nitrous oxide (N2O) gas. The deposition pressure was 40 Pa and the deposition power was 50 W (27.12 MHz) ), the substrate temperature was 400°C, and the distance between the electrodes was 15 mm.

[0424] Next, oxygen ions ( 16 O + ) Note The conditions for oxygen ion implantation were an acceleration voltage of 60 keV and a dose of 2.0 × 10 16 io ns / cm 2 , tilt angle 0°, and twist angle 0°.

[0425] Next, a metal oxide film was formed on the silicon oxynitride film to a thickness of 20 nm by sputtering. The metal oxide film was deposited with a thickness of In:Ga:Zn=4:2:4.1 [primary The In-Ga-Zn oxide target was used with a molecular weight ratio of 1.001 and oxygen ( 18 O2) The gas was 45 sccm, the deposition pressure was 0.7 Pa, the deposition power was 500 W, and the substrate temperature was The temperature was set to 200°C, and the distance between the target and the substrate was set to 60 mm. 18 O A metal oxide film containing the metal oxide can be formed.

[0426] Next, the first heat treatment was carried out at a temperature of 400° C. in a nitrogen atmosphere for 1 hour. After the treatment, the sample was continuously treated in an oxygen atmosphere at 400°C for 1 hour. .

[0427] Next, a TaNxOy film was formed on the metal oxide film by sputtering to a thickness of 50 nm. The TaNxOy film was deposited using a metal tantalum target. Argon gas was used at 50 sccm and nitrogen gas at 10 sccm. The deposition pressure was 0.6 The film formation power was 1 kW, the substrate temperature was room temperature (RT), and the target and substrate The distance between them was set to 60 mm.

[0428] Next, a second heat treatment was performed. Samples 1B to 4B were subjected to the second heat treatment. Specifically, the second heat treatment was not performed on Sample 1B. Sample 2B was heat treated in a nitrogen atmosphere at 300°C for 1 hour. Sample 3B was heat treated at 350°C for 1 hour in a nitrogen atmosphere. For PLL 4B, heat treatment was performed in a nitrogen atmosphere at 400°C for 1 hour.

[0429] As a result, Samples 1B to 4B were fabricated.

[0430] For Samples 1A to 4A, a SIMS analysis was performed to determine the TaNxOy The deuterium (D) concentration of the sample was evaluated. Note that the SIMS analysis was performed from the surface side of the sample. In addition, for Samples 1B to 4B, TaNx Oxygen in Oy ( 18The SIMS analysis was performed from the surface side of the sample. It is.

[0431] The deuterium (D) concentration and oxygen( 18 O) concentration profiles are shown in Figures 19(A) and 19(B), respectively.

[0432] FIG. 19A shows the deuterium (D) concentration in the TaNxOy films of Samples 1A to 4A. 19(A) shows the profile of the intensity of the sample. In FIG. 19(A), the horizontal axis is the angle perpendicular to the film surface of the sample. The vertical axis is the depth [nm] in the direction of the deuterium (D) concentration in TaNxOy [atoms / cm 3 19(A) represents the TaNxOy film of Sample 1A. The dotted line in FIG. 19(A) shows the deuterium (D) concentration profile of sample 2A. The dashed line in Figure 19(A) shows the profile of the deuterium (D) concentration in the TaNxOy film. , the profile of deuterium (D) concentration in the TaNxOy film of sample 3A, and The solid line in A) shows the profile of deuterium (D) concentration in the TaNxOy film of sample 4A. is.

[0433] From Figure 19(A), the diffusion length of deuterium (D) from the metal oxide film to the TaNxOy film is Sample 4A was the largest, followed by Sample 3A, and then Sample 2A. In particular, in sample 4A, deuterium (D) in the metal oxide film is absorbed by several tens of nanometers into the TaNxOy film. Therefore, as the heat treatment temperature increases, deuterium (D) diffuses into TaN It was confirmed that hydrogen in the metal oxide diffused further into the TaNxO film. It can be said that it easily diffuses into the y.

[0434] FIG. 19(B) shows the oxygen ( 18 O) 19(B) shows the concentration profile. In FIG. 19(B), the horizontal axis is perpendicular to the film surface of the sample. The vertical axis is the depth [nm] in the normal direction, and the vertical axis is the oxygen ( 18 O) Concentration [atom s / cm 3 19B. The long dashed line in FIG. 19B indicates the TaNxOy Oxygen in the film ( 18 O) concentration profile, and the dotted line in Figure 19(B) represents the sample Oxygen in the TaNxOy film of 2B ( 18 O) concentration profile, shown in Figure 19(B). The dashed line indicates the oxygen ( 18 O) concentration profile 19B, the solid line indicates the oxygen ( 18 O) Concentration In the area (depth) enclosed by the dashed line in Figure 19(B), 18 Detected amount of O is saturated.

[0435] As shown in FIG. 19(B), in comparison with Sample 1B, Sample 4B has a higher SiO2 content due to the second heat treatment. The oxygen in the metal oxide film ( 18 O) was diffused into the TaNxOy film by several nanometers. Compared with Sample 1B, Samples 2B and 3B were subjected to the second heat treatment. Even if the oxygen in the metal oxide film ( 18 O) is not diffused much in the TaNxOy film, The oxygen ( 18 O) The concentration profile is approximate. It matched.

[0436] From the above, when a heat treatment is performed on a laminated structure of a metal oxide and TaNxOy, At low temperatures (e.g., below 350°C), hydrogen in the metal oxide diffuses into TaNxOy. Therefore, oxygen in the metal oxide is difficult to diffuse into TaNxOy, and the oxidation of TaNxOy or It can be said that the formation of a layer between the metal oxide and TaNxOy is difficult to proceed. For example, at temperatures above 400°C, hydrogen in the metal oxide diffuses into TaNxOy first. After a delay, oxygen in the metal oxide diffuses into TaNxOy, oxidizing TaNxOy. It is presumed that the formation of a layer between the metal oxide and TaNxOy proceeds.

[0437] The configurations, methods, etc. shown in this example may be at least partially similar to other examples described in this specification. The present invention can be implemented in appropriate combination with the embodiments and examples. [Example]

[0438] In this example, in the laminated structure of metal oxide and TaNxOy, the metal oxide is The ease of hydrogen diffusion into NxOy was evaluated. Specifically, TaNxOy was deposited on a metal oxide film. The samples with Ta on the metal oxide film (Sample 1C to Sample 5C) For the samples (Sample 1D to Sample 5D) that were formed with an NxOy film and then heat-treated, SIMS analysis was performed.

[0439] The manufacturing methods of Samples 1C to 5C will be described below.

[0440] The surface of a silicon-containing substrate is heat-treated in a hydrogen chloride (HCl) atmosphere, and 1 A silicon oxide film having a thickness of 0.00 nm was then formed on the silicon oxide film by sputtering. A metal oxide film was formed to a thickness of 50 nm by the method. Using an In-Ga-Zn oxide target with an atomic ratio of Ga:Zn=4:2:4.1, The deposition gas was argon gas containing 5% deuterium (D2) at 30 sccm and oxygen gas at 15 sccm, the deposition pressure was 0.4 Pa, the deposition power was 200 W, and the substrate temperature was room temperature. This allows the deposition of a metal oxide film containing deuterium (D). do.

[0441] Next, a TaNxOy film was deposited on the metal oxide film to a thickness of 100 nm by sputtering. The TaNxOy film was deposited using a metal tantalum target. The pressure was set to 0.6 Pa, the deposition power was set to 1 kW, the substrate temperature was set to room temperature (RT), and the temperature The distance between the get and the substrate was set to 60 mm.

[0442] In addition, in Samples 1C to 5C, the flow rate of the deposition gas used for depositing the TaNxOy film was Specifically, for sample 1C, argon gas was 55 sccm and nitrogen gas was 5 s For sample 2C, argon gas was used at 50 sccm and nitrogen gas at 10 s For sample 3C, argon gas was used at 40 sccm and nitrogen gas at 20 sccm. For sample 4C, argon gas was used at 30 sccm and nitrogen gas at 30 sccm. For sample 5C, argon gas was used at 10 sccm and nitrogen gas at 50 s ccm was used.

[0443] As a result of the above, Samples 1C to 5C were fabricated.

[0444] The higher the ratio of the nitrogen gas flow rate to the above-mentioned film-forming gas flow rate, the thicker the TaNxOy film. In this case, the atomic ratio of nitrogen to tantalum becomes higher. The atomic ratio of nitrogen to tantalum is as follows: Sample 5C, Sample 4C, Sample 3C, The highest scores are for sample 2C and sample 1C.

[0445] The methods for fabricating Samples 1D to 5D are described below. The fabrication methods for samples 1D to 5D are the same as those for samples 1D to 5D up to the step of forming the TaNxOy film. The fabrication method is the same as that of Samples 1C to 5C.

[0446] Next, a heat treatment was carried out. The heat treatment was carried out in a nitrogen atmosphere at a temperature of 400°C for 1 hour. Sample 1D was a sample with the same structure as sample 1C. Sample 2D is a sample that has undergone the heat treatment. Sample 2D has the same structure as Sample 2C. Sample 3D is a sample that has been subjected to the heat treatment. This sample was made by subjecting a sample with the same composition as PULSE 3C to the heat treatment. Sample 4D is a sample with the same composition as sample 4C, but subjected to the same heat treatment. Sample 5D is a sample with the same structure as Sample 5C, but the heating This is a sample that was treated.

[0447] As a result of the above, Samples 1D to 5D were fabricated.

[0448] The atomic ratio of nitrogen to tantalum in the TaNxOy film is The highest scores are in the order of sample 4D, sample 3D, sample 2D, and sample 1D.

[0449] For Samples 1C to 5C and Samples 1D to 5D, SI The deuterium (D) concentration in TaNxOy was evaluated using a MS analyzer. The analysis was carried out from the surface side of the sample.

[0450] The profile of deuterium (D) concentration in TaNxOy of each sample obtained by SIMS analysis. The files are shown in Figure 20(A) and Figure 20(B).

[0451] 20(A) and 20(B) show the results of Samples 1C to 5C and Sample 6C. 1 shows the deuterium (D) concentration profile in the TaNxOy film of Sample 1D to Sample 5D. In Figures 20(A) and 20(B), the horizontal axis is set at 0 nm at the surface of the sample. The vertical axis represents the depth [nm] in the direction perpendicular to the film surface of the sample when Deuterium (D) concentration [atoms / cm 3 ].

[0452] The dotted line in FIG. 20(A) represents the deuterium (D) concentration in the TaNxOy film of sample 1C. The dashed line in FIG. 20(A) shows the profile of the SiO2 concentration in the TaNxOy film of sample 2C. The dashed line in FIG. 20(A) shows the deuterium (D) concentration profile of sample 3. 20(A) shows the profile of deuterium (D) concentration in the TaNxOy film at C. The dashed line shows the profile of deuterium (D) concentration in the TaNxOy film of sample 4C. The solid line in Fig. 20(A) shows the profile of deuterium (D) concentration in the TaNxOy film of sample 5C. It is a file.

[0453] As shown in FIG. 20(A), in sample 1C, some of the deuterium (D) in the metal oxide film is transferred to TaN In sample 1C, the TaNxOy film was mixed with the metal oxide film during deposition. It is assumed that some of the deuterium (D) in the sample was incorporated into the TaNxOy film. In samples 2C to 5C, deuterium (D) in the metal oxide film is not mixed well into the TaNxOy film. The deuterium (D) concentration in the TaNxOy films of Samples 2C to 5C was The profiles were nearly identical.

[0454] The dotted line in FIG. 20(B) indicates the deuterium (D) concentration in the TaNxOy film of sample 1D. The dashed line in FIG. 20(B) shows the profile of the SiO2 concentration in the TaNxOy film of sample 2D. The dashed line in FIG. 20(B) shows the deuterium (D) concentration profile of sample 3. 20(B) shows the profile of deuterium (D) concentration in the TaNxOy film. The dashed line shows the profile of deuterium (D) concentration in the TaNxOy film of sample 4D. The solid line in Fig. 20(B) shows the profile of deuterium (D) concentration in the TaNxOy film of sample 5D. It is a file.

[0455] As shown in FIGS. 20A and 20B, the deuterium in the metal oxide film is removed by the heat treatment. (D) was observed diffusing into the TaNxOy film. It can be said that it easily diffuses into aNxOy.

[0456] The configurations, methods, etc. shown in this example may be at least partially similar to other examples described in this specification. The present invention can be implemented in appropriate combination with the embodiments and examples. [Explanation of symbols]

[0457] 100 Capacitor element, 101 area, 102 area, 103 area, 110 Conductors, 112 Conductors, 114 Insulators, 120 Conductors, 130 Insulators, 140 Insulators, 150 Insulators, 152 Conductors, 153 Conductors, 154 Insulators, 156 Insulators, 160 Insulators, 200 Transistors, 205 Conductors, 210 Insulators, 212 Insulators, 214 Insulators, 216 Insulators, 218 conductors, 222 insulators, 224 insulators, 230 oxides, 230a Oxide, 230A Oxide film, 230b Oxide, 230B Oxide film, 230c Oxide, 230C oxide film, 231 region, 231a region, 231b region area, 234 area, 236 layer, 236a layer, 236b layer, 238 area , 238a area, 238b area, 240 conductor, 240a conductor, 24 0b Conductors, 241 Insulators, 241a Insulators, 241b Insulators, 242 Conductor, 242a Conductor, 242A Conductive film, 242b Conductor, 242B conductive layer, 243 oxide, 243a oxide, 243b oxide, 250 Insulator, 250A Insulator, 254 Insulator, 254A Insulator, 260 Conductor body, 260a conductor, 260A conductive film, 260b conductor, 260B conductive Membranes, 274 Insulators, 280 Insulators, 281 Insulators, 300 Transistors , 311 substrate, 312 insulator, 313 semiconductor region, 314a low resistance region , 314b low resistance region, 315 insulator, 316 conductor, 320 insulator, 322 insulators, 324 insulators, 326 insulators, 328 conductors, 330 Conductors, 350 Insulators, 352 Insulators, 354 Insulators, 356 Conductors , 1001 wiring, 1002 wiring, 1003 wiring, 1004 wiring, 100 5 wiring, 1006 wiring, 1007 wiring, 2001 wiring, 2002 wiring Wire, 2003 Wire, 2004 Wire, 2005 Wire, 2006 Wire

Claims

1. a first oxide; and a second oxide, a third oxide, and a fourth oxide on the first oxide; an insulator on the second oxide; a first conductor on the insulator; a second conductor on the third oxide; and a third conductor on the fourth oxide; the first oxide, the third oxide, and the fourth oxide each comprise indium, an element M (wherein M is aluminum, gallium, yttrium, or tin), and zinc; an atomic ratio of the element M to indium in the third oxide is greater than an atomic ratio of the element M to indium in the first oxide; A semiconductor device, wherein the atomic ratio of the element M to indium in the fourth oxide is greater than the atomic ratio of the element M to indium in the first oxide.

2. In claim 1, The semiconductor device, wherein the film thickness of the third oxide and the fourth oxide is 0.5 nm or more and 5 nm or less.

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