Array substrate, display panel, and method of manufacturing array substrate

Abstract

The present application provides an array substrate, a display panel, and a manufacturing method thereof, comprising a base substrate and a protective layer, the protective layer being disposed above the base substrate and covering the base substrate, and the protective layer further includes a first through hole for discharging water vapor. The present application provides a through hole in the protective layer to discharge water vapor, thereby improving the stability of the thin film transistor in the array substrate, and at the same time improving the phenomenon of negative bias and leakage current of the display panel without the need to add other structures and without changing the spatial arrangement.

Description

[Technical Field]

[0001] The present application relates to the display technology field, and in particular to an array substrate, a display panel, and a method for manufacturing the array substrate. [Background technology]

[0002] Display panel 8 containing oxides In the mask process, a large amount of water vapor is generated during manufacturing.

[0003] Summary of the Invention [Problem to be solved by the invention]

[0004] Oxides are sensitive to water vapor, which affects the electrical properties of the device. TFTs are turned on under negative pressure, which can lead to a series of problems, such as pixel leakage within the panel, ESD, and other conditions that can cause the TFT design to fail, making it impossible to discharge static electricity from the display panel. [Means for solving the problem]

[0005] The purpose of the present application is to provide an array substrate, a display panel, and a method for manufacturing the array substrate, which solves the problems of negative bias and leakage current of the display panel caused by water vapor during the manufacturing of the display panel in the prior art.

[0006] According to a first aspect, the present application provides an array substrate, the array substrate comprising: a base substrate including a thin film transistor layer including a channel region; and a protective layer disposed above the base substrate and covering the base substrate, the protective layer further having a first through hole formed therein for discharging water vapor, the first through hole being disposed adjacent to the channel region.

[0007] In some possible embodiments, the protective layer is a polymer film, and the first through-holes for discharging water vapor are formed in the polymer film.

[0008] In some possible embodiments, the protective layer includes a polymer film and a first passivation layer, the first passivation layer being disposed above and covering the polymer film; The first passivation layer has the first through-hole formed therein for discharging water vapor.

[0009] In some possible embodiments, the protective layer includes a polymer film and a first passivation layer, the first passivation layer being disposed above and covering the polymer film; The first through hole includes a second through hole formed in the polymer film and a third through hole formed in the first passivation layer, and the second through hole and the third through hole are connected to each other.

[0010] In some possible embodiments, the protective layer includes a second passivation layer, a polymer film, and a first passivation layer stacked in sequence, and the second passivation layer is placed above the base substrate.

[0011] In some possible embodiments, the first through hole includes a first via hole formed in the second passivation layer, a second through hole formed in the polymer film, and a third through hole formed in the first passivation layer, and the first via hole, the second through hole, and the third through hole are connected to each other.

[0012] In some possible embodiments, the first through-holes are filled with a water-absorbing material.

[0013] In some possible embodiments, the first through-hole is plural, and the plural first through-holes are disposed surrounding the channel region.

[0014] In some possible embodiments, the cross-sectional shape of the first through-hole in the vertical direction is a trapezoidal structure that is wider at the top and narrower at the bottom.

[0015] In some possible embodiments, the first through-hole has a horizontal and vertical height of at least 7 microns.

[0016] According to a second aspect, the present application provides a display panel including an array substrate, the array substrate comprising: a base substrate including a thin film transistor layer including a channel region; and a protective layer disposed above the base substrate and covering the base substrate, the protective layer further having a first through hole formed therein for discharging water vapor, the first through hole being disposed adjacent to the channel region.

[0017] In some possible embodiments, the protective layer is a polymer film, and the first through-holes for discharging water vapor are formed in the polymer film.

[0018] In some possible embodiments, the protective layer includes a polymer film and a first passivation layer, the first passivation layer being disposed above and covering the polymer film; The first passivation layer has the first through-hole formed therein for discharging water vapor.

[0019] In some possible embodiments, the protective layer includes a polymer film and a first passivation layer, the first passivation layer being disposed above and covering the polymer film; The first through hole includes a second through hole formed in the polymer film and a third through hole formed in the first passivation layer, and the second through hole and the third through hole are connected to each other.

[0020] In some possible embodiments, the protective layer includes a second passivation layer, a polymer film, and a first passivation layer stacked in sequence, and the second passivation layer is placed above the base substrate.

[0021] In some possible embodiments, the first through hole includes a first via hole formed in the second passivation layer, a second through hole formed in the polymer film, and a third through hole formed in the first passivation layer, and the first via hole, the second through hole, and the third through hole are connected to each other.

[0022] In some possible embodiments, the first through-holes are filled with a water-absorbing material.

[0023] In some possible embodiments, the first through-hole is plural, and the plural first through-holes are disposed surrounding the channel region.

[0024] In some possible embodiments, the display panel further includes an opposing substrate and a liquid crystal layer, the opposing substrate being disposed opposite to and spaced apart from the array substrate, and the liquid crystal layer being disposed between the opposing substrate and the array substrate.

[0025] According to a third aspect, an embodiment of the present application provides a method for manufacturing an array substrate, the method comprising: providing a base substrate including a thin film transistor layer including a channel region; fabricating a protective layer above the base substrate to cover the base substrate; and fabricating a first through-hole on the protective layer at a location corresponding to the channel region. [Effects of the Invention]

[0026] The present application provides an array substrate, a display panel, and a manufacturing method thereof, which includes a base substrate and a protective layer, the protective layer being disposed above and covering the base substrate, and the protective layer further having a first through-hole for discharging water vapor. The present application provides a through-hole in the protective layer for discharging water vapor, thereby improving the stability of thin film transistors in the array substrate and, at the same time, improving the negative bias and leakage current phenomena of the display panel without requiring the installation of any additional structures or changing the spatial arrangement. [Brief explanation of the drawings]

[0027] In order to more clearly explain the technical solutions in the embodiments of the present application, the drawings necessary for describing the embodiments will be briefly described below. It is obvious that the drawings in the following description are only some embodiments of the present application, and those skilled in the art can obtain other drawings based on these drawings without exerting any creative efforts.

[0028] [Figure 1] 1 is a structural schematic diagram of an embodiment of an array substrate according to an embodiment of the present application; [Figure 2] 1 is a structural schematic diagram of another embodiment of an array substrate according to an embodiment of the present application; [Figure 3] 1 is a structural schematic diagram of another embodiment of an array substrate according to an embodiment of the present application; [Figure 4] FIG. 2 is a structural schematic diagram of another embodiment of an array substrate according to the present application; DETAILED DESCRIPTION OF THE INVENTION

[0029] Hereinafter, the technical solutions in the embodiments of the present application will be clearly and completely described with reference to the drawings in the embodiments of the present application. It is obvious that the described embodiments are only some of the embodiments of the present application, and are not all of the embodiments. All other embodiments that can be obtained by those skilled in the art based on the embodiments of the present application without any creative effort fall within the scope of protection of the present application.

[0030] In the description of this application, it should be understood that orientations or positional relationships indicated by terms such as "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," and "outer" are based on the orientations or positional relationships shown in the drawings and are intended solely to facilitate and simplify the description of this application. They do not indicate or imply that the devices or elements shown must have a specific orientation, be configured, or operate in a specific orientation, and should not be construed as limitations on this application. Furthermore, terms such as "first" and "second" are used for descriptive purposes only and should not be understood as expressing or suggesting relative importance or implicitly indicating the number of technical features shown. Accordingly, a feature qualified by "first" or "second" can explicitly or implicitly include one or more features. In the description of this application, "plurality" means two or more, unless otherwise clearly and specifically limited.

[0031] As used herein, the word "exemplary" means "serving as an example, illustration, or description." Any embodiment described herein as "exemplary" is not necessarily to be construed as preferred or superior over other embodiments. The following description is provided to enable those skilled in the art to make and use the present application. In the following description, details are given for purposes of interpretation. As will be understood by those skilled in the art, the present application can be practiced without these specific details. In other instances, detailed descriptions of well-known structures and processes are omitted to avoid obscuring the description of the present application with unnecessary detail. Therefore, the present application is not limited to the embodiments shown, but is to be accorded the widest scope consistent with the principles and features disclosed herein.

[0032] The embodiments of the present application provide an array substrate, a display panel, and a method for manufacturing an array substrate, which will be described in detail below.

[0033] Referring to Figure 1, Figure 1 is a structural schematic diagram of an embodiment of an array substrate according to an embodiment of the present application. In the embodiment shown in Figure 1, the array substrate includes a base substrate 10 including a thin film transistor layer including a channel region, and a protective layer 20 disposed above and covering the base substrate 10. A first through-hole is further formed in the protective layer 20 for discharging water vapor during fabrication of the array substrate. The first through-hole is disposed adjacent to the channel region and is mainly used to discharge water vapor in the channel region of the thin film transistor to protect the thin film transistor. Specific processes for discharging water vapor will be described in the following examples.

[0034] The array substrate according to the embodiment of the present application includes a base substrate and a protective layer, the protective layer being disposed above and covering the base substrate, and the protective layer further having a first through-hole for discharging water vapor. By discharging water vapor by providing the through-hole in the protective layer, the present application improves the stability of the thin film transistors in the array substrate, and at the same time, improves the negative bias and leakage current phenomena of the display panel without requiring the installation of any additional structure or changing the spatial arrangement.

[0035] The array substrate structure of the present application is primarily suitable for oxide-based array substrates with a fringe field switching (FFS) structure. Such array substrates include a polymer film layer. A large amount of water vapor is generated during the polymer film manufacturing process. The channel in the array substrate is sensitive to hydrogen ions in the water vapor. Excessive hydrogen ions increase charge carriers in the channel, causing a negative bias in the thin-film transistor (TFT). When the pixel unit is turned on at low voltage, this can lead to leakage current in the pixel unit and display abnormalities in the display panel. Therefore, the present application provides through-holes to allow water vapor to escape and reduce the amount of hydrogen ions.

[0036] In FIG. 1, the protective layer 20 disposed above the base substrate 10 may be a single layer of polymer film. The first through-hole may be disposed in the polymer film alone. By providing through-holes in the protective layer (also called polymer film), water vapor can directly overflow through the through-holes, further discharging the water vapor. Generally, a portion of the water vapor can be discharged by simply providing via holes, but to improve the efficiency of water vapor discharge, through-holes that penetrate the entire protective layer are generally provided. Specifically, compared with via holes, through-holes are closer to the thin-film transistors (TFTs) in the array substrate in the vertical direction, and water vapor is more likely to overflow from the through-holes. Furthermore, the water vapor dissipation area of ​​through-holes is larger, which is more advantageous for dissipating water vapor.

[0037] In the array substrate shown in FIG. 1, water vapor remains during the manufacturing of the polymer film. However, since the polymer film has through-holes, the water vapor in the polymer film can be discharged from the array substrate through the through-holes during the subsequent baking process, thereby preventing the hydrogen ions in the water vapor from entering the channels of the array substrate.

[0038] In the present embodiment, the polymer film material includes, but is not limited to, soluble polytetrafluoroethylene (PFA), which has good chemical corrosion resistance and high temperature resistance, and the protective layer may be a transparent protective layer.

[0039] In another embodiment of the present application, the protective layer may have a multi-layer structure. As shown in FIG. 2, FIG. 2 is a structural schematic diagram of another embodiment of an array substrate according to an embodiment of the present application. In the schematic diagram of the array substrate shown in FIG. 2, the protective layer 20 may include a polymer film 201 and a first passivation layer 202, where the first passivation layer 202 is disposed above the polymer film and covers the polymer film 201. At the same time, a first through-hole for discharging water vapor is formed in the first passivation layer 202.

[0040] Similar to the array substrate shown in FIG. 1, through-holes are formed in the other film layer structure above the base substrate to allow water vapor to escape. However, while the protective layer 20 in FIG. 2 includes a polymer film 201 and a first passivation layer 202, the protective layer in FIG. 1 only includes a polymer film. In this case, through-holes are formed in the first passivation layer 202 to similarly allow water vapor remaining during the manufacturing of the polymer film to escape. The first passivation layer 202 protects the array substrate, and this arrangement allows excess water vapor to escape while protecting the array substrate.

[0041] 2, the protective layer 20 at this time includes a polymer film and a first passivation layer 202, but through-holes are provided only on the first passivation layer 202. In addition, during the manufacturing process of the array substrate shown in FIG. 2, an air extraction process is performed when manufacturing the polymer film, and some water vapor can be volatilized at this time. After that, an electrode layer is further manufactured, and during the manufacturing of the electrode layer, a baking process occurs, and the water vapor in the polymer film layer can also be volatilized through the through-holes provided in the first passivation layer 202.

[0042] Of course, it should be noted that the electrode layers to be manufactured include a common electrode layer and a pixel electrode layer, and the electrode layers need to be disposed to avoid the through-holes on the protective layer when manufactured. The material of the electrode layer includes, but is not limited to, one or more of indium tin oxide, indium zinc oxide, aluminum tin oxide, aluminum zinc oxide, and indium germanium zinc oxide.

[0043] As shown in Figure 3, Figure 3 is a structural schematic diagram of another embodiment of an array substrate according to an embodiment of the present application. In Figure 3, the protective layer 20 similarly includes a polymer film 201 and a first passivation layer 202. However, the difference from the embodiment shown in Figure 2 is that in the array substrate shown in Figure 3, a second through-hole is formed in the polymer film and a third through-hole is formed in the first passivation layer 202. That is, in the embodiment shown in Figure 3, through-holes are formed in both the polymer film 201 and the first passivation layer 202, and the second through-hole in the polymer film 201 communicates with the third through-hole in the first passivation layer 202. As shown in Figure 3, the position of the second through hole on the polymer film 201 is the same as the position of the third through hole on the first passivation layer 202, thereby connecting the second through hole and the third through hole, and the first through hole at this time actually includes the second through hole formed in the polymer film and the third through hole formed in the first passivation layer.

[0044] 2, the array substrate shown in Figure 3 has a third through-hole formed in the first passivation layer 202, and a second through-hole formed in the polymer film 201 at a position corresponding to the third through-hole. By providing a through-hole in both film layer structures and aligning the positions of the two through-holes to form a complete through-hole that penetrates the entire passivation layer, the water vapor dissipation area of ​​the through-hole is greatly increased and the efficiency of water vapor evaporation is effectively improved.

[0045] As shown in Figure 4, Figure 4 is a structural schematic diagram of another embodiment of an array substrate according to the present application. In the embodiment shown in Figure 4, the protective layer also has a multi-layer structure. Specifically, the protective layer may include a second passivation layer 203, a polymer film 201, and a first passivation layer 202 stacked one on top of the other. The second passivation layer 203 is disposed above the base substrate to protect the base substrate. In the embodiment shown in Figure 4, the first through-hole may include a first via hole formed in the second passivation layer 203, a second through-hole formed in the polymer film, and a third through-hole formed in the first passivation layer. The first via hole, the second through-hole, and the third through-hole are connected to each other to provide a complete path for water vapor escape.

[0046] The second passivation layer is the protective layer closest to the thin film transistor layer, and via holes are also provided in the second passivation layer to achieve the function of water vapor dissipation, with the premise of protecting the thin film transistor layer. However, to protect the thin film transistor layer, the via holes provided in the second passivation layer generally do not penetrate the entire second passivation layer, that is, via holes are provided in the second passivation layer, not through holes.

[0047] For the array substrate shown in FIG. 4, this arrangement further increases the area of ​​the through holes compared to the array substrates in other embodiments, that is, increases the area for water vapor dissipation, thereby improving the efficiency of water vapor dissipation.

[0048] In the embodiment shown in FIGS. 1 to 4, the base substrate in the array substrate has the following structure: a glass substrate 101; a gate metal layer 102 disposed above a glass substrate 101; a gate insulating layer 103 disposed above the gate metal layer 102 and covering the gate metal layer 102; a metal oxide layer 104 disposed above the gate insulating layer 103 and corresponding to the position of the gate metal layer 102; The semiconductor device may also include a source / drain layer 105 disposed above the metal oxide layer 104 and including a source and a drain that are independent of each other.

[0049] In the above-mentioned embodiments of the array substrate, the first through-hole generally needs to be located close to the thin film transistor in the array substrate or close to the channel region in the thin film transistor layer of the array substrate. Because the channel in the array substrate is sensitive to hydrogen ions in water vapor, it is necessary to prevent the hydrogen ions in water vapor from entering the channel as much as possible. By locating the through-hole close to the channel, water vapor near the channel can be discharged as much as possible to prevent it from affecting the TFT.

[0050] In addition, although the number of through holes described in the above embodiment is one, in another embodiment, the number of first through holes on the protective layer may be multiple, and the positions of the multiple first through holes may be arranged according to actual needs, for example, they may be arranged to surround the channel region of the thin film transistor layer, or they may be arranged at positions where water vapor is concentrated according to the actual water vapor situation.

[0051] In the above embodiment, the number and location of the first through holes can be set according to actual needs. The vertical first through holes are generally through holes that penetrate the protective layer (without damaging the thin film transistors), while the horizontal size of the first through holes can be set according to the actual size of the array substrate. In one specific embodiment, the horizontal width and vertical height of the first through holes are both 7 microns or more.

[0052] In the present embodiment, the cross-sectional shape of the first through-holes formed vertically in the protective layer 20 may be a trapezoidal structure that is wider at the top and narrower at the bottom, which can further increase the area for water vapor dissipation compared to a rectangular structure, thereby improving the efficiency of water vapor dissipation. The cross-sectional shape of the first through-holes may be a circular or rectangular shape.

[0053] It should be noted that the array substrate in this application may include other film layers in addition to the above structure, but generally, water vapor can be completely discharged during the manufacturing process of the array substrate. Therefore, in order to finally manufacture a complete array substrate structure, the through-holes on the protective layer are not connected to the outside, thereby preventing external water vapor from re-entering the inside of the array substrate through the through-holes. Specifically, the first through-holes may be filled with a water-absorbing material, which not only ensures the flatness of the upper surface of the array substrate but also prevents external water vapor from entering the array substrate.

[0054] An embodiment of the present application further provides a display panel, which includes the array substrate described above. The display panel may further include an opposing substrate and a liquid crystal layer, where the opposing substrate is disposed opposite to and spaced apart from the array substrate, and the liquid crystal layer is disposed between the opposing substrate and the array substrate. The display panel may be a COA type panel or a non-COA type panel.

[0055] The present application further provides a method for manufacturing an array substrate, the method comprising: The method may include providing a base substrate including a thin film transistor layer including a channel region, fabricating a protective layer above the base substrate to cover the base substrate, and fabricating a first through hole on the protective layer at a position corresponding to the channel region.

[0056] In some embodiments, the protective layer may have a multi-layer laminated structure, and the vertical height of the first through-hole may be changed depending on the number of film layers of the protective layer. The array substrate manufacturing method according to the present application can manufacture the array substrate described in any one of the above. Specific manufacturing methods for the different film layers and the first through-hole of the array substrate in the present application may refer to the prior art and are not limited thereto.

[0057] In the above embodiments, the description of each embodiment has its own emphasis, and for parts that are not detailed in an embodiment, please refer to the detailed description of other embodiments in the previous paragraph, and no further description will be given here.

[0058] In concrete implementation, each of the above units or structures may be realized as an independent entity, or may be arbitrarily combined and realized as the same or several entities. For concrete implementation of each of the above units or structures, please refer to the method embodiments described above, and no further description will be given here.

[0059] For the specific implementation of each of the above operations, please refer to the previous examples, and no further description will be given here.

[0060] The above provides a detailed introduction to the array substrate, display panel, and array substrate manufacturing method according to the embodiments of the present application. In this specification, the principles and embodiments of the present application are described using specific examples. However, the explanation of the above examples is merely intended to aid in understanding the method of the present application and its core idea. Those skilled in the art may modify the specific embodiments and application scope based on the idea of ​​the present application. As such, the contents of this specification should not be construed as limiting the present application.

Claims

1. An array substrate, a base substrate including a thin film transistor layer including a channel region; a protective layer disposed above the base substrate and covering the base substrate, the protective layer further having a first through-hole formed therein for discharging water vapor, the first through-hole being disposed adjacent to the channel region; the protective layer includes a second passivation layer, a polymer film, and a first passivation layer, which are stacked in this order above the base substrate; an array substrate, wherein the first through hole includes a first via hole formed in the second passivation layer and not penetrating the entire second passivation layer, a second through hole formed in the polymer film, and a third through hole formed in the first passivation layer, and the first via hole, the second through hole, and the third through hole are connected to each other.

2. The array substrate according to claim 1 , wherein the first through-holes are filled with a water-absorbing material.

3. 2. The array substrate according to claim 1, wherein the number of said first through holes is plural, and the plural first through holes are disposed surrounding said channel region.

4. 2. The array substrate according to claim 1, wherein the cross-sectional shape of the first through-hole in the vertical direction is a trapezoidal structure that is wider at the top and narrower at the bottom.

5. 2. The array substrate according to claim 1, wherein the first through-hole has a height of 7 microns or more in both the horizontal and vertical directions.

6. A display panel comprising the array substrate according to any one of claims 1 to 5.

7. 7. The display panel of claim 6, wherein the display panel further includes an opposing substrate and a liquid crystal layer, the opposing substrate being disposed opposite the array substrate at a distance, and the liquid crystal layer being disposed between the opposing substrate and the array substrate.

8. A method for manufacturing an array substrate, comprising: providing a base substrate including a thin film transistor layer including a channel region; forming a protective layer covering the base substrate by sequentially stacking a second passivation layer, a polymer film, and a first passivation layer on the base substrate; a first through-hole formed in the second passivation layer at a position on the protective layer corresponding to the channel region, the first through-hole being configured to communicate with a first via hole formed in the second passivation layer and not penetrating the entire second passivation layer, a second through-hole formed in the polymer film, and a third through-hole formed in the first passivation layer.

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