Bandgap Modules and Linear Regulators

Abstract

To provide a bandgap module and a linear regulator.SOLUTION: A linear regulator includes a bandgap module and an error amplifier. A line voltage unit includes a bandgap circuit, a lowpass filter, and a start-up module. The line voltage unit generates a bandgap voltage. The lowpass filter filters the bandgap voltage and generates a reference voltage accordingly. The start-up module includes a first start-up circuit and a second start-up circuit. The bandgap voltage is increased to a predefined value when the bandgap module operates in a first phase. The bandgap voltage maintains at the predefined value when the bandgap module operates in a second phase. The second phase is after the first phase.SELECTED DRAWING: Figure 3

Description

[Technical Field]

[0001] The present invention relates to a bandgap module and a linear regulator, and more particularly to a bandgap module and a linear regulator with low quiescent current consumption, low noise, and fast start-up time. [Background technology]

[0002] Portable electronic devices are widely used and require a battery to provide a power supply voltage Vdd to operate a load circuit. However, the power supply voltage Vdd is not a constant voltage, and a linear regulator is used to provide a stable regulated voltage Vreg to the load circuit.

[0003] FIG. 1A shows an example of a conventional waveform diagram of a power supply voltage Vdd and a regulated voltage Vreg. In the example of FIG. 1A, the horizontal axis represents time. As shown in the figure, waveform WF1 represents the power supply voltage Vdd output by the battery, and waveform WF2 represents the regulated voltage Vreg output by the linear regulator. Summary of the Invention [Problem to be solved by the invention]

[0004] A linear regulator is connected to the output terminal of a battery, and regulates the power supply voltage Vdd to generate the regulated voltage Vreg. Portable electronic devices, such as Internet of Things (IoT) devices, are always equipped with a battery. Over time, waveform WF1 (power supply voltage Vdd) continuously decreases, while waveform WF2 (regulated voltage Vreg) remains constant. Therefore, linear regulators are crucial for stabilizing and matching voltage sources in portable electronic devices.

[0005] 1B is a block diagram showing an electronic device using a conventional linear voltage regulator. The electronic device 10 includes a load circuit 15, a battery 11, and a linear regulator 13. The linear regulator 13 is electrically connected to the battery 11 and the load circuit 15. After receiving a power supply voltage Vdd from the battery 11, the linear regulator 13 regulates the power supply voltage Vdd and transmits a regulated voltage Vreg to the load circuit 15.

[0006] The linear regulator 13 is a low dropout (hereinafter referred to as LDO) linear regulator and includes a bandgap circuit 131, an error amplifier 133, a PMOS transistor Men, and shunt resistors Ra and Rb. The source terminal and gate terminal of the PMOS transistor Men are electrically connected to the battery 11 and the output terminal of the error amplifier 133, respectively. The non-inverting input terminal (+) and inverting input terminal (-) of the error amplifier 133 are electrically connected to the bandgap circuit 131 and the shunt resistors Ra and Rb, respectively. The shunt resistors Ra and Rb are connected in series between the drain terminal of the PMOS transistor Men and a ground terminal Gnd. For ease of explanation, the ground voltage and the ground terminal are both referred to as Gnd in this specification. The error amplifier 133 receives a reference voltage Vref from the bandgap circuit 131. Based on the reference voltage Vref and the shunt resistors Ra and Rb, the regulating voltage Vreg is

[0007]

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[0008] In this way, the accuracy, stability, and startup speed of the reference voltage Vref affect the behavior of the regulated voltage Vreg.

[0009] Therefore, the inventors of the present invention believed that the above drawbacks could be improved, and after extensive research, they came up with the proposal of the present invention, which effectively improves the above problems through rational design.

[0010] The present invention has been made in view of the above circumstances, and aims to solve the above problems by providing a bandgap module and a linear regulator that have low quiescent current, low noise, and a short start-up time. [Means for solving the problem]

[0011] To solve the above problem, one embodiment of the present invention provides a bandgap module including a bandgap circuit, a startup module, and a low-pass filter. The bandgap circuit includes an operational amplifier, a current mirror, a first load branch, a second load branch, and a bandgap branch. The operational amplifier includes a first input terminal, a second input terminal, and a current control terminal. The current mirror is electrically connected to the first input terminal, the second input terminal, and the current control terminal. The current mirror generates a first load current, a second load current, and a mirror current. The first load current, the second load current, and the mirror current are generated based on a signal at the current control terminal. The first load current, the second load current, and the mirror current are equivalent. The first load branch is electrically connected to the first input terminal, and the second load branch is electrically connected to the second input terminal. The first load branch receives the first load current, and the second load branch receives the second load current. The bandgap branch is electrically connected to the current mirror. The bandgap branch receives the mirror current and conducts a bandgap current. The bandgap voltage is generated based on the bandgap current. The start-up module includes a first start-up circuit and a second start-up circuit. The first start-up circuit is electrically connected to the bandgap circuit. The first start-up circuit accelerates the generation of the mirror current and increases the bandgap voltage to a predetermined value when the bandgap module operates in a first phase. The second start-up circuit is electrically connected to the bandgap circuit, the low-pass filter, and the first start-up circuit. When the bandgap module operates in a second phase, the second start-up circuit conducts additional current toward the bandgap branch and maintains the bandgap voltage at a predetermined value. The second phase follows the first phase. The low-pass filter is electrically connected to the bandgap circuit and the second start-up circuit. The low-pass filter filters noise from the bandgap voltage and generates a corresponding reference voltage.

[0012] To achieve the above object, another aspect of the present invention is a linear regulator. The linear regulator receives a power supply voltage and includes a bandgap module and an error amplifier. The error amplifier is electrically connected to the bandgap module. The error amplifier generates an error signal by comparing a reference voltage with a comparison voltage. The linear regulator generates a regulated voltage based on the power supply voltage and the error signal.

[0013] At least the following points will become clear from the description and drawings to be described later. [Brief explanation of the drawings]

[0014] [Figure 1A] 1 shows an example of a waveform diagram of a conventional power supply voltage Vdd and a regulated voltage Vreg. [Figure 1B] FIG. 1 is a block diagram illustrating an electronic device that uses a conventional linear voltage regulator. [Figure 2] 1 illustrates a schematic diagram of an example bandgap module according to an embodiment of the present invention. [Figure 3] 10 is a schematic diagram illustrating an example of a bandgap module according to another embodiment of the present invention. [Figure 4A] 1 illustrates an example of a bandgap module operating in a coarse phase (PH1) according to an embodiment of the present invention. [Figure 4B] 1 illustrates an example of a bandgap module according to an embodiment of the present invention operating at a fine phase (PH2). [Figure 5] 1 is a schematic diagram illustrating state changes applied to an always-on battery-powered electronic device based on a bandgap module design according to one embodiment of the present invention; FIG. DETAILED DESCRIPTION OF THE INVENTION

[0015] The present invention will be described below through embodiments of the invention, but the following embodiments do not limit the scope of the invention according to the claims. Furthermore, not all of the combinations of features described in the embodiments are necessarily essential to the solution of the invention.

[0016] For applications in portable battery-powered devices such as IoT devices, linear regulators must have low power consumption, low noise, and fast startup times. In such devices, low noise linear regulators are required to reduce power consumption to extend battery life and ensure the normal operation of sensitive analog circuits. IoT devices typically need to respond to and report various events very quickly, and then transmit the information to a server, so fast startup times are also a basic requirement.

[0017] In the embodiments shown herein, a bandgap module and an LDO linear regulator have characteristics of low quiescent current, low noise, and fast start-up time. The bandgap module receives a power supply voltage Vdd and correspondingly generates a constant reference voltage Vref. The reference voltage Vref generates a regulated voltage Vreg for use in a load circuit.

[0018] 2 is a schematic diagram of an example of a bandgap module according to an embodiment of the present invention. The bandgap module 21 includes a bandgap circuit 211 and a low-pass filter 213, both of which are electrically connected to a bandgap terminal Nbg.

[0019] The bandgap circuit 211 supplies a constant bandgap voltage Vbg at a bandgap terminal Nbg, and the low-pass filter 213 filters noise at the bandgap voltage Vbg and outputs a reference voltage Vref at a reference terminal Nref.

[0020] It should be noted that in some applications, the bandgap circuit 211 includes a power-saving transistor Mpd to save power and extend battery life. The power-saving transistor Mpd is electrically connected to a power supply voltage terminal (Nvdd) and a current control terminal Nc. The power-saving transistor Mpd is controlled by a power-saving signal Spd. When the electronic device is in a power-saving mode or a sleep mode, the power-saving transistor Mpd is turned on, the power supply voltage Vdd is conducted to the current control terminal Nc, and the load transistors Mp1 and Mp2 and the mirror transistor Mmir are disabled. When the electronic device is operating in a normal operating mode, the power-saving transistor Mpd is turned off, allowing the bandgap circuit 211 to operate normally. In this specification, it is assumed that the power-saving signal Spd is set to a logic high potential (Spd=H).

[0021] The bandgap circuit 211 includes a current mirror 211e, an operational amplifier OP, load branches 211a and 211c, and a bandgap branch 211g. The current mirror 211e and the bandgap branch 211g are electrically connected to a bandgap terminal Nbg. The current mirror 211e and the load branch 211a are electrically connected to a node terminal Na (i.e., the inverting input terminal (-) of the operational amplifier OP), and the current mirror 211e and the load branch 211c are electrically connected to a node terminal Nb (i.e., the non-inverting input terminal (+) of the operational amplifier OP).

[0022] The current mirror 211e includes load transistors Mp1 and Mp2 and a mirror transistor Mmir. In the current mirror 211e, the load transistors Mp1 and Mp2 and the current mirror transistor Mmir are PMOS transistors. The currents flowing through the load transistors Mp1 and Mp2 are defined as load currents Ia and Ib, respectively, and the current flowing through the mirror transistor Mmir is defined as a mirror current Imir. If the load transistors Mp1 and Mp2 and the mirror transistor Mmir have the same aspect ratio, the current values ​​of the load currents Ia and Ib and the mirror current Imir are equivalent (Ia = Ib = Imir).

[0023] The load branch 211a includes a transistor Qa and a shunt resistor Ra, and the load branch 211c includes a transistor Qb and shunt resistors Rb1 and Rb2. In the load branch 211a, a shunt current Ia1 flows through the transistor Qa, a shunt current Ia2 flows through the shunt resistor Ra, and the sum of the shunt currents Ia1 and Ia2 corresponds to the load current Ia. In the load branch 211c, a shunt current Ib1 flows through the transistor Qa and the shunt resistor Rb1, and a shunt current Ib2 flows through the shunt resistor Rb2, and the sum of the shunt currents Ib1 and Ib2 corresponds to the load current Ib.

[0024] The resistance values ​​of the shunt resistors Ra and Rb2 are equivalent. The transistors Qa and Qb are assumed to be PNP bipolar transistors (BJTs). In practical applications, the transistors Qa and Qb may be replaced by diodes.

[0025] The bandgap branch 211g includes a bandgap resistor R3. The bandgap resistor R3 is electrically connected to the bandgap terminal Nbg and the ground terminal Gnd, and a bandgap current Ibg flows through the bandgap resistor R3 toward the ground terminal Gnd. In the example of FIG. 2, the bandgap current Ibg corresponds to the mirror current Imir.

[0026] The gate terminals of the load transistors Mp1, Mp2 and the mirror transistor Mmir are all electrically connected to the current control terminal Nc (i.e., the output terminal of the operational amplifier OP), the source terminals of the load transistors Mp1, Mp2 and the mirror transistor Mmir are electrically connected to the power supply voltage terminal Nvdd, and the drain terminals of the load transistors Mp1, Mp2 and the mirror transistor Mmir are electrically connected to the node terminal Na, the node terminal Nb, and the bandgap terminal Nbg, respectively.

[0027] In the load branch 211a, the base terminal (B) and collector terminal (C) of the transistor Qa are electrically connected to the ground terminal Gnd. The emitter terminal (E) of the transistor Qa is electrically connected to the node terminal Na. The branch resistor Ra is electrically connected to the node terminal Na and the ground terminal Gnd. In the load branch 211c, the base terminal (B) and collector terminal (C) of the transistor Qb are electrically connected to the ground terminal Gnd. The branch resistor Rb1 is electrically connected to the node terminal Nb and the emitter terminal (E) of the transistor Qb. The branch resistor Rb2 is electrically connected to the node terminal Nb and the ground terminal Gnd.

[0028] Refer to the load branch 211a. The terminal voltage Va is the emitter-base voltage difference V eb_a The terminal voltage Va is equivalent to the absolute temperature (hereinafter abbreviated as CTAT), and the terminal voltage Va is complementary to the absolute temperature (hereinafter abbreviated as CTAT). Based on the current equation of the transistor Qa, the branch current Ia1 is expressed using the following formula (1):

[0029]

number

[0030] The variable Isa represents the saturation current of transistor Qa, and the variable V T is the thermal voltage. From equation (1), the emitter-base voltage difference V of transistor Qa is eb_a is obtained based on formula (2).

[0031]

number

[0032] On the other hand, the branch current Ia2 is

[0033]

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[0034] and displays:

[0035] Similarly, the branch current Ib1 is expressed using equation (3), and the emitter-base voltage difference V of the transistor Qb is eb_b is expressed using formula (4).

[0036]

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[0037] In equations (3) and (4), the variable Isb represents the saturation current of transistor Qb. Since the terminal voltages Va and Vb are equivalent, the shunt resistors Ra and Rb2 are also equivalent, and the shunt current Ib2 is

[0038]

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[0039] The emitter-base voltage difference V of transistor Qa is eb_a is a CTAT, so the branch current Ib2 is a CTAT current.

[0040] In this specification, it is assumed that the size of transistor Qb is N times the size of transistor Qa, and therefore the saturation current Isb of transistor Qb and the saturation current Isa of transistor Qa have the relationship Isb=N*Isa.

[0041] The voltage difference ΔV is the emitter-base voltage difference V eb_a and V eb_b (See Figure 2.) Combining equation (2), equation (4), and the relationship between the saturation current Isb=N*Isa, the voltage difference ΔV is expressed by equation (5).

[0042]

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[0043] The voltage difference ΔV may be the product of the branch resistor Rb1 and the branch current Ib1 (ΔV=Ib1*Rb1), and the branch current Ib1 is expressed using equation (6).

[0044]

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[0045] In Equation (6), the voltage difference ΔV is directly proportional to the absolute temperature (hereinafter abbreviated as PTAT), and the branch current Ib1 is the PTAT current.

[0046] Since the load current Ib corresponds to the sum of the branch currents Ib1 and Ib2 (Ib=Ib1+Ib2), the load current Ib includes the PTAT current (ie, Ib1) and the CTAT current (ie, Ib2).

[0047] The bandgap voltage Vbg may be the voltage difference across the bandgap resistor R3. Therefore, the bandgap voltage Vbg may be expressed as the product of the bandgap current Ibg and the bandgap resistor R3 (i.e., Vbg=Ibg*R3).

[0048] Since the bandgap current Ibg, load current Ib, and mirror current Imir are equivalent (Ibg = Ib = Imir), the bandgap current Ibg can be expressed as the sum of the branch currents Ib1 and Ib2 (Ibg = Ib1 + Ib2). In this way, the bandgap voltage Vbg is generated by multiplying the sum of the two branch currents Ib1 and Ib2 by the bandgap resistor R3. The bandgap voltage Vbg is expressed using equation (7).

[0049]

number

[0050] Thus, by selecting appropriate resistance values ​​for the shunt resistors Rb1 and Rb2 and the bandgap resistor R3, a predetermined bandgap voltage Vbg is obtained, which is independent of temperature changes and corresponds to the sum of the CTAT and PTAT voltages. By accurately maintaining the bandgap voltage Vbg at a predetermined value, the accuracy of the reference voltage Vref can be guaranteed. By accurately maintaining the bandgap voltage Vbg at a predetermined value, the accuracy of the reference voltage Vref can be guaranteed.

[0051] The bandgap module 21 mainly contributes to noise. To maintain low noise, a low-pass filter 213 is employed to reduce noise and prevent power penalty. The low-pass filter 213 includes a load resistor Rld and a load capacitor Cld, both of which are electrically connected to the reference terminal Nref.

[0052] The load resistor Rld is electrically connected to the bandgap terminal Nbg, and the load capacitor Cld is electrically connected to the ground terminal Gnd. The load resistor Rld conducts the bandgap voltage Vbg to the reference terminal Nref, and the load capacitor Cld stabilizes the reference voltage Vref and filters noise in the bandgap voltage Vbg.

[0053] 2, using low pass filter 213 significantly impacts the startup time and also increases the response time of the IoT device. In other embodiments, the noise filtering function of low pass filter 213 is utilized while reducing the side effects of low pass filter 213.

[0054] 3 is a schematic diagram of an example of a bandgap module according to another embodiment of the present invention. The bandgap module 31 includes a bandgap circuit 311, a low-pass filter 313, a coarse start-up circuit 315, and a fine start-up circuit 317. The start-up process of the bandgap module 31 includes two phases: a coarse phase (PH1) and a fine phase (PH2). The coarse start-up circuit 315 operates in the coarse phase (PH1), and the fine start-up circuit 317 operates in the fine phase (PH2).

[0055] The bandgap circuit 311 and low-pass filter 313 shown in FIG. 3 are similar to those shown in FIG. 2, except that the bandgap branch shown in FIG. 3 is different from that shown in FIG. 2. While the bandgap branch shown in FIG. 2 has only one bandgap resistor R3, the bandgap branch shown in FIG. 3 has two bandgap resistors R3a and R3b. This omits the detailed operation of the bandgap circuit 311 and the low-pass filter 313. The resistance value of the bandgap branch is denoted as Rbg. In short, the bandgap branch shown in FIG. 3 has its resistance value Rbg dynamically changing with different phases.

[0056] The coarse start-up circuit 315 includes a coarse trigger circuit 3151 and a pull-down transistor Mdn. In this specification, it is assumed that the pull-down transistor Mdn is an NMOS transistor, and the coarse trigger circuit 3151 generates a coarse trigger signal Sc_trig to enable / disable the pull-down transistor Mdn. However, in practical applications, the pull-down transistor Mdn may be a PMOS, and the design of the coarse trigger circuit 3151 may have different variations.

[0057] The coarse trigger circuit 3151 is electrically connected to the node terminal Nb and the gate terminal of the pull-down transistor Mdn, whose drain and source terminals are electrically connected to the current control terminal Nc and the ground terminal Gnd, respectively.

[0058] The coarse trigger signal Sc_trig is generated in response to the terminal voltage Vb. The coarse trigger signal Sc_trig controls the pull-down transistor Mdn to turn on, causing the gate terminal of the mirror transistor Mmir to quickly drop to the voltage Gnd. This further increases the conduction speed of the mirror transistor Mmir, and causes the mirror current Imir to instantaneously increase.

[0059] Each time the terminal voltage Vb becomes lower than a predetermined threshold voltage Vth1, the coarse trigger circuit 3151 generates a coarse trigger signal Sc_trig to turn on the pull-down transistor Mdn. In this way, the current control voltage Vc is conducted to the ground terminal Gnd, and the load transistors Mp1 and Mp2 are fully turned on. At this time, a large amount of load current Ia starts to flow through the load transistor Mp1, and an even larger amount of load current Ib starts to flow through the load transistor Mp2.

[0060] When the electronic device is switched from the power-off state to the power-on state or from the power-saving mode to the normal operation mode, it takes time for the signal at the power supply voltage terminal Nvdd to be converted from the ground voltage Gnd to the power supply voltage Vdd. During the rising period of the power supply voltage at the terminal Nvdd, the terminal voltage Vb continuously increases from 0V to a predetermined value. However, immediately after the power is turned on, there is no load current Ia or Ib, or both, or the load current Ib is insufficient to raise the terminal voltage Vb, so the increase in the bandgap voltage Vbg becomes very slow. Therefore, the coarse trigger circuit 3151 injects current into the terminal voltages Va and Vb to assist in the fast startup of the bandgap voltage Vbg.

[0061] According to an embodiment of the present invention, the coarse trigger circuit 3151 directly detects one of the terminal voltages Va and Vb and generates a coarse trigger signal Sc_trig as a response. For ease of understanding, an example of detecting the terminal voltage Vb will be described. When the terminal voltage Vb is lower than the threshold voltage Vth1 (Vb < Vth1), the coarse trigger circuit 3151 determines that the bandgap voltage Vbg is not yet high enough, pulls up the coarse trigger signal Sc_trig, and turns on the pull-down transistor Mdn. Once the pull-down transistor Mdn is turned on, the current control voltage Vc is pulled down, and the currents conducted by the load transistors Mp1 and Mp2 increase. By doing so, the currents injected into the node terminals Na and Nb increase, and the terminal voltages Va and Vb also increase correspondingly.

[0062] As the end voltage Vb gradually increases, the coarse trigger circuit 3151 verifies that the relationship (Vb≧Vth1) is satisfied. In this situation, the coarse trigger circuit 3151 generates a coarse trigger signal Sc_trig to turn off the pull-down transistor Mdn and notify the fine trigger circuit 3171 to compare the reference voltage Vref with the threshold voltage Vth2. Then, the pull-down transistor Mdn stops influencing the current control voltage Vc, and the fine trigger circuit 3171 starts operating.

[0063] The fine startup circuit 317 includes a fine trigger circuit 3171 and switches sw1, sw2, sw3, and sw4. The switch sw3 is a two-way switch. The common terminal of the switch sw3 is electrically connected to the gate terminal of the additional transistor Mx, and the switch terminals of the switch sw3 are electrically connected to the power supply voltage terminal Nvdd and the current control terminal Nc, respectively.

[0064] The fine trigger circuit 3171 receives the coarse trigger signal Sc_trig from the coarse trigger circuit 3151 and receives the reference voltage Vref from the low pass filter 313. Based on the coarse trigger signal Sc_trig and the reference voltage Vref, the fine trigger circuit 3171 generates the fine trigger signal Sf_trig.

[0065] The switches sw1, sw2, sw3, and sw4 are controlled by the fine trigger signal Sf_trig. For comparison, Table 1 summarizes the relationship between the conduction states of the switches sw1, sw2, sw3, and sw4 and the fine trigger signal Sf_trig. This is followed by a detailed description of how to determine the logic potential of the fine trigger signal Sf_trig and the subsequent operation of the switches sw1, sw2, sw3, and sw4.

[0066] [Table 1]

[0067] When the fine trigger signal Sf_trig is set to the logical high level (Sf_trig = H), switches sw1, sw2, and sw4 are turned on, and switch sw3 connects the gate terminal of the additional transistor Mx to the current control terminal Nc. When the fine trigger signal Sf_trig is set to the logical low level (Sf_trig = L), switches sw1, sw2, and sw4 are turned off, and switch sw3 connects the gate terminal of the additional transistor Mx to the power supply voltage terminal Nvdd.

[0068] Switch sw4 is electrically connected to the drain terminal of the additional transistor Mx and the bandgap terminal Nbg. By doing so, switch sw4 selectively conducts the bandgap voltage Vbg to the drain terminal of the additional transistor Mx.

[0069] The bandgap resistor R3b and switch sw2 are connected in parallel. By doing so, when switch sw2 is turned on, the bandgap current Ibg only flows through the bandgap resistor R3 and switch sw2, and does not flow through the bandgap resistor R3b.

[0070] Once the fine trigger circuit 3171 receives the coarse trigger signal Sc_trig indicating that the terminal voltage Vb is greater than or equal to the threshold voltage Vth1 (Vb ≧ Vth1), and the fine trigger circuit 3171 confirms that the reference voltage Vref is lower than the threshold voltage Vth2 (Vref < Vth2), the fine trigger circuit 3171 sets the fine trigger signal Sf_trig to the logical high level (Sf_trig = H). Otherwise, the fine trigger signal Sf_trig is set to the logical low level (Sf_trig = L).

[0071] The selection of the threshold voltages Vth1 and Vth2 can be freely set by the designer and are independent of each other. The threshold voltage Vth1 is set as the terminal voltage Vb, and the threshold voltage Vth2 is set as the reference voltage Vref. The threshold voltage Vth2 is determined by the size (RC value) of the filter.

[0072] The fine trigger circuit 3171 may be, for example, a NOR gate (NOR) logic circuit. The design and implementation of the fine trigger circuit 3171 are not limited.

[0073] The low-pass filter 313 includes a load resistor Rld and a load capacitor Cld, both of which are electrically connected to the reference terminal Nref. The load resistor Rld and the switch sw1 are connected in parallel. In this way, when the switch sw1 is turned on, the load capacitor is charged by the bandgap voltage Vbg via the switch sw1, and is not charged by the load resistor Rld.

[0074] 4A and 4B show the equivalent circuits of the coarse-phase (PH1) and fine-phase (PH2) bandgap modules, respectively. The circuits in FIG. 3 that are not operational for a given time period are omitted in FIGS. 4A and 4B.

[0075] Table 2 compares the change in bandgap current Ibg, bandgap voltage Vbg, and resistance of the bandgap branch in the coarse phase (PH1) and the fine phase (PH2).

[0076] [Table 2]

[0077] See Figures 3, 4A, and Table 2. When the bandgap module 31 operates in the coarse phase (PH1), the additional transistor Mx is turned off, the bandgap current Ibg corresponds to the mirror current Imir (Ibg = Imir), and the bandgap voltage Vbg continuously increases from the ground voltage Gnd to a predetermined value. When the switch sw2 is turned off, the resistance of the bandgap branch Rbg corresponds to the sum of the bandgap resistors R3a and R3b (Rbg = R3a + R3b). The bandgap current Ibg also flows through the bandgap resistors R3a and R3b.

[0078] See Figures 3, 4B, and Table 2. When the bandgap module 31 operates in the fine phase (PH2), the additional transistor Mx is conductive, and the bandgap current Ibg corresponds to the sum of the mirror current Imir and the additional current Ix (Ibg = Imr + Ix). When the switch sw2 is conductive, the resistance of the bandgap branch Rbg corresponds to the bandgap resistor R3a (Rbg = R3a). Also, the bandgap current Ibg flows through the bandgap resistor R3a and the switch sw2, but not through the bandgap resistor R3b. Note that the values ​​of the additional current Ix and the bandgap resistor R3a are selectively set, and the product of the bandgap current Ibg and the bandgap resistor R3a equals the bandgap voltage Vbg. That is, Vbg = (Imr + Ix) * R3a. In this way, a bandgap current Ibg having a high current value is injected in the fine phase (PH2), and the bandgap voltage Vbg is accurately maintained during the startup process.

[0079] 4B, when the additional transistor Mx is turned on, the additional transistor Mx and the mirror transistor Mmir jointly form a current mirror, and the current values ​​of the additional current Ix and the mirror current Imir are determined by the design (aspect ratio) of the additional transistor Mx and the mirror transistor Mmir.

[0080] Let us assume that the additional current Ix corresponds to the mirror current Imir in the fine phase (PH2), and that the bandgap current Ibg in the fine phase (PH2) corresponds to twice the bandgap current Ibg in the coarse phase (PH1). Based on the equivalence of the bandgap current Ibg (Ibg = Imir in the coarse phase (PH1) and Ibg = Imir + Ix = 2*Imir in the fine phase (PH2)) and the characteristic of the bandgap voltage Vbg being held at a constant voltage at the end of the coarse phase (PH1) and the fine phase (PH2), we further conclude that the resistance values ​​of the bandgap resistors R3a and R3b are equivalent. That is, Vbg = Ibg * Rbg = Imir * (R3a + R3b) = (Imir + Ix) * R3a = 2*Imi, and therefore R3a = R3b.

[0081] The electronic device continues to wake up under different conditions, such as when the electronic device is switched from a powered-off state to a powered-on state, or when the electronic device is switched from a power-saving state (e.g., a powered-off mode or a sleep mode) to an active state (e.g., a normal operating mode).

[0082] FIG. 5 is a schematic diagram illustrating state changes applied to an always-on battery-powered electronic device based on a bandgap module design according to one embodiment of the present invention.

[0083] Battery-powered electronic devices that are always on spend most of their time in a low-power state (sleep duration t sleep ), but occasionally needs to be awakened for a short time (activity duration t act When an electronic device switches to an active state, a start-up process is required before the electronic device can actually proceed into normal operating mode.

[0084] Energization time point t on The electronic device goes into a power saving state (or power-off state) before the power-on time point t on After this, the electronic device starts its startup process. The duration of the startup process is the startup duration t start After the start-up process is completed, the electronic device reaches a stable time point t stable The normal operating mode is then entered.

[0085] The bandgap module 31 according to the embodiment of the present invention divides the start-up process into a coarse phase (PH1) and a fine phase (PH2) to achieve a start-up duration t start In the coarse phase (PH1), the bandgap voltage Vbg increases rapidly to a predetermined value, but the rate at which the reference voltage Vref increases is limited by the low-pass filter 313. In the fine phase (PH2), the bandgap voltage Vbg is maintained at a predetermined value, and the switch sw1 is turned on, causing the reference voltage Vref to increase rapidly.

[0086] The embodiment of the present invention shown in Figure 2 meets the requirements of low quiescent current and low noise. Also, the embodiment of the present invention shown in Figure 3 further includes a coarse start-up circuit and a fine start-up circuit, and has a start-up duration t start In this way, the bandgap module and linear regulator according to each embodiment of the present invention meet the performance index requirements and have the characteristics of low quiescent current, low noise, and fast start-up.

[0087] The above-described embodiments are intended to facilitate understanding of the present invention and are not intended to limit the present invention. The present invention may be modified or improved without departing from the spirit thereof, and it goes without saying that the present invention includes equivalents thereof. [Explanation of symbols]

[0088] 10 electronic equipment, 11 battery, 13 Linear regulator, 131 Bandgap circuits, 133 Error amplifier, 15 load circuit, 21 bandgap modules, 211 Bandgap circuits, 211e current mirror, 211a Road Branch, 211c Road Branch, 211g band gap bifurcation, 213 low-pass filter, 31 bandgap modules, 311 Bandgap circuits, 313 low pass filter, 315 Coarse starting circuit, 3151 Coarse trigger circuit, 317 Fine Start-Up Circuit, 3171 Fine trigger circuit, Cld load capacitor, Gnd ground terminal (ground voltage), Ia load current, Ib load current, Ia1 branch current, Ia2 branch current, Ib1 branch current, Ib2 branch current, Ibg bandgap current, Imir Mirror current, Ix additional current, Mdn pull-down transistor, Men transistor Mmir mirror transistor, Mp1 load transistor, Mp2 load transistor, Mpd power saving transistor, Mx additional transistor, Na node edge, Nb node edge, Nbg band gap edge, Nref reference end, NVDD power supply voltage terminal, Nc current control terminal, OP operational amplifier, PH1 coarse phase, PH2 fine phase, Qa transistor, Qb transistor, R3a bandgap resistor, R3b bandgap resistor, Ra shunt resistor, Rb shunt resistor, Rb1 shunt resistor, Rb2 shunt resistor, Rld load resistance, SPD power saving signal, Sc_trig Coarse trigger signal, Sf_trig Fine trigger signal, sw1 switch, sw2 switch, sw3 switch, sw4 switch, t on Current application time point, t startStart-up duration, t stable stable time point, t act Activity duration, t sleep Sleep duration, Va end voltage, Vb end voltage, Vc current control voltage, Vbg bandgap voltage, Vref reference voltage, Vdd power supply voltage, WF1 waveform, WF2 waveform, ΔV Voltage difference.

Claims

1. A bandgap circuit; a start-up module, The bandgap circuit comprises: an operational amplifier having a first input, a second input, and a current control terminal; a current mirror electrically connected to the first input terminal, the second input terminal, and the current control terminal, for generating a first load current, a second load current, and a mirror current, the first load current, the second load current, and the mirror current being generated according to a signal of the current control terminal, and the first load current, the second load current, and the mirror current being equivalent; a first load branch electrically connected to the first input end for receiving the first load current; a second load branch electrically connected to the second input end for receiving the second load current; a bandgap branch electrically connected to the current mirror, receiving the mirror current and used to conduct a bandgap current, and generating a bandgap voltage based on the bandgap current; The startup module: a first start-up circuit electrically connected to the bandgap circuit, the first start-up circuit being used to accelerate the generation of the mirror current and increase the bandgap voltage to a predetermined value when the bandgap module operates in a first phase; a second start-up circuit electrically connected to the bandgap circuit, the low pass filter, and the first start-up circuit, the second start-up circuit being used to conduct additional current toward the bandgap branch and maintain the bandgap voltage at the predetermined value when the bandgap module is operating in a second phase, the second phase following the first phase; a low-pass filter electrically connected to the bandgap circuit and the second start-up circuit, for filtering noise in the bandgap voltage and correspondingly generating a reference voltage.

2. 2. The bandgap module of claim 1, wherein the first start-up circuit triggers the bandgap module to operate in the first phase when the signal at the second input terminal is lower than a first threshold voltage, and the second start-up circuit triggers the bandgap module to operate in the second phase when the first start-up circuit suspends operation and the reference voltage is lower than a second threshold voltage.

3. 3. The bandgap module of claim 2, wherein when the bandgap module operates in the first phase, the bandgap current corresponds to the mirror current, and when the bandgap module operates in the second phase, the bandgap current corresponds to the sum of the mirror current and the additional current.

4. The current mirror comprises: a first load transistor electrically connected to a power supply voltage terminal, the current control terminal, and the first input terminal, for selectively generating the first load current according to the signal of the current control terminal; a second load transistor electrically connected to the power supply voltage terminal, the current control terminal, and the second input terminal, for selectively generating the second load current according to the signal of the current control terminal; 2. The bandgap module of claim 1, further comprising: a mirror transistor electrically connected to the power supply voltage terminal, the current control terminal, and the bandgap terminal, for selectively generating the mirror current based on the signal at the current control terminal.

5. The first start-up circuit a first trigger circuit electrically connected to the second input for generating a first trigger signal based on a comparison between the signal at the second input and a first threshold voltage; a pull-down transistor electrically connected to the first trigger circuit and the current control terminal, the pull-down transistor being selectively turned on based on a first trigger signal; 2. The bandgap module of claim 1, further comprising a pull-down transistor, wherein the signal at the current control end is modified according to the conduction of the pull-down transistor.

6. 6. The bandgap module of claim 5, wherein the pull-down transistor is conductive when the bandgap module operates in the first phase, and the pull-down transistor is off when the bandgap module operates in the second phase.

7. The second start-up circuit a second trigger circuit for receiving the first trigger signal and the reference voltage and for generating a second trigger signal in response; a plurality of switches electrically connected to the second trigger circuit for selectively switching based on the second trigger signal; 6. The bandgap module of claim 5, further comprising: an additional transistor electrically connected to a first switch and a second switch of the plurality of switches for selectively generating the additional current based on the conduction states of the first switch and the second switch.

8. The band gap branch is a first bandgap resistor electrically connected to the bandgap end and to a terminal of a third one of the switches; a second bandgap resistor electrically connected in parallel with the third switch; When the bandgap module operates in the first phase, the third switch is turned off and the bandgap branch has a first resistance value; 8. The bandgap module of claim 7, wherein when the bandgap module operates in the second phase, the third switch is on, the bandgap branch has a second resistance value, and the first resistance value is greater than the second resistance value.

9. 9. The bandgap module of claim 8, wherein when the bandgap module operates in the first phase, the bandgap voltage corresponds to the product of the bandgap current multiplied by the first resistance value, and when the bandgap module operates in the second phase, the bandgap voltage corresponds to the product of the bandgap current multiplied by the second resistance value.

10. 9. The bandgap module of claim 8, wherein the first resistance value corresponds to the sum of the first bandgap resistance and the second bandgap resistance, and the second resistance value corresponds to the first bandgap resistance.

11. The low-pass filter is a load resistor electrically connected to the bandgap end and the reference end of the bandgap module, the reference voltage being generated at the reference end; 8. The bandgap module of claim 7, further comprising: a load capacitor electrically connected to the reference terminal and the ground terminal, and a fourth switch of the plurality of switches electrically connected in parallel with the load resistor.

12. 12. The bandgap module of claim 11, wherein when the bandgap module operates in the first phase, the fourth switch is turned off and the load resistor conducts the bandgap voltage to the reference terminal, and when the bandgap module operates in the second phase, the fourth switch is turned on and the fourth switch conducts the bandgap voltage directly to the reference terminal.

13. 8. The bandgap module of claim 7, wherein the first switch is a two-way switch including a common terminal, a first switch terminal, and a second switch terminal, the common terminal is electrically connected to the gate terminal of the additional transistor, the first switch terminal is electrically connected to a power supply voltage terminal, and the second switch terminal is electrically connected to the current control terminal.

14. 14. The bandgap module of claim 13, wherein the second switch is electrically connected to a bandgap end and a drain end of the additional transistor.

15. 15. The bandgap module of claim 14, wherein when the bandgap module operates in the first phase, the first switch conducts a power supply voltage to the gate terminal of the additional transistor, and the second switch disconnects the drain terminal of the additional transistor from the bandgap terminal.

16. 15. The bandgap module of claim 14, wherein when the bandgap module operates in the second phase, the first switch connects the current control terminal to the gate terminal of the additional transistor, and the second switch connects the drain terminal of the additional transistor to the bandgap terminal.

17. 2. The bandgap module of claim 1, wherein the additional current corresponds to the mirror current.

18. The bandgap circuit comprises:

10. The bandgap module of claim 1, further comprising a power save transistor electrically connected to the bandgap circuit for selectively conducting based on a power save signal, the bandgap module being disabled when the power save transistor is conducting.

19. 10. The bandgap module of claim 1, wherein the bandgap voltage is independent of temperature.

20. 1. A linear regulator for receiving a power supply voltage, comprising: a bandgap module; an error amplifier electrically connected to the bandgap module, the error amplifier being used to generate an error signal by comparing a reference voltage with a comparison voltage, and the error amplifier generating an adjusted voltage based on the power supply voltage and the error signal; The bandgap module comprises: a bandgap circuit for receiving a bandgap voltage; a startup module; The bandgap circuit comprises: an operational amplifier having a first input, a second input, and a current control terminal; a current mirror electrically connected to the first input terminal, the second input terminal, and the current control terminal, for generating a first load current, a second load current, and a mirror current, the first load current, the second load current, and the mirror current being generated according to a signal of the current control terminal, and the first load current, the second load current, and the mirror current being equivalent; a first load branch electrically connected to the first input end for receiving the first load current; a second load branch electrically connected to the second input end for receiving the second load current; a bandgap branch electrically connected to the current mirror, receiving the mirror current and used to conduct a bandgap current, and generating the bandgap voltage based on the bandgap current; The startup module: a first start-up circuit electrically connected to the bandgap circuit for accelerating the generation of the mirror current and increasing the bandgap voltage to a predetermined value when the bandgap module operates in a first phase; a second start-up circuit electrically connected to the bandgap circuit, a low pass filter, and the first start-up circuit, the second start-up circuit being used to conduct additional current toward the bandgap branch and maintain the bandgap voltage at the predetermined value when the bandgap module is operating in a second phase, the second phase following the first phase; Here, the low-pass filter is electrically connected to the bandgap circuit and the second start-up circuit, and is used to filter noise from the bandgap voltage and generate the reference voltage accordingly.

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