Light-emitting device

Abstract

To reduce the number of masks used in a manufacturing step for a semiconductor device, and reduce the number of photolithography steps.SOLUTION: A first step of forming a first conductive film over a substrate, forming a first insulating film over the first conductive film, forming a semiconductor film over the first insulating film, forming a semiconductor film including a channel region by etching at least a part of the semiconductor film, forming a second insulating film over the semiconductor film including the channel region, forming a mask over the second insulating film, and removing a first part of the second insulating film that overlaps with the semiconductor film including the channel region and does not overlap with the mask and at the same time removing a second part of the first insulating film and the second insulating film that does not overlap with the mask and the semiconductor film including the channel region is performed. After the first step, the mask is removed and a second conductive film electrically connected to the semiconductor film including the channel region is formed over at least a part of the second insulating film.SELECTED DRAWING: Figure 3

Description

[Technical Field]

[0001] The present invention relates to a semiconductor device and a method for manufacturing the semiconductor device. [Background technology]

[0002] In recent years, thin films with thicknesses ranging from several nanometers to several hundred nanometers have been developed on substrates with insulating surfaces such as glass substrates. Transistors made of thin semiconductor films of about I C (Integrated Circuit) and electronic devices including electro-optical devices Transistors are also widely used in liquid crystal displays and organic light-emitting diodes (EL active light-emitting devices, such as those using photoluminescence (PEL) elements It is also used as a switching element in matrix type display devices and light emitting devices.

[0003] The applications of the above-mentioned active matrix display devices and light-emitting devices are expanding. There is a growing demand for larger screen sizes, higher definition, and higher aperture ratios. The equipment must be highly reliable, and the production method must have high productivity and reduce production costs. is required.

[0004] In the manufacture of transistors used in active matrix display devices and light-emitting devices Therefore, reducing the number of photolithography steps is important for cost reduction. Photomasks for the 10th and 11th generations cost tens of millions of yen each, In fact, the cost per sheet can reach several hundred million yen. Just one increase in the number of processes, including related processes, increases significantly. Numerous techniques have been developed to reduce the number of lithography steps.

[0005] A typical method for reducing the number of photolithography steps in the transistor manufacturing process As a means, a multi-tone mask (also called a half-tone mask or gray-tone mask) ) is widely known. An example of reducing the manufacturing process using a multi-tone mask is Examples thereof include Patent Documents 1 to 3. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] Japanese Patent Application Laid-Open No. 2012-178545 [Patent Document 2] Japanese Patent Application Laid-Open No. 2011-155303 [Patent Document 3] Japanese Patent Application Laid-Open No. 2009-124124 Summary of the Invention [Problem to be solved by the invention]

[0007] One aspect of the present invention is to reduce the number of masks used in a manufacturing process of a semiconductor device. Another object is to reduce the number of photolithography processes. One of the objects is to shorten the manufacturing time of the device. Another object is to reduce the manufacturing cost of the semiconductor device. One of the objectives is to [Means for solving the problem]

[0008] In one aspect of the present invention, a first conductive film is formed above a substrate, and a first insulating film is formed above the first conductive film. An insulating film is formed, a semiconductor film is formed above the first insulating film, and at least a part of the semiconductor film is A semiconductor film including a channel region is formed by etching the semiconductor film. A second insulating film is formed on the second insulating film, a mask is formed on the second insulating film, and removing a first portion that overlaps the semiconductor film including the channel region and that does not overlap the mask; At the same time, the first insulating film and the second insulating film are masked and the semiconductor film including the channel region is A first step is performed to remove the second portion that does not overlap with the first step, and the mask is removed after the first step. a second insulating film electrically connected to a semiconductor film including a channel region above at least a portion of the second insulating film; and forming a second conductive film on the semiconductor device. .

[0009] In the above, after the first step, before removing the mask, the mask is retracted and the second step is performed. It is preferable to expose a part of the second insulating film and remove a part of the second insulating film.

[0010] In another embodiment of the present invention, a first conductive film is formed above a substrate, and a conductive film is formed above the first conductive film. a first insulating film is formed on the semiconductor film; a semiconductor film is formed on the first insulating film; and A semiconductor film including a channel region is formed by etching a part of the semiconductor film. A second insulating film is formed above the main film, and a first region and a second insulating film are formed above the second insulating film. a second region having a thickness smaller than the thickness in the first region; a first step of removing the portions of the first insulating film and the second insulating film that do not overlap with the mask; After the step (a), a second step is performed in which the mask in the second region is removed by retracting the mask. After the second step, a third step is performed to remove a portion of the second insulating film that overlaps with the second region. After the third step, the mask is removed and a chalcogenide film is formed on at least a portion of the second insulating film. forming a second conductive film electrically connected to the semiconductor film including the panel region; The present invention relates to a method for manufacturing a semiconductor device.

[0011] In another embodiment of the present invention, a first conductive film is formed above a substrate, and a conductive film is formed above the first conductive film. A first insulating film is formed on the semiconductor film, and a semiconductor film is formed on the first insulating film. A first region and a second region having a thickness smaller than the thickness in the first region. A mask is formed on the first insulating film and the semiconductor film, and the portions of the first insulating film and the semiconductor film that do not overlap with the mask are removed to form the first insulating film. a first step of forming an opening in the insulating film; and after the first step, the mask is retracted. A second step is performed to remove the mask in the second region by A third step is performed to remove the portion overlapping with the second region and form a semiconductor film including a channel region. After the third step, the mask is removed and a second insulating film is formed above the semiconductor film including the channel region. a film is formed, and at least a portion of the second insulating film overlapping the opening is removed, and a small portion of the second insulating film is removed. a second conductive film electrically connected to the semiconductor film including the channel region above at least a portion of the semiconductor film; The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device.

[0012] In another embodiment of the present invention, a first electrode is formed on a substrate, and a first An insulating film is formed, a second insulating film is formed above the first insulating film, and a third insulating film is formed above the second insulating film. a first conductive film is formed, and a first region and a second region are formed above the first conductive film, the second region and the second region being thicker than the first region; and a second region having a thickness smaller than the first insulating film. A first step is performed to remove the portions of the insulating film and the first conductive film that do not overlap with the mask; After the step (a), a second step is performed in which the mask in the second region is removed by retracting the mask. After the second step, a third step is performed to remove the portion of the first conductive film that overlaps with the second region. After the third step, the mask is removed and a third insulating film is formed on at least a portion of the second insulating film. An insulating film is formed, and a third insulating film is electrically connected to the first electrode above at least a part of the third insulating film. and forming a second conductive film.

[0013] In the above, before forming the first electrode, a step of forming a semiconductor film above the substrate a step of forming a fourth insulating film above the semiconductor film; The method may further include a step of forming a hole. The electrode may be electrically connected to the semiconductor film through a first opening formed in a fourth insulating film. In the above, the semiconductor film may include an oxide semiconductor. The second insulating film may have a tapered shape. The opening formed in the first step may have a tapered shape. The opening formed in the insulating film may have a tapered shape. The insulating film may have a tapered side surface.

[0014] In another embodiment of the present invention, a first electrode is formed on a substrate, and a first An insulating film is formed, a second insulating film is formed above the first insulating film, and a third insulating film is formed above the second insulating film. a first conductive film is formed, and a first region and a second region are formed above the first conductive film, the second region and the second region being thicker than the first region; and a second region having a thickness smaller than the first insulating film. A first step is performed to remove the portions of the insulating film and the first conductive film that do not overlap with the mask; After the step (a), a second step is performed in which the mask in the second region is removed by retracting the mask. After the second step, a third step is performed to remove the portion of the first conductive film that overlaps with the second region. After the third step, the mask is removed, and the upper surface of at least a part of the second insulating film is At least the side surface of the second insulating film in the opening formed in the second insulating film by the first step A third insulating film is formed above at least a part of the first insulating film. forming a second conductive film electrically connected to the first electrode. A method for manufacturing a body device.

[0015] In another embodiment of the present invention, a first electrode is formed on a substrate, and a first An insulating film is formed, a second insulating film is formed above the first insulating film, and a third insulating film is formed above the second insulating film. a first conductive film is formed, and a first region and a second region are formed above the first conductive film, the second region and the second region being thicker than the first region; and a second region having a thickness smaller than the first insulating film. A first step is performed to remove the portions of the insulating film and the first conductive film that do not overlap with the mask; After the step (a), a second step is performed in which the mask in the second region is removed by retracting the mask. After the second step, a third step is performed to remove the portion of the first conductive film that overlaps with the second region. After the third step, the mask is removed, and the upper surface of at least a part of the second insulating film is above the side surface of the second insulating film in the opening formed in the second insulating film by the first step; A third insulating film is formed above at least a part of the first electrode, and a small part of the third insulating film is formed. forming a second conductive film electrically connected to the first electrode above at least a portion of the first electrode; The present invention relates to a method for manufacturing a semiconductor device. [Effects of the Invention]

[0016] According to one embodiment of the present invention, the number of masks used in a manufacturing process of a semiconductor device can be reduced. Furthermore, the number of photolithography steps can be reduced. Furthermore, the manufacturing cost of the semiconductor device can be reduced. [Brief explanation of the drawings]

[0017] [Figure 1] 1A and 1B are top views illustrating a semiconductor device. [Figure 2] 1A to 1C are cross-sectional views illustrating a manufacturing method of a semiconductor device according to one embodiment of the present invention. [Figure 3] 1A to 1C are cross-sectional views illustrating a manufacturing method of a semiconductor device according to one embodiment of the present invention. [Figure 4] 1A to 1C are cross-sectional views illustrating a manufacturing method of a semiconductor device according to one embodiment of the present invention. [Figure 5] 1A to 1C are cross-sectional views illustrating a manufacturing method of a semiconductor device according to one embodiment of the present invention. [Figure 6] 1A to 1C are cross-sectional views illustrating a manufacturing method of a semiconductor device according to one embodiment of the present invention. [Figure 7] 1A to 1C are cross-sectional views illustrating a manufacturing method of a semiconductor device according to one embodiment of the present invention. [Figure 8] 1A to 1C are cross-sectional views illustrating a manufacturing method of a semiconductor device according to one embodiment of the present invention. [Figure 9] 1A to 1C are cross-sectional views illustrating a manufacturing method of a semiconductor device according to one embodiment of the present invention. [Figure 10] 1A to 1C are cross-sectional views illustrating a manufacturing method of a semiconductor device according to one embodiment of the present invention. [Figure 11] 1A to 1C are cross-sectional views illustrating a manufacturing method of a semiconductor device according to one embodiment of the present invention. [Figure 12]1A to 1C are cross-sectional views illustrating a manufacturing method of a semiconductor device according to one embodiment of the present invention. [Figure 13] 1A and 1B illustrate a liquid crystal display device. [Figure 14] 1A to 1C illustrate electronic devices. [Figure 15] 1A to 1C are cross-sectional views illustrating a manufacturing method of a semiconductor device according to one embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0018] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. The present invention is not limited to the following description, and those skilled in the art will recognize that various modifications can be made to the modes and details. It will be easily understood. Furthermore, the present invention should not be construed as being limited to the description of the following embodiments. In explaining the configuration of the invention using the drawings, the same symbols are used to indicate the same things. The numbers are used in common across different drawings. When referring to the same thing, the hatch pattern is used. Similarly, there are cases where no particular symbol is attached.

[0019] In this specification, the ordinal numbers such as "1st" and "2nd" are used for convenience. It does not indicate the order of processes or stacking. For example, "first" may be replaced with "second" or " can be appropriately replaced with "third" etc. The ordinal numbers used to identify an aspect of the present invention may not match. be.

[0020] In addition, in this specification, the term "above" means that the positional relationship of a component is "directly above." For example, the expression "gate electrode on an insulating layer" means that the insulating layer This does not exclude the inclusion of other components between the gate electrode and the substrate. In addition, cases where there is no planar overlap (which can also be said to be cases where there is no overlap) are not excluded.

[0021] In addition, in this specification, the terms "electrode" and "wiring" are used to refer to these components functionally. For example, an "electrode" may be used as part of a "wiring." Furthermore, the terms "electrode" and "wire" are used interchangeably to refer to the plural "electrodes." This also includes cases where "wires" and "circuits" are formed as a single unit.

[0022] Also, the functions of "source" and "drain" may differ depending on whether transistors with different polarities are used or not. However, they may be swapped when the direction of current changes during circuit operation. In this specification, the terms "source" and "drain" are used interchangeably. It is assumed that this is possible.

[0023] In addition, "electrically connected" means connected via "something that has some kind of electrical effect." Here, "something that has some kind of electrical effect" refers to the electrical connection between the connected objects. There are no particular restrictions as long as it is capable of sending and receiving electrical signals. "Things that have an electrochemical effect" include electrodes and wiring.

[0024] Even when written as "semiconductor," if the conductivity is sufficiently low, it may be written as "insulator." In addition, the boundary between "semiconductor" and "insulator" is vague, and Therefore, the term "semiconductor" used in this specification is sometimes called "insulator." Similarly, the term "insulator" used herein may be interchangeable with "semiconductor." Sometimes it can be rephrased.

[0025] Also, even if a material is written as a "semiconductor," if the material has a sufficiently high conductivity, it may be written as a "conductor." In addition, the boundary between "semiconductor" and "conductor" is vague, and Therefore, the term "semiconductor" used in this specification is also used to refer to "conductor." Similarly, the term "conductor" used herein may be interchangeable with "semiconductor." Sometimes it can be rephrased.

[0026] In addition, in this specification, "parallel" means that two straight lines are at an angle of -10° or more and 10° or less. Therefore, it also includes the case where the angle is between -5° and 5°. "Perpendicular" refers to two straight lines that form an angle of 80° or more and 100° or less. Therefore, the angle may be between 85° and 95°.

[0027] In this specification and the like, when the crystal is a trigonal or rhombohedral crystal, it is represented as a hexagonal crystal system. vinegar.

[0028] (Embodiment 1) A manufacturing method of a semiconductor device according to one embodiment of the present invention will be described with reference to FIGS. FIG. 1 is a top view of a semiconductor device, and FIG. 1(A) shows a pixel region of a liquid crystal display device. 1B and 1C are the parts where the driver of the liquid crystal display device etc. is provided. For simplicity, only one of the components is shown. For example, insulating films 104 and 108, which will be described later, are not shown. The cross-sectional structure of the portion indicated by the dashed line X1-X2 in FIG. 1(A) is shown in cross-sections in FIGS. 2 to 10. The cross section X1-X2 is a cross-sectional view of a part of the region where the transistor is formed. The cross-sectional structure of the portion indicated by the dashed line Y1-Y2 in FIG. 1(B) is shown in FIGS. 2 to 10. The cross section Y1-Y2 shows the conductive film and the semiconductor film provided under the semiconductor film. 1 is a cross-sectional view of a part of a region where a conductive film provided on the film is electrically connected.

[0029] ≪Manufacturing method 1≫ First, referring to FIGS. 2 and 3, the transistor 150 and the connection part 16 shown in FIG. 3(D) are Explain how to form 0.

[0030] <Substrate> First, a substrate 100 is prepared (FIG. 2(A)). There are no significant limitations on the material of the substrate 100. However, the material used should at least have sufficient heat resistance to withstand the subsequent heat treatment. Glass substrate, ceramic substrate, quartz substrate, sapphire substrate, YSZ (yttria stabilized zirconia) A silicon substrate or the like may be used as the substrate 100. Also, silicon or silicon carbide may be used. Single crystal semiconductor substrates, polycrystalline semiconductor substrates, and compound semiconductor substrates such as silicon germanium It is also possible to use an SOI substrate or the like.

[0031] In addition, a semiconductor substrate or an SOI substrate on which a semiconductor element is provided is used as the substrate 100. In this case, the transistor 150 is formed on the substrate 100 via an interlayer insulating layer. At this time, the conductive film of the transistor 150 is connected to the connection electrode embedded in the interlayer insulating layer. At least one of the conductive film 102b, the conductive film 114b, and the conductive film 114c is connected to the semiconductor element. The transistor 1 is electrically connected to the semiconductor element via an interlayer insulating layer. By providing the transistor 50, the increase in area due to the addition of the transistor 150 can be suppressed. It is possible.

[0032] Alternatively, a flexible substrate such as plastic may be used as the substrate 100, and the substrate may be directly mounted on the flexible substrate. Alternatively, the transistor 150 may be formed between the substrate 100 and the transistor 150. The peeling layer may be provided on the upper layer of the transistor. After that, it can be separated from the substrate 100 and used for transferring to another substrate. Therefore, the transistor 150 can be mounted on a substrate with low heat resistance or a flexible substrate.

[0033] <Conductive film formation> Next, a conductive film is formed above the substrate 100 by sputtering, CVD, vapor deposition, or the like. A resist mask is formed over the conductive film by a photolithography process. The conductive film is partially etched using a mask to form the conductive film 102a and the conductive film 102b. The conductive film 102b is used as a gate electrode of the transistor 150. It can function as a pole.

[0034] The conductive film 102a and the conductive film 102b may be made of aluminum, chromium, copper, tantalum, or titanium. , molybdenum, tungsten, or an alloy containing the above metals. The above-mentioned metals can be combined to form an alloy. Metals selected from any one or more of zirconium may be used.

[0035] The conductive film 102a and the conductive film 102b may have a single-layer structure or a stacked structure of two or more layers. For example, a layer of tungsten, titanium, or molybdenum may be formed on or under the aluminum film. A film that functions as a barrier film, such as a selected metal or an alloy containing the above-mentioned metal, is deposited. Alternatively, a two-layer structure may be used in which a layer of the aluminum film is formed on the top and bottom of the aluminum film, and the layer of the aluminum film functions as the barrier film. Similarly, the above-mentioned barrier film may be laminated on or under the copper film to form a three-layer structure. Alternatively, a two-layer structure may be formed by laminating a film that functions as a barrier film on the top and bottom of the copper film. Alternatively, a three-layer structure may be formed by laminating films that function as the above.

[0036] Since the aluminum film and the copper film have low resistance, they are used for the conductive film 102a and the conductive film 102b. By using tungsten and titanium, the power consumption of the semiconductor device can be reduced. A film that functions as a barrier film, such as a silicon film or a molybdenum film, is bonded to an aluminum film or a copper film. By stacking the layers in this order, it is possible to suppress this diffusion and improve the reliability of the semiconductor device. Cut.

[0037] In addition, an In-Ga-Zn-based oxynitride semiconductor is formed between the conductive film 102b and the insulating film 104 described later. Conductor film, In-Sn oxynitride semiconductor film, In-Ga oxynitride semiconductor film, In-Zn Oxynitride semiconductor film, Sn-based oxynitride semiconductor film, In-based oxynitride semiconductor film, metal nitride film (I These films may have a resistivity of 5 eV or more, preferably 5.5 eV or more. The work function is higher than that of the oxide semiconductor, and the electron affinity is higher than that of the oxide semiconductor. When an oxide semiconductor is used for the conductor film, the threshold voltage of the transistor is shifted to the positive side. This makes it possible to realize a switching element with so-called normally-off characteristics. When a Ga-Zn-based oxynitride semiconductor film is used, the nitrogen content is at least higher than that of the semiconductor film 106b. Specifically, an In-Ga-Zn-based oxynitride semiconductor film with a concentration of 7 atomic % or more is used.

[0038] <Insulating film formation> Next, an insulating film 104 is formed above the substrate 100, the conductive film 102a, and the conductive film 102b. The insulating film 104 serves as a gate insulating film in the transistor 150. It can be made to function.

[0039] The insulating film 104 is made of, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, or silicon nitride. Copper, aluminum oxide, hafnium oxide, gallium oxide or Ga-Zn-based metal oxide The above may be used, and the layer may be a laminate or a single layer.

[0040] The insulating film 104 is made of hafnium silicate (HfSiO x ), nitrogen added Hafnium silicate (HfSi x O y N z ), nitrogen-doped hafnium aluminate HfAl x O y N z ), high-k materials such as hafnium oxide and yttrium oxide By using this, the gate leakage of the transistor can be reduced.

[0041] The insulating film 104 is formed by a sputtering method, a CVD method, a vapor deposition method, or the like.

[0042] When forming a silicon nitride film as the insulating film 104, it is preferable to use a two-stage formation method. First, a mixture of silane, nitrogen, and ammonia gases was used as the source gas. The first silicon nitride film with few defects is formed by the plasma CVD method. The hydrogen concentration is low and hydrogen is blocked by switching to a mixture of silane and nitrogen. By this method, the insulating film As the silicon nitride film 104, a silicon nitride film having few defects and hydrogen blocking properties is formed. It is possible.

[0043] When a gallium oxide film is formed as the insulating film 104, MOCVD (Metal O Formed using the Organic Chemical Vapor Deposition method It is possible.

[0044] <Semiconductor film formation> Next, a semiconductor film is formed on the insulating film 104 by sputtering, CVD, vapor deposition, or the like. Then, a resist mask is formed on the semiconductor film by a photolithography process. At least a part of the semiconductor film is etched using the resist mask to form a semiconductor film 10 6a and a semiconductor film 106b are formed (FIG. 2(D)). The semiconductor film 106b is The channel region in the sta 150 is included.

[0045] Various semiconductor materials can be used for the semiconductor film 106a and the semiconductor film 106b. Specifically, amorphous silicon, microcrystalline silicon, polycrystalline silicon, and single-crystalline silicon can be used. These films can be provided as a single layer or a laminate. In a part of these semiconductor films, or in the case of stacked layers, at least one layer contains impurities that give the conductivity type. Materials may also be added.

[0046] In addition to the above semiconductor materials, oxide semiconductors can also be used. Some of these transistors have the characteristic of having an extremely low off-state current. When the capacitance element of each pixel in the liquid crystal display device is used, the signal retention capability of the capacitance element of each pixel in the liquid crystal display device is improved. This allows the frame frequency to be reduced, for example, when displaying still images. By reducing the system frequency, the power consumption of the display device can be reduced.

[0047] Oxide semiconductors that can be used for the semiconductor film 106a and the semiconductor film 106b will be described below. Reveal.

[0048] The oxide semiconductor contains, for example, indium. The oxide semiconductor containing indium has a carrier In addition, the oxide semiconductor preferably contains an element M. The element M may be, for example, aluminum, gallium, yttrium, or tin. The element M is, for example, an element having a high bond energy with oxygen. It is an element that has the function of widening the energy gap of semiconductors. The oxide semiconductor preferably contains zinc. When the oxide semiconductor contains zinc, it becomes a crystalline oxide semiconductor. In addition, the energy (Ev) at the top of the valence band of an oxide semiconductor is, for example, It may be possible to control this by adjusting the atomic ratio.

[0049] However, the oxide semiconductor does not necessarily contain indium. It may also be n-Sn oxide or Ga-Sn oxide.

[0050] In oxide semiconductors, when the sum of In and M is 100 atomic %, The atomic ratio of In is less than 50 atomic %, M is 50 atomic % or more, or I In-M-Zn oxides with n less than 25 atomic % and M greater than or equal to 75 atomic % The oxide semiconductor may be formed such that the sum of In and M is 100 atomic %. When the atomic ratio of In and M is 25 atomic % or more, the atomic ratio of M is 75 atomic % or more. or In- with 34 atomic % or more and M less than 66 atomic % M-Zn oxide may also be used.

[0051] In addition, oxide semiconductors have a large energy gap. The voltage is 2.7 eV or more and 4.9 eV or less, preferably 3 eV or more and 4.7 eV or less, more preferably Preferably, it is 3.2 eV or more and 4.4 eV or less.

[0052] In order to stabilize the electrical characteristics of a transistor, the impurity concentration in the oxide semiconductor is reduced, It is effective to make it highly purified and intrinsic. Light elements, metalloid elements, and metallic elements (less than 0.05%) are considered impurities. For example, hydrogen, Lithium, carbon, nitrogen, fluorine, sodium, silicon, chlorine, potassium, calcium, Titanium, iron, nickel, copper, germanium, strontium, zirconium and hafnium Sum can become an impurity in the oxide semiconductor. It is preferable to reduce it.

[0053] For example, when silicon is contained in an oxide semiconductor, impurity levels are formed in some cases. Furthermore, the presence of silicon on the surface of the oxide semiconductor may form impurity levels. Therefore, the silicon concentration inside and on the surface of the oxide semiconductor can be measured by secondary ion mass spectrometry (S IMS (Secondary Ion Mass Spectrometry) , 1×10 19 atoms / cm 3 Less than 5 x 10 18 atoms / cm 3 Not yet More preferably, 2 x 10 18 atoms / cm 3 Less than.

[0054] Furthermore, hydrogen in an oxide semiconductor forms impurity levels, which increases the carrier density. Therefore, the hydrogen concentration of the oxide semiconductor is 2×10 20 at oms / cm 3 Less than or equal to 5 x 10 19 atoms / cm 3 Below, more preferably 1×10 19 atoms / cm 3 Less than 5 × 10, more preferably 18 atoms / cm 3 In addition, nitrogen in an oxide semiconductor forms an impurity level and increases the carrier density. Therefore, the nitrogen concentration in the oxide semiconductor can be measured by SIMS. , 5×10 19 atoms / cm 3 Less than 5 x 10 18 atoms / cm 3 Below or less, more preferably 1 x 10 18 atoms / cm 3 Less than 5 × 10, more preferably 1 7 atoms / cm 3 The following applies.

[0055] Oxide semiconductor films are roughly classified into non-single-crystal oxide semiconductor films and single-crystal oxide semiconductor films. The single-crystal oxide semiconductor film is called CAAC-OS (C Axis Aligned Crystal Polycrystalline oxide semiconductor film The oxide semiconductor film includes a microcrystalline oxide semiconductor film, an amorphous oxide semiconductor film, and the like.

[0056] The oxide semiconductor film may include a CAAC-OS film. We will explain about this.

[0057] The CAAC-OS film is one of the oxide semiconductor films that has multiple crystal parts. The crystal part is so large that it fits inside a cube with a side length of less than 100 nm. The crystals contained in the S film are cubic with sides of less than 10 nm, 5 nm, or 3 nm. This also includes cases where the size fits within the

[0058] The CAAC-OS film was observed under a transmission electron microscope (TEM). When observed under a crystalline microscope, clear boundaries between the crystals, i.e., crystal boundaries, are clearly visible. It is not possible to confirm the grain boundary. It can be said that the C-OS film is less susceptible to the decrease in electron mobility caused by grain boundaries.

[0059] The CAAC-OS film was observed by TEM from a direction roughly parallel to the sample surface (cross-sectional TEM observation). ) It can be confirmed that the metal atoms are arranged in layers in the crystalline part. Each layer has a roughness on the surface on which the CAAC-OS film is to be formed (also called the surface on which the film is to be formed) or on the top surface. The shape is a reflection of the CAAC-OS film and is aligned parallel to the surface on which the CAAC-OS film is formed or the upper surface.

[0060] On the other hand, the CAAC-OS film was observed by TEM from a direction approximately perpendicular to the sample surface (planar TEM). When observed, it was found that the metal atoms were arranged in triangular or hexagonal shapes in the crystals. However, there is no regularity in the arrangement of metal atoms between different crystal parts. stomach.

[0061] Cross-sectional and planar TEM observations revealed that the crystals in the CAAC-OS film had an orientation. It turns out that there are.

[0062] X-ray diffraction (XRD) was performed on the CAAC-OS film. For example, a CAAC-OS film with InGaZnO4 crystals was found by structural analysis using the device. In the out-of-plane analysis, a peak was observed at a diffraction angle (2θ) of approximately 31°. This peak is attributed to the (009) plane of the InGaZnO4 crystal. This indicates that the crystals of the CAAC-OS film have a c-axis orientation, and the c-axis is approximately aligned on the surface on which the film is formed or on the upper surface. It can be seen that it is oriented in a substantially vertical direction.

[0063] On the other hand, in-pl X-rays are incident on the CAAC-OS film from a direction approximately perpendicular to the c-axis. In the analysis by the ane method, a peak may appear at 2θ around 56°. This is attributed to the (110) plane of the InGaZnO4 crystal. In the case of a semiconductor film, 2θ is fixed at around 56°, and the normal vector of the sample surface is set as the axis (φ axis). When the sample is rotated and analyzed (φ scan), the crystal plane equivalent to the (110) plane is In contrast, in the case of the CAAC-OS film, 2θ is set to 5 Even when the φ is fixed at around 6° and scanned, no clear peak appears.

[0064] From the above, it is concluded that the a-axis and b-axis orientations are inconsistent between different crystal regions in the CAAC-OS film. Although it is regular, it has a c-axis orientation, and the c-axis is parallel to the normal vector of the surface to be formed or the upper surface. Therefore, the layered arrangement confirmed by the cross-sectional TEM observation mentioned above is consistent with the above. Each layer of aligned metal atoms is a plane parallel to the ab plane of the crystal.

[0065] The crystalline part is formed when the CAAC-OS film is formed or when a crystallization process such as a heat treatment is performed. As described above, the c-axis of the crystal is aligned with the surface on which the CAAC-OS film is formed or the surface on which the CAAC-OS film is formed. The orientation of the CAAC-OS film is parallel to the normal vector of the top surface. When the shape is changed by etching, the c-axis of the crystal is aligned with the surface on which the CAAC-OS film is formed. Or it may not be parallel to the normal vector of the upper surface.

[0066] The crystallinity of the CAAC-OS film may not be uniform. When the crystal part of the CAAC-OS film is formed by crystal growth from the vicinity of the top surface, The area near the surface may have a higher degree of crystallinity than the area near the surface to be formed. When impurities are added to a C-OS film, the crystallinity of the region where the impurities are added changes, resulting in partial In some cases, regions of different crystallinity may be formed.

[0067] In addition, the out-of-plane method of CAAC-OS film with InGaZnO4 crystals In the analysis by , in addition to the peak at 2θ around 31°, a peak also appeared at 2θ around 36°. The peak at 2θ around 36° is due to the presence of c-axis orientation in part of the CAAC-OS film. The CAAC-OS film contains crystals that do not have a 2θ of around 31°. It is preferable that the peak is exhibited at 2θ of around 36° and that the peak is not exhibited at 2θ of around 36°.

[0068] The CAAC-OS film is an oxide semiconductor film with a low concentration of impurities. These are elements other than the main components of the oxide semiconductor film, such as silicon and transition metal elements. The elements that bond to oxygen more strongly than the metal elements that constitute the oxide semiconductor film, such as fluorine, are oxidized. By removing oxygen from the oxide semiconductor film, the atomic arrangement of the oxide semiconductor film is disrupted, reducing its crystallinity. In addition, heavy metals such as iron and nickel, argon, and carbon dioxide have an atomic radius (or molecular radius) is large, and when it is contained inside the oxide semiconductor film, The impurities contained in the oxide semiconductor film are likely to disturb the atomic arrangement and cause a decrease in crystallinity. Objects can act as carrier traps or carrier sources.

[0069] The CAAC-OS film is an oxide semiconductor film with a low density of defect states. Oxygen vacancies in the semiconductor film can become carrier traps or trap hydrogen, It can be a source of carrier generation.

[0070] Low impurity concentration and low defect level density (low oxygen vacancies) are called high purity intrinsic or The term "substantially highly purified intrinsic" refers to a highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor film. Since there are fewer carrier generation sources, the carrier density can be reduced. A transistor using an oxide semiconductor film has electrical characteristics such as a negative threshold voltage ( It is also called marion.) It is rare for it to become high purity genuine or substantially high purity genuine. The oxide semiconductor film has few carrier traps. A transistor using such a material has little fluctuation in electrical characteristics and is highly reliable. Note that it takes a long time for charges trapped in the carrier traps in the oxide semiconductor film to be released. The time between the charges is long and the charge may behave as if it is a fixed charge. However, a transistor using an oxide semiconductor film with a high density of defect states has unstable electrical characteristics. There are cases where this happens.

[0071] In addition, transistors using CAAC-OS films show improved electrical characteristics when irradiated with visible light or ultraviolet light. The fluctuation is small.

[0072] Next, a microcrystalline oxide semiconductor film will be described.

[0073] In the microcrystalline oxide semiconductor film, crystal parts can be clearly seen in the TEM image. The crystal part contained in the microcrystalline oxide semiconductor film may have a size of 1 nm or more and 100 nm or less. , or 1 nm to 10 nm in size. Nanocrystals (nc) are microcrystals of 1 nm or less and 3 nm or less. The oxide semiconductor film having nc-OS (nanocrystalline Oxide Semiconductor Film) The nc-OS film is called a TE film. In the M observation image, the grain boundaries may not be clearly visible.

[0074] The nc-OS film is a microscopic region (e.g., a region of 1 nm to 10 nm, especially a region of 1 nm or more). The nc-OS film has a periodic atomic arrangement in the region of 3 nm or less. There is no regularity in the crystal orientation between the crystal parts. Therefore, no orientation is observed throughout the film. Therefore, depending on the analytical method, the nc-OS film may be indistinguishable from an amorphous oxide semiconductor film. For example, an XRD apparatus using X-rays with a diameter larger than that of the crystals is used for nc-OS films. When structural analysis is performed using the out-of-plane method, the crystal plane is shown. In addition, the nc-OS film has a diameter larger than that of the crystalline part (for example, 50n When electron diffraction (also called selected area electron diffraction) is performed using an electron beam of 1000 nm or more, halo On the other hand, the nc-OS film has a diffraction pattern similar to the size of the crystal part. Electron diffraction ( When nanobeam electron diffraction (NC-OS) is performed, spots are observed. When nanobeam electron diffraction is performed on the film, a circular (ring-shaped) region of high brightness is observed. In addition, nanobeam electron diffraction of the nc-OS film reveals ring-shaped Multiple spots may be observed within an area.

[0075] The nc-OS film is an oxide semiconductor film with higher order than an amorphous oxide semiconductor film. Therefore, the nc-OS film has a lower density of defect states than the amorphous oxide semiconductor film. In the nc-OS film, there is no regularity in the crystal orientation between different crystal parts. The S film has a higher defect state density than the CAAC-OS film.

[0076] The oxide semiconductor film may be, for example, an amorphous oxide semiconductor film, a microcrystalline oxide semiconductor film, or a CA The AC-OS film may be a laminated film having two or more kinds of films.

[0077] For example, an oxide semiconductor layer (S1) and an oxide semiconductor layer (S2) are formed in this order. It may be a multilayer film.

[0078] At this time, for example, the energy (Ec) of the conduction band minimum of the oxide semiconductor layer (S2) is Specifically, the oxide semiconductor layer (S2) is made higher than the oxide semiconductor layer (S1). The electron affinity is 0.07 eV or more and 1.3 eV or less, preferably 0.07 eV or more, than that of the semiconductor layer (S1). 0.1 eV or more and 0.7 eV or less, more preferably 0.15 eV or more and 0.4 eV or less An oxide semiconductor is used. Note that the electron affinity is the difference between the vacuum level and the energy at the bottom of the conduction band. is.

[0079] Alternatively, for example, the energy gap of the oxide semiconductor layer (S2) is The energy gap is larger than that of 1). Specifically, the oxide semiconductor layer (S1) can be used as the oxide semiconductor layer (S2). ) with an energy gap of 0.1 eV or more and 1.2 eV or less, preferably 0.2 eV or less An oxide semiconductor with a maximum valence of 0.8 eV or less is used.

[0080] Alternatively, the oxide semiconductor may be, for example, an oxide semiconductor layer (S1) and an oxide semiconductor layer (S2). and the oxide semiconductor layer (S3) may be formed in this order.

[0081] Alternatively, for example, the energy (Ec) of the conduction band minimum of the oxide semiconductor layer (S2) can be calculated by The temperature is set lower than that of the semiconductor layer (S1) and the oxide semiconductor layer (S3). The conductive layer (S2) has a higher electrical conductivity than the oxide semiconductor layer (S1) and the oxide semiconductor layer (S3). Electron affinity of 0.07 eV or more and 1.3 eV or less, preferably 0.1 eV or more and 0.7 eV or less More preferably, an oxide semiconductor having a larger value than the reference voltage by 0.15 eV or more and 0.4 eV or less is used.

[0082] Alternatively, for example, the energy gap of the oxide semiconductor layer (S2) is Specifically, the thickness of the oxide semiconductor layer (S 2) As a result, the oxide semiconductor layer (S1) has a higher energy density than the oxide semiconductor layer (S3). The gap is 0.1 eV or more and 1.2 eV or less, preferably 0.2 eV or more and 0.8 eV or less. A thin oxide semiconductor is used.

[0083] Alternatively, for example, in order to increase the on-state current of the transistor, the oxide semiconductor layer (S3) For example, the oxide semiconductor layer (S3) is preferably less than 10 nm. On the other hand, the oxide semiconductor layer (S3) has a thickness of 5 nm or less, and more preferably 3 nm or less. The element (silicon) constituting the insulating film 104 is introduced into the oxide semiconductor layer (S2) having a high current density. It also has the function of blocking the intrusion of oxide semiconductor layers (S3 ) preferably has a certain thickness. For example, the thickness of the oxide semiconductor layer (S3) is 0.3 nm or more, preferably 1 nm or more, and more preferably 2 nm or more.

[0084] The thickness of the oxide semiconductor layer (S1) is greater than the thickness of the oxide semiconductor layer (S2). The thickness of the semiconductor layer (S2) is preferably set to be thicker than the thickness of the oxide semiconductor layer (S3). Specifically, the thickness of the oxide semiconductor layer (S1) is 20 nm or more, preferably 30 nm or more. The oxide semiconductor is preferably 100 nm or more, more preferably 40 nm or more, and even more preferably 60 nm or more. The thickness of the conductor layer (S1) is set to 20 nm or more, preferably 30 nm or more, and more preferably 40 nm or more. 0 nm or more, more preferably 60 nm or more, the insulating film and the oxide semiconductor layer (S1 ) to the oxide semiconductor layer (S2) with a high current density by 20 nm or more, preferably The distance is preferably 30 nm or more, more preferably 40 nm or more, and even more preferably 60 nm or more. However, the productivity of the semiconductor device may be reduced. The thickness of the layer 2 is 200 nm or less, preferably 120 nm or less, and more preferably 80 nm or less. The thickness of the oxide semiconductor layer (S2) is preferably 3 nm or more and 100 nm or less. The thickness is preferably 3 nm or more and 80 nm or less, and more preferably 3 nm or more and 50 nm or less.

[0085] Next, a method for forming an oxide semiconductor film will be described. The film may be formed by a method such as a CVD method, an MBE method, an ALD method, or a PLD method.

[0086] As an oxide semiconductor film to be the semiconductor film 106, In-M-Zn oxide was deposited by sputtering. When forming a film, the atomic ratio of the target is In:M:Zn 3:1:1, 3:1:2, 3:1:4, 1:1:0.5, 1:1:1, 1:1:2, 1:3:1, 1:3:2, 1: 3:4, 1:3:6, 1:6:2, 1:6:4, 1:6:6, 1:6:8, 1:6:10 , 1:9:2, 1:9:4, 1:9:6, 1:9:8, 1:9:10, etc. The element M is, for example, aluminum, gallium, yttrium, or tin.

[0087] When an oxide semiconductor film is formed by a sputtering method, the film is formed in an atmosphere containing oxygen. For example, the proportion of oxygen in the entire atmosphere is set to 10 volume % or more, preferably 20 volume % or more. % or more, more preferably 50% or more, and even more preferably 80% or more In particular, the percentage of oxygen in the entire atmosphere should be 100% by volume. If the oxygen content of the entire atmosphere is 100% by volume, The concentration of impurities such as rare gases contained in the oxide semiconductor film that will become the semiconductor film 106 can be reduced. can.

[0088] When the oxide semiconductor film to be the semiconductor film 106 is formed by a sputtering method, A film with a different atomic ratio may be formed. For example, zinc contains oxygen. When film formation is performed in an atmosphere, the atomic ratio of the film tends to be smaller than that of the target. Specifically, the ratio of the number of zinc atoms contained in the target is 40 atomic % or more. In some cases, the concentration of indium may be about 0 atomic % or less. When film formation is performed in an atmosphere, the atomic ratio of the film tends to be smaller than that of the target. There is.

[0089] After the oxide semiconductor film to be the semiconductor film 106 is formed, first heat treatment is preferably performed. The first heat treatment is performed at a temperature of 70°C or higher and 450°C or lower, preferably 100°C or higher and 300°C or lower. More preferably, the first heat treatment is performed at a temperature of 150° C. or higher and 250° C. or lower. Inert gas atmosphere, or oxidizing gas of 10 ppm or more, 1 volume % or more The first heat treatment is carried out in an atmosphere containing 10% by volume or more of fluorine. The first heat treatment may be carried out under reduced pressure. Alternatively, the atmosphere of the first heat treatment may be an inert gas atmosphere, after which the desorbed oxygen is removed. To compensate for the loss of oxygen, oxidizing gas is added at 0.001% or more by volume, 1% or more, or 10% or more. The first heat treatment may be performed in an atmosphere containing the semiconductor film 106. Impurities such as hydrogen and water can be removed from the oxide semiconductor film. By this process, the oxide semiconductor film to be the semiconductor film 106 can be highly purified and made intrinsic.

[0090] <Insulating film formation> Next, an insulating film 108 is formed above the insulating film 104, the semiconductor film 106a, and the semiconductor film 106b. The insulating film 108 is formed on the semiconductor film 10 in the transistor 150 (FIG. 2(E)). It functions as a film to protect the channel region of 6b.

[0091] The insulating film 108 can be formed using the same material, structure and method as the insulating film 104 .

[0092] When the insulating film 104 is formed by laminating films made of different materials, the upper layer of the insulating film 104 and the The same material can be applied to the insulating film 108. If the insulating film 104 and the insulating film 108 are made of the same material, The upper layer of the insulating film 104 and the insulating film 108 can be etched at the same time. The lower layer of the insulating film 104 is then etched. The taper angle of the insulating film 108 is different from the taper angle of the insulating film 104 below, thereby forming an opening. By forming openings with different taper angles, it is possible to form step-cutting of the conductive film formed in the openings. This suppresses the

[0093] <Mask formation and insulating film etching> Next, a resist mask 110 is formed on the insulating film 108 by a photolithography process. (Figure 3(A)).

[0094] Next, the portions of the insulating film 104 and the insulating film 108 that do not overlap with the resist mask 110 are etched. The film is removed by etching to form openings 111a, 111b, 111c, and 111d (FIG. 3( B).

[0095] As shown in FIG. 3B, the openings 111a, 111c, and 111d are formed by the insulating film 108. The resist mask 110 is formed by the insulating film 106a or the semiconductor film 106b. It is formed by removing a portion.

[0096] The opening 111b overlaps the conductive film 102a of the insulating film 104 and the insulating film 108. The semiconductor film 106a, the semiconductor film 106b, and the resist mask 110 do not overlap with each other. It is formed by removing

[0097] Next, the resist mask 110 is removed (FIG. 3(C)).

[0098] <Conductive film formation> Next, the insulating film 108, the semiconductor film 106a, the semiconductor film 106b, and the conductive film 102a are A conductive film is formed on the conductive film, and a resist mask is formed on the conductive film by a photolithography process. Next, part of the conductive film is etched using the resist mask to form the conductive film 114a. 114b and 114c are formed (FIG. 3(D)).

[0099] The conductive film 114a is electrically connected to the conductive film 102a and the semiconductor film 106a. The conductive film 114b and the conductive film 114c are electrically connected to the semiconductor film 106b.

[0100] The conductive film 114a functions as a wiring that electrically connects the conductive film 102a and the semiconductor film 106a. The conductive film 114b can function as a source electrode in the transistor 150. The conductive film 114c can function as a drain electrode in the transistor 150. It can function as.

[0101] The conductive films 114a, 114b, and 114c are similar to the conductive films 102a and 102b. It can be formed by a material, a configuration, and a method.

[0102] Through the above steps, the transistor 150 and the connection portion 160 can be formed.

[0103] In this way, in the manufacturing method 1, an opening is formed in the portion of the insulating film 108 that overlaps with the semiconductor film. At the same time, in the portion not overlapping the semiconductor film, openings are formed not only in the insulating film 108 but also in the insulating film 104. By performing such a process, openings in the insulating film 108 and the insulating film 104 are formed separately. This allows for fewer masks and photolithography steps than when forming a semiconductor device. Therefore, the manufacturing time of the semiconductor device can be shortened and the manufacturing cost can be reduced.

[0104] ≪Manufacturing method 2≫ Next, referring to FIGS. 4 and 5, the transistor 150 and the connection part 16 shown in FIG. 5(E) will be described. Explain how to form 0.

[0105] The substrate 100, the conductive film 102a and the conductive film 102b, the insulating film 102a, and the insulating film 102b shown in FIGS. Regarding the film 104, the semiconductor film 106a and the semiconductor film 106b, and the insulating film 108, The same materials, configurations and methods as those used in Manufacturing Method 1 can be used to form the same.

[0106] <Mask formation and insulating film etching> A resist mask 210 is formed above the insulating film 108 by a photolithography process. (FIG. 4(F)). As shown in FIG. 4(F), the resist mask 210 has different thicknesses depending on the region. The thickness of the region 210a is smaller than that of the region 210a. The region 210b has a portion overlapping with the semiconductor film 106a and the semiconductor film 106b. have a share.

[0107] The resist mask 210 is a multi-tone mask (half-tone photomask or gray-tone It is formed by a photolithography process using a photomask.

[0108] Next, the insulating film 104 and the insulating film 108 are formed so as to overlap the conductive film 102a and to form a resist mask. The portion that does not overlap with the gate 210 is removed by etching to form an opening 111b (FIG. 5( A)).

[0109] Next, the resist mask 210 is subjected to ashing. The area (volume in three dimensions) shrinks and the thickness becomes smaller. The resist mask 210 at 210b is removed, and a resist mask 212 is formed (FIG. 5 (B)) That is, by retracting the resist mask 210, the level of the region 210b is The resist mask 210 is removed and a resist mask 212 is formed.

[0110] Ashing can be performed using oxygen plasma, for example.

[0111] Next, the portion of the insulating film 108 that does not overlap with the resist mask 212 is removed by etching. , openings 211a, 211b, 211c, and 211d are formed (FIG. 5(C)).

[0112] As shown in FIG. 5C, the openings 211a, 211c, and 211d are formed by the insulating film 108. The resist mask 212 is formed by the insulating film 106a or the semiconductor film 106b. It is formed by removing a portion.

[0113] The opening 211b is formed between the semiconductor film 106a, the semiconductor film 106b and the resist film 106a of the insulating film 108. The portion that does not overlap with the mask 212 is removed. As shown, the insulating film 108 around the opening 111b is removed, widening the opening 211b. This allows the conductive film to be formed in the opening 211b in a later step. Breaking of the lines is suppressed.

[0114] Next, the resist mask 212 is removed (FIG. 5(D)).

[0115] <Conductive film formation> Next, the insulating film 108, the semiconductor film 106a, the semiconductor film 106b, and the conductive film 102a are A conductive film is formed on the conductive film, and a resist mask is formed on the conductive film by a photolithography process. Next, part of the conductive film is etched using the resist mask to form the conductive film 114a. 114b and 114c are formed (FIG. 5(E)).

[0116] The conductive films 114a, 114b, and 114c are formed using the same materials, configurations, and methods as those in manufacturing method 1. It can be achieved.

[0117] Through the above steps, the transistor 150 and the connection portion 160 can be formed.

[0118] In this way, in manufacturing method 2, the openings 211a and 211b are formed by using a multi-tone mask. , 211c, and 211d can be formed using a single mask. In this case, the opening of the insulating film 108 can be made wider than the opening of the insulating film 104, and the conductive film 11 It is possible to suppress the step break of 4a.

[0119] By adopting such a process, it is possible to reduce the number of mask and photolithography processes. This reduces the manufacturing time of the semiconductor device and reduces the manufacturing costs. Furthermore, the yield and reliability of the semiconductor device can be improved.

[0120] ≪Manufacturing method 3≫ Next, referring to FIGS. 6 and 7, the transistor 150 and the connection part 16 shown in FIG. 7(E) will be described. Explain how to form 0.

[0121] As shown in FIGS. 6(A) to 6(C), the substrate 100, the conductive film 102a, and the conductive film 102b are The insulating film 104 is formed using the same material, structure and method as in Manufacturing Method 1. can be done.

[0122] <Semiconductor film formation> A semiconductor film 106 is formed above the insulating film 104. The semiconductor film 106 is manufactured by the following method. It can be formed using the same materials, configuration and method as in Method 1.

[0123] <Mask formation and etching of insulating and semiconductor films> Next, a resist mask 307 is formed above the semiconductor film 106 by a photolithography process. As shown in FIG. 6D, the resist mask 307 is formed in different regions. The thickness is different, and there is a region 307a and a region having a thickness smaller than the thickness in the region 307a. The region 307b has a portion overlapping with the semiconductor film 106.

[0124] The resist mask 307 is a multi-tone mask (half-tone photomask or gray-tone It is formed by a photolithography process using a photomask.

[0125] Next, the insulating film 104 and the semiconductor film 106 are formed on the conductive film 102a and the resist matrix. The portion that does not overlap with the mask 307 is removed by etching to form an opening 308b (FIG. 6). (E)).

[0126] Next, the resist mask 307 is subjected to ashing. The area (volume in three dimensions) shrinks and the thickness becomes smaller. The resist mask 307 of 307b is removed, and a resist mask 309 is formed (FIG. 7). That is, by recessing the resist mask 307, the level of the region 307b is The resist mask 307 is removed and a resist mask 309 is formed.

[0127] Ashing can be performed using oxygen plasma, for example.

[0128] Next, the portion of the semiconductor film 106 that does not overlap with the resist mask 309 is removed by etching. Then, the semiconductor film 106a and the semiconductor film 106b are formed (FIG. 7(B)). 6b functions as a semiconductor film including a channel region in the transistor 150. can be done.

[0129] Next, the resist mask 309 is removed (FIG. 7(C)).

[0130] <Insulating film formation> Next, an insulating film is formed above the insulating film 104, the semiconductor film 106a, and the semiconductor film 106b. Then, a resist mask is formed on the insulating film by a photolithography process. A resist mask is used to etch a portion of the insulating film to form openings 311a, 311b, and 311c. An insulating film 108 having the layers 311c and 311d is formed (FIG. 7(D)).

[0131] As shown in FIG. 7(D), the openings 311a, 311c, and 311d are formed in the semiconductor film 106a or is formed in the portion overlapping with the semiconductor film 106b.

[0132] In addition, the opening 311b is formed by removing the portion that does not overlap with the semiconductor film 106a and the semiconductor film 106b. As shown in FIG. 7(D), the opening 311b is formed by The opening 311b is formed in a portion overlapping with the opening of the insulating film 104. The opening of the insulating film 108 can be formed to be wider. This prevents the conductive film formed on 311b from being broken.

[0133] The insulating film 108 protects the channel region of the semiconductor film 106b in the transistor 150. The film functions as a protective film, and can be formed using the same materials, configuration and method as in Production Method 1.

[0134] <Conductive film formation> Next, the insulating film 108, the semiconductor film 106a, the semiconductor film 106b, and the conductive film 102a are A conductive film is formed on the conductive film, and a resist mask is formed on the conductive film by a photolithography process. Next, part of the conductive film is etched using the resist mask to form the conductive film 114a. 114b and 114c are formed (FIG. 7(E)).

[0135] The conductive films 114a, 114b, and 114c are formed using the same materials, configurations, and methods as those in manufacturing method 1. It can be achieved.

[0136] Through the above steps, the transistor 150 and the connection portion 160 can be formed.

[0137] In this way, in the manufacturing method 3, the insulating film 10 is formed by using a half-tone photomask. The openings in FIG. 4 and the formation of the semiconductor film 106a and the semiconductor film 106b are formed using one mask. In addition, the opening 311b is larger in the insulating film 108 than in the insulating film 104. The opening can be widened, and step disconnection of the conductive film 114a can be suppressed.

[0138] By adopting such a process, it is possible to reduce the number of mask and photolithography processes. This reduces the manufacturing time of the semiconductor device and reduces the manufacturing costs. Furthermore, the yield and reliability of the semiconductor device can be improved.

[0139] <Opening variations> By changing the shape of the resist mask 307, the connecting portion 160 shown in FIG. 7(E) can be formed. A connecting portion 160 having a different shape as shown in FIG. 8(D) can be formed.

[0140] For this, first, a resist mask 307 is formed in a shape as shown in FIG. 8(A) (for example, as shown in FIG. 6(E) 8(A)) and form an opening 308b (FIG. 8(A) )).

[0141] Next, the semiconductor film 106a and the semiconductor film 106b are formed by the same steps as those shown in FIGS. (Figure 8(B)).

[0142] Next, an insulating film is formed above the insulating film 104, the semiconductor film 106a, and the semiconductor film 106b. Then, a resist mask is formed on the insulating film by a photolithography process. A resist mask is used to etch a portion of the insulating film to form openings 311a, 312b, and 311c. The insulating film 108 having the openings 311c and 311d is formed. The opening 12b is formed so as to be smaller than the opening 308b in the insulating film 104.

[0143] Through the above steps, the connection portion 160 shown in FIG. 8(D) can be formed.

[0144] Even in such a process, the opening of the insulating film 104 and the semiconductor film 106a and the semiconductor film 10 6b can be formed using one mask, and step disconnection of the conductive film 114a can be suppressed. This reduces the number of masks and photolithography processes, and shortens the manufacturing time of semiconductor devices. Furthermore, the yield and reliability of the semiconductor device can be improved. It can be improved.

[0145] ≪Manufacturing method 4≫ Next, referring to FIGS. 9 and 10, the transistor 150 and the connection part shown in FIG. 10(E) are Explain how to form 160.

[0146] The substrate 100, the conductive film 102a and the conductive film 102b shown in FIGS. 9(A) to 9(F) and FIG. 10(A) are the conductive film 102b, the insulating film 104, the semiconductor film 106a and the semiconductor film 106b, and the insulating film 108. The openings 111a, 111b, 111c, and 111d are made of the same material as in manufacturing method 1. It can be formed by the configuration and method.

[0147] <Mask Ashing> As shown in FIG. 10(A), openings 111a, 111b, and 111c are formed using a resist mask 110. After forming the resist mask 110, the resist mask 110 is ashed. For example, ashing using oxygen plasma can be performed.

[0148] As a result, the area (volume when viewed three-dimensionally) of the resist mask 110 is reduced, and the thickness is reduced. As a result, the resist mask 412 is formed (FIG. 10(B)). 8, there is a part that is not covered by the resist mask 412. By retracting the mask 110, a part of the insulating film 108 is exposed.

[0149] Next, the portion of the insulating film 108 that does not overlap with the resist mask 412 is removed by etching. , openings 411a, 411b, 411c, and 411d are formed (FIG. 10(C)).

[0150] As shown in FIG. 10C, the openings 411a, 411c, and 411d are formed in the semiconductor film 106a. Alternatively, it is formed in a portion overlapping with the semiconductor film 106b.

[0151] The opening 411b overlaps the conductive film 102a and the semiconductor film 106a and the semiconductor film 106b. It is formed by removing the part that does not overlap with 06b. As shown, the insulating film 108 around the opening 111b is removed to widen the opening 411b. This prevents the step of the conductive film to be formed in the opening 411b in a later step. This suppresses the

[0152] Furthermore, the resist mask 110 is ashed to form a resist mask 412. Therefore, the difference in size between the resist mask 110 and the resist mask 412, i.e., The width of the insulating film 108 exposed from the resist mask 412 is approximately the same.

[0153] Therefore, the width of the step formed by the insulating film 104 and the insulating film 108 in the opening 411b, that is, That is, L in FIG. 10(C) is approximately equal around the opening 411b.

[0154] Next, the resist mask 412 is removed (FIG. 10(D)).

[0155] <Conductive film formation> Next, the insulating film 108, the semiconductor film 106a, the semiconductor film 106b, and the conductive film 102a are A conductive film is formed on the conductive film, and a resist mask is formed on the conductive film by a photolithography process. Next, part of the conductive film is etched using the resist mask to form the conductive film 114a. 114b and 114c are formed (FIG. 10(E)).

[0156] The conductive films 114a, 114b, and 114c are formed using the same materials, configurations, and methods as those in manufacturing method 1. It can be achieved.

[0157] Through the above steps, the transistor 150 and the connection portion 160 can be formed.

[0158] In this way, in the manufacturing method 4, an opening is formed in the portion of the insulating film 108 that overlaps with the semiconductor film. At the same time, in the portion not overlapping the semiconductor film, openings are formed not only in the insulating film 108 but also in the insulating film 104. By performing such a process, openings in the insulating film 108 and the insulating film 104 are formed separately. This allows for fewer masks and photolithography steps than when forming a semiconductor substrate. The resist mask 110 is removed by ashing, and the insulating film 1 is removed from the opening 411b. The opening in the insulating film 108 can be made wider than the opening in 04, and the step discontinuity of the conductive film 114a can be prevented. It can be suppressed.

[0159] By adopting such a process, it is possible to reduce the number of mask and photolithography processes. This reduces the manufacturing time of the semiconductor device and reduces the manufacturing costs. Furthermore, the yield and reliability of the semiconductor device can be improved.

[0160] (Embodiment 2) A method for manufacturing a semiconductor device according to one embodiment of the present invention will be described with reference to FIGS. 1, 11, and 12. As mentioned above, FIG. 1 is a top view of the semiconductor device. The cross-sectional structure of the portion indicated by X1-X2 is shown in cross section X1-X2 of FIGS. X1-X2 is a region where a transistor is electrically connected to a conductive film provided above the transistor. 1(B) is a cross-sectional view of a portion indicated by a dashed line Y1-Y2 in FIG. The surface structure is shown in cross section Y1-Y2 of Figures 11 and 12. The cross section Y1-Y2 is a cross section of the semiconductor film. A region where the conductive film provided below and the conductive film provided above the semiconductor film are electrically connected The cross-sectional structure of the portion indicated by the dashed line Z1-Z2 in FIG. 1(C) is shown in FIG. 1 and 12. The cross section Z1-Z2 is a cross section of the source electrode of the transistor. and a conductive film formed simultaneously with the conductive film that can function as a drain electrode; Cross-sectional structure of a part of the region where two conductive films formed on top of a transistor are electrically connected It is made of

[0161] The method for manufacturing a semiconductor device shown in this embodiment mode is a method for forming a plurality of conductive films on the upper part of a transistor. For example, it can be applied when forming a common electrode and a pixel electrode on the same substrate. IPS (In Plane Switching) (or FFS (fringe This is suitable for liquid crystal display devices in a field switching mode.

[0162] ≪Manufacturing method 5≫ 11 and 12, the connecting portion 550 and the connecting portion 560 shown in FIG. 12(E) are formed. This section explains how to achieve this.

[0163] <Lower structure> First, a substrate provided with a conductive film is prepared. The substrate may be a substrate on which the capacitor 150 and the connection portion 160 are formed, or a conductive film formed by other methods and configurations. For example, the transistor with the bottom gate structure shown in the first embodiment may be formed on a substrate. The substrate is not limited to the transistor 150, but may be a substrate on which a transistor with a top gate structure is formed. .

[0164] In this embodiment, as in the manufacturing method 2 of the first embodiment, a transistor is formed on the cross section X1-X2. 150, a connection portion 160 is formed on the cross section Y1-Y2, and further, the same steps as in manufacturing method 2 are carried out. and a substrate on which the insulating film 104, the insulating film 108, and the conductive film 114d are formed on the cross section Z1-Z2. The conductive film 114d is formed by the conductive films 114a and 114b. , 114c, can be formed using the same material, structure and method. The connecting portion 550 and the connecting portion 560 are formed on the conductive film 114a and the conductive film 114d by the following steps. do.

[0165] <Insulating film formation> An insulating film 500 is formed above the conductive films 114a, 114b, 114c, and 114d (see FIG. 11(B)). The insulating film 500 is made of the same material, has the same structure, and is similar to the insulating film 104 of the first embodiment. It can be formed by the method.

[0166] <Insulating film formation> Next, an insulating film 502 is formed on the insulating film 500 (FIG. 11(C)). can function as a planarizing film in a semiconductor device.

[0167] The insulating film 502 is made of, for example, acrylic, acrylamide, ester, or other known materials. The film may be provided as a laminate or a single layer.

[0168] <Conductive film formation> Next, a conductive film 504 is formed on the insulating film 502 (FIG. 11(D)). It is preferable to use a light-transmitting material as the light-transmitting material.

[0169] The conductive film 504 may be formed of indium oxide containing tungsten oxide, tungsten oxide, or Indium zinc oxide, indium oxide containing titanium oxide, indium zinc oxide containing titanium oxide Indium tin oxide, indium tin oxide (hereinafter referred to as ITO), indium zinc oxide, It is possible to use a conductive material with light transmission, such as indium tin oxide doped with silicon dioxide. can.

[0170] The conductive film 504 may be a conductive composition containing a conductive macromolecule (also called a conductive polymer). The light-transmitting conductive film formed using the conductive composition can be formed by a sheet. Resistance is 10,000Ω / □ or less, and light transmittance at a wavelength of 550nm is 70% or more. It is also preferable that the resistivity of the conductive polymer contained in the conductive composition is 0.1 Ω cm or less. It is preferable that:

[0171] As the conductive polymer, a so-called π-electron conjugated conductive polymer can be used. For example, polyaniline or its derivatives, polypyrrole or its derivatives, polythiophene or or its derivatives, copolymers of two or more of aniline, pyrrole and thiophene, Examples include hydroxybenzoates and their derivatives.

[0172] The conductive film 504 can be formed as a single layer or a stack of the above-mentioned materials.

[0173] <Mask formation and etching of conductive and insulating films> Next, a resist mask 506 is formed above the conductive film 504 by a photolithography process. As shown in FIG. 11(E), the resist mask 506 is The thickness of the region 506a is different from the thickness of the region 506b. The region 506b overlaps with the conductive film 504.

[0174] The resist mask 506 is a multi-tone mask (half-tone photomask or gray-tone It is formed by a photolithography process using a photomask.

[0175] Next, the insulating film 500, the insulating film 502, and the conductive film 504 are removed so as not to overlap with the resist mask 506. The non-contact portions are removed by etching to form openings 507a and 507c (FIG. 1 2(A)).

[0176] Next, the resist mask 506 is subjected to ashing. The area (volume in three dimensions) shrinks and the thickness becomes smaller. The resist mask 506 of 506b is removed, and a resist mask 508 is formed (FIG. 1 2(B)). That is, by recessing the resist mask 506, the area 506b The resist mask 506 is removed, and a resist mask 508 is formed.

[0177] Ashing can be performed using oxygen plasma, for example.

[0178] Next, the portion of the conductive film 504 that does not overlap with the resist mask 508 is removed by etching. Then, the resist mask 508 is removed to form a conductive film 504a (FIG. 12(C)). The conductive film 504a can function as a common electrode in a liquid crystal display device.

[0179] <Insulating film formation> Next, the conductive film 504a, the insulating film 502, the insulating film 500, the conductive film 114d, and the conductive film 11 An insulating film is formed above 4c, and a resist mask is formed on the insulating film by a photolithography process. Next, a part of the insulating film is etched using the resist mask to form an insulating film. As shown in FIG. 12(D), an opening is formed in the insulating film 510. An opening 511a is formed in the portion overlapping with the conductive film 507a, and an opening 511b is formed in the portion overlapping with the conductive film 504a. An opening 511c is formed in the portion overlapping with the opening 507c.

[0180] The insulating film 510 is formed using the same material, structure, and method as the insulating film 104 of the first embodiment. It is possible.

[0181] <Conductive film formation> Next, the insulating film 510, the conductive film 504a, the insulating film 502, the insulating film 500, the conductive film 114d, and A conductive film is formed above the conductive film 114c, and a photolithography process is performed on the conductive film. Then, a resist mask is formed on the conductive film by etching the conductive film. Then, conductive films 512a and 512b are formed (FIG. 12(E)).

[0182] The conductive film 512a is electrically connected to the conductive film 114d and the conductive film 504a. The conductive film 512b is electrically connected to the conductive film 114c. Although not shown, the conductive film 504a can function as a pixel electrode in the device. The portion where the conductive film 512b overlaps with the insulating film 512c can function as a capacitor. However, the capacitor may be formed in a portion other than the portion where the conductive film 504a and the conductive film 512b overlap. For example, a portion where the conductive film 504a and a separately formed conductive film overlap each other may be formed as a capacitor element. It may also function as

[0183] The conductive films 512a and 512b are formed using the same material, structure, and method as the conductive film 504a. It can be formed by

[0184] Through the above steps, the connection parts 550 and 560 can be formed.

[0185] In this way, in manufacturing method 5, by using a half-tone photomask, opening 507 The opening 507a, the opening 507c, and the conductive film 504a can be formed using one mask.

[0186] By adopting such a process, it is possible to reduce the number of mask and photolithography processes. This allows the manufacturing time of the semiconductor device to be shortened and the manufacturing costs to be reduced.

[0187] (Embodiment 3) Regarding another aspect of the manufacturing method of the semiconductor device according to the second embodiment of the present invention, 1 and 15. As mentioned above, FIG. 1 is a top view of the semiconductor device. The cross-sectional structure of the portion indicated by the dashed line X1-X2 in FIG. 1(A) is shown in cross section X1-X2 in FIG. The cross section X1-X2 shows a transistor and a conductive film provided above the transistor. This is a cross-sectional structure of a part of the electrically connected region. The cross-sectional structure of the portion is shown in cross section Y1-Y2 of FIG. A region where the conductive film provided below and the conductive film provided above the semiconductor film are electrically connected The cross-sectional structure of the portion indicated by the dashed line Z1-Z2 in FIG. 1(C) is shown in FIG. The cross section Z1-Z2 of FIG. 5 shows the source and drain electrodes of the transistor. A conductive film that can function as a transistor electrode and is formed at the same time as the conductive film. 1 is a cross-sectional view of a portion of a region where two conductive films formed on top of each other are electrically connected.

[0188] The method for manufacturing a semiconductor device shown in this embodiment mode is a method for forming a plurality of conductive films on the upper part of a transistor. For example, it can be applied when forming a common electrode and a pixel electrode on the same substrate. IPS (In Plane Switching) (or FFS (fringe This is suitable for liquid crystal display devices in a field switching mode.

[0189] ≪Manufacturing method 6≫ 15A and 15B, a method for forming the connecting portion 650 and the connecting portion 660 shown in FIG. 15C will be described. In the method for manufacturing a semiconductor device according to one embodiment of the present invention, a conductive film 5 The steps up to forming 04a are the same as those in manufacturing method 5 of embodiment 2, so the description thereof will be omitted. Please refer to FIG. 15(A). The cross-sectional structure in the state where the conductive film 504a has been formed. The conductive film 504a, the opening 507a, and the opening 507c are one multi-tone mask (half-tone film). Since the mask and the This reduces the time required to manufacture a semiconductor device. This reduces the size and reduces manufacturing costs.

[0190] <Insulating film formation> Next, the conductive film 504a, the insulating film 502, the insulating film 500, the conductive film 114d, and the conductive film 11 An insulating film is formed above 4c, and a resist mask is formed on the insulating film by a photolithography process. Next, a part of the insulating film is etched using the resist mask to form an insulating film. As shown in FIG. 15B, an opening is formed in the insulating film 610. An opening 611a is formed inside 507a, and an opening 511b is formed in the portion overlapping with the conductive film 504a. An opening 611c is formed inside the opening 507c.

[0191] Unlike the manufacturing method 5 of the second embodiment, the insulating film 610 has openings 507a and 507c. Therefore, the side surface of the insulating film 502 is formed in the opening 507a and the opening 507b. In the area c, the insulating film 610 is covered. The impurities inside the insulating film 502 and the above-mentioned impurities on the side surfaces of the insulating film 502 at the openings 507a and 507c Impurities and the like that have adhered during the ashing process of the multi-tone mask are directed toward the outside of the insulating film 502. For example, in the liquid crystal display device shown in the fourth embodiment described later, When the impurities are mixed into the liquid crystal, the liquid crystal deteriorates. By suppressing the diffusion of substances, deterioration of the liquid crystal display device can be suppressed.

[0192] <Conductive film formation> Next, the insulating film 610, the conductive film 504a, the insulating film 502, the insulating film 500, the conductive film 114d, and A conductive film is formed above the conductive film 114c, and a photolithography process is performed on the conductive film. Then, a resist mask is formed on the conductive film by etching the conductive film. Then, conductive films 612a and 612b are formed (FIG. 15C).

[0193] The conductive film 612a is electrically connected to the conductive film 114d and the conductive film 504a. The conductive film 612b is electrically connected to the conductive film 114c. Although not shown, the conductive film 504a can function as a pixel electrode in the device. The portion where the conductive film 612b overlaps with the conductive film 612b can function as a capacitor. The capacitor is not limited to this, and the capacitor may include a portion other than the portion where the conductive film 504a and the conductive film 612b overlap. For example, the conductive film 504a may be formed outside the conductive film 504. may function as a capacitive element.

[0194] The conductive films 612a and 612b are formed using the same material, structure, and method as the conductive film 504a. It can be formed by

[0195] Through the above steps, the connection parts 650 and 660 can be formed.

[0196] In the connection portion 650 and the connection portion 660, as can be seen from the cross-sectional view shown in FIG. As shown, the insulating film 500, the insulating film 502, and the insulating film 610 have tapered sides. The insulating film 500, the insulating film 502, and the insulating film 610 may have tapered side surfaces. In this case, the conductive film 612a and the conductive film 612b are The insulating film b also has a tapered shape. When the side surfaces of the insulating film 500, the insulating film 502, and the insulating film 610 are vertical, the conductive film 612a In addition, the formation of the conductive film 612b may be insufficient, resulting in discontinuities. When the side surfaces of the insulating film 502 and the insulating film 610 are tapered, the conductive film 612a and This can prevent the conductive film 612b from being broken, thereby improving the reliability of the semiconductor device. do.

[0197] In this way, in manufacturing method 6, by using a half-tone photomask, opening 507 The opening 507a, the opening 507c, and the conductive film 504a can be formed using one mask. In addition, the diffusion of impurities from the side surfaces of the insulating film 502 can be suppressed.

[0198] By adopting such a process, it is possible to reduce the number of mask and photolithography processes. This reduces the manufacturing time of the semiconductor device and reduces the manufacturing costs. Furthermore, the semiconductor device can be used without impairing its reliability.

[0199] (Fourth embodiment) In this embodiment, the manufacturing method of the semiconductor device shown in the first to third embodiments is applied. A semiconductor device including a display device that can achieve this will be described.

[0200] The manufacturing method shown in the first embodiment is for switching an active matrix liquid crystal display device. It can be suitably used as a manufacturing method for a TN (Twisted Nematic) element. c) Mode, VA (Vertical Alignment) mode, IPS mode, etc. It is applicable to liquid crystal display devices of each mode.

[0201] The manufacturing method shown in the first embodiment uses an active matrix organic EL element. The method can also be suitably used as a method for manufacturing a switching element for a light-emitting device.

[0202] Furthermore, the manufacturing methods shown in the second and third embodiments are particularly suitable for IPS mode liquid crystal displays. This method can be suitably used as a manufacturing method of a switching element for a device. The electrode is formed in a slit shape. The order of lamination of the common electrode and the common electrode may be reversed to form the common electrode in a slit shape.

[0203] The manufacturing methods described in Embodiments 1 to 3 are not limited to display devices and light-emitting devices. Manufacturing methods for semiconductor devices such as memory devices, arithmetic units, CPUs, and microcomputers It can also be applied as

[0204] As an example of a semiconductor device, an IPS (F A liquid crystal display device 1000 in FS mode will be described with reference to FIG.

[0205] 13A is a top view of the liquid crystal display device 1000. The dashed line M1-M2 in FIG. The cross-sectional structure of the indicated portion is shown in cross section M1-M2 of FIG. 1 is a cross-sectional view including a region where the transistor 150 shown in the first embodiment is formed, This is a portion that can function as a pixel region of a display device. The cross-sectional structure of the portion indicated by N2 is shown in cross section N1-N2 of FIG. The LCD panel can function as a peripheral part and a connection part where drivers and the like of a liquid crystal display device are provided. This is the part that can be done.

[0206] As shown in FIG. 13(A), the liquid crystal display device 1000 includes a substrate 1111 and a substrate 1121. Between them, there are a pixel section 1201, a driver 1200 and a driver 1202.

[0207] As shown in FIGS. 13B and 13C, the liquid crystal display device 1000 has a substrate 1111 on which The liquid crystal display device 1000 also includes a polarizing plate 1161, a liquid crystal layer 1115, a substrate 1121, a touch panel portion 1100, an adhesive layer 1163, a polarizing plate 1162, and The touch panel unit 1100 includes electrodes 1122, 1123, and a substrate 1131. Also, an alignment film 1155 and an alignment film 1156 are provided above and below the liquid crystal layer. Spacers 1165 are provided to maintain the cell gap of the liquid crystal layer. In addition, a color filter 1114 is provided in a portion that does not overlap with the transistor 150. A conductive film 1113 and a conductive film 1235 are provided to overlap with the filter 1114 .

[0208] At the terminal portion, the substrate 1121 and the substrate 1111 are bonded by a sealing member 1421. The electrode 1122 and the FPC 1433 are electrically connected via the conductive films 1431 and 1432. The conductive film 1422 and the FPC 1424 are electrically connected via the conductive film 1423. electrically connected.

[0209] FIG. 13 shows a structure having an insulating film 502 that can function as a planarizing film. However, one embodiment of the present invention is not limited to this. That's fine.

[0210] (Embodiment 5) In this embodiment, examples of electronic devices using a liquid crystal display device to which one embodiment of the present invention is applied will be described. This will be explained with reference to FIG.

[0211] The electronic devices of this embodiment include the liquid crystal display device of one embodiment of the present invention in their display portions.

[0212] As an electronic device to which a liquid crystal display device is applied, for example, a television device (television or television (also called vision receivers), monitors for computers, digital cameras, digital video video cameras, digital photo frames, mobile phones (also called mobile phones or mobile phone devices) , portable game machines, mobile information terminals, audio playback devices, large game machines such as pachinko machines, etc. Specific examples of these electronic devices are shown in Figure 14.

[0213] FIG. 14A shows an example of a television device. The television device 7100 includes: A display unit 7102 is built into a housing 7101. The display unit 7102 displays images. The liquid crystal display device to which one embodiment of the present invention is applied is used in the display portion 7102. In this example, the housing 7101 is supported by a stand 7103. This shows:

[0214] The television device 7100 can be operated using an operation switch provided on the housing 7101 or a separate remote control. This can be done using the remote control operation device 7111. This allows you to control the channel and volume, and the video displayed on the display unit 7102. In addition, the remote control operation device 7111 can be operated. A display unit may be provided to display information output from the

[0215] The television device 7100 is configured to include a receiver, a modem, etc. It is possible to receive more general television broadcasts, and also to receive them by wire or wirelessly via a modem. By connecting to a communication network, it can be transmitted in one direction (sender to receiver) or two directions (transmit to receiver). It is also possible to communicate information between followers and recipients, or between recipients themselves.

[0216] FIG. 14B shows an example of a computer. The computer 7200 includes a main body 72 01, housing 7202, display unit 7203, keyboard 7204, external connection port 7205, The computer includes a pointing device 7206 and the like. The display portion 7203 is made of a liquid crystal display device.

[0217] FIG. 14C shows an example of a portable game machine. The portable game machine 7300 has a housing. It is composed of two housings, housing 7301a and housing 7301b, and the connecting part 7302 The display unit 7303a is incorporated in the housing 7301a, and the display unit 7303b is connected to the housing 7301a so as to be openable and closable. The display unit 7303b is incorporated in the portable game console 301b. The console includes a speaker 7304, a recording medium insertion section 7305, operation keys 7306, and a connection terminal. 7307, Sensor 7308 (force, displacement, position, velocity, acceleration, angular velocity, rotation speed, distance, light , liquid, magnetic, temperature, chemical, sound, time, hardness, electric field, current, voltage, power, radiation, flow (including functions to measure volume, humidity, gradient, vibration, odor or infrared rays), LED lamp, Of course, the configuration of the portable game machine is not limited to the above. At least one of the display portion 7303a and the display portion 7303b may include a display device according to the present invention. It is sufficient to use the same liquid crystal display device, and other auxiliary equipment may be provided as appropriate. The portable game machine shown in FIG. 14(C) can play a program recorded on a recording medium. Or it has the function of reading data and displaying it on the display, or wirelessly communicating with other portable game consoles. The portable game machine shown in FIG. 14(C) has the function of sharing information. is not limited to this and can have various functions.

[0218] FIG. 14D shows an example of a mobile phone. The mobile phone 7400 has a housing 7401. In addition to the display unit 7402 incorporated in the The mobile phone 7400 is equipped with a speaker 7405, a microphone 7406, etc. The liquid crystal display device of one embodiment of the present invention is used for the display portion 7402 .

[0219] In a mobile phone 7400 shown in FIG. 14D, information can be displayed by touching the display portion 7402 with a finger or the like. You can also make calls, write emails, and perform other operations. This can be done by touching the display portion 7402 with a finger or the like.

[0220] The screen of the display unit 7402 has three main modes. The first is a display mode that mainly displays images. The first mode is a display mode, and the second mode is an input mode that mainly inputs information such as characters. This is a display + input mode that combines two modes: display mode and input mode.

[0221] For example, when making a call or creating an email, the display unit 7402 is used to input characters. This is the main character input mode, and the input operation of characters displayed on the screen can be performed.

[0222] In addition, the mobile phone 7400 includes sensors for detecting tilt, such as a gyro sensor and an acceleration sensor. By providing a detection device having a sensor, the orientation of the mobile phone 7400 (portrait or landscape) can be determined. In this way, the screen display on the display portion 7402 can be automatically switched.

[0223] The screen mode can be switched by touching the display portion 7402 or by operating the housing 7401. This is done by operating the button 7403. Also, depending on the type of image displayed on the display unit 7402, For example, if the image signal to be displayed on the display unit is a video signal, If it is data, the display mode is switched to, and if it is text data, the input mode is switched to.

[0224] In the input mode, the optical sensor of the display unit 7402 detects a signal and displays it. If there is no input by touch operation on the part 7402 for a certain period of time, the screen mode is changed to the input mode. Alternatively, the display mode may be switched from the normal mode to the display mode.

[0225] The display portion 7402 can also function as an image sensor. By touching the device with your palm or fingers and capturing an image of your palm print or fingerprint, you can authenticate your identity. In addition, a backlight that emits near-infrared light to the display unit or a sensing light source that emits near-infrared light By using this, it is possible to capture images of finger veins, palm veins, etc.

[0226] FIG. 14(E) shows an example of a foldable tablet terminal (open state). The tablet terminal 7500 includes a housing 7501a, a housing 7501b, a display unit 7502a, a display The housing 7501a and the housing 7501b are connected by a shaft 7503. The housing 750 can be opened and closed around the shaft 7503. 1a includes a power supply 7504, operation keys 7505, a speaker 7506, etc. The tablet terminal 7500 includes a liquid crystal display device according to one embodiment of the present invention, a display portion 7502a, a display 7502b or both.

[0227] At least a part of the display portion 7502a or the display portion 7502b is a touch panel area. By touching the displayed operation keys, data can be input. For example, The entire surface of the display unit 7502a is used as a touch panel by displaying keyboard buttons. 02b can be used as a display screen.

[0228] This embodiment mode can be combined with other embodiment modes as appropriate. [Explanation of symbols]

[0229] 100 boards 102a Conductive film 102b Conductive film 104 insulating film 106 Semiconductor film 106a Semiconductor film 106b Semiconductor film 108 insulating film 110 Resist mask 111a aperture 111b Aperture 111c aperture 111d aperture 114a Conductive film 114b Conductive film 114c conductive film 114d Conductive film 150 transistors 160 Connection 210 Resist mask 210a area 210b area 211a aperture 211b aperture 211c aperture 211d aperture 212 Resist mask 307 Resist mask 307a area 307b area 308b aperture 309 Resist Mask 311a aperture 311b aperture 311c aperture 311d aperture 312b aperture 411a aperture 411b aperture 411c aperture 411d aperture 412 Resist mask 500 insulating film 502 insulating film 504 Conductive film 504a Conductive film 506 Resist mask 506a area 506b area 507a aperture 507c aperture 508 Resist Mask 510 insulating film 511a aperture 511b aperture 511c aperture 512a Conductive film 512b Conductive film 550 Connection 560 Connection 610 Insulating film 612a Conductive film 612b Conductive film 650 Connection 660 Connection 1000 lcd display device 1100 Touch panel unit 1111 board 1113 Conductive film 1114 Color Filter 1115 Liquid crystal layer 1121 Circuit Board 1122 Electrode 1123 Electrode 1131 Circuit Board 1155 Alignment film 1156 Alignment film 1161 Polarizing Plate 1162 Polarizing plate 1163 Adhesive layer 1165 Spacer 1200 Driver 1201 Pixel section 1202 driver 1235 Conductive film 1421 Sealing material 1422 Conductive film 1423 Conductive film 1424 FPC 1431 Conductive film 1432 Conductive film 1433 FPC 7100 Television equipment 7101 Housing 7102 Display section 7103 Stand 7111 Remote control device 7200 Computer 7201 Main unit 7202 Case 7203 Display section 7204 keyboard 7205 External connection port 7206 Pointing Device 7300 Handheld Game Console 7301a housing 7301b housing 7302 Connection section 7303a Display section 7303b Display section 7304 Speaker section 7305 Recording medium insertion section 7306 Operation Key 7307 Connection terminal 7308 Sensor 7400 mobile phone 7401 Housing 7402 Display section 7403 Operation button 7404 External connection port 7405 Speaker 7406 Microphone 7500 tablet devices 7501a housing 7501b housing 7502a Display section 7502b Display section 7503 Shaft 7504 Power supply 7505 Operation Key 7506 Speaker

Claims

1. a first conductive film; a first insulating film having a region on the first conductive film; a first oxide semiconductor film having a region on the first insulating film; a second oxide semiconductor film having a region on the first insulating film; a second insulating film having a region on the first oxide semiconductor film and a region on the second oxide semiconductor film; a second conductive film having a region on the second insulating film; a third conductive film having a region on the second insulating film; a third insulating film having a region on the second conductive film and a region on the third conductive film; a fourth insulating film having a region on the third insulating film; a fourth conductive film having a region on the fourth insulating film; a fifth insulating film having a region on the fourth conductive film; a fifth conductive film having a region on the fifth insulating film, the first oxide semiconductor film contains In, Ga, and Zn; the second oxide semiconductor film contains In, Ga, and Zn; the first oxide semiconductor film is provided in a first pixel, the second oxide semiconductor film is provided in a region different from the first pixel; the second insulating film has a region in contact with an upper surface of the first oxide semiconductor film, a region in contact with a side surface of the first oxide semiconductor film, a region in contact with an upper surface of the second oxide semiconductor film, and a region in contact with a side surface of the second oxide semiconductor film; the second conductive film has a region in contact with an upper surface of the second oxide semiconductor film in a first opening provided in the second insulating film, and a region in contact with an upper surface of the first conductive film in a second opening provided in the first insulating film and the second insulating film; the third conductive film has a region in contact with an upper surface of the first oxide semiconductor film in a third opening provided in the second insulating film; the fourth conductive film has a region overlapping with the first oxide semiconductor film and a region overlapping with the second oxide semiconductor film, the fourth conductive film has a region in contact with the fourth insulating film, the fifth insulating film has a fourth opening; the fifth insulating film has a region in contact with the fourth insulating film, The fifth conductive film has a region overlapping with the fourth conductive film.

2. a first conductive film; a first insulating film having a region on the first conductive film; a first oxide semiconductor film having a region on the first insulating film; a second oxide semiconductor film having a region on the first insulating film; a second insulating film having a region on the first oxide semiconductor film and a region on the second oxide semiconductor film; a second conductive film having a region on the second insulating film; a third conductive film having a region on the second insulating film; a third insulating film having a region on the second conductive film and a region on the third conductive film; a fourth insulating film having a region on the third insulating film; a fourth conductive film having a region on the fourth insulating film; a fifth insulating film having a region on the fourth conductive film; a fifth conductive film having a region on the fifth insulating film, the first oxide semiconductor film contains In, Ga, and Zn; the second oxide semiconductor film contains In, Ga, and Zn; the first oxide semiconductor film is provided in a first pixel, the second oxide semiconductor film is provided in a region different from the first pixel; the second insulating film has a region in contact with an upper surface of the first oxide semiconductor film, a region in contact with a side surface of the first oxide semiconductor film, a region in contact with an upper surface of the second oxide semiconductor film, and a region in contact with a side surface of the second oxide semiconductor film; the second conductive film has a region in contact with an upper surface of the second oxide semiconductor film in a first opening provided in the second insulating film, and a region in contact with an upper surface of the first conductive film in a second opening provided in the first insulating film and the second insulating film; the third conductive film has a region in contact with an upper surface of the first oxide semiconductor film in a third opening provided in the second insulating film; the fourth conductive film has a region overlapping with the first oxide semiconductor film and a region overlapping with the second oxide semiconductor film, the fourth conductive film has a region in contact with the fourth insulating film, the fifth insulating film has a fourth opening; the fifth insulating film has a region in contact with the fourth insulating film, the fourth conductive film includes a light-transmitting material, The fifth conductive film has a region overlapping with the fourth conductive film.

3. a first conductive film; a first insulating film having a region on the first conductive film; a first oxide semiconductor film having a region on the first insulating film; a second oxide semiconductor film having a region on the first insulating film; a second insulating film having a region on the first oxide semiconductor film and a region on the second oxide semiconductor film; a second conductive film having a region on the second insulating film; a third conductive film having a region on the second insulating film; a third insulating film having a region on the second conductive film and a region on the third conductive film; a fourth insulating film having a region on the third insulating film; a fourth conductive film having a region on the fourth insulating film; a fifth insulating film having a region on the fourth conductive film; a fifth conductive film having a region on the fifth insulating film, the first oxide semiconductor film contains In; the second oxide semiconductor film contains In, the first oxide semiconductor film is provided in a first pixel, the second oxide semiconductor film is provided in a region different from the first pixel; the second insulating film has a region in contact with an upper surface of the first oxide semiconductor film, a region in contact with a side surface of the first oxide semiconductor film, a region in contact with an upper surface of the second oxide semiconductor film, and a region in contact with a side surface of the second oxide semiconductor film; the second conductive film has a region in contact with an upper surface of the second oxide semiconductor film in a first opening provided in the second insulating film, and a region in contact with an upper surface of the first conductive film in a second opening provided in the first insulating film and the second insulating film; the third conductive film has a region in contact with an upper surface of the first oxide semiconductor film in a third opening provided in the second insulating film; the fourth conductive film has a region overlapping with the first oxide semiconductor film and a region overlapping with the second oxide semiconductor film, the fourth conductive film has a region in contact with the fourth insulating film, the fifth insulating film has a fourth opening; the fifth insulating film has a region in contact with the fourth insulating film, The fifth conductive film has a region overlapping with the fourth conductive film.

4. a first conductive film; a first insulating film having a region on the first conductive film; a first oxide semiconductor film having a region on the first insulating film; a second oxide semiconductor film having a region on the first insulating film; a second insulating film having a region on the first oxide semiconductor film and a region on the second oxide semiconductor film; a second conductive film having a region on the second insulating film; a third conductive film having a region on the second insulating film; a third insulating film having a region on the second conductive film and a region on the third conductive film; a fourth insulating film having a region on the third insulating film; a fourth conductive film having a region on the fourth insulating film; a fifth insulating film having a region on the fourth conductive film; a fifth conductive film having a region on the fifth insulating film, the first oxide semiconductor film contains In; the second oxide semiconductor film contains In, the first oxide semiconductor film is provided in a first pixel, the second oxide semiconductor film is provided in a region different from the first pixel; the second insulating film has a region in contact with an upper surface of the first oxide semiconductor film, a region in contact with a side surface of the first oxide semiconductor film, a region in contact with an upper surface of the second oxide semiconductor film, and a region in contact with a side surface of the second oxide semiconductor film; the second conductive film has a region in contact with an upper surface of the second oxide semiconductor film in a first opening provided in the second insulating film, and a region in contact with an upper surface of the first conductive film in a second opening provided in the first insulating film and the second insulating film; the third conductive film has a region in contact with an upper surface of the first oxide semiconductor film in a third opening provided in the second insulating film; the fourth conductive film has a region overlapping with the first oxide semiconductor film and a region overlapping with the second oxide semiconductor film, the fourth conductive film has a region in contact with the fourth insulating film, the fifth insulating film has a fourth opening; the fifth insulating film has a region in contact with the fourth insulating film, the fourth conductive film includes a light-transmitting material, The fifth conductive film has a region overlapping with the fourth conductive film.

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