Drive circuit and recording device

The modified drive circuit for piezoelectric elements in inkjet printers addresses high voltage challenges by using resistors and control signals to manage voltage peaks, reducing circuit complexity and extending component life.

JP7739371B2Active Publication Date: 2025-09-16CANON KK
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Patent Information

Application Number
JP2023143463
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Filing Date
2023-09-05
Publication Date
2025-09-16
Estimated Expiration
2043-09-05

AI Technical Summary

Technical Problem

Existing drive circuits for piezoelectric elements in inkjet printers face challenges with high voltage requirements, leading to increased component withstand voltage needs and design complexity, particularly when using full-bridge circuits.

Method used

A modified drive circuit configuration with resistors and control signals to reduce the maximum voltage applied to the piezoelectric element and peripheral circuits, using a combination of resistors and control signals to manage voltage peaks and prevent sudden changes, allowing for dual power supply operation.

Benefits of technology

The solution lowers the maximum voltage requirements for the entire circuit, simplifies component design, and extends the life of the piezoelectric elements by reducing sudden voltage changes and potential damage.

✦ Generated by Eureka AI based on patent content.

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    Figure 0007739371000006
Patent Text Reader

Abstract

To reduce the withstand voltage of a used component by lowering a maximum voltage of the entire circuit including a peripheral circuit.SOLUTION: This drive circuit for driving a piezoelectric element comprises: a power source having a positive electrode that outputs a positive voltage and a negative electrode that outputs a negative voltage; first and third switching elements connected at input terminals to the positive electrode; second and fourth switching elements connected at input terminals connected to the negative electrode; a first resistor that connects an output terminal of the first switching element and a first end of the piezoelectric element; a second resistor that connects the first end of the piezoelectric element and an output terminal of the second switching element; a third resistor that connects an output terminal of the third switching element and a second end of the piezoelectric element; a fourth resistor that connects the second end of the piezoelectric element and an output terminal of the fourth switching element; and control means for supplying a first control signal to the first and second switching elements and a second control signal to the third and fourth switching elements.SELECTED DRAWING: Figure 4
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Description

[Technical Field]

[0001] The present disclosure relates to a technique for a drive circuit that drives a piezoelectric element. [Background technology]

[0002] In the large-format inkjet printer market, output applications are diverse, ranging from CAD drawings to posters and artwork. Therefore, inks with a wide variety of physical properties are used to suit various applications. Depending on the ink's physical properties, problems such as degradation of image quality due to sedimentation can occur. To prevent ink sedimentation, an ink circulation pump may be installed inside the ink tank or print head. In particular, ink circulation pumps inside print heads are often equipped with piezoelectric elements as their driving source due to their light weight. A single-power half-bridge circuit is commonly used as a drive circuit for piezoelectric elements. When driving a piezoelectric element with a high voltage, a single-power full-bridge circuit (H-bridge circuit) may also be used. Patent Document 1 (Patent Document 1) discloses a technology for suppressing the voltage oscillation at one end of a piezoelectric element relative to the other end, which occurs when driving a piezoelectric element with a single-power full-bridge circuit. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2012-110186 Summary of the Invention [Problem to be solved by the invention]

[0004] The technique described in Patent Document 1 uses a full-bridge circuit configuration, which makes it possible to apply a drive voltage with the amplitude of the power supply voltage to the piezoelectric element. The peak-to-peak voltage of the drive voltage is twice the power supply voltage, making it possible to apply a high voltage to the piezoelectric element. However, when the drive voltage is high, it is necessary to increase the withstand voltage of not only the full-bridge circuit but also the components used in the power supply, gate driver, and other peripheral circuits. There are few types of high-voltage withstand components, and design becomes more difficult as the drive voltage increases.

[0005] The present disclosure has been made in view of the above-mentioned problems, and aims to reduce the maximum voltage of the entire circuit including the peripheral circuits and to lower the withstand voltage of the components used. [Means for solving the problem]

[0006] a first resistor connecting the output terminal of the first switching element to the first end of the piezoelectric element; a second resistor connecting the first end of the piezoelectric element to the output terminal of the second switching element; a third resistor connecting the output terminal of the third switching element to the second end of the piezoelectric element; a fourth resistor connecting the second end of the piezoelectric element to the output terminal of the fourth switching element; and control means for supplying a first control signal to a control terminal of the first switching element and a control terminal of the second switching element, and for supplying a second control signal, which is a signal of opposite phase to the first control signal, to a control terminal of the third switching element and a control terminal of the fourth switching element. [Effects of the Invention]

[0007] According to the technology of the present disclosure, it is possible to lower the maximum voltage of the entire circuit including the peripheral circuits, and to lower the withstand voltage of the components used. [Brief explanation of the drawings]

[0008] [Figure 1] FIG. 1 is a schematic perspective view showing the appearance of a recording apparatus. [Figure 2] FIG. 2 is a cross-sectional view showing the configuration of a recording head. [Figure 3] FIG. 2 is a block diagram showing the control configuration of the printing apparatus. [Figure 4] FIG. 2 is a circuit diagram showing a pump drive circuit. [Figure 5] FIG. 3 is a diagram showing input and output voltage waveforms of a pump drive circuit. [Figure 6] FIG. 3 is a diagram showing input and output voltage waveforms of a pump drive circuit. [Figure 7] FIG. 3 is a diagram showing input and output voltage waveforms of a pump drive circuit. [Figure 8] FIG. 2 is a circuit diagram showing a pump drive circuit. [Figure 9] FIG. 3 is a diagram showing input and output voltage waveforms of a pump drive circuit. [Figure 10] FIG. 3 is a diagram showing input and output voltage waveforms of a pump drive circuit. DETAILED DESCRIPTION OF THE INVENTION

[0009] [First embodiment] Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings. Note that the following embodiments do not limit the present disclosure, and not all combinations of features described in the embodiments are necessarily essential to the solutions of the present disclosure. Note that the same components will be described with the same reference numerals. Furthermore, the relative arrangements, shapes, etc. of the components described in the embodiments are merely examples, and are not intended to limit the scope of the present disclosure to only those.

[0010] In the following description of the embodiments, "recording" not only refers to the formation of significant information such as characters and figures, but also broadly includes the formation of images, designs, patterns, etc. on a sheet. Furthermore, in the following embodiments, a roll sheet is assumed as the sheet, but cut paper, cloth, plastic film, etc. may also be used. Furthermore, "ink" (sometimes referred to as "liquid") should be interpreted broadly and refers to a liquid that can be applied to a sheet to form an image, design, pattern, etc., or to process the sheet, or to be used for ink processing.

[0011] <Inkjet recording device> An inkjet recording apparatus 101 of this embodiment will be described with reference to Figs. 1 to 3. Fig. 1 is a schematic perspective view of the recording apparatus 101. Fig. 2 is a cross-sectional view showing the configuration of the recording apparatus 101. Fig. 3 is a block diagram showing the control configuration of the recording apparatus 101.

[0012] The recording device 101 rotatably holds a rolled sheet R, which is a sheet S wound into a roll. The rolled sheet R is rotated by a roll drive motor 316, and the sheet S is supplied from the rolled sheet R to a transport roller (not shown). The transport roller rotates while holding the sheet S. The transport roller is rotated by a transport roller drive motor 317, and the sheet S is transported to a position where the recording head 201 can perform recording on the sheet S. An image is recorded by ejecting liquid (ink) onto the sheet S transported from the recording head 201 while the recording head 201 moves in the X direction. The sheet S with the image recorded is discharged from a discharge section located downstream of the recording head 201 in the transport direction.

[0013] The operation panel 102 is an interface module that accepts various operations from the user. The user uses various switches and the like provided on the operation panel 102 to make various settings for the recording device 101. The various settings for the recording device 101 include, for example, the size and type of the sheet S, and the drive frequency of the circulation pump 202 of the print head 201.

[0014] A sheet detection sensor 309 is disposed upstream of the conveying roller in the conveying direction. When the sheet detection sensor 309 detects that a user has supplied a sheet S from a roll sheet R, the conveying operation of the sheet S is initiated. The conveying of the sheet S is performed by synchronizing the roll drive motor 316 and the conveying roller drive motor 317. In recording an image on the sheet S, a conveying operation is first performed to convey the sheet S to a position facing the recording head 201. Next, a recording operation is performed in which the recording head 201 is scanned in a direction intersecting (orthogonal to) the conveying direction of the sheet S while ejecting liquid. The conveying operation of the sheet S and the image recording operation are alternately performed, thereby recording a desired image on the sheet S. The sheet S on which the image has been recorded is sequentially conveyed downstream of the recording head 201 in the conveying direction. The conveyed sheet S is cut by a cutter provided in the discharge section. The cut sheet S is stacked in the basket 103.

[0015] 3 is a block diagram showing the control configuration of the recording apparatus 101. A motor control unit 315 controls a roll drive motor 316, a conveyance roller drive motor 317, a carriage drive motor 318, a lift drive motor 319, and a cutter drive motor 320 in accordance with a control program stored in a memory 312. The conveyance roller drive motor 317 rotates the conveyance roller, and the roll drive motor 316 rotates the spool. The conveyance roller drive motor 317 is provided with an encoder that detects the amount of rotation to detect the conveyance amount of the sheet S. The carriage drive motor 318 rotates a carriage belt (not shown) to move a carriage (not shown) and the recording head 201 mounted on the carriage.

[0016] Various setting information and the like based on user operations from the operation panel 102 or an external PC connected to the USB port 313 is input to the CPU 301 via the input / output I / F 311. The input information is stored in the memory 312. The CPU 301 reads out the information stored in the memory 312 as needed, and executes various processes based on the read information. That is, the CPU 301 includes a processing unit that executes various processes.

[0017] The CPU 301 controls and obtains information from the carriage encoder 306, density sensor 307, droplet detection sensor 308, and sheet detection sensor 309 via a sensor control unit 310. The CPU 301 executes various controls based on inputs from the carriage encoder 306, density sensor 307, droplet detection sensor 308, and sheet detection sensor 309.

[0018] <Circulation pump control> The print head 201 is equipped with a circulation pump 202 for circulating the liquid inside the print head 201. The circulation pump 202 is provided with a piezoelectric element 203 that converts electrical energy into mechanical energy. When a voltage is applied between the terminals of the piezoelectric element 203, a distortion proportional to the applied voltage occurs due to the electrostrictive effect. This distortion is used to vibrate a diaphragm (not shown) provided in the circulation pump 202, thereby circulating the liquid inside the print head 201. A rectangular wave or a sine wave is generally used as the driving voltage applied to the piezoelectric element 203.

[0019] CPU 301 issues commands related to the operation of circulation pump 202 to pump control unit 302. Examples of commands include starting operation, stopping operation, and a drive frequency. Possible communication methods for issuing commands include I2C and SPI. Control signals 304a and 304b corresponding to the commands are input from pump control unit 302 to pump drive circuit 303. For example, an FPGA or a microcomputer is used as pump control unit 302. Possible control signals 304a and 304b are rectangular waves or sine waves. Pump drive circuit 303 applies drive voltages 305a and 305b corresponding to control signals 304a and 304b to circulation pump 202.

[0020] <Basic operation of the pump drive circuit> FIG. 4 is a circuit diagram showing the pump drive circuit 303. Control signals 304a and 304b output from the pump control unit 302 drive the full-bridge circuit 402 via gate drivers 401a and 401b, applying drive voltages 305a and 305b to the piezoelectric element 203 of the circulation pump 202. The control signal 304a (first control signal) and the control signal 304b (second control signal) are rectangular waves with an amplitude of 3.3 V. As described above, the control signal 304a and the control signal 304b may be sinusoidal waves. The control signal 304a and the control signal 304b have an opposite phase relationship. The voltage waveform of the control signal 304a is shown in FIG. 5(a), and the voltage waveform of the control signal 304b is shown in FIG. 5(b). During a period P501 from time t1 to time t2, the control signal 304a is 3.3 V, and the control signal 304b is 0 V. During period P502 from time t2 to time t3, control signal 304a is 0 V and control signal 304b is 3.3 V. After time t3, control signal 304a and control signal 304b repeat the states of periods P501 and P502. For convenience, the state in which control signal 304a and control signal 304b are 3.3 V is referred to as the ON state of control signal 304a and control signal 304b. Furthermore, the state in which control signal 304a and control signal 304b are 0 V is referred to as the OFF state of control signal 304a and control signal 304b. The behavior of the circuit during periods P501 and P502 shows the result of inversion of the outputs of the transistor and MOSFET. Therefore, hereinafter, only the behavior of the circuit during period P501 will be described, and the behavior of the circuit during period P502 will only show the voltage waveforms.

[0021] The gate driver 401a is connected to a +3.3V power supply 403, a +35V power supply 404 (first power supply), a −35V power supply 405 (second power supply), a control signal 304a, and a full-bridge circuit 402. The gate driver 401b is connected to a +3.3V power supply 403, a +35V power supply 404 (first power supply), a −35V power supply 405 (second power supply), a control signal 304b, and a full-bridge circuit 402. In this embodiment, the +35V power supply 404 and the −35V power supply 405 are separate power supplies, but a single power supply that outputs +35V (positive voltage) from the positive pole and −35V (negative voltage) from the negative pole may also be used. The gate driver 401a also includes an npn transistor 406a, a pnp transistor 408a, and multiple resistors. The gate driver 401b includes an npn transistor 406b, a pnp transistor 408b, and a number of resistors.

[0022] The emitter of npn transistor 406a is connected to GND, and the collector is connected to +35V power supply 404 via resistor 407a. The emitter of pnp transistor 408a is connected to +3.3V power supply 403, and the collector is connected to -35V power supply 405 via resistor 409a. Control signal 304a is input to the base of npn transistor 406a and the base of pnp transistor 408a. The emitter of npn transistor 406b is connected to GND, and the collector is connected to +35V power supply 404 via resistor 407b. The emitter of pnp transistor 408b is connected to +3.3V power supply 403, and the collector is connected to -35V power supply 405 via resistor 409b. Control signal 304b is input to the base of npn transistor 406b and the base of pnp transistor 408b.

[0023] During period P501, 3.3 V is applied to the base of npn transistor 406 a of gate driver 401 a via a resistor. This causes the base-emitter voltage of npn transistor 406 a to exceed 0.7 V, bringing the collector-emitter of npn transistor 406 a into conduction. This collector-emitter conduction allows a collector current to flow. The voltage drop across resistor 407 a exceeds the gate threshold voltage of 1.5 V of PMOSFET 410 (first switching element) in full-bridge circuit 402, bringing the drain-source of PMOSFET 410 into conduction.

[0024] Similarly, 3.3 V is applied to the base of PNP transistor 408a via a resistor. As a result, the base-emitter voltage of PNP transistor 408a becomes less than 0.7 V, and the collector-emitter of PNP transistor 408a becomes non-conductive. Because the collector-emitter is non-conductive, no collector current flows. Therefore, no voltage drop occurs across resistor 409a. Because the voltage drop across resistor 409a is lower than the gate threshold voltage of 1.5 V of NMOSFET 411 (second switching element) in full-bridge circuit 402, the drain-source of NMOSFET 411 becomes non-conductive.

[0025] Hereafter, for convenience, when the collector and emitter of a transistor are conducting, it is said that the transistor is ON, and when the collector and emitter are not conducting, it is said that the transistor is OFF. Similarly, when the drain and source of a MOSFET are conducting, it is said that the MOSFET is ON, and when the drain and source are not conducting, it is said that the MOSFET is OFF.

[0026] As with the gate driver 401a, in period P501, the npn transistor 406b of the gate driver 401b is turned off, turning off the PMOSFET 412 (third switching element), and the pnp transistor 408b is turned on, turning on the NMOSFET 413 (fourth switching element).

[0027] A +35V power supply 404, a −35V power supply 405, and gate drivers 401a and 401b are connected to the full-bridge circuit 402. Furthermore, a piezoelectric element 203 of the circulation pump 202 is connected as a load between output terminals 414a and 414b of the full-bridge circuit 402. The full-bridge circuit 402 also includes a PMOSFET 410, an NMOSFET 411, a PMOSFET 412, an NMOSFET 413, a resistor 415 (first resistor), a resistor 416 (second resistor), a resistor 417 (third resistor), and a resistor 418 (fourth resistor). The source (input terminal) of the PMOSFET 410 is connected to the +35V power supply 404, and the drain (output terminal) is connected to the resistor 415. The source of the NMOSFET 411 is connected to GND, and the drain is connected to the resistor 416. The source of the PMOSFET 412 is connected to the +35V power supply 404, and the drain is connected to the resistor 417. The source of NMOSFET 413 is connected to GND, and the drain is connected to resistor 418. The output of gate driver 401a is input to the gates (control terminals) of PMOSFET 410 and NMOSFET 411. The output of gate driver 401b is input to the gates of PMOSFET 412 and NMOSFET 413. Resistors 415 and 416 are connected to output terminal 414a of full bridge circuit 402, and resistors 417 and 418 are connected to output terminal 414b of full bridge circuit 402. Output terminal 414a of full bridge circuit 402 is a first terminal of piezoelectric element 203. Output terminal 414b of full bridge circuit 402 is a second terminal of piezoelectric element 203.

[0028] During period P501, as described in the operation of gate driver 401a and gate driver 401b, PMOSFET 410 is ON, NMOSFET 411 is OFF, PMOSFET 412 is OFF, and NMOSFET 413 is ON. An output terminal 414a of full-bridge circuit 402 is connected to a +35V power supply 404 via PMOSFET 410 and resistor 415. An output terminal 414b of full-bridge circuit 402 is connected to a −35V power supply 405 via NMOSFET 413 and resistor 418. Because the piezoelectric element 203 is a capacitive load, it has the property of storing charge like a capacitor. Therefore, during period P501, the voltage at output terminal 414a gradually increases toward +35V, and the voltage at output terminal 414b gradually decreases toward −35V. The voltage waveform at output terminal 414a is shown in FIG. 5(c), and the voltage waveform at output terminal 414b is shown in FIG. 5(d). The voltage applied to the piezoelectric element 203 of the circulation pump 202 is the voltage of the output terminal 414a with respect to the output terminal 414b. For convenience, the voltage applied to the piezoelectric element 203 of the circulation pump 202 is called the circulation pump voltage. The voltage waveform of the circulation pump voltage is shown in FIG. 5(e).

[0029] As described above, during period P501, a circulation pump voltage of +70 V is applied to the piezoelectric element 203 of the circulation pump 202. During period P502, the ON and OFF states of the transistors in the gate drivers 401a and 401b and the MOSFETs in the full bridge circuit 402 are all reversed, and the circulation pump voltage becomes -70 V. By alternating between the state of period P501 and the state of period P502, a circulation pump voltage of 140 V peak-to-peak can be applied to the piezoelectric element 203. This allows the liquid in the print head 201 to be circulated by the circulation pump 202, making it possible to prevent image degradation due to ink settling and the like.

[0030] <The role of resistors in a full-bridge circuit> Resistors 415, 416, 417, and 418 included in the full-bridge circuit 402 have three main roles.

[0031] The first role is to smooth the drive voltages 305a and 305b of the circulation pump 202. The piezoelectric element 203 used in the circulation pump 202 suffers significant damage when the applied voltage is suddenly changed, reducing the durability of the circulation pump 202. Sudden changes in voltage can also cause a loud buzzing sound from the piezoelectric element 203. Because the piezoelectric element 203 is a capacitive load, it can be considered a capacitor in terms of an electrical circuit. By providing a resistor in the charge / discharge path of the piezoelectric element 203, an RC circuit is formed, which can suppress sudden changes in the applied voltage. As shown in Figures 5(a) and 5(b), the control signals 304a and 304b are rectangular waves with sudden voltage changes. However, as shown in Figures 5(c) and 5(d), the waveforms of the drive voltages 305a and 305b are smoothed. Similarly, the circulating pump voltage shown in FIG. 5(e) is also rounded, and it is understood that abrupt changes in the voltage applied to the piezoelectric element 203 of the circulating pump 202 are suppressed.

[0032] If we consider the piezoelectric element 203 as a capacitor, driving the circulation pump 202 is equivalent to charging and discharging the capacitor. The voltage across the terminals of the capacitor is equal to the voltage applied to the circulation pump 202, i.e., the circulation pump voltage, and can be expressed by the following equation.

[0033]

number

[0034]

number

[0035] Equation (1) represents charging, and equation (2) represents discharging. V C is the circulation pump voltage. V CC is the voltage value of the +35V power supply 404. EEis the voltage value of the −35V power supply 405. R is the combined resistance value of the charge / discharge paths. C is the electrostatic capacitance of the piezoelectric element 203. There are four possible charge / discharge paths: The first path is a path where PMOSFET 410 and NMOSFET 413 are turned ON and a current flows through resistors 415 and 418. The second path is a path where PMOSFET 412 and NMOSFET 411 are turned ON and a current flows through resistors 417 and 416. The third path is a path where PMOSFET 410 and PMOSFET 412 are turned ON and a current flows through resistors 415 and 417. The fourth path is a path where NMOSFET 411 and NMOSFET 413 are turned ON and a current flows through resistors 416 and 418. These four paths can be controlled by a combination of control signals 304a and 304b.

[0036] The voltage waveform shown in FIG. 5 is a waveform obtained by repeating the first and second paths. Resistors 415, 416, 417, and 418 all have the same resistance value. Increasing the resistance value increases the distortion of drive voltages 305a and 305b, resulting in a more blunted waveform of the circulation pump voltage. Decreasing the resistance value decreases the distortion of drive voltages 305a and 305b, resulting in a steeper waveform of the circulation pump voltage. By adjusting the combination of control signals 304a and 304b and the resistance value of each resistor, the characteristics of drive voltages 305a and 305b of circulation pump 202 can be flexibly changed. As a result, the circulation pump voltage can be flexibly changed.

[0037] The second role is to limit through-current. In the full-bridge circuit 402, the PMOSFET 410 and NMOSFET 411 are controlled by the control signal 304a. Similarly, the PMOSFET 412 and NMOSFET 413 are controlled by the control signal 304b. The full-bridge circuit 402 is configured to drive the PMOSFET and NMOSFET exclusively. However, due to individual differences between the transistors in the gate drivers 401a and 401b and the MOSFETs in the full-bridge circuit 402, the PMOSFET and NMOSFET may be turned on simultaneously. For example, if the PMOSFET 410 and NMOSFET 411 are turned on simultaneously, the +35V power supply 404 is connected to the −35V power supply 405 via resistors 415 and 416. Without resistors 415 and 416, the +35V power supply 404 and the −35V power supply 405 are short-circuited, resulting in a large current flowing as through-current. This may cause malfunction or failure of the element, destruction of the circuit, etc. Resistors 415 and 416, and resistors 417 and 418 can limit the above-mentioned through current.

[0038] The third role is to limit overcurrent when circulation pump 202 fails and output terminals 414a and 414b of full-bridge circuit 402 are short-circuited. One possible failure of circulation pump 202 is a short-circuit of piezoelectric element 203. For example, during period P501, +35V power supply 404 is connected to −35V power supply 405 via resistor 415, piezoelectric element 203, and resistor 418. If piezoelectric element 203 of circulation pump 202 were to short-circuit, and these resistors were not present, +35V power supply 404 and −35V power supply 405 would be short-circuited, causing a large current to flow. Resistors 415 and 418, and resistors 417 and 416, respectively, can limit the large current described above.

[0039] By using the pump drive circuit 303 of this embodiment, the circulation pump 202 can be driven by dual power supplies. Furthermore, compared to driving the circulation pump 202 with a single power supply, the maximum voltage of the entire circuit, including peripheral circuits, can be reduced, allowing the withstand voltage of the components used to be lowered. This simplifies the design of the pump drive circuit 303. Cost reduction is also an additional benefit. Furthermore, the pump drive circuit 303 can flexibly change the drive voltages 305a and 305b by adjusting the control signals 304a and 304b and the values ​​of the resistors in the full-bridge circuit 402. As a result, the circulation pump voltage can also be flexibly changed.

[0040] The number of control signals from the pump control unit 302 is not limited to two. The number of pump drive circuits controlled by the pump control unit 302 is not limited to one. Therefore, one pump control unit 302 may control multiple pump drive circuits 303. One pump drive circuit 303 may drive multiple circulation pumps 202 or multiple piezoelectric elements 203 included in the circulation pumps 202. Although an example has been described in which the high-side switching element of the full bridge circuit 402 is a PMOSFET and the low-side switching element is an NMOSFET, this is not limiting. An NMOSFET may be used on the high side and a PMOSFET on the low side. A pnp transistor may be used on the high side and an npn transistor on the low side. An npn transistor may be used on the high side and a pnp transistor on the low side. Furthermore, instead of a MOSFET, a switching element such as a relay may be used.

[0041] By adopting the above circuit configuration, it is possible to lower the maximum voltage of the entire circuit, including the peripheral circuits, and to lower the withstand voltage of the components used. This makes it possible to use components with low withstand voltage, making it easier to design the pump drive circuit described above.

[0042] [Second embodiment] 5(a) and 5(b), the control signals 304a and 304b are opposite in phase and are not turned on at the same time. Therefore, the high-side PMOSFET 410 and PMOSFET 412 or the low-side NMOSFET 411 and NMOSFET 413 of the full bridge circuit 402 ideally are not turned on at the same time.

[0043] In this embodiment, the drive voltages 305a and 305b, i.e., the circulation pump voltage, are changed in two stages between +70V and −70V by providing a period in which the control signals 304a and 304b are simultaneously ON or OFF. Here, the drive voltages 305a and 305b are changed from −70V to 0V in the first stage, and from 0V to +70V in the second stage. The operation of the pump drive circuit 303 when the control signals 304a and 304b are simultaneously ON will be described below. The control signal 304a is shown in FIG. 6(a), and the control signal 304b is shown in FIG. 6(b). During the period P601 from time t2 to time t3 and the period P603 from time t4 to time t5, the control signals 304a and 304b are both ON. During the period P602 from time t3 to time t4 and the period P604 from time t5 to time t6, the control signals 304a and 304b are in opposite phases.

[0044] During period P601, control signals 304a and 304b are turned ON, turning ON PMOSFET 410 and PMOSFET 412 in the full-bridge circuit 402. At this time, a loop is formed including +35V power supply 404, PMOSFET 410, resistor 415 (fifth resistor), piezoelectric element 203, resistor 417 (sixth resistor), and PMOSFET 412. As a result, the piezoelectric element 203 of the circulation pump 202 is charged and discharged via resistors 415 and 417 so that the voltage applied to the piezoelectric element 203 of the circulation pump 202, i.e., the circulation pump voltage, becomes 0V. The voltage waveform during period P601 corresponds to the first of the two stages described above. During period P602, the circuit operates in the same manner as during period P501 in the first embodiment. Therefore, the piezoelectric element 203 of the circulation pump 202 is charged and discharged via resistors 415 and 418 so that the circulation pump voltage becomes +70V. The voltage waveform during period P602 corresponds to the second of the two stages described above. During period P603, the same loop as during period P601 is formed, so the piezoelectric element 203 of the circulation pump 202 is charged and discharged via resistors 415 and 417 so that the circulation pump voltage becomes 0 V. The voltage waveform during period P603 corresponds to the first of the two stages described above. During period P604, the circuit operates in the same manner as during period P502 in the first embodiment. Therefore, the piezoelectric element 203 of the circulation pump 202 is charged and discharged via resistors 417 and 416 so that the circulation pump voltage becomes −70 V. The voltage waveform during period P604 corresponds to the second of the two stages described above. As described above, by providing periods during which the control signal 304a and the control signal 304b are both ON, the circulation pump voltage can be changed in two stages, from −70 V to +70 V and from +70 V to −70 V. The voltage waveform at output terminal 414a is shown in FIG. 6(c), the voltage waveform at output terminal 414b is shown in FIG. 6(d), and the voltage waveform of the circulation pump voltage is shown in FIG. 6(e).

[0045] The voltage waveforms shown in FIG. 6 are for the case where the high-side resistors 415 and 417 and the low-side resistors 416 and 418 all have the same resistance, as in the first embodiment. By adjusting these resistances, the rise time, fall time, etc., can be changed when the circulation pump voltage changes in two stages. For example, FIG. 7(e) shows the circulation pump voltage when the resistances of the high-side resistors 415 and 417 are greater than the resistances of the low-side resistors 416 and 418. In this case, the control signals 304a and 304b have the same waveforms as those shown in FIGS. 6(a) and 6(b), as shown in FIGS. 7(a) and 7(b). The voltage waveform at the output terminal 414a is shown in FIG. 7(c), and the voltage waveform at the output terminal 414b is shown in FIG. 7(d). In Fig. 7(f), the dotted line shows the circulation pump voltage when all the resistance values ​​shown in Fig. 6(e) are equal, and the solid line shows the circulation pump voltage when the high-side resistance value is greater than the low-side resistance value. Because the high-side resistances 415 and 417 increase, the resistance values ​​on the charge / discharge paths in periods P601 and P603 increase, which lengthens the rise time or fall time and makes the change in the circulation pump voltage more gradual.

[0046] In this embodiment, the resistance value of the high side is set to be greater than the resistance value of the low side, and a period is provided in which the control signals 304a and 304b are simultaneously turned on. However, this is not limited to this. The resistance value of the low side may be set to be greater than the resistance value of the high side. Also, a period in which the control signals 304a and 304b are simultaneously turned off may be provided.

[0047] By adopting the above circuit configuration, it is possible to lower the maximum voltage of the entire circuit, including the peripheral circuits, and to lower the withstand voltage of the components used. Furthermore, by adopting the above voltage application method, it is possible to change the rise time or fall time of the voltage applied to the piezoelectric element, and it is also possible to suppress steep voltage changes. This also makes it possible to extend the life of the components used.

[0048] [Third embodiment] In the first embodiment, the full-bridge circuit 402 has resistors 415, 416, 417, and 418. Also, in the first embodiment, it has been described that these resistors play three roles. The above-mentioned three roles can be played by only the high-side resistors 415 and 417 or the low-side resistors 416 and 418.

[0049] In this embodiment, a case will be described in which only the high-side resistors 415 and 417 are provided. Fig. 8 shows a circuit diagram of the pump driver circuit 303 having a full-bridge circuit 801 in which only the high-side resistors 415 and 417 are provided.

[0050] 9(a) and 9(b) show the voltage waveforms for the case where there is no period during which the control signals 304a and 304b are simultaneously ON or OFF, as in the first embodiment. The voltage waveform of the drive voltage 305a (voltage waveform at the output terminal 414a) is shown in FIG. 9(c), and the voltage waveform of the drive voltage 305b (voltage waveform at the output terminal 414b) is shown in FIG. 9(d). At times t2, t4, and t6, the drive voltage 305a falls instantaneously, causing a steep voltage change. Similarly, at times t1, t3, and t5, the drive voltage 305b falls instantaneously, causing a steep voltage change. The circulation pump voltage, which is the difference between the drive voltages 305a and 305b, has the voltage waveform shown in FIG. 9(e). When the circulation pump voltage rises at times t1, t3, and t5, the circulation pump voltage rises from −70 V to near 0 V in an instant, resulting in a sudden voltage change. Similarly, when the circulation pump voltage falls at times t2, t4, and t6, the circulation pump voltage drops from +70 V to near 0 V in an instant, resulting in a sudden voltage change. The sudden voltage change in the circulation pump voltage is caused by the absence of low-side resistors 416 and 418, which causes the output terminals 414a and 414b of the full bridge circuit 402 to drop from +35 V to −35 V in an instant.

[0051] As explained in the second embodiment, by providing a period in which the control signals 304a and 304b are simultaneously ON or OFF, the circulation pump voltage can be changed in two stages, thereby adjusting the rise time or fall time. As explained in the second embodiment, a case in which a period in which the control signals 304a and 304b are simultaneously ON will be described. The voltage waveform of the control signal 304a is shown in FIG. 10(a), and the voltage waveform of the control signal 304b is shown in FIG. 10(b). The voltage waveform of the drive voltage 305a (voltage waveform at the output terminal 414a) is shown in FIG. 10(c), and the voltage waveform of the drive voltage 305a (voltage waveform at the output terminal 414a) is shown in FIG. 10(d). The voltage waveform of the circulation pump voltage is shown in FIG. 10(e).

[0052] The circulation pump voltage does not rise sharply at times t1, t3, and t5, but rises gradually instead. Similarly, the circulation pump voltage does not fall sharply at times t2, t4, and t6, but falls gradually instead. As described above, even in the full-bridge circuit 402 including only the high-side resistors 415 and 417, the circulation pump voltage can be made to have a gradient, and the circulation pump 202 can be driven without abrupt voltage changes.

[0053] In this embodiment, only a high-side resistor is provided, but the above-described effect can be obtained even if only a low-side resistor is provided. Also, a period in which the control signal 304a and the control signal 304b are both turned off may be provided.

[0054] Even if the main circuit configuration is simpler than in the first embodiment, it is possible to lower the maximum voltage of the entire circuit including the peripheral circuits and to lower the withstand voltage of the components used.

[0055] [Fourth embodiment] In the first embodiment, four resistors having specific resistance values ​​are used as the four resistors of the full bridge circuit 402. In the second embodiment, it is described that the drive voltages 305a and 305b can be adjusted by changing the control signals 304a and 304b and the resistance values ​​of the four resistors.

[0056] In this embodiment, a case where the resistance values ​​of the four resistors are variable will be described. Considering the need to adjust the drive voltages 305a and 305b according to the load capacitance, at least one of the four resistors in the full bridge circuit 402 is a variable resistor, and the drive voltages 305a and 305b are dynamically adjusted. This prevents abrupt changes in the circulation pump voltage, allowing the circulation pump 202 to be driven stably. The drive voltages 305a and 305b can also be dynamically adjusted using a digital potentiometer instead of a variable resistor.

[0057] Furthermore, variable resistors may be used to eliminate variations in the resistance values ​​of the four resistors in the full bridge circuit 402. For example, one of the four resistors in the full bridge circuit 402 may be a fixed resistor, and the remaining three resistors may be variable resistors. By adjusting the three variable resistors to the resistance value of the fixed resistor, the resistance values ​​of the four resistors can be made the same. Even if the four resistors are variable resistors, it is possible to make the resistance values ​​of the four resistors the same. This makes it possible to generate a circulation pump voltage with little distortion.

[0058] The disclosure of the above-described embodiment includes the following configurations.

[0059] (Configuration 1) A drive circuit for driving a piezoelectric element having a first end and a second end, comprising: a power supply having a positive electrode that outputs a positive voltage and a negative electrode that outputs a negative voltage; a first switching element and a third switching element whose input terminals are connected to the positive electrode of the power supply; a second switching element and a fourth switching element whose input terminals are connected to the negative electrode of the power supply; a first resistor connecting the output terminal of the first switching element and the first end of the piezoelectric element; a second resistor connecting the first end of the piezoelectric element and the output terminal of the second switching element; a third resistor connecting the output terminal of the third switching element and the second end of the piezoelectric element; a fourth resistor connecting the second end of the piezoelectric element and the output terminal of the fourth switching element; and control means for supplying a first control signal to a control terminal of the first switching element and a control terminal of the second switching element, and for supplying a second control signal, which is a signal of opposite phase to the first control signal, to a control terminal of the third switching element and a control terminal of the fourth switching element.

[0060] (Configuration 2) The drive circuit according to configuration 1, wherein the first control signal and the second control signal are square waves.

[0061] (Configuration 3) The drive circuit according to configuration 2, wherein there is a period during which the first control signal and the second control signal are simultaneously applied with voltage.

[0062] (Configuration 4) The drive circuit according to configuration 2, wherein there is a period in which the first control signal and the second control signal are not simultaneously applied with a voltage.

[0063] (Configuration 5) The drive circuit according to any one of configurations 1 to 4, wherein the resistance value of the first resistor, the resistance value of the second resistor, the resistance value of the third resistor, and the resistance value of the fourth resistor are all equal.

[0064] (Configuration 6) A driving circuit described in any one of configurations 1 to 4, wherein the resistance value of the first resistor is equal to the resistance value of the third resistor, the resistance value of the second resistor is equal to the resistance value of the fourth resistor, and the resistance value of the first resistor is greater than the resistance value of the second resistor.

[0065] (Configuration 7) A driving circuit described in any one of configurations 1 to 4, wherein the resistance value of the first resistor is equal to the resistance value of the third resistor, the resistance value of the second resistor is equal to the resistance value of the fourth resistor, and the resistance value of the second resistor is greater than the resistance value of the first resistor.

[0066] (Configuration 8) The drive circuit according to configuration 1, wherein at least one of the first resistor, the second resistor, the third resistor, and the fourth resistor is a variable resistor.

[0067] (Configuration 9) The drive circuit according to configuration 1, wherein at least one of the first resistor, the second resistor, the third resistor, and the fourth resistor is a digital potentiometer.

[0068] (Configuration 10) A drive circuit described in any one of configurations 1 to 9, wherein the first switching element and the third switching element are PMOSFETs, and the second switching element and the fourth switching element are NMOSFETs, or the first switching element and the third switching element are NMOSFETs, and the second switching element and the fourth switching element are PMOSFETs.

[0069] (Configuration 11) A drive circuit described in any one of configurations 1 to 9, wherein the first switching element and the third switching element are pnp transistors, and the second switching element and the fourth switching element are npn transistors, or the first switching element and the third switching element are npn transistors, and the second switching element and the fourth switching element are pnp transistors.

[0070] (Configuration 12) The drive circuit according to any one of configurations 1 to 11, wherein the power source includes a first power source having the positive electrode and a second power source having the negative electrode.

[0071] (Configuration 13) A drive circuit for driving a piezoelectric element having a first end and a second end, the drive circuit comprising: a power supply having a positive electrode that outputs a positive voltage and a negative electrode that outputs a negative voltage; a first switching element and a third switching element having input terminals connected to the positive electrode of the power supply; a second switching element and a fourth switching element having input terminals connected to the negative electrode of the power supply; a fifth resistor connecting between an output terminal of the first switching element and an output terminal of the second switching element; a sixth resistor connecting between an output terminal of the third switching element and an output terminal of the fourth switching element; and control means for supplying a first control signal to a control terminal of the third switching element and a control terminal of the fourth switching element, and a second control signal, the second control signal being a signal of opposite phase to the first control signal, to a control terminal of the third switching element and a control terminal of the fourth switching element, wherein when the fifth resistor connects between the output terminal of the first switching element and a first end of the piezoelectric element, the sixth resistor connects between the output terminal of the third switching element and a second end of the piezoelectric element, and when the fifth resistor connects between the first end of the piezoelectric element and the output terminal of the second switching element, the sixth resistor connects between the second end of the piezoelectric element and the output terminal of the fourth switching element.

[0072] (Configuration 14) The drive circuit according to configuration 13, wherein the first control signal and the second control signal are square waves.

[0073] (Configuration 15) The drive circuit according to configuration 14, wherein there is a period during which the first control signal and the second control signal are simultaneously applied with voltage.

[0074] (Configuration 16) The drive circuit according to configuration 14, wherein there is a period in which the first control signal and the second control signal are not simultaneously applied with a voltage.

[0075] (Configuration 17) The drive circuit according to any one of configurations 13 to 16, wherein the resistance value of the fifth resistor is equal to the resistance value of the sixth resistor.

[0076] (Configuration 18) The drive circuit according to any one of configurations 13 to 17, wherein the power source includes a first power source having the positive electrode and a second power source having the negative electrode.

[0077] (Configuration 19) A recording device comprising the drive circuit according to any one of configurations 1 to 18.

Claims

1. A drive circuit for driving a piezoelectric element having a first end and a second end, a power supply having a positive electrode that outputs a positive voltage and a negative electrode that outputs a negative voltage; a first switching element and a third switching element whose input terminals are connected to the positive electrode of the power supply; a second switching element and a fourth switching element whose input terminals are connected to the negative electrode of the power supply; a first resistor connected between an output terminal of the first switching element and a first end of the piezoelectric element; a second resistor connecting between a first end of the piezoelectric element and an output terminal of the second switching element; a third resistor connecting an output terminal of the third switching element and a second end of the piezoelectric element; a fourth resistor connecting a second end of the piezoelectric element and an output terminal of the fourth switching element; control means for supplying a first control signal to a control terminal of the first switching element and a control terminal of the second switching element, and for supplying a second control signal, which is a signal having an opposite phase to the first control signal, to a control terminal of the third switching element and a control terminal of the fourth switching element; A drive circuit comprising:

2. 2. The drive circuit according to claim 1, wherein the first control signal and the second control signal are square waves.

3. 3. The drive circuit according to claim 2, wherein there is a period during which the first control signal and the second control signal are simultaneously applied with voltage.

4. 3. The drive circuit according to claim 2, wherein there is a period during which no voltage is applied to the first control signal and the second control signal at the same time.

5. 2. The drive circuit according to claim 1, wherein the first resistor, the second resistor, the third resistor, and the fourth resistor all have the same resistance value.

6. 2. The driving circuit according to claim 1, wherein the resistance value of the first resistor is equal to the resistance value of the third resistor, the resistance value of the second resistor is equal to the resistance value of the fourth resistor, and the resistance value of the first resistor is greater than the resistance value of the second resistor.

7. 2. The drive circuit according to claim 1, wherein the resistance value of the first resistor is equal to the resistance value of the third resistor, the resistance value of the second resistor is equal to the resistance value of the fourth resistor, and the resistance value of the second resistor is greater than the resistance value of the first resistor.

8. 2. The drive circuit of claim 1, wherein at least one of the first resistor, the second resistor, the third resistor, and the fourth resistor is a variable resistor.

9. 2. The drive circuit of claim 1, wherein at least one of the first resistor, the second resistor, the third resistor, and the fourth resistor is a digital potentiometer.

10. 2. The drive circuit of claim 1, wherein the first switching element and the third switching element are PMOSFETs and the second switching element and the fourth switching element are NMOSFETs, or the first switching element and the third switching element are NMOSFETs and the second switching element and the fourth switching element are PMOSFETs.

11. 2. The drive circuit of claim 1, wherein the first switching element and the third switching element are pnp transistors, and the second switching element and the fourth switching element are npn transistors, or the first switching element and the third switching element are npn transistors, and the second switching element and the fourth switching element are pnp transistors.

12. 2. The drive circuit according to claim 1, wherein the power supply includes a first power supply having the positive terminal and a second power supply having the negative terminal.

13. A drive circuit for driving a piezoelectric element having a first end and a second end, a power supply having a positive electrode that outputs a positive voltage and a negative electrode that outputs a negative voltage; a first switching element and a third switching element whose input terminals are connected to the positive electrode of the power supply; a second switching element and a fourth switching element whose input terminals are connected to the negative electrode of the power supply; a fifth resistor connecting between the output terminal of the first switching element and the output terminal of the second switching element; a sixth resistor connecting between the output terminal of the third switching element and the output terminal of the fourth switching element; control means for supplying a first control signal to a control terminal of the first switching element and a control terminal of the second switching element, and for supplying a second control signal, which is a signal having an opposite phase to the first control signal, to a control terminal of the third switching element and a control terminal of the fourth switching element; Equipped with when the fifth resistor connects between the output terminal of the first switching element and the first end of the piezoelectric element, the sixth resistor connects between the output terminal of the third switching element and the second end of the piezoelectric element; A drive circuit characterized in that, when the fifth resistor connects between a first end of the piezoelectric element and an output terminal of the second switching element, the sixth resistor connects between a second end of the piezoelectric element and an output terminal of the fourth switching element.

14. 14. The drive circuit according to claim 13, wherein the first control signal and the second control signal are square waves.

15. The drive circuit according to claim 14 , wherein there is a period during which the first control signal and the second control signal are simultaneously applied as voltages.

16. The drive circuit according to claim 14 , wherein there is a period during which the first control signal and the second control signal are not simultaneously applied with a voltage.

17. 14. The drive circuit according to claim 13, wherein the resistance value of the fifth resistor is equal to the resistance value of the sixth resistor.

18. The drive circuit of claim 13 , wherein the power source includes a first power source having the positive polarity and a second power source having the negative polarity.

19. A recording apparatus comprising the drive circuit according to any one of claims 1 to 18.

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