Semiconductor device and method for manufacturing the same
A three-layer gate insulating film structure with crystallized first and amorphous third layers improves the reliability and mobility of semiconductor devices by reducing defects and leakage current, addressing the issues of crystallization-induced defects in single-crystal gallium nitride.
Patent Information
- Application Number
- JP2022078160
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2022-05-11
- Publication Date
- 2025-10-01
- Estimated Expiration
- 2042-05-11
Smart Images

Figure 0007746914000001 
Figure 0007746914000002
Abstract
Description
[Technical Field]
[0001] The technology disclosed in this specification relates to a semiconductor device and a method for manufacturing the semiconductor device. [Background technology]
[0002] A structure in which a gate insulating film and a gate electrode are stacked on single-crystal gallium nitride is known. A technology is also known in which the crystallinity of the gate insulating film near the gallium nitride interface is improved by heat treatment. Since defect levels at the interface and in the gate insulating film can be reduced, it becomes possible to suppress a decrease in mobility due to capture and scattering of conduction carriers traveling through the channel. Related technology is disclosed in Patent Document 1. [Prior art documents] [Patent documents]
[0003] [Patent Document 1] Patent No. 6707995 specification Summary of the Invention [Problem to be solved by the invention]
[0004] When crystallization progresses from the gallium nitride interface toward the top of the gate insulating film, defects and impurity segregation at the grain boundaries increase leakage current and reduce breakdown voltage in the gate insulating film, potentially reducing the reliability of the gate insulating film. [Means for solving the problem]
[0005] One embodiment of a semiconductor device disclosed in this specification is a semiconductor device having a gate insulating film provided on single-crystal gallium nitride. The gate insulating film is disposed on the surface of the gallium nitride and includes a first insulating film having hexagonal symmetry crystallinity. The gate insulating film is disposed on the upper surface of the first insulating film and includes a second insulating film having a function of inhibiting propagation of gallium nitride crystal information. The gate insulating film is disposed on the upper surface of the second insulating film and includes a third insulating film having a dielectric constant equal to or greater than the dielectric constants of the first insulating film and the second insulating film. The crystallinity of the first insulating film is higher than that of the third insulating film.
[0006] In the semiconductor device of the above embodiment, the second insulating film can prevent the propagation of gallium nitride crystal information from the first insulating film to the third insulating film. It is possible to form a structure in which the crystallinity of the first insulating film is higher than that of the third insulating film. The first insulating film with high crystallinity can reduce defect levels at the interface and in the insulating film. Furthermore, the third insulating film with low crystallinity can suppress an increase in leakage current and a decrease in breakdown voltage. It is possible to improve the reliability of the gate insulating film while suppressing a decrease in mobility.
[0007] The first insulating film may be crystallized in a gallium nitride orientation. Details of the effect will be described in the examples.
[0008] The first insulating film may be made of any of aluminum nitride, aluminum silicate, hafnium oxide, and aluminum oxide.
[0009] The second insulating film may be silicon oxide or silicon nitride.
[0010] The third insulating film may be aluminum silicate or hafnium silicate.
[0011] The first insulating film may be aluminum silicate, the second insulating film may be silicon oxide, and the third insulating film may be aluminum silicate.
[0012] The first insulating film may be aluminum nitride, the second insulating film may be silicon oxide, and the third insulating film may be aluminum silicate.
[0013] The thickness of the first insulating film may be 3 nm or more. Details of the effects will be explained in the examples.
[0014] The thickness of the second insulating film may be 1 nm or more. Details of the effects will be explained in the examples.
[0015] The present specification discloses a method for manufacturing a semiconductor device, comprising the steps of: arranging a first insulating film having hexagonal symmetry on the surface of single-crystal gallium nitride; arranging a second insulating film on the upper surface of the first insulating film, the second insulating film having a function of inhibiting the propagation of gallium nitride crystal information; arranging a third insulating film on the upper surface of the second insulating film, the third insulating film having a dielectric constant equal to or greater than the dielectric constants of the first insulating film and the second insulating film; annealing the gallium nitride having the first insulating film, the second insulating film, and the third insulating film; Detailed effects will be described in the examples. [Brief explanation of the drawings]
[0016] [Figure 1] 1 is a schematic cross-sectional view of a main part of a semiconductor device 1. FIG. [Figure 2] 3 is a flowchart showing a method for manufacturing the semiconductor device 1. DETAILED DESCRIPTION OF THE INVENTION
[0017] (Structure of semiconductor device 1) 1 is a schematic cross-sectional view of a main portion of a semiconductor device 1 according to this embodiment. The semiconductor device 1 is an embodiment of a lateral MOSFET. The semiconductor device 1 includes a semiconductor substrate 10, a nitride semiconductor 20, an insulating film 28, a drain electrode 32, a source electrode 34, a body electrode 36, a gate insulating film 40, and a gate electrode 44.
[0018] The semiconductor substrate 10 is a base substrate for the nitride semiconductor 20, and is made of a material having a composition that allows crystal growth of the nitride semiconductor 20. In this embodiment, the semiconductor substrate 10 is a single crystal substrate of gallium nitride (GaN). The nitride semiconductor 20 is provided on the surface of the semiconductor substrate 10. The nitride semiconductor 20 is made of a single crystal of GaN. The nitride semiconductor 20 has a p-type body region 22, an n-type body region 23, and a p-type body region 24. + n-type drain region 25 + The source region 26 has a .beta.-type.
[0019] The body region 22 is a GaN epitaxially grown layer and is provided to separate the drain region 25 and the source region 26. The drain region 25 is provided on the body region 22, is provided in a portion of the surface layer of the nitride semiconductor 20, and is exposed at the surface of the nitride semiconductor 20. The drain region 25 is in ohmic contact with a drain electrode 32 provided on a portion of the surface of the nitride semiconductor 20. The source region 26 is provided on the body region 22, is provided in a portion of the surface layer of the nitride semiconductor 20, and is exposed at the surface of the nitride semiconductor 20. The source region 26 is in ohmic contact with a source electrode 34 provided on a portion of the surface of the nitride semiconductor 20. A portion of the body region 22 is exposed at the surface of the nitride semiconductor 20. The exposed body region 22 is in ohmic contact with a body electrode 36 provided on a portion of the surface of the nitride semiconductor 20. The drain electrode 32, the source electrode 34, and the body electrode 36 are insulated by an insulating film 28.
[0020] The gate insulating film 40 is provided on the surface of the nitride semiconductor 20 so as to face the body region 22 located between the drain region 25 and the source region 26. The gate insulating film 40 is in contact with the surface of the nitride semiconductor 20 (specifically, the body region 22). A gate electrode 44 is disposed on the gate insulating film 40. The gate electrode 44 faces the body region 22 located between the drain region 25 and the source region 26 via the gate insulating film 40. The gate electrode 44 is made of, for example, aluminum.
[0021] The gate insulating film 40 includes a first insulating film 41, a second insulating film 42, and a third insulating film 43. The first insulating film 41 is disposed on the surface of the gallium nitride nitride semiconductor 20. The first insulating film 41 is an insulating film having hexagonal symmetry crystallinity. Specifically, the first insulating film 41 is any one of aluminum nitride (AlN), aluminum silicate (AlSiO), hafnium oxide (HfO), and aluminum oxide (Al2O3).
[0022] The first insulating film 41 is a portion of the gate insulating film 40 that is in contact with the gallium nitride, and has a crystalline structure that mimics the crystalline structure of gallium nitride. Note that the crystalline structure that mimics the crystalline structure of gallium nitride refers to a crystalline structure that is recrystallized and oriented to the atomic arrangement on the surface of single-crystal gallium nitride.
[0023] The thickness of the first insulating film 41 is preferably 3 nm or more. This is because it is believed that the film quality of the region from the interface IF between the first insulating film 41 and gallium nitride to a depth of about 3 nm inside the first insulating film 41 affects the characteristics of the semiconductor device. That is, if the crystallinity of the region of the first insulating film 41 from the interface IF to a depth of about 3 nm inside is low, the carrier mobility will decrease due to defect levels at the interface IF and in the first insulating film 41. Therefore, by setting the thickness of the first insulating film 41 to 3 nm or more and increasing the crystallinity of the first insulating film 41 by heat treatment, which will be described later, it is possible to suppress the decrease in mobility.
[0024] In this embodiment, the first insulating film 41 is made of aluminum silicate (AlSiO). Here, the ratio of silicon atoms to the total of silicon atoms and aluminum atoms is defined as a mixture ratio x Si That is, the mixture ratio x Si is "x Si In this embodiment, the mixture ratio x of the first insulating film 41 is expressed as "x = Si / (Al + Si)". Si was set to 0.22.
[0025] Mixing ratio x of the first insulating film 41 Siis preferably 0.4 or less. The reason for this is explained below. The lower the proportion of silicon in aluminum silicate, the easier it is to crystallize the aluminum silicate by heat treatment. The inventors of the present invention have found that in the film structure of the present specification that includes the first insulating film 41, the second insulating film 42, and the third insulating film 43, the mixing ratio x of the first insulating film 41 is Si It has been found that by making the mixture ratio x 0.4 or less, the polycrystallization of the first insulating film 41 by heat treatment can be promoted. Si The control method will be described later.
[0026] The second insulating film 42 is disposed on the upper surface of the first insulating film 41. The second insulating film 42 is an insulating film that has the function of inhibiting the propagation of gallium nitride crystal information to the third insulating film 43. In other words, the second insulating film 42 is a layer that suppresses the crystallization of the third insulating film 43. Specifically, the second insulating film 42 is an insulating film that can have a stable amorphous structure at high temperatures. The second insulating film 42 can be silicon oxide (SiO2) or silicon nitride (SiN). In this example, the second insulating film 42 was silicon oxide.
[0027] The thickness of the second insulating film 42 is preferably 1 nm or more. This is because the second insulating film 42 becomes thinner due to diffusion caused by heat treatment (step S7) described below. Specifically, the present inventors have found that aluminum in the first insulating film 41 diffuses into the second insulating film 42, and the diffusion length is about 0.9 nm. Therefore, a thickness of 1 nm or more is necessary to maintain the crystallization suppression effect of the second insulating film 42.
[0028] The third insulating film 43 is disposed on the upper surface of the second insulating film 42. The third insulating film 43 is a film thicker than the first insulating film 41 and the second insulating film 42, and constitutes more than half of the thickness of the gate insulating film 40. The material of the third insulating film 43 is aluminum silicate (AlSiO) or hafnium silicate (HfSiO). In this example, the third insulating film 43 is aluminum silicate. The mixing ratio x of the third insulating film 43 is Si was set to 0.22.
[0029] The dielectric constant of the third insulating film 43 is preferably equal to or greater than the dielectric constants of the first insulating film 41 and the second insulating film 42. The dielectric constant decreases as the silicon atoms increase, and increases as the aluminum atoms increase. Therefore, the mixing ratio x of the third insulating film 43 is Si The mixing ratio x of the first insulating film 41 and the second insulating film 42 is Si The following is an explanation of the effects. The higher the dielectric constant of the gate insulating film, the higher the carrier concentration of the inversion layer formed at the interface IF between the gate insulating film 40 and the nitride semiconductor 20 for a given gate voltage, thereby reducing the channel resistance. On the other hand, as the gate insulating film becomes more polycrystalline, defects and impurity segregation at the grain boundaries increase the leakage current and reduce the breakdown voltage. Furthermore, the more aluminum atoms in the gate insulating film, the higher the dielectric constant and the more easily polycrystallization occurs through heat treatment. On the other hand, with the technology of this embodiment, the second insulating film 42 can suppress the polycrystallization of the third insulating film 43. Therefore, by selectively increasing the aluminum atoms in the third insulating film 43, it is possible to achieve both a high dielectric constant for the gate insulating film and suppression of the leakage current.
[0030] (Method of manufacturing semiconductor device 1) A method for manufacturing the semiconductor device 1 will be described with reference to Fig. 2. A nitride semiconductor formation step is performed in step S1 of the flowchart in Fig. 2. Specifically, a semiconductor substrate 10, which is a single crystal substrate of GaN, is prepared, and a nitride semiconductor 20 is grown on the semiconductor substrate 10 by using a well-known metal organic chemical vapor deposition (MOCVD) method.
[0031] In step S2, a drain region 25 and a source region 26 are formed in the nitride semiconductor 20. Specifically, a mask having openings for the drain region 25 and the source region 26 is formed on the nitride semiconductor 20 using well-known photolithography and dry etching. Next, Si ions are implanted through the mask. Next, the nitride semiconductor 20 is heat-treated. As a result, the Si ions implanted in the nitride semiconductor 20 are activated, and the drain region 25 and the source region 26 are formed.
[0032] In step S3, a surface cleaning process is performed to remove a contaminated layer caused by impurities attached to the surface of the nitride semiconductor 20, a damaged layer caused by processing, and an oxide layer (GaO). In the surface cleaning process, sulfuric acid, ammonia water, a mixture of hydrochloric acid and hydrogen peroxide water, as well as dilute hydrofluoric acid (DHF) are used.
[0033] In step S4, a first insulating film 41 having an amorphous structure is formed on the nitride semiconductor 20. The first insulating film 41 is formed using plasma-enhanced atomic layer deposition (ALD). Specifically, to form an aluminum silicate film using the ALD method, a first film formation step for forming an Al2O3 layer and a second film formation step for forming a SiO2 layer are alternately performed. The first film formation step uses trimethylaluminum (TMAl) as the Al source and oxygen radicals as the oxygen source. One cycle of the first film formation step is performed by oxidizing the adsorbed Al, forming a monomolecular layer of Al2O3. The second film formation step uses trisdimethylaminosilane (TDMAS) as the Si source and oxygen radicals as the oxygen source. One cycle of the second film formation step is performed by oxidizing the adsorbed Si, forming a monomolecular layer of SiO2. The ALD method is well known, so a detailed description is omitted.
[0034] Aluminum silicate mixing ratio x Sican be adjusted by the ratio of the number of cycles in the first film formation step to the number of cycles in the second film formation step. For example, when the number of cycles in the first and second film formation steps is both "1", the mixing ratio x Si The mixing ratio x is approximately 0.33. Si In order to reduce the ratio, the number of cycles in the first film formation step should be set to be greater than the number of cycles in the second film formation step. In this example, the first insulating film 41 is made of aluminum silicate with a thickness of 3 nm, and the mixture ratio x Si is 0.22.
[0035] In step S5, a second insulating film 42 having an amorphous structure is formed on the upper surface of the first insulating film 41. The second insulating film 42 can be formed continuously with the first insulating film 41 by the ALD method. In this example, the second insulating film 42 is silicon oxide and has a thickness of 1.5 nm.
[0036] In step S6, a third insulating film 43 having an amorphous structure is formed on the upper surface of the second insulating film 42. The third insulating film 43 can be formed continuously with the second insulating film 42 by the ALD method. In this example, the third insulating film 43 is made of aluminum silicate with a thickness of 40 nm and a mixture ratio x Si is 0.22.
[0037] In step S7, the nitride semiconductor 20 including the first insulating film 41, the second insulating film 42, and the third insulating film 43 is subjected to a heat treatment. The heat treatment is performed at 950°C for 10 minutes in a nitrogen atmosphere. As a result, the first insulating film 41, which is part of the gate insulating film 40 and in contact with the nitride semiconductor 20, changes from an amorphous structure to a polycrystalline structure. This occurs because the portion of the first insulating film 41 in contact with the gallium nitride recrystallizes along the surface of the single-crystal gallium nitride. Meanwhile, the third insulating film 43 is separated from the first insulating film 41 by the second insulating film 42. The second insulating film 42 can suppress the propagation of crystalline information to the third insulating film 43. As a result, the third insulating film 43 maintains a state close to an amorphous structure. This occurs because the second insulating film 42 blocks recrystallization that has progressed from the interface IF between the gallium nitride and the first insulating film 41.
[0038] After the heat treatment, the crystallinity of the first insulating film 41 can be made higher than that of the third insulating film 43. Here, "high crystallinity" means that the amorphous structure of the oxide has been recrystallized. In other words, the first insulating film 41 has a larger polycrystalline structure than the third insulating film 43.
[0039] In step S8, a gate electrode 44 is formed on the gate insulating film 40. Specifically, an Al layer is deposited on the nitride semiconductor 20. Next, the Al layer formed in the region other than the gate insulating film 40 is removed using well-known photolithography and etching techniques.
[0040] In step S9, the drain electrode 32, source electrode 34, and body electrode 36 are formed on the nitride semiconductor 20. Specifically, using well-known photolithography and etching, the gate insulating film 40 is removed from the areas where the drain electrode 32, source electrode 34, and body electrode 36 are to be formed. A stacked film of a Ti layer and an Al layer is formed, and using well-known photolithography and etching, the stacked film is processed into the drain electrode 32, source electrode 34, and body electrode 36. This completes the semiconductor device 1 shown in FIG. 1 .
[0041] (effect) In the technology of the present specification, the second insulating film 42 can inhibit the propagation of gallium nitride crystal information from the first insulating film 41 to the third insulating film 43. Crystallization of the first insulating film 41 begins with the surface of the nitride semiconductor 20 as a seed crystal, but the second insulating film 42 suppresses the upward crystal growth, which is thought to facilitate the lateral expansion of the crystal. This promotes crystallization of the first insulating film 41 and reduces defect levels at the interface IF and the first insulating film 41, thereby suppressing a decrease in mobility due to capture and scattering of conduction carriers traveling through the channel. Furthermore, by preventing the third insulating film 43 from becoming polycrystallized, the third insulating film 43 can be maintained in a near-amorphous state. Since defects and impurity segregation at the grain boundaries can be suppressed, leakage current and a decrease in breakdown voltage can be prevented. This allows for both improved reliability and improved carrier mobility of the gate insulating film.
[0042] (Experimental example) As a sample of this embodiment, the first insulating film 41 is made of aluminum silicate (mixing ratio x Si The second insulating film 42 was made of silicon oxide with a thickness of 1.5 nm. The third insulating film 43 was made of aluminum silicate with a thickness of 40 nm (mixing ratio x Si As a comparative example, a 40 nm thick aluminum silicate (mixing ratio x Si A single layer of SiO 2 (=0.22) was formed on the gallium nitride surface. Both samples were subjected to a heat treatment at 950°C for 10 minutes in a nitrogen atmosphere. The crystallinity of both samples was compared using cross-sectional TEM. In the sample of this example, the first insulating film 41 was uniformly crystallized, while the layer above the second insulating film 42 had low crystallinity and a structure close to amorphous. On the other hand, in the sample of the comparative example, it was confirmed that non-uniform polycrystals were formed within a range of approximately 15 nm from the gallium nitride interface.
[0043] Although specific examples of the present invention have been described in detail above, these are merely examples and do not limit the scope of the claims. The technology described in the claims includes various modifications and variations of the specific examples exemplified above. Furthermore, the technical elements described in this specification or drawings exhibit technical utility alone or in various combinations, and are not limited to the combinations described in the claims at the time of filing. Furthermore, the technology exemplified in this specification or drawings can achieve multiple objectives simultaneously, and achieving one of these objectives itself has technical utility.
[0044] (Variation) Various combinations of materials may be used for the first insulating film 41, the second insulating film 42, and the third insulating film 43. For example, the first insulating film 41 may be aluminum nitride, the second insulating film 42 may be silicon oxide, and the third insulating film 43 may be aluminum silicate. Even in this configuration, the aluminum nitride of the first insulating film 41 can be crystallized while the third insulating film 43 is maintained in a nearly amorphous state.
[0045] The method for forming the first insulating film 41, the second insulating film 42, and the third insulating film 43 is not limited to ALD. Any method may be used as long as it can form the film while suppressing oxidation of the surface of gallium nitride. For example, known methods such as remote plasma CVD and sputtering, which can suppress surface damage, may be used.
[0046] The gate insulating film 40 disclosed in this specification can be used in various semiconductor devices, such as a trench gate vertical MOSFET, a normally-off HEMT, and a normally-on HEMT.
[0047] Aspects of the present technology are listed below. [Aspect 1] A semiconductor device having a gate insulating film provided on a single crystal gallium nitride, The gate insulating film is a first insulating film disposed on a surface of the gallium nitride and having hexagonal symmetry crystallinity; a second insulating film disposed on an upper surface of the first insulating film and having a function of inhibiting propagation of crystalline information of the gallium nitride; a third insulating film disposed on an upper surface of the second insulating film and having a dielectric constant equal to or greater than the dielectric constants of the first insulating film and the second insulating film; It is equipped with The semiconductor device, wherein the first insulating film has higher crystallinity than the third insulating film. [Aspect 2] 2. The semiconductor device according to aspect 1, wherein the first insulating film is crystallized and oriented toward the gallium nitride. [Aspect 3] 3. The semiconductor device according to aspect 1 or 2, wherein the first insulating film is made of any one of aluminum nitride, aluminum silicate, hafnium oxide, and aluminum oxide. [Aspect 4] 4. The semiconductor device according to any one of aspects 1 to 3, wherein the second insulating film is made of silicon oxide or silicon nitride. [Aspect 5] 5. The semiconductor device according to any one of aspects 1 to 4, wherein the third insulating film is made of aluminum silicate or hafnium silicate. [Aspect 6] 3. The semiconductor device according to claim 1, wherein the first insulating film is aluminum silicate, the second insulating film is silicon oxide, and the third insulating film is aluminum silicate. [Aspect 7] 3. The semiconductor device according to aspect 1 or 2, wherein the first insulating film is aluminum nitride, the second insulating film is silicon oxide, and the third insulating film is aluminum silicate. [Aspect 8] 8. The semiconductor device according to any one of aspects 1 to 7, wherein the first insulating film has a thickness of 3 nm or more. [Aspect 9] 9. The semiconductor device according to any one of aspects 1 to 8, wherein the second insulating film has a thickness of 1 nm or more. [Aspect 10] disposing a first insulating film having hexagonal symmetry crystallinity on a surface of the single-crystal gallium nitride; disposing a second insulating film on an upper surface of the first insulating film, the second insulating film having a function of inhibiting propagation of crystalline information of the gallium nitride; disposing a third insulating film on an upper surface of the second insulating film, the third insulating film having a dielectric constant equal to or higher than the dielectric constants of the first insulating film and the second insulating film; heat-treating the gallium nitride having the first insulating film, the second insulating film, and the third insulating film; A method for manufacturing a semiconductor device, comprising: [Explanation of symbols]
[0048] 1: Semiconductor device 10: Semiconductor substrate 20: Nitride semiconductor 22: Body region 25: Drain region 26: Source region 28: Insulating film 32: Drain electrode 34: Source electrode 36: Body electrode 40: Gate insulating film 41: First insulating film 42: Second insulating film 43: Third insulating film 44: Gate electrode
Claims
1. A semiconductor device having a gate insulating film provided on a single crystal gallium nitride, The gate insulating film is a first insulating film disposed on a surface of the gallium nitride and having hexagonal symmetry crystallinity; a second insulating film disposed on an upper surface of the first insulating film and having a function of inhibiting propagation of crystalline information of the gallium nitride; a third insulating film disposed on an upper surface of the second insulating film and having a dielectric constant equal to or greater than the dielectric constants of the first insulating film and the second insulating film; It is equipped with The semiconductor device, wherein the first insulating film has higher crystallinity than the third insulating film.
2. 2. The semiconductor device according to claim 1, wherein said first insulating film is crystallized with an orientation to said gallium nitride.
3. 2. The semiconductor device according to claim 1, wherein said first insulating film is made of any one of aluminum nitride, aluminum silicate, hafnium oxide, and aluminum oxide.
4. 4. The semiconductor device according to claim 3, wherein said second insulating film is made of silicon oxide or silicon nitride.
5. 5. The semiconductor device according to claim 4, wherein said third insulating film is made of aluminum silicate or hafnium silicate.
6. 2. The semiconductor device according to claim 1, wherein said first insulating film is made of aluminum silicate, said second insulating film is made of silicon oxide, and said third insulating film is made of aluminum silicate.
7. 2. The semiconductor device according to claim 1, wherein said first insulating film is made of aluminum nitride, said second insulating film is made of silicon oxide, and said third insulating film is made of aluminum silicate.
8. 2. The semiconductor device according to claim 1, wherein the first insulating film has a thickness of 3 nm or more.
9. 2. The semiconductor device according to claim 1, wherein the second insulating film has a thickness of 1 nm or more.
10. disposing a first insulating film having hexagonal symmetry crystallinity on a surface of the single-crystal gallium nitride; disposing a second insulating film on an upper surface of the first insulating film, the second insulating film having a function of inhibiting propagation of crystalline information of the gallium nitride; disposing a third insulating film on an upper surface of the second insulating film, the third insulating film having a dielectric constant equal to or higher than the dielectric constants of the first insulating film and the second insulating film; heat-treating the gallium nitride having the first insulating film, the second insulating film, and the third insulating film; A method for manufacturing a semiconductor device, comprising:
Citation Information
Patent Citations
Semiconductor device
JP2017059599A
Semiconductor device and manufacturing method of semiconductor device
JP2019134164A
Semiconductor device and method of manufacturing the same
JP2020126892A
Semiconductor device and manufacturing method, and field effect transistor
JP2021136358A
Electrode structure, semiconductor device using electrode structure, and method for manufacturing electrode structure
JP6707995B2