Manufacturing method for solid electrolytic capacitors

By forming anode through-holes and using compression molding to seal the laminate with insulating resin, the method addresses incomplete resin coverage and warping issues, resulting in a highly reliable solid electrolytic capacitor.

JP7750382B2Active Publication Date: 2025-10-07MURATA MFG CO LTD
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Patent Information

Application Number
JP2024504717
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Priority Date
2023-01-16
Filing Date
2023-03-01
Publication Date
2025-10-07
Estimated Expiration
2043-03-01

AI Technical Summary

Technical Problem

Existing methods for manufacturing solid electrolytic capacitors often fail to properly cover the entire periphery of the element stack with insulating resin in a single molding step, leading to issues like warping due to differences in linear expansion coefficients between substrate and device stack materials, reducing reliability.

Method used

A method involving the formation of anode through-holes in flat-film capacitor elements, alternately stacking elements with conductive adhesive layers, and sealing the laminate with insulating resin using compression molding, ensuring complete resin coverage by allowing resin to flow through these holes.

Benefits of technology

This approach ensures complete resin coverage of the laminate in a single molding process, preventing warping and enhancing the reliability of the solid electrolytic capacitor.

✦ Generated by Eureka AI based on patent content.

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Patent Text Reader

Abstract

According to the present invention, a through-hole for a positive electrode is formed so as to penetrate a flat film-type capacitor element in the thickness direction. A plurality of flat film-type capacitor elements are stacked in a position such that the through-holes for the positive electrode overlap. Compression molding is performed, in which an insulating resin having fluidity and the sheet stack are disposed between an upper die and a lower die, the upper die and the lower die are fitted together, and heat and pressure are applied. The distance between the upper die and the lower die when the upper die and the lower die are fitted together is greater than the thickness of the sheet stack.
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Description

[Technical Field]

[0001] The present invention relates to a solid electrolytic capacitor having a structure in which a laminate of a plurality of capacitor elements is molded with an insulating resin. [Background technology]

[0002] Patent Document 1 describes a method for manufacturing a solid electrolytic capacitor and a solid electrolytic capacitor. The solid electrolytic capacitor described in Patent Document 1 includes a plurality of flat-film capacitor elements and a plurality of metal foils (cathodes). The flat-film capacitor elements include a foil-like valve metal substrate, a porous portion of the valve metal substrate and a dielectric layer formed on the surface thereof, and a solid electrolyte layer formed on the surface of the dielectric layer.

[0003] The flat film capacitor elements and the metal foils are alternately stacked to form an element stack, which is then sealed with an insulating resin. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Publication No. 2019-79866 Summary of the Invention [Problem to be solved by the invention]

[0005] However, in the method of manufacturing a solid electrolytic capacitor as exemplified in Patent Document 1, there are cases where it is not possible to properly cover the entire periphery of the element stack with insulating resin in a single molding step.

[0006] To solve this problem, one method is to seal the device stack by attaching a substrate to one main surface (e.g., the bottom surface) of the device stack. However, in this case, since the substrate and the device stack are made of different materials, differences in the linear expansion coefficients between the two can cause problems such as warping, leading to reduced reliability.

[0007] SUMMARY OF THE INVENTION It is therefore an object of the present invention to provide a method for manufacturing a solid electrolytic capacitor that can properly cover the entire periphery of an element stack with insulating resin in a single molding operation, thereby realizing high reliability. [Means for solving the problem]

[0008] The method for manufacturing a solid electrolytic capacitor of the present invention includes the steps of: forming a plurality of flat-film capacitor elements by sequentially forming a dielectric layer and a solid electrolyte layer on the surface of a flat-film anode electrode foil; forming a sheet laminate by alternately stacking the plurality of flat-film capacitor elements with conductive adhesive layers or solid electrolyte layers interposed therebetween; and sealing the sheet laminate with an insulating resin.

[0009] The step of forming the flat film capacitor element includes the step of forming an anode through-hole that penetrates the flat film capacitor element in the thickness direction.

[0010] In the step of forming the sheet laminate, a plurality of flat film capacitor elements are laminated at positions where the anode through holes formed in each of the plurality of flat film capacitor elements overlap each other.

[0011] The process of sealing with insulating resin involves placing the flowable insulating resin and the sheet laminate between an upper mold and a lower mold, fitting the upper mold and the lower mold together, and performing compression molding by applying heat and pressure. When the upper mold and the lower mold are fitted together, the distance between the upper mold and the lower mold is greater than the thickness of the sheet laminate.

[0012] As a result, the anode through-holes form through-holes that penetrate the top and bottom surfaces of the sheet laminate. The fluid insulating resin then flows through the through-holes, not only onto the outer surface of the sheet laminate, but also from the bottom surface of the sheet laminate to the top surface of the sheet laminate. Therefore, the entire surface of the sheet laminate is properly covered with insulating resin in a single molding process. Furthermore, because the top and bottom surfaces of the sheet laminate are covered with insulating resin made of the same material, warping and other defects are suppressed. [Effects of the Invention]

[0013] According to this invention, the entire periphery of the sheet laminate (element laminate) can be properly covered with the same insulating resin material in a single molding process, so that a highly reliable solid electrolytic capacitor can be manufactured. [Brief explanation of the drawings]

[0014] [Figure 1] FIG. 1 is a side cross-sectional view showing the configuration of the solid electrolytic capacitor according to the first embodiment. [Figure 2] Figures 2(A) and 2(B) are side cross-sectional views showing the configuration of a set of a capacitor element and a cathode electrode before singulation, Figure 2(C) is a side cross-sectional view showing the configuration of a capacitor element before singulation, and Figure 2(D) is a side cross-sectional view showing the configuration of a set of a capacitor element and a cathode electrode after singulation. [Figure 3] FIG. 3 is a flowchart showing an example of a schematic flow of the method for manufacturing the solid electrolytic capacitor according to this embodiment. [Figure 4] FIG. 4 is a flowchart showing an example of a process for forming a capacitor element sheet. [Figure 5] FIG. 5(A) is an external perspective view showing the shapes of the anode electrode and dielectric layer of the capacitor element before singulation, and FIG. 5(B) is an external perspective view showing the shape of the capacitor element before singulation. [Figure 6] FIG. 6 is an external view of the multi-state device. [Figure 7] FIG. 7 is an external perspective view showing the shape of the cathode electrode before being divided into individual pieces. [Figure 8] FIG. 8 is a flowchart showing an example of a process for forming a sheet stack. [Figure 9] 9(A) and 9(B) are external perspective views showing a state in which adhesive dams are formed on the capacitor element sheet. [Figure 10] 10(A) and 10(B) are external perspective views showing a state in which adhesive dams and adhesives are formed on the capacitor element sheet. [Figure 11]FIG. 11 is an exploded perspective view showing a state in which the capacitor element sheet and the cathode electrode sheet are laminated together. [Figure 12] Figure 12(A) is an exploded perspective view showing the stacked state of capacitor element sheets and cathode electrode sheets in a multi-state, and Figure 12(B) is an external perspective view showing the stacked state of capacitor element sheets and cathode electrode sheets in a multi-state. [Figure 13] FIG. 13 is a plan view showing a state in which the capacitor element sheet and the cathode electrode sheet are laminated. [Figure 14] FIG. 14 is a flowchart showing an example of a sealing process using an insulating resin. [Figure 15] 15(A), 15(B), 15(C), and 15(D) are four-sided views of the sealing jig. [Figure 16] FIG. 16(A) is a cross-sectional view showing one state during sealing, and FIG. 16(B) is a plan view showing the state of FIG. 16(A) with the mold and the sheet laminate removed. [Figure 17] FIG. 17 is a cross-sectional view showing the sealed state. [Figure 18] Figures 18(A) and 18(B) are side cross-sectional views showing the configuration of a set of a capacitor element and a cathode electrode before singulation in the second embodiment, Figure 18(C) is a side cross-sectional view showing the configuration of a capacitor element before singulation, and Figure 18(D) is a side cross-sectional view showing the configuration of a set of a capacitor element and a cathode electrode after singulation. [Figure 19] 19(A) and 19(B) are exploded perspective views showing a state in which a capacitor element sheet and a cathode electrode sheet according to the second embodiment are laminated together. DETAILED DESCRIPTION OF THE INVENTION

[0015] [First embodiment] A method for manufacturing a solid electrolytic capacitor according to a first embodiment of the present invention and a solid electrolytic capacitor manufactured by this manufacturing method will be described with reference to the drawings.

[0016] (Explanation of the Schematic Configuration of Solid Electrolytic Capacitor 1) First, the structure of a solid electrolytic capacitor manufactured by a method for manufacturing a solid electrolytic capacitor according to an embodiment of the present invention will be described. FIG. 1 is a side cross-sectional view showing the configuration of a solid electrolytic capacitor according to a first embodiment. Note that in FIG. 1, only the insulating resin and external electrodes are hatched for clarity. FIGS. 2(A) and 2(B) are side cross-sectional views showing the configuration of a set of capacitor elements and cathode electrodes before singulation. FIG. 2(A) is a cross-sectional view taken along a plane not intersecting the through-holes, and FIG. 2(B) is a cross-sectional view taken along a plane intersecting the through-holes. FIG. 2(C) is a side cross-sectional view showing the configuration of a capacitor element before singulation. FIG. 2(C) is a cross-sectional view taken along a plane not intersecting the through-holes. FIG. 2(D) is a side cross-sectional view showing the configuration of a set of capacitor elements and cathode electrodes after singulation.

[0017] As shown in Figures 1, 2(A), 2(B), 2(C), and 2(D), the solid electrolytic capacitor 1 includes a capacitor element laminate 100, an insulating resin 50, an external electrode 61, and an external electrode 62. The capacitor element laminate 100 includes a plurality of flat-film capacitor elements 10, a plurality of flat-film cathode electrodes 20, an adhesive dam 30, and an adhesive 40. Note that in Figure 1, the number of flat-film capacitor elements 10 and the number of cathode electrodes are four, but this is not limited to four. The side cross-sectional views in Figures 1, 2(A), 2(B), 2(C), and 2(D) are cross-sectional views taken along a plane perpendicular to the top surface 101 and bottom surface 102 of the capacitor element laminate 100 in Figure 1.

[0018] As shown in FIG. 2(C), the capacitor element 10 includes a flat film-like anode electrode 11, a dielectric layer 12, and a CP layer (solid electrolyte layer) 13.

[0019] Although detailed structural details are omitted in FIG. 2, the anode electrode 11 has numerous pores. In other words, the anode electrode 11 is porous (a porous body). The thickness ratio of the porous portion on one side of the anode electrode 11 to the core metal portion and the porous portion on the other side is approximately 1:1:1. A dielectric layer 12 covers the outer surface of the anode electrode 11. Because detailed structural details of the anode electrode 11 are omitted in FIG. 2, the dielectric layer 12 is illustrated as if it were covering the macroscopic surface of the anode electrode 11. In reality, the dielectric layer 12 covers not only the macroscopic surface of the anode electrode 11 but also the inner surfaces of the numerous pores in the anode electrode 11.

[0020] The CP layer 13 covers the surface of the dielectric layer 12. A frame-shaped CP dam 14 is formed on the outer periphery of the CP layer 13. The CP dam 14 has insulating properties. The CP dam 14 limits the area in which the CP layer 13 is formed.

[0021] The CP layer 13 has a laminated structure of an inner layer CP (inner layer solid electrolyte layer) 131 and an outer layer CP (outer layer solid electrolyte layer) 132. The inner layer CP131 is formed on the surface of the dielectric layer 12, and the outer layer CP132 is formed on the surface of the inner layer CP131.

[0022] The plurality of capacitor elements 10 and the plurality of cathode electrodes 20 are alternately stacked so that their flat film surfaces are parallel to each other and overlap each other in plan view.

[0023] An adhesive dam 30 and an adhesive 40 are disposed between adjacent capacitor elements 10 and cathode electrodes 20. Adhesive dam 30 is insulating, while adhesive 40 is conductive.

[0024] Adhesive dam 30 is frame-shaped. Adhesive 40 is disposed inside the frame defined by adhesive dam 30. Adjacent capacitor elements 10 and cathode electrodes 20 are adhered and electrically connected by adhesive 40.

[0025] In this stacked state, the first ends 10E1 (see FIG. 2(D)) of the plurality of capacitor elements 10 are located at approximately the same position in side view. Similarly, the second ends 10E2 (see FIG. 2(D)) of the plurality of capacitor elements 10 are located at approximately the same position in side view. Furthermore, the first ends 20E1 (see FIG. 2(D)) of the plurality of cathode electrodes 20 are located at approximately the same position in side view. Similarly, the second ends 20E2 (see FIG. 2(D)) of the plurality of cathode electrodes 20 are located at approximately the same position in side view.

[0026] The first ends 10E1 of the plurality of capacitor elements 10 and the second ends 20E2 of the plurality of cathode electrodes 20 are arranged on the first end side of the capacitor element stack 100. The first ends 10E1 of the plurality of capacitor elements 10 protrude outward beyond the second ends 20E2 of the plurality of cathode electrodes 20.

[0027] The second ends 10E2 of the plurality of capacitor elements 10 and the first ends 20E1 of the plurality of cathode electrodes 20 are arranged on the second end side of the capacitor element stack 100. The first ends 20E1 of the plurality of cathode electrodes 20 protrude outward beyond the second ends 10E2 of the plurality of capacitor elements 10.

[0028] With this structure, capacitor element stack 100 is realized, which has top surface 101 and bottom surface 102 at both ends in the stacking direction of multiple capacitor elements 10 and multiple cathode electrodes 20.

[0029] The capacitor element stack 100 is sealed with insulating resin 50. More specifically, the insulating resin 50 covers the capacitor element stack 100 except for first ends 10E1 of the plurality of capacitor elements 10 (first ends 10E1 of the anode electrodes 11) and first ends 20E1 of the plurality of cathode electrodes 20.

[0030] The external electrode 61 covers a first end of the insulating resin 50 (first ends 10E1 of the anode electrodes 11). The external electrode 61 is connected to the first ends 10E1 of the anode electrodes 11 of the plurality of capacitor elements 10. The external electrode 62 covers a second end of the insulating resin 50 (first ends 20E1 of the cathode electrodes 20). The external electrode 62 is connected to the first ends 20E1 of the plurality of cathode electrodes 20.

[0031] The solid electrolytic capacitor 1 is realized by the above configuration.

[0032] (Method of manufacturing solid electrolytic capacitor 1) The solid electrolytic capacitor 1 having the above-described configuration is manufactured, for example, as follows: Fig. 3 is a flowchart showing an example of a schematic flow of the method for manufacturing the solid electrolytic capacitor according to this embodiment.

[0033] A capacitor element sheet is formed (FIG. 3: S11). A plurality of capacitor elements 10, each forming a different solid electrolytic capacitor 1, are formed in an array on the capacitor element sheet.

[0034] Next, the capacitor element sheet and the cathode electrode sheet are laminated to form a sheet laminate (FIG. 3: S12). The cathode electrode sheet has a plurality of cathode electrodes 20 formed in an array, each forming a different solid electrolytic capacitor 1. This forms a structure in which a plurality of capacitor element laminates 100 are arranged in a plane. In other words, the sheet laminate is a structure in which a plurality of capacitor element laminates 100 are arranged in a plane.

[0035] Next, the sheet stack is sealed with insulating resin 50 (FIG. 3: S13). As will be described in detail later, at this time, through holes that penetrate from the top surface to the bottom surface of the sheet stack are provided in the sheet stack, and resin sealing is performed by compression molding.

[0036] The process up to this sealing with insulating resin 50 is carried out in a multi-state (state in which a plurality of what will become solid electrolytic capacitors 1 are arranged) before the solid electrolytic capacitor 1 is divided into individual pieces.

[0037] Next, the sheet laminate sealed with insulating resin 50 is cut into individual pieces (FIG. 3: S14). Specifically, cutting is performed along cutting lines E11, E12, S11, and S12 shown in FIG. 11(B), which will be described later. This results in multiple solid electrolytic capacitors 1 (referred to as "solid electrolytic capacitor 1 bodies") without external electrodes formed thereon. Thereafter, the solid electrolytic capacitor 1 bodies are secondary sealed with insulating resin 50. More specifically, the side surfaces of the solid electrolytic capacitor 1 bodies (surfaces cut along cutting lines S11 and S12 (top surface, bottom surface, and side surfaces other than the end surfaces where the anode electrode 11 and cathode electrode 20 are exposed)) are covered with the secondary sealing of insulating resin 50. This allows the anode electrode 11 and cathode electrode 20, which would otherwise be unnecessarily exposed during singulation, to be covered with insulating resin 50.

[0038] Next, external electrodes 61 and 62 are formed on the end faces of the element body of solid electrolytic capacitor 1 (FIG. 3: S15).

[0039] Next, each step will be described in more detail.

[0040] (Capacitor element sheet forming process) Fig. 4 is a flowchart showing an example of a process for forming a capacitor element sheet. Fig. 5(A) is an external perspective view showing the shapes of the anode electrode and dielectric layer of the capacitor element before singulation, and Fig. 5(B) is an external perspective view showing the shape of the capacitor element before singulation. Fig. 6 is an external view in a multi-layer state.

[0041] Anode 11 is subjected to chemical conversion treatment to form dielectric layer 12 (FIG. 4: S111). At this time, a large number of holes are formed on the surface of anode 11 by etching, and the area near the surface of anode 11 is porous. Dielectric layer 12 covers the surface of anode 11, including the inner surfaces of the holes.

[0042] Next, anode through holes are formed in the anode electrode 11 (FIG. 4: S112). More specifically, as shown in FIG. 5(A), a plurality of cylindrical anode through holes 19C and groove-shaped anode through holes 19L are formed in the anode electrode 11. The cylindrical anode through holes 19C and the groove-shaped anode through holes 19L are alternately arranged along the direction in which the portions that will become the anode electrodes 11 are arranged. The cylindrical anode through holes 19C are formed at positions that will form first ends 10E1 of the anode electrodes 11, and the groove-shaped anode through holes 19L are formed at positions that straddle the portions that will become adjacent anode electrodes 11 and at positions that will form second ends 10E2 of the adjacent anode electrodes 11.

[0043] Next, a CP layer (solid electrolyte layer) 13 is formed on the surface of the dielectric layer 12 (FIG. 4: S113). More specifically, as shown in FIG. 5(B), a CP dam 14 having a frame-shaped opening is formed. Then, a CP layer 13 (a laminated structure of an inner layer CP131 and an outer layer CP132) is formed in the opening of the CP dam 14. At this time, a plurality of cylindrical anode through-holes 19C and CP dam through-holes 149 communicating with the groove-shaped anode through-holes 19L are formed in the CP dam 14.

[0044] As shown in FIG. 6, this structure is implemented in a multi-state in which a plurality of capacitor elements 10 (a structure consisting of anode electrodes 11, dielectric layers 12, CP layers 13, and CP dams 14) are arranged two-dimensionally.

[0045] (Cathode electrode sheet forming process) FIG. 7 is an external perspective view showing the shape of the cathode electrode before being divided into individual pieces.

[0046] 7 , a plurality of cylindrical cathode through holes 29C and groove-shaped cathode through holes 29L are formed in the cathode electrode 20. The cylindrical cathode through holes 29C and the groove-shaped cathode through holes 29L are alternately arranged along the direction in which the portions that will become the cathode electrodes 20 are arranged. The cylindrical cathode through holes 29C are formed at positions that will form first ends 20E1 of the cathode electrodes 20, and the groove-shaped cathode through holes 29L are formed at positions that straddle the portions that will become adjacent cathode electrodes 20 and at positions that will form second ends 20E2 of the adjacent cathode electrodes 20.

[0047] (Sheet laminate formation process) FIG. 8 is a flowchart showing an example of a process for forming a sheet laminate. FIG. 9 is an external perspective view showing a state in which adhesive dams have been formed on capacitor element sheets, with FIG. 9(A) showing the multi-layer state and FIG. 9(B) showing the portion of a single capacitor element. FIG. 10 is an external perspective view showing a state in which adhesive dams and adhesive have been formed on capacitor element sheets, with FIG. 10(A) showing the multi-layer state and FIG. 10(B) showing the portion of a single capacitor element. FIG. 11 is an exploded perspective view showing a state in which capacitor element sheets and cathode electrode sheets are laminated. FIG. 11 shows the portion corresponding to one solid electrolytic capacitor. FIG. 12(A) is an exploded perspective view showing the laminated state of capacitor element sheets and cathode electrode sheets in the multi-layer state, and FIG. 12(B) is an external perspective view showing the laminated state of capacitor element sheets and cathode electrode sheets in the multi-layer state. FIG. 13 is a plan view showing the laminated state of capacitor element sheets and cathode electrode sheets. FIG. 13 shows the portion corresponding to one solid electrolytic capacitor.

[0048] An adhesive dam 30 is formed on the capacitor element sheet (FIG. 8: S121). More specifically, as shown in FIGS. 9(A) and 9(B), an adhesive dam 30 having a frame-shaped opening is formed. The adhesive dam 30 is formed in a position that overlaps the CP dam 14. At this time, an adhesive dam through-hole 39 that communicates with the CP dam through-hole 149 is formed in the adhesive dam 30.

[0049] Next, as shown in FIGS. 10(A) and 10(B), adhesive 40 is placed in the opening of adhesive dam 30 (FIG. 8: S122).

[0050] Next, as shown in Figures 11(A), 11(B), 12(A), and 12(B), capacitor element sheets and cathode electrode sheets are alternately stacked (Figure 8: S123). More specifically, the capacitor element sheets and cathode electrode sheets are stacked so as to satisfy the following conditions:

[0051] When viewed in the stacking direction, the plurality of cylindrical anode through holes 19C in the capacitor element sheet and the groove-shaped cathode through holes 29L in the cathode electrode sheet overlap (see FIG. 13). When viewed in the stacking direction, the groove-shaped anode through-holes 19L in the capacitor element sheet and the plurality of cylindrical cathode through-holes 29C in the cathode electrode sheet overlap each other (see FIG. 13). When viewed in the stacking direction, the groove-shaped anode through-hole 19L in the capacitor element sheet and the groove-shaped cathode through-hole 29L in the cathode electrode sheet overlap each other (see FIG. 13). With this configuration, through holes 591 are formed, including multiple layers of anode through holes 19C and multiple layers of cathode through holes 29L (see FIG. 1). More specifically, through holes 591 include multiple layers of CP dam through holes 149 and multiple layers of adhesive dam through holes 39, and penetrate the upper and lower surfaces of the sheet laminate.

[0052] Also, through holes 592 are formed, including multiple layers of anode through holes 19L and multiple layers of cathode through holes 29C (see FIG. 1). More specifically, the through holes 592 include multiple layers of CP dam through holes 149 and multiple layers of adhesive dam through holes 39, and penetrate the upper and lower surfaces of the sheet laminate.

[0053] Furthermore, similar to the through holes 591 and 592, the sheet laminate is formed with through holes including multiple layers of anode through holes 19L and multiple layers of cathode through holes 29C, and through holes including multiple layers of anode through holes 19C and multiple layers of cathode through holes 29L.

[0054] A plurality of these through holes are formed in accordance with the number of capacitor elements arranged in the sheet laminate.

[0055] Therefore, a plurality of through holes are formed in the sheet stack, penetrating from the upper surface to the lower surface of the sheet stack.

[0056] Next, the sheet laminate is heated and pressurized (FIG. 8: S124), whereby the capacitor element sheets and the cathode electrode sheets are bonded together by the adhesive 40, forming a sheet laminate.

[0057] (Sealing process using insulating resin) Fig. 14 is a flowchart showing an example of a sealing process using an insulating resin. Fig. 15 is a four-sided view of a sealing jig, with Fig. 15(A) being a plan view, Figs. 15(B) and 15(C) being side views, and Fig. 15(D) being a cross-sectional view. Fig. 15(D) shows a cross-section taken along line AA in Fig. 15(A). Fig. 16(A) is a cross-sectional view showing one state during sealing, and Fig. 16(B) is a plan view of the state of Fig. 16(A) with the mold and sheet laminate removed. Fig. 17 is a cross-sectional view showing the sealed state.

[0058] The sealing process uses a jig 90 as shown in Figures 15(A), 15(B), 15(C), and 15(D). The jig 90 includes a flat substrate 91, an inner frame 92, and an outer frame 93. The jig 90 is formed from a highly rigid metal or the like. The inner frame 92 and the outer frame 93 are rectangular in plan view. The outer frame 93 surrounds the inner frame 92.

[0059] The area (planar area) of the opening 920 surrounded by the inner frame 92 is determined based on the planar area of ​​the sheet stack (the area of ​​the surface perpendicular to the stacking direction). Specifically, it is larger than the planar area of ​​the sheet stack by a predetermined amount. This predetermined area is determined based on the amount of fluid insulating resin 50 to be filled. The amount of fluid insulating resin 50 is sufficient to cover the entire surface of the sheet stack with insulating resin 50 by compression molding performed in the sealing process.

[0060] The height of the outer frame 93 is higher than that of the inner frame 92. The height of the outer frame 93 determines the bottom dead center of the upper mold 992 when the lower mold 991 and the upper mold 992 are fitted together, as will be described later.

[0061] More specifically, the outer frame 93 is larger than the height (length in the stacking direction) of the sheet laminate and is determined based on the thickness of the insulating resin 50 covering the upper and lower surfaces of the sheet laminate. For example, in the cases of Figures 16(A), 16(B), and 17, the height H of the outer frame 93 is larger than the thickness of the sheet laminate. That is, the distance between the upper mold 992 and the lower mold 991 in a state in which the upper mold 992 and the lower mold 991 are fitted together is larger than the thickness of the sheet laminate. More specifically, the height H of the outer frame 93 is determined by the thickness of the sheet laminate plus the height of the spacer 98 (a member that determines the thickness of the insulating resin 50) × 2.

[0062] Using the jig 90 having such a shape, the sealing process is carried out as follows.

[0063] A jig 90 is placed on the upper surface of a lower mold 991 (see FIG. 16(A)). Next, a plurality of spacers 98 are placed in an opening 920 surrounded by an inner frame 92 of the jig 90. The plurality of spacers 98 are solid bodies of the same height. The height of the plurality of spacers 98 is determined based on the thickness of the insulating resin 50 covering the sheet laminate.

[0064] The planar area of ​​the spacers 98 is smaller than the planar area of ​​the sheet laminate. The smaller the planar area of ​​the spacers 98, the better, but it is preferable that the spacers 98 have a strength that can withstand pressure during sealing, for example.

[0065] The spacers 98 are preferably made of the same material as the insulating resin 50. However, the spacers 98 do not have to be made of the same material as the insulating resin 50 as long as the spacers 98 and the insulating resin 50 have substantially the same linear expansion coefficient.

[0066] 16(A) and 16(B), fluid insulating resin 50 is placed in opening 920 surrounded by inner frame 92 of jig 90 (FIG. 14: S131). The amount of insulating resin 50 is as described above, and is an amount that can cover the entire surface of the sheet laminate with a desired thickness.

[0067] 16(A) and 16(B), the sheet stack is placed on the insulating resin 50 (FIG. 14: S132). Furthermore, a plurality of spacers 98 are placed on the upper surface of the sheet stack.

[0068] The upper mold 992 and the lower mold 991 are fitted together (FIG. 14: S133). As a result, as shown in FIG. 17, the insulating resin 50 that was disposed on the lower side of the sheet laminate (the jig 90 and lower mold 991 side) wraps around to the upper side of the sheet laminate (the upper mold 992 side).

[0069] At this time, as described above, the bottom dead center of the upper mold 992 is determined by the outer frame 93. Therefore, the distance between the upper mold 992 and the lower mold 991 is regulated to a distance that allows a predetermined thickness of insulating resin 50 to be formed on the upper and lower surfaces of the sheet laminate. This allows insulating resin 50 to be formed on the entire surface of the sheet laminate, including the upper and lower surfaces.

[0070] Furthermore, as described above, the sheet laminate has a plurality of through holes, including a plurality of through holes 591 and 592. This allows the insulating resin 50 to flow from the lower surface side to the upper surface side of the sheet laminate through these through holes. This allows the insulating resin 50 to more reliably flow around to the upper surface of the sheet laminate.

[0071] After the upper mold 992 and the lower mold 991 are fitted together, heating is performed to solidify (cure) the insulating resin 50 (FIG. 14: S134).

[0072] In this way, by using the configuration and manufacturing method of this embodiment, the sheet laminate can be covered with an insulating resin of an appropriate thickness, thereby manufacturing a highly reliable solid electrolytic capacitor.

[0073] Furthermore, in the configuration and manufacturing method of this embodiment, both the upper and lower surfaces of the sheet laminate are almost entirely covered with only the insulating resin 50. This prevents warping due to thermal history, etc., and therefore allows for the manufacture of a more reliable solid electrolytic capacitor.

[0074] Furthermore, in the configuration and manufacturing method of this embodiment, the upper surface, lower surface, both end surfaces, and both side surfaces of the sheet laminate are almost entirely covered only with insulating resin 50. This further suppresses the occurrence of warping due to thermal history, etc., and therefore makes it possible to manufacture a solid electrolytic capacitor with even higher reliability.

[0075] Furthermore, when multiple spacers 98 are used as described above, the insulating resin 50 can be more reliably formed on the upper and lower surfaces of the sheet laminate with a predetermined thickness. This makes it possible to more reliably achieve a sheet laminate covered with insulating resin of an appropriate thickness. As a result, a more reliable solid electrolytic capacitor can be manufactured.

[0076] The spacers 98 are preferably positioned so as not to overlap the capacitor element laminate in plan view. That is, the spacers 98 are preferably positioned so as to overlap portions that will be cut off in plan view in the cutting step that follows the sealing step with insulating resin. This ensures that the thickness of the insulating resin 50 in the capacitor element laminate is uniform over the entire upper and lower surfaces.

[0077] Although not described in detail, it is preferable to place a release sheet made of PET or the like on the surface of the plurality of spacers 98. This allows the plurality of spacers 98 to be easily separated from the capacitor element sheet after resin sealing.

[0078] Furthermore, when multiple spacers 98 are used, it is preferable that the arrangement of the multiple spacers 98 be the same on the upper and lower surfaces of the sheet laminate, so that the stress applied to the capacitor element sheet when the insulating resin 50 is applied can be approximately the same on the upper and lower surfaces.

[0079] In addition, in this embodiment, it is preferable that the thickness of the spacers 98 on the lower surface side of the sheet laminate be the same as the thickness of the spacers 98 on the upper surface side. This allows the thickness of the insulating resin 50 on the lower surface side of the sheet laminate to be the same as the thickness of the insulating resin 50 on the upper surface side. This more reliably suppresses the occurrence of warping due to thermal history, etc., and therefore makes it possible to manufacture a more reliable solid electrolytic capacitor.

[0080] Furthermore, the spacer 98 may be integrally formed with one or both of the upper mold 992 and the lower mold 991. In this case, the position of the spacer 98 in the upper mold 992 and / or the lower mold 991 is reliably fixed, improving the accuracy of the position of the spacer 98.

[0081] In the configuration and manufacturing method of this embodiment, cutting for singulation is performed so as to divide the above-mentioned through holes approximately in half (see cutting lines E11 and E12 in FIG. 11(B)). That is, the through holes for allowing the insulating resin 50 to flow around the upper surface of the sheet laminate are formed by the through holes for singulation. This eliminates the need to provide through holes for allowing the insulating resin 50 to flow around separately from the through holes for singulation.

[0082] Therefore, the through holes can be used effectively, and a larger number of capacitor elements can be obtained in a multi-layer structure than if a separate through hole were formed to allow the insulating resin 50 to flow around. Also, the area of ​​each capacitor element that functions as a capacitor can be increased.

[0083] In the above description, the upper and lower surfaces of the sheet laminate are covered almost entirely with only the insulating resin 50. However, a structure in which the sheet laminate is sandwiched between insulating substrates made of the same material from both the upper and lower surfaces may also be used. This configuration suppresses the occurrence of warping due to thermal history, etc., and therefore enables the manufacture of a highly reliable solid electrolytic capacitor. In this case, through holes for the substrate that overlap the through holes in the sheet laminate may be formed in the substrate. Even in this case, insulating layers made of the same material are formed on the upper and lower surfaces of the sheet laminate.

[0084] The above-described solid electrolytic capacitor 1 has been described as using a plurality of foil-shaped cathode electrodes 20. However, the manufacturing method of the present invention can be applied to a configuration that does not use a plurality of foil-shaped cathode electrodes 20, and similar effects can be achieved. In this case, the cathode side of the solid electrolytic capacitor can be led out by, for example, applying Ag paste to the outer layer CP132 of the capacitor element 10 to form a cathode lead portion.

[0085] [Second embodiment] A solid electrolytic capacitor according to a second embodiment of the present invention and a method for manufacturing the solid electrolytic capacitor will be described with reference to the drawings. Fig. 18(A) and Fig. 18(B) are side cross-sectional views showing the configuration of a set of capacitor elements and cathode electrodes before singulation according to the second embodiment, Fig. 18(C) is a side cross-sectional view showing the configuration of a capacitor element before singulation, and Fig. 18(D) is a side cross-sectional view showing the configuration of a set of capacitor elements and cathode electrodes after singulation. Fig. 19(A) and Fig. 19(B) are exploded perspective views showing the state in which a capacitor element sheet and a cathode electrode sheet according to the second embodiment are stacked.

[0086] The solid electrolytic capacitor 1A according to the second embodiment differs from the solid electrolytic capacitor 1 according to the first embodiment in that it does not include the adhesive dam 30 and the adhesive 40. The other configuration of the solid electrolytic capacitor 1A is the same as that of the solid electrolytic capacitor 1, and a description of similar parts will be omitted.

[0087] As shown in Figures 18(A), 18(B), 18(C), 18(D), 19(A), and 19(B), the CP dam 14 is frame-shaped. The outer layer CP (outer layer solid electrolyte layer) 132 is disposed inside the frame defined by the CP dam 14. In other words, an inner layer CP131 and an outer layer CP132 are formed inside the frame defined by the CP dam 14. The outer layer CP132 is formed on the surface of the inner layer CP131.

[0088] Thus, compared to the configuration of the first embodiment, even in a configuration that does not include an adhesive dam 30 and an adhesive 40, adjacent capacitor elements 10 and cathode electrodes 20 are adhered and electrically connected by the outer layer CP (outer layer solid electrolyte layer) 132 formed inside the CP dam 14.

[0089] That is, by using the configuration and manufacturing method of this embodiment, it is possible to cover the sheet laminate with an insulating resin of an appropriate thickness, thereby manufacturing a highly reliable solid electrolytic capacitor.

[0090] (Explanation of an example of specific materials of each component of the solid electrolytic capacitor 1) (Capacitor element 10) The capacitor element 10 is realized, for example, using the following materials and thicknesses.

[0091] The anode electrode 11 is made of a metal such as aluminum, tantalum, niobium, titanium, zirconium, or magnesium, or an alloy containing these metals. The anode electrode 11 is preferably made of aluminum or an aluminum alloy. The anode electrode 11 may be made of any valve metal that exhibits a so-called valve action.

[0092] The anode electrode 11 is preferably flat, and the thickness of the core portion (the center portion not reached by the pores of the porous body) of the anode electrode 11 is preferably 5 μm or more and 100 μm or less. The thickness (thickness of one side) of the porous portion (the portion where the pores of the porous body are formed) is preferably 5 μm or more and 200 μm or less.

[0093] The dielectric layer 12 is preferably made of an oxide film of the anode electrode 11. For example, when an aluminum foil is used for the anode electrode 11, the dielectric layer 12 is formed by oxidizing the aluminum foil in an aqueous solution containing boric acid, phosphoric acid, adipic acid, or their sodium salts or ammonium salts. The thickness of the dielectric layer 12 is preferably 10 nm or more and 100 nm or less.

[0094] The inner layer CP131 may be a PEDOT:PSS layer realized by, for example, a conductive polymer having a skeleton of pyrroles, thiophenes, anilines, or the like, or a conductive polymer having a skeleton of thiophenes such as PEDOT [poly(3,4-ethylenedioxythiophene)], and composited with polystyrene sulfonate (PSS) as a dopant. The inner layer CP131 may be formed, for example, by a method of forming a polymer film of poly(3,4-ethylenedioxythiophene) or the like on the surface of the dielectric layer 12 using a treatment liquid containing a monomer such as 3,4-ethylenedioxythiophene, or by a method of applying a dispersion of a polymer such as poly(3,4-ethylenedioxythiophene) to the surface of the dielectric portion and drying it.

[0095] The thickness of the outer layer CP132 is preferably 2 μm or more and 20 μm or less. The material of the outer layer CP132 is the same as the material of the inner layer CP131.

[0096] The adhesive 40 may be a mixture of insulating resin such as epoxy resin or phenolic resin and conductive particles such as carbon or silver.

[0097] The cathode electrode 20 is preferably made of aluminum or an aluminum alloy. The thickness of the cathode electrode 20 is, for example, approximately the same as the thickness of the anode electrode 11.

[0098] The insulating resin 50 may contain a filler. Examples of suitable resins include epoxy resin, phenol resin, polyimide resin, silicone resin, polyamide resin, and liquid crystal polymer. Examples of suitable fillers include insulating oxide particles such as silica particles, alumina particles, titania particles, and zirconia particles. The maximum diameter of the filler is preferably 30 μm or more and 40 μm or less. For example, a material containing silica particles in a solid epoxy resin is more preferable.

[0099] The correspondence between the configuration according to the present invention and the above-mentioned configuration will be described below. [Note] <1> a step of sequentially forming a dielectric layer and a solid electrolyte layer on the surface of a flat film-shaped anode electrode foil to form a plurality of flat film-shaped capacitor elements; forming a sheet laminate by alternately stacking the plurality of flat film capacitor elements with conductive adhesive layers or the solid electrolyte layers interposed therebetween; a step of sealing the sheet laminate with an insulating resin; and The step of forming the flat film capacitor element includes: forming an anode through-hole penetrating the flat film capacitor element in a thickness direction; The step of forming the sheet laminate includes: stacking the plurality of flat film capacitor elements at positions where the anode through holes overlap one another; The step of sealing with an insulating resin includes: The fluid insulating resin and the sheet laminate are placed between an upper mold and a lower mold, and the upper mold and the lower mold are fitted together to perform compression molding in which heat and pressure are applied; a distance between the upper mold and the lower mold when the upper mold and the lower mold are fitted together is greater than a thickness of the sheet laminate; A method for manufacturing a solid electrolytic capacitor.

[0100] <2> The step of sealing with an insulating resin includes: a sealing jig having an inner frame and an outer frame is placed on the upper surface of the lower mold; The fluid insulating resin and the sheet laminate are disposed inside the inner frame; The height of the outer frame is higher than that of the inner frame, and is based on the distance between the upper mold and the lower mold when the upper mold and the lower mold are fitted together. <1> 10. A method for producing the solid electrolytic capacitor according to claim 9.

[0101] <3> The step of sealing with an insulating resin includes: spacers each having a shape smaller than the sheet stack in a plan view are disposed above and below the sheet stack; <1> or <2> 10. A method for producing the solid electrolytic capacitor according to claim 9.

[0102] <4> The upper and lower surfaces of the sheet laminate are sandwiched between insulating base materials made of the same material, and then sealed with the insulating resin. <1> or <2> 10. A method for producing the solid electrolytic capacitor according to claim 9.

[0103] <5> the anode through-holes also serve as cutting holes for dividing the sheet laminate into a plurality of solid electrolytic capacitors; <1> ~ <4> 10. A method for producing the solid electrolytic capacitor according to claim 9, wherein the solid electrolytic capacitor is a capacitor having a thickness of 1000 .mu.m or less.

[0104] <6> forming a plurality of flat film-shaped cathode electrode foils each having a cathode through-hole penetrating in the thickness direction; The step of forming the sheet laminate includes: the plurality of flat film capacitor elements and the plurality of flat film cathode electrode foils are alternately stacked at positions where the anode through holes and the cathode through holes overlap each other, thereby forming the sheet laminate. <1> ~ <5> 10. A method for producing the solid electrolytic capacitor according to claim 9, wherein the solid electrolytic capacitor is a capacitor having a thickness of 1000 .mu.m or less.

[0105] <7> the cathode through-hole also serves as a cutting hole for dividing the sheet laminate into a plurality of solid electrolytic capacitors; <6> 10. A method for producing the solid electrolytic capacitor according to claim 9. [Explanation of symbols]

[0106] 1: Solid electrolytic capacitor 10: Capacitor element 10E1: 1st end 10E2: 2nd end 11: Anode electrode 12: Dielectric layer 13:CP layer 14: CP Dam 19C: Through hole for anode 19L: Through hole for anode 20: Cathode electrode 20E1: 1st end 20E2: 2nd end 29C: Through hole for cathode 29L: Through hole for cathode 30: Adhesive dam 39:Through hole for adhesive dam 40: Adhesive 50: Insulating resin 61, 62: External electrode 90: Jig 91: Base material 92: Inner frame 93: Outer frame 98: Spacer 100: Capacitor element laminate 131: Inner layer CP 132: Outer layer CP 149: Through hole for CP dam 591:Through hole 592:Through hole 991: Lower mold 992: Upper mold 920: Opening

Claims

1. forming a plurality of flat film capacitor elements by sequentially forming a dielectric layer and a solid electrolyte layer on the surface of a flat film anode electrode foil; forming a sheet laminate by alternately stacking the plurality of flat film capacitor elements with conductive adhesive layers or the solid electrolyte layers interposed therebetween; a step of sealing the sheet laminate with an insulating resin; and The step of forming the flat film capacitor element includes: forming an anode through-hole penetrating the flat film capacitor element in a thickness direction; The step of forming the sheet laminate includes: stacking the plurality of flat film capacitor elements at positions where the anode through holes overlap one another; The step of sealing with an insulating resin includes: The fluid insulating resin and the sheet laminate are placed between an upper mold and a lower mold, and the upper mold and the lower mold are fitted together to perform compression molding in which heat and pressure are applied; a distance between the upper mold and the lower mold when the upper mold and the lower mold are fitted together is greater than a thickness of the sheet laminate; a sealing jig having an inner frame and an outer frame is placed on the upper surface of the lower mold; The fluid insulating resin and the sheet laminate are disposed inside the inner frame; The height of the outer frame is higher than that of the inner frame, and is based on the distance between the upper mold and the lower mold when the upper mold and the lower mold are fitted together. A method for manufacturing a solid electrolytic capacitor.

2. The step of sealing with an insulating resin includes: spacers each having a shape smaller than the sheet stack in a plan view are disposed above and below the sheet stack; The method for manufacturing the solid electrolytic capacitor according to claim 1 .

3. The upper and lower surfaces of the sheet laminate are sandwiched between insulating base materials made of the same material, and then sealed with the insulating resin. The method for manufacturing the solid electrolytic capacitor according to claim 1 .

4. the anode through-holes also serve as cutting holes for dividing the sheet laminate into a plurality of solid electrolytic capacitors; The method for manufacturing the solid electrolytic capacitor according to claim 1 .

5. forming a plurality of flat film-shaped cathode electrode foils each having a cathode through-hole penetrating in the thickness direction; The step of forming the sheet laminate includes: the plurality of flat film capacitor elements and the plurality of flat film cathode electrode foils are alternately stacked at positions where the anode through holes and the cathode through holes overlap each other, thereby forming the sheet laminate. The method for manufacturing the solid electrolytic capacitor according to claim 1 .

6. the cathode through-hole also serves as a cutting hole for dividing the sheet laminate into a plurality of solid electrolytic capacitors; The method for manufacturing the solid electrolytic capacitor according to claim 5 .

Citation Information

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