electrostatic protection devices

Abstract

The present invention relates to an electrostatic protection device for protecting an input port of an electronic circuit. The electrostatic protection device includes a first stacked coil, a second stacked coil, and an input terminal, where the second stacked coil is inductively coupled to the first stacked coil. The first stacked coil has a first coil input connected to the input terminal, a first coil output port connected to a low-frequency ESD protection circuit, and a first coil termination port connected to a termination load, where the low-frequency ESD protection circuit includes a low-frequency output. The second stacked coil has an output port connected to a high-frequency ESD protection circuit, where the high-frequency ESD protection circuit includes a high-frequency output. The electrostatic protection device includes a summing circuit configured to output a sum of the high-frequency output and the low-frequency output.

Description

[Technical Field]

[0001] The present invention relates to integrated circuits, and more particularly to electrostatic protection of input ports for integrated circuits. [Background technology]

[0002] Integrated circuits (ICs) can incorporate dedicated circuitry to protect the integrated circuit against electrostatic discharge (ESD) events at the integrated circuit's input / output (I / O) pads. Achieving this ESD protection requirement can be a challenge when wideband, high-frequency signals are transmitted and / or received across the IC's I / O pads.

[0003] ESD protection devices in integrated circuits often include devices such as inductors and coils. As integrated circuit dimensions shrink and clock rates increase, scaling ESD protection device designs is difficult, or sometimes even impossible. Existing ESD protection device designs often do not provide the required bandwidth. Summary of the Invention

[0004] In one aspect, the present invention relates to an electrostatic protection device for protecting an input port of an electronic circuit. The electrostatic protection device includes a first stacked coil and a second stacked coil. The first stacked coil and the second stacked coil may be stacked on top of each other. The first stacked coil and the second stacked coil may be physically formed one above the other when formed within an integrated circuit.

[0005] The electrostatic protection device includes an input terminal. A first stacked coil includes a first coil input connected to the input terminal. The first stacked coil includes a first coil output port connected to a low-frequency ESD protection circuit. The first stacked coil includes a first coil termination port connected to a termination load. A second stacked coil is inductively coupled to the first stacked coil. The second stacked coil includes an output port connected to a high-frequency ESD protection circuit. The high-frequency ESD protection circuit includes a high-frequency output. The low-frequency ESD protection circuit includes a low-frequency output. The electrostatic protection device includes a summing circuit configured to output a sum of the high-frequency output and the low-frequency output to an input port of an electronic circuit.

[0006] According to a further aspect of the present invention, there is further provided an integrated circuit incorporating an electrostatic protection device for protecting an input port of an electronic circuit.

[0007] In the following, embodiments of the invention will be described in more detail, by way of example only, with reference to the drawings, in which: FIG. [Brief explanation of the drawings]

[0008] [Figure 1] FIG. 1 illustrates an example of an electrostatic protection device. [Figure 2] 3A and 3B are diagrams showing examples of a first laminated coil and a second laminated coil. [Figure 3] 2 is a plot of frequency transfer from a circuit simulation of the electrostatic protection device shown in FIG. 1; [Figure 4] Figure 1 illustrates the bandwidth provided by the electrostatic protection device as observed in an eye diagram. [Figure 5] FIG. 1 illustrates an example of an integrated circuit. [Figure 6] 10A-10C illustrate further examples of electrostatic protection devices. [Figure 7] 10A-10C illustrate further examples of electrostatic protection devices. [Figure 8] 10A-10C illustrate further examples of electrostatic protection devices. [Figure 9] 10A-10C illustrate further examples of electrostatic protection devices. DETAILED DESCRIPTION OF THE INVENTION

[0009] The description of various embodiments of the present invention is presented for purposes of illustration and is not intended to be exhaustive or limited to the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art without departing from the scope of the described embodiments. The terminology used herein was selected to best explain the principles of the embodiments, practical applications, or technical improvements over technology found in the market, or to enable others skilled in the art to understand the embodiments disclosed herein.

[0010] Embodiments of the present invention advantageously provide an effective means of increasing the bandwidth of an electrostatic protection device. A signal is split into low-frequency and high-frequency components, which are then processed separately and then recombined. The terms low-frequency ESD protection circuit and high-frequency ESD protection circuit are names used to identify two separate ESD protection circuits. The terms high-frequency output and low-frequency output are used to identify or name two different frequency outputs used in the circuit.

[0011] In some embodiments, Human Body Model (HBM) electrostatic discharge (ESD) protection circuits and Charged Device Model (CDM) ESD protection circuits can refer to ESD protection circuits that incorporate clamping circuits, such as diodes, connected to both power rails (power and ground). HBM and CDM ESD devices may actually incorporate capacitance to ground caused by the diode junction capacitance and parasitic wiring capacitance of the diode in the case of a CDM diode, the parasitic capacitance of the diode junction, and the RX input capacitance. Charged device ESD protection circuits can further incorporate resistors and / or impedances in series with the input to limit current, as well as separate HBM and CDM protection circuits.

[0012] In another embodiment, the first stacked coil and the second stacked coil form a crossover network configured to split a signal input into the input terminals into a high-frequency component and a low-frequency component. The use of an inductive circuit provides a natural means for splitting the input signal into these two components. The high-frequency component is output by a high-frequency output, and the low-frequency component is output by a low-frequency output.

[0013] One possible advantage of this embodiment is that the high-frequency and low-frequency components of an ESD event can have different current magnitudes. For example, the low-frequency component of an ESD event typically has a higher current than the high-frequency component of the ESD event. This effect can be used when designing an effective electrostatic protection device. The first stacked coil and the second stacked coil can effectively form a crossover network that isolates the high-frequency ESD protection circuit from the low-frequency component of the ESD event. This can allow the high-frequency ESD protection circuit and the low-frequency ESD protection circuit to have their components tuned for each specific type of ESD event. For example, the high-frequency ESD protection circuit can be designed with a lower current rating than the low-frequency ESD protection circuit.

[0014] In another embodiment, the first stacked coil is a t-coil with a single coil tap. In this embodiment, the t-coil structure is used for low-frequency components. This can be advantageous because it is relatively simple to construct a t-coil with a single coil tap and low-frequency ESD protection circuit so that it can handle high currents. However, this can affect its ability to respond to high frequencies. Therefore, it is advantageous to combine the t-coil with a high-frequency ESD protection circuit to increase bandwidth.

[0015] In another embodiment, a single coil tap divides the first stacked coil into a first coil portion and a second coil portion. The single coil tap is the first coil output. The second coil portion is connected between the single coil tap and the coil termination port. The first coil portion is connected between the single coil tap and the first coil input.

[0016] In another embodiment, the inductive coupling between the first coil portion and the second stacked coil is greater than the inductive coupling between the second coil portion and the second stacked coil. This embodiment may be advantageous during construction of an electrostatic protection circuit because the signal received on the first coil portion may be more accurate. For example, when a signal passes through the first coil portion and then the second coil portion, the inductance of the first coil portion may cause a reduction in the high-frequency components of the signal. Another advantage is that the current in the first coil portion may be higher, thereby increasing the ability for inductive coupling to occur.

[0017] In another embodiment, the second stacked coil includes a reference port connected to the ground plane of the electrostatic protection device. This embodiment can be advantageous because it can provide an effective means of referencing both high and low frequency components.

[0018] In another embodiment, the low frequency ESD protection circuit comprises a human body model ESD protection circuit, which can be advantageous because a human body model ESD protection circuit can be specifically constructed to handle the high current and low frequency components of an ESD event.

[0019] In another embodiment, the low-frequency ESD protection circuit includes an additional charged-device model ESD protection circuit. Although various frequency components can be divided into upper, upper, and lower portions, some high-frequency components of the ESD pulse passing through the first stacked coil may still be present. Therefore, incorporating an additional charged-device model ESD protection circuit is advantageous and can increase the effectiveness of ESD protection.

[0020] In another embodiment, the first stacked coil includes a first coil tap and a second coil tap. The low-frequency ESD protection circuit is connected to the first coil tap and the second coil tap. This embodiment is similar to the t-coil configuration, but instead of the first stacked coil being divided into two sections, the first stacked coil is divided into three sections. This can allow for a more sophisticated low-frequency ESD protection circuit.

[0021] In another embodiment, the first stacked coil comprises a first coil portion, a middle coil portion, and a second coil portion, the first coil portion connected between the first coil input and the first coil tap, the middle coil portion connected between the first coil tap and the second coil tap, and the second coil portion connected between the second coil tap and the first coil termination port.

[0022] In another embodiment, the low-frequency ESD protection circuit comprises a Human Body Model ESD protection circuit. The low-frequency ESD protection circuit comprises an additional Charged Device Model ESD protection circuit. The additional Charged Device Model ESD protection circuit is connected to a first coil tap, and the Human Body Model ESD protection circuit is connected to a second coil tap. This embodiment can be advantageous because it provides highly effective ESD protection for low frequencies.

[0023] In another embodiment, the second stacked coil includes a reference port connected to the ground plane of the electrostatic protection device.

[0024] In another embodiment, the second stacked coil includes a reference port connected to the second coil tap.

[0025] In another embodiment, the first stacked coil is at least partially formed from two metallization layers on top of the electrostatic protection device. This can be beneficial because the current passing through the first stacked coil can be higher than that passing through the second stacked coil. The two metallization layers on top of the electrostatic protection device can be thick and have low resistance, providing the first stacked coil with a low likelihood of being destroyed by an ESD event.

[0026] In another embodiment, the high-frequency ESD protection circuit comprises a primary charged-device model ESD protection circuit. The use of the terms primary charged-device model ESD protection circuit and additional charged-device model ESD protection circuit is intended to indicate that there are two separate charged-device model ESD protection circuits.

[0027] In another embodiment, the primary charged device model ESD protection circuit has a primarily reactive impedance. Because the signal from the ESD event is effectively split into two signals, one with a high-frequency component and one with a low current, the primary charged device model ESD protection circuit can be specialized and designed to have less power loss. In traditional electrostatic discharge protection devices, the primary charged device model ESD protection circuit uses a diode, which is effectively a lossy capacitor for small signals. However, for large voltages, the diode begins to conduct, effectively providing a resistor that dissipates the ESD energy to ground. Reactive impedance can instead be used for the ESD protection circuit because the data signals for high-frequency and low-frequency ESD protection circuits are low current.

[0028] In another embodiment, the summing circuit may be a continuous-time linear equalizer, which may be a particularly effective way of combining low and high frequency signal components, for example.

[0029] In another embodiment, the input port of the electronic circuit is a differential input port. The differential input port is formed by two electrostatic protection devices connected together by a continuous-time linear equalization circuit. The continuous-time linear equalization circuit is used to combine signals from the two separate electrostatic protection devices. This can be advantageous because the continuous-time linear equalization circuit can provide better noise rejection.

[0030] In another embodiment, the termination load is resistive, which can provide an effective means of structuring the circuit, for example.

[0031] In another aspect, the present invention provides an integrated circuit comprising an electronic circuit. The integrated circuit comprises an electrostatic protection device for protecting an input port of the electronic circuit. The electrostatic protection device comprises a first stacked coil and a second stacked coil. The electrostatic protection device comprises an input terminal. The first stacked coil comprises a first coil input connected to the input terminal. The first stacked coil comprises a first coil output port connected to a low-frequency ESD protection circuit. The first stacked coil comprises a first coil termination port connected to a termination load. The second stacked coil is inductively coupled to the first stacked coil. The second stacked coil comprises an output port connected to a high-frequency ESD protection circuit. The high-frequency ESD protection circuit has a high-frequency output. The low-frequency ESD protection circuit has a low-frequency output. The electrostatic protection device comprises a summing circuit configured to output a sum of the high-frequency output and the low-frequency output to the input port of the electronic circuit.

[0032] In another embodiment, the integrated circuit may be any of a microprocessor, a microcontroller, a graphical processing unit, a central processing unit, a wideband amplifier, an analog-to-digital converter, a digital-to-analog converter, a wireline transceiver circuit, and a telecommunications chip.

[0033] In another embodiment, the integrated circuit includes a substrate. The electronic circuit is formed on the substrate. The electrostatic discharge protection device is also formed on the substrate. The second stacked coil is formed closer to the substrate than the first stacked coil. This can be advantageous because thicker metal layers, such as the final few metallization layers, can be used to form the first stacked coil. This can provide a high current rating and low resistance for the low-frequency EDS protection circuit.

[0034] FIG. 1 illustrates an example of an electrostatic protection device 100. The electrostatic protection device 100 has an input port 102. The input port 102 can be an input port for an electronic circuit that the electrostatic protection device 100 is protecting. The electrostatic protection device 100 includes a first stacked coil 104 and a second stacked coil 106. In this example, the first stacked coil 104 is divided into a first coil portion 110 and a second coil portion 112. A single coil tap 114 exists between the first coil portion 110 and the second coil portion 112. The first stacked coil 104 and the second stacked coil 106 are physically stacked on top of each other to have an inductive coupling. In this particular illustration, the second stacked coil 106 is shown primarily coupled to the first coil portion 110. However, this is only one option. The second stacked coil 106 could also be primarily coupled to the second coil portion 112.

[0035] The first and second stacked coils 104, 106 form a five-port device. The first port 120 is the first coil input. The second port 122 is the first coil output port, which is the same as the single coil tap 114. The third port 124 is connected to the output of the second coil section 112 and is connected to the termination load 116. The fourth port is a reference port 126 connected to one end of the second stacked coil 106, and the fifth port is the second coil output port 128, which is the other port of the second stacked coil 106.

[0036] The inductive coupling between the second stacked coil 106 and the first stacked coil 104 is configured so that the inductive coupling preferentially couples the high-frequency component of the signal to the high-frequency ESD protection circuit 140. The uncoupled portion of the signal remains within the low-frequency ESD protection circuit 130. This therefore forms a high-frequency circuit path 142 and a low-frequency circuit path 132. The low-frequency circuit path 132 has a human body model ESD protection circuit 134 and an additional charged-device model ESD protection circuit 136. The high-frequency circuit path 142 has a primary charged-device model ESD protection circuit 144.

[0037] Both the high-frequency ESD protection circuit 140 and the low-frequency ESD protection circuit 130 are coupled through an amplifier to a summing circuit 150. The summing circuit 150 sums the low-frequency output 154 and the high-frequency output 156 into an electrostatic protection device output 152, which has a sum 158 of both the low-frequency output 154 and the high-frequency output 156. This is illustrated by the graphs of the low-frequency and high-frequency signals as shown in the plot.

[0038] FIG. 2 shows an example of a first stacked coil 104 and a second stacked coil 106. This figure shows a perspective view 200 and a top view 202. The figure shows the first coil portion 110 and the second coil portion 112 of the first stacked coil 104 on top of the second stacked coil 106. In this example, the second coil portion 112 is adjacent to the second stacked coil 106. The inductive coupling is likely stronger between the second stacked coil 106 and the second coil portion 112 than between the second stacked coil 106 and the first coil portion 110. This is the opposite of the situation shown in FIG. 1, where the drawing shows that the inductive coupling is primarily between the first coil portion 110 and the second stacked coil 106. The design of FIG. 2 can be easily modified to match that shown in FIG. 1 by mechanically switching the positions of the two coil portions 112 and 110. The coil shown in FIG. 2, for example, may be readily manufactured using standard semiconductor fabrication techniques.

[0039] Figure 3 shows the frequency transfer from a simulation of the circuit shown in Figure 1. The low frequency output 154 and the high frequency output 156 are plotted. The low frequency band -3 dB point 300 is shown. The sum of both signals is shown by sum 158. The -3 dB point for sum 158 is shown by line 302. Compared to the low frequency band -3 dB point 300, the -3 dB point for the sum 158 of the signals is significantly elevated.

[0040] FIG. 4 shows the bandwidth provided by the electrostatic protection device of FIG. 1. There are two groups of diagrams. The diagrams in column 400 show the actual signal. The diagrams in column 402 are eye diagrams. Row 1 contains a high frequency band 404. Row 2 is a low frequency band 406. The bottom row 408 contains the sum of the high frequency band 404 and the low frequency band 406. Column 402 for the sum shows a relatively large bandwidth.

[0041] FIG. 5 shows an example of an integrated circuit 500. The integrated circuit 500 comprises a substrate 502. On the substrate 502 is an input pad 504, which is then wire bonded 506 to the input port 102. The first stacked coil 104 and the second stacked coil 106 shown in FIG. 2 form part of the integrated circuit 500. The integrated circuit 500 comprises the electrostatic protection device 100 and forms an input for an electronic circuit 508. The first coil portion 110 and the second coil portion 112 are formed from two upper metallization layers 510. This allows these two portions 110, 112 to have a high current rating and better withstand ESD events.

[0042] FIG. 6 shows another example of an electrostatic protection circuit 600. The electrostatic protection circuit 600 in FIG. 6 is similar to the circuit shown in FIG. 1. In this example, the summing circuit is a continuous-time linear equalizer circuit 150′. The continuous-time linear equalizer circuit 150′ includes an amplifier 602, a FET transistor 601, and several resistors 604. The resistance of the resistor 604 can be adjusted so that the attenuation of the HF path 142 matches the amplitude of the LF path 132. In the LF path 132, a virtual ground 606 is formed by a feedback loop formed by the amplifier 602 and the FET transistor 601. This forms a transimpedance amplifier (current-to-voltage amplifier). The LF signal 154 and the HF signal 156 are added at the bottom of the FET transistor 601, and the output 152 is connected to the next stage, such as an analog-to-digital converter (ADC).

[0043] 7 shows a further example of a differential electrostatic protection device 700. There is a first differential input 702 and a second differential input 704. The first differential input 702 is connected to a first electrostatic protection device 706, which is similar to the electrostatic protection device 100 shown in FIG. 1. The second differential input 704 is connected as an input for a second electrostatic protection device 708. Similarly, the second electrostatic protection device 708 is similar to the electrostatic protection device 100 shown in FIG. 1.

[0044] The first electrostatic protection device 706 and the second electrostatic protection device 708 have some modifications with respect to the electrostatic protection device 100 of FIG. 1. Initially, the second stacked coil 106 is shown in both cases as primarily coupled to the second coil portion 112. The first electrostatic protection device 706 and the second electrostatic protection device 708 are shown as connected using a continuous-time linear actuator circuit 150'' to provide differential summation.

[0045] The continuous-time linear actuator circuit 150'' is, in this example, a differential amplifier and includes two FETs 710 with resistors 712 at their drains. VDD (DC voltage) is supplied through inductor L3. The high-frequency output 156 reaches the output (to the next stage) through drain resistor 712, where it is combined with the low-frequency output 154, which is slightly amplified by FET 710. The current source is typical for a differential amplifier. The adjustable resistor 714 is configured to adjust the circuit so that the signal amplitudes of the high-frequency and low-frequency channels match. The capacitor 716 between the two VDDs is simply to block the power supply.

[0046] FIG. 8 illustrates a further example of an electrostatic protection device 800. In this example, the first stacked coil 104 has been modified relative to the example illustrated in FIG. 1. The first stacked coil 104 has been divided into three sections: a first coil section 110, a middle coil section 802, and a second coil section 112. A first coil output section 122 is located between the first coil section 110 and the middle coil section 802. A sixth port 806 provided by a second coil tap 804 is located between the middle coil section 802 and the second coil section 112. Thus, the first stacked coil 104 and the second stacked coil 106 form a sixth port device in this example. The example illustrated in FIG. 8 is further modified from the example illustrated in FIG. 1 in that an additional charged device model ESD protection circuit 136 is shown connected to the second port or first coil output port 122. The human body model ESD protection circuit 134 is shown as being connected to what is the sixth port or second coil output port 806. In the circuit diagram, the second stacked coil 106 is shown as being primarily coupled to the middle coil portion 802. However, this could be modified and the second stacked coil 106 could be primarily coupled to the first coil portion 110 or the second coil portion 112.

[0047] FIG. 9 shows a further example of an electrostatic protection device 900. The example shown in FIG. 9 is similar to the example shown in FIG. 8 with a modification. In FIG. 8, the fourth port or reference port 126 of the second stacked coil 106 was connected to ground. In the example of FIG. 9, the fourth port or reference port 126 is instead connected to the second coil tap 804. This is equivalent to connecting the second coil output port 806 to the reference port 126 of the second stacked coil 106.

[0048] The description of various embodiments of the present invention has been presented for purposes of illustration, but is not intended to be exhaustive or limited to the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art without departing from the scope of the described embodiments. The terminology used herein has been selected to best explain the principles of the embodiments, practical applications, or technical improvements over technology found in the market, or to enable others skilled in the art to understand the embodiments disclosed herein.

Claims

1. 1. An electrostatic protection device for protecting an input port of an electronic circuit, comprising: a first stacked coil, a second stacked coil, and an input terminal, the second stacked coil being inductively coupled to the first stacked coil; the first stacked coil having a first coil input connected to the input terminal, a first coil output port connected to a low frequency ESD protection circuit, and a first coil termination port connected to a termination load, the low frequency ESD protection circuit having a low frequency output; the second stacked coil has an output port connected to a high frequency ESD protection circuit, the high frequency ESD protection circuit having a high frequency output; the electrostatic protection device comprising a summing circuit configured to output a sum of the high frequency output and the low frequency output to the input port of the electronic circuit; Electrostatic protection device.

2. 2. The electrostatic protection device of claim 1, wherein the first stacked coil and the second stacked coil form a crossover network configured to split a signal input into the input terminal into a high frequency component and a low frequency component, the high frequency component being output by the high frequency output and the low frequency component being output by the low frequency output.

3. 2. The electrostatic protection device of claim 1, wherein the first stacked coil is a T-coil with a single coil tap.

4. 4. The electrostatic protection device of claim 3, wherein the single coil tap divides the first stacked coil into a first coil portion and a second coil portion, the single coil tap being a first coil output, the second coil portion being connected between the single coil tap and the coil termination port, and the first coil portion being connected between the single coil tap and the first coil input.

5. 5. The electrostatic protection device of claim 4, wherein the inductive coupling between the first coil portion and the second stacked coil is greater than the inductive coupling between the second coil portion and the second stacked coil.

6. 6. The electrostatic protection device of claim 5, wherein the second stacked coil includes a reference port connected to a ground plane of the electrostatic protection device.

7. 10. The electrostatic protection device of claim 1, wherein the low frequency ESD protection circuit comprises a human body model ESD protection circuit.

8. 8. The electrostatic protection device of claim 7, wherein the low frequency ESD protection circuit comprises an additional charged device model ESD protection circuit.

9. 2. The electrostatic protection device of claim 1, wherein the first stacked coil comprises a first coil tap and a second coil tap, and the low-frequency ESD protection circuit is connected to the first coil tap and the second coil tap.

10. 10. The electrostatic protection device of claim 9, wherein the first stacked coil comprises a first coil portion, an intermediate coil portion, and a second coil portion, the first coil portion connected between the first coil input and the first coil tap, the intermediate coil portion connected between the first coil tap and the second coil tap, and the second coil portion connected between the second coil tap and the first coil termination port.

11. 11. The electrostatic protection device of claim 10, wherein the low frequency ESD protection circuit comprises a human body model ESD protection circuit, the low frequency ESD protection circuit comprises an additional charged device model ESD protection circuit, the additional charged device model ESD protection circuit connected to the first coil tap, and the human body model ESD protection circuit connected to the second coil tap.

12. 10. The electrostatic protection device of claim 1, wherein the second stacked coil includes a reference port connected to a ground plane of the electrostatic protection device.

13. 10. The electrostatic protection device of claim 1, wherein the second stacked coil with a reference port is connected to a second coil tap.

14. 10. The electrostatic protection device of claim 1, wherein the first stacked coil is at least partially formed from two metallization layers on top of the electrostatic protection device.

15. 2. The electrostatic protection device of claim 1, wherein the high frequency ESD protection circuit comprises a primary charged device model ESD protection circuit.

16. 16. The electrostatic protection device of claim 15, wherein the primary charged device model ESD protection circuit has a predominantly reactive impedance.

17. 2. The electrostatic protection device of claim 1, wherein the summing circuit is a continuous-time linear equalization circuit.

18. 20. The electrostatic protection device of claim 17, wherein the input port of the electronic circuit is a differential input port, the differential input port being formed by two electrostatic protection devices connected together by the continuous-time linear equalization circuit.

19. 2. The electrostatic protection device of claim 1, wherein the summing circuit is formed from a summing amplifier.

20. 10. The electrostatic protection device of claim 1, wherein the termination load is resistive.

21. 1. An integrated circuit comprising an electronic circuit, the integrated circuit comprising an electrostatic protection device for protecting an input port of the electronic circuit, the electrostatic protection device comprising: a first stacked coil, a second stacked coil, and an input terminal, the second stacked coil being inductively coupled to the first stacked coil; the first stacked coil having a first coil input connected to the input terminal, a first coil output port connected to a low frequency ESD protection circuit, and a first coil termination port connected to a termination load, the low frequency ESD protection circuit having a low frequency output; the second stacked coil has an output port connected to a high frequency ESD protection circuit, the high frequency ESD protection circuit having a high frequency output; the electrostatic protection device comprising a summing circuit configured to output a sum of the high frequency output and the low frequency output to the input port of the electronic circuit; Integrated circuit.

22. 22. The integrated circuit of claim 21, selected from the group consisting of a microprocessor, a microcontroller, a graphical processing unit, a central processing unit, a wideband amplifier, an analog-to-digital converter, a digital-to-analog converter, a wireline transceiver circuit, and a telecommunications chip.

23. 22. The integrated circuit of claim 21, comprising a substrate, the electronic circuit formed on the substrate, the electrostatic protection device formed on the substrate, and the second stacked coil formed closer to the substrate than the first stacked coil.

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