Multi-resonant coupled architecture for reducing ZZ interactions

The multi-resonant coupling architecture in superconducting qubits reduces ZZ interactions using fixed-frequency elements, enhancing quantum computing system performance by maintaining coherence time and cross-resonance gate speed.

JP7751947B2Active Publication Date: 2025-10-09INTERNATIONAL BUSINESS MACHINE CORPORATION
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Patent Information

Application Number
JP2022570223
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Priority Date
2020-06-09
Filing Date
2021-05-25
Publication Date
2025-10-09
Estimated Expiration
2041-05-25

AI Technical Summary

Technical Problem

Conventional coupling methods between superconducting qubits introduce always-on ZZ interactions, which degrade the performance of quantum computing systems by depleting coherence time and reducing efficiency.

Method used

A multi-resonant coupling architecture is employed, utilizing fixed-frequency elements to capacitively couple qubits with multiple resonators or couplers, such as λ/2 and λ/4 resonators, to reduce ZZ interactions without affecting coherence time or ZX interactions.

Benefits of technology

The multi-resonant coupling architecture effectively reduces ZZ interactions by an order of magnitude, maintaining coherence time and cross-resonance gate speed, thus improving quantum computing system performance.

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Abstract

Systems and techniques are provided that facilitate a multi-resonant coupler to sustain ZX interactions while reducing ZZ interactions. In various embodiments, a first qubit can have a first operating frequency, a second qubit can have a second operating frequency, and a multi-resonant architecture can couple the first qubit to the second qubit.
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Description

[Technical Field]

[0001] The present disclosure relates generally to superconducting qubits, and more particularly to a multi-resonant coupling architecture that reduces ZZ interaction between superconducting qubits while enabling cross-resonant gates via ZX interaction. [Background technology]

[0002] Quantum computing systems can be composed of superconducting qubits in various arrangements. In various instances, the qubits can have a fixed operating frequency (e.g., a transmon qubit with a single Josephson junction can have a fixed operating frequency) and can be arranged in a two-dimensional array on any suitable quantum computing substrate. In various embodiments, any qubit in such a two-dimensional array can be coupled to some or all, or both, of its nearest neighbor qubits or some or all, or both, of its second nearest neighbor qubits.

[0003] Conventionally, qubits are coupled together via fixed-frequency microwave resonators (e.g., bus resonators). That is, a first qubit and a second qubit are conventionally coupled by a single fixed-frequency resonator, with a first end of the single fixed-frequency resonator capacitively coupled to the first qubit and a second end of the single fixed-frequency resonator capacitively coupled to the second qubit. Such coupling allows the first qubit and the second qubit to exhibit high coherence from cross-resonance and / or strong ZX interactions, which can improve the overall functionality of the quantum computing system. In various instances, qubit devices with over 50 qubits have been successfully implemented based on such cross-resonance interactions, in which the qubits are driven by microwave tones at the frequency of neighboring qubits.

[0004] However, a significant drawback of conventional couplers is that they introduce always-on ZZ interactions between coupled qubits. This weak ZZ error accumulates between any pair of conventionally coupled qubits and degrades the desired cross-resonance mechanism used in two-qubit gates. In other words, this ZZ error inhibits the effectiveness and / or efficiency of quantum computing systems. Conventional systems and / or techniques for addressing always-on ZZ errors include echo methods and tunable-frequency coupling elements. Echo methods involve using additional pulses to cancel out the ZZ interaction. However, these pulses require time to implement and can significantly deplete the coherence budget due to finite coherence time. Tunable-frequency couplers can be used to reduce and / or eliminate the ZZ interaction. However, adding tunable-frequency elements to quantum computing systems often results in degraded coherence. In other words, conventional systems and / or techniques for reducing always-on ZZ interactions have a corresponding adverse effect on coherence time.

[0005] In various instances, embodiments of the present invention may solve one or more of these problems in the prior art. Summary of the Invention

[0006] The following presents a summary to provide a basic understanding of one or more embodiments of the present invention. This summary is not intended to identify key or critical elements or to delineate the scope of any particular embodiments or the claims. Its sole purpose is to present concepts in a simplified form as a prelude to the more detailed description presented later. In one or more embodiments described herein, a device, system, computer-implemented method, apparatus, or computer program product, or combination thereof, that facilitates a multi-resonant coupling architecture for ZZ interaction reduction is described.

[0007] According to one or more embodiments, a device is provided. The device can include a first qubit, a second qubit, and a multi-resonant architecture. In various aspects, the multi-resonant architecture can include a first resonator that capacitively couples the first qubit to the second qubit and a second resonator that capacitively couples the first qubit to the second qubit. In various embodiments, the first qubit can have a first operating frequency, and the second qubit can have a second operating frequency. In various cases, the first resonator can have a first resonant frequency that is lower than the first operating frequency and lower than the second operating frequency. In various aspects, the second resonator can have a second resonant frequency that is higher than the first operating frequency and higher than the second operating frequency. In various embodiments, the first resonator and the second resonator can be λ / 2 resonators, and the first resonator and the second resonator can be in parallel. In various embodiments, the first resonant frequency can be approximately 3 gigahertz (GHz), the second resonant frequency can be approximately 6 GHz, and the first operating frequency and the second operating frequency can be between 4.5 GHz and 5.5 GHz. In various instances, the first resonant frequency, the second resonant frequency, the first operating frequency, and the second operating frequency can be fixed.

[0008] According to one or more embodiments, a device is provided. The device can include a first qubit, a second qubit, and a multi-resonant architecture. In various aspects, the multi-resonant architecture can include a resonator. In various instances, a first end of the resonator can be capacitively coupled to the first qubit and the second qubit. In various aspects, a second end of the resonator can be coupled to ground. In various embodiments, the first qubit can have a first operating frequency and the second qubit can have a second operating frequency. In various cases, the resonator can have a first harmonic frequency that is lower than the first operating frequency and lower than the second operating frequency. In various aspects, the resonator can have a second harmonic frequency that is higher than the first operating frequency and higher than the second operating frequency. In various embodiments, the resonator can be a λ / 4 resonator. In various embodiments, the first harmonic frequency can be approximately 2 gigahertz (GHz), the second harmonic frequency can be approximately 6 GHz, and the first operating frequency and the second operating frequency can be between 4.5 GHz and 5.5 GHz. In various instances, the first harmonic frequency, the second harmonic frequency, the first operating frequency, and the second operating frequency can be fixed.

[0009] According to one or more embodiments, a device is provided. The device can include a first qubit, a second qubit, and a multi-resonant architecture. In various aspects, the multi-resonant architecture can include a resonator and a differential direct coupler. In various instances, the resonator can capacitively couple the first qubit to the second qubit, and the differential direct coupler can capacitively couple the first qubit to the second qubit. In various cases, the differential direct coupler can capacitively couple opposing pads of the first qubit and the second qubit. In various embodiments, the first qubit can have a first operating frequency, and the second qubit can have a second operating frequency. In various cases, the resonator can have a resonant frequency higher than the first operating frequency and higher than the second operating frequency. In various embodiments, the resonator can be a λ / 2 resonator, and the resonator and the differential direct coupler can be in parallel. In various embodiments, the resonant frequency can be approximately 6 gigahertz (GHz), and the first and second operating frequencies can be between 4.5 GHz and 5.5 GHz. In various instances, the resonant frequency, the first and second operating frequencies can be fixed.

[0010] According to one or more embodiments, a device is provided. The device can include a first qubit, a second qubit, and a multi-resonant architecture. In various aspects, the multi-resonant architecture can include a resonator and a direct coupler. In various instances, a first end of the resonator can be capacitively coupled to the first qubit and the second qubit, and a second end of the resonator can be coupled to ground. In various aspects, the direct coupler can capacitively couple the first qubit to the second qubit. In various cases, the direct coupler can capacitively couple a common pad of the first qubit and the second qubit. In various embodiments, the first qubit can have a first operating frequency, and the second qubit can have a second operating frequency. In various cases, the resonator can have a resonant frequency higher than the first operating frequency and higher than the second operating frequency. In various embodiments, the resonator can be a λ / 4 resonator. In various embodiments, the resonant frequency can be approximately 6 gigahertz (GHz), and the first and second operating frequencies can be between 4.5 GHz and 5.5 GHz. In various instances, the resonant frequency, the first and second operating frequencies can be fixed.

[0011] According to one or more embodiments, an apparatus is provided. The apparatus can include a first transmon qubit having a first operating frequency, a second transmon qubit having a second operating frequency, and a multi-resonant architecture. In various aspects, the multi-resonant architecture can capacitively couple the first transmon qubit to the second transmon qubit. In various instances, the multi-resonant architecture can have a first resonant frequency lower than the first operating frequency and lower than the second operating frequency, and a second resonant frequency higher than the first operating frequency and higher than the second operating frequency. In various embodiments, the multi-resonant architecture can include a first λ / 2 resonator capacitively coupled to the first transmon qubit and the second transmon qubit, the first λ / 2 resonator exhibiting the first resonant frequency. In various instances, the multi-resonant architecture can include a second λ / 2 resonator capacitively coupled to the first transmon qubit and the second transmon qubit, the second λ / 2 resonator exhibiting a second resonant frequency. In various cases, the first λ / 2 resonator and the second λ / 2 resonator can be in parallel. In various other embodiments, the multi-resonant architecture can include a λ / 4 resonator. In various instances, a first end of the λ / 4 resonator can be coupled between the coupling capacitor of the first transmon qubit and the coupling capacitor of the second transmon qubit, and a second end of the λ / 4 resonator can be shorted to ground. In various cases, a first harmonic of the λ / 4 resonator can be the first resonant frequency, and a second harmonic of the λ / 4 resonator can be the second resonant frequency.

[0012] As described above, pairs of fixed-frequency qubits are conventionally coupled together via fixed-frequency microwave resonators. Specifically, for a first qubit and a second qubit, a first end of the fixed-frequency microwave resonator is capacitively coupled to the first qubit, and a second end of the fixed-frequency microwave resonator is capacitively coupled to the second qubit. Such a coupling structure can result in high coherence and / or a strong ZX interaction between the first qubit and the second qubit. However, such a coupling structure also results in an always-on ZZ interaction between the first qubit and the second qubit. This ZZ interaction can adversely affect the performance of a quantum computing system including the first qubit and the second qubit. Therefore, eliminating, minimizing, suppressing, or reducing this ZZ interaction, or a combination thereof, can improve the functionality of the quantum computing system.

[0013] As discussed above, there are two main conventional systems and / or techniques for suppressing and / or reducing ZZ interactions. The first conventional system and / or technique is the echo technique. The echo technique involves injecting additional pulses into a quantum computing system to neutralize, cancel, or destructively interfere with ZZ interactions, or a combination thereof. However, injecting these pulses requires time, and the time spent injecting these pulses can deplete the coherence budget of the quantum computing system. The second conventional system and / or technique for addressing ZZ interactions is the use of tunable frequency elements. Introducing tunable frequency elements into a quantum computing system can eliminate and / or reduce ZZ interactions. However, the use and / or complexity of tunable frequency elements introduces corresponding coherence degradation. In other words, conventional systems and / or techniques reduce ZZ interactions between coupled pairs of qubits at the expense of reduced coherence time.

[0014] Various embodiments of the present invention can solve one or more of these problems in the prior art. In various aspects, embodiments of the present invention can provide a multi-resonant coupling architecture capable of coupling a first qubit to a second qubit. In various instances, such a multi-resonant coupling architecture can reduce ZZ interactions between a first qubit and a second qubit without reducing the coupling strength and / or ZX interactions between the first qubit and the second qubit. In various instances, such a multi-resonant coupling architecture can include fixed-frequency elements and / or non-tunable elements, and thus, the multi-resonant coupling architecture can avoid introducing coherence degradation typically associated with tunable-frequency elements into a quantum computing system. Moreover, in various aspects, such a multi-resonant coupling architecture can eliminate the need to inject echoes into a quantum computing system. In other words, various embodiments of the present invention can provide a multi-resonant coupling architecture capable of reducing ZZ interactions between coupled qubits without introducing a corresponding reduction in coherence time, unlike conventional systems and / or techniques.

[0015] Various multi-resonant coupling architectures can be implemented to achieve these improved results. Consider a first qubit having a first operating frequency and a second qubit having a second operating frequency. In some embodiments, the multi-resonant coupling architecture can include a first λ / 2 resonator and a second λ / 2 resonator. In various instances, a first end of the first λ / 2 resonator can be coupled to a first coupling capacitor of the first qubit, and a second end of the first λ / 2 resonator can be coupled to a first coupling capacitor of the second qubit. Similarly, a first end of the second λ / 2 resonator can be coupled to a second coupling capacitor of the first qubit, and a second end of the second λ / 2 resonator can be coupled to a second coupling capacitor of the second qubit. In other words, the first λ / 2 resonator can capacitively couple the first qubit to the second qubit, and the second λ / 2 resonator can capacitively couple the first qubit to the second qubit, resulting in the first λ / 2 resonator and the second λ / 2 resonator being in parallel. In various instances, the first λ / 2 resonator can exhibit a first resonant frequency that is lower than the first operating frequency and lower than the second operating frequency. In various aspects, the second λ / 2 resonator can exhibit a second resonant frequency that is higher than the first operating frequency and higher than the second operating frequency. Moreover, in various aspects, the first resonant frequency and the second resonant frequency can be fixed. In various embodiments, such a multi-resonant coupling architecture can reduce the ZZ interaction between the first qubit and the second qubit (e.g., by an order of magnitude or more in some cases) without correspondingly reducing the coupling strength and / or cross-resonance gate speed between the first qubit and the second qubit. Moreover, such a multi-resonant coupling architecture may avoid introducing coherence degradation (eg, may not require echo or tunable frequency elements).

[0016] In other embodiments, the multi-resonant coupling architecture can include a λ / 4 resonator. In various aspects, a first end of the λ / 4 resonator can be coupled to a coupling capacitor of a first qubit, and the first end of the λ / 4 resonator can also be coupled to a coupling capacitor of a second qubit. That is, in various aspects, the first end of the λ / 4 resonator can be capacitively coupled to both the first qubit and the second qubit. In various instances, the second end of the λ / 4 resonator can be coupled to ground. In various aspects, the λ / 4 resonator can exhibit a first harmonic frequency that is lower than the first operating frequency and lower than the second operating frequency. In various instances, the λ / 4 resonator can exhibit a second harmonic frequency that is higher than the first operating frequency and higher than the second operating frequency. Moreover, in various aspects, the first harmonic frequency and the second harmonic frequency can be fixed. In various embodiments, such a multi-resonant coupled architecture can reduce ZZ interactions between a first qubit and a second qubit (e.g., by an order of magnitude or more in some cases) without correspondingly reducing the coupling strength and / or cross-resonance gate speed between the first qubit and the second qubit. Moreover, such a multi-resonant coupled architecture can avoid introducing coherence degradation (e.g., can not require echoes or tunable frequency elements).

[0017] In yet another embodiment, the multi-resonant coupling architecture can include a λ / 2 resonator and a differential direct coupler. In various instances, a first end of the λ / 2 resonator can be coupled to a first coupling capacitor of a first qubit, and a second end of the λ / 2 resonator can be coupled to a first coupling capacitor of a second qubit. Similarly, a first end of the differential direct coupler can be coupled to a second coupling capacitor of the first qubit, and a second end of the differential direct coupler can be coupled to a second coupling capacitor of the second qubit. In other words, the λ / 2 resonator can capacitively couple the first qubit to the second qubit, and the differential direct coupler can capacitively couple the first qubit to the second qubit, such that the λ / 2 resonator and the differential direct coupler are in parallel. In various aspects, the differential direct coupler can couple opposing pads of the first qubit and the second qubit. In various instances, the λ / 2 resonator can exhibit a resonant frequency that is higher than the first operating frequency and higher than the second operating frequency. Moreover, in various aspects, the resonant frequency can be fixed. In various embodiments, such a multi-resonant coupled architecture can reduce ZZ interactions between the first and second qubits (e.g., by an order of magnitude or more in some cases) without correspondingly reducing the coupling strength and / or cross-resonance gate speed between the first and second qubits. Moreover, such a multi-resonant coupled architecture can avoid introducing coherence degradation (e.g., can not require echoes or tunable frequency elements).

[0018] In yet another embodiment, the multi-resonant coupling architecture can include a λ / 4 resonator and a direct coupler. In various aspects, a first end of the λ / 4 resonator can be coupled to a first coupling capacitor of a first qubit, and the first end of the λ / 4 resonator can also be coupled to a first coupling capacitor of a second qubit. That is, in various aspects, the first end of the λ / 4 resonator can be capacitively coupled to both the first qubit and the second qubit. In various instances, the second end of the λ / 4 resonator can be coupled to ground. In various cases, the first end of the direct coupler can be coupled to a second coupling capacitor of the first qubit, and the second end of the direct coupler can be coupled to a second coupling capacitor of the second qubit. In various cases, the direct coupler can couple a common pad of the first qubit and the second qubit. In various aspects, the λ / 4 resonator can exhibit a resonant frequency higher than the first operating frequency and higher than the second operating frequency. Moreover, in various aspects, the resonant frequency can be fixed. In various embodiments, such a multi-resonant coupled architecture can reduce ZZ interactions between the first and second qubits (e.g., by an order of magnitude or more in some cases) without correspondingly reducing the coupling strength and / or cross-resonance gate speed between the first and second qubits. Moreover, such a multi-resonant coupled architecture can avoid introducing coherence degradation (e.g., can not require echo or tunable frequency elements).

[0019] Thus, various embodiments of the present invention can provide a multi-resonant coupling architecture that, unlike conventional systems and / or techniques, can reduce ZZ interactions between coupled qubits without a corresponding reduction in coherence time. Thus, various embodiments of the present invention constitute a distinct technical improvement over the prior art. [Brief explanation of the drawings]

[0020] [Figure 1] FIG. 1 is a block diagram of an example non-limiting system including two resonators that facilitate ZZ interaction reduction, according to one or more embodiments described herein. [Figure 2] FIG. 1 is a block diagram of an example non-limiting system including one resonator that facilitates ZZ interaction reduction, according to one or more embodiments described herein. [Figure 3] FIG. 1 is a block diagram of an example non-limiting system including a resonator and a differential direct coupler that facilitates ZZ interaction reduction, according to one or more embodiments described herein. [Figure 4] FIG. 1 is a block diagram of an example non-limiting system including a resonator and a direct coupler that facilitates ZZ interaction reduction, according to one or more embodiments described herein. [Figure 5] FIG. 10 shows an exemplary, non-limiting graph illustrating ZZ interaction reduction facilitated by one or more embodiments described herein. [Figure 6] FIG. 10 shows an exemplary, non-limiting graph illustrating ZZ interaction reduction facilitated by one or more embodiments described herein. [Figure 7] FIG. 1 is a block diagram of an example non-limiting qubit array that facilitates ZZ interaction reduction, in accordance with one or more embodiments described herein. [Figure 8] 1 is a flow diagram of an example non-limiting method including two resonators for facilitating ZZ interaction reduction, according to one or more embodiments described herein. [Figure 9] 1 is a flow diagram of an example non-limiting method including one resonator for facilitating ZZ interaction reduction according to one or more embodiments described herein. [Figure 10]1 is a flow diagram of an example non-limiting method including a resonator and a differential direct coupler that facilitates ZZ interaction reduction, according to one or more embodiments described herein. [Figure 11] 1 is a flow diagram of an example non-limiting method including a resonator and a direct coupler that facilitates ZZ interaction reduction, according to one or more embodiments described herein. [Figure 12] 1 is a flow diagram of an exemplary, non-limiting method for facilitating ZZ interaction reduction according to one or more embodiments described herein. [Figure 13] FIG. 1 is a block diagram of an exemplary non-limiting operating environment capable of facilitating one or more embodiments described herein. DETAILED DESCRIPTION OF THE INVENTION

[0021] The following detailed description is exemplary only and is not intended to limit the embodiments and / or applications or uses of the embodiments, nor is it intended to be bound by any expressed or implied information presented in the preceding Background or Summary sections or in the Detailed Description section.

[0022] One or more embodiments will now be described with reference to the drawings. In the drawings, like reference numerals are used to refer to like elements throughout. In the following description, for purposes of explanation, numerous specific details are set forth in order to provide a more thorough understanding of one or more embodiments. It will be apparent, however, that in various instances, one or more embodiments may be practiced without these specific details.

[0023] Consider two transmon qubits coupled by a fixed-frequency bus resonator, as in conventional systems and / or techniques. The coupling strength can be quantified by the exchange coupling J, which can be given by:

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[0024] As mentioned above, conventional systems and / or techniques for reducing, suppressing, eliminating, and / or minimizing ZZ interactions without also reducing, suppressing, eliminating, and / or minimizing ZX interactions employ echo techniques and / or tunable frequency elements. Echo techniques involve injecting multiple pulse signals into a quantum computing system to neutralize, cancel, nullify, compensate, and / or destructively interfere with ZZ interactions. However, injecting such pulse signals into a quantum computing system requires time, which can consume the quantum computing system's already limited coherence budget. Tunable frequency elements can be used to improve ZZ interactions. However, tunable frequency elements are also associated with coherence degradation. Therefore, conventional systems and / or techniques reduce ZZ interactions at the expense of a reduction in coherence time. However, various embodiments of the present invention can reduce ZZ interactions without this corresponding reduction in coherence time.

[0025] The inventors of various embodiments of the present invention have recognized that, in various instances, the incorporation of a second coupler mode can reduce and / or cancel the ZZ interaction while maintaining finite J. In various instances, the Hamiltonian H when a second coupler mode is incorporated can be described by the following equation:

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[0026] Various embodiments of the present invention can provide a multi-resonant coupled architecture that can reduce ZZ interaction between two qubits without a corresponding reduction in coherence time while maintaining finite exchange coupling J. Consider again a first qubit having a first operating frequency and a second qubit having a second operating frequency. In various aspects, the multi-resonant architecture can capacitively couple the first qubit to the second qubit. In various instances, the multi-resonant architecture can have a first pole that is higher than the first operating frequency and higher than the second operating frequency. In various instances, the multi-resonant architecture can have a second pole that is lower than the first operating frequency and lower than the second operating frequency. In various cases, the multi-resonant architecture can have a direct coupling term (e.g., a direct coupler that capacitively couples the first qubit to the second qubit) rather than a second pole. In various instances, the multi-resonant architecture can exhibit zero ZZ interaction and zero exchange coupling J at a first set of qubit frequencies. In various embodiments, the multi-resonant architecture can exhibit zero ZZ interaction and non-zero exchange coupling J at the second set of qubit frequencies. In various cases, the multi-resonant architecture can be non-tunable.

[0027] In various embodiments, the multi-resonant architecture can include a first resonator and a second resonator. In various instances, the first resonator can capacitively couple the first qubit to the second qubit. That is, a first end of the first resonator can be coupled to the first coupling capacitor of the first qubit, and a second end of the first resonator can be coupled to the first coupling capacitor of the second qubit. Similarly, the second resonator can capacitively couple the first qubit to the second qubit. That is, a first end of the second resonator can be coupled to the second coupling capacitor of the first qubit, and a second end of the second resonator can be coupled to the second coupling capacitor of the second qubit. In various instances, the first resonator can be in parallel with the second resonator. In various aspects, both the first resonator and the second resonator can be λ / 2 resonators. In various instances, the first resonator can have a first resonant frequency that is lower than the first operating frequency of the first qubit and lower than the second operating frequency of the second qubit. In various cases, the second resonator can have a second resonant frequency that is higher than the first operating frequency of the first qubit and higher than the second operating frequency of the second qubit. In various instances, the first resonant frequency can be approximately 3 GHz, the second resonant frequency can be approximately 6 GHz, and the first operating frequency and the second operating frequency can be in the range of 4.5 GHz to 5.5 GHz. In various instances, the first resonator and / or the second resonator can be non-tunable. In various embodiments, such a multi-resonant architecture can reduce the ZZ interaction between the first qubit and the second qubit (e.g., by an order of magnitude or more in some instances) without correspondingly reducing the ZX interaction and / or exchange coupling J between the first qubit and the second qubit. Moreover, such a multi-resonant architecture can achieve this result without implementing multiple pulse-echo and / or tunable frequency elements.Thus, such multi-resonant architectures can, in various instances, reduce ZZ interactions without the coherence degradation associated with conventional systems and / or techniques.

[0028] In various other embodiments, the multi-resonant architecture can include a resonator. In various instances, a first end of the resonator can be capacitively coupled to the coupling capacitor of the first qubit and to the coupling capacitor of the second qubit. That is, the first end of the resonator can be capacitively coupled to both the first qubit and the second qubit. In various instances, the second end of the resonator can be coupled to ground. In various aspects, the resonator can be a λ / 4 resonator. In various instances, the resonator can have a first harmonic frequency that is lower than the first operating frequency of the first qubit and lower than the second operating frequency of the second qubit. In various cases, the resonator can have a second harmonic frequency that is higher than the first operating frequency of the first qubit and higher than the second operating frequency of the second qubit. In various instances, the first harmonic frequency can be approximately 2 GHz, the second harmonic frequency can be approximately 6 GHz, and the first and second operating frequencies can be in the range of 4.5 GHz to 5.5 GHz. In various instances, the resonator can be non-tunable. In various embodiments, such a multi-resonant architecture can reduce the ZZ interaction between the first and second qubits (e.g., by an order of magnitude or more in some cases) without a corresponding reduction in the ZX interaction and / or exchange coupling J between the first and second qubits. Moreover, such a multi-resonant architecture can achieve this result without implementing multiple pulse-echo techniques and / or tunable frequency elements. Thus, in various instances, such a multi-resonant architecture can reduce the ZZ interaction without the coherence degradation associated with conventional systems and / or techniques.

[0029] In various other embodiments, the multi-resonant architecture can include a resonator and a differential direct coupler. In various instances, the resonator can capacitively couple a first qubit to a second qubit. That is, a first end of the resonator can couple to a first coupling capacitor of the first qubit, and a second end of the resonator can couple to a first coupling capacitor of the second qubit. Similarly, in various instances, the differential direct coupler can capacitively couple a first qubit to a second qubit. That is, a first end of the differential direct coupler can couple to a second coupling capacitor of the first qubit, and a second end of the differential direct coupler can couple to a second coupling capacitor of the second qubit. In various instances, the differential direct coupler can couple opposing pads of the first qubit and the second qubit together. In various cases, the resonator can be in parallel with the differential direct coupler. In various aspects, the resonator can be a λ / 2 resonator. In various instances, the resonator can have a resonant frequency that is higher than the first operating frequency of the first qubit and higher than the second operating frequency of the second qubit. In various instances, the resonant frequency can be approximately 6 GHz, and the first and second operating frequencies can be in the range of 4.5 GHz to 5.5 GHz. In various instances, the resonator can be non-tunable. In various aspects, the differential direct coupler can be any suitable short section of transmission line (e.g., short in the sense that its resonant frequency is greater than approximately 30 GHz) that can produce frequency-independent coupling at a typical transmon qubit frequency of approximately 5 GHz. In various aspects, such a multi-resonant architecture can reduce the ZZ interaction between the first qubit and the second qubit (e.g., by an order of magnitude or more in some cases) without correspondingly reducing the ZX interaction and / or exchange coupling J between the first qubit and the second qubit.Moreover, such multi-resonant architectures can achieve this result without implementing multiple pulse-echo and / or tunable frequency elements. Thus, in various instances, such multi-resonant architectures can reduce ZZ interactions without the coherence degradation associated with conventional systems and / or techniques.

[0030] In various other embodiments, the multi-resonant architecture can include a resonator and a direct coupler. In various instances, a first end of the resonator can capacitively couple to both the first qubit and the second qubit. That is, the first end of the resonator can couple to the first coupling capacitor of the first qubit, and the first end of the resonator can also couple to the first coupling capacitor of the second qubit. In various aspects, the direct coupler can capacitively couple the first qubit to the second qubit. That is, the first end of the direct coupler can couple to the second coupling capacitor of the first qubit, and the second end of the direct coupler can couple to the second coupling capacitor of the second qubit. In various instances, the direct coupler can couple the common pads of the first qubit and the second qubit together. In various aspects, the resonator can be a λ / 4 resonator. In various instances, the resonator can have a resonant frequency that is higher than the first operating frequency of the first qubit and higher than the second operating frequency of the second qubit. In various instances, the resonant frequency can be approximately 6 GHz, and the first and second operating frequencies can be in the range of 4.5 GHz to 5.5 GHz. In various instances, the resonator can be non-tunable. In various aspects, the direct coupler can be any suitable short section of transmission line (e.g., short in the sense that its resonant frequency is greater than approximately 30 GHz) that can cause frequency-independent coupling at a typical transmon qubit frequency of approximately 5 GHz. In various aspects, such a multi-resonant architecture can reduce the ZZ interaction between the first qubit and the second qubit (e.g., by an order of magnitude or more in some cases) without correspondingly reducing the ZX interaction and / or exchange coupling J between the first qubit and the second qubit.Moreover, such multi-resonant architectures can achieve this result without implementing multiple pulse-echo and / or tunable frequency elements. Thus, in various instances, such multi-resonant architectures can reduce ZZ interactions without the coherence degradation associated with conventional systems and / or techniques.

[0031] Various embodiments of the present invention include novel systems and / or techniques for facilitating multi-resonant coupling architectures for ZZ interaction reduction that are not abstract, natural phenomena, laws of nature, or implementable by a set of human mental acts. Instead, various embodiments of the present invention include systems and / or techniques for facilitating ZZ interactions that do not require multi-pulse echoes and / or tunable frequency elements and that do not correspondingly reduce ZX interaction and / or exchange coupling J. Reduction of ZX interaction can adversely affect the performance of a quantum computing system. Additionally, implementing echoes and / or tunable frequency elements can adversely affect the coherence budget of a quantum computing system. Because various embodiments of the present invention can reduce ZZ interaction without correspondingly reducing ZX interaction and without implementing echoes and / or tunable frequency elements, various embodiments of the present invention can reduce undesirable ZZ interaction while maintaining non-zero exchange coupling J without the coherence degradation typically associated with conventional systems and / or techniques. In other words, embodiments of the present invention provide novel qubit-coupling architectures that can be implemented within quantum computing systems (e.g., on quantum computing chips / substrates) to improve the performance and / or functionality of the quantum computing systems. As such, various embodiments of the present invention constitute distinct technical improvements over the prior art.

[0032] In its various aspects, it should be appreciated that the drawings of the present disclosure are illustrative and non-limiting only and are not necessarily drawn to scale.

[0033] FIG. 1 shows a block diagram of an exemplary, non-limiting system 100 including two resonators that can facilitate ZZ interaction reduction in accordance with one or more embodiments described herein. As shown, in various aspects, system 100 can comprise a first qubit 102 and a second qubit 104. As shown in FIG. 1, first qubit 102 can be a fixed-frequency Transmon qubit. That is, first qubit 102 can comprise a Josephson junction 118 shunted by a capacitor 120. However, in various instances, first qubit 102 can be any suitable type of superconducting qubit (e.g., a charge qubit, a phase qubit, a flux qubit). In various aspects, first qubit 102 can be any suitable fixed-frequency superconducting qubit (e.g., a qubit whose operating frequency is not tunable). Also shown in FIG. 1, second qubit 104 can be a fixed-frequency Transmon qubit. That is, second qubit 104 may comprise a Josephson junction 122 shunted by a capacitor 124. However, in various instances, second qubit 104 may be any suitable type of superconducting qubit (e.g., a charge qubit, a phase qubit, a flux qubit). In various aspects, second qubit 104 may be any suitable fixed-frequency superconducting qubit (e.g., a qubit whose operating frequency is not tunable).

[0034] In various other embodiments, first qubit 102 and / or second qubit 104 may be tunable and / or weakly tunable.

[0035] In various embodiments, the first qubit 102 can have a first operating frequency. In various instances, the second qubit 104 can have a second operating frequency. In various aspects, the first operating frequency can have any suitable value, and the second operating frequency can have any suitable value. In various instances, the first operating frequency can be in a range of 4.5 GHz to 5.5 GHz. In various aspects, the second operating frequency can be in a range of 4.5 GHz to 5.5 GHz. In various instances, the first operating frequency and the second operating frequency can be separated by approximately 150 megahertz (MHz) (e.g., 150 MHz detuning and / or frequency separation, as measured within any suitable measurement resolution and / or measurement error). For example, the first operating frequency can be approximately 150 MHz lower than the second operating frequency. In various embodiments, the first qubit 102 can have any suitable anharmonicity, the second qubit 104 can have any suitable anharmonicity, and the first qubit 102 and the second qubit 104 can be in the stradling regime, where their frequency separation is less than the anharmonicity of both qubits.

[0036] In various embodiments, first qubit 102 can have first coupling capacitor 108 and second coupling capacitor 114. Similarly, second qubit 104 can have first coupling capacitor 110 and second coupling capacitor 116. In various instances, coupling capacitors 108, 110, 114, and 116 can be any suitable coupling capacitors used in a quantum computing system.

[0037] In various instances, system 100 may comprise a first resonator 106 and a second resonator 112. In various aspects, first resonator 106 may be any suitable fixed-frequency microwave resonator (e.g., a bus resonator) for use in a quantum computing system. In various aspects, first resonator 106 may be any suitable λ / 2 resonator. Similarly, in various instances, second resonator 112 may be any suitable fixed-frequency microwave resonator (e.g., a bus resonator) for use in a quantum computing system. In various aspects, second resonator 112 may be any suitable λ / 2 resonator.

[0038] As shown, the first resonator 106, in various embodiments, can capacitively couple the first qubit 102 to the second qubit 104. Specifically, in various instances, the first resonator 106 can have a first end (e.g., the left-hand end of the first resonator 106 as shown in FIG. 1 ) and a second end (e.g., the right-hand end of the first resonator 106 as shown in FIG. 1 ). In various cases, the first end of the first resonator 106 can be coupled to the first coupling capacitor 108 of the first qubit 102. In various aspects, the second end of the first resonator 106 can be coupled to the first coupling capacitor 110 of the second qubit 104. Similarly, the second resonator 112, in various embodiments, can capacitively couple the first qubit 102 to the second qubit 104. Specifically, in various instances, the second resonator 112 may have a first end (e.g., the left-hand end of the second resonator 112 as shown in FIG. 1 ) and a second end (e.g., the right-hand end of the second resonator 112 as shown in FIG. 1 ). In various cases, the first end of the second resonator 112 may be coupled to the second coupling capacitor 114 of the first qubit 102. In various embodiments, the second end of the second resonator 112 may be coupled to the second coupling capacitor 116 of the second qubit 104.

[0039] As shown, in various instances, the first resonator 106 and the second resonator 112 may be in parallel (eg, as opposed to in series).

[0040] In various embodiments, the first resonator 106 can have a first resonant frequency. In various cases, the first resonant frequency can be lower than the first operating frequency of the first qubit 102. In various instances, the first resonant frequency can also be lower than the second operating frequency of the second qubit 104. In various embodiments, the second resonator 112 can have a second resonant frequency. In various cases, the second resonant frequency can be higher than the first operating frequency of the first qubit 102. In various instances, the second resonant frequency can also be higher than the second operating frequency of the second qubit 104. In various embodiments, the first resonant frequency can be approximately 3 GHz (e.g., the first resonant frequency can be within any suitable measurement resolution and / or measurement error of 3 GHz). In various instances, the second resonant frequency can be approximately 6 GHz (e.g., the second resonant frequency can be within any suitable measurement resolution and / or measurement error of 6 GHz). In various embodiments, the resonant frequency of the fixed frequency microwave resonator may depend on the shape and / or size of the fixed frequency microwave resonator (e.g., a long microwave resonator may achieve a low resonant frequency, while a short microwave resonator may achieve a high resonant frequency).

[0041] In various instances, the first resonator 106, the second resonator 112, and the coupling capacitors 108, 110, 114, and 116 can be considered a multi-resonant coupled architecture 126. As explained above, the multi-resonant coupled architecture 126 can reduce the ZZ interaction between the first qubit 102 and the second qubit 104 without correspondingly reducing the ZX interaction (e.g., exchange coupling J) between the first qubit 102 and the second qubit 104. Moreover, the multi-resonant coupled architecture 126 does not require the injection of multiple pulse echoes into the system 100. Furthermore, the multi-resonant coupled architecture 126 can be constructed without tunable frequency elements (e.g., the first resonator 106 and the second resonator 112 can be fixed-frequency microwave resonators). Thus, in various aspects, multi-resonant coupled architecture 126 can reduce ZZ interactions between first qubit 102 and second qubit 104 without correspondingly degrading the coherence time of system 100. Thus, multi-resonant coupled architecture 126 can constitute a clear and tangible technical advantage over conventional systems and / or techniques.

[0042] 2 shows a block diagram of an exemplary, non-limiting system 200 including a resonator that can facilitate ZZ interaction reduction according to one or more embodiments described herein. As shown, in various aspects, system 200 can comprise a first qubit 102 and a second qubit 104, substantially as described above.

[0043] As shown, in various embodiments, first qubit 102 may have coupling capacitor 208. Similarly, second qubit 104 may have coupling capacitor 210. In various instances, coupling capacitors 208 and 210 may be any suitable coupling capacitors used in a quantum computing system.

[0044] In various instances, system 200 may include a resonator 202. In various embodiments, resonator 202 may be any suitable fixed-frequency microwave resonator (e.g., a bus resonator) used in a quantum computing system. In various embodiments, resonator 202 may be any suitable λ / 4 resonator. In various instances, resonator 202 may be a long, low-frequency λ / 4 resonator.

[0045] As shown, the resonator 202, in various embodiments, can have a first end 204 and a second end 206. In various instances, the first end 204 of the resonator 202 can be capacitively coupled to the first qubit 102 and can be capacitively coupled to the second qubit 104. Specifically, in various aspects, the first end 204 of the resonator 202 can be coupled to a coupling capacitor 208 of the first qubit 102. Additionally, the first end 204 of the resonator 202 can also be coupled to a coupling capacitor 210 of the second qubit 104. In various instances, the second end 206 of the resonator 202 can be coupled and / or shorted to ground 212.

[0046] In various embodiments, the resonator 202 can have a first harmonic frequency. In various cases, the first harmonic frequency can be lower than the first operating frequency of the first qubit 102. In various instances, the first harmonic frequency can also be lower than the second operating frequency of the second qubit 104. In various embodiments, the resonator 202 can have a second harmonic frequency. In various cases, the second harmonic frequency can be higher than the first operating frequency of the first qubit 102. In various instances, the second harmonic frequency can also be higher than the second operating frequency of the second qubit 104. In various embodiments, the first harmonic frequency can be approximately 2 GHz (e.g., the first harmonic frequency can be within any suitable measurement resolution and / or measurement error of 2 GHz). In various instances, the second harmonic frequency may be approximately 6 GHz (e.g., the second harmonic frequency may be within any suitable measurement resolution and / or measurement error of 6 GHz). In other words, system 200 may have a single resonating element (e.g., resonator 202) or may have two resonances (e.g., a first harmonic frequency and a second harmonic frequency).

[0047] In various instances, resonator 202, ground 212, and coupling capacitors 208 and 210 can be considered a multi-resonant coupled architecture 214. As explained above, multi-resonant coupled architecture 214 can reduce the ZZ interaction between first qubit 102 and second qubit 104 without correspondingly reducing the ZX interaction (e.g., exchange coupling J) between first qubit 102 and second qubit 104. Moreover, multi-resonant coupled architecture 214 does not require the injection of multi-pulse echoes into system 200. Furthermore, multi-resonant coupled architecture 214 can be constructed without a tunable frequency element (e.g., resonator 202 can be a fixed-frequency microwave resonator). Thus, multi-resonant coupled architecture 214 can, in various aspects, reduce the ZZ interaction between first qubit 102 and second qubit 104 without correspondingly degrading the coherence time of system 200. Thus, the multi-resonant coupled architecture 214 may constitute a clear and tangible technical advantage over conventional systems and / or techniques.

[0048] 3 shows a block diagram of an exemplary, non-limiting system 300 including a resonator and a differential direct coupler that can facilitate ZZ interaction reduction in accordance with one or more embodiments described herein. As shown, in various aspects, the system 300 can include a first qubit 102 and a second qubit 104, substantially as described above.

[0049] As shown, in various embodiments, first qubit 102 may have first coupling capacitor 312 and may have second coupling capacitor 318. Similarly, second qubit 104 may have first coupling capacitor 314 and may have second coupling capacitor 320. In various instances, coupling capacitors 312, 314, 318, and 320 may be any suitable coupling capacitors used in a quantum computing system.

[0050] Moreover, in various instances, the first qubit 102 may have a first pad / node 302 and may have a second pad / node 304. Similarly, the second qubit 104 may have a first pad / node 306 and may have a second pad / node 308. In various embodiments, the first pad / node 302 of the first qubit 102 may be considered common to the second pad / node 308 of the second qubit 104 (e.g., a common qubit pad and / or node). Moreover, the first pad / node 302 of the first qubit 102 may be considered opposite the first pad / node 306 of the second qubit 104 (e.g., an opposite qubit pad and / or node). Similarly, in various instances, the second pad / node 304 of the first qubit 102 may be considered common to the first pad / node 306 of the second qubit 104 (e.g., a common qubit pad and / or node). Additionally, the second pad / node 304 of the first qubit 102 may be considered opposite the second pad / node 308 of the second qubit 104 (e.g., an opposite qubit pad and / or node).

[0051] In various instances, system 300 may include a resonator 310 and a differential direct coupler 316. In various embodiments, resonator 310 may be any suitable fixed-frequency microwave resonator (e.g., a bus resonator) used in a quantum computing system. In various embodiments, resonator 310 may be any suitable λ / 2 resonator. In various instances, differential direct coupler 316 may be any suitable direct coupling and / or wiring used in a quantum computing system.

[0052] As shown, the resonator 310, in various embodiments, can capacitively couple the first qubit 102 to the second qubit 104. Specifically, in various instances, the resonator 310 can have a first end (e.g., the left-hand end of the resonator 310 as shown in FIG. 3 ) and a second end (e.g., the right-hand end of the resonator 310 as shown in FIG. 3 ). In various cases, the first end of the resonator 310 can be coupled to a first coupling capacitor 312 of the first qubit 102. In various aspects, the second end of the resonator 310 can be coupled to a first coupling capacitor 314 of the second qubit 104. Similarly, the differential direct coupler 316, in various embodiments, can capacitively couple the first qubit 102 to the second qubit 104. Specifically, in various instances, the differential direct coupler 316 may have a first end (e.g., the left-hand end of the differential direct coupler 316 as shown in FIG. 3 ) and a second end (e.g., the right-hand end of the differential direct coupler 316 as shown in FIG. 3 ). In various cases, the first end of the differential direct coupler 316 may be coupled to the second coupling capacitor 318 of the first qubit 102. In various aspects, the second end of the differential direct coupler 316 may be coupled to the second coupling capacitor 320 of the second qubit 104. As shown, in various instances, the second coupling capacitor 318 of the first qubit 102 may be coupled to the first pad / node 302 of the first qubit 102. Also as shown, the second coupling capacitor 320 of the second qubit 104 may be coupled to the first pad / node 306 of the second qubit 104.Thus, in various embodiments, differential direct coupler 316 can be thought of as capacitively coupling opposing pads / nodes of first qubit 102 and second qubit 104 together (e.g., differential direct coupler 316 ultimately couples first pad / node 302 of first qubit 102 to first pad / node 306 of second qubit 104, and first pad / node 302 of first qubit 102 can be thought of as facing first pad / node 306 of second qubit 104).

[0053] As shown, in various instances, the resonator 310 and the differential direct coupler 316 may be in parallel (e.g., as opposed to in series).

[0054] In various embodiments, the resonator 310 can have a resonant frequency. In various cases, the resonant frequency can be higher than the first operating frequency of the first qubit 102. In various instances, the resonant frequency can also be higher than the second operating frequency of the second qubit 104. In various embodiments, the resonant frequency can be approximately 6 GHz (e.g., the resonant frequency can be within any suitable measurement resolution and / or measurement error of 6 GHz). In various aspects, the differential direct coupler 316 can be any suitable short section of transmission line (e.g., short in the sense that its resonant frequency is greater than approximately 30 GHz) that can produce frequency-independent coupling at a typical transmon qubit frequency of approximately 5 GHz.

[0055] In various instances, resonator 310, differential direct coupler 316, and coupling capacitors 312, 314, 318, and 320 can be considered as a multi-resonant coupled architecture 322. As explained above, multi-resonant coupled architecture 322 can reduce the ZZ interaction between first qubit 102 and second qubit 104 without correspondingly reducing the ZX interaction (e.g., exchange coupling J) between first qubit 102 and second qubit 104. Moreover, multi-resonant coupled architecture 322 does not require the injection of multi-pulse echoes into system 300. Furthermore, multi-resonant coupling architecture 322 can be constructed without a tunable frequency element (e.g., resonator 310 can be a fixed-frequency microwave resonator, and differential direct coupler 316 can be any appropriately short section of transmission line (e.g., short in the sense that its resonant frequency is greater than about 30 GHz) that can cause frequency-independent coupling at a typical Transmon qubit frequency of about 5 GHz, or can be considered a non-resonant structure). Thus, multi-resonant coupling architecture 322 can, in various aspects, reduce ZZ interactions between first qubit 102 and second qubit 104 without correspondingly degrading the coherence time of system 300. Moreover, in various embodiments, differential direct coupler 316 can be a direct coupler that is short and / or compact, and resonator 310 can be a short microwave resonator (e.g., a microwave resonator capable of generating a high resonant frequency, such as 6 GHz, can be shorter and / or more compact than a microwave resonator capable of generating a low resonant frequency, such as 3 GHz). Thus, in various instances, the multi-resonant coupling architecture 322 can be made significantly more compact (and therefore more suitable for scaling to larger device sizes) than conventional systems and / or techniques, and thus the multi-resonant coupling architecture 322 can constitute a clear and tangible technical advantage over conventional systems and / or techniques.

[0056] 4 shows a block diagram of an exemplary, non-limiting system 400 including a resonator and a direct coupler that can facilitate ZZ interaction reduction in accordance with one or more embodiments described herein. As shown, in various aspects, the system 400 can include a first qubit 102 and a second qubit 104, substantially as described above.

[0057] As shown, in various embodiments, first qubit 102 may have first coupling capacitor 408 and may have second coupling capacitor 416. Similarly, second qubit 104 may have first coupling capacitor 410 and may have second coupling capacitor 418. In various instances, coupling capacitors 408, 410, 416, and 418 may be any suitable coupling capacitors used in a quantum computing system.

[0058] Moreover, in various instances, the first qubit 102 may have a first pad / node 302 and a second pad / node 304, substantially as described above. Similarly, the second qubit 104 may have a first pad / node 306 and a second pad / node 308, substantially as described above. As explained above, in various embodiments, the first pad / node 302 of the first qubit 102 may be considered common to the second pad / node 308 of the second qubit 104 (e.g., a common qubit pad and / or node). Moreover, the first pad / node 302 of the first qubit 102 may be considered opposite the first pad / node 306 of the second qubit 104 (e.g., an opposite qubit pad and / or node). Similarly, in various instances, the second pad / node 304 of the first qubit 102 may be considered common to the first pad / node 306 of the second qubit 104 (e.g., a common qubit pad and / or node). Additionally, the second pad / node 304 of the first qubit 102 may be considered opposite the second pad / node 308 of the second qubit 104 (e.g., an opposite qubit pad and / or node).

[0059] In various instances, system 400 may comprise a resonator 402 and a direct coupler 414. In various embodiments, resonator 402 may be any suitable fixed frequency microwave resonator (e.g., a bus resonator) used in a quantum computing system. In various embodiments, resonator 402 may be any suitable λ / 4 resonator. In various instances, direct coupler 414 may be any suitable direct coupling and / or wiring used in a quantum computing system.

[0060] As shown, the resonator 402 can have a first end 404 and a second end 406 in various embodiments. In various cases, the first end 404 of the resonator 402 can be capacitively coupled to the first qubit 102 and can be capacitively coupled to the second qubit 104. Specifically, in various instances, the first end 404 of the resonator 402 can be coupled to a first coupling capacitor 408 of the first qubit 102. Additionally, in various aspects, the first end 404 of the resonator 402 can also be coupled to a first coupling capacitor 410 of the second qubit 104. In various instances, the second end 406 of the resonator 402 can be coupled and / or shorted to ground 412.

[0061] In various embodiments, the direct coupler 414 can capacitively couple the first qubit 102 to the second qubit 104. Specifically, in various instances, the direct coupler 414 can have a first end (e.g., the left-hand end of the direct coupler 414 as shown in FIG. 4 ) and a second end (e.g., the right-hand end of the direct coupler 414 as shown in FIG. 4 ). In various cases, the first end of the direct coupler 414 can be coupled to the second coupling capacitor 416 of the first qubit 102. In various aspects, the second end of the direct coupler 414 can be coupled to the second coupling capacitor 418 of the second qubit 104. As shown, in various instances, the second coupling capacitor 416 of the first qubit 102 can be coupled to the second pad / node 304 of the first qubit 102. As also shown, the second coupling capacitor 418 of the second qubit 104 may be coupled to the first pad / node 306 of the second qubit 104. Thus, in various embodiments, the direct coupler 414 may be considered to capacitively couple the common pad / node of the first qubit 102 and the second qubit 104 together (e.g., the direct coupler 414 ultimately couples the second pad / node 304 of the first qubit 102 to the first pad / node 306 of the second qubit 104, and the second pad / node 304 of the first qubit 102 may be considered to be common with the first pad / node 306 of the second qubit 104).

[0062] In various embodiments, the resonator 402 can have a resonant frequency. In various cases, the resonant frequency can be higher than the first operating frequency of the first qubit 102. In various instances, the resonant frequency can also be higher than the second operating frequency of the second qubit 104. In various embodiments, the resonant frequency can be approximately 6 GHz (e.g., the resonant frequency can be within any suitable measurement resolution and / or measurement error of 6 GHz). In various aspects, the direct coupler 414 can be any suitable short section of transmission line (e.g., short in the sense that its resonant frequency is greater than approximately 30 GHz) that can cause frequency-independent coupling at a typical transmon qubit frequency of approximately 5 GHz.

[0063] In various instances, the resonator 402, the direct coupler 414, the ground 412, and the coupling capacitors 408, 410, 416, and 418 can be considered as a multi-resonant coupled architecture 420. As explained above, the multi-resonant coupled architecture 420 can reduce the ZZ interaction between the first qubit 102 and the second qubit 104 without correspondingly reducing the ZX interaction (e.g., exchange coupling J) between the first qubit 102 and the second qubit 104. Moreover, the multi-resonant coupled architecture 420 does not require the injection of multi-pulse echoes into the system 400. Furthermore, multi-resonant coupling architecture 420 can be constructed without a tunable frequency element (e.g., resonator 402 can be a fixed-frequency microwave resonator, and direct coupler 414 can be any suitably short section of transmission line (e.g., short in the sense that its resonant frequency is greater than about 30 GHz) that can cause frequency-independent coupling at a typical Transmon qubit frequency of about 5 GHz, or can be considered a non-resonant structure). Thus, multi-resonant coupling architecture 420 can, in various aspects, reduce ZZ interactions between first qubit 102 and second qubit 104 without correspondingly degrading the coherence time of system 400. Moreover, in various embodiments, direct coupler 414 can be a direct coupler that is short and / or compact, and resonator 402 can be a short microwave resonator (e.g., a microwave resonator that can have a high resonator frequency, such as 6 GHz, can be shorter and / or more compact than a microwave resonator that can have a low resonant frequency, such as 2 GHz). Thus, in various instances, the multi-resonant coupled architecture 420 can be made significantly more compact (and therefore more suitable for scaling to larger device sizes) than conventional systems and / or techniques, and thus the multi-resonant coupled architecture 420 can constitute a clear and tangible technical advantage over conventional systems and / or techniques.

[0064] 5 and 6 show exemplary non-limiting graphs 500 and 600 illustrating ZZ interaction reduction facilitated by one or more embodiments described herein.

[0065] As shown in Figures 5-6, graph 500 shows the results of a computational simulation of various embodiments of the present invention, and graph 600 shows the results of a computational simulation of various embodiments of the present invention compared to conventional qubit coupling techniques. The inventors of various embodiments of the present invention performed these computational simulations to calculate and / or approximate the ZX interaction (e.g., coupling strength or exchange coupling J) between two fixed-frequency superconducting qubits and to calculate and / or approximate the ZZ interaction between two fixed-frequency superconducting qubits. In some of these simulations, the inventors assumed that the two fixed-frequency superconducting qubits were conventionally coupled. In other of these simulations, the inventors assumed that the two fixed-frequency superconducting qubits were coupled via a multi-resonant coupling architecture, such as multi-resonant coupling architecture 420. For these simulations, we used the following values: g = 80 MHz, where g indicates the coupling strength between the transmon qubit and the bus resonator; f = 5000 MHz, where f indicates the frequency of the upper transmon qubit; α = -320 MHz, where α indicates the anharmonicity of the transmon qubit; ω = 6100 MHz, where ω indicates the bus resonator frequency; and J = 4.5 MHz, where J indicates the transmon direct coupler exchange interaction. Additionally, the frequency separation between the two fixed-frequency superconducting qubits was set to 150 MHz. In various embodiments, simulations were performed with the drive signal set to 60 MHz.

[0066] Graph 500 shows a subset of simulation results for various embodiments of multi-resonant coupling architecture 420. As shown, graph 500 includes line 502 that indicates and / or corresponds to the value of the ZX interaction between two qubits as a function of the upper qubit operating frequency when the qubits are coupled by multi-resonant coupling architecture 420. That is, line 502 corresponds to the variable "ZX (60 MHz drive)" as described in the legend to FIG. 5 . Also as shown, graph 500 includes line 504 that indicates and / or corresponds to the value of the ZZ interaction between two qubits as a function of the upper qubit operating frequency when the qubits are coupled by multi-resonant coupling architecture 420. That is, line 504 corresponds to the variable "ZZ" as described in the legend to FIG. 5 . As indicated by reference numeral 506, there exists a particular range of upper qubit operating frequencies (e.g., 5150 MHz to 5200 MHz) where the ZZ interaction drops significantly (e.g., zero ZZ interaction) and the ZX interaction does not drop significantly (e.g., non-zero ZX interaction). In other words, graph 500 illustrates a particular frequency band where various embodiments of the present invention cause a significant reduction in the ZZ interaction without causing a corresponding reduction in the ZX interaction. This reduction in the ZZ interaction without a corresponding reduction in the ZX interaction is facilitated by various embodiments of the present invention. Moreover, because various embodiments of the present invention do not require echo techniques and / or tunable frequency elements, various embodiments of the present invention can facilitate such ZZ reduction without the corresponding coherence degradation typically associated with conventional systems and / or techniques.

[0067] Graph 600 is similar to graph 500 in that it illustrates simulation results for various embodiments of multi-resonant coupling architecture 420. However, graph 600 illustrates such results across a larger frequency range (e.g., from upper qubit operating frequencies of 4 GHz to 5.75 GHz) and also includes results associated with conventional coupling techniques. As shown, graph 600 includes a line 602 that indicates and / or corresponds to values ​​of the ZX interaction between two qubits as a function of the upper qubit operating frequency when the qubits are conventionally coupled. That is, line 602 corresponds to the variable “J(impedance)” as described in the legend to FIG. 6 . Graph 600 also includes a line 604 that indicates and / or corresponds to values ​​of the ZZ interaction between two qubits as a function of the upper qubit operating frequency when the qubits are conventionally coupled. That is, line 604 corresponds to the variable “ZZ(impedance)” as described in the legend to FIG. 6 . As shown, conventional coupling techniques can significantly reduce both the ZX interaction and the ZZ interaction within a particular frequency band (e.g., 4.5 GHz to 4.75 GHz). However, as shown, there is no frequency band where conventional coupling techniques significantly reduce the ZZ interaction without correspondingly reducing the ZX interaction. As shown, conventional coupling techniques only result in low ZZ interaction at operating points where the ZX interaction is also weak. However, as shown, various embodiments of the present invention can result in operating points where the ZZ interaction is weak despite the ZX interaction being non-zero and / or weak.

[0068] As shown, graph 600 includes a line 606 that indicates and / or corresponds to the value of the ZX interaction between two qubits as a function of the upper qubit operating frequency when the qubits are coupled by multi-resonant coupling architecture 420. That is, line 606 corresponds to the variable "J(gs)" as described in the legend of FIG. 6 . Additionally, graph 600 includes a line 608 that indicates and / or corresponds to the value of the ZZ interaction between two qubits as a function of the upper qubit operating frequency when the qubits are coupled by multi-resonant coupling architecture 420. That is, line 608 corresponds to the variable "ZZ(gs)" as described in the legend of FIG. 6 . As shown, various embodiments of multi-resonant coupling architecture 420 can significantly reduce both the ZX interaction and the ZZ interaction within a particular frequency band (e.g., 4.5 GHz to 4.75 GHz). As also shown, various embodiments of the multi-resonant coupling architecture 420 can significantly reduce ZZ interactions within different frequency bands (e.g., 5 GHz to 5.25 GHz) without correspondingly reducing ZX interactions.

[0069] These results can be compared to demonstrate the advantages of various embodiments of the present invention over conventional systems and / or techniques. As shown, line 606 is nearly identical to line 602. In other words, multi-resonant coupling architecture 420 can provide nearly identical ZX interactions (e.g., coupling strength and / or exchange coupling J) as conventional coupling techniques. However, as shown, line 608 is significantly lower than line 604 over a wide frequency range (e.g., approximately 4.8 GHz to 5.75 GHz). In fact, as shown in graph 600, line 608 lies almost perfectly one order of magnitude below line 604 from approximately 5 GHz to 5.75 GHz, and line 608 lies almost perfectly two orders of magnitude below line 604 within the narrow frequency band of 5 GHz to 5.25 GHz, as shown. Such performance improvements clearly demonstrate that various embodiments of the present invention constitute clear and tangible technical improvements over the prior art.

[0070] It should be noted that graphs 500 and 600 are illustrative and not limiting. In various aspects, the zero ZZ interaction and non-zero ZX interaction may occur at different upper qubit operating frequencies than those shown in FIGS. 5-6 based on different parameters corresponding to the multi-resonant coupling architecture used to couple the qubits, or based on the operating environment of the coupled qubits, or both (e.g., different resonant frequencies of the λ / 2 and / or λ / 4 couplers, different drive signals). It should also be noted that graphs 500 and 600 illustrate specific simulation results for various embodiments of multi-resonant coupling architecture 420. However, very similar simulation results have been obtained by the inventors for various other embodiments of the present invention (e.g., for multi-resonant coupling architectures 126, 214, and 322). Because the results were nearly identical, other simulation results have been omitted for brevity.

[0071] FIG. 7 shows a block diagram of an exemplary, non-limiting qubit array 700 that can facilitate ZZ interaction reduction in accordance with one or more embodiments described herein.

[0072] As shown in FIG. 7 , various embodiments of the present invention can be implemented to create qubit array 700 (e.g., a two-dimensional array of coupled qubits). As shown, qubit array 700, in various aspects, can comprise qubits Q1-Q4. In various aspects, qubits Q1-Q4 can be superconducting qubits of any suitable type or combination of types (e.g., qubits Q1-Q4 can be qubits of the same type, or different types, or both). In various instances, qubit array 700 can be a square and / or lattice array (e.g., two columns of two qubits). In various aspects, qubit array 700 can be arranged in any other suitable configuration or shape (e.g., rectangular, triangular, circular), or both. While FIG. 7 shows only four qubits (e.g., Q1-Q4) in qubit array 700, this is for illustrative purposes only. In various instances, any suitable number of qubits may be implemented in qubit array 700. In various aspects, qubits Q1-Q4 may be arranged in qubit array 700 on any suitable quantum computing substrate (not shown).

[0073] As shown, in various embodiments, any qubit in qubit array 700 can be coupled to some or all, or both, of its nearest neighbor qubits (or, in some cases, to some or all, or both, of its second-neighbor qubits) by any suitable multi-resonant coupling architecture as described herein. For example, as shown, qubit Q1 can be coupled to qubit Q2 via multi-resonant coupling architecture 126, as described in connection with FIG. 1. As shown, qubit Q1 can also be coupled to qubit Q3 via multi-resonant coupling architecture 322, as described in connection with FIG. 3 (e.g., for simplicity of illustration, FIG. 7 does not show the differential nature of multi-resonant coupling architecture 322, although such differential nature is fully shown and described in connection with FIG. 3). As shown, qubit Q2 can also be coupled to qubit Q4 by multi-resonant coupling architecture 420, as described in connection with FIG. 4. As shown, qubit Q3 can be coupled to qubit Q4 by multi-resonant coupling architecture 214, as described in connection with FIG. 2. Although not shown in FIG. 7, one or more conventional couplers may also be implemented within qubit array 700 in various instances.

[0074] In various embodiments, FIG. 7 illustrates a non-limiting example of how one or more of the multi-resonant coupling architectures illustrated in FIGS. 1-4 (e.g., multi-resonant coupling architectures 126, 214, 322, and 420) can be implemented to create a two-dimensional array of coupled qubits with reduced ZZ interactions.

[0075] FIG. 8 illustrates a flow diagram of an exemplary non-limiting method 800 including two resonators that can facilitate ZZ interaction reduction according to one or more embodiments described herein.

[0076] In various embodiments, operation 802 can include capacitively coupling a first qubit (e.g., 102) to a second qubit (e.g., 104) via a first resonator (e.g., 106). In various instances, the first qubit can have a first operating frequency and the second qubit can have a second operating frequency. In various aspects, the first resonator can have a first resonant frequency that is lower than the first operating frequency and lower than the second operating frequency.

[0077] In various instances, operation 804 may include capacitively coupling the first qubit to the second qubit via a second resonator (e.g., 112) in parallel with the first resonator. In various instances, the second resonator may have a second resonant frequency that is higher than the first operating frequency and higher than the second operating frequency. In various aspects, the first resonator and the second resonator may be λ / 2 resonators. In various instances, the first resonant frequency, the second resonant frequency, the first operating frequency, and the second operating frequency may be fixed.

[0078] FIG. 9 illustrates a flow diagram of an exemplary, non-limiting method 900 including one resonator that can facilitate ZZ interaction reduction, according to one or more embodiments described herein.

[0079] In various embodiments, operation 902 may include capacitively coupling a first end (e.g., 204) of a resonator (e.g., 202) to a first qubit (e.g., 102) and a second qubit (e.g., 104). In various instances, the first qubit may have a first operating frequency and the second qubit may have a second operating frequency.

[0080] In various instances, operation 904 may include coupling a second end (e.g., 206) of the resonator to ground (e.g., 212). In various instances, the resonator may have a first harmonic frequency lower than the first operating frequency and lower than the second operating frequency. In various aspects, the resonator may have a second harmonic frequency higher than the first operating frequency and higher than the second operating frequency. In various instances, the resonator may be a λ / 4 resonator. In various instances, the first harmonic frequency, the second harmonic frequency, the first operating frequency, and the second operating frequency may be fixed.

[0081] FIG. 10 illustrates a flow diagram of an exemplary, non-limiting method 1000 including a resonator and a differential direct coupler that can facilitate ZZ interaction reduction, according to one or more embodiments described herein.

[0082] In various embodiments, operation 1002 may include capacitively coupling a first qubit (e.g., 102) to a second qubit (e.g., 104) via a resonator (e.g., 310). In various instances, the first qubit may have a first operating frequency, the second qubit may have a second operating frequency, and the resonator may have a resonant frequency that is higher than the first operating frequency and higher than the second operating frequency.

[0083] In various instances, operation 1004 may include capacitively coupling the first qubit to the second qubit via a differential direct coupler (e.g., 316) in parallel with the resonator. In various instances, the differential direct coupler may capacitively couple opposing pads (e.g., 302 and 306) of the first qubit and the second qubit. In various cases, the resonator may be a λ / 2 resonator. In various instances, the resonant frequency, the first operating frequency, and the second operating frequency may be fixed.

[0084] FIG. 11 illustrates a flow diagram of an exemplary, non-limiting method 1100 including a resonator and a direct coupler that can facilitate ZZ interaction reduction, according to one or more embodiments described herein.

[0085] In various embodiments, operation 1102 can include capacitively coupling a first qubit (e.g., 102) to a second qubit (e.g., 104) via a resonator (e.g., 402). In various cases, a first end (e.g., 404) of the resonator can be capacitively coupled to the first qubit and the second qubit, and a second end (e.g., 406) of the resonator can be coupled to ground (e.g., 412). In various cases, the first qubit can have a first operating frequency, the second qubit can have a second operating frequency, and the resonator can have a resonant frequency that is higher than the first operating frequency and higher than the second operating frequency.

[0086] In various instances, operation 1104 may include capacitively coupling the first qubit to the second qubit via a direct coupler (e.g., 414). In various instances, the direct coupler may capacitively couple common pads (e.g., 304 and 306) of the first qubit and the second qubit. In various cases, the resonator may be a λ / 4 resonator. In various instances, the resonant frequency, the first operating frequency, and the second operating frequency may be fixed.

[0087] FIG. 12 shows a flow diagram of an exemplary, non-limiting method 1200 that can facilitate ZZ interaction reduction according to one or more embodiments described herein.

[0088] In various embodiments, operation 1202 may include capacitively coupling a first qubit (e.g., 102) to a second qubit (e.g., 104) via a non-tunable multi-resonant architecture (e.g., a coupling architecture such as those shown in FIGS. 1-4). In various instances, the multi-resonant architecture may include a first pole that is greater than both a first operating frequency of the first qubit and a second operating frequency of the second qubit (e.g., in FIG. 1 , the first pole may be the second resonant frequency of second resonator 112; in FIG. 2 , the first pole may be the second harmonic frequency of resonator 202; in FIG. 3 , the first pole may be the resonant frequency of resonator 310; and in FIG. 4 , the first pole may be the resonant frequency of resonator 402). In various embodiments, the multi-resonant architecture can include a second pole that is smaller than both the first operating frequency and the second operating frequency (e.g., in FIG. 1 , the first resonant frequency of first resonator 106 can be the second pole, and in FIG. 2 , the first harmonic frequency of resonator 202 can be the second pole). In various other embodiments, the multi-resonant architecture can instead include a direct coupling term (e.g., differential direct coupler 316 in FIG. 3 or direct coupler 414 in FIG. 4 ) rather than a second pole. In various cases, the multi-resonant architecture can exhibit zero coupling strength and zero ZZ interaction at a first set of qubit frequencies (e.g., 4.5 GHz to 4.75 GHz as shown in FIG. 6 ). In various instances, the multi-resonant architecture can exhibit non-zero coupling strength and zero ZZ interaction at a second set of qubit frequencies (e.g., 5 GHz to 5.25 GHz as shown in FIG. 6 ).

[0089] Various embodiments of the present invention can reduce undesired ZZ interactions while maintaining desirable ZX interactions. In various instances, this can be achieved by a multi-resonant coupled architecture with two fixed frequency elements. In various aspects, the detuning between the two fixed frequency elements and the qubit can be different, thereby promoting suppression of the ZZ interactions. In various other instances, this can be achieved by a multi-element coupler including a resonator and a short capacitive coupler. In various instances, the interactions of the two qubits with the elements can be different, thereby canceling out undesired ZZ interactions in specific frequency bands.

[0090] In various instances, the following sample experiments can be performed: Two qubits can be coupled together via embodiments of the present invention (e.g., via any of the multi-resonant coupling architectures discussed herein). The qubits can be weakly tunable so that the parameters and / or performance of the multi-resonant coupling architecture can be investigated. For various combinations of qubit frequency pairs, the exchange coupling J and ZZ interactions can be tested and / or recorded (e.g., J can be estimated from the ZX rate of cross-resonance, and the ZZ interaction can be measured by a Pi-Ramsey experiment). This can allow a ZZ cancellation point to be developed for a given coupler. The AC Stark shift can then be utilized to tune to the desired regime of the weakly tunable qubit. Finally, a cross-resonant gate can be operated by the qubit within the ZZ cancellation bandwidth.

[0091] In some cases, the multi-resonant coupling architecture can include two λ / 2 resonators (such as those shown in FIG. 1), one with a resonant frequency of 4 GHz and the other with a resonant frequency of 6 GHz.

[0092] In some cases, the multi-resonant coupling architecture can include a single λ / 4 resonator (such as that shown in FIG. 2) with a first harmonic at 2 GHz and a second harmonic at 6 GHz that can be combined to reduce and / or suppress ZZ interactions.

[0093] In some cases, the multi-resonant coupling architecture can include a 6 GHz λ / 2 resonator and a direct capacitive connection between the qubit's differential pads (e.g., as shown in Figure 3). In various instances, the coupling through the two paths can be balanced so that the exchange coupling J approaches zero around the upper qubit operating frequency of 4.7 GHz, which can result in zero ZZ interaction and non-zero exchange coupling J at about 5 GHz.

[0094] In some cases, the multi-resonant coupling architecture may include a 6 GHz λ / 4 resonator and a direct capacitive connection between the common pads of the qubits (such as that shown in FIG. 4).

[0095] Various embodiments of the present invention can provide a multi-resonant coupling architecture whose frequency response can include one or more coupling elements that provide cancellation of state-dependent coupling at the qubit frequency while maintaining finite state-independent coupling.

[0096] To provide additional context for the various embodiments described herein, Figure 13 and the following discussion are intended to provide a general description of a suitable computing environment 1300 in which various embodiments of the embodiments described herein may be implemented. While the embodiments are described above in the general context of computer-executable instructions capable of running on one or more computers, those skilled in the art will recognize that the embodiments may also be implemented in combination with other program modules, or as a combination of hardware and software, or both.

[0097] Generally, program modules include routines, programs, components, data structures, etc. that perform particular tasks or implement particular abstract data types. Moreover, those skilled in the art will appreciate that the methods of the present invention may also be practiced with other computer system configurations, including single-processor or multi-processor computer systems, minicomputers, mainframe computers, Internet of Things (IoT) devices, distributed computing systems, and personal computers, handheld computing devices, microprocessor-based or programmable consumer electronics, each of which can be operatively coupled to one or more associated devices.

[0098] The illustrated embodiments herein may also be practiced in distributed computing environments where certain tasks are performed by remote processing devices that are linked through a communications network. In a distributed computing environment, program modules may be located in both local and remote memory storage devices.

[0099] Computing devices typically include a variety of media, which may include computer-readable storage media, machine-readable storage media, and / or communication media; these two terms are used interchangeably herein as follows. A computer-readable storage medium or machine-readable storage medium may be any commercially available storage medium that can be accessed by a computer, including both volatile and nonvolatile media, removable and non-removable media. By way of example and not limitation, a computer-readable storage medium or machine-readable storage medium may be implemented in connection with any method or technology for storing information, such as computer-readable or machine-readable instructions, program modules, structured or unstructured data, etc.

[0100] A computer-readable storage medium may include, but is not limited to, random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technology, compact disc read-only memory (CD-ROM), digital versatile disc (DVD), Blu-ray® disk (BD) or other optical disk storage, magnetic cassette, magnetic tape, magnetic disk storage or other magnetic storage device, solid state drive or other solid state storage device, or other tangible and / or non-transitory medium that may be used to store the desired information. In this regard, it should be understood that the terms "tangible" or "non-transitory" herein as applied to storage, memory, or computer-readable medium exclude only propagating transient signals per se as modifiers and do not disclaim any right to all standard storage, memory, or computer-readable media that are not propagating transient signals per se.

[0101] The computer-readable storage medium can be accessed by one or more local or remote computing devices, for example, via access requests, queries or other data retrieval protocols related to information stored by the medium, for various operations.

[0102] Communication media typically embodies computer-readable instructions, data structures, program modules, or other structured or unstructured data in a data signal, such as a modulated data signal, such as a carrier wave or other transport mechanism, and includes any information delivery or transmission media. The term "modulated data signal" or signal refers to a signal that has one or more of its characteristics set or changed in such a manner as to encode information in one or more signals. By way of example, and not limitation, communication media includes wired media such as a wired network or direct-wired connection, and wireless media such as acoustic, RF, infrared and other wireless media.

[0103] 13, an exemplary environment 1300 for implementing various embodiments of the aspects described herein includes a computer 1302, which includes a processing unit 1304, a system memory 1306, and a system bus 1308. The system bus 1308 couples system components, including, but not limited to, the system memory 1306, to the processing unit 1304. The processing unit 1304 may be any of a variety of commercially available processors. Dual microprocessors and other multi-processor architectures may also be utilized as the processing unit 1304.

[0104] The system bus 1308 may be any of several types of bus structures, which may be further interconnected to a memory bus (with or without a memory controller), a peripheral bus, and a local bus using any of a variety of commercially available bus architectures. The system memory 1306 includes ROM 1310 and RAM 1312. The basic input / output system (BIOS) may be stored in non-volatile memory, such as ROM, erasable programmable read-only memory (EPROM), or EEPROM, and contains the basic routines that help to transfer information between elements within the computer 1302, such as during start-up. The RAM 1312 may also include high-speed RAM, such as static RAM, for caching data.

[0105] The computer 1302 further includes a drive 1320, such as an internal hard disk drive (HDD) 1314 (e.g., EIDE, SATA), one or more external storage devices 1316 (e.g., a magnetic floppy disk drive (FDD) 1316, a memory stick or flash drive reader, a memory card reader, etc.), and an optical disk drive capable of reading from and writing to a disk 1322, such as a solid state drive, a CD-ROM disk, a DVD, a BD, etc. Alternatively, if a solid state drive is included, the disk 1322 is not included unless it is separate. While the internal HDD 1314 is shown as being located within the computer 1302, the internal HDD 1314 may also be configured for external use within a suitable enclosure (not shown). Additionally, although not shown in the environment 1300, a solid state drive (SSD) may be used in addition to or in place of the HDD 1314. HDD 1314, external storage device 1316, and drive 1320 can be connected to system bus 1308 by HDD interface 1324, external storage interface 1326, and drive interface 1328, respectively. Interface 1324 for external drive implementations can include at least one or both of Universal Serial Bus (USB) and Institute of Electrical and Electronics Engineers (IEEE) 1394 interface technologies. Other external drive connection technologies are within the contemplation of the embodiments described herein.

[0106] The drives and their associated computer-readable storage media enable non-volatile storage of data, data structures, computer-executable instructions, etc. For computer 1302, the drives and storage media accommodate the storage of any data in a suitable digital format. While the above description of computer-readable storage media refers to each type of storage device, those skilled in the art will appreciate that other types of computer-readable storage media, whether currently existing or developed in the future, may also be used in the exemplary operating environment, and further, that any such storage media may include computer-executable instructions for implementing the methods described herein.

[0107] A number of program modules can be stored in the drives and RAM 1312, including an operating system 1330, one or more application programs 1332, other program modules 1334, and program data 1336. All or portions of the operating system, applications, modules, and / or data can also be cached in RAM 1312. The systems and methods described herein can be implemented using various commercially available operating systems or combinations of operating systems.

[0108] Computer 1302 may optionally include emulation technology. For example, a hypervisor (not shown) or other means may emulate the hardware environment of operating system 1330, and the emulated hardware may optionally differ from the hardware shown in FIG. 13 . In such an embodiment, operating system 1330 may comprise one of multiple virtual machines (VMs) hosted on computer 1302. Additionally, operating system 1330 may provide a runtime environment, such as the Java® Runtime Environment or the .NET® Framework, for application 1332. A runtime environment is a consistent execution environment that allows application 1332 to run on any operating system that includes the runtime environment. Similarly, operating system 1330 may support containers, and application 1332 may be in the form of a container, which is a lightweight, standalone executable package of software that includes, for example, the application's code, runtime, system tools, system libraries, and settings.

[0109] Additionally, computer 1302 can be enabled with a security module, such as a Trusted Processing Module (TPM). For example, a TPM allows a boot component to hash the next boot component in time, wait for the resulting match against a secured value, and then load the next boot component. This process can occur at any layer in the code execution stack of computer 1302, for example, at the application execution level or the operating system (OS) kernel level, thereby enabling security at any level of code execution.

[0110] A user can enter commands and information into the computer 1302 through one or more wired / wireless input devices, such as, for example, a keyboard 1338, a touch screen 1340, and a pointing device such as a mouse 1342. Other input devices (not shown) may include a microphone, an infrared (IR) remote control, a radio frequency (RF) remote control, or other remote control, a joystick, a virtual reality controller and / or headset, a game pad, a stylus pen, an image input device such as a camera, a gesture sensor input device, an eye movement sensor input device, an emotion or face detection device, a biometric input device such as a fingerprint or iris scanner, etc. These and other input devices are often connected to the processing unit 1304 through an input device interface 1344, which may be coupled to the system bus 1308, but may also be connected by other interfaces, such as a parallel port, an IEEE 1394 serial port, a game port, a USB port, an IR interface, a BLUETOOTH® interface, etc.

[0111] A monitor 1346 or other type of display device may also be connected to the system bus 1308 via an interface, such as a video adapter 1348. In addition to the monitor 1346, computers typically include other peripheral output devices (not shown), such as speakers, printers, etc.

[0112] The computer 1302 can operate in a networked environment using logical connections to one or more remote computers, such as a remote computer 1350, via wired and / or wireless communications. The remote computer 1350 may be a workstation, a server computer, a router, a personal computer, a handheld computer, a microprocessor-based entertainment appliance, a peer device or other common network node, and typically includes many or all of the elements described relative to the computer 1302, although for purposes of brevity, only a memory / storage device 1352 is shown. The logical connections shown include wired / wireless connections to a local area network (LAN) 1354 and / or to larger networks, such as a wide area network (WAN) 1356. Such LAN and WAN networking environments are commonplace within offices and companies and facilitate enterprise-wide computer networks, such as intranets, all of which can connect to a global communications network, such as the Internet.

[0113] When used in a LAN networking environment, the computer 1302 can be connected to the local network 1354 through a wired and / or wireless communication network interface or adapter 1358. The adapter 1358 can facilitate wired or wireless communication to the LAN 1354, and may also include a wireless access point (AP) disposed thereon for communicating with the adapter 1358 in a wireless mode.

[0114] When used in a WAN networking environment, the computer 1302 may include a modem 1360 or may be connected to a communications server on the WAN 1356 via other means for establishing communications over the WAN 1356, such as via the Internet. The modem 1360, which may be internal or external and a wired or wireless device, may be connected to the system bus 1308 via the input device interface 1344. In a networked environment, program modules depicted for the computer 1302, or portions thereof, may be stored in the remote memory / storage device 1352. It will be apparent that the network connections shown are examples and other means of establishing a communications link between computers may be used.

[0115] When used in either a LAN or WAN networking environment, computer 1302 can access a cloud storage system or other network-based storage system, such as, without limitation, a network virtual machine, that provides one or more aspects of information storage or processing, in addition to or instead of external storage device 1316 as described above. Typically, a connection between computer 1302 and a cloud storage system can be established over LAN 1354 or WAN 1356, for example, by adapter 1358 or modem 1360, respectively. Once computer 1302 is connected to an associated cloud storage system, external storage interface 1326 can manage the storage provided by the cloud storage system using adapter 1358 or modem 1360, or both, as if it were any other type of external storage device. For example, external storage interface 1326 can be configured to provide access to cloud storage sources as if those sources were physically connected to computer 1302.

[0116] The computer 1302 may be operable to communicate with any wireless device or entity operably located within wireless communication range, such as, for example, a printer, a scanner, a desktop and / or handheld computer, a personal digital assistant, a communications satellite, any equipment or location associated with a radio-detectable tag (e.g., a kiosk, a newsstand, a store shelf, etc.), and a telephone. This may include Wireless Fidelity (Wi-Fi)® and BLUETOOTH® wireless technologies. Thus, communication may be in a predetermined structure similar to a conventional network, or simply ad hoc communication between at least two devices.

[0117] The present invention may be a system, method, apparatus, or computer program product, or any combination thereof, integrated at any possible level of technical detail. The computer program product may include a computer-readable storage medium having computer-readable program instructions for causing a processor to perform aspects of the present invention. The computer-readable storage medium may be a tangible device capable of holding and storing instructions for use by an instruction-execution device. The computer-readable storage medium may be, for example, but not limited to, an electronic storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any suitable combination of the above. A non-exhaustive list of more specific examples of computer-readable storage devices also can include portable computer diskettes, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), static random access memory (SRAM), portable compact disk read-only memory (CD-ROM), digital versatile disk (DVD), memory stick, floppy disk, punch card, or mechanically encoded devices such as ridges in grooves in which instructions are recorded, and any suitable combination of the above. Computer-readable storage media, as used herein, should not be construed as a transient signal per se, such as radio waves or other freely propagating electromagnetic waves, electromagnetic waves propagating through a waveguide or other transmission medium (e.g., light pulses passing through a fiber optic cable), or electrical signals transmitted through wires.

[0118] The computer-readable program instructions described herein can be downloaded from a computer-readable storage medium to each computing / processing device or to an external computer or external storage device via a network, such as the Internet, a local area network, a wide area network, or a wireless network, or a combination thereof. The network may include copper transmission cables, optical fiber transmissions, wireless transmissions, routers, firewalls, switches, gateway computers, or edge servers, or a combination thereof. A network adapter card or network interface within each computing / processing device receives the computer-readable program instructions from the network and forwards the computer-readable program instructions for storage within the computer-readable storage medium within the respective computing / processing device. The computer-readable program instructions for carrying out the operations of the present invention may be either assembler instructions, instruction set architecture (ISA) instructions, machine instructions, machine-dependent instructions, microcode, firmware instructions, state setting data, configuration data for integrated circuits, or source or object code written in any combination of one or more programming languages, including object-oriented programming languages ​​such as Smalltalk, C++, and the like, and procedural programming languages ​​such as the "C" programming language or similar programming languages. The computer-readable program instructions may execute entirely on the user's computer, partially on the user's computer, as a stand-alone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In the latter scenario, the remote computer may be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or the connection may be to an external computer (e.g., through the Internet using an Internet Service Provider).In some embodiments, electronic circuitry including, for example, a programmable logic circuit, a field programmable gate array (FPGA), or a programmable logic array (PLA) can execute computer-readable program instructions by utilizing state information of the computer-readable program instructions to customize the electronic circuitry to implement aspects of the present invention.

[0119] Aspects of the present invention are described herein with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer-readable program instructions. These computer-readable program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, or other programmable data processing apparatus to produce a machine, whereby the instructions, executing via the processor of the computer or other programmable data processing apparatus, create means for performing the functions / acts specified in one or more blocks of the flowchart illustrations and / or block diagrams. These computer-readable program instructions can also be stored in a computer-readable storage medium that can direct a computer, programmable data processing apparatus, or other device, or combination thereof, to function in a particular manner, whereby the computer-readable storage medium having instructions stored thereon includes an article of manufacture containing instructions that implement aspects of the functions / acts specified in one or more blocks of the flowchart illustrations and / or block diagrams. The computer-readable program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other device to cause a series of operational steps to be performed on the computer, other programmable apparatus, or other device to generate a computer-implemented process, whereby the instructions executing on the computer, other programmable apparatus, or other device perform the functions / operations specified in one or more blocks of the flowcharts and / or block diagrams.

[0120] The flowcharts and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of the present invention. In this regard, each block in the flowcharts and block diagrams may represent a module, segment, or portion of instructions, which includes one or more executable instructions for implementing specified logical functions. In some alternative implementations, the functions noted in the blocks may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, depending on the functionality involved, or the blocks may sometimes be executed in the reverse order. It will also be noted that each block of the block diagrams and / or flowchart illustrations, and combinations of blocks in the block diagrams and / or flowchart illustrations, may be implemented by a dedicated hardware-based system that performs the specified functions or operations or executes a combination of dedicated hardware and computer instructions.

[0121] While the present subject matter has been described above in the general context of computer-executable instructions for a computer program product running on a computer, those skilled in the art will recognize that the present disclosure can also be implemented or practiced in combination with other program modules. Generally, program modules include routines, programs, components, data structures, etc. that perform particular tasks and / or implement particular abstract data types. Moreover, those skilled in the art will appreciate that the computer-implemented methods of the present invention can be practiced with other computer system configurations, including single-processor or multiprocessor computer systems, minicomputing devices, mainframe computers, and other computers, handheld computing devices (e.g., PDAs, telephones), microprocessor-based or programmable consumer or industrial electronics, etc. The illustrated aspects can also be practiced in distributed computing environments where tasks are performed by remote processing devices linked through a communications network. However, some, if not all, aspects of the present disclosure can be practiced on stand-alone computers. In a distributed computing environment, program modules can be located in both local and remote memory storage devices.

[0122] As used in this application, terms such as “component,” “system,” “platform,” and “interface” can refer to and / or include computer-related entities or entities associated with an operable machine having one or more particular functions. The entities disclosed herein may be hardware, a combination of hardware and software, software, or software in execution. For example, a component may be, but is not limited to, a process running on a processor, a processor, an object, an executable, a thread of execution, a program, or a computer, or any combination thereof. By way of example, both an application running on a server and the server may be a component. One or more components may reside within a process and / or thread of execution, and a component may be localized on one computer or distributed between two or more computers, or both. In another example, each component may execute from various computer-readable media having various data structures stored thereon. A component may communicate via local and / or remote processes, such as according to signals comprising one or more data packets (e.g., data from one component interacting within a local system, with another component in a distributed system, or with other systems via signals across a network such as the Internet, or any combination thereof). As another example, a component may be a device having a specific function provided by mechanical parts operated by electrical or electronic circuits that are operated by a software or firmware application executed by a processor. In such cases, the processor may be internal or external to the device and may execute at least a portion of the software or firmware application.As another example, a component may be a device that provides specialized functionality through electronic components without mechanical parts, and the electronic component may include a processor or other means for executing software or firmware that provides at least part of the functionality of the electronic component. In one aspect, a component may emulate an electronic component via a virtual machine, for example, within a cloud computing system.

[0123] Additionally, the term "or" is intended to mean an inclusive "or," rather than an exclusive "or." That is, unless otherwise specified or clear from the context, "X utilizes A or B" is intended to mean any of the natural inclusive permutations. That is, if X utilizes A, X utilizes B, or X utilizes both A and B, then "X utilizes A or B" is satisfied under any of the above cases. Moreover, the articles "a" and "an" as used within this specification and the accompanying drawings should generally be construed to mean "one or more" unless otherwise specified or clear from the context that the singular form is intended. As used herein, the terms "example" and / or "exemplary" are used to mean serving as an example, instance, or illustration. For the avoidance of doubt, the subject matter disclosed herein is not limited by such examples. Additionally, any aspect or design described herein as "example" and / or "exemplary" is not necessarily to be construed as preferred or advantageous over other aspects or designs, and is not intended to exclude equivalent exemplary structures and techniques known to those skilled in the art.

[0124] As used herein, the term "processor" can refer to virtually any computing processing unit or device, including, but not limited to, a single-core processor, a single processor with software multithreading, a multi-core processor, a multi-core processor with software multithreading, a multi-core processor with hardware multithreading, a parallel platform, and a parallel platform with distributed shared memory. Additionally, a processor can refer to an integrated circuit, an application-specific integrated circuit (ASIC), a digital signal processor (DSP), a field-programmable gate array (FPGA), a programmable logic controller (PLC), a combinatorial programmable logic device (CPLD), discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein. Furthermore, a processor can utilize nanoscale architectures, such as, but not limited to, molecular and quantum dot-based transistors, switches, and gates, to optimize space utilization or enhance the performance of user equipment. A processor may also be implemented as a combination of computing processing units. In this disclosure, terms such as "store," "storage device," "data store," "data storage device," "database," and substantially any other information storage component associated with the operation and functionality of a component are utilized to refer to a "memory" or a "memory component" entity embodied within a component comprising memory. It should be appreciated that memory and / or memory components described herein may be either volatile memory or non-volatile memory, or may include both volatile and non-volatile memory.By way of example, and not limitation, non-volatile memory may include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable ROM (EEPROM), flash memory, or non-volatile random access memory (RAM) (e.g., ferroelectric RAM (FeRAM)). Volatile memory may include, for example, RAM, which may act as external cache memory. By way of example, and not limitation, RAM is available in many forms, such as synchronous RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), direct Rambus® RAM (DRRAM), direct Rambus® dynamic RAM (DRDRAM), and Rambus® dynamic RAM (RDRAM). Additionally, the disclosed memory components of systems or computer-implemented methods herein are intended to include, but are not limited to, these and any other suitable types of memory.

[0125] The foregoing are merely exemplary systems and computer-implemented methods. Of course, it is not possible to describe every conceivable combination of components or computer-implemented methods for the purposes of describing the present disclosure, but one of ordinary skill in the art will recognize that many further combinations and permutations of the present disclosure are possible. Furthermore, to the extent that the terms "including," "having," "holding," and the like are used in the detailed description, claims, appendices, and drawings, such terms are intended to be inclusive, similar to the way the term "comprising" is interpreted when used as a transitional term in the claims.

[0126] The descriptions of various embodiments are presented for illustrative purposes, but are not intended to be exhaustive or limited to the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the described embodiments. The terms used in this specification are selected to best explain the principles of the embodiments, practical applications, or technical improvements over technology found in the market, or to enable those skilled in the art to understand the embodiments disclosed herein.

Claims

1. A device, a first qubit; and a second qubit; and a multi-resonant architecture comprising a first resonator that capacitively couples the first qubit to the second qubit, and a second resonator that capacitively couples the first qubit to the second qubit; Equipped with the first quantum bit has a first operating frequency, the second quantum bit has a second operating frequency, the first resonator has a first resonant frequency that is lower than the first operating frequency and the second operating frequency, and the second resonator has a second resonant frequency that is higher than the first operating frequency and the second operating frequency.

2. 2. The device of claim 1, wherein the first resonator and the second resonator are λ / 2 resonators, and the first resonator and the second resonator are in parallel.

3. 3. The device of claim 2, wherein the first resonant frequency is about 3 gigahertz, the second resonant frequency is about 6 gigahertz, and the first operating frequency and the second operating frequency are between 4.5 gigahertz and 5.5 gigahertz.

4. 4. The device of claim 1, wherein the first resonant frequency, the second resonant frequency, the first operating frequency, and the second operating frequency are fixed.

5. A device, a first qubit; and a second qubit; and a multi-resonant architecture comprising a resonator, a first end of the resonator capacitively coupled to the first qubit and the second qubit, and a second end of the resonator coupled to ground; Equipped with the first qubit has a first operating frequency, the second qubit has a second operating frequency, the resonator has a first harmonic frequency that is lower than the first operating frequency and the second operating frequency, and the resonator has a second harmonic frequency that is higher than the first operating frequency and the second operating frequency.

6. The device of claim 5 , wherein the resonator is a λ / 4 resonator.

7. 7. The device of claim 6, wherein the first harmonic frequency is about 2 gigahertz, the second harmonic frequency is about 6 gigahertz, and the first operating frequency and the second operating frequency are between 4.5 gigahertz and 5.5 gigahertz.

8. 8. The device of claim 5, wherein the first harmonic frequency, the second harmonic frequency, the first operating frequency, and the second operating frequency are fixed.

9. A device, a first qubit; and a second qubit; and a multi-resonant architecture comprising a resonator that capacitively couples the first qubit to the second qubit, and a differential direct coupler that capacitively couples the first qubit to the second qubit, the differential direct coupler capacitively coupling opposing pads of the first qubit and the second qubit; Equipped with the first qubit has a first operating frequency, the second qubit has a second operating frequency, and the resonator has a resonant frequency higher than the first operating frequency and the second operating frequency.

10. 10. The device of claim 9, wherein the resonator is a λ / 2 resonator, and the resonator and the differential direct coupler are in parallel.

11. 11. The device of claim 10, wherein the resonant frequency is about 6 gigahertz, and the first operating frequency and the second operating frequency are between 4.5 gigahertz and 5.5 gigahertz.

12. 12. The device of claim 9, wherein the resonant frequency, the first operating frequency, and the second operating frequency are fixed.

13. A device, a first qubit; and a second qubit; and a multi-resonant architecture comprising a resonator and a direct coupler, a first end of the resonator capacitively coupled to the first qubit and the second qubit, a second end of the resonator coupled to ground, the direct coupler capacitively coupling the first qubit to the second qubit, and the direct coupler capacitively coupling a common pad of the first qubit and the second qubit; Equipped with the first qubit has a first operating frequency, the second qubit has a second operating frequency, and the resonator has a resonant frequency higher than the first operating frequency and the second operating frequency.

14. The device of claim 13 , wherein the resonator is a λ / 4 resonator.

15. 15. The device of claim 14, wherein the resonant frequency is about 6 gigahertz, and the first operating frequency and the second operating frequency are between 4.5 gigahertz and 5.5 gigahertz.

16. 16. The device of claim 13, wherein the resonant frequency, the first operating frequency, and the second operating frequency are fixed.

17. 1. An apparatus comprising: a first transmon qubit having a first operating frequency; a second transmon qubit having a second operating frequency; and a multi-resonant architecture that capacitively couples the first transmon qubit to the second transmon qubit, the multi-resonant architecture having a first resonant frequency that is lower than the first operating frequency and the second operating frequency, and a second resonant frequency that is higher than the first operating frequency and the second operating frequency; An apparatus comprising:

18. 18. The apparatus of claim 17, wherein the multi-resonant architecture comprises a first λ / 2 resonator capacitively coupled to the first transmon qubit and the second transmon qubit, and a second λ / 2 resonator capacitively coupled to the first transmon qubit and the second transmon qubit, the first λ / 2 resonator and the second λ / 2 resonator being in parallel, the first λ / 2 resonator exhibiting the first resonant frequency and the second λ / 2 resonator exhibiting the second resonant frequency.

19. 20. The apparatus of claim 18, wherein the first resonant frequency is about 3 gigahertz and the second resonant frequency is about 6 gigahertz.

20. 20. The apparatus of claim 18 or 19, wherein the multi-resonant architecture comprises a λ / 4 resonator, a first end of the λ / 4 resonator coupled between a coupling capacitor of the first transmon qubit and a coupling capacitor of the second transmon qubit, a second end of the λ / 4 resonator shorted to ground, a first harmonic of the λ / 4 resonator at the first resonant frequency, and a second harmonic of the λ / 4 resonator at the second resonant frequency.

21. 21. The apparatus of claim 20, wherein the first harmonic is about 2 gigahertz and the second harmonic is about 6 gigahertz.

Citation Information

Patent Citations

  • Quantum processor

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