Current control device, motor control device and electric power steering device

Abstract

In overheat protection of a current control circuit that controls a driving current driving a load, the present invention improves the accuracy of estimating the component temperature of an electronic component included in the current control circuit. A component temperature estimation unit (61e2, 61g) estimates a first component temperature (Teg), which is the component temperature of a first electronic component (La), on the basis of a current value (I1ad to I1cd) detected or estimated by a current detection unit, and a detection temperature (SdA1) detected by a temperature detection circuit 45, and estimates a second component temperature (Tee2), which is the component temperature of a second electronic component (QC2), on the basis of the current value (I1ad to I1cd), the detection temperature (SdA1), and the first component temperature (Teg).

Description

[Technical Field]

[0001] The present invention relates to a current control device, a motor control device, and an electric power steering device. [Background technology]

[0002] The following Patent Document 1 describes a technology that detects the temperature of a motor drive circuit that drives a motor that generates steering assist force in an electric power steering device, and limits the drive current of the motor if the detected temperature is equal to or higher than a threshold.The following Patent Document 2 describes a technology that estimates the temperature of a power coil used in an electronic control unit of an electric power steering device from the power supply current and thermistor temperature. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2006-341795 [Patent Document 2] International Publication No. 2019 / 189648 Brochure Summary of the Invention [Problem to be solved by the invention]

[0004] However, when estimating the component temperature of an electronic component included in a current control circuit, there is a risk that the estimation accuracy will be reduced due to the influence of heat generated by other electronic components located around the electronic component being estimated. The present invention has been made in light of the above-mentioned problems, and aims to improve the accuracy of estimating the component temperature of electronic components included in a current control circuit in overheat protection of the current control circuit that controls the drive current that drives a load. [Means for solving the problem]

[0005] In order to achieve the above-mentioned object, a current control device according to one embodiment of the present invention comprises a current control circuit including a plurality of electronic components, a temperature detection circuit having a temperature detection element arranged near the current control circuit, a current detection unit that detects or estimates a current value flowing through each of the plurality of electronic components, a component temperature estimation unit that estimates a component temperature, which is the temperature of the electronic component, for each of the plurality of electronic components based on the current value detected or estimated by the current detection unit and the detected temperature detected by the temperature detection circuit, a reduction coefficient setting unit that sets a plurality of different reduction coefficients for each of a plurality of different component temperatures included in the component temperatures estimated for each of the plurality of electronic components, a selection unit that selects one of the plurality of reduction coefficients, and a current limiting unit that limits the output current output from the current control circuit to a load based on the selected reduction coefficient. The plurality of electronic components include at least a first electronic component and a second electronic component, and the component temperature estimation unit estimates a first component temperature, which is the component temperature of the first electronic component, based on the current value detected or estimated by the current detection unit and the detected temperature detected by the temperature detection circuit, and estimates a second component temperature, which is the component temperature of the second electronic component, based on the current value detected or estimated by the current detection unit, the detected temperature detected by the temperature detection circuit, and the first component temperature.

[0006] A motor control device according to another aspect of the present invention uses the current control device described above to control the current supplied to an electric motor as a load. An electric power steering device according to yet another aspect of the present invention includes the motor control device described above and an electric motor controlled by the motor control device, and applies a steering assist force to a steering system of a vehicle by the electric motor. [Effects of the Invention]

[0007] According to the present invention, in overheat protection of a current control circuit that controls a drive current that drives a load, it is possible to improve the accuracy of estimating the component temperature of an electronic component included in the current control circuit. [Brief explanation of the drawings]

[0008] [Figure 1] 1 is a configuration diagram illustrating an overview of an example of an electric power steering device according to an embodiment; [Figure 2] 1 is a configuration diagram illustrating an outline of an example of an electronic control unit (ECU) according to an embodiment. [Figure 3] FIG. 2 is a circuit diagram of an example of a temperature detection circuit. [Figure 4] 1 is a schematic diagram of a heat dissipation structure that dissipates heat generated by a power conversion circuit. [Figure 5] FIG. 2 is a block diagram illustrating an example of a functional configuration of a control arithmetic device. [Figure 6] 4 is a block diagram illustrating an example of a functional configuration of a first reduction coefficient setting unit according to the first embodiment. FIG. [Figure 7] FIG. 2 is a block diagram illustrating an example of a functional configuration of a high-side FET temperature estimator. [Figure 8] FIG. 10 is a schematic diagram illustrating an example of a characteristic map of a high-side FET reduction coefficient. [Figure 9] 10(a) to 10(c) are schematic diagrams illustrating an example of a component reduction coefficient setting operation. [Figure 10] FIG. 4 is a schematic diagram illustrating an example of a characteristic map of a battery reduction coefficient. [Figure 11] 10 is a flowchart of an example of processing in a control arithmetic device. [Figure 12] FIG. 10 is a schematic diagram for explaining the effect of the second low-pass filter. [Figure 13] FIG. 10 is a block diagram illustrating an example of a functional configuration of a first reduction coefficient setting unit according to a second embodiment. [Figure 14] 10 is a graph showing component temperatures and temperature sensor temperatures when a current of a specific magnitude is applied to check the trends of these temperatures in both dual-system drive mode and single-system drive mode. [Figure 15] 10 is a graph showing the difference in temperature between the component temperature and the temperature sensor in each of the dual system drive mode and the single system drive mode when a current of a specific magnitude is applied to check the trend of the difference between these temperatures. [Figure 16] FIG. 10(a) is a diagram showing an example of setting a conversion gain, and FIG. 10(b) is a diagram showing an example of setting a first cutoff frequency. [Figure 17]10(a) to 10(c) are schematic diagrams showing the relationship between the distribution ratio of the output current between the first current control circuit and the second current control circuit, the converted gain, and the first cutoff frequency. [Figure 18] FIG. 13 is a block diagram of a first example of a functional configuration of a high-side FET temperature estimator according to the fourth embodiment. [Figure 19] 10(a) and 10(b) are schematic diagrams of the temperature estimation results in the first embodiment and the fourth embodiment, respectively, and 10(c) and 10(d) are schematic diagrams of the estimation errors in the first embodiment and the fourth embodiment, respectively. [Figure 20] (a) and (b) are schematic diagrams of the heat dissipation path from the electronic component to the heat sink, and (c) is an equivalent circuit diagram that schematically represents the heat dissipation path of (a) and (b). [Figure 21] FIG. 13 is a block diagram of a second example of the functional configuration of the high-side FET temperature estimator of the fourth embodiment. [Figure 22] FIG. 13 is a block diagram of a first example of a functional configuration of a capacitor temperature estimator according to a fifth embodiment. [Figure 23] 10(a) and 10(b) are schematic diagrams of the temperature estimation results in the first embodiment and the fifth embodiment, respectively, and 10(c) and 10(d) are schematic diagrams of the estimation errors in the first embodiment and the fifth embodiment, respectively. [Figure 24] 10(a) to 10(i) are conceptual diagrams showing the tendency of the estimation results of component temperatures when three-phase FETs are driven at specific duty ratios. [Figure 25] 10A is a schematic diagram of a heat dissipation path from an electronic component to a heat sink, FIG. 10B is an equivalent circuit diagram that schematically represents the heat dissipation path of FIG. 10A, and FIG. 10C is a block diagram of a second example of the functional configuration of a capacitor temperature estimation unit of the fifth embodiment. [Figure 26] 10(a) and 10(b) are block diagrams of a first modified example and a second modified example of a component temperature estimation unit that estimates the component temperature of an electronic component included in a current control circuit. [Figure 27] FIG. 13 is a configuration diagram illustrating an outline of an example of an electronic control unit according to a sixth embodiment. [Figure 28]FIG. 13 is a block diagram illustrating an example of a functional configuration of a high-side FET temperature estimator according to a sixth embodiment. [Figure 29] 10(a) to 10(d) are schematic diagrams illustrating an error that occurs in an estimated value of a component temperature based on a first estimation gain Ge1 when the delayed response of the component temperature to be estimated is slower than the delayed response of the second detected temperature. [Figure 30] 10A is a schematic diagram of an example of the second estimated gain Ge2, and FIG. 10B is a schematic diagram of an estimated value of the component temperature based on the second estimated gain Ge2. [Figure 31] (a) to (c) are schematic diagrams for explaining the error that occurs in the estimated value of the component temperature based on the first estimation gain Ge1 when the delayed response of the component temperature to be estimated is faster than the delayed response of the second detected temperature, (d) is a schematic diagram of an example of the second estimation gain Ge2, and (e) is a schematic diagram of the estimated value of the component temperature based on the second estimation gain Ge2. [Figure 32] (a) is a diagram showing an example of a change in the estimated component temperature of the choke coil La, (b) is a diagram showing an example of a change in the estimated component temperature of the power-off FET QC2, (c) is a diagram showing an example of a change in the estimated component temperature of the power-off FET QD2, (d) is a diagram showing an example of a change in the estimated component temperature of the power-off FET QC1, and (e) is a diagram showing an example of a change in the estimated component temperature of the power-off FET QD1. [Figure 33] 1(a) to 1(c) are schematic diagrams of first to third examples of heat dissipation paths from a choke coil. [Figure 34] 13A and 13B are block diagrams of a first example and a second example of the functional configuration of a power cut-off FET temperature estimator according to the seventh embodiment, respectively. [Figure 35] FIG. 10 is a configuration diagram showing an outline of a first modified example of an electronic control unit. [Figure 36] FIG. 10 is a configuration diagram showing an outline of a second modified example of the electronic control unit. [Figure 37] FIG. 2 is a configuration diagram showing an outline of a first modified example of an electric power steering device. [Figure 38] FIG. 10 is a configuration diagram showing an outline of a second modified example of an electric power steering device. [Figure 39] FIG. 10 is a configuration diagram showing an outline of a third modified example of an electric power steering device. DETAILED DESCRIPTION OF THE INVENTION

[0009] Embodiments of the present invention will be described in detail with reference to the drawings. Note that the embodiments of the present invention shown below are merely examples of devices and methods for embodying the technical concept of the present invention, and the technical concept of the present invention does not limit the configuration, arrangement, etc. of component parts to those described below. Various modifications can be made to the technical concept of the present invention within the technical scope defined by the claims. In the following description, the present invention is described as being applied to a current control device that supplies a drive current to an electric motor that generates a steering assist force for an electric power steering system, but the present invention is not limited to applications to electric power steering systems and motors, and can be widely applied to a variety of uses. For example, the present invention may be applied to a current control device that supplies a drive current to an actuator that drives a joint of a robot, or to a current control device that supplies a drive current to an electrical device other than a motor (for example, a light-emitting diode, or an IC such as a pre-driver or microcomputer).

[0010] (First embodiment) (composition) 1 is a schematic diagram showing an example of an electric power steering (EPS) device according to an embodiment. A steering shaft (steering shaft, steering shaft) 2 of a steering wheel (steering handle) 1 is connected to steered wheels 8L, 8R via reduction gears (worm gears) 3, universal joints 4a and 4b, a pinion-rack mechanism 5, tie rods 6a and 6b, and hub units 7a and 7b, which constitute a reduction mechanism.

[0011] The pinion rack mechanism 5 has a pinion 5a connected to a pinion shaft to which steering force is transmitted from the universal joint 4b, and a rack 5b that meshes with this pinion 5a, and converts the rotational motion transmitted to the pinion 5a into linear motion in the vehicle width direction by the rack 5b. The steering shaft 2 is provided with a torque sensor 10 for detecting a steering torque Th. The steering shaft 2 is also provided with a steering angle sensor 14 for detecting a steering angle θh of the steering wheel 1.

[0012] Furthermore, a motor 20 that assists the steering force of the steering wheel 1 is connected to the steering shaft 2 via a reduction gear 3. The motor 20 may be, for example, a polyphase motor. In the following explanation, an example of a three-phase motor having double windings in which first and second system coils are wound in the same motor housing and a common rotor is rotated by the coils of the two systems will be described, but the motor 20 may be a motor other than a double winding motor, and the number of phases of the motor 20 does not have to be three. Multiple motors 20 that assist the steering force of the steering wheel 1 may be connected to the same steering shaft 2.

[0013] An electronic control unit (ECU) 30 that controls the electric power steering device is supplied with power from a battery 13 and receives an ignition key signal via an ignition switch 11. The ECU 30 calculates a current command value of an assist control command based on the steering torque Th detected by the torque sensor 10, the vehicle speed Vh detected by the vehicle speed sensor 12, and the steering angle θh detected by the steering angle sensor 14, and controls the currents (A-phase current I1a, B-phase current I1b, and C-phase current I1c of the first system coils and A-phase current I2a, B-phase current I2b, and C-phase current I2c of the second system coils) supplied to the motor 20 using a voltage control command value obtained by performing compensation on the current command value. The ECU 30 is an example of a "current control device" and a "motor control device" as defined in the claims.

[0014] The steering angle sensor 14 is not essential, and the steering angle θh may be calculated by adding the torsion angle of the torsion bar of the torque sensor 10 to the product of the motor rotation angle θm obtained from a rotation angle sensor 23a that detects the rotation angle of the rotating shaft of the motor 20 and the gear ratio of the reduction gear 3. The rotation angle sensor 23a may be, for example, a resolver that detects the rotation position of the motor, or a magnetic sensor that detects the magnetic field of a magnet attached to the rotating shaft of the motor 20. Furthermore, the steering angle of the steered wheels 8L, 8R may be used instead of the steering angle θh. For example, the steering angle may be detected by detecting the displacement of the rack 5b.

[0015] The ECU 30 includes, for example, a computer including a processor and peripheral components such as a storage device, etc. The processor may be, for example, a CPU (Central Processing Unit) or an MPU (Micro-Processing Unit). The storage device may include any of a semiconductor storage device, a magnetic storage device, and an optical storage device. The storage device may include a register, a cache memory, a memory such as a ROM (Read Only Memory) used as a main memory, and a RAM (Random Access Memory). The functions of the ECU 30 described below are realized, for example, by the processor of the ECU 30 executing a computer program stored in a storage device.

[0016] The ECU 30 may be formed by dedicated hardware for executing each of the information processes described below. For example, the ECU 30 may include a functional logic circuit configured in a general-purpose semiconductor integrated circuit, such as a programmable logic device (PLD) such as a field-programmable gate array (FPGA).

[0017] 2 is a configuration diagram showing an overview of an example of an ECU 30 according to an embodiment. The ECU 30 includes a motor rotation angle detection circuit 23, control and arithmetic devices 31a and 31b, a first motor current cutoff circuit 33A and a second motor current cutoff circuit 33B, a first gate drive circuit 41A and a second gate drive circuit 41B, a first power conversion circuit 42A and a second power conversion circuit 42B, a first power supply cutoff circuit 44A and a second power supply cutoff circuit 44B, and temperature detection circuits 45A and 45B. A power line PWa that transmits power from the battery 13 is connected to the ECU 30 via a connector CNT. A positive power line Lpa of the power line PWa passes through a noise filter circuit, such as an EMC (Electromagnetic Compatibility) filter formed by a choke coil La and ceramic capacitors Ca1 and Ca2, and then branches at a branch point Pb. One end of the positive power line Lpa branched at the branch point Pb is connected to the control arithmetic device 31a and a first power supply interruption circuit 44A, and the other end is connected to the control arithmetic device 31b and a second power supply interruption circuit 44B.

[0018] One end of the choke coil La is connected to the positive power supply line Lpa and one end of the ceramic capacitor Ca1, the other end of the choke coil La is connected to one end of the ceramic capacitor Ca2 and the branch point Pb, and the other ends of the ceramic capacitors Ca1 and Ca2 are grounded. On the other hand, the negative line of the power line PWa is connected to the ground line of the ECU 30. The voltage detection circuit 34A detects the power supply voltage VRA supplied from the first power supply interruption circuit 44A to the first power conversion circuit 42A and outputs it to the control and arithmetic device 31a. The voltage detection circuit 34B detects the power supply voltage VRB supplied from the second power supply interruption circuit 44B to the second power conversion circuit 42B and outputs it to the control and arithmetic device 31b.

[0019] Signals of the steering torque Th detected by the torque sensor 10, the vehicle speed Vh detected by the vehicle speed sensor 12, and the steering angle θh detected by the steering angle sensor 14 are transmitted to the control calculation devices 31a and 31b via the connector CNT. The control calculation device 31a calculates a current command value, which is a control target value of the drive current of the motor 20, based on at least the steering torque Th, and outputs voltage control command values ​​V1a, V1b, and V1c obtained by performing compensation on the current command value to the first gate drive circuit 41A. The voltage control command values ​​V1a, V1b, and V1c are the A-phase voltage control command value, B-phase voltage control command value, and C-phase voltage control command value of the first system coil, respectively.

[0020] The control calculation device 31b calculates a current command value, which is a control target value of the drive current of the motor 20, based on at least the steering torque Th, and outputs voltage control command values ​​V2a, V2b, and V2c obtained by performing compensation on the current command value to the second gate drive circuit 41B. The voltage control command values ​​V2a, V2b, and V2c are the A-phase voltage control command value, B-phase voltage control command value, and C-phase voltage control command value of the second system coil, respectively. The control and arithmetic device 31a and the control and arithmetic device 31b may be integrated into a single control and arithmetic device.

[0021] The first power supply interruption circuit 44A has a series circuit configuration in which two power supply interruption field effect transistors (FETs) QC1 and QC2 have their sources connected to each other, forming parasitic diodes in opposite directions. The first power supply interruption circuit 44A connects or disconnects the positive power supply line Lpa and the first power conversion circuit 42A. The drain of the power supply interruption FET QC1 is connected to the positive power supply line Lpa, and the drain of the power supply interruption FET QC2 is connected to the drains of the high-side FETs Q1, Q3, and Q5 of the first power conversion circuit 42A. The control arithmetic unit 31a outputs control signals SsA and SpA to the first gate drive circuit 41A, which respectively control the conduction and interruption of the power supply interruption FETs QC1 and QC2. The first gate drive circuit 41A outputs gate signals for the power supply interruption FETs QC1 and QC2 in response to the control signals SsA and SpA, thereby controlling the on / off of the power supply interruption FETs QC1 and QC2. The power supply cutoff FETQC2 is connected between the DC power supply and the inverter to function as a reverse connection protection field effect transistor that blocks current from flowing from the inverter side to the DC power supply side, in order to prevent a malfunction that may occur if the polarity of the battery 13, which is a DC power supply, is mistakenly connected in reverse.

[0022] The second power supply interruption circuit 44B has a series circuit configuration in which the sources of two power interruption FETs QD1 and QD2 are connected to each other, forming parasitic diodes with opposite orientations. This circuit connects or disconnects the positive power supply line Lpa and the second power conversion circuit 42B. The power interruption FET QD2 also functions as a reverse connection protection field-effect transistor. The drain of the power interruption FET QD1 is connected to the positive power supply line Lpa, and the drain of the power interruption FET QD2 is connected to the drains of the high-side FETs Q1, Q3, and Q5 of the second power conversion circuit 42B. The control arithmetic unit 31b outputs control signals SsB and SpB to the second gate drive circuit 41B, which respectively control the conduction and interruption of the power interruption FETs QD1 and QD2. The second gate drive circuit 41B outputs gate signals for the power interruption FETs QD1 and QD2 in response to the control signals SsB and SpB, thereby controlling the on / off of the power interruption FETs QD1 and QD2.

[0023] When the first gate drive circuit 41A receives the voltage control command values ​​V1a, V1b, and V1c from the control arithmetic device 31a, it generates six gate signals that are pulse-width modulated (PWM) based on the voltage control command values ​​V1a, V1b, and V1c and a triangular wave carrier signal, and outputs these gate signals to the first power conversion circuit 42A. When the second gate drive circuit 41B receives the voltage control command values ​​V2a, V2b, and V2c from the control arithmetic device 31b, it generates six pulse-width-modulated gate signals based on the voltage control command values ​​V2a, V2b, and V2c and a triangular wave carrier signal, and outputs these gate signals to the second power conversion circuit 42B.

[0024] The first power conversion circuit 42A includes an inverter having three switching arms SWAa, SWAb, and SWAc configured by FETs, which are switching elements, and electrolytic capacitors CA1 and CA2. The switching arms SWAa, SWAb, and SWAc are connected in parallel with one another. The A-phase switching arm SWAa includes a high-side FET Q1 and a low-side FET Q2 connected in series, the B-phase switching arm SWAb includes a high-side FET Q3 and a low-side FET Q4 connected in series, and the C-phase switching arm SWAc includes a high-side FET Q5 and a low-side FET Q6 connected in series.

[0025] A gate signal output from the first gate drive circuit 41A is input to the gate of each of the FETs Q1 to Q6, and this gate signal causes an A-phase current I1a, a B-phase current I1b, and a C-phase current I1c to flow from the connection points between the FETs of each of the switching arms SWAa, SWAb, and SWAc to the A-phase winding, B-phase winding, and C-phase winding of the first system coil of the motor 20 via the first motor current cutoff circuit 33A. The electrolytic capacitors CA1 and CA2 have a noise removal function and a power supply auxiliary function for the first power conversion circuit 42 A. The electrolytic capacitors CA1 and CA2 may be hybrid capacitors that use an electrolyte that combines a conductive polymer and an electrolytic solution, for example.

[0026] The second power conversion circuit 42B includes an inverter having three switching arms SWBa, SWBb, and SWBc configured by FETs, which are switching elements, and electrolytic capacitors CB1 and CB2. The switching arms SWBa, SWBb, and SWBc are connected in parallel with one another. The A-phase switching arm SWBa includes a high-side FET Q1 and a low-side FET Q2 connected in series, the B-phase switching arm SWBb includes a high-side FET Q3 and a low-side FET Q4 connected in series, and the C-phase switching arm SWBc includes a high-side FET Q5 and a low-side FET Q6 connected in series.

[0027] A gate signal output from the second gate drive circuit 41B is input to the gate of each FET Q1 to Q6, and this gate signal causes an A-phase current I2a, a B-phase current I2b, and a C-phase current I2c to flow from the connection points between the FETs of each switching arm SWBa, SWBb, and SWBc to the A-phase winding, B-phase winding, and C-phase winding of the second system coil of the motor 20 via the second motor current cut-off circuit 33B. The electrolytic capacitors CB1 and CB2 have a noise removal function and a power supply auxiliary function for the second power conversion circuit 42 B. The electrolytic capacitors CB1 and CB2 may be, for example, hybrid capacitors.

[0028] The first power conversion circuit 42A and the second power conversion circuit 42B may be power conversion circuits that supply three-phase current to two different motors that respectively generate steering assist forces that assist the steering of the steering wheel 1. For example, these two different motors may be connected to the same steering shaft 2 via reduction gears.

[0029] Current detection circuits 39A1, 39B1, and 39C1 are provided on the source sides of low-side FETs Q2, Q4, and Q6, which form the lower arms of switching arms SWAa, SWAb, and SWAc of the first power conversion circuit 42A. The current detection circuits 39A1, 39B1, and 39C1 include shunt resistors through which downstream currents of the switching arms SWAa, SWAb, and SWAc flow, respectively. The current detection circuits 39A1, 39B1, and 39C1 detect the A-phase current, B-phase current, and C-phase current of the first system coil based on the voltage drop across the shunt resistors, and output the detected values ​​I1ad, I1bd, and I1cd. Current detection circuits 39A2, 39B2, and 39C2 are provided on the source sides of low-side FETs Q2, Q4, and Q6, which form the lower arms of switching arms SWBa, SWBb, and SWBc of the second power conversion circuit 42B. The current detection circuits 39A2, 39B2, and 39C2 include shunt resistors through which downstream currents of the switching arms SWBa, SWBb, and SWBc flow, respectively. The current detection circuits 39A2, 39B2, and 39C2 detect the A-phase current, B-phase current, and C-phase current of the second system coil based on the voltage drop across the shunt resistors, and output the detected values ​​I2ad, I2bd, and I2cd.

[0030] The first motor current interruption circuit 33A has three phase interruption FETs QA1, QA2, and QA3 for interrupting the phase current of the motor. The source of the phase interruption FET QA1 is connected to the junction of FETs Q1 and Q2 of the switching arm SWAa of the first power conversion circuit 42A, and its drain is connected to the A-phase winding of the first system coil of the motor 20. The source of the phase interruption FET QA2 is connected to the junction of FETs Q3 and Q4 of the switching arm SWAb, and its drain is connected to the B-phase winding of the first system coil. The source of the phase interruption FET QA3 is connected to the junction of FETs Q5 and Q6 of the switching arm SWAc, and its drain is connected to the C-phase winding of the first system coil. The control calculation device 31a outputs a control signal SmA that controls the conduction and cutoff of the first motor current cutoff circuit 33A to the first gate drive circuit 41A. The first gate drive circuit 41A outputs gate signals of the phase cutoff FETs QA1 to QA3 in response to the control signal SmA, and causes the A-phase current I1a, B-phase current I1b, and C-phase current I1c to flow or be cut off from the first power conversion circuit 42A to the motor 20.

[0031] The second motor current interruption circuit 33B has three phase interruption FETs QB1, QB2, and QB3 for interrupting the phase current of the motor. The source of the phase interruption FET QB1 is connected to the junction of FETs Q1 and Q2 of the switching arm SWBa of the second power conversion circuit 42B, and its drain is connected to the A-phase winding of the second system coil of the motor 20. The source of the phase interruption FET QB2 is connected to the junction of FETs Q3 and Q4 of the switching arm SWBb, and its drain is connected to the B-phase winding of the second system coil. The source of the phase interruption FET QB3 is connected to the junction of FETs Q5 and Q6 of the switching arm SWBc, and its drain is connected to the C-phase winding of the second system coil. The control calculation device 31b outputs a control signal SmB to the second gate drive circuit 41B, which controls the conduction and cutoff of the second motor current cutoff circuit 33B. The second gate drive circuit 41B outputs gate signals for the phase cutoff FETs QB1 to QB3 in response to the control signal SmB, and causes the A-phase current I2a, B-phase current I2b, and C-phase current I2c to flow or be cut off from the second power conversion circuit 42B to the motor 20. The high-side FETs Q1, Q3 and Q5, the low-side FETs Q2, Q4 and Q6, the phase-blocking FETs QA1 to QA3 and QB1 to QB3, and the power-blocking FETs QC1, QC2, QD1 and QD2 may be, for example, silicon devices or silicon carbide devices.

[0032] The motor rotation angle detection circuit 23 acquires a detection value from the rotation angle sensor 23a and detects the motor rotation angle θm, which is the rotation angle of the rotary shaft of the motor 20. The motor rotation angle detection circuit 23 outputs the motor rotation angle θm to the control arithmetic devices 31a and 31b. The temperature detection circuit 45A includes two temperature sensors arranged close to each other near the first power conversion circuit 42A. The temperature detection circuit 45B includes two temperature sensors arranged close to each other near the second power conversion circuit 42B. These temperature sensors are an example of the "temperature detection element" described in the claims. Note that the temperature sensors do not have to be arranged near the first power conversion circuit 42A or the second power conversion circuit 42B. It is sufficient that the temperature sensors are arranged in locations of the ECU 30 that tend to generate heat.

[0033] The temperature detection circuit 45A outputs a detection signal SdA1 of the temperature of the ECU 30 based on the output of one of the two temperature sensors and a detection signal SdA2 of the temperature of the ECU 30 based on the output of the other sensor to the control arithmetic device 31a. The temperature detection circuit 45B outputs a detection signal SdB1 of the temperature of the ECU 30 based on the output of one of the two temperature sensors and a detection signal SdB2 of the temperature of the ECU 30 based on the output of the other sensor to the control arithmetic device 31b. These temperature sensors may be thermistors, for example. The temperature detection circuits 45A and 45B may include a thermistor processing circuit that detects the temperature of the ECU 30 according to the resistance value of the thermistor.

[0034] 3 is a circuit diagram of an example of a temperature detection circuit 45A. The temperature detection circuit 45A includes a voltage divider circuit in which thermistors serving as temperature sensors 45A1 and 45A2 are connected in series with fixed resistors R1 and R2, respectively, and capacitors Ct1 and Ct2. The temperature detection circuit 45B has a similar configuration. A voltage divider circuit formed by the thermistor 45A1 and fixed resistor R1 divides the predetermined voltage Vcc based on the ratio of the resistance value of the thermistor 45A1 to the resistance value of the fixed resistor R1, and outputs the value obtained by the voltage division to the control arithmetic device 31a as a detection signal SdA1. A voltage divider circuit formed by the thermistor 45A2 and fixed resistor R2 divides the predetermined voltage Vcc based on the ratio of the resistance value of thermistor 45A2 to the resistance value of the fixed resistor R2, and outputs the value obtained by the voltage division to the control arithmetic device 31a as a detection signal SdA2.

[0035] 4 is a schematic diagram of a heat dissipation structure that dissipates heat generated by the first power conversion circuit 42A and the second power conversion circuit 42B. Reference numeral 36 denotes a circuit board, and electronic components of the first power conversion circuit 42A and the second power conversion circuit 42B are mounted on the front surface ff and the back surface fr of the circuit board 36. Reference numeral 37 denotes a heat dissipation member 37 that dissipates heat generated by the first power conversion circuit 42A and the second power conversion circuit 42B. The heat dissipation member 37 may be a heat sink made of a metal with good thermal conductivity, such as an aluminum alloy. The electronic components included in each of the first power conversion circuit 42A and the second power conversion circuit 42B dissipate heat through a heat sink 37. A surface f1 of the electronic components mounted on the front surface ff of the circuit board 36, opposite the circuit board 36, and a surface f2 of the temperature sensors 45A1 and 45A2 of the temperature detection circuit 45A, opposite the circuit board 36, are thermally connected to the same heat sink 37. In addition, the electronic components mounted on the back surface fr of the circuit board 36 are thermally connected to the same heat sink 37 through vias that penetrate the circuit board 36. For example, faces f1 and f2 are brought into contact with the heat sink 37 via thermal interface materials (TIM) 38a and 38b, respectively, such as conductive paste (e.g., thermal grease), and electronic components mounted on the back surface fr are brought into contact with the heat sink 37 via thermal interface material 38c and vias. The temperature sensor of the temperature detection circuit 45B is also thermally connected to the heat sink 37 in a configuration similar to that of the temperature sensors 45A1 and 45A2.

[0036] See Fig. 2. The control arithmetic device 31a acquires, via an A / D converter (not shown), detection values ​​I1ad, I1bd, and I1cd of the A-phase current, B-phase current, and C-phase current of the first system coil, and detection signals SdA1 and SdA2 of the temperature of the ECU 30. The control arithmetic device 31b acquires, via an A / D converter (not shown), detection values ​​I2ad, I2bd, and I2cd of the A-phase current, B-phase current, and C-phase current of the second system coil, and detection signals SdB1 and SdB2 of the temperature of the ECU 30. In the following description, the detection signals SdA1 and SdA2 may be collectively referred to as "SdA," and the detection signals SdB1 and SdB2 may be collectively referred to as "SdB."

[0037] The control arithmetic device 31a and the control arithmetic device 31b are connected by a communication line 35 such as a CAN (Controller Area Network), and can transmit and receive data to and from each other. For example, the control and arithmetic device 31a may calculate a battery current Ibat1 flowing from the battery 13 to the first system coil based on detected values ​​I1ad, I1bd, and I1cd of the A-phase current, B-phase current, and C-phase current of the first system coil, and transmit the calculated value to the control and arithmetic device 31b. Similarly, the control and arithmetic device 31b may calculate a battery current Ibat2 flowing from the battery 13 to the second system coil based on detected values ​​I2ad, I2bd, and I2cd of the A-phase current, B-phase current, and C-phase current of the second system coil, and transmit the calculated value to the control and arithmetic device 31a.

[0038] The control calculation device 31a estimates component temperatures, which are the temperatures of multiple electronic components that make up the first current control circuit 40A that controls the current that drives the first system coil, based on the detected values ​​I1ad, I1bd, and I1cd of the A-phase current, B-phase current, and C-phase current of the first system coil of the motor 20, the battery currents Ibat1 and Ibat2, the power supply voltage VRA, and the detection signal SdA output by the temperature detection circuit 45A.

[0039] The control arithmetic device 31a may estimate temperatures of electronic components constituting the first current control circuit 40A, such as high-side FETs Q1, Q3, and Q5, low-side FETs Q2, Q4, and Q6, electrolytic capacitors CA1 and CA2, shunt resistors of current detection circuits 39A1, 39B1, and 39C1, phase interruption FETs QA1, QA2, and QA3, and power interruption FETs QC1 and QC2 of the first power conversion circuit 42A.

[0040] Similarly, the control calculation device 31b estimates the component temperatures, which are the temperatures of multiple electronic components that make up the second current control circuit 40B that controls the current that drives the second system coil, based on the detected values ​​I2ad, I2bd, and I2cd of the A-phase current, B-phase current, and C-phase current of the second system coil of the motor 20, the battery currents Ibat1 and Ibat2, the power supply voltage VRB, and the detection signal SdB output by the temperature detection circuit 45B.

[0041] The control calculation device 31b may estimate temperatures of electronic components constituting the second current control circuit 40B, such as high-side FETs Q1, Q3, and Q5, low-side FETs Q2, Q4, and Q6, electrolytic capacitors CB1 and CB2, shunt resistors of current detection circuits 39A2, 39B2, and 39C2, phase interruption FETs QB1, QB2, and QB3, and power interruption FETs QD1 and QD2 of the second power conversion circuit 42B. Furthermore, the control and arithmetic devices 31a and 31b may estimate the component temperature of the choke coil La of the noise filter circuit, which is an electronic component common to the first current control circuit 40A and the second current control circuit 40B.

[0042] Furthermore, the control and arithmetic device 31a estimates the temperature of the ECU 30 based on the detection signal SdA output by the temperature detection circuit 45A. The control and arithmetic device 31b estimates the temperature of the ECU 30 based on the detection signal SdB output by the temperature detection circuit 45B. In the following description, the temperature of the ECU 30 will be referred to as the "ECU temperature." Furthermore, the control and arithmetic device 31a estimates the temperature of the motor 20 (for example, the temperature of the windings of the first system coil) based on the detected values ​​I1ad, I1bd, I1cd of the A-phase current, B-phase current, and C-phase current of the first system coil and the ECU temperature. The control and arithmetic device 31b estimates the temperature of the motor 20 (for example, the temperature of the windings of the second system coil) based on the detected values ​​I2ad, I2bd, I2cd of the A-phase current, B-phase current, and C-phase current of the second system coil and the ECU temperature. In the following description, the temperature of the motor 20 may be referred to as the "motor temperature."

[0043] The control and arithmetic device 31a limits the current that drives the first system coils based on the estimated component temperatures, ECU temperature, and motor temperature, and the battery voltage Vbat1, which is the voltage between the output terminals of the battery 13. Similarly, the control and arithmetic device 31b limits the current that drives the second system coils based on the estimated component temperatures, ECU temperature, and motor temperature, and the battery voltage Vbat1.

[0044] Next, the control and arithmetic devices 31a and 31b will be described. Fig. 5 is a block diagram showing an example of the functional configuration of the control and arithmetic device 31a. The control and arithmetic device 31b has a similar configuration. The control calculation device 31a includes a current command value calculation unit 50, a current limiting unit 51, subtractors 52 and 53, a proportional-integral (PI) control unit 54, a two-phase / three-phase conversion unit 55, a three-phase / two-phase conversion unit 56, an angular velocity conversion unit 57, a first reduction coefficient setting unit 60, a second reduction coefficient setting unit 70, and a third reduction coefficient setting unit 71, and drives the motor 20 by vector control.

[0045] The current command value calculation unit 50 calculates a q-axis current command value Iq0 and a d-axis current command value Id0 to be passed through the motor 20 based on the steering torque Th, the vehicle speed Vh, the motor rotation angle θm of the motor 20, and the rotation angular velocity ω of the motor 20. The current limiting unit 51 limits the q-axis current command value Iq0 and the d-axis current command value Id0 based on the component reduction coefficient K1 set by the first reduction coefficient setting unit 60, the ECU reduction coefficient K2 and the motor reduction coefficient K3 set by the second reduction coefficient setting unit 70, and the battery reduction coefficient K4 set by the third reduction coefficient setting unit 71, and outputs the limited q-axis current command value Iq1 and the d-axis current command value Id1. The component reduction coefficient K1, the ECU reduction coefficient K2, the motor reduction coefficient K3, and the battery reduction coefficient K4 will be described later.

[0046] The detected values ​​I1ad, I1bd, and I1cd of the A-phase current, B-phase current, and C-phase current of the first system coil of the motor 20 detected by the current detection circuits 39A1, 39B1, and 39C1 are converted into currents id and iq of the d-q2 axes by the three-phase / two-phase conversion unit 56. Subtractors 52 and 53 calculate the q-axis deviation current Δq and the d-axis deviation current Δd by subtracting the fed-back currents iq and id from the q-axis current command value Iq1 and the d-axis current command value Id1, respectively.

[0047] The PI control unit 54 calculates voltage command values ​​vq, vd such that the q-axis deviation current Δq and the d-axis deviation current Δd are each set to 0. The two-phase / three-phase conversion unit 55 converts the voltage command values ​​vd, vq into an A-phase voltage control command value V1a, a B-phase voltage control command value V1b, and a C-phase voltage control command value V1c of the first system of the motor 20, respectively, and outputs them to the first gate drive circuit 41A. The angular velocity conversion unit 57 calculates the rotational angular velocity ω of the motor 20 based on the change over time in the motor rotational angle θm. The motor rotational angle θm and rotational angular velocity ω are input to the current command value calculation unit 50 and used for vector control.

[0048] 6 is a block diagram showing an example of the functional configuration of the first reduction coefficient setting unit 60 according to the first embodiment. The first reduction coefficient setting unit 60 estimates the component temperature of each of the electronic components constituting the first current control circuit 40A. The first reduction coefficient setting unit 60 sets a plurality of reduction coefficients for limiting the current that drives the first system coil based on the component temperatures estimated for each of the electronic components. For example, the first reduction coefficient setting unit 60 sets a plurality of different reduction coefficients for each of the different component temperatures included in the component temperatures estimated for each of the electronic components.

[0049] For example, the first reduction coefficient setting unit 60 may classify the electronic components into groups based on the type of electronic component, the connection relationship within the first current control circuit 40A, etc., and set a reduction coefficient for each group. The first reduction coefficient setting unit 60 selects and outputs one of the multiple limit coefficients as the component reduction coefficient K1. The first reduction coefficient setting unit 60 includes high-side FET temperature estimation units 61a1 to 61a3, low-side FET temperature estimation units 61b1 to 61b3, shunt resistance temperature estimation units 61c1 to 61c3, phase shutdown FET temperature estimation units 61d1 to 61d3, power shutdown FET temperature estimation units 61e1 and 61e2, capacitor temperature estimation units 61f1 and 61f2, a coil temperature estimation unit 61g, selectors 62a, 62b, 62c, 62d, 62e, 62f and 64, a high-side FET reduction coefficient setting unit 63a, a low-side FET reduction coefficient setting unit 63b, a shunt resistance reduction coefficient setting unit 63c, a phase shutdown FET reduction coefficient setting unit 63d, a power shutdown FET reduction coefficient setting unit 63e, a capacitor reduction coefficient setting unit 63f, and a coil reduction coefficient setting unit 63g.

[0050] The high-side FET temperature estimators 61a1 to 61a3 estimate component temperatures Tea1 to Tea3, respectively, of the high-side FETs Q1, Q3, and Q5 of the first power conversion circuit 42A. The low-side FET temperature estimators 61b1 to 61b3 estimate component temperatures Teb1 to Teb3, respectively, of the low-side FETs Q2, Q4, and Q6 of the first power conversion circuit 42A. The shunt resistor temperature estimators 61c1 to 61c3 estimate component temperatures Tec1 to Tec3, respectively, of the shunt resistors of the current detection circuits 39A1, 39B1, and 39C1.

[0051] The phase interruption FET temperature estimators 61d1 to 61d3 estimate component temperatures Ted1 to Ted3 of the phase interruption FETs QA1, QA2, and QA3, respectively. The power interruption FET temperature estimators 61e1 and 61e2 estimate component temperatures Tee1 and Tee2 of the power interruption FETs QC1 and QC2. The capacitor temperature estimators 61f1 and 61f2 estimate component temperatures Tef1 and Tef2 of the electrolytic capacitors CA1 and CA2, respectively, of the first power conversion circuit 42A. The coil temperature estimator 61g estimates the component temperature Teg of the choke coil La of the noise filter circuit. In the following description, the component temperature Teg of the choke coil La may be referred to as the "coil temperature Teg."

[0052] FIG. 7 is a block diagram showing an example of the functional configuration of the high-side FET temperature estimator 61a1. The high-side FET temperature estimator 61a1 includes a power loss calculator 72, a gain multiplier 73, a first low-pass filter 74, a second low-pass filter 75, and an adder . The power loss calculation unit 72 calculates the power loss W in the high-side FET Q1 of the first power conversion circuit 42A. For example, the power loss calculation unit 72 estimates the on-resistance Rf of the high-side FET Q1 based on the previous value of the component temperature Tea1 of the FET calculated in the previous control cycle, and then calculates the power loss W in the high-side FET Q1 based on the on-resistance Rf, the duty ratio Da of the A-phase voltage control command value, the A-phase current I1ad, the power supply voltage VRA, the FET switching loss occurrence time Tsw, the body diode forward voltage Vdsf, the body diode current generation time Td, and the motor drive PWM frequency fpwm. It should be noted that power loss calculation unit 72 of control calculation device 31b uses power supply voltage VRB instead of power supply voltage VRA to estimate power loss W. The same applies to the following description.

[0053] The switching loss generation time Tsw is the sum of the turn-on time and turn-off time of the FET, and the body diode current generation time Td is the time during which a regenerative current flows through the body diode (parasitic diode) after the FET is turned off. For example, the power loss calculation section 72 may calculate the power loss W based on the following equation. W=Rf×Da×I1ad 2 +(1 / 6)×VRA×I1ad×Tsw×fpwm (where I1ad≧0) W=Rf×Da×I1ad 2 -Vdsf×I1ad×Td×fpwm (where I1ad<0)

[0054] A gain multiplication unit 73 calculates the product (G1×W) of the power loss W and a predetermined conversion gain G1, and outputs the product to a first low-pass filter 74. The first low-pass filter 74 performs low-pass filtering on the product (G1×W), and outputs a signal to an adder 76. A second low-pass filter 75 performs low-pass filtering on a detection signal SdA of the temperature of the ECU 30 output by the temperature detection circuit 45A, and outputs the signal as a base temperature Tth to the adder 76. The adder 76 calculates the sum of the output of the first low-pass filter 74 and the base temperature Tth as the component temperature Tea1 of the high-side FET Q1. The conversion gain G1, the first cutoff frequency fc1 of the first low-pass filter 74, and the second cutoff frequency fc2 of the second low-pass filter 75 may be set appropriately in advance by simulation or the like.

[0055] The high-side FET temperature estimators 61a2 and 61a3, the low-side FET temperature estimators 61b1 to 61b3, the shunt resistor temperature estimators 61c1 to 61c3, the phase cutoff FET temperature estimators 61d1 to 61d3, the power cutoff FET temperature estimators 61e1 and 61e2, the capacitor temperature estimators 61f1 and 61f2, and the coil temperature estimator 61g may also have a configuration similar to that of the high-side FET temperature estimator 61a1. However, these temperature estimation units and high-side FET temperature estimation unit 61a1 differ in the conversion gain G1 of gain multiplication unit 73, the first cutoff frequency fc1 of first low-pass filter 74 and the second cutoff frequency fc2 of second low-pass filter 75, and the calculation method of loss power W in loss power calculation unit 72.

[0056] For example, different values ​​may be set for the converted gain G1 of the gain multiplication unit 73, the first cutoff frequency fc1 of the first low-pass filter 74, and the second cutoff frequency fc2 of the second low-pass filter 75 between electronic components arranged in different locations. These converted gain G1, first cutoff frequency fc1, and second cutoff frequency fc2 may also be set appropriately in advance by simulation or the like. Furthermore, for example, the method of calculating the power loss W in the power loss calculation unit 72 may be different for each electronic component that generates heat differently.

[0057] For example, the power loss calculation unit 72 of the high-side FET temperature estimator 61a2 estimates the on-resistance Rf of the high-side FET Q3 based on the previous value of the component temperature Tea2 of the high-side FET Q3 calculated in the previous control cycle, and then calculates the power loss W in the high-side FET Q3 based on the on-resistance Rf, the duty ratio Db of the B-phase voltage control command value, the B-phase current I1bd, the power supply voltage VRA, the switching loss occurrence time Tsw, the body diode forward voltage Vdsf, the body diode current generation time Td, and the motor drive PWM frequency fpwm. For example, the power loss calculation unit 72 of the high-side FET temperature estimator 61a2 may calculate the power loss W based on the following equation. W=Rf×Db×I1bd 2 +(1 / 6)×VRA×I1bd×Tsw×fpwm (where I1bd≧0) W=Rf×Db×I1bd 2 -Vdsf×I1bd×Td×fpwm (where I1bd<0)

[0058] Furthermore, for example, the power loss calculation unit 72 of the high-side FET temperature estimator 61a3 estimates the on-resistance Rf of the high-side FET Q5 based on the previous value of the component temperature Tea3 of the high-side FET Q5 calculated in the previous control cycle, and calculates the power loss W in the high-side FET Q5 based on the on-resistance Rf, the duty ratio Dc of the C-phase voltage control command value, the C-phase current I1cd, the power supply voltage VRA, the switching loss occurrence time Tsw, the body diode forward voltage Vdsf, the body diode current generation time Td, and the motor drive PWM frequency fpwm. For example, the power loss calculation unit 72 of the high-side FET temperature estimator 61a3 may calculate the power loss W based on the following equation. W=Rf×Dc×I1cd 2 +(1 / 6)×VRA×I1cd×Tsw×fpwm (where I1cd≧0) W=Rf×Dc×I1cd2 -Vdsf×I1cd×Td×fpwm (where I1cd<0)

[0059] Furthermore, for example, the power loss calculation unit 72 of the low-side FET temperature estimator 61b1 estimates the on-resistance Rf of the FET based on the previous value of the component temperature Teb1 of the low-side FET Q2 calculated in the previous control cycle, and calculates the power loss W in the low-side FET Q2 based on the on-resistance Rf, the A-phase duty ratio Da, the A-phase current I1ad, the power supply voltage VRA, the switching loss occurrence time Tsw, the body diode forward voltage Vdsf, the body diode current generation time Td, and the motor drive PWM frequency fpwm. For example, the power loss calculation unit 72 of the low-side FET temperature estimator 61b1 may calculate the power loss W based on the following equation. W=Rf×(1-Da)×I1ad 2 -(1 / 6) × VRA × I1ad × Tsw × fpwm (where I1ad≦0) W=Rf×(1-Da)×I1ad 2 +Vdsf×I1ad×Td×fpwm (where I1ad>0)

[0060] Furthermore, for example, the power loss calculation unit 72 of the low-side FET temperature estimator 61b2 estimates the on-resistance Rf of the FET based on the previous value of the component temperature Teb2 of the low-side FET Q4 calculated in the previous control cycle, and calculates the power loss W in the low-side FET Q4 based on the on-resistance Rf, the B-phase duty ratio Db, the B-phase current I1bd, the power supply voltage VRA, the switching loss occurrence time Tsw, the body diode forward voltage Vdsf, the body diode current generation time Td, and the motor drive PWM frequency fpwm. For example, the power loss calculation unit 72 of the low-side FET temperature estimator 61b2 may calculate the power loss W based on the following equation. W=Rf×(1-Db)×I1bd 2 -(1 / 6) × VRA × I1bd × Tsw × fpwm (where I1bd≦0) W=Rf×(1-Db)×I1bd 2+Vdsf×I1bd×Td×fpwm (where I1bd>0)

[0061] Furthermore, for example, the power loss calculation unit 72 of the low-side FET temperature estimator 61b3 estimates the on-resistance Rf of the FET based on the previous value of the component temperature Teb3 of the low-side FET Q6 calculated in the previous control cycle, and calculates the power loss W in the low-side FET Q6 based on the on-resistance Rf, the C-phase duty ratio Dc, the C-phase current I1cd, the power supply voltage VRA, the switching loss occurrence time Tsw, the body diode forward voltage Vdsf, the body diode current generation time Td, and the motor drive PWM frequency fpwm. For example, the power loss calculation unit 72 of the low-side FET temperature estimator 61b3 may calculate the power loss W based on the following equation. W=Rf×(1-Dc)×I1cd 2 -(1 / 6) × VRA × I1cd × Tsw × fpwm (where I1cd≦0) W=Rf×(1-Dc)×I1cd 2 +Vdsf×I1cd×Td×fpwm (where I1cd>0)

[0062] Furthermore, for example, the power loss calculation unit 72 of the shunt resistor temperature estimator 61c1 estimates the resistance value Rs of the shunt resistor based on the previous value of the component temperature Tec1 of the shunt resistor of the current detection circuit 39A1 calculated in the previous control cycle, and calculates the power loss W in the shunt resistor of the current detection circuit 39A1 based on the shunt resistance Rs, the A-phase duty ratio Da, and the A-phase current I1ad. For example, the power loss calculation unit 72 of the shunt resistance temperature estimation unit 61c1 may calculate the power loss W based on the following equation. W=Rs×(1-Da)×I1ad 2

[0063] Furthermore, for example, the power loss calculation unit 72 of the shunt resistor temperature estimator 61c2 estimates the resistance value Rs of the shunt resistor based on the previous value of the component temperature Tec2 of the shunt resistor of the current detection circuit 39B1 calculated in the previous control cycle, and calculates the power loss W in the shunt resistor of the current detection circuit 39B1 based on the shunt resistance Rs, the B-phase duty ratio Db, and the B-phase current I1bd. For example, the power loss calculation unit 72 of the shunt resistance temperature estimation unit 61c2 may calculate the power loss W based on the following equation. W=Rs×(1-Db)×I1bd 2

[0064] Furthermore, for example, the power loss calculation unit 72 of the shunt resistor temperature estimator 61c3 estimates the resistance value Rs of the shunt resistor based on the previous value of the component temperature Tec3 of the shunt resistor of the current detection circuit 39C1 calculated in the previous control cycle, and calculates the power loss W in the shunt resistor of the current detection circuit 39C1 based on the shunt resistance Rs, the C-phase duty ratio Dc, and the C-phase current I1cd. For example, the power loss calculation unit 72 of the shunt resistance temperature estimation unit 61c3 may calculate the power loss W based on the following equation. W=Rs×(1-Dc)×I1cd 2

[0065] Furthermore, for example, the power loss calculation unit 72 of the phase interruption FET temperature estimation unit 61d1 estimates the on-resistance Rf of the FET based on the previous value of the component temperature Ted1 of the phase interruption FET QA1 calculated in the previous control cycle, and calculates the power loss W in the phase interruption FET QA1 based on the on-resistance Rf and the A-phase current I1ad. For example, the power loss calculation unit 72 of the phase cutoff FET temperature estimation unit 61d1 may calculate the power loss W based on the following equation. W=Rf×I1ad 2

[0066] Furthermore, for example, the power loss calculation unit 72 of the phase interruption FET temperature estimation unit 61d2 estimates the on-resistance Rf of the FET based on the previous value of the component temperature Ted2 of the phase interruption FET QA2 calculated in the previous control cycle, and calculates the power loss W in the phase interruption FET QA2 based on the on-resistance Rf and the B-phase current I1bd. For example, the power loss calculation unit 72 of the phase cutoff FET temperature estimation unit 61d2 may calculate the power loss W based on the following equation. W=Rf×I1bd 2

[0067] Furthermore, for example, the power loss calculation unit 72 of the phase interruption FET temperature estimation unit 61d3 estimates the on-resistance Rf of the FET based on the previous value of the component temperature Ted3 of the phase interruption FET QA3 calculated in the previous control cycle, and calculates the power loss W in the phase interruption FET QA3 based on the on-resistance Rf and the C-phase current I1cd. For example, the power loss calculation unit 72 of the phase cutoff FET temperature estimation unit 61d3 may calculate the power loss W based on the following equation. W=Rf×I1cd 2

[0068] Furthermore, for example, the power loss calculation unit 72 of the power-off FET temperature estimation units 61e1 and 61e2 estimates the on-resistances Rf of the power-off FETs QC1 and QC2 based on the previous values ​​of the component temperatures Tee1 and Tee2 of the power-off FETs QC1 and QC2 calculated in the previous control cycle, and calculates the power loss W of each of the power-off FETs QC1 and QC2 based on the on-resistances Rf and the battery current Ibat1. For example, the power loss calculation section 72 of the power cut-off FET temperature estimation sections 61e1 and 61e2 may calculate the power loss W based on the following equation. W=Rf×Ibat1 2

[0069] Furthermore, for example, the capacitor temperature estimation units 61f1 and 61f2 estimate the equivalent series resistance (ESR) Resr of the electrolytic capacitors CA1 and CA2, respectively, based on the previous values ​​of the component temperatures Tef1 and Tef2 of the electrolytic capacitors CA1 and CA2 of the first power conversion circuit 42A calculated in the previous control cycle. Then, based on the equivalent series resistance Resr and the d-axis current id and q-axis current iq calculated by the three-phase / two-phase conversion unit 56, the respective power losses W in the electrolytic capacitors CA1 and CA2 are calculated. For example, the power loss calculation unit 72 of the capacitor temperature estimation units 61f1 and 61f2 may calculate the power loss W based on the following equation. W=Rf×(Id 2 +Iq 2 )

[0070] The coil temperature estimation unit 61g also estimates the DC resistance Rdc of the choke coil La of the noise filter circuit based on the previous value of the coil temperature Teg calculated in the previous control cycle, and calculates the power loss W in the choke coil La based on the DC resistance Rdc and the battery currents Ibat1 and Ibat2. For example, the power loss calculation unit 72 of the coil temperature estimation unit 61g may calculate the power loss W based on the following equation. W=Rdc×(Ibat1+Ibat2) 2 When the drive of the second system coil is prohibited, the battery current Ibat2 may be set to 0 [A] to calculate the power loss W. When the data on the battery current Ibat2 cannot be obtained from the control calculation device 31b due to an abnormality in the communication line 35 or the like, the value of the battery current Ibat2 may be replaced with the value of the battery current Ibat1.

[0071] 6, the selector 62a selects one of the component temperatures Tea1 to Tea3 of the high-side FETs Q1, Q3, and Q5 estimated by the high-side FET temperature estimators 61a1 to 61a3 as the high-side FET temperature Tea. For example, the selector 62a may select the highest temperature among the component temperatures Tea1 to Tea3 as the high-side FET temperature Tea. The selector 62b selects one of the component temperatures Teb1 to Teb3 of the low-side FETs Q2, Q4, and Q6 estimated by the low-side FET temperature estimators 61b1 to 61b3 as the low-side FET temperature Teb. For example, the selector 62b may select the highest temperature among the component temperatures Teb1 to Teb3 as the low-side FET temperature Teb.

[0072] The selector 62c selects one of the component temperatures Tec1 to Tec3 of the shunt resistor estimated by the shunt resistor temperature estimators 61c1 to 61c3 as the shunt resistor temperature Tec. For example, the selector 62c may select the highest temperature among the component temperatures Tec1 to Tec3 as the shunt resistor temperature Tec. The selector 62d selects one of the component temperatures Ted1 to Ted3 of the phase shutoff FETs QA1, QA2, and QA3 estimated by the phase shutoff FET temperature estimators 61d1 to 61d3 as the phase shutoff FET temperature Ted. For example, the selector 62d may select the highest temperature among the component temperatures Ted1 to Ted3 as the phase shutoff FET temperature Ted. The selector 62e selects one of the component temperatures Tee1 and Tee2 of the power shutdown FETs QC1 and QC2 estimated by the power shutdown FET temperature estimation units 61e1 and 61e2 as the power shutdown FET temperature Tee. The selector 62e may select a temperature higher than either of the component temperatures Tee1 and Tee2 as the power shutdown FET temperature Tee. The selector 62f selects one of the component temperatures Tef1 and Tef2 of the electrolytic capacitors CA1 and CA2 estimated by the capacitor temperature estimation units 61f1 and 61f2 as the capacitor temperature Tef. For example, the selector 62f may select a temperature higher than either of the component temperatures Tef1 and Tef2 as the capacitor temperature Tef.

[0073] The high-side FET reduction coefficient setting unit 63a sets a high-side FET reduction coefficient Ka, which is a reduction coefficient for limiting the current that drives the first system coil, based on the high-side FET temperature Tea. 8 is a schematic diagram of an example of a characteristics map showing the characteristics of the high-side FET reduction coefficient Ka set by the high-side FET reduction coefficient setting unit 63a. The high-side FET reduction coefficient setting unit 63a sets the high-side FET reduction coefficient Ka to a maximum value Kmax when the high-side FET temperature Tea is lower than the first temperature T1. The maximum value Kmax may be, for example, a value greater than 0% and equal to or less than 100%.

[0074] In order to give the high-side FET reduction coefficient Ka a hysteresis characteristic, when the high-side FET reduction coefficient Ka has a maximum value Kmax, the high-side FET reduction coefficient setting unit 63a sets the high-side FET reduction coefficient Ka to the maximum value Kmax as long as the high-side FET temperature Tea is lower than a second temperature T2 that is higher than the first temperature T1. When the high-side FET temperature Tea exceeds the second temperature T2 while the high-side FET reduction coefficient Ka is at its maximum value Kmax, the high-side FET reduction coefficient setting unit 63a reduces the high-side FET reduction coefficient Ka from the maximum value Kmax to the minimum value Kmin until the high-side FET temperature Tea reaches a third temperature T3 that is higher than the second temperature T2. The minimum value Kmin may be, for example, a value smaller than 100% and equal to or greater than 0%. When the high-side FET temperature Tea is higher than the third temperature T3, the high-side FET reduction coefficient setting unit 63a sets the high-side FET reduction coefficient Ka to the minimum value Kmin.

[0075] When the high-side FET reduction coefficient Ka has the minimum value Kmin, the high-side FET reduction coefficient setting unit 63a sets the high-side FET reduction coefficient Ka to the minimum value Kmin as long as the high-side FET temperature Tea is higher than a fourth temperature T4 that is lower than the third temperature T3. When the high-side FET reduction coefficient Ka has the minimum value Kmin and the high-side FET temperature Tea becomes lower than the fourth temperature T4, the high-side FET reduction coefficient setting unit 63a increases the high-side FET reduction coefficient Ka from the minimum value Kmin to the maximum value Kmax until the high-side FET temperature Tea reaches the first temperature T1.

[0076] The margin width ΔT3, which is the difference between the rated temperature Tn of the high-side FET Q1 as an electronic component and the third temperature T3, the reduction width ΔT4, which is the difference between the first temperature T1 and the fourth temperature T4, the reduction width ΔT2, which is the difference between the second temperature T2 and the third temperature T3, and the hysteresis width ΔT1, which is the difference between the first temperature T1 and the second temperature T2, may be set in advance as appropriate through simulation or the like. The rated temperature Tn may be set as appropriate depending on the high-side FET Q1 to be used. Note that the reduction width ΔT2 and the reduction width ΔT4 may be set to the same value, or the reduction width ΔT2 and the reduction width ΔT4 may be set to different values. For example, the hysteresis width on the high-temperature side may be made larger by setting the reduction width ΔT4 smaller than the reduction width ΔT2.

[0077] See Figure 6. The low-side FET reduction coefficient setting unit 63b sets a low-side FET reduction coefficient Kb for limiting the current that drives the first system coil based on the low-side FET temperature Teb. The shunt resistance reduction coefficient setting unit 63c sets a shunt reduction coefficient Kc for limiting the current that drives the first system coil based on the shunt resistance temperature Tec. The phase shutoff FET reduction coefficient setting unit 63d sets a phase shutoff FET reduction coefficient Kd for limiting the current that drives the first system coil based on the phase shutoff FET temperature Ted.

[0078] The power-off FET reduction coefficient setting unit 63e sets a power-off FET reduction coefficient Ke for limiting the current that drives the first-system coil based on the power-off FET temperature Tee. The capacitor reduction coefficient setting unit 63f sets a capacitor reduction coefficient Kf for limiting the current that drives the first-system coil based on the capacitor temperature Tef. The coil reduction coefficient setting unit 63g sets a coil reduction coefficient Kg for limiting the current that drives the first-system coil based on the coil temperature Teg.

[0079] The low-side FET reduction coefficient setting unit 63b, the shunt resistance reduction coefficient setting unit 63c, the phase shutoff FET reduction coefficient setting unit 63d, the power supply shutoff FET reduction coefficient setting unit 63e, the capacitor reduction coefficient setting unit 63f, and the coil reduction coefficient setting unit 63g may set a low-side FET reduction coefficient Kb, a shunt reduction coefficient Kc, a phase shutoff FET reduction coefficient Kd, a power supply shutoff FET reduction coefficient Ke, a capacitor reduction coefficient Kf, and a coil reduction coefficient Kg having characteristics similar to those of the characteristic map shown in FIG. 8.

[0080] At least one of the rated temperature Tn, the hysteresis width ΔT1, the reduction widths ΔT2 and ΔT4, and the margin width ΔT3 in the characteristic map shown in Fig. 8 may be set to a different value among different types of electronic components. That is, at least one of the first temperature T1 to the fourth temperature T4 may be set to a different value among different types of electronic components. For example, at least one of the rated temperature Tn, hysteresis width ΔT1, reduction widths ΔT2 and ΔT4, and margin width ΔT3 may be set to different values ​​among the FETs (high-side FETs Q1, Q3, and Q5, low-side FETs Q2, Q4, and Q6, phase-blocking FETs QA1 to QA3, and power-blocking FETs QC1 and QC2), resistors (shunt resistors), capacitors (electrolytic capacitors CA1 and CA2), and coils (choke coils Lp). The hysteresis width ΔT1, reduction widths ΔT2 and ΔT4, and margin width ΔT3 may be set appropriately in advance, for example, by simulation. The rated temperature Tn may be set appropriately depending on the electronic components used.

[0081] The selector 64 selects one of the high-side FET reduction coefficient Ka, the low-side FET reduction coefficient Kb, the shunt reduction coefficient Kc, the phase cutoff FET reduction coefficient Kd, the power cutoff FET reduction coefficient Ke, the capacitor reduction coefficient Kf, and the coil reduction coefficient Kg as the component reduction coefficient K1. For example, the selector 64 may select the smallest coefficient among the reduction coefficients Ka to Kg as the component reduction coefficient K1.

[0082] 9(a) to 9(c) are schematic diagrams illustrating an example of the operation for setting the component reduction coefficient K1. For simplicity of explanation, it is assumed that the low-side FET reduction coefficient Kb, the shunt reduction coefficient Kc, the phase cutoff FET reduction coefficient Kd, the power cutoff FET reduction coefficient Ke, and the capacitor reduction coefficient Kf are fixed to the maximum value Kmax. It is also assumed that the selector 64 selects the smallest coefficient among the reduction coefficients Ka to Kg as the component reduction coefficient K1.

[0083] As shown in FIG. 9(a), the high-side FET reduction factor Ka is set to a maximum value Kmax from time t0 to time t3, starts decreasing at time t3, and decreases to values ​​K11, K13, and K15 at times t4, t5, and t6, respectively. On the other hand, as shown in Figure 9(b), the coil reduction coefficient Kg is set to a maximum value Kmax from time t0 to time t1, begins to decrease at time t1, and decreases to a value K12 at time t2, which is earlier than time t3. The value K12 is smaller than the value K11 but larger than the value K13. Thereafter, the coil reduction coefficient Kg is set to the value K12 from time t2 to time t4, and then decreases to K13 and K14 at times t5 and t6, respectively. The value K14 is smaller than the value K13 but larger than the value K15.

[0084] When the selector 64 selects the smaller of the high-side FET reduction coefficient Ka and the coil reduction coefficient Kg as the component reduction coefficient K1, the selector 64 sets the component reduction coefficient K1 to the maximum value Kmax during the period from time t0 to time t1, selects the coil reduction coefficient Kg as the component reduction coefficient K1 during the period from time t1 to time t5, and selects the high-side FET reduction coefficient Ka as the component reduction coefficient K1 after time t5. As a result, the component reduction factor K1 is set to a maximum value Kmax from time t0 to time t1, starts decreasing at time t1, and decreases to a value K12 at time t2, is set to a value K12 from time t2 to time t4, and then decreases to K13 and K15 at times t5 and t6, respectively.

[0085] See Fig. 5. Second reduction coefficient setting unit 70 estimates the ECU temperature based on detection signal SdA output by temperature detection circuit 45A. Second reduction coefficient setting unit 70 also estimates the increase in temperature of motor 20 due to the motor current (for example, the temperature of the winding of the first system coil) based on detected values ​​I1ad, I1bd, and I1cd of A-phase current, B-phase current, and C-phase current, and estimates the sum of the ECU temperature and the increase as the motor temperature.

[0086] The second reduction coefficient setting unit 70 sets the ECU reduction coefficient K2 based on the ECU temperature. For example, the second reduction coefficient setting unit 70 may set the ECU reduction coefficient K2 having characteristics similar to those of the characteristics map shown in FIG. 8 with respect to changes in the ECU temperature. Furthermore, the second reduction coefficient setting unit 70 sets the motor reduction coefficient K3 based on the motor temperature. For example, the second reduction coefficient setting unit 70 may set the motor reduction coefficient K3 to have characteristics similar to those of the characteristics map shown in FIG. 8 in relation to changes in motor temperature.

[0087] The third reduction coefficient setting unit 71 sets the battery reduction coefficient K4 based on the battery voltage Vbat1, which is the voltage between the output terminals of the battery 13. Fig. 10 is a schematic diagram of an example of a characteristic map of the battery reduction coefficient K4 set by the third reduction coefficient setting unit 71. When the battery voltage Vbat1 is lower than the first voltage V1, the third reduction coefficient setting unit 71 sets the battery reduction coefficient K4 to a minimum value K4min. The minimum value K4min may be, for example, a value less than 100% and equal to or greater than 0%.

[0088] When the battery voltage Vbat1 is in the range from the first voltage V1 to the second voltage V2, the third reduction coefficient setting unit 71 sets a larger battery reduction coefficient K4 as the battery voltage Vbat1 increases, and when the battery voltage Vbat1 reaches the second voltage V2, the third reduction coefficient setting unit 71 sets the battery reduction coefficient K4 to a maximum value K4max, which may be, for example, greater than 0% and less than or equal to 100%. When the battery voltage Vbat1 is in the range from the second voltage V2 to the third voltage V3, the third reduction coefficient setting unit 71 sets the battery reduction coefficient K4 to the maximum value K4max.

[0089] When the battery voltage Vbat1 is in the range from the third voltage V3 to the fourth voltage V4, the third reduction coefficient setting unit 71 sets a smaller battery reduction coefficient K4 as the battery voltage Vbat1 is higher, and when the battery voltage Vbat1 reaches the fourth voltage V4, the third reduction coefficient setting unit 71 sets the battery reduction coefficient K4 to the minimum value K4min. The third reduction coefficient setting unit 71 sets the battery reduction coefficient K4 to the minimum value K4min when the battery voltage Vbat1 is higher than the fourth voltage V4.

[0090] 5, the current limiting unit 51 limits the q-axis current command value Iq0 and the d-axis current command value Id0 based on a component reduction coefficient K1, an ECU reduction coefficient K2, a motor reduction coefficient K3, and a battery reduction coefficient K4, and outputs the limited q-axis current command value Iq1 and the limited d-axis current command value Id1. For example, the current limiting unit 51 may select the smallest coefficient among a component reduction coefficient K1, an ECU reduction coefficient K2, a motor reduction coefficient K3, and a battery reduction coefficient K4 as the reduction coefficient K, and limit the q-axis current command value Iq0 and the d-axis current command value Id0 based on the reduction coefficient K. For example, the q-axis current command value Iq0 and the d-axis current command value Id0 may be limited such that the smaller the reduction coefficient K, the smaller the q-axis current command value Iq1 and the d-axis current command value Id1 after limitation become. For example, the products obtained by multiplying each of the q-axis current command value Iq0 and the d-axis current command value Id0 by the reduction coefficient K may be calculated as the limited q-axis current command value Iq1=K×Iq0 and the limited d-axis current command value Id1=K×Id0.

[0091] (operation) FIG. 11 is a flowchart of an example of processing in the control and arithmetic device 31a. In step S1, the first reduction coefficient setting unit 60 and the second reduction coefficient setting unit 70 acquire the detection signal SdA of the temperature detection circuit 45A. In step S2, the current detection circuits 39A1, 39B1, and 39C1 detect the A-phase current I1ad, the B-phase current I1bd, and the C-phase current I1cd of the first system coil. In step S3, the voltage detection circuit 34A detects the power supply voltage VRA of the first power conversion circuit 42A.

[0092] In step S4, the control and arithmetic device 31a calculates the battery current Ibat1 flowing from the battery 13 to the first system coil based on the A-phase current I1ad, the B-phase current I1bd, and the C-phase current I1cd. The control and arithmetic device 31a also receives the battery current Ibat2 flowing from the battery 13 to the second system coil from the control and arithmetic device 31b. In step S5, the first reduction coefficient setting unit 60 estimates the power loss W in each of the multiple electronic components that make up the first current control circuit 40A based on the A-phase current I1ad, the B-phase current I1bd, the C-phase current I1cd, the battery currents Ibat1 and Ibat2, and the power supply voltage VRA.

[0093] In step S6, the first reduction coefficient setting unit 60 estimates the component temperature of each of the plurality of electronic components that make up the first current control circuit 40A based on the power loss W and the detection signal SdA. In step S7, the second reduction coefficient setting unit 70 estimates the ECU temperature based on the detection signal SdA, and also estimates the motor temperature based on the A-phase current I1ad, the B-phase current I1bd, the C-phase current I1cd, and the ECU temperature. In step S8, the first reduction coefficient setting unit 60 sets a component reduction coefficient K1 based on the estimated component temperatures for each of the plurality of electronic components.

[0094] In step S9, the second reduction coefficient setting unit 70 sets the ECU reduction coefficient K2 based on the estimated ECU temperature. In step S10, the second reduction coefficient setting unit 70 sets the motor reduction coefficient K3 based on the estimated motor temperature. In step S11, the third reduction coefficient setting unit 71 sets a battery reduction coefficient K4 based on the battery voltage Vbat1, which is the voltage between the output terminals of the battery 13.

[0095] In step S12, the current limiting unit 51 limits the drive current of the first system coil based on the component reduction coefficient K1, the ECU reduction coefficient K2, the motor reduction coefficient K3, and the battery reduction coefficient K4, and then the process ends. The configuration and processing of the control arithmetic device 31b are the same as those of the control arithmetic device 31a. In the above description, "temperature detection circuit 45A" should be read as "temperature detection circuit 45B", "detection signals SdA, SdA1, SdA2" should be read as "detection signals SdB, SdB1, SdB2", "first system coil" should be read as "second system coil", "A-phase current I1ad, B-phase current I1bd, C-phase current I1cd" should be read as "A-phase current I2ad, B-phase current I 2bd, and A-phase current I2cd," "control arithmetic device 31a" is read as "control arithmetic device 31b," "battery current Ibat1" is read as "battery current Ibat2," "control arithmetic device 31b" is read as "control arithmetic device 31a," "voltage detection circuit 34A" is read as "voltage detection circuit 34B," "first power conversion circuit 42A" is read as "second power conversion circuit 42B," and "power supply voltage VRA" is read as "power supply voltage VRB."

[0096] (Effects of the first embodiment) (1) A first embodiment of the current control device includes a current control circuit including a plurality of electronic components, a temperature detection circuit having a temperature detection element arranged near the current control circuit, a current detection unit that detects or estimates a current value flowing through each of the plurality of electronic components, a component temperature estimation unit that estimates a component temperature, which is the temperature of the electronic component, for each of the plurality of electronic components based on the current value detected or estimated by the current detection unit and the detected temperature detected by the temperature detection circuit, a reduction coefficient setting unit that sets a plurality of different reduction coefficients for a plurality of different component temperatures included in the component temperatures estimated for each of the plurality of electronic components, a selection unit that selects one of the plurality of reduction coefficients, and a current limiting unit that limits the output current output from the current control circuit to a load based on the selected reduction coefficient.

[0097] This makes it possible to prevent overheating of components that are prone to thermal damage among the multiple electronic components included in the current control circuit. For example, even if the components that generate a large amount of heat change due to a change in the current flow pattern in the current control circuit, the reduction coefficient can be set according to the components that are prone to thermal damage due to the increase in heat generation. Furthermore, the reduction coefficient can be set according to the characteristics (e.g., rated voltage) and component temperature of each component, depending on which components are prone to thermal damage. Furthermore, by setting the reduction coefficient according to the needs of each individual component, excessive restrictions on the drive current can be prevented.

[0098] (2) The plurality of electronic components may include electronic components with different heat generation modes, and the component temperature estimation unit may estimate the component temperature of each of the electronic components with different heat generation modes based on the resistance value of the electronic component, the current value and current flow time (e.g., current duty ratio) of the current flowing through the electronic component, and the detected temperature detected by the temperature detection circuit. This allows the component temperatures to be estimated individually according to the heat generation patterns of the individual electronic components.

[0099] (3) The plurality of electronic components may include a plurality of different types of electronic components, and the reduction coefficient setting unit may set one reduction coefficient for each type of electronic component. By collectively setting reduction coefficients for a plurality of electronic components of the same type, it is possible to reduce the calculation load required for the process of setting reduction coefficients when component temperatures are estimated for each of a plurality of electronic components.

[0100] (4) The at least one type of electronic component among the plurality of different types of electronic components may include a plurality of electronic components arranged at different locations in the current control circuit. The current control device may include a second selection unit that selects one of the component temperatures estimated for each of the plurality of electronic components arranged at different locations. The reduction coefficient setting unit may set a reduction coefficient for the at least one type of electronic component based on the component temperature selected by the second selection unit. In this way, by grouping electronic components based on the type and location of the components and setting a reduction coefficient for each group, the computational load required for setting the reduction coefficient when estimating the component temperature for each of multiple electronic components can be reduced.

[0101] (5) The component temperature estimator may estimate the power loss generated in each of the plurality of electronic components based on the sum of a value obtained by subjecting the product of the power loss and a predetermined gain to a first low-pass filter and a value obtained by subjecting the temperature detected by the temperature detection circuit to a second low-pass filter. By estimating the component temperature based on the value obtained by processing the power loss through a first low-pass filter, the component temperature can be estimated with high accuracy. In addition, by processing the temperature detected by the temperature detection circuit through a second low-pass filter, an estimated value of the ambient temperature near each electronic component can be obtained. If the electronic component is thermally connected to a heat sink, the heat sink temperature near the electronic component can be obtained. FIG. 12 is a schematic diagram illustrating the effect of the second low-pass filter. Reference numerals 100, 101, and 102 schematically denote electronic components mounted on the circuit board 36. The component temperature estimation unit estimates the individual temperatures of the electronic components 100-102 by adding the temperature change due to the power loss of each of the electronic components 100-102 to the ambient temperature. Therefore, if the detected value of the temperature detection circuit is used as the ambient temperature when estimating the component temperatures of the electronic components 100 and 101, the component temperatures around the electronic components 100 and 101 cannot be accurately estimated due to the influence of heat generated by other electronic components 102 located near the temperature sensors 45A1 and 45A2 of the temperature detection circuit. Therefore, by performing the second low-pass filter on the detected temperatures detected by the temperature detection circuit, the influence of heat generated by the electronic components 102 near the temperature sensors 45A1 and 45A2 can be suppressed, thereby enabling accurate estimation of the ambient temperatures around each electronic component.

[0102] (6) The plurality of electronic components may include electronic components arranged at different locations in the current control circuit, and at least one of the predetermined gain, the cutoff frequency of the first low-pass filter processing, and the cutoff frequency of the second low-pass filter processing may be set to different values ​​among the electronic components arranged at different locations. This makes it possible to estimate the component temperatures individually depending on the locations of the electronic components. For example, as shown in Fig. 12, the distances between temperature sensor 45A1 and temperature sensor 45A2 and each of electronic components 100 to 102 differ depending on the electronic components 100 to 102, so by setting the cutoff frequency of the second low-pass filter processing to a different value for each electronic component, the influence of the difference in distance between the temperature sensors and the electronic components can be suppressed.

[0103] (7) The current limiting unit may limit the output current so that the smaller the reduction coefficient, the smaller the output current output from the current control circuit to the load. The reduction coefficient setting unit may set the reduction coefficient to a maximum value when the component temperature is lower than a first temperature, reduce the reduction coefficient from the maximum value to a minimum value when the component temperature exceeds a second temperature higher than the first temperature while the reduction coefficient is at its maximum value until the component temperature reaches a third temperature higher than the second temperature, set the reduction coefficient to a minimum value when the component temperature is higher than the third temperature, and increase the reduction coefficient from the minimum value to a maximum value when the component temperature falls below a fourth temperature lower than the third temperature while the reduction coefficient is at its minimum value until the component temperature reaches the first temperature. The multiple electronic components may include electronic components with different heat generation modes, and at least one of the first temperature, the second temperature, the third temperature, and the fourth temperature may be set to a different value among the electronic components with different heat generation modes. This allows the reduction coefficient to be set individually depending on the heat generation mode of the electronic component.

[0104] (8) The current control device may include a heat sink for dissipating heat generated by the current control circuit. The temperature detection element may be thermally coupled to the heat sink. This makes it easier for the temperature detection element to detect the temperature of the entire electronic components of the current control circuit.

[0105] (Second embodiment) In the first embodiment, one of the component temperatures estimated for each of a plurality of electronic components of the same type arranged in different locations is selected, and the reduction coefficients for these electronic components are set based on the selected component temperature. For example, one of the component temperatures Tea1 to Tea3 of the high-side FETs Q1, Q3, and Q5 estimated by the high-side FET temperature estimators 61a1 to 61a3 is selected as the high-side FET temperature Tea, and the high-side FET reduction coefficient Ka is set based on the high-side FET temperature Tea.

[0106] In the second embodiment, multiple different reduction coefficients are set for multiple electronic components of the same type arranged in different locations. For example, multiple high-side FET reduction coefficients Ka1 to Ka3 may be set based on the component temperatures Tea1 to Tea3 of the high-side FETs Q1, Q3, and Q5, respectively. Similarly, multiple low-side FET reduction coefficients Kb1 to Kb3, shunt reduction coefficients Kc1 to Kc3, phase interruption FET reduction coefficients Kd1 to Kd3, power interruption FET reduction coefficients Ke1 and Ke2, and capacitor reduction coefficients Kf1 and Kf2 may be set for the low-side FETs Q2, Q4, and Q6, shunt resistors, phase interruption FETs QA1 to QA3, power interruption FETs QC1 and QC2, and electrolytic capacitors CA1 and CA2, respectively.

[0107] Then, any one of the high-side FET reduction coefficients Ka1 to Ka3, low-side FET reduction coefficients Kb1 to Kb3, shunt reduction coefficients Kc1 to Kc3, phase cutoff FET reduction coefficients Kd1 to Kd3, power cutoff FET reduction coefficients Ke1 and Ke2, capacitor reduction coefficients Kf1 and Kf2, and coil reduction coefficient Kg is selected as the component reduction coefficient K1. In this way, by selecting one of the reduction coefficients set for multiple electronic components of the same type that are placed in different locations as the component reduction coefficient K1, it becomes possible to limit the output current more precisely based on the electronic components.

[0108] 13 is a block diagram showing an example of the functional configuration of the first reduction coefficient setting unit 60 of the second embodiment. The first reduction coefficient setting unit 60 of the second embodiment has a configuration similar to that of the first reduction coefficient setting unit 60 of the first embodiment described with reference to FIG. 6. The same or similar components are denoted by the same reference numerals, and redundant description will be omitted. The first reduction coefficient setting unit 60 of the second embodiment includes high-side FET reduction coefficient setting units 63a1 to 63a3, low-side FET reduction coefficient setting units 63b1 to 63b3, shunt resistance reduction coefficient setting units 63c1 to 63c3, phase shutdown FET reduction coefficient setting units 63d1 to 63d3, power shutdown FET reduction coefficient setting units 63e1 and 63e2, capacitor reduction coefficient setting units 63f1 and 63f2, and a coil reduction coefficient setting unit 63g.

[0109] High-side FET reduction coefficient setting units 63a1-63a3 set multiple high-side FET reduction coefficients Ka1-Ka3 based on component temperatures Tea1-Tea3 of high-side FETs Q1, Q3, and Q5, respectively. Low-side FET reduction coefficient setting units 63b1-63b3 set multiple low-side FET reduction coefficients Kb1-Kb3 based on component temperatures Teb1-Teb3 of low-side FETs Q2, Q4, and Q6, respectively. Shunt resistor reduction coefficient setting units 63c1-63c3 set multiple shunt reduction coefficients Kc1-Kc3 based on component temperatures Tec1-Tec3 of shunt resistors in current detection circuits 39A1, 39B1, and 39C1, respectively. Phase shutoff FET reduction coefficient setting units 63d1-63d3 set multiple phase shutoff FET reduction coefficients Kd1-Kd3 based on component temperatures Ted1-Ted3 of phase shutoff FETs QA1, QA2, and QA3, respectively. The power-off FET reduction coefficient setting units 63e1 and 63e2 set a plurality of power-off FET reduction coefficients Ke1 and Ke2 based on the component temperatures Tee1 and Tee2 of the power-off FETs QC1 and QC2, respectively. The capacitor reduction coefficient setting units 63f1 and 63f2 set a plurality of capacitor reduction coefficients Kf1 and Kf2 based on the component temperatures Tef1 and Tef2 of the electrolytic capacitors CA1 and CA2 of the first power conversion circuit 42A, respectively. The coil reduction coefficient setting unit 63g sets a coil reduction coefficient Kg based on the coil temperature Teg.

[0110] High-side FET reduction coefficient setting units 63a1 to 63a3, low-side FET reduction coefficient setting units 63b1 to 63b3, shunt resistance reduction coefficient setting units 63c1 to 63c3, phase shutdown FET reduction coefficient setting units 63d1 to 63d3, power shutdown FET reduction coefficient setting units 63e1 and 63e2, capacitor reduction coefficient setting units 63f1 and 63f2, and coil reduction coefficient setting unit 63g may set high-side FET reduction coefficients Ka1 to Ka3, low-side FET reduction coefficients Kb1 to Kb3, shunt reduction coefficients Kc1 to Kc3, phase shutdown FET reduction coefficients Kd1 to Kd3, power shutdown FET reduction coefficients Ke1 and Ke2, capacitor reduction coefficients Kf1 and Kf2, and coil reduction coefficient Kg having characteristics similar to those of the characteristic map shown in FIG. 8.

[0111] At least one of the rated temperature Tn, the hysteresis width ΔT1, the reduction widths ΔT2 and ΔT4, and the margin width ΔT3 in the characteristic map shown in FIG. 8 may be set to different values ​​for different types of electronic components. In particular, at least one of the rated temperature Tn, the hysteresis width ΔT1, the reduction widths ΔT2 and ΔT4, and the margin width ΔT3 may be set to different values ​​among multiple electronic components of the same type arranged in different locations. For example, at least one of the rated temperature Tn, the hysteresis width ΔT1, the reduction widths ΔT2 and ΔT4, and the margin width ΔT3 may be set to different values ​​among multiple shunt reduction coefficients Kc1 to Kc3. The same applies to the low-side FET reduction coefficients Kb1 to Kb3, the shunt reduction coefficients Kc1 to Kc3, the phase interruption FET reduction coefficients Kd1 to Kd3, the power interruption FET reduction coefficients Ke1 and Ke2, and the capacitor reduction coefficients Kf1 and Kf2.

[0112] The selector 64 selects one of the high-side FET reduction coefficients Ka1 to Ka3, the low-side FET reduction coefficients Kb1 to Kb3, the shunt reduction coefficients Kc1 to Kc3, the phase cutoff FET reduction coefficients Kd1 to Kd3, the power cutoff FET reduction coefficients Ke1 and Ke2, the capacitor reduction coefficients Kf1 and Kf2, and the coil reduction coefficient Kg as the component reduction coefficient K1. For example, the selector 64 may select the smallest coefficient among the reduction coefficients Ka1 to Ka3, Kb1 to Kb3, Kc1 to Kc3, Kd1 to Kd3, Ke1 and Ke2, Kf1 and Kf2, and Kg as the component reduction coefficient K1.

[0113] (Effects of the second embodiment) A current control device according to a second embodiment includes a current control circuit including a plurality of electronic components, a temperature detection circuit having a temperature detection element disposed near the current control circuit, a current detection unit configured to detect or estimate a current value flowing through each of the plurality of electronic components, a component temperature estimation unit configured to estimate a component temperature for each of the plurality of electronic components based on the current value detected or estimated by the current detection unit and the detected temperature detected by the temperature detection circuit, a reduction coefficient setting unit configured to set a plurality of different reduction coefficients for each of the plurality of different component temperatures included in the component temperatures estimated for each of the plurality of electronic components, a selection unit configured to select one of the plurality of reduction coefficients, and a current limiting unit configured to limit an output current output from the current control circuit to a load based on the selected reduction coefficient. The plurality of electronic components include a plurality of different types of electronic components, and at least one type of electronic component among the plurality of different types of electronic components includes a plurality of electronic components disposed at different locations of the current control circuit. The reduction coefficient setting unit sets a plurality of different reduction coefficients for each of the plurality of electronic components disposed at different locations of the current control circuit, which are included in the at least one type of electronic component.

[0114] This makes it possible to prevent overheating of components that are prone to thermal damage among the multiple electronic components included in the current control circuit. For example, even if the components that generate a large amount of heat change due to a change in the current flow pattern in the current control circuit, the reduction coefficient can be set according to the components that are prone to thermal damage due to the increase in heat generation. Furthermore, the reduction coefficient can be set according to the characteristics (e.g., rated voltage) and component temperature of each component, depending on which components are prone to thermal damage. Furthermore, by setting the reduction coefficient according to the needs of each individual component, excessive restrictions on the drive current can be prevented.

[0115] (Third embodiment) Next, a third embodiment of the present invention will be described. The operating modes in which the current control device drives the electric motor include a dual-system drive mode in which both the first and second system coils are driven, and a single-system drive mode in which only one of the first and second system coils is driven. In the dual-system drive mode, drive current is output to the motor 20 from both the first current control circuit 40A and the second current control circuit 40B, while in the single-system drive mode, drive current is output to the motor 20 from only one of the first and second current control circuits. For example, the current control device operates in the dual-system drive mode under normal circumstances and in the single-system drive mode under abnormal circumstances.

[0116] In the dual-system drive mode, unlike the single-system drive mode, the component temperature of the electronic components of the first current control circuit 40A is affected by the heat generated by the electronic components of the second current control circuit 40B, and conversely, the component temperature of the electronic components of the second current control circuit 40B is affected by the heat generated by the electronic components of the first current control circuit 40A. For example, in the dual-system drive mode, the temperature of the heat dissipation member 37 is higher than in the single-system drive mode, and therefore the component temperatures and the temperature sensor temperature are higher.

[0117] 14 is a graph showing the component temperatures and the temperature sensor temperature trends when a specific current is applied in dual-system drive mode and single-system drive mode to examine these temperatures. The solid line shows the component temperature trend of the high-side FET in single-system drive mode, the dashed line shows the component temperature trend of the high-side FET in dual-system drive mode, the dashed line shows the temperature trend of the temperature sensor in single-system drive mode, and the dashed two-dot line shows the temperature trend of the temperature sensor in dual-system drive mode.

[0118] As shown in Figure 14, the temperature of energized components is higher in dual-system drive mode than in single-system drive mode. The temperature of the temperature sensor is also higher in dual-system drive mode than in single-system drive mode. Furthermore, the difference Δ1 in component temperature between the dual-system drive mode and the single-system drive mode is smaller than the difference Δ2 in temperature of the temperature sensor between the dual-system drive mode and the single-system drive mode. This is because the components that are energized generate heat themselves, and therefore the temperature rise due to the influence of high temperatures in the surrounding area (for example, high temperatures of the heat dissipation member 37) is small.

[0119] As a result, the difference obtained by subtracting the temperature of the temperature sensor from the temperature of the component is larger in the single-system drive mode than in the dual-system drive mode. FIG. 15 is a graph showing the difference between the temperature of the component and the temperature sensor (component temperature - temperature sensor temperature) when a current of a specific magnitude is applied to examine the trend of the difference between these temperatures in each of the dual-system drive mode and the single-system drive mode. The solid line shows the trend of the difference between the temperature of the component and the temperature sensor in the single-system drive mode, and the dashed line shows the trend of the difference between the temperature of the component and the temperature sensor in the dual-system drive mode. As shown in FIG. 15, the difference between the temperature of the component and the temperature sensor in the single-system drive mode (solid line) is larger than the difference in the dual-system drive mode (dashed line).

[0120] Here, reference will be made to the high-side FET temperature estimator 61a1 in Fig. 7. The gain multiplier 73 calculates the product (G1 x W) of the power loss W and a predetermined conversion gain G1, and outputs the product to the first low-pass filter 74. The first low-pass filter 74 outputs a signal obtained by performing low-pass filtering on the product (G1 x W). Hereinafter, the output of the first low-pass filter 74 may be referred to as LPF(G1 x W).

[0121] The second low-pass filter 75 performs low-pass filtering on the detection signal (i.e., the temperature of the temperature sensor) of the temperature detection circuit 45A, and outputs the resulting signal as base temperature Tth to the adder 76. Hereinafter, the output (base temperature Tth) of the second low-pass filter 75 may be referred to as LPF(SdA). The high-side FET temperature estimator 61a1 estimates the sum (LPF(G1×W)+LPF(SdA)) of the outputs of the first low-pass filter 74 and the second low-pass filter 75 as the component temperature of the high-side FET Q1.

[0122] 14 corresponds to the sum (LPF(G1×W)+LPF(SdA)) that is the estimation result of high-side FET temperature estimator 61a1, and the temperature of the temperature sensor in the graph of Fig. 14 corresponds to the output LPF(SdA) of second low-pass filter 75. For this reason, the difference between the component temperature and the temperature of the temperature sensor in the graph of Fig. 15 corresponds to LPF(G1×W), which is the difference obtained by subtracting LPF(SdA) from the sum (LPF(G1×W)+LPF(SdA)), i.e., the output of first low-pass filter 74.

[0123] Therefore, by adjusting the output LPF (G1×W) of the first low-pass filter 74 so that the value in the single-system drive mode is larger than the value in the dual-system drive mode as shown in Figure 15, it becomes possible to estimate the component temperature according to the difference in drive mode, and the component temperature can be estimated with higher accuracy.

[0124] In the dual-system drive mode, the magnitude of the current command value calculated by each of the current command value calculation units 50 of the control and calculation devices 31a and 31b can be made different, thereby making it possible to change the distribution ratio of the drive currents output from the first current control circuit 40A and the second current control circuit 40B to the motor 20. Even when the distribution ratio of these output currents is changed, the magnitude of the difference between the component temperature and the temperature of the temperature sensor changes for the same reason as when switching between the dual-system drive mode and the single-system drive mode described above.

[0125] Therefore, the high-side FET temperature estimator 61a1 of the third embodiment sets a conversion gain G1 according to the distribution ratio between the output current of the first current control circuit 40A and the output current of the second current control circuit 40B. The same applies to the high-side FET temperature estimators 61a2 and 61a3, the low-side FET temperature estimators 61b1 to 61b3, the shunt resistor temperature estimators 61c1 to 61c3, the phase interruption FET temperature estimators 61d1 to 61d3, the power interruption FET temperature estimators 61e1 and 61e2, the capacitor temperature estimators 61f1 and 61f2, and the coil temperature estimator 61g.

[0126] In the following description, the high-side FET temperature estimation units 61a1 to 61a3, the low-side FET temperature estimation units 61b1 to 61b3, the shunt resistor temperature estimation units 61c1 to 61c3, the phase cutoff FET temperature estimation units 61d1 to 61d3, the power cutoff FET temperature estimation units 61e1 and 61e2, the capacitor temperature estimation units 61f1 and 61f2, and the coil temperature estimation unit 61g may be collectively referred to as the "temperature estimation unit 61."

[0127] 16(a) is a diagram showing an example of setting the conversion gain G1. The component temperature estimator 61 of the control and arithmetic device 31a of the first current control circuit 40A may set a larger conversion gain G1 as the distribution ratio of the first current control circuit 40A increases. Similarly, the component temperature estimator 61 of the control and arithmetic device 31b of the second current control circuit 40B may set a larger conversion gain G1 as the distribution ratio of the second current control circuit 40B increases. For example, if the allocation ratio is 50%, the conversion gain G1 is set to the value "g0", if the allocation ratio is 100%, the conversion gain G1 is set to a value "g1" greater than the value "g0", and if the allocation ratio is 0%, the conversion gain G1 is set to a value "g2" less than the value "g0".

[0128] When the allocation ratio is in the range of 0% to 50%, the conversion gain G1 is increased from "g2" to "g0" as the allocation ratio increases, and when the allocation ratio is in the range of 50% to 100%, the conversion gain G1 is increased from "g0" to "g1" as the allocation ratio increases. For example, the value "g1" may be set to a value of about (1.1 x g0), and the value "g2" may be set to a value of about (0.9 x g0). As a result, a larger conversion gain G1 is set in the single-system drive mode than in the dual-system drive mode.

[0129] Referring to Fig. 15, when attention is paid to the waveform in the portion indicated by the arrow 77, the waveform of the difference between the component temperature and the temperature sensor temperature in the single-system drive mode has a slower response than the waveform of the difference in the dual-system drive mode. For this reason, the component temperature estimation unit 61 of the third embodiment sets the first cutoff frequency fc1 of the first low-pass filter 74 according to the distribution ratio between the output current of the first current control circuit 40A and the output current of the second current control circuit 40B.

[0130] 16(b) is a diagram showing an example of setting the first cutoff frequency fc1. The component temperature estimator 61 of the control and arithmetic device 31a of the first current control circuit 40A may set a lower first cutoff frequency fc1 as the allocation ratio of the first current control circuit 40A increases. Similarly, the component temperature estimator 61 of the control and arithmetic device 31b of the second current control circuit 40B may set a lower first cutoff frequency fc1 as the allocation ratio of the second current control circuit 40B increases. For example, if the allocation ratio is 50%, the first cutoff frequency fc1 is set to the value "f0", if the allocation ratio is 100%, the first cutoff frequency fc1 is set to the value "f1" which is lower than the value "f0", and if the allocation ratio is 0%, the first cutoff frequency fc1 is set to the value "f2" which is higher than the value "f0".

[0131] When the allocation ratio is in the range of 0% to 50%, the first cutoff frequency fc1 is decreased from "f2" to "f0" as the allocation ratio increases, and when the allocation ratio is in the range of 50% to 100%, the conversion gain G1 is decreased from "f0" to "f1" as the allocation ratio increases. As a result, a lower first cutoff frequency fc1 is set in the single-system drive mode compared to the dual-system drive mode.

[0132] 17(a) to 17(c) are schematic diagrams showing the relationship between the distribution ratio of the output current between the first current control circuit 40A and the second current control circuit 40B, the conversion gain G1, and the first cutoff frequency fc1. The solid line in FIG. 17(a) indicates the distribution ratio of the output current of the first current control circuit 40A, and the dashed dotted line indicates the distribution ratio of the output current of the second current control circuit 40B.

[0133] Figure 17(a) shows an example in which the first current control circuit 40A and the second current control circuit 40B operate in dual-system drive mode during the period before time t1, and the first current control circuit 40A and the second current control circuit 40B operate in single-system drive mode during the period after time t2. In the period before time t1, the distribution ratio of the output current of the first current control circuit 40A and the second current control circuit 40B is 50%, and between time t1 and time t2, the distribution ratio of the output current of the first current control circuit 40A increases to 100% while the distribution ratio of the output current of the second current control circuit 40B decreases to 0%, and in the period after time t2, the distribution ratios of the output current of the first current control circuit 40A and the second current control circuit 40B are 100% and 0%, respectively.

[0134] In this case, the value of the conversion gain G1 of the component temperature estimation unit 61 of the control calculation device 31a of the first current control circuit 40A, shown by the solid line in Figure 17(b), is set to the value "g0" in the period before time t1, increases to the value "g1" between time t1 and time t2, and is set to the value "g1" from time t2 onwards. The value of the conversion gain G1 of the component temperature estimation unit 61 of the control calculation device 31b of the second current control circuit 40B, shown by the dashed line in Figure 17(b), is set to the value "g0" in the period before time t1, decreases to the value "g2" between time t1 and time t2, and is set to the value "g2" from time t2 onwards.

[0135] The value of the first cutoff frequency fc1 of the component temperature estimation unit 61 of the control calculation device 31a of the first current control circuit 40A, shown by the solid line in Figure 17(c), is set to the value "f0" in the period before time t1, decreases to the value "f1" between time t1 and time t2, and is set to the value "f1" from time t2 onwards. The value of the first cutoff frequency fc1 of the component temperature estimation unit 61 of the control calculation device 31b of the second current control circuit 40B, shown by the dashed line in Figure 17(c), is set to the value "f0" in the period before time t1, increases to the value "f2" between time t1 and time t2, and is set to the value "f2" after time t2.

[0136] (Effects of the third embodiment) (1) The component temperature estimation unit may set a predetermined gain according to the distribution ratio between the output currents of a pair of current control circuits, estimate the power loss generated in each of the plurality of electronic components, and estimate the component temperature for each of the plurality of electronic components based on the sum of a value according to the product of the power loss and the predetermined gain and a value according to the detected temperature detected by the temperature detection circuit. For example, the component temperature estimating unit may estimate the component temperature of one of the pair of current control circuits based on a predetermined gain that increases as the distribution ratio of one of the pair of current control circuits increases. The difference between the detected temperature detected by the temperature detection circuit and the actual component temperature varies depending on the distribution ratio between the output currents of the pair of current control circuits. By estimating the component temperature based on a predetermined gain set according to the distribution ratio, it becomes possible to estimate the component temperature according to the distribution ratio, thereby enabling more accurate estimation of the component temperature.

[0137] (2) For example, the component temperature estimating unit may set a larger predetermined gain when driving only one of a pair of current control circuits than when driving both of the current control circuits. This makes it possible to estimate the component temperature according to the difference in the drive mode, and allows for more accurate estimation of the component temperature.

[0138] (3) The component temperature estimation unit may obtain a value corresponding to the product of the loss power and the predetermined gain by passing the product of the loss power and the predetermined gain through a first low-pass filter, and may set the cutoff frequency of the first low-pass filter according to the distribution ratio. For example, the component temperature estimation unit may estimate the component temperature of one of the pair of current control circuits using a first low-pass filter having a lower cutoff frequency as the distribution ratio of one of the pair of current control circuits becomes higher. The component temperature varies depending on the distribution ratio between the output currents of the pair of current control circuits. By estimating the component temperature based on a predetermined gain set according to the distribution ratio, it becomes possible to estimate the component temperature according to the distribution ratio, and more accurate component temperature estimation is possible. When the output current of the current control circuit changes, the heat generation amount of the electronic component changes, and accordingly, the component temperature and the temperature detected by the temperature detection circuit also change. The waveform of the difference between the detected temperature detected by the temperature detection circuit and the actual component temperature has different responsiveness depending on the allocation ratio. By estimating the component temperature using a first low-pass filter with a cutoff frequency set according to the allocation ratio, it becomes possible to estimate the component temperature according to the allocation ratio, and the component temperature can be estimated with higher accuracy.

[0139] (4) The component temperature estimating unit may set the cutoff frequency of the first low-pass filter lower when driving only one of the pair of current control circuits compared to when driving both of the pair of current control circuits. This makes it possible to estimate the component temperature according to the difference in the drive mode, and allows for more accurate estimation of the component temperature.

[0140] (Fourth embodiment) FIG. 18 is a block diagram of a first example of the functional configuration of the high-side FET temperature estimator 61a1 according to the fourth embodiment. In the first and second embodiments, the component temperature is estimated based on the sum of a first value obtained by filtering the power loss generated in the electronic component using a first low-pass filter 74, and a second value obtained by filtering the detected temperatures detected by the temperature detection circuit 45A and the temperature detection circuit 45B using a second low-pass filter 75.

[0141] In contrast to this, in the fourth embodiment, the component temperature is estimated for each of the plurality of electronic components based on the sum of a first value obtained by filtering the loss power using a plurality of first low-pass filters 74a and 74b connected in parallel, and a second value obtained by filtering the detected temperatures detected by the temperature detection circuit 45A and the temperature detection circuit 45B using a second low-pass filter 75.

[0142] The parallel-connected first low-pass filters 74a and 74b each perform low-pass filtering on the multiplication result (G1×W) of the power loss W in the high-side FET Q1 of the first power conversion circuit 42A by a predetermined gain G1, and input the resulting signal to an adder 76. The adder 76 calculates the sum of the output of the first low-pass filter 74a, the output of the first low-pass filter 74b, and the output of the second low-pass filter 75 as the component temperature Tea1 of the high-side FET Q1.

[0143] In this way, by calculating the power loss W in the high-side FET Q1 of the first power conversion circuit 42A as the component temperature Tea1 of the high-side FET Q1 based on the first value obtained by filtering using the multiple first low-pass filters 74a and 74b connected in parallel, it is possible to improve the estimation accuracy of the component temperature Tea1 of the high-side FET Q1.

[0144] 19(a) and 19(b) are schematic diagrams of the temperature estimation results in the first and fourth embodiments, respectively. The solid line indicates the estimated value of the actual component temperature of the high-side FET Q1, and the dashed line indicates the component temperature estimated by the high-side FET temperature estimator 61a1. FIGS. 19(c) and 19(d) are schematic diagrams of the estimation error between the estimated value (dashed line) and the assumed value (solid line) in FIGS. 19(a) and 19(b), respectively. Note that in this specification, the term "estimated value" of the component temperature is used to mean the value of the component temperature estimated based on past performance and empirical values. As can be seen from FIGS. 19(a) to 19(d), the accuracy of estimating the component temperature is improved by performing filtering using the plurality of first low-pass filters 74a and 74b connected in parallel.

[0145] 20(a) is a schematic diagram of an example of a heat dissipation path from an electronic component to a heat sink. As described above, the electronic components included in each of the first power conversion circuit 42A and the second power conversion circuit 42B and the temperature sensors 45A1 and 45A2 of the temperature detection circuit 45A are mounted on the same circuit board 36. The surfaces f1 of the electronic components mounted on the surface ff of the circuit board 36, which is opposite the circuit board 36, and the surfaces f2 of the temperature sensors 45A1 and 45A2 of the temperature detection circuit 45A, which is opposite the circuit board 36, are thermally connected to the same heat sink 37. For example, the surfaces f1 and f2 are in contact with the heat sink 37 via thermal interface materials 38a and 38b, respectively. The temperature sensor of the temperature detection circuit 45B is also thermally connected to the heat sink 37 in a configuration similar to that of the temperature sensors 45A1 and 45A2.

[0146] Therefore, heat generated in the electronic component is transferred in parallel via a first heat dissipation path Pth1, which transfers heat directly to the heat sink 37 via the thermal interface material 38a, and a second heat dissipation path Pth2, which transfers heat to the heat sink 37 via the circuit board 36. The second heat dissipation path Pth2 is a path that passes through the circuit board 36, and therefore has thermal properties (for example, thermal conductivity and heat capacity) that are different from those of the first heat dissipation path Pth1.

[0147] 20(b) is a schematic diagram of another example of a heat dissipation path from an electronic component to a heat sink. The first electronic component and the second electronic component included in each of the first power conversion circuit 42A and the second power conversion circuit 42B are mounted on the same circuit board 36. The surfaces f1a and f1b of these electronic components mounted on the surface ff of the circuit board 36, opposite the circuit board 36, are thermally connected to the same heat sink 37. Even in this structure, heat generated in the first electronic component is transferred in parallel via a first heat dissipation path Pth1, in which the heat is transferred directly to the heat sink 37 via a thermal interface material 38a, and a second heat dissipation path Pth2, in which the heat is transferred to the heat sink 37 via the circuit board 36, which has thermal properties different from those of the first heat dissipation path Pth1.

[0148] FIG. 20(c) is an equivalent circuit diagram that schematically shows the delayed response of the component temperature when there are a plurality of heat dissipation paths Pth1 and Pth2 that transfer heat generated in an electronic component in parallel. The first heat dissipation path Pth1 and the second heat dissipation path Pth2 have different heat transfer characteristics. For this reason, it is difficult to reproduce the delayed response of the temperature change of the electronic components that dissipate heat through these heat dissipation paths Pth1 and Pth2 using a single first low-pass filter 74.

[0149] Therefore, in the fourth embodiment, the delayed response of the temperature change of an electronic component caused by the heat generated in the electronic component being transmitted through multiple heat dissipation paths Pth1 and Pth2 is reproduced by multiple first low-pass filters 74a and 74b connected in parallel with each other. This makes it possible to accurately estimate the temperature of the electronic component by reproducing the delayed response of the temperature change of the electronic component when the heat generated by the electronic component is dissipated to the heat sink 37 through multiple heat dissipation paths Pth1 and Pth2 using multiple first low-pass filters 74a and 74b, respectively.

[0150] 21 is a block diagram of a second example of the functional configuration of the high-side FET temperature estimator 61a1 according to the fourth embodiment. In this example, the first value is calculated as a sum of values ​​obtained by multiplying the power loss W by a plurality of different predetermined gains and filtering the resulting multiplication results using a plurality of first low-pass filters. In the example of FIG. 21, the power loss W is multiplied by different predetermined gains G1a and G1b, respectively, to obtain a plurality of multiplication results G1a×W and G1b×W. The resulting values ​​are filtered using a plurality of first low-pass filters 74a and 74b. When these values ​​are expressed as LPF1a(G1a×W) and LPF1b(G1b×W), the sum of these values, LPF1a(G1a×W)+LPF1b(G1b×W), is calculated as a first value. In this way, by setting different gains G1a and G1b for the first low-pass filters 74a and 74b, respectively, the difference in thermal characteristics of the heat dissipation paths Pth1 and Pth2 can be reflected in the estimated value, thereby improving the accuracy of component temperature estimation.

[0151] 20(a) and 20(b), the second heat dissipation path Pth2 dissipates heat generated by the electronic component via multiple materials (the circuit board 36 and the heat sink 37) that are made of materials with significantly different thermal properties. Therefore, the delayed response of the temperature change of the electronic component when heat is dissipated through the second heat dissipation path Pth2 may be reproduced by a second- or higher-order low-pass filter that is equivalent to a series connection of multiple first-order low-pass filters. Therefore, any one of the plurality of first low-pass filters 74a and 74b connected in parallel may be a second-order or higher low-pass filter.

[0152] Other component temperature estimators, such as high-side FET temperature estimators 61a2 and 61a3, low-side FET temperature estimators 61b1 to 61b3, shunt resistor temperature estimators 61c1 to 61c3, phase cutoff FET temperature estimators 61d1 to 61d3, power cutoff FET temperature estimators 61e1 and 61e2, and coil temperature estimator 61g, may also have a configuration similar to that of high-side FET temperature estimator 61a1 shown in FIG. 18 or 21.

[0153] Furthermore, for electronic components mounted on the rear surface fr of the circuit board 36, there is no first heat dissipation path Pth1 through which heat generated in the electronic components is transferred directly to the heat sink 37 via a thermal interface material. Therefore, the temperature estimator that estimates the component temperatures of the electronic components mounted on the rear surface fr of the circuit board 36 does not need to adopt the configuration shown in Fig. 18 or 21. For example, when electrolytic capacitors CA1 and CA2 are mounted on the rear surface fr of the circuit board 36, the capacitor temperature estimators 61f1 and 61f2 do not need to adopt the configuration shown in Fig. 18 or 21.

[0154] (Effects of the fourth embodiment) (1) A fourth embodiment of the current control device includes a current control circuit including a plurality of electronic components, a temperature detection circuit having a temperature detection element arranged near the current control circuit, a current detection unit that detects or estimates a current value flowing through each of the plurality of electronic components, a component temperature estimation unit that estimates a component temperature, which is the temperature of the electronic component, for each of the plurality of electronic components based on the current value detected or estimated by the current detection unit and the detected temperature detected by the temperature detection circuit, a reduction coefficient setting unit that sets a plurality of different reduction coefficients for each of a plurality of different component temperatures included in the component temperatures estimated for each of the plurality of electronic components, a selection unit that selects one of the plurality of reduction coefficients, and a current limiting unit that limits the output current output from the current control circuit to a load based on the selected reduction coefficient.

[0155] The component temperature estimator estimates the power loss generated in each of the plurality of electronic components, and estimates the component temperature for each of the plurality of electronic components based on the sum of a first value obtained by filtering the power loss using a plurality of first low-pass filters connected in parallel with each other and a second value obtained by filtering the temperature detected by the temperature detection circuit using a second low-pass filter. For example, the first value may be obtained by filtering a result of multiplying the power loss by a predetermined gain using the plurality of first low-pass filters. This makes it possible to accurately estimate the temperature of an electronic component when heat generated in the component is dissipated through multiple heat dissipation paths that exist in parallel.

[0156] (2) A plurality of electronic components and a temperature detection element may be mounted on the same circuit board, and a surface of a first component, which is one of the plurality of electronic components, opposite the circuit board side may be thermally coupled to the same heat sink, and a surface of a second component, which is the temperature detection element or one of the plurality of electronic components other than the first component, opposite the circuit board side may be thermally coupled to the same heat sink. This allows the delayed response of the temperature change of an electronic component that dissipates heat via a heat sink without passing through a circuit board, and via a heat dissipation path that dissipates heat via a circuit board, to be reproduced by multiple first low-pass filters connected in parallel with each other.

[0157] (3) The component temperature estimation unit may multiply the loss power by a plurality of different predetermined gains, and then filter the resulting multiplication results using a plurality of first low-pass filters to obtain the sum of the values ​​obtained as the first value. In this way, by setting different predetermined gains for different first low-pass filters, differences in the thermal characteristics of the heat dissipation paths can be reflected in the estimated value, thereby improving the accuracy of component temperature estimation.

[0158] (4) At least one of the plurality of first low-pass filters may be a second-order or higher low-pass filter. This makes it possible to accurately estimate the delayed response of the temperature change of an electronic component that dissipates heat through multiple members made of materials with significantly different thermal properties.

[0159] (Fifth embodiment) 20(a) and 20(b), for example, the high-side FET temperature estimator 61a1 of the fourth embodiment estimates the component temperature of an electronic component mounted on the surface ff of the circuit board 36, among the electronic components included in the current control device. This electronic component is disposed between the circuit board 36 and the heat sink 37, with the surface f1 facing away from the circuit board 36 thermally connected to the heat sink 37, and heat generated by the electronic component is dissipated to the heat sink 37 directly or via the thermal interface material 38a.

[0160] On the other hand, the electronic components included in the current control device include electronic components mounted on the back surface fr of the circuit board 36, which is opposite the front surface ff facing the heat sink 37. In the following description, for example, electrolytic capacitors CA1 and CA2 that connect the positive and negative pole wires of the inverter are mounted on the back surface fr. However, the present invention does not intend to limit the electronic components mounted on the back surface fr of the circuit board 36 to the electrolytic capacitors CA1 and CA2. Which electronic components included in the current control device are mounted on the surface fr of the circuit board 36 facing away from the heat sink 37 varies depending on the individual product.

[0161] In the case of electronic components mounted on the back surface fr of the circuit board 36, the heat generated by the electronic components passes through the circuit board 36 and is then dissipated to the heat sink 37 via members (e.g., other electronic components or temperature sensors mounted on the front surface ff) or intervening objects (e.g., thermal interface material applied to the front surface ff) that are interposed between the circuit board 36 and the heat sink 37. This makes the heat transfer path complex, and it can be difficult to accurately estimate the amount of temperature rise of the electronic components from the power loss of the electronic components using only the first-order low-pass filter. Therefore, in the fifth embodiment, the amount of rise in component temperature due to heat generation from electronic components is estimated by filtering the power loss using a plurality of first low-pass filters connected in series.

[0162] 22 is a block diagram of a first example of the functional configuration of a capacitor temperature estimator 61f1 according to the fifth embodiment. The capacitor temperature estimator 61f1 estimates the component temperature of the electrolytic capacitor CA1 of the first power conversion circuit 42A mounted on the rear surface fr of the circuit board 36. The capacitor temperature estimator 61f2, which estimates the component temperature of the electrolytic capacitor CA2 mounted on the rear surface fr of the circuit board 36, may also have a functional configuration similar to that shown in FIG. The capacitor temperature estimation unit 61f1 of the fifth embodiment estimates the component temperatures for each of the plurality of electronic components based on the sum of a first value obtained by filtering the loss power W calculated by the loss power calculation unit 72 using a plurality of first low-pass filters 74a and 74c connected in series, and a second value obtained by filtering the detected temperatures detected by the temperature detection circuit 45A and the temperature detection circuit 45B using a second low-pass filter 75.

[0163] Furthermore, the power loss calculation unit 72 of the capacitor temperature estimation unit 61f1 of the fifth embodiment calculates the power loss W of the electrolytic capacitor CA1 based on the A-phase current I1ad, the B-phase current I1bd, and the C-phase current I1cd according to the following equation. W=Ga×I1ad 2 +Gb×I1bd 2 +Gc×I1cd 2 That is, the capacitor temperature estimator 61f1 of the fifth embodiment calculates the power loss W based on the weighted sum of the squared values ​​of the A-phase current I1ad, the B-phase current I1bd, and the C-phase current I1cd. In the capacitor temperature estimator 61f1 of the fifth embodiment, the power loss W of the electrolytic capacitor CA1 may be calculated based on the following equation, similarly to the capacitor temperature estimator 61f1 of the first to fourth embodiments. W=Rf×(Id 2 +Iq 2 )

[0164] Of the multiple first low-pass filters 74a and 74c connected in series, the first low-pass filter 74a in the first stage performs low-pass filtering on the multiplication result (G1×W) of the power loss W in electrolytic capacitor CA and a predetermined gain G1. The first low-pass filter 74c in the second stage inputs a signal obtained by performing low-pass filtering on the output of the first low-pass filter 74a in the first stage to an adder 76. The adder 76 calculates the sum of the output of first low-pass filter 74c and the output of second low-pass filter 75 as the component temperature Tef1 of electrolytic capacitor CA.

[0165] In this way, by calculating the power loss W of electrolytic capacitor CA1 based on the A-phase current I1ad, the B-phase current I1bd, and the C-phase current I1cd, and then calculating the component temperature Tef1 of electrolytic capacitor CA based on a first value obtained by filtering the calculated power loss W using multiple first low-pass filters 74a and 74c connected in series, the estimation accuracy of the component temperature Tef1 of electrolytic capacitor CA mounted on the back surface fr of circuit board 36 can be improved.

[0166] Figures 23(a) and 23(b) are schematic diagrams of the temperature estimation results in the first and fifth embodiments, respectively, where the solid line indicates the estimated value of the actual component temperature of electrolytic capacitor CA and the dashed line indicates the estimated value of the component temperature by capacitor temperature estimator 61f1. Figures 23(c) and 23(d) are schematic diagrams of the estimation error between the estimated value (dashed line) and the estimated value (solid line) in Figures 23(a) and 23(b), respectively. As can be seen from Figures 23(a) to 23(d), the accuracy of estimating the component temperature is improved by calculating the power loss W of electrolytic capacitor CA1 based on the A-phase current I1ad, the B-phase current I1bd, and the C-phase current I1cd, and filtering the power loss W using multiple first low-pass filters 74a and 74c connected in series.

[0167] Next, with reference to Figures 24(a) to 24(f), we will explain why the accuracy of estimating the component temperature is improved by calculating the power loss W of electrolytic capacitor CA1 based on the A-phase current I1ad, B-phase current I1bd, and C-phase current I1cd. Figures 24(a) to 24(c) are image diagrams showing the waveform (dashed line) of the estimated value of the component temperature of the capacitor temperature estimation unit 61f1 when the loss power W of the electrolytic capacitor CA1 is calculated based on the d-axis current id and the q-axis current iq, and the waveform (solid line) of the expected value of the actual component temperature of the electrolytic capacitor CA.

[0168] In addition, Figures 24(d) to 24(f) are image diagrams showing the waveforms (dashed lines) of the estimated values ​​of the component temperatures of the capacitor temperature estimation unit 61f1 when the loss power W of the electrolytic capacitor CA1 is calculated based on the A-phase current I1ad, the B-phase current I1bd, and the C-phase current I1cd, and the waveforms (solid lines) of the expected values ​​of the actual component temperatures of the electrolytic capacitor CA. The waveforms in Figures 24(a) and 24(d) are waveforms obtained when the duty ratio Da of phase A is set to the maximum among the duty ratios Da to Dc of phases A to C. The same is true for the waveform in Figure 24(g) described below. The periods when the component temperature is rising and falling represent periods when current is flowing and periods when current is not flowing, respectively. Such waveforms can be reproduced, for example, by controlling the rotation angle of the rotating shaft of motor 20 to be fixed at a specific angle. Furthermore, the waveforms in Figures 24(b), 24(e) and 24(h) are waveforms obtained when the duty ratio Db of phase B is set to the maximum, and the waveforms in Figures 24(c), 24(f) and 24(i) are waveforms obtained when the duty ratio Dc of phase C is set to the maximum.

[0169] Referring to Figures 24(a) to 24(c), the estimated component temperature values ​​(solid lines) of the actual electrolytic capacitor CA are lower when the B-phase duty ratio Db is at its maximum (Figure 24(b)) than when the A-phase duty ratio Da is at its maximum (Figure 24(a)), and are higher when the C-phase duty ratio Dc is at its maximum (Figure 24(c)) than when the A-phase duty ratio Da is at its maximum (Figure 24(a)). This is thought to be because the distances between the components (electronic components and power line wiring) that generate heat when the A-phase current I1ad, B-phase current I1bd, and C-phase current I1cd flow and the electrolytic capacitor CA are different, and the heat generated by these components has different effects on the electrolytic capacitor CA.

[0170] Therefore, when calculating the power loss W of electrolytic capacitor CA1, the power loss W is calculated based on the A-phase current I1ad, the B-phase current I1bd, and the C-phase current I1cd, and the weighting factors Ga, Gb, and Gc are adjusted to compensate for the differences in the distances from each of the high-side FETs Q1, Q3, and Q5 to electrolytic capacitor CA. As shown by the dashed lines in Figures 24(d) to 24(f), the magnitude of the waveform (dashed line) of the estimated value of the component temperature of capacitor temperature estimator 61f1 can be made closer to the magnitude of the waveform (solid line) of the expected value of the actual component temperature of electrolytic capacitor CA. However, simply adjusting the weighting coefficients Ga, Gb, and Gc may make it possible to align the maximum value of the waveform of the estimated value (dashed line) with the maximum value of the waveform of the assumed value (solid line) of the actual component temperature of the electrolytic capacitor CA, but it is not possible to adjust the shape difference between the waveform shape of the estimated value (dashed line) and the waveform shape of the assumed value (solid line).

[0171] Therefore, by filtering the power loss W using a plurality of first low-pass filters 74a and 74c connected in series, the reproducibility of the waveform of the value estimated by the capacitor temperature estimator 61f1 can be improved. Here, for example, the characteristics of the first low-pass filters 74a and 74c are adjusted so that the estimation error between the waveform of the estimated value (dashed line) and the waveform of the expected value (solid line) is minimized. 24(g) to 24(i) are conceptual diagrams showing the waveforms (dashed lines) of the component temperatures estimated by the capacitor temperature estimator 61f1 when the power loss W is filtered using a plurality of first low-pass filters 74a and 74c connected in series, and the waveforms (solid lines) of the actual estimated values ​​of the component temperatures of the electrolytic capacitor CA. As shown in Fig. 24(g) to 24(i), the waveforms (dashed lines) of the component temperatures estimated by the capacitor temperature estimator 61f1 are closer to the waveforms (solid lines) of the estimated values, improving reproducibility.

[0172] Next, we will consider why the use of multiple first low-pass filters 74a and 74c connected in series improves the reproducibility of the waveform of the estimated value by the capacitor temperature estimator 61f1. Figure 25(a) is a schematic diagram of an example of a heat dissipation path from an electronic component ECR mounted on the back surface FR of the circuit board 36 to a heat sink. The electronic component ECR is mounted on the back surface fr of the circuit board 36, and the electronic component ECF and temperature sensors 45A1 and 45A2 mounted on the front surface ff of the circuit board 36 opposite the back surface fr are mounted, and are thermally coupled to the heat sink 37 via thermal interface materials 38a and 38b.

[0173] For example, a surface f1 of the electronic component ecf opposite the circuit board 36 side is thermally coupled to the heat sink 37 via the thermal interface material 38a, and thus the surface ff of the circuit board 36 is thermally coupled to the heat sink 37 via the electronic component ecf. Also, a surface f2 of the temperature sensors 45A1 and 45A2 opposite the circuit board 36 side is thermally coupled to the heat sink 37 via the thermal interface material 38b, and thus the surface ff of the circuit board 36 is thermally coupled to the heat sink 37 via the temperature sensors 45A1 and 45A2. Also, the surface ff of the circuit board 36 is thermally coupled to the heat sink 37 via the thermal interface material 38a interposed between the circuit board 36 and the heat sink 37.

[0174] Therefore, heat generated by the electronic component ECR mounted on the rear surface fr of the circuit board 36 is dissipated from the electronic component ECR to the circuit board 36 via the heat dissipation path Pth3, and then from the circuit board 36 to the heat sink 37 via the heat dissipation path Pth1 that passes through the electronic component ECF and the thermal interface material 38a interposed between them, and is then dissipated to the heat sink 37. These heat dissipation paths Pth3 and Pth1 have different thermal properties (for example, thermal conductivity and heat capacity), which makes the heat transfer path from the electronic component ECR to the heat sink 37 complicated.

[0175] FIG. 25(b) is an equivalent circuit diagram that schematically shows the delayed response of the component temperature when heat generated in the electronic component ecr is transferred in series through the heat dissipation paths Pth3 and Pth1. The heat dissipation path Pth3 and the heat dissipation path Pth1 have different heat transfer characteristics. For this reason, it is difficult to reproduce the delayed response of the temperature change of the electronic components whose heat is dissipated through these heat dissipation paths Pth3 and Pth1 using a single first low-pass filter 74.

[0176] Therefore, in the fifth embodiment, the delayed response of the temperature change of the electronic component caused by the heat generated in the electronic component ecr being transmitted through the heat dissipation paths Pth3 and Pth1 is reproduced by a plurality of first low-pass filters 74a and 74c connected in series with each other. This makes it possible to accurately estimate the temperature of the electronic component ECR mounted on the back surface fr of the circuit board 36 by reproducing the delayed response of the temperature change of the electronic component ECR when the heat generated in the electronic component ECR is transmitted in series through the heat dissipation paths Pth3 and Pth1 and dissipated to the heat sink 37 using the multiple first low-pass filters 74a and 74c, respectively.

[0177] In addition, as a heat dissipation path for transmitting the heat generated in the electronic component ecr from the circuit board 36 to the heat sink 37, there is also a heat dissipation path Pth4 through which heat is transmitted in parallel to the heat dissipation path Pth1, passing through other electronic components mounted on the surface ff of the circuit board 36, temperature sensors 45A1 and 45A2, and thermal interface materials 38a and 38b in addition to the electronic component ecf. For this reason, as shown in FIG. 25(c), a first low-pass filter 74d for reproducing the delayed response of the temperature change of the electronic component ecr due to heat dissipation via the heat dissipation path Pth4 may be connected in parallel to the first low-pass filter 74c. 25(a), however, when viewed from the electronic component ecf, heat dissipation paths Pth1 and Pth4 both dissipate heat via circuit board 36. For this reason, it is considered that the characteristics of first low-pass filters 74c and 74d will be similar, and first low-pass filters 74c and 74d may be realized by a single first low-pass filter 74c. Furthermore, if the effect of first low-pass filter 74c is dominant, the effect of connecting first low-pass filter 74d in parallel to first low-pass filter 74c is reduced, and therefore first low-pass filter 74d may be omitted.

[0178] Furthermore, various configurations are possible for the layout of electronic components included in the current control device depending on the actual product, and various configurations are also possible for the dissipation paths of heat generated by these electronic components. For this reason, as first low-pass filter 74 that filters power loss W calculated by power loss calculation unit 72, multiple first low-pass filters 74 connected in various configurations may be used depending on the layout of the electronic components. Here, for ease of explanation, the high-side FET temperature estimation units 61a1 to 61a3, the low-side FET temperature estimation units 61b1 to 61b3, the shunt resistor temperature estimation units 61c1 to 61c3, the phase cutoff FET temperature estimation units 61d1 to 61d3, the power cutoff FET temperature estimation units 61e1, 61e2, the capacitor temperature estimation units 61f1, 61f2, and the coil temperature estimation unit 61g will be collectively referred to as the "component temperature estimation unit 61."

[0179] For example, the first reduction coefficient setting unit 60 of the fifth embodiment may include both a component temperature estimator 61 configured similarly to the high-side FET temperature estimator 61a1 shown in FIG. 18 or FIG. 21, and a component temperature estimator 61 configured similarly to the capacitor temperature estimator 61f1 shown in FIG. 22 or FIG. 25(c). For example, a component temperature estimation unit 61 configured similarly to the high-side FET temperature estimation unit 61a1 shown in FIG. 18 or FIG. 21 may estimate the temperature of an electronic component mounted on the front surface ff of the circuit board 36, and a component temperature estimation unit 61 configured similarly to the capacitor temperature estimation unit 61f1 shown in FIG. 22 or FIG. 25(c) may estimate the temperature of an electronic component mounted on the back surface fr of the circuit board 36.

[0180] 26(a) and 26(b) are block diagrams of a first modified example and a second modified example of the component temperature estimation unit 61. FIG. 26(a) and 26(b) do not illustrate the input signals to the power loss calculation unit 72. This is because the calculation formula for the power loss W in the power loss calculation unit 72 differs between the high-side FET temperature estimators 61a1-61a3, the low-side FET temperature estimators 61b1-61b3, the shunt resistor temperature estimators 61c1-61c3, the phase interruption FET temperature estimators 61d1-61d3, the power interruption FET temperature estimators 61e1 and 61e2, the capacitor temperature estimators 61f1 and 61f2, and the coil temperature estimator 61g.

[0181] For example, the component temperature estimator 61 may include a parallel-series connection of first low-pass filters 74, where one first low-pass filter 74 is connected in series to a plurality of first low-pass filters 74 connected in parallel. For example, the component temperature estimator 61 shown in Fig. 26(a) may filter the power loss W calculated by the power loss calculator 72 using a parallel-series connection of first low-pass filters 74a to 74d, where the parallel-series connection is formed by connecting first low-pass filters 74a and 74b connected in parallel with first low-pass filters 74c and 74d connected in parallel in series.

[0182] Furthermore, for example, the component temperature estimator 61 may include a series-parallel connection of first low-pass filters 74, configured by connecting another first low-pass filter 74 in parallel to a plurality of series-connected first low-pass filters 74. For example, the component temperature estimator 61 shown in Fig. 26(b) may filter the power loss W calculated by the power loss calculator 72 using a series-parallel connection of first low-pass filters 74a to 74d formed by connecting first low-pass filters 74a and 74c connected in series in parallel with first low-pass filters 74b and 74d connected in series.

[0183] (Effects of the fifth embodiment) (1) An embodiment of a current control device includes a current control circuit including a plurality of electronic components, a temperature detection circuit having a temperature detection element arranged near the current control circuit, a current detection unit that detects or estimates a current value flowing through each of the plurality of electronic components, a component temperature estimation unit that estimates a component temperature, which is the temperature of the electronic component, for each of the plurality of electronic components based on the current value detected or estimated by the current detection unit and the detected temperature detected by the temperature detection circuit, a reduction coefficient setting unit that sets a plurality of different reduction coefficients for a plurality of different component temperatures included in the component temperatures estimated for each of the plurality of electronic components, a selection unit that selects one of the plurality of reduction coefficients, and a current limiting unit that limits the output current output from the current control circuit to a load based on the selected reduction coefficient.

[0184] The component temperature estimator estimates the power loss generated in each of the plurality of electronic components, and estimates the component temperature of one of the plurality of electronic components based on the sum of a first value obtained by filtering the power loss using a plurality of first low-pass filters connected in series with each other and a second value obtained by filtering the temperature detected by the temperature detection circuit using a second low-pass filter. For example, the first value may be obtained by filtering the result of multiplying the power loss by a predetermined gain using a plurality of first low-pass filters. This allows for accurate estimation of the component temperature when heat generated in the electronic component is dissipated via various members and inserts interposed between the electronic component and the heat dissipation member.

[0185] (2) Any of the electronic components may be mounted on a first surface of a circuit board, and a second surface of the circuit board opposite the first surface may be thermally coupled to a heat sink. This allows for accurate estimation of the component temperature of the electronic component mounted on the first surface of the circuit board facing away from the heat sink. (3) At least one of the plurality of first low-pass filters may be a second-order or higher low-pass filter, which allows for accurate estimation of the delayed response of the temperature change of an electronic component that dissipates heat through multiple members made of materials with significantly different thermal properties.

[0186] (4) The component temperature estimation unit may estimate the component temperature of another electronic component other than one of the electronic components based on the sum of a third value obtained by filtering the power loss using a plurality of second low-pass filters connected in parallel with each other and a second value obtained by filtering the detected temperature detected by the temperature detection circuit using the second low-pass filter. This allows for accurate estimation of the component temperature when heat generated in the other electronic component is dissipated by being transmitted through a plurality of heat dissipation paths existing in parallel.

[0187] (5) Any one of the electronic components may be mounted on a first surface of a circuit board, and the other electronic component may be mounted on a second surface of the circuit board opposite the first surface, with the surface of the other electronic component opposite the circuit board thermally coupled to a heat sink, and the second surface of the circuit board may be thermally coupled to the heat sink via the other electronic component, a temperature detection element mounted on the second surface, or a thermal interface material. This allows for accurate estimation of the component temperatures of the electronic components mounted on the first and second surfaces of the circuit board.

[0188] (6) The component temperature estimator may estimate the component temperature for each of the plurality of electronic components based on the sum of a first value obtained by filtering the power loss using a plurality of first low-pass filters connected in parallel-series or series-parallel to each other, and a second value obtained by filtering the temperature detected by the temperature detection circuit using a second low-pass filter. This allows selection of first low-pass filters 74 with various delay characteristics depending on the arrangement of the electronic components included in the current control device.

[0189] (7) The current control circuit may be an inverter circuit, and one of the electronic components may be a smoothing capacitor connecting the positive and negative poles of the inverter circuit. This allows for accurate estimation of the component temperature of the smoothing capacitor when heat generated by the smoothing capacitor is dissipated via various members and inserts interposed between the smoothing capacitor and the heat dissipation member.

[0190] (8) The current control circuit may be an inverter circuit, the plurality of electronic components may include a smoothing capacitor connecting a positive electrode line and a negative electrode line of the inverter circuit, and the component temperature estimator may estimate the power loss occurring in the smoothing capacitor based on the magnitude of the phase current of the inverter circuit. This reduces variations in the estimated component temperature that occur depending on differences in the distance between the switching of the inverter circuit and the smoothing capacitor.

[0191] (Sixth embodiment) 7 includes a first low-pass filter 74 for estimating the component temperature Tea1 of the high-side FET Q1. The first low-pass filter 74 is configured with an integrating circuit, and when the ECU 30 stops operating (i.e., when the first current control circuit 40A and the second current control circuit 40B stop), a delay element of the integrating circuit is reset. In the following description, the first current control circuit 40A and the second current control circuit 40B may be collectively referred to as the current control circuit 40. Such a reset of the delay element of the integrator circuit occurs when the first reduction coefficient setting unit 60 stops functioning and temperature estimation of the component temperature Tea1 of the high-side FET Q1 cannot be continued due to, for example, an instantaneous fluctuation in the battery voltage of the battery 13, a faulty connector of the battery 13, a forced reset of the control arithmetic devices 31a and 31b by the system check function of the ECU 30, or turning off the ignition switch 11.

[0192] When the delay element of the integrator circuit is reset, the high-side FET temperature estimator 61a1 cannot estimate the correct component temperature Tea unless it operates the integrator circuit after setting an appropriate initial value for the delay element of the first low-pass filter 74. Therefore, the high-side FET temperature estimator 61a1 of the sixth embodiment sets an initial value of the component temperature to be estimated by the high-side FET temperature estimator 61a1 based on the first detected temperature Td1 and the second detected temperature Td2 detected at two locations near the current control circuit 40 when the ECU 30 resumes operation after being stopped.

[0193] In the following explanation, high-side FET temperature estimator 61a1 will be illustrated as an example, but high-side FET temperature estimators 61a2 and 61a3, low-side FET temperature estimators 61b1 to 61b3, shunt resistor temperature estimators 61c1 to 61c3, phase cutoff FET temperature estimators 61d1 to 61d3, power cutoff FET temperature estimators 61e1 and 61e2, capacitor temperature estimators 61f1 and 61f2, and coil temperature estimator 61g may also have a configuration similar to that of high-side FET temperature estimator 61a1.

[0194] The temperature detection elements for detecting the first detection temperature Td1 and the second detection temperature Td2 need only be installed at positions far enough apart from each other so that a temperature difference occurs between the first detection temperature Td1 and the second detection temperature Td2, and there are no particular restrictions on their installation positions. See Fig. 27. For example, temperature detectors 46A and 46B provided in the IC packages of control arithmetic devices 31a and 31b may be used as temperature detection elements for detecting either the first detection temperature Td1 or the second detection temperature Td2.

[0195] The temperature detection circuit 45A or 45B may be used as the temperature detection element for detecting the other of the first detection temperature Td1 and the second detection temperature Td2. In this way, the temperature detection element for detecting the first detection temperature Td1 and the second detection temperature Td2 may be provided within the IC package of any of the ICs that make up the ECU 30, or may be provided near the current control circuit 40 separately from the IC package.

[0196] 28 is a block diagram showing an example of the functional configuration of a high-side FET temperature estimator 61a1 according to the sixth embodiment. The high-side FET temperature estimator 61a1 according to the sixth embodiment includes an initial value setting unit 78 and a subtractor 79. The initial value setting unit 78 calculates an initial value Tini of the estimated value of the component temperature Tea1 at the time when the ECU 30 resumes operation based on the first detected temperature Td1 and the second detected temperature Td2 at the time when the ECU 30 stopped operating, the estimated value of the component temperature Tea1 output by the high-side FET temperature estimator 61a1 at the time when the ECU 30 stopped operating, and the first detected temperature Td1 and the second detected temperature Td2 at the time when the ECU 30 resumes operation.

[0197] Hereinafter, the first detected temperature Td1 and the second detected temperature Td2 at the time when the ECU 30 stopped operating may be referred to as the "first detected temperature Td1e and the second detected temperature Td2e at the time of stopping," the estimated value of the component temperature Tea1 output by the high-side FET temperature estimator 61a1 at the time when the ECU 30 stopped operating may be referred to as the "estimated value Tea1e of the component temperature Tea1 at the time of stopping," and the first detected temperature Td1 and the second detected temperature Td2 at the time when the ECU 30 resumed operating may be referred to as the "first detected temperature Td1r and the second detected temperature Td2r at the time of resumption."

[0198] In the following explanation, an example is given in which the detection signal SdA of the temperature of ECU 30 output by the temperature detection circuit 45A is used as the first detection temperature Td1, but the detection signal SdA of the temperature of ECU 30 output by the temperature detection circuit 45A may also be used as the second detection temperature Td2. When the ECU 30 stops operating, the initial value setting unit 78 stores the first detected temperature Td1 and the second detected temperature Td2 last input when the ECU 30 stopped operating as the first detected temperature Td1e and the second detected temperature Td2e at the time of stopping. Also, the initial value setting unit 78 stores the estimated value of the component temperature Tea1 last output by the high-side FET temperature estimator 61a1 when the ECU 30 stopped operating as the estimated value Tea1e of the component temperature Tea1 at the time of stopping.

[0199] When the ECU 30 resumes operation, the initial value setting unit 78 acquires the first detected temperature Td1r and the second detected temperature Td2r at the time of the restart. The initial value setting unit 78 calculates the first estimated gain Ge1=(Td2r-Td1r) / (Td2e-Td1e), which is the ratio of the temperature difference (Td2e-Td1e) between the first detected temperature Td1e and the second detected temperature Td2e at the time of stopping to the temperature difference (Td2r-Td1r) between the first detected temperature Td1r and the second detected temperature Td2r at the time of restarting.

[0200] Fig. 29(a) is a schematic diagram of the first detected temperature Td1 (solid line) and the second detected temperature Td2 (dashed line) after the ECU 30 stops operating at time t = 0, and the estimated value (dashed-dotted line) of the component temperature Tea1 of the high-side FET Q1 that is the estimation target. Fig. 29(b) is a schematic diagram of the first estimated gain Ge1 calculated based on the first detected temperature Td1 and the second detected temperature Td2 in Fig. 29(a). FIG. 29(a) shows an example in which the delay response of the temperature decrease of the part temperature Tea1 to be estimated after the ECU 30 stops operating is slower than the delay response of the temperature decrease of the second detected temperature Td2.

[0201] For example, Japanese Patent No. 6569447 describes a temperature estimation method in which the temperature difference (Tea1e-Td1e) between the first detected temperature Td1e at the time of shutdown, which is easily affected by the first component temperature of the first electronic component, and the estimated value Tea1e of the component temperature Tea1 at the time of shutdown is multiplied by a first estimation gain Ge1 to calculate the estimated value (Ge1×(Tea1e-Td1e)) of the component temperature Tea1 at the time of restart. However, if the delay response of the temperature decrease of the component temperature Tea1 to be estimated differs from the delay response of the temperature decrease of the second detected temperature Td2, estimating the component temperature Tea1 using the first estimation gain Ge1 as is will result in an error in the estimated value of the component temperature Tea1.

[0202] The dashed line in Fig. 29(c) indicates the estimated value of the component temperature Tea1 (Ge1 × (Tea1e - Td1e)) based on the first estimated gain Ge1, and the dashed-dotted line in Fig. 29(c) indicates the assumed value of the component temperature Tea1. Fig. 29(d) is a schematic diagram showing the error between the estimated value and the assumed value. When the delay response of the temperature decrease of the component temperature Tea1 is slower than the delay response of the temperature decrease of the second detected temperature Td2, the estimated value (dashed line) based on the first estimation gain Ge1 is estimated to be lower than the expected value (chain line), and the error is largest at time t10, as shown in Figures 29(c) and 29(d). If the component temperature Tea1 is underestimated, the current command value will not be limited sufficiently, and the estimation errors in Figures 29(c) and 29(d) will be errors that occur on the dangerous side. Similarly, when the delay response of the temperature decrease of the component temperature Tea1 to be estimated differs from the delay response of the temperature decrease of the first detected temperature Td1, an error occurs in the estimated value if the component temperature Tea1 is estimated using the first estimation gain Ge1 as is.

[0203] Therefore, in the sixth embodiment, the time change of the component temperature Tea1 that occurs when the ECU 30 stops operating (i.e., when the current control circuit 40 stops) is actually measured in advance. Then, the initial value setting unit 78 sets the second estimated gain Ge2 by calibrating the first estimated gain Ge1 based on the temperature data of the time change of the component temperature Tea1 obtained from the measurement results. Hereinafter, the temperature data of the time change of the component temperature Tea1 obtained by actually measuring the time change of the component temperature Tea1 when the ECU 30 stops operating may be referred to as "actually measured temperature data." For example, a function for converting the first estimated gain Ge1 to the second estimated gain Ge2 may be set in advance based on the actually measured temperature data. The initial value setting unit 78 may set the second estimated gain Ge2 by substituting the first estimated gain Ge1 into the set function.

[0204] For example, the initial value setting unit 78 sets the second estimated gain Ge2=Ge1 using a power function with a constant x set based on the actually measured temperature data as the exponent and the first estimated gain Ge1 as the base. x This is because the error in the estimated value based on the first estimated gain Ge1 described above is thought to be caused by the difference in the time constant between the delay response of the temperature decrease in the component temperature Tea1 and the delay response of the temperature decrease in the second detected temperature Td2. 30(a) is a schematic diagram of an example of the second estimated gain Ge. For example, if the delay response of the temperature decrease of the component temperature Tea1 to be estimated is slower than the delay response of the temperature decrease of the second detected temperature Td2, the exponent x may be set to a value smaller than 1.

[0205] The initial value setting unit 78 multiplies the temperature difference (Tea1e-Td1e) between the first detected temperature Td1e at the time of shutdown and the estimated value Tea1e of the component temperature Tea1 at the time of shutdown by the second estimation gain Ge2 to calculate the initial value Tini=(Ge2×(Tea1e-Td1e)) of the estimated value of the component temperature Tea1 at the time of restart. 30(b) is a schematic diagram of the estimated value of the component temperature based on the second estimation gain Ge2. By estimating the component temperature Tea1 using the second estimation gain Ge2, the estimated value can be made closer to the expected value. This makes it possible to avoid insufficient limitation of the current command value caused by an underestimation of the component temperature Tea1. The initial value setting unit 78 may convert the first estimated gain Ge1 into the second estimated gain Ge2 based on a look-up table that is set in advance based on temperature data that has actually been measured.

[0206] 28, subtractor 79 sets the difference (Tini-Tth) obtained by subtracting base temperature Tth from initial value Tini in first low-pass filter 74 as the initial value of the output of first low-pass filter 74 at the time when ECU 30 resumes operation. For example, subtractor 79 may assign the difference (Tini-Tth) to the delay element of first low-pass filter 74. As a result, when ECU 30 resumes operation, first low-pass filter 74 outputs the difference (Tini-Tth). Adder 76 adds base temperature Tth to the difference (Tini-Tth). As a result, high-side FET temperature estimator 61a1 outputs initial value Tini.

[0207] Figure 31(a) is a schematic diagram of the first detected temperature Td1 (solid line) and the second detected temperature Td2 (dashed line) when the delay response of the temperature drop in the component temperature Tea1 of the estimation target after the ECU 30 stops operating is faster than the delay response of the temperature drop in the second detected temperature Td2, and the estimated value (dotted line) of the component temperature Tea1 of the high-side FET Q1 of the estimation target. The dashed line in Fig. 31(b) indicates the estimated value of the component temperature Tea1 calculated based on the first estimation gain Ge1 obtained from the first detected temperature Td1 and the second detected temperature Td2 in Fig. 31(a), and the dashed-dotted line in Fig. 31(b) indicates the assumed value of the component temperature Tea1. Fig. 31(c) is a schematic diagram showing the error between the estimated value and the assumed value.

[0208] When the delayed response of the component temperature Tea1 is faster than the delayed response of the second detected temperature Td2, the estimated value (dashed line) based on the first estimated gain Ge1 is estimated to be higher than the assumed value (chain line), as shown in Figures 31(b) and 31(c), which may result in the current command value being unnecessarily limited.

[0209] Therefore, if the delayed response of the component temperature Tea1 is faster than the delayed response of the second detected temperature Td2, the exponent x of the power function that converts the first estimated gain Ge1 to the second estimated gain Ge2 may be set to a value greater than one. FIG. 31(d) is a schematic diagram of an example of the first estimated gain Ge1 and the second estimated gain Ge, and FIG. 31(e) is a schematic diagram of an estimated value of the component temperature based on the second estimated gain Ge2. By estimating the component temperature Tea1 using the second estimated gain Ge2, the estimated value can be made closer to the expected value. This makes it possible to avoid unnecessary limitations on the current command value that would occur if the component temperature Tea1 were overestimated.

[0210] (Effects of the sixth embodiment) (1) A current control device includes a current control circuit including an electronic component, a temperature detection circuit having a temperature detection element arranged near the current control circuit, a current detection unit that detects or estimates the value of a current flowing through the electronic component, a component temperature estimation unit that estimates the component temperature, which is the temperature of the electronic component, based on the current value detected or estimated by the current detection unit and the detected temperature detected by the temperature detection circuit, and a current limiting unit that limits the output current output from the current control circuit to a load based on the component temperature.

[0211] The component temperature estimation unit includes an initial value setting unit that sets an initial value for the estimated component temperature when the current control circuit restarts operation after being stopped. The initial value setting unit acquires a first detected temperature and a second detected temperature detected at two mutually distant locations near the current control circuit, stores the estimated temperature of the component temperature, the first detected temperature, and the second detected temperature when the current control circuit is stopped, calculates a first estimated gain as the ratio between the temperature difference between the first detected temperature and the second detected temperature when the current control circuit is stopped and the temperature difference between the first detected temperature and the second detected temperature when the current control circuit is stopped and the temperature difference between the first detected temperature and the second detected temperature when the current control circuit is stopped, sets a second estimated gain by calibrating the first estimated gain based on temperature data obtained by actually measuring in advance the change over time in the component temperature when the current control circuit is stopped, and sets an initial value based on the temperature difference obtained by multiplying the temperature difference between the first detected temperature when the current control circuit is stopped and the estimated component temperature by the second estimated gain.

[0212] This improves the accuracy of estimating the temperature of the electronic component when the current control circuit resumes operation, even if the time constant of the delay response of the decrease in the second detected temperature after the current control circuit has stopped is different from the time constant of the delay response of the decrease in the temperature of the electronic component being estimated.As a result, when the current control circuit resumes operation after having stopped, the accuracy of estimating the temperature of the electronic component when it resumes operation can be improved.

[0213] (2) The initial value setting unit may convert the first estimated gain into the second estimated gain using a function of the first estimated gain set based on temperature data. The function may be a power function with a constant set based on the temperature data as an exponent and the first estimated gain as a base, or may be a lookup table set based on the temperature data. This allows the second estimated gain to be appropriately set based on the first estimated gain and temperature data obtained by actually measuring the change in component temperature over time in advance.

[0214] (3) If the delay response of the component temperature determined based on the temperature data is slower than the delay response of the second detected temperature when the current control circuit is stopped, a power exponent smaller than 1 may be set, and if it is faster, a power exponent larger than 1 may be set. This makes it possible to appropriately set the power function that converts the first estimated gain to the second estimated gain according to the delay response characteristics of the temperature drop of the component temperature when the current control circuit is stopped.

[0215] (4) The component temperature estimation unit may obtain a value corresponding to the detected temperature by the temperature detection circuit by passing the detected temperature by the temperature detection circuit through a second low-pass filter 75. By performing low-pass filtering on the detected temperature by the temperature detection circuit in this manner, an estimated value of the ambient temperature near each electronic component can be obtained. For example, by suppressing the influence of heat generated by electronic components near the temperature detection circuit, the ambient temperature near other electronic components can be accurately estimated. If an electronic component is thermally connected to a heat sink, the heat sink temperature near the electronic component can be obtained.

[0216] Seventh embodiment Figures 32(a) to 32(e) are figures showing an example of changes in the estimated component temperatures of the choke coil La, and the power cutoff FETs QC2, QD2, QC1 and QD1 when the ECU 30 operates in a dual system drive mode that drives both the first system coil and the second system coil of the motor 20, and the distribution ratio of the drive currents output from the first current control circuit 40A and the second current control circuit 40B to the motor 20 is approximately equal.

[0217] In the dual-system drive mode, both battery currents Ibat1 and Ibat2 flowing from the battery 13 to the first and second system coils, respectively, flow through the choke coil La. This makes the choke coil La prone to high temperatures, and as shown in Figure 32(a), the component temperature of the choke coil La is high at time t1.

[0218] In contrast, the component temperatures of the power-off FETs QC1 and QC2 through which only the battery current Ibat1 flows (FIGS. 32(d) and 32(b)), and the heat generation amount of the power-off FETs QD1 and QD2 through which only the battery current Ibat2 flows (FIGS. 32(e) and 32(c)) are smaller than the heat generation amount of the choke coil La. Furthermore, when the distribution ratio of the drive currents output from the first current control circuit 40A and the second current control circuit 40B to the motor 20 is approximately equal, the magnitudes of the battery currents Ibat1 and Ibat2 are approximately equal. Therefore, the difference in component temperature around time t1 between the power-off FET QC1 (FIG. 32(d)) through which the battery current Ibat1 flows and the power-off FET QD1 (FIG. 32(e)) through which the battery current Ibat2 flows is small.

[0219] On the other hand, it is expected that the difference in component temperatures between the power-off FET QC2 (FIG. 32(b)) through which the battery current Ibat1 flows and the power-off FET QD2 (FIG. 32(c)) through which the battery current Ibat2 flows will also become smaller. Comparing FIG. 32(b) and FIG. 32(c), the component temperatures of the power-off FET QD2 are significantly higher than the component temperatures of the power-off FET QC2 around time t1. This is thought to be because the power-off FET QD2 is placed closer to the choke coil La than the power-off FETs QC1, QC2, and QD1, and the amount of heat propagating from the high-temperature choke coil La affects the component temperature of the power-off FET QD2.

[0220] Fig. 33(a) is a schematic diagram of a first example of a heat dissipation path from the choke coil La. In the example of Fig. 33(a), the power cutoff FET QD2, temperature sensors 45B1 and 45B2, and choke coil La are mounted on the front surface ff of the circuit board 36, and are in contact with the heat sink 37 via the thermal interface materials 38a to 38c, respectively. In this case, there are assumed to be two heat dissipation paths: a heat dissipation path Pth5 in which the heat from the choke coil La is dissipated to the heat sink 37 through the thermal interface material 38c, and a heat dissipation path Pth6 in which the heat from the choke coil La is dissipated to the heat sink 37 through the circuit board 36, the power cut-off FET QD2, and the thermal interface material 38a. Therefore, it is thought that the heat propagating from the choke coil La through the heat dissipation path Pth6 will cause the component temperature of the power cut-off FET QD2 to rise.

[0221] Fig. 33(b) is a schematic diagram of a second example of a heat dissipation path from choke coil La. In the example of Fig. 33(b), power cutoff FET QD2 and temperature sensors 45B1 and 45B2 are mounted on the front surface ff of circuit board 36 and are in contact with heat sink 37 via thermal interface materials 38a and 38b, respectively. On the other hand, choke coil La is electrically connected to circuit board 36 by connecting wiring W and is in contact with heat sink 37 via thermal interface material 38c. In this case, there are assumed to be two heat dissipation paths: a heat dissipation path Pth5 in which the heat from the choke coil La is dissipated to the heat sink 37 through the thermal interface material 38c, and a heat dissipation path Pth7 in which the heat from the choke coil La is dissipated to the heat sink 37 through the connecting wiring W, the circuit board 36, the power cut-off FET QD2, and the thermal interface material 38a. For this reason, it is thought that the heat propagating from the choke coil La through the heat dissipation path Pth7 will cause the component temperature of the power cut-off FET QD2 to rise.

[0222] Fig. 33(c) is a schematic diagram of a third example of a heat dissipation path from choke coil La. In the example of Fig. 33(c), power cutoff FET QD2 and temperature sensors 45B1 and 45B2 are mounted on the front surface ff of circuit board 36 and are in contact with heat sink 37 via thermal interface materials 38a and 38b, respectively. On the other hand, choke coil La is mounted on the back surface fr of circuit board 36 and is thermally connected to heat sink 37 via a via that penetrates circuit board 36 and thermal interface material 38c. In this case, there are assumed to be two heat dissipation paths: a heat dissipation path Pth8 in which the heat from the choke coil La is dissipated to the heat sink 37 through the vias and the thermal interface material 38c, and a heat dissipation path Pth9 in which the heat from the choke coil La is dissipated to the heat sink 37 through the circuit board 36, the power cut-off FET QD2, and the thermal interface material 38a. For this reason, it is thought that the heat propagating from the choke coil La through the heat dissipation path Pth9 will cause the component temperature of the power cut-off FET QD2 to rise.

[0223] In this way, when the power-off FET QD2 is arranged close to the choke coil La, which is prone to high temperatures, the power-off FET QD2 may be affected by the high temperature of the choke coil La. As a result, the actual component temperature of the power-off FET QD2 may be higher than the value estimated by the power-off FET temperature estimator 61e2, which may reduce the accuracy of the component temperature estimation. In the following description, an electronic component that is prone to high temperatures may be referred to as a "first electronic component," and an electronic component that is prone to be affected by the component temperature of the first electronic component may be referred to as a "second electronic component." The choke coil La is an example of a "first electronic component," and the power-off FET QD2 is an example of a "second electronic component." For ease of explanation, in the following description, the component temperatures of the high-side FETs Q1, Q3, and Q5, low-side FETs Q2, Q4, and Q6 of the second power conversion circuit 42B, the shunt resistors of the current detection circuits 39A2, 39B2, and 39C2, the phase cutoff FETs QB1, QB2, and QB3, the power cutoff FETs QD1, QD2, and the electrolytic capacitors CB1 and CB2, which constitute the current control circuit that controls the current that drives the second system coil, will also be designated by the same symbols as those used for the component temperatures of the electronic components that constitute the current control circuit that controls the current that drives the first system coil (i.e., Tea1 to Tea3, Teb1 to Teb3, Tec1 to Tec3, Ted1 to Ted3, Tee1 and Tee2, and Tef1 and Tef2, respectively).

[0224] In the seventh embodiment, the second component temperature of the second electronic component is estimated based on the first component temperature of the first electronic component in addition to the power loss W of the second electronic component and the detection signal SdB of the temperature of the ECU 30 output by the temperature detection circuit 45B. For example, the component temperature Tee2 of the power cutoff FET QD2 is estimated based on the power loss W of the power cutoff FET QD2, the detection signal SdB, and the component temperature Teg of the choke coil La. This makes it possible to correct the estimated value of the second component temperature based on the estimated value of the first component temperature in a configuration in which the second component temperature of the second electronic component is easily affected by the first component temperature of the first electronic component, thereby improving the accuracy of estimating the second component temperature.

[0225] 34(a) is a block diagram of a first example of the functional configuration of a power-off FET temperature estimator 61e2 provided in the first reduction coefficient setting unit 60 of the control arithmetic device 31b according to the seventh embodiment. The power-off FET temperature estimator 61e2 receives the detected values ​​I2ad, I2bd, and I2cd of the A-phase current, B-phase current, and C-phase current detected by the current detection circuits 39A2, 39B2, and 39C2, respectively, the detection signal SdB of the temperature of the ECU 30 detected by the temperature detection circuit 45B, and the estimated value of the component temperature Teg of the choke coil La estimated by the coil temperature estimator 61g.

[0226] The power loss calculation unit 72 estimates the on-resistance Rf of the power cutoff FET QD2 based on the previous value of the component temperature Tee2 of the power cutoff FET QD2 calculated in the previous control cycle. Then, it calculates the battery current Ibat2 flowing from the battery 13 to the second system coil based on the on-resistance Rf and the detected values ​​I2ad, I2bd, and I2cd of the A-phase current, B-phase current, and C-phase current. Then, it calculates the power loss W of the power cutoff FET QD2 based on the following equation. W=Rf×Ibat2 2 The gain multiplication unit 73 calculates the product (G1×W) of the power loss W and a predetermined gain G1, and outputs the product to the first low-pass filter 74.

[0227] The first low-pass filter 74 outputs a signal obtained by performing low-pass filtering on the product (G1×W) to the adder 76. The second low-pass filter 75 outputs a signal obtained by performing low-pass filtering on the detection signal SdB of the temperature of the ECU 30 output by the temperature detection circuit 45B to the adder 76. The gain multiplication unit 81 calculates the product (G2×Teg) of a predetermined gain G2 different from the above-mentioned gain G1 and the component temperature Teg of the choke coil La, and outputs the product to the third low-pass filter 82. The third low-pass filter 82 outputs a signal obtained by performing low-pass filtering on the product (G2×Teg) to the adder 76.

[0228] An adder 76 calculates the sum of the output of the first low-pass filter 74, the output of the second low-pass filter 75, and the output of the third low-pass filter 82 as the component temperature Tee2 of the power cut-off FET QD2. In this specification, the choke coil La is exemplified as the "first electronic component" and the power cutoff FET QD2 is exemplified as the "second electronic component," but this embodiment is not limited to these specific examples. This embodiment can be widely applied to combinations of electronic components that tend to generate heat among multiple electronic components included in a current control circuit and other components arranged in the vicinity of these electronic components.

[0229] FIG. 34(b) is a block diagram of a second example of the functional configuration of the power cut-off FET temperature estimator 61e2 provided in the first reduction coefficient setting unit 60 of the control arithmetic device 31b according to the seventh embodiment. The operating states (operating modes) of the current control circuit include an operating state in which the electronic components included in the current control circuit tend to generate heat (i.e., tend to become hot), and an operating state in which heat generation is gentle. In the following description, the operating state in which the electronic components tend to generate heat relatively easily (i.e., tend to become hot) will be referred to as the "first state," and the operating state in which heat generation is relatively gentle will be referred to as the "second state."

[0230] For example, the first state may be a state in which the time average of the heat generation amount of the electronic component or the time average of the current flowing through the electronic component is equal to or greater than a threshold, and the second state may be a state in which the time average of the heat generation amount of the electronic component or the time average of the current flowing through the electronic component is less than a threshold. For example, the first state may be a state in which the battery current Ibat=(Ibat1+Ibat2) flowing from the battery 13 or its time average is equal to or greater than a threshold, and the second state may be a state in which the battery current Ibat or its time average is less than a threshold. The switch 83 determines whether the operating state of the current control circuit is in the first state or the second state.

[0231] For example, the switch 83 may determine that the operating state of the current control circuit is in the first state when the battery current Ibat or its time average is greater than or equal to a threshold value, and may determine that the operating state of the current control circuit is in the second state when the battery current Ibat or its time average is less than the threshold value. For example, when the present invention is applied to a current control device that supplies a drive current to the motor 20, the first state may be determined when the rotation speed of the motor shaft of the motor 20 is equal to or greater than a threshold, and the second state may be determined when the rotation speed is less than the threshold. Alternatively, the second state may be determined when the current of one specific phase of the multi-phase motor continues to be higher than the currents of the other phases, causing the motor shaft to stop rotating, and the first state may be determined when the motor shaft is rotating.

[0232] When the operating state of the current control circuit is the first state, the switch 83 outputs the output of the third low-pass filter 82 to the adder 76. The adder 76 calculates the sum of the output of the first low-pass filter 74, the output of the second low-pass filter 75, and the output of the third low-pass filter 82 as the component temperature Tee2 of the power cut-off FET QD2. On the other hand, when the operating state of the current control circuit is the second state, the switch 83 outputs the value "0" to the adder 76. The adder 76 calculates the sum of the output of the first low-pass filter 74 and the output of the second low-pass filter 75 as the component temperature Tee2 of the power-off FET QD2. In other words, the component temperature Tee2 of the power-off FET QD2 is estimated without being based on the component temperature Teg of the choke coil La.

[0233] (Effects of the Seventh Embodiment) (1) A current control device includes a current control circuit including a plurality of electronic components, a temperature detection circuit having a temperature detection element arranged near the current control circuit, a current detection unit that detects or estimates a current value flowing through each of the plurality of electronic components, a component temperature estimation unit that estimates a component temperature, which is the temperature of the electronic component, for each of the plurality of electronic components based on the current value detected or estimated by the current detection unit and the detected temperature detected by the temperature detection circuit, a reduction coefficient setting unit that sets a plurality of different reduction coefficients for each of a plurality of different component temperatures included in the component temperatures estimated for each of the plurality of electronic components, a selection unit that selects one of the plurality of reduction coefficients, and a current limiting unit that limits the output current output from the current control circuit to a load based on the selected reduction coefficient.

[0234] The plurality of electronic components include at least a first electronic component and a second electronic component, and the component temperature estimator estimates a first component temperature that is the component temperature of the first electronic component based on a current value detected or estimated by the current detector and a detected temperature detected by the temperature detector circuit, and estimates a second component temperature that is the component temperature of the second electronic component based on the current value detected or estimated by the current detector, the detected temperature detected by the temperature detector circuit, and the first component temperature. For example, the first electronic component and the second electronic component may be components arranged in close proximity to each other.

[0235] This makes it possible to correct the estimated value of the second component temperature based on the estimated value of the first component temperature in a configuration in which the second component temperature of the second electronic component is easily affected by the first component temperature of the first electronic component, thereby improving the accuracy of estimating the second component temperature.

[0236] (2) The component temperature estimation unit may estimate a first loss power, which is a power loss generated in a first electronic component, and a second loss power, which is a power loss generated in a second electronic component; estimate a first component temperature based on the sum of a value obtained by low-pass filtering the product of the first loss power and a predetermined gain and a value obtained by low-pass filtering the detected temperature detected by the temperature detection circuit; and estimate a second component temperature based on the sum of a value obtained by low-pass filtering the product of the second loss power and the predetermined gain, a value obtained by low-pass filtering the detected temperature detected by the temperature detection circuit, and a value obtained by low-pass filtering the product of the first component temperature and the predetermined gain.

[0237] By estimating the component temperature based on the value obtained by low-pass filtering the power loss, the component temperature can be estimated with high accuracy. In addition, by applying low-pass filtering to the temperature detected by the temperature detection circuit, an estimated value of the ambient temperature near each electronic component can be obtained. If the electronic component is thermally connected to a heat sink, the heat sink temperature near the electronic component can be obtained. In addition, by estimating the component temperature based on the value obtained by low-pass filtering the first component temperature, the effect of heat propagation from the first electronic component on the second component temperature can be estimated with high accuracy.

[0238] (3) The component temperature estimation unit may estimate the second component temperature based on the first component temperature when the current control device is in the first state, and may estimate the second component temperature without being based on the first component temperature when the current control device is in the second state. This makes it possible to switch whether or not the first component temperature is reflected in the estimation of the second component temperature depending on the operating state of the current control device.

[0239] (4) For example, the first state may be a state in which the heat generation amount of the first electronic component is equal to or greater than a threshold, and the second state may be a state in which the heat generation amount of the first electronic component is less than the threshold. For example, the first state may be a state in which a power supply current flowing from a DC power supply that supplies DC power to the current control circuit is equal to or greater than a threshold, and the second state may be a state in which the power supply current is less than the threshold. This makes it possible to switch whether or not to reflect the first component temperature in the estimation of the second component temperature depending on whether or not the first electronic component is in a state where it is likely to become hot.

[0240] (Variation) (1) Figure 35 is a configuration diagram showing an outline of a first modified example of the ECU 30. The electric power steering device may be provided with, as the battery 13, a first battery that supplies power to the first power conversion circuit 42A via the first power wiring PWa, and a second battery that supplies power to the second power conversion circuit 42B via the second power wiring PWb, separately. The positive side power supply line Lpa of the first power wiring PWa is connected to the control arithmetic device 31a via a noise filter circuit formed by a choke coil La and ceramic capacitors Ca1 and Ca2, and is also connected to the first power supply interruption circuit 44A. One end of the choke coil La is connected to the positive power supply line Lpa and one end of the ceramic capacitor Ca1, the other end of the choke coil La is connected to one end of the ceramic capacitor Ca2 and the control arithmetic device 31a, and the other ends of the ceramic capacitors Ca1 and Ca2 are grounded. On the other hand, the negative line of the first power wiring PWa is connected to the ground line of the ECU 30.

[0241] The positive side power supply line Lpb of the second power wiring PWb is connected to the control arithmetic device 31b via a noise filter circuit formed by a choke coil Lb and ceramic capacitors Cb1 and Cb2, and is also connected to the second power supply cutoff circuit 44B. One end of the choke coil Lb is connected to the positive power supply line Lpb and one end of the ceramic capacitor Cb1, the other end of the choke coil Lb is connected to one end of the ceramic capacitor Cb2 and the control arithmetic device 31b, and the other ends of the ceramic capacitors Cb1 and Cb2 are grounded. On the other hand, the negative line of the second power wiring PWb is connected to the ground line of the ECU 30.

[0242] In the control and calculation device 31b of the first modified example, the coil reduction coefficient Kg is set by estimating the coil temperature Teg of the choke coil Lb instead of the choke coil La. In addition, a battery reduction coefficient K4 is set based on a battery voltage Vbat2, which is the voltage between the output terminals of the second battery. When the initial value setting unit 78 is provided as in the sixth embodiment, the temperature detectors 46A and 46B may be provided in the control and arithmetic devices 31a and 31b. Alternatively, a temperature detector other than the temperature detection circuits 45A and 45B may be provided in another location in the ECU 30. The same applies to the second modified example of the ECU 30 in FIG.

[0243] (2) Figure 36 is a configuration diagram showing an overview of a second modified example of the ECU 30. The second modified example of the ECU 30 drives the motor 20 by a single inverter. Therefore, of the first motor current interruption circuit 33A and the second motor current interruption circuit 33B, the first gate drive circuit 41A and the second gate drive circuit 41B, the first power conversion circuit 42A and the second power conversion circuit 42B, the first power supply interruption circuit 44A and the second power supply interruption circuit 44B, and the temperature detection circuits 45A and 45B included in the configuration shown in Figure 2, the second modified example of the ECU 30 is provided with only the first motor current interruption circuit 33A, the first gate drive circuit 41A, the first power conversion circuit 42A, the first power supply interruption circuit 44A, and the temperature detection circuit 45A.

[0244] (3) In the above explanation, an example was described in which the current control device of the present invention is applied to a column assist type electric power steering device, which is a so-called upstream assist type, but the current control device of the present invention may also be applied to a so-called downstream assist type electric power steering device. Below, configuration examples in which the current control device of the present invention is applied to single pinion assist type, rack assist type, and dual pinion assist type electric power steering devices as examples of downstream assist type electric power steering devices will be explained. In the case of the downstream assist system, the motor 20, rotation angle sensor 23a, and ECU 30 may not be separate units for waterproofing purposes, but may be integrated into an MCU (Motor Control Unit) as shown by the dashed lines in FIGS.

[0245] 37 shows a configuration example in which the current control device of the present invention is applied to a single-pinion assist type electric power steering device. A steering wheel 1 is connected to one universal joint 4a of an intermediate shaft via a steering shaft 2. An input shaft 4c of a torsion bar (not shown) is connected to the other universal joint 4b. The pinion rack mechanism 5 includes a pinion gear (pinion) 5a, a rack bar (rack) 5b, and a pinion shaft 5c. The input side shaft 4c and the pinion rack mechanism 5 are connected by a torsion bar (not shown) that twists due to a difference in rotation angle between the input side shaft 4c and the pinion rack mechanism 5. The torque sensor 10 electromagnetically measures the torsion angle of the torsion bar as the steering torque Th of the steering wheel 1. A motor 20 that assists the steering force of the steering wheel 1 is connected to the pinion shaft 5c via a reduction gear 3, and a rotation angle sensor 23a calculates rotation angle information of the motor rotation shaft of the motor 20.

[0246] (4) Figure 38 shows an example of a configuration in which the current control device of the present invention is applied to a rack-assist type electric power steering device. A spiral groove (not shown) is formed on the outer peripheral surface of the rack bar 5b, and a similar lead spiral groove (not shown) is also formed on the inner peripheral surface of the nut 91. A ball screw is formed by arranging multiple rolling elements in the rolling path formed by these spiral grooves. A belt 94 is wound around a drive pulley 92 connected to a rotary shaft 20a of a motor 20 that assists the steering force of the steering wheel 1, and a driven pulley 93 connected to a nut 91, and the rotational motion of the rotary shaft 20a is converted into linear motion of the rack bar 5b. A rotation angle sensor 23a calculates rotation angle information of the motor rotary shaft of the motor 20.

[0247] (5) Figure 39 shows a configuration example in which the current control device of the present invention is applied to a dual pinion assist type electric power steering device. The dual pinion assist type electric power steering device has a second pinion shaft 95 and a second pinion gear 96 in addition to a pinion shaft 5c and a pinion gear 5a, and a rack bar 5b has first rack teeth (not shown) that mesh with the pinion gear 5a and second rack teeth (not shown) that mesh with the second pinion gear 96. A motor 20 that assists the steering force of the steering wheel 1 is connected to the second pinion shaft 95 via a reduction gear 3, and a rotation angle sensor 23a calculates rotation angle information of the motor rotation shaft of the motor 20.

[0248] (6) Each of the first low-pass filter 74 and the second low-pass filter 75 may be replaced with a second-order lag filter. [Explanation of symbols]

[0249] 1...steering wheel, 2...steering shaft, 3...reduction gear, 4a, 4b...universal joint, 4c...input side shaft, 5...pinion rack mechanism, 5a...pinion gear (pinion), 5b...rack bar (rack), 5c...pinion shaft, 6a, 6b...tie rod, 7a, 7b...hub unit, 8L, 8R...steered wheels, 10...torque sensor, 11...ignition switch, 12...vehicle speed sensor, 13...battery, 14...steering angle sensor, 20...motor, 20a...rotating shaft, 23...motor rotation angle detection circuit, 23a...rotation angle sensor, 30...electronic control unit (ECU) ), 31a, 31b...control arithmetic device, 33A...first motor current interruption circuit, 33B...second motor current interruption circuit, 34A, 34B...voltage detection circuit, 35...communication line, 36...circuit board, 37...heat dissipation member (heat sink), 38a to 38c...thermal interface material, 39A1, 39A2, 39B1, 39B2, 39C1, 39C2...current detection circuit, 41A...first gate drive circuit, 41B...second gate drive circuit, 42A...first power conversion circuit, 42B...second power conversion circuit, 44A...first power supply interruption circuit, 44B...second power supply interruption circuit, 45A, 45B...temperature detection circuit, 46 A, 46B...Temperature detector, 50...Current command value calculation unit, 51...Current limiting unit, 52, 53...Subtractor, 54...Proportional integral (PI) control unit, 55...2-phase / 3-phase conversion unit, 56...3-phase / 2-phase conversion unit, 57...Angular velocity conversion unit, 60...First reduction coefficient setting unit, 61a1, 61a2, 61a3...High-side FET temperature estimator, 61b1, 61b2, 61b3...Low-side FET temperature estimator, 61c1, 61c2, 61c3...Shunt resistor temperature estimator, 61d1, 61d2, 61d3...Phase cutoff FET temperature estimator, 61e1, 61e2...Power cutoff FET temperature estimator, 61f1, 61f 2...Capacitor temperature estimation unit, 61g...Coil temperature estimation unit, 62a, 62b, 62c, 62d, 62e, 62f, 64...Selector, 63a, 63a1, 63a2, 63a3...High-side FET reduction coefficient setting unit, 63b, 63b1, 63b2, 63b3...Low-side FET reduction coefficient setting unit, 63c, 63c1, 63c2, 63c3...Shunt resistance reduction coefficient setting unit, 63d, 63d1, 63d2, 63d3...Phase cutoff FET reduction coefficient setting unit, 63e, 63e1, 63e2...Power cutoff FET reduction coefficient setting unit, 63f, 63f1, 63f2...Capacitor reduction coefficient setting unit,63g...coil reduction coefficient setting unit, 70...second reduction coefficient setting unit, 71...third reduction coefficient setting unit, 72...loss power calculation unit, 73, 73a, 73b...gain multiplication unit, 74, 74a, 74b, 74c, 74d...first low-pass filter, 75...second low-pass filter, 76...adder, 78...initial value setting unit, 79...subtractor, 81...gain multiplication unit, 82...third low-pass filter, 83...switch, 91...nut, 92...drive pulley, 93...driven pulley, 94...belt, 95...second pinion shaft, 96...second pinion gear, Ca1, Ca2, Cb1, Cb2... Ceramic capacitors, CA1, CA2, CB1, CB2... electrolytic capacitors, CNT... connectors, Ct1, Ct2... capacitors, Q1, Q3, Q5... high-side FETs, Q2, Q4, Q6... low-side FETs, QA1, QA2, QA3, QB1, QB2, QB3... phase interruption FETs, QC1, QC2, QD1, QD2... power interruption FETs, La, Lb... choke coils, Lpa, Lpb... positive power line, PWa... first power wiring, PWb... second power wiring, SWAa, SWAb, SWAc, SWBa, SWBb, SWBc... switching arms,

Claims

1. a current control circuit including a plurality of electronic components; a temperature detection circuit having a temperature detection element disposed near the current control circuit; a current detection unit that detects or estimates a current value flowing through each of the plurality of electronic components; a component temperature estimation unit that estimates a component temperature, which is a temperature of the electronic component, for each of the plurality of electronic components based on the current value detected or estimated by the current detection unit and the detected temperature detected by the temperature detection circuit; a reduction coefficient setting unit that sets a plurality of different reduction coefficients for a plurality of different component temperatures included in the component temperatures estimated for each of the plurality of electronic components; a selection unit that selects one of the plurality of reduction coefficients; a current limiting unit that limits an output current output from the current control circuit to a load based on the selected reduction coefficient; Equipped with the plurality of electronic components include at least a first electronic component and a second electronic component, The component temperature estimation unit estimating a first power loss that is a power loss generated in the first electronic component and a second power loss that is a power loss generated in the second electronic component based on the current value detected or estimated by the current detection unit; a sum of a value obtained by low-pass filtering the product of the first power loss and a predetermined gain and a value obtained by low-pass filtering the detected temperature detected by the temperature detection circuit is estimated as a first component temperature that is a component temperature of the first electronic component; a sum of a value obtained by low-pass filtering the product of the second power loss and a predetermined gain, a value obtained by low-pass filtering the detected temperature detected by the temperature detection circuit, and a value obtained by low-pass filtering the product of the first component temperature and a predetermined gain is estimated as a second component temperature that is the component temperature of the second electronic component; a cutoff frequency of the low-pass filter processing being set by simulation so that the estimated results of the first component temperature and the second component temperature simulate the actual first component temperature and the second component temperature.

2. a current control circuit including a plurality of electronic components; a temperature detection circuit having a temperature detection element disposed near the current control circuit; a current detection unit that detects or estimates a current value flowing through each of the plurality of electronic components; a component temperature estimation unit that estimates a component temperature, which is a temperature of the electronic component, for each of the plurality of electronic components based on the current value detected or estimated by the current detection unit and the detected temperature detected by the temperature detection circuit; a reduction coefficient setting unit that sets a plurality of different reduction coefficients for a plurality of different component temperatures included in the component temperatures estimated for each of the plurality of electronic components; a selection unit that selects one of the plurality of reduction coefficients; a current limiting unit that limits an output current output from the current control circuit to a load based on the selected reduction coefficient; Equipped with the plurality of electronic components include at least a first electronic component and a second electronic component, The component temperature estimation unit estimating a first power loss that is a power loss generated in the first electronic component and a second power loss that is a power loss generated in the second electronic component based on the current value detected or estimated by the current detection unit; a sum of a value obtained by low-pass filtering the product of the first power loss and a predetermined gain and a value obtained by low-pass filtering the detected temperature detected by the temperature detection circuit is estimated as a first component temperature that is a component temperature of the first electronic component; When the current control circuit is in a first state, a second component temperature that is the component temperature of the second electronic component is estimated as the sum of a value obtained by low-pass filtering the product of the second power loss and a predetermined gain, a value obtained by low-pass filtering the detected temperature detected by the temperature detection circuit, and a value obtained by low-pass filtering the product of the first component temperature and a predetermined gain; and when the current control circuit is in a second state, a sum of a value obtained by low-pass filtering the product of the second power loss and a predetermined gain, and a value obtained by low-pass filtering the detected temperature detected by the temperature detection circuit is estimated as the second component temperature. the first state is a state in which the heat generation amount of the first electronic component is equal to or greater than a threshold, and the second state is a state in which the heat generation amount of the first electronic component is less than a threshold, a cutoff frequency of the low-pass filter processing is set by simulation so that the estimated results of the first component temperature and the second component temperature simulate the actual first component temperature and the second component temperature.

3. a current control circuit including a plurality of electronic components; a temperature detection circuit having a temperature detection element disposed near the current control circuit; a current detection unit that detects or estimates a current value flowing through each of the plurality of electronic components; a component temperature estimation unit that estimates a component temperature, which is a temperature of the electronic component, for each of the plurality of electronic components based on the current value detected or estimated by the current detection unit and the detected temperature detected by the temperature detection circuit; a reduction coefficient setting unit that sets a plurality of different reduction coefficients for a plurality of different component temperatures included in the component temperatures estimated for each of the plurality of electronic components; a selection unit that selects one of the plurality of reduction coefficients; a current limiting unit that limits an output current output from the current control circuit to a load based on the selected reduction coefficient; Equipped with the plurality of electronic components include at least a first electronic component and a second electronic component, The component temperature estimation unit estimating a first power loss that is a power loss generated in the first electronic component and a second power loss that is a power loss generated in the second electronic component based on the current value detected or estimated by the current detection unit; a sum of a value obtained by low-pass filtering the product of the first power loss and a predetermined gain and a value obtained by low-pass filtering the detected temperature detected by the temperature detection circuit is estimated as a first component temperature that is a component temperature of the first electronic component; When the current control circuit is in a first state, a second component temperature that is the component temperature of the second electronic component is estimated as the sum of a value obtained by low-pass filtering the product of the second power loss and a predetermined gain, a value obtained by low-pass filtering the detected temperature detected by the temperature detection circuit, and a value obtained by low-pass filtering the product of the first component temperature and a predetermined gain; and when the current control circuit is in a second state, a sum of a value obtained by low-pass filtering the product of the second power loss and a predetermined gain, and a value obtained by low-pass filtering the detected temperature detected by the temperature detection circuit is estimated as the second component temperature. the first state is a state in which a power supply current flowing from a DC power supply that supplies DC power to the current control circuit is equal to or greater than a threshold, and the second state is a state in which the power supply current is less than a threshold, a cutoff frequency of the low-pass filter processing is set by simulation so that the estimated results of the first component temperature and the second component temperature simulate the actual first component temperature and the second component temperature.

4. the plurality of electronic components includes a plurality of different types of electronic components, the reduction coefficient setting unit sets one reduction coefficient for each type of electronic component.

4. The current control device according to claim 1, wherein the first and second electrodes are electrically connected to each other.

5. the plurality of electronic components includes a plurality of different types of electronic components, at least one type of electronic component among the plurality of different types of electronic components includes a plurality of electronic components disposed at different locations of the current control circuit; the reduction coefficient setting unit sets a plurality of different reduction coefficients for a plurality of electronic components that are included in the at least one type of electronic component and that are arranged at different positions of the current control circuit, 4. The current control device according to claim 1, wherein the first and second electrodes are electrically connected to each other.

6. The current control device includes a pair of the current control circuits, The component temperature estimation unit setting a predetermined gain according to a distribution ratio between the output currents of the pair of current control circuits; Estimating a power loss generated in each of the plurality of electronic components; estimating the component temperature for each of the plurality of electronic components based on the sum of a value corresponding to the product of the power loss and the predetermined gain and a value corresponding to the detected temperature detected by the temperature detection circuit; 2. The current control device according to claim 1.

7. The component temperature estimation unit Estimating a power loss generated in each of the plurality of electronic components; a second component temperature is estimated based on a sum obtained by adding a first value obtained by filtering the power loss using a plurality of first low-pass filters connected in parallel to a second value obtained by filtering the temperature detected by the temperature detection circuit using a second low-pass filter, and the first component temperature; 7. The current control device according to claim 1, wherein the first and second electrodes are electrically connected to the first and second electrodes.

8. The component temperature estimation unit Estimating a power loss generated in each of the plurality of electronic components; a second component temperature is estimated based on a sum obtained by adding a first value obtained by filtering the power loss using a plurality of first low-pass filters connected in series to a second value obtained by filtering the temperature detected by the temperature detection circuit using a second low-pass filter, and the first component temperature; 7. The current control device according to claim 1, wherein the first and second electrodes are electrically connected to the first and second electrodes.

9. The component temperature estimation unit includes an initial value setting unit that sets an initial value of the component temperature estimate when the current control circuit restarts operation after stopping; The initial value setting unit acquiring a first detected temperature and a second detected temperature detected at two locations spaced apart from each other near the current control circuit; When the current control circuit is stopped, the estimated temperature of the component, the first detected temperature, and the second detected temperature are stored; calculating, as a first estimated gain, a ratio between a temperature difference between the first detected temperature and the second detected temperature at the time of the stoppage and a temperature difference between the first detected temperature and the second detected temperature at the time of restarting the operation of the current control circuit; setting the second estimated gain by calibrating the first estimated gain based on temperature data obtained by actually measuring in advance the change in the temperature of the component over time when the current control circuit is stopped; setting the initial value based on a temperature difference obtained by multiplying the temperature difference between the first detected temperature and the estimated temperature of the component temperature during the stop by the second estimation gain; 2. The current control device according to claim 1.

10. A motor control device, characterized in that the current control device according to any one of claims 1 to 3, 6 and 9 controls a current supplied to an electric motor as the load.

11. The motor control device according to claim 10; an electric motor controlled by the motor control device, An electric power steering device characterized in that the electric motor applies a steering assist force to a steering system of a vehicle.

Images