Ceramic electronic component and manufacturing method thereof

The ceramic electronic component uses doped cover layers to quickly identify defects during lamination, enhancing defect detection efficiency and maintaining performance, addressing the challenges of thin dielectric layers in ceramic components.

JP7752483B2Active Publication Date: 2025-10-10TAIYO YUDEN KK
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Patent Information

Application Number
JP2021058159
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Filing Date
2021-03-30
Publication Date
2025-10-10
Estimated Expiration
2041-03-30

AI Technical Summary

Technical Problem

Ceramic electronic components with thin dielectric layers face defects during lamination that are difficult to detect due to their small size, and existing methods to distinguish the start and end of lamination either reduce capacitance or deteriorate insulation resistance.

Method used

A ceramic electronic component with a laminated structure where cover layers are doped with a common additive element at specific concentrations, allowing easy identification of the start and end of lamination using surface microanalysis, while maintaining capacitance and insulation resistance.

Benefits of technology

Facilitates rapid defect detection and improved process efficiency by distinguishing between cover layers, reducing analysis time and increasing yield without compromising component characteristics.

✦ Generated by Eureka AI based on patent content.

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Patent Text Reader

Abstract

To make it possible to suppress characteristic change of a ceramic electronic component and discriminate the start and end of lamination.SOLUTION: A ceramic electronic component comprises a lamination structure in which a dielectric layer consisting primarily of ceramic and an internal electrode layer are alternately laminated, a first cover layer provided on a surface in one end in a lamination direction of the lamination structure and consisting primarily of ceramic, and a second cover layer provided on a surface in the other end in the lamination direction of the lamination structure. The same additive element whose concentration to a main-component ceramic is 1 mol% or less is added to the first cover layer and the second cover layer or the same additive element whose concentration to the main-component ceramic is 1 mol% or less is added to only any of the first cover layer and the second cover layer, A concentration difference of the additive element between the first cover layer and the second cover layer is twice or more of a standard deviation when measured by a minor surface part-microanalysis device five times or more.SELECTED DRAWING: Figure 1
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Description

[Technical Field]

[0001] The present invention relates to a ceramic electronic component and a method for manufacturing the same. [Background technology]

[0002] In recent years, there has been a strong demand for miniaturization of electronic components in response to the increasing density of electronic circuits used in digital electronic devices such as mobile phones and tablet terminals, and ceramic electronic components such as multilayer ceramic capacitors that make up these circuits have been rapidly reduced in size and increased in capacitance (see, for example, Patent Documents 1 and 2). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2014-022722 [Patent Document 2] Japanese Patent Application Laid-Open No. 2016-162868 Summary of the Invention [Problem to be solved by the invention]

[0004] Ceramic electronic components with thin dielectric layers can develop defects due to the lamination process. Due to the lamination and pressure bonding processes, defects occur with different probabilities near the beginning and end of lamination. When the dielectric layer is thin, the size of the problematic defects also becomes smaller, so it takes time to discover the defects. However, if we can take into account the occurrence rates of the different defects mentioned above and determine whether a certain side of a ceramic electronic component is at the beginning or end of lamination, we can significantly reduce the effort and time required for analysis.

[0005] Therefore, by manufacturing ceramic electronic components with a structure that allows easy identification of the start and end of lamination, defects during manufacturing can be easily identified when the need for failure analysis arises, resulting in increased efficiency of process improvements and ultimately increased yield.

[0006] For example, Patent Document 1 discloses a technique for making the thicknesses of the upper and lower cover layers different. However, this method requires that one of the cover layers be thicker, which has the disadvantage of reducing the capacitance of ceramic electronic components, which are required to have as high a capacitance as possible within limited dimensions.

[0007] Therefore, it is conceivable to use the technology of Patent Document 2 to add a dye component to one of the cover layers. However, there is a concern that a large amount of the dye component will diffuse into the dielectric layer, deteriorating the insulation resistance. For example, an additive that colors Ti oxide or Zr oxide used in the dielectric layer acts as a donor in the perovskite oxide, increasing the carrier concentration that contributes to electrical conduction.

[0008] The present invention has been made in view of the above-mentioned problems, and has an object to distinguish the start and end of lamination while suppressing changes in the characteristics of ceramic electronic components. [Means for solving the problem]

[0009] The ceramic electronic component according to the present invention comprises a laminated structure in which dielectric layers and internal electrode layers, each mainly composed of ceramic, are alternately laminated; a first cover layer, mainly composed of ceramic, provided on one end surface of the laminated structure in the lamination direction; and a second cover layer, mainly composed of ceramic, provided on the other end surface of the laminated structure in the lamination direction, wherein the first cover layer and the second cover layer are doped with the same additive element at a concentration of 1 mol % or less relative to the main ceramic component, or wherein only one of the first cover layer and the second cover layer is doped with the additive element at a concentration of 1 mol % or less relative to the main ceramic component, and the difference in concentration of the additive element between the first cover layer and the second cover layer is at least twice the standard deviation when measured five or more times using a surface microanalysis device.

[0010] In the ceramic electronic component, the larger of the concentration of the additional element in the first cover layer and the concentration of the additional element in the second cover layer may be 0.001 mol % or more.

[0011] In the ceramic electronic component, the ratio of the difference in concentration of the additional element to the larger of the concentration of the additional element in the first cover layer and the concentration of the additional element in the second cover layer may be 5% or more.

[0012] In the ceramic electronic component, the ceramic that is the main component of the dielectric layer may have a perovskite structure.

[0013] In the ceramic electronic component, the additive element may be a metal element.

[0014] A method for manufacturing a ceramic electronic component according to the present invention includes the steps of: preparing a ceramic laminate including a laminated portion in which dielectric green sheets containing a main component ceramic powder and a pattern of a metal conductive paste are laminated; a first cover sheet containing the main component ceramic powder and arranged on one end surface of the laminated portion in the lamination direction; and a second cover sheet containing the main component ceramic powder and arranged on the other end surface of the laminated portion in the lamination direction; and firing the ceramic laminate, wherein the same additive element is added to the first cover sheet and the second cover sheet before firing, or the additive element is added to only one of the first cover sheet and the second cover sheet; and the ceramic laminate is fired so that the concentration of the additive element in the first cover layer obtained by firing the first cover sheet and the second cover layer obtained by firing the second cover sheet is 1 mol % or less relative to the main component ceramic, and the difference in concentration of the additive element between the first cover layer and the second cover layer is at least twice the standard deviation when measured five or more times using a surface microanalysis device. [Effects of the Invention]

[0015] According to the present invention, it is possible to distinguish the start and end of stacking while suppressing changes in the characteristics of the ceramic electronic component. [Brief explanation of the drawings]

[0016] [Figure 1] FIG. 2 is a partial cross-sectional perspective view of a multilayer ceramic capacitor. [Figure 2] FIG. 2 is a cross-sectional view taken along line AA in FIG. [Figure 3] FIG. 2 is a cross-sectional view taken along line BB in FIG. [Figure 4] 1A to 1C are diagrams illustrating a flow of a method for manufacturing a multilayer ceramic capacitor. [Figure 5] 1(a) and 1(b) are diagrams illustrating the lamination process. [Figure 6] 1A to 1C are diagrams illustrating a lamination process. DETAILED DESCRIPTION OF THE INVENTION

[0017] Hereinafter, embodiments will be described with reference to the drawings.

[0018] (Embodiment) FIG. 1 is a partial cross-sectional perspective view of a multilayer ceramic capacitor 100 according to an embodiment. FIG. 2 is a cross-sectional view taken along line AA in FIG. 1. FIG. 3 is a cross-sectional view taken along line BB in FIG. 1. As illustrated in FIGS. 1 to 3, the multilayer ceramic capacitor 100 includes a laminated chip 10 having a substantially rectangular parallelepiped shape and external electrodes 20a, 20b provided on two opposing end faces of the laminated chip 10. Of the four faces of the laminated chip 10 other than the two end faces, the two faces other than the top and bottom faces in the stacking direction are referred to as side faces. The external electrodes 20a, 20b extend on the top, bottom and two side faces of the laminated chip 10 in the stacking direction. However, the external electrodes 20a, 20b are spaced apart from each other.

[0019] The multilayer chip 10 has a configuration in which dielectric layers 11 containing a ceramic material that functions as a dielectric and internal electrode layers 12 containing a base metal material are alternately stacked. The edges of each internal electrode layer 12 are alternately exposed on the end face of the multilayer chip 10 where the external electrode 20a is provided and the end face where the external electrode 20b is provided. As a result, each internal electrode layer 12 is alternately electrically connected to the external electrode 20a and the external electrode 20b. As a result, the multilayer ceramic capacitor 100 has a configuration in which multiple dielectric layers 11 are stacked with the internal electrode layers 12 interposed therebetween. In addition, in a laminate of the dielectric layers 11 and the internal electrode layers 12, the internal electrode layer 12 is arranged as the outermost layer in the stacking direction, and the lower surface of the laminate is covered by a first cover layer 13a. The upper surface of the laminate is covered by a second cover layer 13b. The first cover layer 13a and the second cover layer 13b are primarily composed of a ceramic material. For example, the material of the first cover layer 13a and the second cover layer 13b has the same main component as the ceramic material of the dielectric layer 11.

[0020] The size of the multilayer ceramic capacitor 100 is, for example, 0.25 mm in length, 0.125 mm in width, and 0.125 mm in height, or 0.4 mm in length, 0.2 mm in width, and 0.2 mm in height, or 0.6 mm in length, 0.3 mm in width, and 0.3 mm in height, or 1.0 mm in length, 0.5 mm in width, and 0.5 mm in height, or 3.2 mm in length, 1.6 mm in width, and 1.6 mm in height, or 4.5 mm in length, 3.2 mm in width, and 2.5 mm in height, but is not limited to these sizes.

[0021] The internal electrode layers 12 are mainly composed of base metals such as Ni (nickel), Cu (copper), and Sn (tin). Noble metals such as Pt (platinum), Pd (palladium), Ag (silver), and Au (gold), or alloys containing these metals, may also be used as the internal electrode layers 12. The dielectric layers 11 are mainly composed of a ceramic material having a perovskite structure represented by the general formula ABO3, for example. Note that the perovskite structure is formed by an ABO3 that deviates from the stoichiometric composition. 3-αFor example, the ceramic material includes BaTiO3 (barium titanate), BaZrO3 (barium zirconate), CaZrO3 (calcium zirconate), CaTiO3 (calcium titanate), SrTiO3 (strontium titanate), BaTiO3 (barium zirconate), SrTiO3 (strontium titanate), SrTiO3 (stront ... 1-x-y Ca x Sr y Ti 1-z Zr z O3 (0≦x≦1, 0≦y≦1, 0≦z≦1) etc. can be used.

[0022] The average thickness of each of the internal electrode layers 12 is, for example, 1.5 μm or less, 1.0 μm or less, or 0.7 μm or less. The average thickness of each of the dielectric layers 11 is, for example, 5.0 μm or less, 3.0 μm or less, or 1.0 μm or less.

[0023] 2, the region where the internal electrode layer 12 connected to the external electrode 20a and the internal electrode layer 12 connected to the external electrode 20b face each other is a region where capacitance is generated in the multilayer ceramic capacitor 100. Therefore, this region where capacitance is generated is referred to as a capacitance region 14. In other words, the capacitance region 14 is a region where adjacent internal electrode layers 12 connected to different external electrodes face each other.

[0024] The region where the internal electrode layers 12 connected to the external electrode 20a face each other without an internal electrode layer 12 connected to the external electrode 20b interposed therebetween is called the end margin 15. The region where the internal electrode layers 12 connected to the external electrode 20b face each other without an internal electrode layer 12 connected to the external electrode 20a interposed therebetween is also the end margin 15. In other words, the end margin 15 is the region where the internal electrode layers 12 connected to the same external electrode face each other without an internal electrode layer 12 connected to a different external electrode interposed therebetween. The end margin 15 is a region where no capacitance is generated.

[0025] 3, in the laminated chip 10, the regions extending from the two side surfaces of the laminated chip 10 to the internal electrode layers 12 are referred to as side margins 16. In other words, the side margins 16 are regions provided so as to cover the ends of the multiple internal electrode layers 12 stacked in the above-mentioned laminated structure, which extend to the two side surfaces. The side margins 16 are also regions that do not generate electrical capacitance.

[0026] The multilayer ceramic capacitor 100 is obtained by stacking powder sheets corresponding to each layer, compressing them, and then firing them. For example, a plurality of dielectric green sheets for the dielectric layer 11, on which an electrode pattern for the internal electrode layer 12 is printed, are stacked on a cover sheet for the first cover layer 13a, and a cover sheet for the second cover layer 13b is stacked thereon, compressed, and then fired.

[0027] Defects due to the lamination process can occur during the lamination or compression bonding process. Due to the lamination and compression bonding processes, defects occur with different probabilities near the beginning and end of lamination. As the dielectric layer 11 is thinner, the size of problematic defects also decreases, making defect detection time more time-consuming. However, if it were possible to distinguish between the two cover layers of a multilayer ceramic capacitor, taking into account the different defect occurrence rates, and whether the two cover layers are the first cover layer 13a at the beginning of lamination or the second cover layer 13b at the end of lamination, the effort and time required for analysis could be significantly reduced. Therefore, by fabricating a multilayer ceramic capacitor with a structure that allows for easy identification of the two cover layers, defects during manufacturing can be easily identified when a defect analysis becomes necessary, resulting in improved process improvement efficiency and ultimately improved yield.

[0028] Therefore, it is conceivable to distinguish between first cover layer 13a and second cover layer 13b by, for example, making the thickness of first cover layer 13a and the thickness of second cover layer 13b different so that the difference in thickness can be confirmed. However, this method has the disadvantage that one of the cover layers must be made thick, which reduces the capacitance of the multilayer ceramic capacitor, which is required to have as high a capacitance as possible within limited dimensions.

[0029] One possible solution is to add a dye component to either the first cover layer 13a or the second cover layer 13b. However, if a large amount of the dye component diffuses into the dielectric layer 11, it may deteriorate the insulation resistance. For example, an additive that colors the Ti oxide or Zr oxide used in the dielectric layer 11 may act as a donor in the perovskite oxide and increase the concentration of carriers that contribute to electrical conduction.

[0030] Therefore, the multilayer ceramic capacitor 100 according to this embodiment has a configuration that makes it possible to distinguish between the first cover layer 13a at the start of lamination and the second cover layer 13b at the end of lamination while suppressing changes in characteristics.

[0031] Specifically, a small amount of a common additive element is added to the first cover layer 13a and the second cover layer 13b to suppress changes in the characteristics of the multilayer ceramic capacitor 100. For example, the amount of the common additive element added is specified so as to maintain good insulation. Next, a concentration difference in the common additive element is provided between the first cover layer 13a and the second cover layer 13b so that the concentration difference between the first cover layer 13a and the second cover layer 13b is detectable to an extent that does not result in measurement error. It is determined in advance which of the cover sheets at the beginning and end of stacking should have a higher concentration of the common additive element. If the cover layer with the higher concentration is identified by measurement, it becomes possible to distinguish between the first cover layer 13a and the second cover layer 13b.

[0032] More specifically, the concentration of the common additive element in either the first cover layer 13a or the second cover layer 13b is set to 1 mol% or less, assuming that the main ceramic component is 100 mol%. The other cover layer is either not doped with the common additive element or is doped with the common additive element at a lower concentration than that of the other cover layer. As a result, the concentration of the common additive element in the first cover layer 13a and the second cover layer 13b is set to 1 mol% or less, assuming that the main ceramic component is 100 mol%. Therefore, even if the common additive element diffuses into the dielectric layer 11 and acts as a donor, acceptor, or additive for the main ceramic component of the dielectric layer 11, its effect on the characteristics of the dielectric layer 11 is limited. This suppresses changes in the characteristics of the multilayer ceramic capacitor 100.

[0033] Next, the difference in concentration of the common additive element between the first cover layer 13a and the second cover layer 13b is set to be at least twice the standard deviation when measured five or more times using a surface microanalysis device such as LA-ICP-MS (laser ablation inductively coupled plasma mass spectrometry), μ-XRF (micro-area X-ray fluorescence spectrometry), SIMS (secondary ion mass spectrometry), or EPMA (electron probe microanalyzer). This makes it possible to detect which of the concentrations of the common additive element in the first cover layer 13a and the second cover layer 13b is higher, while suppressing the influence of measurement error. Therefore, it becomes possible to distinguish between the first cover layer 13a at the start of stacking and the second cover layer 13b at the end of stacking.

[0034] Regarding the measurement of the concentration difference of the common additional element, for one sample, the concentration of the common additional element in the first cover layer 13a is measured five times, and then the concentration of the common additional element in the second cover layer 13b is measured five times, and the average value of each measurement is subtracted to obtain the concentration difference of the common additional element. The standard deviation of this concentration difference can be obtained by squaring the standard deviations of the common additional element concentrations measured five times on the front and back, taking the sum, and then taking the square root. When the standard deviation of the concentration differences measured in this way is measured, each measured concentration difference is more than twice the standard deviation.

[0035] Conventionally, it took several hours to polish a multilayer ceramic capacitor and then observe and distinguish the internal structure to distinguish between the cover layers. In contrast, the multilayer ceramic capacitor 100 according to this embodiment can be measured at high speeds of approximately 10 msec using a surface microanalysis / microanalysis device such as the LA-ICP-MS described above. This improves the efficiency of defect analysis and efficiently increases product yield. Furthermore, as the dielectric layer 11 becomes thinner, polishing requires less polishing with smaller polishing marks. However, analysis using a surface microanalysis / microanalysis device such as the LA-ICP-MS makes it possible to distinguish between the first cover layer 13a and the second cover layer 13b regardless of the thickness of the dielectric layer 11.

[0036] The common additive element added to the first cover layer 13a and the second cover layer 13b may be any element that can be measured using a surface microanalysis / microanalysis device such as LA-ICP-MS and is not used as a major element (here, a major element is an element added at a concentration of 1 mol% or more) in the multilayer ceramic capacitor to be used. For example, a metal element or the like can be used. A halogen element or the like can also be used as long as evaporation during the firing process can be suppressed.

[0037] Furthermore, two or more common additional elements may be added to the first cover layer 13a and the second cover layer 13b. By providing a concentration difference for each common additional element and measuring the concentration difference for each common additional element, the first cover layer 13a and the second cover layer 13b can be distinguished from each other. The measurement results of the concentration difference between two or more additional elements can be used, improving measurement accuracy.

[0038] If the main ceramic component of first cover layer 13a and second cover layer 13b has a perovskite structure, the concentration of the additive element is expressed in mol% relative to 100 mol% of the B-site element of the main ceramic component. For example, if the main ceramic component is barium titanate, the concentration of the additive element is expressed in mol% relative to 100 mol% of titanium.

[0039] If the concentration of the common additional element in the first cover layer 13a and the second cover layer 13b is high, there is a risk of significant changes in the characteristics of the multilayer ceramic capacitor 100. In this embodiment, the concentration of the common additional element in the first cover layer 13a and the second cover layer 13b is preferably 0.1 mol% or less, and more preferably 0.05 mol% or less.

[0040] On the other hand, if the larger of the common additional element concentrations of the first cover layer 13a and the second cover layer 13b is too small, high measurement accuracy of the common additional element concentration may not be achieved. Therefore, it is preferable to set a lower limit for the larger common additional element concentration. In this embodiment, the larger common additional element concentration is preferably 0.001 mol% or more, and more preferably 0.01 mol% or more.

[0041] If the difference in concentration of the common additional element between the first cover layer 13a and the second cover layer 13b is small, high measurement accuracy may not be achieved. Therefore, it is preferable to set a lower limit for the difference in concentration of the common additional element. For example, the difference in concentration of the common additional element is preferably at least three times the standard deviation, more preferably at least six times, and even more preferably at least ten times.

[0042] Furthermore, if the difference in common additional element concentration is small relative to the larger of the common additional element concentrations of the first cover layer 13a and the second cover layer 13b, the concentration difference may not be detectable. Therefore, it is preferable to set a lower limit for the ratio of the difference in common additional element concentration to the larger common additional element concentration. For example, this ratio is preferably 5% or more, more preferably 10% or more, and even more preferably 15% or more.

[0043] Next, a description will be given of a method for manufacturing the multilayer ceramic capacitor 100. FIG.

[0044] (raw powder production process) The A-site elements and B-site elements contained in the dielectric layer 11 are usually contained in the dielectric layer 11 in the form of a sintered body of ABO3 particles. For example, BaTiO3 is a tetragonal compound with a perovskite structure and exhibits a high dielectric constant. This BaTiO3 can generally be obtained by synthesizing barium titanate by reacting a titanium raw material such as titanium dioxide with a barium raw material such as barium carbonate. Various methods have been known for synthesizing the ceramic that is the main component of the dielectric layer 11, such as the solid-phase method, the sol-gel method, and the hydrothermal method. Any of these methods can be used in this embodiment.

[0045] The resulting ceramic powder is then mixed with a specific additive compound depending on the purpose, such as oxides of magnesium (Mg), manganese (Mn), vanadium (V), chromium (Cr), rare earth elements (yttrium (Y), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), and ytterbium (Yb)), or oxides or glasses of cobalt (Co), nickel (Ni), lithium (Li), boron (B), sodium (Na), potassium (K), and silicon (Si).

[0046] For example, a ceramic material is prepared by wet-mixing a ceramic raw material powder with a compound containing an additive compound, followed by drying and pulverization. For example, the ceramic material obtained as described above may be pulverized as necessary to adjust the particle size, or may be combined with a classification process to adjust the particle size. A dielectric material is obtained by the above process.

[0047] Next, cover materials for forming the first cover layer 13a and the second cover layer 13b are prepared. The main ceramic component of the cover material can be the same as the dielectric material described above. However, there is a difference in concentration of the common additive element between the cover material for the first cover layer 13a and the cover material for the second cover layer 13b.

[0048] (Lamination process) Next, a binder such as polyvinyl butyral (PVB) resin, an organic solvent such as ethanol or toluene, and a plasticizer are added to the dielectric material and wet-mixed. The resulting slurry is used to coat a dielectric green sheet 51 on a substrate by, for example, a die coater or doctor blade method, and then dried. A binder such as polyvinyl butyral (PVB) resin, an organic solvent such as ethanol or toluene, and a plasticizer are added to a cover material for the first cover layer 13a and wet-mixed. The resulting slurry is used to coat a first cover sheet 54a on a substrate by, for example, a die coater or doctor blade method, and then dried. A binder such as polyvinyl butyral (PVB) resin, an organic solvent such as ethanol or toluene, and a plasticizer are added to a cover material for the second cover layer 13b and wet-mixed. The resulting slurry is used to coat a second cover sheet 54b on a substrate by, for example, a die coater or doctor blade method, and then dried.

[0049] Next, as illustrated in FIG. 5(a), a metal conductive paste for forming an internal electrode containing an organic binder is printed on the surface of the dielectric green sheet 51 by screen printing, gravure printing, or the like, to form a first pattern 52 for the internal electrode layer. Ceramic particles are added to the metal conductive paste as a co-material. The main component of the ceramic particles is not particularly limited, but is preferably the same as the main component ceramic of the dielectric layer 11. Next, a reverse pattern paste is printed on the peripheral area of ​​the dielectric green sheet 51 where the first pattern 52 is not printed, to form a second pattern 53, thereby filling in the step with the first pattern 52. The reverse pattern paste may have the same components as the dielectric green sheet 51, or may contain a different additive compound.

[0050] Next, as illustrated in Fig. 6, a predetermined number of first cover sheets 54a (for example, 1 to 10 layers) are laminated. Next, as illustrated in Fig. 5(b), dielectric green sheets 51, first patterns 52, and second patterns 53 are laminated so that the internal electrode layers 12 and the dielectric layers 11 alternate, and so that the edges of the internal electrode layers 12 are alternately exposed at both end faces in the length direction of the dielectric layers 11 and are alternately drawn out to a pair of external electrodes 20a, 20b of opposite polarity. For example, the number of laminated dielectric green sheets 51 is set to 100 to 500.

[0051] Next, as shown in Fig. 6, a predetermined number (e.g., 1 to 10 layers) of second cover sheets 54b are laminated on the laminated dielectric green sheets 51, thermocompression bonded, and cut to predetermined chip dimensions (e.g., 1.0 mm x 0.5 mm). Thereafter, a metal conductive paste that will become the external electrodes 20a, 20b is applied to both sides of the cut laminate by a dipping method or the like and then dried. This results in a ceramic laminate.

[0052] (Firing process) The ceramic laminate thus obtained was subjected to binder removal treatment in an N2 atmosphere, after which a metal paste that would become the base layer of the external electrodes 20a, 20b was applied by dipping, and the metal paste was then applied under an oxygen partial pressure of 10 -12 ~10 -9The mixture is then fired in a reducing atmosphere at 1100 to 1300° C. for 10 minutes to 2 hours at 1 atm. In this way, the multilayer ceramic capacitor 100 is obtained.

[0053] (Reoxidation treatment process) Thereafter, a re-oxidation treatment may be performed at 600°C to 1000°C in an N2 gas atmosphere.

[0054] (Plating process) Thereafter, the underlying layers of the external electrodes 20a, 20b are plated with a metal coating of Cu, Ni, Sn, etc. Through the above steps, the multilayer ceramic capacitor 100 is completed.

[0055] In the manufacturing method according to this embodiment, a common additive element is added to the first cover sheet 54a and the second cover sheet 54b before firing, or the additive element is added to only one of the first cover sheet 54a and the second cover sheet 54b. The firing process is performed so that the concentration of the common additive element in the first cover layer 13a obtained by firing the first cover sheet 54a and the second cover layer 13b obtained by firing the second cover sheet 54b is 1 mol % or less relative to the main ceramic component, and the difference in concentration of the common additive element between the first cover layer 13a and the second cover layer 13b after firing is at least twice the standard deviation when measured five or more times using a surface microanalysis device. This method makes it possible to distinguish the first cover layer 13a at the beginning of stacking from the second cover layer 13b at the end of stacking while suppressing changes in the characteristics of the multilayer ceramic capacitor 100.

[0056] In the above embodiments, a multilayer ceramic capacitor has been described as an example of a ceramic electronic component, but the present invention is not limited to this. For example, other electronic components such as a varistor or a thermistor may also be used. [Example]

[0057] The multilayer ceramic capacitor according to the embodiment was fabricated and its characteristics were examined.

[0058] Example 1 Additives were added to barium titanate powder, and the mixture was thoroughly wet-mixed and pulverized in a ball mill to obtain a dielectric material.Additives were added to barium titanate powder, and the mixture was thoroughly wet-mixed and pulverized in a ball mill to obtain a cover material.

[0059] Sodium was added to the cover material as an additive element, and the material was wet mixed with a binder such as polyvinyl butyral (PVB) resin, an organic solvent such as ethanol or toluene, and a plasticizer. The resulting slurry was used to coat a first cover sheet on the substrate and then dried. In the first cover sheet, the Na content was 0.006 mol% when Ti was 100 mol%.

[0060] The cover material was wet-mixed with sodium as an additive element, a binder such as polyvinyl butyral (PVB) resin, an organic solvent such as ethanol or toluene, and a plasticizer. The resulting slurry was used to coat a second cover sheet on the substrate and then dried. The second cover sheet contained 0.009 mol% of sodium when Ti was 100 mol%.

[0061] The dielectric material was wet-mixed with a binder such as polyvinyl butyral (PVB) resin, an organic solvent such as ethanol or toluene, and a plasticizer without adding sodium. The resulting slurry was used to coat a dielectric green sheet on a substrate and then dried. An electrode pattern of a metal conductive paste containing Ni as the main metal component was printed on the resulting dielectric green sheet.

[0062] The first cover sheet was peeled off from the substrate and stacked in 40 layers, the dielectric green sheet with the printed electrode pattern was peeled off from the substrate and stacked in 500 layers so that the electrode patterns were shifted alternately, the second cover sheet was peeled off from the substrate and stacked in 40 layers, pressed together, cut to the specified shape, and the two end faces where the electrode patterns were exposed were coated with a metal conductive paste mainly composed of Ni, and fired in a reducing atmosphere to obtain a sintered body. In these processes, a manufacturing process was used in which Na that had infiltrated from the outside was sufficiently removed.

[0063] (Comparative Example 1) In Comparative Example 1, the first cover sheet contained 0.007 mol % Na when Ti was 100 mol %. The second cover sheet contained 0.008 mol % Na when Ti was 100 mol %. Other conditions were the same as in Example 1.

[0064] (Comparative Example 2) In Comparative Example 2, the first cover sheet contained 0.006 mol% Na when Ti was 100 mol%. The second cover sheet contained 1.1 mol% Na when Ti was 100 mol%. Other conditions were the same as in Example 1.

[0065] For each of Example 1, Comparative Example 1, and Comparative Example 2, we investigated whether it was possible to distinguish between the first cover layer obtained from the first cover sheet and the second cover layer obtained from the second cover sheet by examining the differences in the results of quantitative composition analysis using LA-ICP-MS. The LA-ICP-MS device used was an Agilent 7900 ICP-MS device connected to an NWR / ESI NWR213 laser ablation system. If the concentration difference between the first and second cover layers was more than twice the standard deviation of five or more measurements, the results were judged to be distinguishable (OK); otherwise, the results were judged to be indistinguishable (NG). Furthermore, the properties of the multilayer ceramic capacitor were examined by measuring the insulation resistance. If the insulation resistance was 1 GΩ, the insulation was judged to be good (OK); otherwise, the insulation was judged to be poor (NG). The results are shown in Table 1. [Table 1]

[0066] In Comparative Example 1, the insulation was judged to be good ("OK"). This is thought to be because the concentration of the added elements was 1 mol% or less in all cover sheets. However, in Comparative Example 1, it was judged to be impossible to distinguish between the first cover layer and the second cover layer ("NG"). This is thought to be because the concentration difference was not greater than the measurement error in the measurement using LA-ICP-MS.

[0067] In Comparative Example 2, the first cover layer and the second cover layer were judged to be distinguishable (OK). This is thought to be because a concentration difference greater than the measurement error was set in the measurement using LA-ICP-MS. However, in Comparative Example 2, the insulation was judged to be poor (NG). This is thought to be because the concentration of the added element in the second cover sheet exceeded 1 mol%.

[0068] In comparison with these, in Example 1, it was judged that it was possible to distinguish between the first cover layer and the second cover layer ("OK"). This is thought to be because a concentration difference greater than the measurement error was set in the measurement using LA-ICP-MS. Next, in Example 1, the insulation was judged to be good ("OK"). This is thought to be because the concentration of the added element was 1 mol% or less in all cover sheets.

[0069] Example 2 In Example 2, Sn was used instead of Na as the additive element. No Sn was added to the first cover sheet. That is, in the first cover sheet, when Ti was 100 mol %, Sn was 0.000 mol %. In the second cover sheet, when Ti was 100 mol %, Sn was 0.017 mol %. Other conditions were the same as in Example 1.

[0070] Example 3 In Example 3, Na was not used as the additive element, but Re (rhenium) was used. No Re was added to the first cover sheet. That is, in the first cover sheet, when Ti was 100 mol%, Re was 0.00000 mol%. In the second cover sheet, when Ti was 100 mol%, Re was 0.33284 mol%. Other conditions were the same as in Example 1.

[0071] Example 4 In Example 4, Ag was used instead of Na as the additive element. No Ag was added to the first cover sheet. That is, in the first cover sheet, Ag was 0.0000 mol % when Ti was 100 mol %. In the second cover sheet, Ag was 0.0030 mol % when Ti was 100 mol %. Other conditions were the same as in Example 1.

[0072] Example 5 In Example 5, Na was not used as the additive element, but Bi (bismuth) was used. In the first cover sheet, when Ti was 100 mol%, Bi was 0.00006 mol%. In the second cover sheet, when Ti was 100 mol%, Bi was 0.00017 mol%. Other conditions were the same as in Example 1.

[0073] Example 6 In Example 6, Au was used instead of Na as the additive element. In the first cover sheet, when Ti was 100 mol%, Au was 0.00001 mol%. In the second cover sheet, when Ti was 100 mol%, Au was 0.00879 mol%. Other conditions were the same as in Example 1.

[0074] Example 7 In Example 7, Zn (zinc) was used instead of Na as the additive element. In the first cover sheet, when Ti was 100 mol%, Zn was 0.0185 mol%. In the second cover sheet, when Ti was 100 mol%, Zn was 0.0599 mol%. Other conditions were the same as in Example 1.

[0075] Example 8 In Example 8, Pt was used instead of Na as the additive element. In the first cover sheet, when Ti was 100 mol %, Pt was 0.0017 mol %. In the second cover sheet, when Ti was 100 mol %, Pt was 0.0072 mol %. Other conditions were the same as in Example 1.

[0076] For each of Examples 2 to 8, the same tests and criteria as those used in Example 1 and Comparative Examples 1 and 2 were used to determine whether the first cover layer and the second cover layer could be distinguished and whether the insulation was good. The results are shown in Table 2. In Examples 2 to 8, the first cover layer and the second cover layer were also determined to be distinguishable ("OK"). This is thought to be because a concentration difference greater than the measurement error was set in the measurement using LA-ICP-MS. The insulation was also determined to be good ("OK"). This is thought to be because the concentration of the added element was 1 mol% or less in all of the cover sheets. [Table 2]

[0077] Example 9 In Example 9, the first cover sheet contained 0.006 mol% Na when Ti was 100 mol%. The second cover sheet contained 0.025 mol% Na when Ti was 100 mol%. Other conditions were the same as in Example 1.

[0078] Example 10 In Example 10, Dy was used instead of Na as the additive element. In the first cover sheet, when Ti was 100 mol %, Dy was 0.53 mol %. In the second cover sheet, when Ti was 100 mol %, Dy was 0.76 mol %. Other conditions were the same as in Example 1.

[0079] Example 11 In Example 11, W (tungsten) was used instead of Na as the additive element. In the first cover sheet, when Ti was 100 mol%, W was 0.0010 mol%. In the second cover sheet, when Ti was 100 mol%, W was 0.0044 mol%. Other conditions were the same as in Example 1.

[0080] Example 12 In Example 12, Mn was used instead of Na as an additive element. In the first cover sheet, when Ti was 100 mol %, Mn was 0.13 mol %. In the second cover sheet, when Ti was 100 mol %, Mn was 0.17 mol %. Other conditions were the same as in Example 1.

[0081] Example 13 In Example 13, V was used instead of Na as an additive element. In the first cover sheet, when Ti was 100 mol %, V was 0.07 mol %. In the second cover sheet, when Ti was 100 mol %, V was 0.11 mol %. Other conditions were the same as in Example 1.

[0082] Example 14 In Example 14, Mg was used instead of Na as an additive element. In the first cover sheet, when Ti was 100 mol %, Mg was 0.05 mol %. In the second cover sheet, when Ti was 100 mol %, Mg was 0.07 mol %. Other conditions were the same as in Example 1.

[0083] Example 15 In Example 15, Na was not used as the additive element, but Mo (molybdenum) was used. In the first cover sheet, when Ti was 100 mol%, Mo was 0.02 mol%. In the second cover sheet, when Ti was 100 mol%, Mo was 0.13 mol%. Other conditions were the same as in Example 1.

[0084] Example 16 In Example 16, Si was used instead of Na as the additive element. In the first cover sheet, when Ti was 100 mol %, Si was 0.14 mol %. In the second cover sheet, when Ti was 100 mol %, Si was 0.22 mol %. Other conditions were the same as in Example 1.

[0085] Example 17 In Example 17, instead of Na, B was used as an additive element. In the first cover sheet, when Ti was 100 mol %, B was 0.018 mol %. In the second cover sheet, when Ti was 100 mol %, B was 0.025 mol %. Other conditions were the same as in Example 1.

[0086] Example 18 In Example 18, Ni was used instead of Na as the additive element. In the first cover sheet, when Ti was 100 mol %, Ni was 0.25 mol %. In the second cover sheet, when Ti was 100 mol %, Ni was 0.54 mol %. Other conditions were the same as in Example 1.

[0087] Example 19 In Example 19, Zr (zirconium) was used instead of Na as an additive element. In the first cover sheet, Zr was 0.23 mol% when Ti was 100 mol%. In the second cover sheet, Zr was 0.44 mol% when Ti was 100 mol%. Other conditions were the same as in Example 1.

[0088] Example 20 In Example 20, Al (aluminum) was used instead of Na as the additive element. In the first cover sheet, when Ti was 100 mol%, Al was 0.010 mol%. In the second cover sheet, when Ti was 100 mol%, Al was 0.133 mol%. Other conditions were the same as in Example 1.

[0089] Example 21 In Example 21, Y was used instead of Na as an additive element. In the first cover sheet, when Ti was 100 mol %, Y was 0.012 mol %. In the second cover sheet, when Ti was 100 mol %, Y was 0.030 mol %. Other conditions were the same as in Example 1.

[0090] Example 22 In Example 22, Sr (strontium) was used instead of Na as the additive element. In the first cover sheet, when Ti was 100 mol%, Sr was 0.011 mol%. In the second cover sheet, when Ti was 100 mol%, Sr was 0.015 mol%. Other conditions were the same as in Example 1.

[0091] Example 23 In Example 23, Hf (hafnium) was used instead of Na as an additive element. In the first cover sheet, when Ti was 100 mol%, Hf was 0.0029 mol%. In the second cover sheet, when Ti was 100 mol%, Hf was 0.0056 mol%. Other conditions were the same as in Example 1.

[0092] For each of Examples 9 to 23, the same tests and criteria as those used in Example 1 and Comparative Examples 1 and 2 were used to determine whether the first cover layer and the second cover layer could be distinguished and whether the insulation was good. The results are shown in Table 3. In Examples 9 to 23, the first cover layer and the second cover layer were also determined to be distinguishable ("OK"). This is thought to be because a concentration difference greater than the measurement error was set in the measurement using LA-ICP-MS. The insulation was also determined to be good ("OK"). This is thought to be because the concentration of the added element was 1 mol% or less in all of the cover sheets. [Table 3]

[0093] Although the embodiments of the present invention have been described in detail above, the present invention is not limited to such specific embodiments, and various modifications and variations are possible within the scope of the gist of the present invention as defined in the claims. [Explanation of symbols]

[0094] 10 stacked chips 11 Dielectric layer 12 Internal electrode layer 13 Cover Layer 14 capacity area 15 End Margin 16 Side Margin 20a,20b external electrode 100 Multilayer ceramic capacitors

Claims

1. a laminated structure in which dielectric layers mainly composed of ceramic and internal electrode layers are alternately laminated; a first cover layer provided on one end surface of the laminated structure in the lamination direction and containing ceramic as a main component; a second cover layer provided on the surface of the other end of the laminated structure in the lamination direction and containing ceramic as a main component, the first cover layer and the second cover layer are doped with the same additive element at a concentration of 1 mol % or less relative to the main component ceramic, or the additive element is doped only to one of the first cover layer and the second cover layer at a concentration of 1 mol % or less relative to the main component ceramic, a difference in concentration of the additive element between the first cover layer and the second cover layer is at least twice the standard deviation when measured five or more times using a surface microanalysis device; A ceramic electronic component characterized in that the additive element is any one of Na, Sn, Re, Ag, Bi, Au, Zn, Pt, Si, B, Ni, Zr, Al, Y, and Hf.

2. 2. The ceramic electronic component according to claim 1, wherein the larger of the concentration of the additive element in the first cover layer and the concentration of the additive element in the second cover layer is 0.001 mol % or more.

3. 3. The ceramic electronic component according to claim 1, wherein a ratio of a difference in concentration of the additive element between the first cover layer and the second cover layer, whichever is larger, to the concentration of the additive element is 5% or more.

4. 4. The ceramic electronic component according to claim 1, wherein the ceramic as a main component of the dielectric layer has a perovskite structure.

5. 5. The ceramic electronic component according to claim 1, wherein the additive element is Na.

6. The difference between the concentration of the additive element in the first cover layer and the concentration of the additive element in the second cover layer is 0.003 mol% or more and 1.000 mol% or less, 6. The ceramic electronic component according to claim 1, wherein the value twice the standard deviation is equal to or greater than 0.000 and equal to or less than 0.

21.

7. preparing a ceramic laminate including a laminated portion in which a dielectric green sheet containing a main component ceramic powder and a pattern of a metal conductive paste are laminated, a first cover sheet containing the main component ceramic powder and disposed on a surface of one end of the laminated portion in the lamination direction, and a second cover sheet containing the main component ceramic powder and disposed on a surface of the other end of the laminated portion in the lamination direction; and firing the ceramic laminate. the same additive element is added to the first cover sheet and the second cover sheet before firing, or the additive element is added to only one of the first cover sheet and the second cover sheet, the ceramic laminate is fired so that the concentration of the additive element in the first cover layer obtained by firing the first cover sheet and in the second cover layer obtained by firing the second cover sheet is 1 mol % or less relative to the main component ceramic, and the difference in concentration of the additive element between the first cover layer and the second cover layer is at least twice the standard deviation when measured five or more times using a surface microanalysis device; A method for manufacturing a ceramic electronic component, characterized in that the additive element is any one of Na, Sn, Re, Ag, Bi, Au, Zn, Pt, Si, B, Ni, Zr, Al, Y, and Hf.

Citation Information

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