Materials and methods for passivation of metal-plated through-glass vias.

Abstract

This improves the hermeticity of the barrier seal when the barrier film is placed on the 3D topology associated with TGV. [Solution] A through glass via (TGV) formed in a glass substrate may include a metal plating layer. The TGV may have a three-dimensional (3D) topology through the glass substrate, and the metal plating layer may conformally cover the 3D topology. The TGV may further include a barrier layer disposed on the metal plating layer and a metallization layer disposed on the barrier layer. The metallization layer may be electrically coupled to the metal plating layer through the barrier layer. The barrier layer may include a metal nitride film disposed on the metal plating layer and electrically coupled to the metallization layer. The barrier layer may include a metal film disposed on the metal plating layer and on a portion of the glass surrounding the TGV, and an electrically insulating film disposed on the metal film, and the electrically insulating film may completely overlap the metal plating layer and partially overlap the metal film.

Description

[Technical Field]

[0001] <Related Applications> This application is a continuation of U.S. Application No. 16 / 897,788, filed June 10, 2020. The entire teachings of the above application are incorporated herein by reference. [Background technology]

[0002] Glass, e.g., fused SiO2, is a promising substrate material for high-frequency electrical technologies. These technologies include millimeter-wave devices, such as radio frequency (RF) integrated circuits (ICs) and microelectromechanical systems (MEMS). Glass as a substrate material is advantageous because it offers unique advantages over traditional substrate materials, such as silicon (Si), ceramics, and organic laminates. Glass not only offers excellent RF performance (e.g., high electrical insulation at very high frequencies (SHF and EHF), low insertion loss, and low loss tangent), but also excellent dimensional and thermal stability (e.g., tunable coefficient of thermal expansion (CTE), effective moisture barrier, and extremely thin IC and MEMS packaging).

[0003] In 2.5-dimensional (2.5D) and three-dimensional (3D) ICs and MEMS, electrical signals are often transmitted through vertical conductive paths called through-silicon vias (TSVs), which pass completely through one or more individual substrates and / or interposers to interconnect multiple IC dies. Such out-of-plane electrical connections can also be achieved in silicate glass substrates by drilling through-hole vias with varying cross-sectional diameters (e.g., 1-100 μm) relative to their depths, forming hourglass-shaped through-holes in the silicate glass substrate.

[0004] The hourglass-shaped hole may be constructed using, for example, laser machining techniques. A cross-sectional view of an exemplary through glass via (TGV) 102 formed in a silicate glass substrate 104 is shown in FIG. 1A. At its narrowest point 106, the TGV 102 may have a diameter of approximately 10 μm, although the diameter at this narrowest point 106 may be as small as 1 μm or as large as 100 μm. The outer diameter 108 of the TGV may be approximately 50 μm, although the outer diameter 108 may be as small as 1 μm or as large as 100 μm. The thickness 110 of the silicate glass substrate 104 may be approximately 300 μm, although the thickness 110 may be as small as 100 μm or as large as 1000 μm.

[0005] The inner surface 112 of the TGV 102 may be coated with one or more layers of metal using one or more conventional electroplating techniques known in the art to form a metal-plated or metal-filled TGV. As shown in the exemplary TGV depicted in FIG. 1B , these metal layers may include a thin adhesion layer 120 (e.g., titanium (Ti)), a metal seed layer 122 disposed on adhesion layer 120, and a metal plating layer 124 disposed on seed layer 122. Metal plating layer 124 may be composed of a conductive material such as copper (Cu) or aluminum (Al).

[0006] Electrical signals routed along horizontal conductive paths (e.g., patterned metallization layers containing gold (Au)) may be electrically coupled to metal-filled TGVs. During the manufacturing process, the metal-plated layer 124 of a metal-plated TGV may be exposed to environmental conditions characterized by high levels of oxygen (O). Some atoms of the metal-plated layer 124 diffuse along grain boundaries of the patterned metallization layer disposed on the metal-plated layer 124 and encounter O. O can readily react with exposed non-inert metal atoms (e.g., Cu at temperatures above 100°C) to produce unstable metal oxide by-products such as copper oxide (CuO or CuO). This metal oxide by-product can degrade the performance, reliability, lifetime, and packaging integrity of associated devices. Scanning electron micrographs (SEMs) shown in Figures 2A and 2B show such micrometer- and nanometer-scale particles 206 formed on the Au surface 204, most of which consist of CuO or CuO. Particles 206 are generated in the region near TGV 202 due to the diffusion of Cu atoms through the patterned metallization layer.

[0007] To prevent atomic diffusion of the metal plating layer 124 and the resulting contamination shown in FIGS. 2A and 2B , a barrier layer may be disposed between the metal plating layer 124 and the patterned metallization layer. Due to the small physical dimensions of through-silicon vias (compared to TGVs), providing such a barrier layer is feasible with conventional techniques. For example, silicon-based fabrication techniques may use diffusion barriers such as titanium nitride (TiN) or tantalum nitride (TaN) deposited using chemical vapor deposition (CVD) or physical vapor deposition (PVD) or atomic layer deposition (ALD) processes. While such TiN or TaN barriers are typically very thin (less than 10 nm), thinness is not an issue due to the relatively small dimensions of scaled TSVs (e.g., less than 5 μm in diameter).

[0008] However, the full deployment of barriers using such conventional techniques can present problems when the dimensions of TGVs are relatively large. For example, using conventional fabrication techniques (e.g., PVD) to place a barrier film on the 3D topology associated with the large-dimension hourglass-shaped TGVs described herein can result in imperfect barrier seal hermeticity. Such imperfect sealing can allow atoms to diffuse from the metal plating layer into the patterned metallization layer. Summary of the Invention [Problem to be solved by the invention]

[0009] The embodiments described herein are directed to passivation (i.e., barrier) layers associated with metallized through glass vias (TGVs) and methods for their fabrication. Ideally, an intervening layer disposed between the metal-plated layer and the outer metallization layer of a TGV can act as a barrier to atoms of the metal-plated layer migrating into the outer metallization layer. For example, the intervening layer 302 between the metal-plated layer 124 and the outer metallization layer 304 depicted in FIG. 3 may act to prevent atoms of the metal-plated layer from diffusing into the outer metallization layer 304. The 3D topology and large spatial dimensions (compared to TSVs) of hourglass-shaped TGVs preclude the establishment of a complete barrier layer within the TGV. While thin-film deposition techniques known in the art (e.g., PVD) can generally produce conformal films, such thin conformal film deposition techniques can result in incomplete filling of 3D topologies such as the large-dimension hourglass-shaped TGVs shown in FIGS. 1A, 1B, and 3. Any area of ​​the 3D topology that is not covered by a barrier film may provide a path for the metal to diffuse through. [Means for solving the problem]

[0010] According to described embodiments, oxide- and nitride-based thin films, such as silicon dioxide (SiO) and titanium nitride (TiN), can effectively function as diffusion barrier layers to block metal diffusion and subsequent O interaction. Such barriers can be deposited on the surface of metallized TGV substrates using conventional deposition techniques, such as CVD, PVD, and ALD, and patterned using standard photolithography and etching processes.

[0011] In one aspect, the invention may be a method of disposing a barrier film on a metallized through glass via (TGV) formed in a glass substrate, the method including forming a metal nitride film on the metal plating layer of the metallized TGV using an atomic layer deposition (ALD) procedure, and forming a conductive metallization layer on the metal nitride film, wherein the conductive metallization layer may be electrically coupled to the metal nitride film.

[0012] The method may further include preparing the conductive metal nitride film to include titanium nitride (TiN). The method may further include electrically coupling an outer metallization layer to the conductive metal nitride film. The method may further include disposing one or more conductive coatings on the conductive metal nitride film. The one or more conductive coatings include one or both of TiW and Au.

[0013] In another aspect, the present invention may be a method for disposing a barrier film on a metallized through glass via (TGV) formed in a glass substrate, the method comprising: using a physical vapor deposition (PVD) procedure to form a metal film (i) on a metal plating layer of the metallized TGV and (ii) on at least a portion of the glass surrounding the TGV. The method may further comprise forming an electrically insulating film on the metal film using chemical vapor deposition (CVD). The electrically insulating film may completely overlap the metal plating layer and partially overlap the metal film. The method may further comprise forming a conductive metallization layer on the insulating film and on the metal film using a PVD procedure. The conductive metallization layer may be electrically coupled to the metal film.

[0014] The method may further include formulating the conductive metal film to contain titanium tungsten (TiW). The method may further include formulating the insulating film to contain silicon dioxide (SiO2). The method may further include patterning the insulating film to form a diffusion barrier patch that covers at least a portion of the conductive metal film overlying the TGV. The method may further include extending the insulating film so that the diffusion barrier patch covers at least a portion of the glass surrounding the TGV.

[0015] The method may further include electrically coupling the outer metallization layer to the conductive metal film. The method may further include disposing one or more conductive coatings on the conductive metal nitride film. The one or more conductive coatings include one or both of TiW and Au.

[0016] In another aspect, the present invention may be a through glass via (TGV) formed in a glass substrate, the TGV including a metal plating layer formed on the TGV. The TGV may have a three-dimensional (3D) topology that penetrates the glass substrate, with the metal plating layer conformally covering the 3D topology. The TGV may further include a barrier layer disposed on the metal plating layer and a conductive metallization layer disposed on the barrier layer. The conductive metallization layer may be electrically coupled to the metal plating layer through the barrier layer.

[0017] The barrier layer may further include a metal nitride film disposed on the metal plating layer, the metal nitride film being electrically coupled to the conductive metallization layer. The metal nitride film may be titanium nitride (TiN).

[0018] The barrier layer may further include (i) a metal film disposed on the metal plating layer and on at least a portion of the glass surrounding the TGV, and (ii) an electrically insulating film disposed on the metal film. The electrically insulating film may completely overlap the metal plating layer and partially overlap the metal film. The metal film may be electrically coupled to the conductive metallization layer. The metal film may be comprised of titanium tungsten (TiW), and the electrically insulating film may be comprised of silicon dioxide (SiO2). The TVG may further include one or more conductive coatings on the conductive metallization layer. The one or more conductive coatings may include one or both of TiW and Au. [Brief explanation of the drawings]

[0019] The foregoing will become more apparent from the following more particular description of exemplary embodiments, as illustrated in the accompanying drawings, in which like parts are designated by like reference numerals throughout the different views, and in which the drawings are not necessarily to scale, but may be drawn with an exaggerated scale for purposes of illustrating the embodiments. [Figure 1A] FIG. 1A is a cross-sectional view showing an example of a through glass via (TGV) formed in a silicate glass substrate. [Figure 1B] FIG. 1B shows the TGV of FIG. 1A with a thin adhesive layer, a metal seed layer disposed on the adhesive layer, and a metal plating layer disposed on the seed layer. [Figure 2A] FIG. 2A is a scanning electron micrograph (SEM) showing micrometer- or nanometer-scale particles on the Au surface of a TGV. [Figure 2B] FIG. 2B is a scanning electron micrograph (SEM) showing micrometer- or nanometer-scale particles on the Au surface of a TGV. [Figure 3] FIG. 3 shows an example of a TGV in which a metal film is formed on the upper and / or lower surfaces of a glass substrate. [Figure 4] FIG. 4 shows one embodiment of a passivation layer provided on a TGV according to the present invention. [Figure 5]FIG. 5 shows another embodiment of a passivation layer provided on a TGV according to the present invention. [Figure 6A] FIG. 6A shows an example of a TGV fabricated using a passivation layer according to the present invention. [Figure 6B] FIG. 6B shows an example of a TGV fabricated using a passivation layer according to the present invention. [Figure 7] FIG. 7 shows an embodiment of the passivated TGV of FIG. 4 with an additional metal coating for use as a conductive interconnect path and / or seal ring for use as IC and MEMS packaging. [Figure 8] FIG. 8 shows an embodiment of the passivated TGV of FIG. 5 with an additional metal coating for use as a conductive interconnect path and / or seal ring for use as IC and MEMS packaging. DETAILED DESCRIPTION OF THE INVENTION

[0020] Exemplary embodiments are described below.

[0021] The teachings of all patents, published applications and references cited herein are hereby incorporated by reference in their entirety.

[0022] Embodiments described herein are directed to passivation (i.e., barrier) layers associated with metallized through glass vias (TGVs). As described herein, FIG. 1B illustrates an exemplary hourglass-shaped TGV lined with an adhesion layer 120, a metal seed layer 122, and a metal plating layer 124. In this example TGV, one or more metal films are deposited on the top and / or bottom surfaces of the glass substrate, e.g., using physical vapor deposition (PVD) techniques, as shown in FIG. 3. In the example illustrated in FIG. 3, a first metal layer 302 containing titanium tungsten (TiW) is deposited on the metal plating layer 124, and a second metal layer 304 containing gold (Au) is disposed on the first metal layer 302. The outer metallization layer 304 can function not only as a conductive path for die-to-die interconnections but also as a bond pad or seal ring when bonding a device to a lid substrate using, e.g., thermocompression wafer bonding techniques. When thermocompression bonding with the Au seal ring on the opposing substrate, clean Au bond pads free of foreign matter are required to ensure a strong Au-to-Au bond for hermetic sealing.Proper surface passivation of metal-filled TGVs can reduce or prevent metal diffusion and interaction with O2, resulting in the formation of unwanted metal oxide particles.

[0023] The described embodiments enable significant reduction of parasitic metal oxide formation on the substrate. Specifically, the surface of a silicate glass wafer having metal-filled TGVs is coated with a passivation layer. Furthermore, the described embodiments facilitate placement of a passivation layer on the non-planar, three-dimensional (3D) topography of TGVs of the type described herein. Also, in certain applications, TGVs are required to carry significant amounts of power, necessitating a physically larger size than typical TGVs. The described embodiments facilitate complete coverage of TGVs to block potential diffusion paths.

[0024] 4, the passivation layer comprises a conductive metal nitride film 402 deposited using atomic layer deposition (ALD) techniques known in the art. In an exemplary embodiment, the metal nitride film 402 contains titanium nitride (TiN), although other metal nitride materials, such as tantalum nitride (TaN), may alternatively be used in other embodiments. The ALD process facilitates fully conformal deposition of the metal nitride film 402 within the 3D topography of the TGV.

[0025] In another embodiment, the passivation layer may be composed of two parallel layers, as shown in FIG. 5, consisting of a metal film 502 (e.g., titanium tungsten (TiW)) deposited by physical vapor deposition on the metal plating layer 124 and an insulating oxide-based film 504 deposited by chemical vapor deposition (CVD) on the surface of the metal film 502. In the exemplary embodiment described herein, the insulating oxide-based film 504 is composed of silicon dioxide (SiO), although other insulating oxide-based materials known in the art, such as amorphous aluminum oxide (AlO), may alternatively be used. In the exemplary embodiment described herein, the metal film 502 contains titanium tungsten (TiW), but in alternative embodiments, the metal film 502 may contain other transition metals, such as titanium (Ti) and chromium (Cr), deposited by physical vapor deposition, or transition metal alloys, such as TiN and TaN, deposited by physical vapor deposition.

[0026] 5, the insulating oxide-based film 504 may be patterned to form a diffusion barrier patch 506 on the metal-filled TGV (i.e., the metal plating layer 124), thereby exposing the underlying metal film 502 in areas outside the diffusion barrier patch. This oxide patch can effectively function as a barrier to metal-O diffusion and reaction.

[0027] The optical micrographs of Figures 6A and 6B show that metal oxide particles are substantially absent in the presence of the SiO2 / TiW diffusion barrier patch 506, while the micrographs of Figures 2A and 2B show that copper oxide particles are prevalent on the Au surface in the absence of a passivation layer.

[0028] One or more additional metal coatings (e.g., Au and TiW) can be applied over the passivation layer implemented by any of the techniques described with reference to FIGS. 4 and 5. The additional metal coatings can be deposited by PVD and then patterned along with the passivation layer using standard photolithography and etching techniques. In the exemplary embodiment shown in FIG. 7, which corresponds to the embodiment according to FIG. 4, the additional metal coating over the underlying TiN film 402 comprises a TiW film 702 and an Au film 704. In the exemplary embodiment shown in FIG. 8, which corresponds to the embodiment according to FIG. 5, the additional metal coating disposed over the underlying TiW film 502 outside the SiO / TiW diffusion barrier patch 506 also comprises a TiW film 802 and an Au film 804. The additional metal coatings 702, 704, 802, 804 can be used to define conductive paths for die-to-die interconnects and bond pads, and / or seal rings for use in IC and MEMS packages.

[0029] In the described embodiment, metal nitride and oxide thin films, such as TiN and SiO2, are proposed to passivate the surface of metal-filled TGVs. These metal nitride and oxide thin films act as effective diffusion barriers, preventing non-reactive metal atoms in the metal-plated layer from diffusing through the metallized layer and encountering and reacting with O2. Therefore, a clean silicate glass substrate surface can be produced, free of undesirable metal oxides, such as microparticles and nanoparticles. Metal nitride and oxide thin films can be easily deposited on the surface of metallized TGV wafers using conventional deposition methods, such as CVD, PVD, and ALD, and can be easily patterned using standard photolithography and etching techniques.

[0030] This embodiment shows great potential for application in three-dimensional, two-and-a-half-dimensional, and two-dimensional (3D, 2.5D, and 2D, respectively) ICs and MEMS, which require silicate glass packaging to provide excellent electrical insulation, RF performance, optical transparency, and structural flexibility.

[0031] Although exemplary embodiments have been particularly described, it will be understood by those skilled in the art that various changes in form and detail may be made therein without departing from the scope of the embodiments encompassed by the appended claims. The present invention includes the following embodiments. [Aspect 1] 1. A method for forming a barrier film over a metallized through glass via (TGV) formed in a glass substrate, comprising: forming a metal nitride film on the metal plating layer of the metallized TGV using atomic layer deposition (ALD); and forming a conductive metallization layer over the metal nitride film; wherein the conductive metallization layer is electrically coupled to the metal nitride film. [Aspect 2] 2. The method of claim 1, further comprising preparing the conductive metal nitride film, the conductive metal nitride film comprising titanium nitride (TiN). Aspect 3 2. The method of claim 1, further comprising electrically coupling the outer metallization layer and the conductive metal nitride film. Aspect 4 2. The method of claim 1, further comprising depositing one or more conductive coatings on the conductive metal nitride film. Aspect 5 5. The method of claim 4, wherein the one or more conductive coatings contain one or both of TiW and Au. Aspect 6 1. A method for forming a barrier film on a metallized through glass via (TGV) formed in a glass substrate, comprising: Using physical vapor deposition (PVD), (i) a metal film is formed on the metal plating layer of the metallized TGV, and (ii) a metal film is formed on at least a portion of the glass surrounding the TGV. forming an electrical insulating film on the metal film by chemical vapor deposition (CVD), the electrical insulating film completely overlapping the metal plating layer and partially overlapping the metal film; forming a conductive metallization layer overlying the insulating film and the metal film by using a PVD process, the conductive metallization layer being electrically coupled to the metal film; A method comprising: Aspect 7 7. The method of claim 6, further comprising formulating the conductive metal film to contain titanium tungsten (TiW). Aspect 8 7. The method of claim 6, wherein silicon dioxide (SiO 2 3. The method of claim 1, further comprising formulating the insulating film containing: Aspect 9 7. The method of claim 6, further comprising patterning the insulating film to form a diffusion barrier patch covering at least an area of ​​the conductive metal film that overlaps the TGV. Aspect 10 10. The method of claim 9, further comprising extending the insulating film so that the diffusion barrier patch covers at least a portion of the glass surrounding the TGV. Aspect 11 7. The method of claim 6, further comprising electrically coupling the outer metallization layer and the conductive metal film. Aspect 12 7. The method of claim 6, further comprising depositing one or more conductive coatings on the conductive metal nitride film. Aspect 13 13. The method of claim 12, wherein the one or more conductive coatings contain one or both of TiW and Au. Aspect 14 A through glass via (TGV) formed in a glass substrate, a metal plating layer formed in the TGV, the TGV having a three-dimensional (3D) topology via the glass substrate, the metal plating layer covering the TGV to conform to the 3D topology; a barrier layer disposed on the metal plating layer; a conductive metallization layer disposed on the barrier layer, the conductive metallization layer being electrically coupled to the metal plating layer through the barrier layer; 1. A through glass via comprising: Aspect 15 15. A TGV according to embodiment 14, comprising: The TGV, wherein the barrier layer further comprises a metal nitride film disposed on the metal plating layer, the metal nitride film being electrically coupled to the conductive metallization layer. Aspect 16 16. A TGV according to embodiment 15, comprising: The TGV, wherein the metal nitride film is titanium nitride (TiN). Aspect 17 15. A TGV according to embodiment 14, comprising: The barrier layer is (i) a metal film disposed on the metal plating layer and on at least a portion of the glass surrounding the TGV; (ii) an electrically insulating film disposed on the metal film; wherein the electrically insulating film completely overlaps the metal plating layer and partially overlaps the metal film, and the metal film is electrically coupled to the conductive metallization layer. Aspect 18 18. A TGV according to embodiment 17, comprising: The metal film is titanium tungsten (TiW), and the electrical insulating film is silicon dioxide (SiO 2 ) TGV. Aspect 19 15. A TGV according to embodiment 14, comprising: The TGV further comprising one or more conductive coatings on said conductive metallization layer. Aspect 20 20. A TGV according to embodiment 19, comprising: The one or more conductive coatings include one or both of TiW and Au.

Claims

1. 1. A method for forming a barrier film over a metallized through glass via (TGV) formed in a glass substrate, comprising: forming a metal nitride film on the metal plating layer of the metallized TGV using atomic layer deposition (ALD); and forming a conductive metallization layer over the metal nitride film; wherein the conductive metallization layer is electrically coupled to the metal nitride film.

2. 10. The method of claim 1, further comprising preparing the metal nitride film, the metal nitride film comprising titanium nitride (TiN).

3. 2. The method of claim 1, further comprising electrically coupling the conductive metallization layer to the metal nitride film.

4. The method of claim 1 further comprising depositing one or more conductive coatings on the metal nitride film.

5. The method of claim 4 , wherein the one or more conductive coatings include one or both of TiW and Au.

6. 1. A method for forming a barrier film on a metallized through glass via (TGV) formed in a glass substrate, comprising: using physical vapor deposition (PVD) to (i) form a metal film on the metal plating layer of the metallized TGV, and (ii) form a metal film on at least a portion of the glass surrounding the TGV; forming an electrical insulating film on the metal film by chemical vapor deposition (CVD), the electrical insulating film completely overlapping the metal plating layer and partially overlapping the metal film; forming a conductive metallization layer overlying the insulating film and the metal film by using a PVD process, the conductive metallization layer being electrically coupled to the metal film; A method comprising:

7. 7. The method of claim 6, further comprising formulating the metal film containing titanium tungsten (TiW).

8. 7. The method of claim 6, wherein silicon dioxide (SiO ２ 3. The method of claim 1, further comprising formulating the insulating film containing:

9. 7. The method of claim 6, further comprising patterning the insulating film to form a diffusion barrier patch covering at least an area of ​​the metal film that overlaps the TGV.

10. 10. The method of claim 9, further comprising extending the insulating film so that the diffusion barrier patch covers at least a portion of the glass surrounding the TGV.

11. 7. The method of claim 6, further comprising the step of electrically coupling the conductive metallization layer and the metal film.

12. The method of claim 6 further comprising depositing one or more conductive coatings on the metal film.

13. 13. The method of claim 12, wherein the one or more conductive coatings include one or both of TiW and Au.

14. A through glass via (TGV) formed in a glass substrate, comprising: a metal plating layer formed in the TGV, the TGV having a three-dimensional (3D) topology via the glass substrate, the metal plating layer covering the TGV to conform to the 3D topology; a barrier layer disposed on the metal plating layer by atomic layer deposition (ALD); a conductive metallization layer disposed on the barrier layer, the conductive metallization layer being electrically coupled to the metal plating layer through the barrier layer; 1. A through glass via comprising:

15. 15. The TGV of claim 14, The TGV, wherein the barrier layer further comprises a metal nitride film disposed on the metal plating layer, the metal nitride film being electrically coupled to the conductive metallization layer.

16. 16. The TGV of claim 15, TGV, wherein the metal nitride film is titanium nitride (TiN).

17. 15. The TGV of claim 14, The barrier layer is (i) a metal film disposed on the metal plating layer and on at least a portion of the glass surrounding the TGV; (ii) an electrically insulating film disposed on the metal film; wherein the electrically insulating film completely overlaps the metal plating layer and partially overlaps the metal film, and the metal film is electrically coupled to the conductive metallization layer.

18. 18. The TGV of claim 17, The metal film is titanium tungsten (TiW), and the electrical insulating film is silicon dioxide (SiO ２ ) TGV.

19. 15. The TGV of claim 14, The TGV further comprising one or more conductive coatings over said conductive metallization layer.

20. 20. The TGV of claim 19, The one or more conductive coatings include one or both of TiW and Au.

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