Power Conversion Device

Abstract

To provide a power conversion device capable of reducing resonance between parallel-connected power modules even when a switching timing deviates between the power modules.SOLUTION: A power conversion device comprises: a power converter that includes a switch element group having a main circuit in which a plurality of power modules are connected in parallel; a control unit that controls the drive of the plurality of power modules; and a first capacitor connected between a power supply and the power converter. The power conversion device comprises a second capacitor connected in parallel with an electrical path connecting between the plurality of the power modules in the main circuit.SELECTED DRAWING: Figure 6A

Description

[Technical Field]

[0001] The present application relates to a power conversion device. [Background technology]

[0002] In recent years, power conversion devices for electric powertrains of hybrid vehicles, electric vehicles, and the like have been configured with power modules incorporating semiconductor elements such as IGBTs and MOSFETs, and power capacity has been increased by connecting multiple power modules in parallel and switching them simultaneously.

[0003] In this type of power conversion device, differences in characteristics between the power modules due to differences in the characteristics of the semiconductor elements built into multiple power modules connected in parallel, and variations in inductance between the main circuit and control circuit, can cause the timing of the switching operations of the power modules to differ.

[0004] Differences in switching timing can cause current imbalances, resulting in current concentration in the power module that was switched on first, increasing losses and potentially destroying that power module.

[0005] To address this issue, there are known means for suppressing the deviation in switching timing between power modules. For example, the following power conversion device structure is used: especially A method has been proposed for reducing the switching timing discrepancy between power modules by installing a power module with a low gate threshold voltage and fast switching timing characteristics in a module located in a position where the impedance of the gate wiring is large (see, for example, Patent Document 1).

[0006] Furthermore, a method has been proposed in which, even if there is variation in the characteristics of multiple semiconductor elements, the relationship between the characteristics of the semiconductor elements and the gate drive voltage is used as map information, and a variable gate drive voltage can be applied so that each semiconductor element exhibits the desired characteristics (see, for example, Patent Document 2). [Prior art documents] [Patent documents]

[0007] [Patent Document 1] Japanese Patent Publication No. 2020-156304 [Patent Document 2] Japanese Patent Application Publication No. 2019-4558 Summary of the Invention [Problem to be solved by the invention]

[0008] The method disclosed in Patent Document 1 can reduce the switching timing discrepancy. However, it is necessary to select and mount the power modules with characteristics that align the switching timing between the power modules, which complicates the manufacturing process of the power conversion device, reduces yield, and increases costs.

[0009] The method disclosed in Patent Document 2 can reduce the switching timing deviation, similar to the method in Patent Document 1. However, implementing the proposed method creates problems such as the gate drive circuit becoming more complex, increasing costs and making the design more difficult.

[0010] Furthermore, the inventors discovered that when the switching timing differs between power modules connected in parallel, a voltage difference occurs between each power module, causing resonance between the power modules due to the inductance between the power modules and the parasitic capacitance of the semiconductor elements in the power modules. The voltage amplitude caused by this resonance is superimposed on the surge generated in the drain-source voltage, increasing the voltage applied between the drain and source and potentially destroying the power module. This is a problem that becomes particularly noticeable when switching is performed at a high di / dt to reduce loss.

[0011] To avoid this, it is generally necessary to select high-voltage elements that have high resistance when conducting and large losses, or to design them to tolerate large losses by using low-di / dt, low-speed drive rather than high-di / dt, high-speed drive.When losses become large, it is necessary to use large, costly semiconductor elements or expensive, high-performance elements to tolerate this.

[0012] The present application discloses a technique for solving the above-described problems, and aims to provide a power conversion device that can reduce resonance between power modules caused by a switching timing discrepancy using a simple configuration. [Means for solving the problem]

[0013] The power conversion device disclosed in the present application includes a power converter including a group of switching elements having a main circuit in which a plurality of power modules are connected in parallel, a control circuit for controlling the driving of the plurality of power modules, and Department, Electricity a first capacitor connected between the source and the power converter; , and the above A power conversion device including a second capacitor connected in parallel to an electrical path connecting the plurality of power modules in the main circuit. In the power conversion device not including the second capacitor, a main circuit in which the plurality of power modules are connected in parallel has a resonance frequency f0, while in the power conversion device including the second capacitor, a main circuit in which the plurality of power modules are connected in parallel has a first resonance frequency f1 that is lower than the resonance frequency f0 and a second resonance frequency f2 that is higher than the resonance frequency f0, and an impedance Z1 of the resonance path at the first resonance frequency f1 and an impedance Z2 of the resonance path at the second resonance frequency are larger than an impedance Z0 of the resonance path at the resonance frequency f0. It is something. [Effects of the Invention]

[0014] According to the power conversion device disclosed in the present application, a second capacitor is provided which is connected in parallel to the electrical path connecting the plurality of power modules in the main circuit, and therefore it is possible to reduce resonance between the power modules which occurs as a result of a deviation in switching timing. [Brief explanation of the drawings]

[0015] [Figure 1] 1 is a diagram showing a schematic configuration of a power conversion device according to a first embodiment. [Figure 2] 2 is a diagram showing an example of a circuit configuration of a semiconductor switching element group of the power conversion device according to the first embodiment; FIG. [Figure 3] FIG. 3 is a diagram showing a circuit configuration of a comparative example of the power conversion device according to the first embodiment. [Figure 4A] 10A and 10B are diagrams for explaining resonance between power modules in a power conversion device of a comparative example. [Figure 4B] 10A and 10B are diagrams for explaining resonance between power modules in a power conversion device of a comparative example. [Figure 4C] 10A and 10B are diagrams for explaining resonance between power modules in a power conversion device of a comparative example. [Figure 4D] 10A and 10B are diagrams for explaining resonance between power modules in a power conversion device of a comparative example. [Figure 4E] 10A and 10B are diagrams for explaining resonance between power modules in a power conversion device of a comparative example. [Figure 4F] 10A and 10B are diagrams for explaining resonance between power modules in a power conversion device of a comparative example. [Figure 5] FIG. 10 is another diagram for explaining resonance between power modules in the power conversion device of the comparative example, showing transitions in drain-source voltage. [Figure 6A] 1 is a diagram illustrating an example of a circuit configuration of a power conversion device according to a first embodiment. [Figure 6B] FIG. 6A shows a resonance path in mode E. [Figure 7] 5 is a diagram comparing the resonant states of the power conversion device according to the first embodiment and a comparative example. FIG. [Figure 8] FIG. 4 is a diagram comparing the resonant voltages of the power conversion device according to the first embodiment and a comparative example. [Figure 9] FIG. 4 is a diagram comparing the resonance amplitudes of the power conversion device according to the first embodiment and a comparative example. [Figure 10] FIG. 4 is a diagram comparing the drain-source voltages of the power conversion device according to the first embodiment and a comparative example. [Figure 11] FIG. 4 is a diagram illustrating another example of the circuit configuration of the power conversion device according to the first embodiment. [Figure 12]10 is a diagram in which the resonant voltage is resolved into each resonant frequency component in the power conversion device according to the second embodiment. FIG. [Figure 13A] FIG. 10 is a top view showing a partial structure of a power conversion device according to a third embodiment. [Figure 13B] FIG. 13B is a side view seen from the direction AA in FIG. 13A. [Figure 14A] FIG. 10 is a top view showing a partial structure of another power converter according to the third embodiment, with a substrate seen through. [Figure 14B] FIG. 14B is a side view seen from the direction BB in FIG. 14A. [Figure 14C] FIG. 10 is a top view showing a partial structure of another power converter according to the third embodiment, without showing the substrate. [Figure 15] FIG. 2 is a diagram illustrating an example of the hardware configuration of a control unit according to the first to third embodiments. DETAILED DESCRIPTION OF THE INVENTION

[0016] Hereinafter, an embodiment of a power conversion device disclosed in the present application will be described with reference to the drawings. The power conversion device according to the present embodiment relates to an inverter or converter in the field of power electronics. Note that in each drawing, the same reference numerals indicate the same or corresponding parts.

[0017] Embodiment 1 The power conversion device according to the first embodiment will be described below with reference to the drawings. <Outline of power conversion device configuration> 1 is a diagram showing a schematic configuration of a power conversion device according to embodiment 1. The power conversion device according to embodiment 1 is configured with, for example, an inverter as a power converter 50, a DC power supply 1 is connected to the input side of the power converter 50, and a motor 9 as a load is connected to the output side.

[0018] The DC power supply 1 that outputs a DC voltage is, for example, a battery. When this power conversion device is applied to an electric vehicle or a hybrid vehicle, a typical example of the DC power supply is a storage battery made of a secondary battery such as a nickel-metal hydride or lithium ion battery, and its voltage is at least 100V or more.

[0019] The input stage of power converter 50 is equipped with smoothing capacitor 2 for removing voltage ripple and noise, and power converter 50 is a three-phase inverter equipped with semiconductor switching elements 3 to 8. The inverter outputs the output voltage of smoothing capacitor 2 as three-phase AC to three-phase output terminals Vu, Vv, and Vw. The three-phase output terminals of the inverter are connected to motor 9, which may be a generator or an electric motor, to supply three-phase AC.

[0020] Control unit 10 controls the on / off of each of semiconductor switching element groups 3 to 8 via control lines 32a to 32f, with a predetermined dead time sandwiched between them. Specifically, control unit 10 includes gate driver circuit 11, and semiconductor switching element group 3 performs a switching operation in response to a control signal output from control unit 10 via control line 32a, semiconductor switching element group 4 in response to a control signal output from control unit 10 via control line 32b, semiconductor switching element group 5 in response to a control signal output from control unit 10 via control line 32c, semiconductor switching element group 6 in response to a control signal output from control unit 10 via control line 32d, semiconductor switching element group 7 in response to a control signal output from control unit 10 via control line 32e, and semiconductor switching element group 8 in response to a control signal output from control unit 10 via control line 32f.

[0021] To acquire the input voltage of the inverter, a voltage sensor circuit (SV1) 20 is installed in parallel with the smoothing capacitor 2 at the inverter input stage, and the control unit 10 acquires input voltage information via a signal line 31a. In addition, current sensor circuits (SC1-3) 21a-21c are installed between the three-phase output terminals Vu, Vv, Vw of the inverter and the motor 9, and detect the values ​​of currents Iu, Iv, Iw of each phase. The control unit 10 acquires the current values ​​of each phase via signal lines 31b-31d.

[0022] The motor 9 is provided with a rotation angle sensor (Sns) 30 which detects a rotation angle θm of the motor 9, and the detected rotation angle θm is input to the control unit 10 via a signal line 31f. In addition, a torque command value Trq* and a DC voltage command value V2* of the motor 9 are input to the control unit 10 from the outside via signal lines 42a and 42b, respectively.

[0023] In the power conversion device according to the first embodiment, the semiconductor switching elements of the power module used in the inverter are MOSFETs (Metal Oxide Semiconductor Field Effect Transistors), but this is not limited thereto and may be, for example, IGBTs (Insulated Gate Bipolar Transistors) and Diodes (Diodes).

[0024] FIG. 2 is a diagram showing in detail the structure of the semiconductor switching element group of the power conversion device according to the first embodiment, and in FIG. 2, the structure of semiconductor switching element group 3 is shown as an example. The semiconductor switching element group 3 is composed of multiple power modules 3a and 3b, and power module 3a and power module 3b are connected in parallel. The drain and source electrodes of the semiconductor switching elements of each power module 3a and 3b are connected, respectively, and a gate driver circuit 11 included in a control unit 10 is connected to each power module 3a and 3b via gate resistors 3Ra and 3Rb. The side including power module 3a is referred to as phase A, and the side including power module 3b is referred to as phase B. The other semiconductor switching element groups 4 to 8 also have a structure in which multiple power modules are connected in parallel.

[0025] <Resonance between power modules> Next, we will explain the phenomenon of resonance between power modules, which was discovered by the inventors. In other words, when the switching timing differs between power modules connected in parallel, a voltage difference occurs between the power modules, and resonance occurs between the power modules due to the inductance between the power modules and the parasitic capacitance of the semiconductor elements in the power modules.

[0026] FIG. 3 shows the circuit configuration of one leg of the inverter, which is the power converter 50 of FIG. 1, to which the semiconductor switching element groups 3 and 4 are connected. This is a comparative example of the circuit configuration according to the first embodiment. In FIG. 3, the side of each power module 3a and 4a is phase A, and the side of each power module 3b and 4b is phase B. The capacitors shown in the diagram for each power module 3a, 3b, 4a, and 4b represent the parasitic capacitances present between the drain and source, between the drain and gate, and between the gate and source, respectively. The parasitic inductances in the circuit are indicated by the symbols 3La1, 3Lb1, 3Lga, 3Lgb, 3Lsa, 3Lsb, 3La2, 3Lb2, 4La1, 4Lb1, 4Lga, 4Lgb, 4Lsa, 4Lsb, 4La2, and 4Lb2.

[0027] An example of the mechanism by which resonance occurs between the power modules of the semiconductor switching element group 3 when the semiconductor switching element group 4 on the lower arm side is turned on will be described below with reference to Figures 4A to 4F. Note that the current flowing in the circuit is indicated by arrows.

[0028] (1) Mode A 4A shows the state of Mode A, in which both semiconductor switching element groups 3 and 4 are in the off state and current is flowing in from the motor 9 on the output side of the inverter. At this time, the current flowing in from the motor 9 flows from the source to the drain via the internal diodes of the power modules 3a and 3b of the semiconductor switching element group 3.

[0029] (2) Mode B FIG. 4B shows the state of mode B, in which the semiconductor switching element group 4 is turned on. Here, power module 4b turns on later than power module 4a. As a result, the drain current of power module 4a is larger than that of power module 4b. On the other hand, the current flowing through the internal diode of power module 3a is smaller than that of power module 3b. As a result, the current of power module 3a becomes zero before that of power module 3b, and recovery occurs.

[0030] (3) Mode C Fig. 4C shows the state of mode C. Because recovery occurs in the internal diode of power module 3a, a recovery current flows to the A-phase side. At this time, recovery does not occur in power module 3b on the B-phase side. The internal diode of power module 3b is in a conductive state.

[0031] (4) Mode D Figure 4D shows the state of mode D. After the internal diode of power module 3a recovers, the parasitic capacitance between the drain and source of power module 3a is charged, and the drain-source voltage Vds_3a rises. Meanwhile, the internal diode of power module 3b is in a conductive state, so the drain-source voltage Vds_3b is approximately 0 V. At this time, Vds_3a > Vds_3b, and a potential difference occurs between the A-phase power module 3a and the B-phase power module 3b.

[0032] (5) Mode E Figure 4E shows the state of mode E. After the drain-source voltage Vds_3b of power module 3b reaches nearly 0V, recovery is completed, the internal diode of power module 3b cannot conduct, and current flows to the parasitic capacitance. That is, in the semiconductor switch group 3, the drain-source voltage Vds_3a of phase A increases, creating a potential difference with phase B, so current flows from phase A to phase B, charging the parasitic capacitance between the drain and source of power module 3b. After that, resonance occurs between the parasitic capacitances of each power module 3a and 3b. Here, the turn-on current flowing through the semiconductor switching element group 4 is omitted for simplicity.

[0033] (6) Mode F FIG. 4F shows the state of mode F. When the recovery current of power modules 3a and 3b decreases, surge voltages are generated by parasitic inductances 3La1, 3La2, 4La1, and 4La2 between power module 3a and smoothing capacitor 2, and by parasitic inductances 3Lb1, 3Lb2, 4Lb1, and 4Lb2 between power module 3b and smoothing capacitor 2, respectively, and the parasitic capacitance of each power module 3a and 3b is charged to a voltage higher than the voltage of smoothing capacitor 2. At this time, the surge voltage due to the parasitic inductance and the charging voltage due to the resonance between the power modules described in mode E are superimposed. Here again, the turn-on current flowing through semiconductor switching element group 4 is omitted for simplicity.

[0034] The above describes the phenomenon that occurs when a mismatch occurs in the switching of the power modules 4a and 4b of the semiconductor switching element group 4 in a configuration including a semiconductor switching element group 3 in which power modules 3a and 3b are connected in parallel, and a semiconductor switching element group 4 in which power modules 4a and 4b are connected in parallel. In this example, variations in recovery timing during switching cause a potential difference to occur between the power modules 3a and 3b of the semiconductor switching element group 3 on the non-switching side, resulting in a resonant current flow. This generates a resonant voltage between the power modules 3a and 3b, which is superimposed on a surge voltage due to the parasitic inductance between the smoothing capacitor 2 and each power module 3a and 3b, increasing the drain-source voltage of the power modules 3a and 3b.

[0035] FIG. 5 shows the drain-source voltage waveforms of each power module 3a, 3b and the drain-source resonant voltage waveforms of the power modules 3a, 3b when the power conversion device of the comparative example operates in modes A to F shown in FIGS. 4A to 4F. The difference in recovery timing generates a potential difference in Vds of the semiconductor switching element group 3, causing resonance between the power modules 3a, 3b. It can be seen that the charging voltage (resonant voltage) caused by the current flowing at this time is superimposed on the peak voltage of the surge voltage, increasing the voltage applied between the drain and source, which could result in damage to the power module. The current caused by the resonance increases the charging voltage of the parasitic capacitance between the drain and source of power module 3b, so the drain-source voltage of power module 3b is more affected by the superimposed resonant voltage than power module 3a.

[0036] In the above, recovery due to a shift in the switching of semiconductor switching element group 4 was explained in terms of its effect on semiconductor switching element group 3 that is not switching, but the shift in recovery timing due to a shift in switching timing is merely one example. Even if the switching timing is synchronized, if the parasitic inductance components of the main circuits of each semiconductor switching element group are not synchronized, the currents at turn-on within the semiconductor switching element group will be different, causing a shift in recovery timing. Here, the parasitic inductance components of the main circuits of each semiconductor switching element group are parasitic inductances 3La1, 3La2, 3Lb1, and 3Lb2 for semiconductor switching element group 3, and parasitic inductances 4La1, 4La2, 4Lb1, and 4Lb2 for semiconductor switching element group 4.

[0037] <Suppression of resonance voltage between power modules> A solution to the above problem will be described for the power conversion device according to the present embodiment 1. That is, in order to suppress the increase in surge voltage described with reference to Figs. 4A to 4F, it is necessary to suppress the resonant voltage between the power modules that occurs in operation mode E.

[0038] FIG. 6A is a diagram showing an example of the circuit configuration of the power conversion device according to the first embodiment, illustrating the circuit configuration of one leg of the inverter of FIG. 1 to which semiconductor switching element groups 3 and 4 are connected. The configuration differs from the comparative example of FIG. 4 in that, in the resonant path shown in FIG. 4E, a capacitor 100C is inserted between phases A and B of the main circuit in which the power modules are connected in parallel. In FIG. 6A, the capacitor 100C is inserted between the drains of the power modules 3a and 3b of the upper arm. The other configurations are similar to those shown in the comparative example of FIG. 4, and therefore description thereof will be omitted. Furthermore, FIG. 6B is a diagram illustrating the resonant path in FIG. 6A in which a resonant voltage is generated between the power modules in mode E.

[0039] FIG. 7 shows the resonance states of the comparative example, which has the circuit configuration of FIG. 4, and the first embodiment, which has the circuit configuration of FIG. 6. In the figure, the horizontal axis represents frequency, and the vertical axis represents the impedance of the resonance path. Resonance in the comparative example occurs at an LC resonance frequency f0 formed between power modules 3a and 3b. Inserting capacitor 100C as shown in FIG. 6A to suppress this resonance results in a first resonance frequency f1 lower than the LC resonance frequency f0 of the comparative example and a second resonance frequency f2 higher than the LC resonance frequency f0 of the comparative example. This allows the resonance voltage generated in response to the impedance Z0 at the LC resonance frequency f0 to be distributed into a resonance voltage due to the impedance Z1 at the first resonance frequency f1 and the impedance Z2 at the second resonance frequency f2. Here, the resonance path refers to a closed circuit formed by the parasitic capacitance of each power module and the drain and source lines connecting the power modules. That is, in the comparative example, it is the closed circuit shown in FIG. 4E, and in the first embodiment shown in FIG. 6B, it is a closed circuit including a circuit passing through capacitor 100C in the closed circuit of the comparative example.

[0040] FIG. 8 shows the drain-source resonant voltage waveform (dashed line) of the power modules 3a and 3b in the comparative example shown in FIG. 5 superimposed with the resonant voltage waveform (solid line) in the first embodiment in which the capacitor 100C is inserted in the resonant circuit. FIG. 9 shows the results of fast Fourier transform processing of the resonant voltage waveform, comparing the comparative example (dashed line) with the first embodiment (solid line). It can be seen from FIG. 8 that inserting the capacitor 100C reduces the resonant voltage at the timing of the drain-source voltage peak. This is because, as shown in FIG. 9, the LC resonant frequency f0 is distributed among multiple resonant frequencies f1 and f2, reducing the amplitude of the resonant voltage.

[0041] 10 is a diagram showing the drain-source voltage waveform (dashed line) of power module 3b in the comparative example shown in FIG. 5 superimposed with the drain-source voltage waveform (solid line) of power module 3b in the first embodiment, in which capacitor 100C is inserted. As shown in FIG. 10, it is possible to reduce the peak value of the drain-source voltage. If the peak value of the drain-source voltage can be reduced in this way, it is possible to drive the switching element with low loss and high-speed switching, and it becomes possible to use a small, inexpensive element.

[0042] As described above, according to the first embodiment, in a power conversion device including a switching element group in which multiple power modules are connected in parallel, a resonance suppression circuit is configured with a simple structure by connecting a capacitor in parallel with the path connecting the multiple power modules. This makes it possible to reduce the amplitude of the resonant voltage between the power modules, which occurs due to a switching timing error. It also makes it possible to reduce the peak value of the drain-source voltage of the power modules. This allows the switching elements to be driven with low loss and high switching speed (high di / dt), making it possible to provide a power conversion device that can use small, inexpensive elements. When the resonance between the power modules is superimposed on the surge voltage generated by the switching of the power modules, there is a risk that the drain-source breakdown voltage of the power modules will be exceeded. However, according to the present embodiment, the amplitude of the resonant voltage is reduced and can be kept within the drain-source breakdown voltage.

[0043] 6A, capacitor 100C is inserted between the drains of power modules 3a and 3b, but this is not limiting, and the same effect can be obtained, for example, by inserting capacitor 100C between the sources of power modules 3a and 3b on the upper arm or between the drains of power modules 4a and 4b on the lower arm. That is, capacitor 100C can be connected between the first electrodes or second electrodes of semiconductor switching elements that constitute power modules connected in parallel.

[0044] Fig. 11 is a diagram showing another example of the circuit configuration of the power conversion device according to the first embodiment. In Fig. 11, a capacitor 100C is inserted between the sources of the power modules 3a and 3b in the upper arm. The other configurations are the same as those shown in Fig. 6A, and therefore description thereof will be omitted. In Fig. 11, the resonant path includes gate resistors 3Rb and 3Ra, so that power is consumed by these resistors and the amplitude of the resonant voltage attenuates over time.

[0045] On the other hand, the drain-to-drain relationship between the upper arm shown in FIGS. 6A and 6B 、 and lower arm sauce If capacitor 100C is inserted between the drains of the upper arm and the source of the lower arm, the resonant current that was flowing through the gate resistor will now pass through capacitor 100C, thereby reducing the amount of attenuation of the resonant voltage due to the gate resistor. For this reason, inserting a capacitor between the drains of the upper arm and between the sources of the lower arm will more effectively suppress the resonant voltage. That is, in a power converter in which multiple power modules connected in parallel, like legs, are connected in series, capacitor 100C can be connected between the first electrodes or the second electrodes of the semiconductor switching elements on the side that is not connected to the adjacent switch element group.

[0046] In addition, in the power conversion device of the first embodiment in which the capacitor 100C is inserted, an example has been shown in which the first impedance Z1 at the first resonant frequency f1 and the second impedance Z2 at the second resonant frequency f2 are larger than the impedance Z0 at the LC resonant frequency f0 of the comparative example as shown in Fig. 7, but the present invention is not limited to this. For example, the same effect can be obtained even when the second impedance Z2 is smaller than the impedance Z0 of the comparative example.

[0047] However, as shown in FIG. 7, when both the first impedance Z1 and the second impedance Z2 are larger than the impedance Z0 of the comparative example, it is more effective because not only can the resonance be dispersed but also the resonance amplitude can be reduced by increasing the impedance.

[0048] Embodiment 2 The power conversion device according to the second embodiment will be described below with reference to the drawings. In the first embodiment, the relationship between the impedance Z0 at the LC resonant frequency f0 of the comparative example and the first impedance Z1 at the first resonant frequency f1 and the second impedance Z2 at the second resonant frequency f2 when the capacitor 100C is inserted has been described with reference to Fig. 7. In the second embodiment, the relationship between the first resonant frequency f1 and the second resonant frequency f2 when the capacitor 100C is inserted will be described. Note that the circuit configuration of the power conversion device according to the second embodiment is the same as that of the first embodiment, and therefore the description thereof will be omitted.

[0049] FIG. 12 shows the transition of the resonant voltage appearing in the drain-source voltage when the capacitor 100C shown in FIG. 8 is inserted into the main circuit of multiple power modules connected in parallel, and also shows the transition of the resonant voltage into components at each resonant frequency f1 and f2. As shown in FIG. 12, at the start of resonance, the waveform of each frequency component is at a negative peak phase, and the phase changes over time. The second resonant frequency f2 should be close to an even multiple of the first resonant frequency f1. That is, f2 ≈ 2n × f1 (n is a natural number). This relationship is preferable because when the resonant voltage at the first resonant frequency f1 reaches a positive peak, the resonant voltage at the second resonant frequency f2 reaches a negative peak, thereby canceling out the amplitude. The second resonant frequency f2 being close to an even multiple of the first resonant frequency f1 satisfies (2n - 0.5) × f1 ≦ f2 ≦ (2n + 0.5) × f1. For example, when n=1, 1.5×f1≦f2≦2.5×f2 is satisfied.

[0050] In the first embodiment, it is preferable that the first impedance Z1 and the second impedance Z2 are larger than the impedance Z0 of the comparative example, but in the second embodiment, there is no limitation to the impedance. The same effect can be achieved by setting the second resonant frequency f2 to a value close to an even multiple of the first resonant frequency f2. Furthermore, it is more effective to combine the first and second embodiments. The first resonant frequency f1 and the second resonant frequency f2 can be set by adjusting the capacitance of the capacitor 100C.

[0051] As described above, according to the second embodiment, the first resonant frequency f1 and the second resonant frequency f2 are distributed by the capacitors connected in parallel to the path connecting the multiple power modules, and the second resonant frequency f2 is set to a value close to an even multiple of the first resonant frequency f2, thereby achieving the same effect as the first embodiment.

[0052] The larger the potential difference, the more likely the resonance phenomenon caused by the potential difference between power modules occurs. Even if the deviation in switching timing and recovery timing can be suppressed, if the switching speed (dV / dt) is fast, even a slight deviation in timing will cause a potential difference. For this reason, the power conversion devices according to the first and second embodiments are more effective for elements that switch at high speed and are more likely to cause a potential difference. In other words, the wider the bandgap semiconductor the semiconductor switching element is, the more likely it is that resonance will occur, and the more likely it is that the effects of the first and second embodiments will be obtained. Wide bandgap semiconductors are semiconductors made of, for example, SiC (silicon carbide), GaN (gallium nitride), Ga2O3 (gallium oxide), C (diamond), etc.

[0053] Embodiment 3 The power conversion device according to the third embodiment will be described below with reference to the drawings. In the third embodiment, an implementation example of the power conversion devices according to the first and second embodiments will be described.

[0054] Example 1 FIG. 13A is a top view showing a partial structure of a power conversion device according to embodiment 3, and FIG. 13B is a side view seen from the A-A direction in FIG. 13A. In the figure, capacitor 100C is fixed to frame 113 with screws, springs, or the like. Terminal 110a of the main circuit of power module 3a and terminal 110b of the main circuit of power module 3b are connected to terminals 112a and 112b of capacitor 100C by screws or welding, respectively. Here, capacitor 100C is an example of a discrete capacitor that can handle a larger current than a chip capacitor.

[0055] In this example, since the parasitic inductance component connected in series to the capacitor 100C can be made small, the resonance amplitude is significantly reduced, and in addition, vibration durability can be ensured by fixing the capacitor 100C to the frame 113. Furthermore, the frame 113 can also fix the power modules 3a and 3b, which can also improve the vibration durability of the power modules 3a and 3b.

[0056] <Example 2> 14A is a top view showing a partial structure of another power conversion device according to embodiment 3, showing a see-through view of the substrate, a side view seen from the B-B direction in FIG. 14A, and FIG. 14C is a top view that, unlike FIG. 14A, does not show the substrate through. In the figure, a capacitor 100C is mounted on one surface of a substrate 114, and power modules 3a and 3b are arranged on the other surface of the substrate 114. All or part of one node of terminal 110a of the main circuit of power module 3a and terminal 110b of the main circuit of power module 3b are connected to the substrate 114 and are connected to capacitor 100C via conductors on the substrate 114.

[0057] Furthermore, control terminals 111a and 111b of power module 3a and control terminals 111c and 111d of power module 3b are connected to substrate 114, and are connected to a control unit 10 mounted on substrate 114. Furthermore, terminals 110a and 110b of the main circuit connected to substrate 114 may also serve as control terminals or terminals connected to a protection circuit or a state detection circuit. In embodiment 2, a single substrate 114 is used and terminals are used in combination, thereby achieving a compact and low-cost configuration.

[0058] Although the first and second embodiments are described using discrete capacitors, the present invention is not limited to this, and similar effects can be achieved by using chip capacitors.

[0059] As described above, according to the third embodiment, the same effects as those of the first and second embodiments can be achieved, and the power conversion devices according to the first and second embodiments can be realized with a simple and compact configuration.

[0060] The control unit 10 in the first to third embodiments includes a processor 1000 and a storage device 2000, as shown in FIG. 15, which illustrates an example of hardware. The storage device is not shown, but includes a volatile storage device such as a random access memory and a non-volatile auxiliary storage device such as a flash memory. Alternatively, a hard disk auxiliary storage device may be used instead of the flash memory. The processor 1000 executes a program input from the storage device 2000. In this case, the program is input to the processor 1000 from the auxiliary storage device via the volatile storage device. The processor 1000 may output data such as calculation results to the volatile storage device of the storage device 2000, or may store the data in the auxiliary storage device via the volatile storage device.

[0061] <Other embodiments> In the power conversion devices according to the above embodiments, an inverter has been described as an example of power converter 50, but this is not limiting and a converter may also be used. The power conversion devices according to the present embodiments are effective in addressing similar issues that arise in power converters including a configuration in which multiple power modules are connected in parallel.

[0062] In the power conversion device according to each embodiment, the number of chips in the power module is not shown, but the number of chips in the power module may be one or more. The same effect is achieved regardless of the number of chips.

[0063] In the power conversion device according to each embodiment, the number of parallel power modules has been described as an example of a two-parallel configuration, but this is not limited to this and any number of parallel power modules may be three, providing the same effect.

[0064] In the power conversion device according to each embodiment, one leg is taken as an example, and the upper arm and the lower arm are functionally distinguished from each other. However, this is not limiting, and a configuration in which upper and lower arm integrated power modules are connected in parallel can also be used, and the same effect can be achieved. For example, in a boost chopper circuit consisting of only one arm, the same effect can be achieved with respect to the resonance phenomenon that occurs when switching off.

[0065] Although the present application describes various exemplary embodiments and examples, the various features, aspects, and functions described in one or more embodiments are not limited to application to a particular embodiment, but may be applied to the embodiments alone or in various combinations. Therefore, countless variations not illustrated are conceivable within the scope of the technology disclosed in the present specification, including, for example, cases where at least one component is modified, added, or omitted, and cases where at least one component is extracted and combined with components of another embodiment.

[0066] Various aspects of the present disclosure are summarized below as appendices.

[0067] (Appendix 1) A power conversion device comprising: a power converter including a switch element group having a main circuit in which a plurality of power modules are connected in parallel; a control unit that controls driving of the plurality of power modules; and a first capacitor connected between a power source and the power converter, a power conversion device including a second capacitor connected in parallel to an electrical path connecting the plurality of power modules in the main circuit; (Appendix 2) Each of the plurality of power modules includes a semiconductor switching element having a first electrode and a second electrode, 2. The power conversion device according to claim 1, wherein the second capacitor is connected between first electrodes or second electrodes of semiconductor switching elements of a plurality of the power modules. (Appendix 3) The power converter has a plurality of switch element groups connected in series, 2. The power conversion device according to claim 1, wherein the second capacitor is connected in a main circuit of at least one of the switch element groups connected in series. (Appendix 4) Each of the plurality of power modules includes a semiconductor switching element having a first electrode and a second electrode, 4. The power conversion device according to claim 3, wherein the second capacitor is connected in a main circuit of at least one of the switch element groups connected in series, and between first electrodes or second electrodes of the semiconductor switching elements on a side not connected to an adjacent switch element group. (Appendix 5) With respect to a resonance frequency f0 in a main circuit in which a plurality of the power modules are connected in parallel in the power conversion device not including the second capacitor, a main circuit in which the plurality of power modules in the power conversion device including the second capacitor are connected in parallel has a first resonant frequency f1 lower than the resonant frequency f0 and a second resonant frequency f2 higher than the resonant frequency f0; A power conversion device described in any one of appendices 1 to 4, wherein the impedance Z1 of the resonant path at the first resonant frequency f1 and the impedance Z2 of the resonant path at the second resonant frequency are greater than the impedance Z0 of the resonant path at the resonant frequency f0. (Appendix 6) With respect to a resonance frequency f0 in a main circuit in which a plurality of the power modules are connected in parallel in the power conversion device not including the second capacitor, a main circuit in which the plurality of power modules in the power conversion device including the second capacitor are connected in parallel has a first resonant frequency f1 lower than the resonant frequency f0 and a second resonant frequency f2 higher than the resonant frequency f0; 6. The power conversion device according to any one of appendices 1 to 5, wherein (2n-0.5)×f1≦f2≦(2n+0.5)×f1 (n is a natural number) is satisfied. (Appendix 7) 7. The power conversion device according to any one of appendices 1 to 6, wherein the plurality of power modules include semiconductor switching elements, and the semiconductor switching elements are made of a wide bandgap semiconductor selected from the group consisting of silicon carbide, gallium nitride, gallium oxide, and diamond. [Explanation of symbols]

[0068] 1: DC power supply, 2: smoothing capacitor, 3-8: semiconductor switching element group, 3a, 3b, 4a, 4b: power module, 9: motor, 10: control unit, 11: gate driver circuit, 20: voltage sensor circuit (SV1), 21a-21c: current sensor circuit (SC1-3), 30: rotation angle sensor (Sns), 31a-31d, 31f: signal line, 32a-32f: control line, 42a, 42b: signal line, 50: power converter, 100C: capacitor, 110a, 110b: main circuit terminal, 111a-111d: control terminal, 112a, 112b: terminal, 113: frame, 114: board, 1000: processor, 2000: storage device

Claims

1. A power conversion device comprising: a power converter including a switch element group having a main circuit in which a plurality of power modules are connected in parallel; a control unit that controls driving of the plurality of power modules; a first capacitor connected between a power source and the power converter; and a second capacitor connected in parallel to an electrical path that connects the plurality of power modules in the main circuit, With respect to a resonance frequency f0 in a main circuit in which a plurality of the power modules are connected in parallel in the power conversion device not including the second capacitor, a main circuit in which the plurality of power modules in the power conversion device including the second capacitor are connected in parallel has a first resonant frequency f1 that is lower than the resonant frequency f0 and a second resonant frequency f2 that is higher than the resonant frequency f0; An electric power conversion device, wherein an impedance Z1 of the resonant path at the first resonant frequency f1 and an impedance Z2 of the resonant path at the second resonant frequency are greater than an impedance Z0 of the resonant path at the resonant frequency f0.

2. A power conversion device comprising: a power converter including a group of switch elements having a main circuit in which a plurality of power modules are connected in parallel; a control unit that controls the driving of the plurality of power modules; a first capacitor connected between a power source and the power converter; and a second capacitor connected in parallel to an electrical path connecting the plurality of power modules in the main circuit, With respect to a resonance frequency f0 in a main circuit in which a plurality of the power modules are connected in parallel in the power conversion device not including the second capacitor, a main circuit in which the plurality of power modules in the power conversion device including the second capacitor are connected in parallel has a first resonant frequency f1 that is lower than the resonant frequency f0 and a second resonant frequency f2 that is higher than the resonant frequency f0; A power conversion device that satisfies (2n-0.5) x f1 ≤ f2 ≤ (2n+0.5) x f1 (n is a natural number).

3. Each of the plurality of power modules includes a semiconductor switching element having a first electrode and a second electrode, 3. The power conversion device according to claim 1, wherein the second capacitor is connected between first electrodes or second electrodes of semiconductor switching elements of a plurality of the power modules.

4. The power converter has a plurality of switch element groups connected in series, 3. The power conversion device according to claim 1, wherein the second capacitor is connected in a main circuit of at least one of the groups of switch elements connected in series.

5. Each of the plurality of power modules includes a semiconductor switching element having a first electrode and a second electrode, 5. The power conversion device according to claim 4, wherein the second capacitor is connected in a main circuit of at least one of the switch element groups connected in series, and between first electrodes or second electrodes of the semiconductor switching elements on a side not connected to an adjacent switch element group.

6. 3. The power conversion device according to claim 1, wherein the plurality of power modules include semiconductor switching elements, and the semiconductor switching elements are made of a wide bandgap semiconductor selected from the group consisting of silicon carbide, gallium nitride, gallium oxide, and diamond.

7. A power conversion device as described in claim 1 or 2, wherein the plurality of power modules are arranged on one side of the substrate and the second capacitor is arranged on the other side.

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