Wafer processing method and system

By aligning laser processing areas with the target thickness and forming multiple layers to collect debris, the method and system effectively prevent grinding debris from contaminating individual chips during wafer cleaving, ensuring cleaner chip surfaces.

JP7766244B2Active Publication Date: 2025-11-10TOKYO SEIMITSU CO LTD
View PDF 6 Cites 0 Cited by

Patent Information

Application Number
JP2024135228
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Filing Date
2024-08-14
Publication Date
2025-11-10
Estimated Expiration
2040-07-28

AI Technical Summary

Technical Problem

Grinding debris from wafer cleaving contaminates the surfaces of individual chips during the wafer processing, which is a challenge in existing laser dicing technologies.

Method used

A method and system that involves setting the position of laser processing areas within the wafer to align with the target thickness, forming multiple layers of laser processing regions, and adjusting the laser processing conditions to ensure that the upper regions of these areas overlap with the target thickness, thereby collecting grinding debris and preventing it from penetrating into the gaps between chips.

Benefits of technology

Prevents grinding debris from entering the gaps between chips, maintaining chip cleanliness and reducing contamination.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure 0007766244000001
    Figure 0007766244000001
  • Figure 0007766244000002
    Figure 0007766244000002
  • Figure 0007766244000003
    Figure 0007766244000003
Patent Text Reader

Abstract

To provide a wafer processing method and system that can suppress the intrusion of grinding debris into gaps that form between chips after a wafer is cut.SOLUTION: A wafer processing method includes a laser processing area formation step of forming a laser processing area that collects grinding debris generated by grinding the back surface of a wafer (W) along a planned division line (CL) of the wafer such that the area above the void within the laser processing area (R1, R2) including the void and the area above the void is located at the target thickness (Ht) of the wafer.SELECTED DRAWING: Figure 1
Need to check novelty before this filing date? Find Prior Art

Description

[Technical Field]

[0001] The present invention relates to a wafer processing method and system, and more particularly to a wafer processing method and system for dividing a wafer starting from a laser processing region formed inside the wafer. [Background technology]

[0002] Conventionally, there has been known a laser processing device (also called a laser dicing device) that irradiates a laser beam along a division line by focusing the laser beam inside a wafer such as silicon, thereby forming a laser processing area that serves as a starting point for cutting inside the wafer along the division line. The wafer with the laser processing area formed therein is then divided along the division line by a cutting process such as expanding or breaking, and divided into individual chips (see, for example, Patent Document 1). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Publication No. 2020-057743 Summary of the Invention [Problem to be solved by the invention]

[0004] In the wafer cleaving process, the load (pressure) applied to the wafer when the backside of the wafer is ground using a grinder is used to propagate a crack from the laser-processed area and cleave the wafer.

[0005] Fig. 8 is a partial cross-sectional view showing the wafer cleaving process, in which Fig. 8(a) shows the wafer W before grinding, Fig. 8(b) shows the state in which a crack has developed inside the wafer W due to the load during grinding, and Fig. 8(c) shows the state in which the wafer W has been cleaved along the crack. Fig. 9 is a partial enlarged view of region XI in Fig. 8(c).

[0006] First, as shown in FIG. 8(a), a backgrind tape (not shown in FIG. 8; BG in FIG. 10) is attached to the surface Wa of the wafer W, on which devices such as electronic circuits are formed, and the wafer W is then placed with the surface Wa facing downwards on a suction stage (not shown) and held by suction. Laser processing regions R1 and R2 are formed inside the wafer W by laser processing. The laser processing regions R1 and R2 are the starting points for cracks K inside the wafer W, and are formed in two stages at different positions in the depth direction (Z direction) of the wafer W. Note that although multiple laser processing regions R1 and R2 are formed along the planned dividing line of the wafer W, they are simply shown as two in FIG. 8.

[0007] Next, the back surface Wb of the wafer W is ground by a grinding machine 50. A grinding wheel 54 is attached to a rotary grinding machine 52 of the grinding machine 50, and the grinding wheel 54 is brought into contact with the back surface Wb of the wafer W and the rotary grinding machine 52 is rotated, thereby grinding the wafer W.

[0008] As grinding of the wafer W progresses, a load is applied to the back surface Wb of the wafer W via the grindstone 54, causing the crack K to propagate in the depth direction of the wafer W, as shown in Fig. 8(b). After the crack K reaches the front surface Wa and back surface Wb of the wafer W, the wafer W is cleaved along the planned division line, and the cleaved chips C1 and C2 are pushed apart, creating a minute gap Gap, as shown in Fig. 8(c).

[0009] As shown enlarged in FIG. 9, grinding chips (also called sludge) SL generated by grinding may penetrate into the gap Gap between the chips C1 and C2 and reach the surfaces of the chips C1 and C2 (see FIG. 10).

[0010] Fig. 10 is an image showing the surface of the backgrind tape after the chips have been picked up after cleaving. As shown in Fig. 10, grinding debris SL is attached to the surface of the backgrind tape BG in a roughly lattice pattern along the planned dividing lines of the wafer W. Such grinding debris SL can cause contamination of the devices formed on the surfaces of the chips C1 and C2.

[0011] The present invention has been made in consideration of the above circumstances, and aims to provide a wafer processing method and system that can prevent grinding debris from entering the gaps that occur between chips after the wafer is cleaved. [Means for solving the problem]

[0012] In order to solve the above problems, a wafer processing method according to a first aspect of the present invention comprises a laser processing step of forming a laser processing area along a planned dividing line of the wafer inside a substrate of a wafer having a device layer stacked on the front surface of the substrate, and a grinding step of grinding the back surface of the wafer to make the thickness of the wafer a target thickness and dividing the wafer into individual chips, wherein the laser processing step comprises a position setting step of setting the position of the laser processing area in the thickness direction of the wafer to the position of the target thickness, and a laser processing area forming step of forming the laser processing area at the position set in the position setting step by focusing laser light inside the wafer.

[0013] In the wafer processing method according to the second aspect of the present invention, in the laser processing area forming step of the first aspect, multiple layers of laser processing areas are formed in the thickness direction of the wafer, and in the position setting step, the laser processing area closest to the back surface of the multiple layers of laser processing areas is set to the position of the target thickness.

[0014] In the wafer processing method according to the third aspect of the present invention, in the position setting step of the first or second aspect, the position of the laser processing area is set so that the position of the target thickness overlaps with an area ranging from the back side to one-third of the laser processing area.

[0015] In the wafer processing method according to a fourth aspect of the present invention, in the position setting step of the first or second aspect, the position of the laser processing area is set so that the position of the target thickness overlaps an area ranging from the back side to one-third of the area of ​​the laser processing area excluding the void at the bottom end.

[0016] A wafer processing system according to a fifth aspect of the present invention includes a laser processing device that forms a laser processing area along a planned dividing line of the wafer inside a substrate of a wafer having a device layer stacked on the surface of the substrate, and a grinding device that grinds the back surface of the wafer to make the thickness of the wafer a target thickness and divides the wafer into individual chips, and the laser processing device includes a position setting unit that sets the position of the laser processing area in the thickness direction of the wafer to the position of the target thickness, and a laser processing unit that forms the laser processing area at the position set by the position setting unit by focusing laser light inside the wafer. [Effects of the Invention]

[0017] According to the present invention, by forming a laser processing area in accordance with the target thickness of the wafer, it is possible to prevent grinding debris from entering the gaps between chips after the wafer is cleaved. [Brief explanation of the drawings]

[0018] [Figure 1] Figure 1 is an image showing the processed cross section of a chip after the wafer is divided. [Figure 2] FIG. 2 is a block diagram showing the configuration of a laser processing device in a wafer processing system according to one embodiment of the present invention. [Figure 3] FIG. 3 is a block diagram showing the configuration of a grinding device in a wafer processing system according to one embodiment of the present invention. [Figure 4] FIG. 4 is a cross-sectional view showing the relationship between the laser processing area and the target thickness Ht. [Figure 5] FIG. 5 is an image showing the processed cross section of the chip. [Figure 6] FIG. 6 is an image showing the cross section of the chip after grinding. [Figure 7] FIG. 7 is an image showing the surface of the backgrind tape after the chips have been picked up after cleavage. [Figure 8] FIG. 8 is a partial cross-sectional view showing the wafer cleaving process. [Figure 9]FIG. 9 is a partial enlarged view of region XI in FIG. 8(c). [Figure 10] FIG. 10 is an image showing the surface of the backgrind tape after the chips have been picked up after cleavage. DETAILED DESCRIPTION OF THE INVENTION

[0019] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, preferred embodiments of a wafer processing method and system according to the present invention will be described with reference to the accompanying drawings.

[0020] [Outline of the embodiment] Figure 1 is an image showing the processed cross section of a chip after the wafer is divided.

[0021] As shown in Figure 1, when laser processing areas R1 and R2 remain on the processed cross section (sidewall) CW of chip C after dividing wafer W, it can be seen that grinding debris (sludge) SL generated by the grinding process is collected in laser processing area R2 on the upper side (+Z side, on the back surface Wb (see Figure 2) side of wafer W) and does not penetrate toward the front surface Wa side of laser processing area R2. From this, it is thought that laser processing areas R1 and R2 have the function of collecting grinding debris SL that penetrates from the grinding surface side of wafer W like a net. Specifically, the surfaces of laser processing areas R1 and R2 have more irregularities than the surfaces that are cleaved by cracks that propagate from laser processing areas R1 and R2, and it is thought that these irregularities function as a net to collect grinding debris SL.

[0022] In this embodiment, the Z-direction position of the laser processing area R2 on the back surface Wb side of the wafer W is set to correspond to the target value (hereinafter referred to as the target thickness) Ht of the chip C, thereby preventing grinding debris SL from penetrating the front surface Wa side of the laser processing area R2 (see Figure 4).

[0023] [Wafer processing system] The wafer processing system 10 according to this embodiment includes a laser processing device 10-1 (see FIG. 2) and a grinding device 10-2 (see FIG. 3). The laser processing device 10-1 forms a laser processing area inside the wafer W along a planned dividing line of the wafer W (laser processing step). The grinding device 10-2 grinds the back surface Wb of the wafer W to set the thickness of the wafer W to a target thickness Ht, and divides the wafer W into individual chips C by utilizing the load applied to the wafer W during the grinding process (grinding step).

[0024] (laser processing) FIG. 2 is a block diagram showing the configuration of a laser processing device in a wafer processing system according to one embodiment of the present invention.

[0025] As shown in FIG. 2, the laser processing apparatus 10-1 includes a control unit 12, a wafer moving unit 14, and a laser processing unit 16.

[0026] The control unit 12 has a CPU (Central Processing Unit), memory (e.g., ROM (Read Only Memory), RAM (Random Access Memory), etc.), storage (e.g., HDD (Hard Disk Drive), SSD (Solid State Drive), etc.), an input / output circuit unit, etc., and controls the operation of each unit of the laser processing apparatus 10-1. The control unit 12 is realized by, for example, a personal computer or a workstation.

[0027] The wafer moving unit 14 includes a suction stage T1 that suction-holds the wafer W, and an XYZθ table that is provided on a main body base (not shown) of the laser processing apparatus 10-1 and moves the suction stage T1 in the XYZθ directions.

[0028] The wafer W is, for example, a disk-shaped semiconductor wafer made of silicon. The surface Wa of the substrate of the wafer W is divided into grid-like regions by a plurality of planned division lines extending in the X and Y directions, and devices (device layers) such as electronic circuits are formed (laminated) in each of these grid-like regions.

[0029] When dividing the wafer W into individual chips C, first, a backgrind tape (protective tape) BG is attached to the front surface Wa of the wafer W, and the wafer is placed with the front surface Wa facing downwards on the holding surface of the table T of the laser processing apparatus 10-1. The wafer W is then suction-held by the suction stage T1. Note that the wafer W may also be suction-held without the backgrind tape BG attached.

[0030] The laser processing unit 16 includes a laser light source, optical elements such as a condenser lens, and a driving means for slightly moving the laser light L in the Z direction relative to the wafer W. As the laser light source, for example, a semiconductor laser pumped Nd:YAG (Yttrium Aluminum Garnet) laser is used. The laser light L emitted from the laser light source is condensed inside the wafer W by the condenser lens. As a result, laser processing regions R1 and R2 are formed inside the wafer W.

[0031] Here, the laser processed regions R1 and R2 refer to regions where the physical properties such as density, refractive index, and mechanical strength inside the wafer W become different from those of the surrounding area due to irradiation with laser light, and the strength is lower than that of the surrounding area. The laser processed regions R1 and R2 include, for example, crack regions.

[0032] When forming the laser processing regions R1 and R2 on the wafer W, a laser beam L is emitted from the laser processing unit 16 and irradiated onto the wafer W via an optical system such as a condenser lens. The Z-direction position of the focal point FP of the irradiated laser beam L is accurately set at a predetermined position inside the wafer W by adjusting the Z-direction position of the wafer W using the XYZθ table and by controlling the position of the condenser lens.

[0033] In this state, the XYZθ table is fed in the X direction, which is the dicing direction. This forms one line of laser processing regions R1 and R2 along the planned dividing line of the wafer W. Then, once one line of laser processing regions R1 and R2 has been formed along the planned dividing line, the XYZθ table is indexed and fed one pitch in the Y direction, and laser processing regions R1 and R2 are also formed on the next planned dividing line. Next, once laser processing regions R1 and R2 have been formed along all of the planned dividing lines in the X direction, the XYZθ table is rotated 90° around the Z axis, and laser processing regions R1 and R2 are similarly formed on the planned dividing line in the X direction after the rotation.

[0034] The procedure for forming the laser processing regions R1 and R2 is not particularly limited. For example, as shown in FIG. 2, after forming the first layer of laser processing region R1 on the entire surface of the wafer W, the second layer of laser processing region R2 (on the back surface Wb side of the wafer W) may be formed. In this case, the laser processing conditions for forming the laser processing regions R1 and R2 may be different or the same. Alternatively, a branching unit (e.g., a beam splitter) may be provided to branch the laser light L and focus it at two focusing points at different positions (depths) in the Z direction inside the wafer W, thereby forming the two layers of laser processing regions R1 and R2 in a single scan.

[0035] The wafer W on which the laser processing areas R1 and R2 are formed is transported from the laser processing device 10-1 to the grinding device 10-2, where the back surface of the wafer W is ground, removing a portion of the laser processing area R2 on the back surface, and dividing the wafer W into individual chips (see Figure 3).

[0036] (Grinding) 3 is a block diagram showing the configuration of a grinding device in a wafer processing system according to an embodiment of the present invention, which shows a state in which the back surface Wb of the wafer W has been ground down to Wb1.

[0037] 3, the grinding apparatus 10-2 according to this embodiment includes a grinding control unit 18, a thickness measurement unit 20, a wafer moving unit 22, and a grinding machine (grinder) 50. The grinding machine 50 includes a rotary grinding machine 52 and a grinding wheel 54 attached to the rotary grinding machine 52.

[0038] The grinding control unit 18 includes a motor for rotating the rotary grinding machine 52 around a shaft. In response to a command from the control unit 12, the grinding control unit 18 supplies slurry to the back surface Wb of the wafer W from a slurry supply port (not shown) while adjusting the Z-direction position of the rotary grinding machine 52 to rotate the grinding wheel 54 in contact with the back surface Wb of the wafer W.

[0039] The wafer moving unit 22 includes a chuck table T2 that holds the wafer W by suction, and an XY table (not shown) that moves the chuck table T2 in the X and Y directions within the grinding device 10-2.

[0040] After laser processing regions R1 and R2 are formed on the wafer W in the laser processing device 10-1, the wafer W is transferred to the grinding device 10-2. The wafer W is then placed with its front surface Wa facing downward on the holding surface of the chuck table T2 and is held by suction on the chuck table T2. Next, while the chuck table T2 is moved in the X and Y directions by the wafer moving unit 22, the grinding control unit 18 rotates the grindstone 54 while bringing it into contact with the back surface Wb of the wafer W, thereby grinding the entire back surface Wb of the wafer W.

[0041] The thickness measurement unit 20 is a means for measuring the thickness of the wafer W. The thickness measurement unit 20 is capable of measuring the thickness of the wafer W in-situ while the back surface Wb of the wafer W is being ground. The thickness measurement unit 20 may be a contact type means for measuring by bringing a contact type height gauge into contact with the back surface Wb of the wafer W. Alternatively, the thickness measurement unit 20 may be a non-contact type means (e.g., a ToF (Time-of-Flight) method) for measuring the distance to the back surface Wb of the wafer W by irradiating the back surface Wb of the wafer W with laser light from a laser light source (e.g., a semiconductor laser).

[0042] The grinding control unit 18 grinds the back surface Wb of the wafer W while calculating the thickness of the wafer W based on the output from the thickness measurement unit 20. This allows the thickness of the wafer W to be adjusted to the target thickness Ht.

[0043] 3, the grinding apparatus 10-2 is controlled by the same control unit 12 as the laser processing apparatus 10-1, but it may also be controlled by a control unit (for example, a personal computer or a workstation) separate from that of the laser processing apparatus 10-1. In other words, the laser processing apparatus 10-1 and the grinding apparatus 10-2 may be separate and independent devices. In this case, the control unit of the grinding apparatus 10-2 may share information regarding the positions and sizes of the laser processing regions R1 and R2 and information regarding the target thickness Ht of the wafer W from the control unit 12 of the laser processing apparatus 10-1 via a communication line, a storage device, or the like.

[0044] [Laser processing area] Next, the relationship between the laser processing area R2 and the target thickness Ht of the chip C will be explained. Fig. 4 is a cross-sectional view showing the relationship between the laser processing area and the target thickness Ht, and Fig. 5 is an image showing the processed cross section of the chip. For simplicity, Fig. 4 only shows the laser processing area R2 on the back surface Wb side of the wafer W.

[0045] As shown in FIG. 4, the laser processed region R2 includes a void R20 located at the bottom end thereof and an upper region R22 above the void R20 formed above (on the back surface side of) the void R20.

[0046] For example, when the laser light L is a pulsed laser, the laser light L focused inside the wafer W is locally absorbed at the focal point FP and the laser light absorption region nearby. At this time, the temperature of the focal point FP and the laser light absorption region nearby rises instantaneously (to about 10,000 K, for example), and the silicon in the laser light absorption region vaporizes all at once, forming a void (vacancy) R20.

[0047] Next, the high-temperature region rapidly expands as a thermal shock wave above the void R20, i.e., toward the side irradiated with the laser beam L. At this time, the temperature difference between the high-temperature region and the surrounding low-temperature region becomes very large, and the thermal expansion of the high-temperature region is suppressed by the surrounding low-temperature region, resulting in the high-temperature region being subjected to very strong compression. As a result, the high-temperature region does not melt, and a high-dislocation density layer is formed.

[0048] Then, when the next pulse wave is irradiated, dislocations in the high dislocation density layer in the high temperature region act as nuclei, and a crack K propagates from the region R22 above the void to the low temperature region of the single crystal.

[0049] The region R22 above the void refers to a region above the void R20 where traces of laser processing (such as a high dislocation density layer or microcracks) can be confirmed.

[0050] As described above, it is considered that the laser processing areas R1 and R2 have the function of collecting, like a net, grinding debris SL that has entered from the grinding surface of the wafer W. For this reason, it is considered to grind away part of the laser processing area R2 to expose the laser processing area R2 on the back surface and sidewall CW of the chip C.

[0051] In this regard, the inventors of the present invention discovered that when grinding a portion of the laser-processed region R2, grinding up to the vicinity of the void R20 in the laser-processed region R2 tends to generate debris and meandering on the back side (upper side in the figure) of the chip C. For this reason, in this embodiment, a portion of the region R22 above the void in the laser-processed region R2 is ground (without grinding the vicinity of the void R20) to expose the region R22 above the void on the back side and sidewall CW of the chip C. This prevents debris and meandering from occurring on the back side of the chip C, and improves the function of collecting grinding chips SL by the laser-processed region R20.

[0052] Therefore, in this embodiment, as shown in FIG. 4, laser processing is performed so that a region R22 above the void in the laser processing region R2 is formed at a position of the target thickness Ht from the surface Wa of the chip C.

[0053] The control unit 12 adjusts the laser processing conditions of the laser processing unit 16 to set the position and size of the laser processing region R2 (void R20 and region R22 above the void) (position setting step). Specifically, first, laser processing data for the position and size of the laser processing region R2 (void R20 and region R22 above the void) is obtained in advance experimentally or by simulation for each material of the wafer W and for each laser processing condition, such as the position of the focal point FP during laser processing and the intensity, frequency, numerical aperture, and irradiation time of the laser light L. Then, based on the material of the wafer W, the target thickness Ht, and the laser processing data, the control unit 12 adjusts the laser processing conditions, such as the position of the focal point FP during laser processing and the intensity, frequency, numerical aperture, and irradiation time of the laser light L, so that the region R22 above the void in the laser processing region R2 overlaps the position of the target thickness Ht. Here, the control unit 12 functions as a position setting unit.

[0054] The laser processing unit 16, in accordance with an instruction from the control unit 12, forms a laser processing region R2 inside the wafer W along the planned dividing line of the wafer W (laser processing region forming step).

[0055] Here, it is preferable to set the formation position of the laser processing region R2 so that when the wafer W is ground to the target thickness Ht, a part of the upper end of the laser processing region R2 (for example, a region ranging from the top (back side) of the laser processing region R2 to about one-third of the way up) is ground. More specifically, when the dimension of the laser processing region R2 in the Z direction is H1, it is preferable to adjust the laser processing conditions so that the distance Δ from the upper end of the laser processing region R2 in the drawing to the position of the target thickness Ht satisfies 0<Δ≦H1 / 3.

[0056] Alternatively, the position where the laser processing region R2 is formed may be set so that when the wafer W is ground to the target thickness Ht, a portion of the upper end of the laser processing region R2 (for example, a region ranging from the top (back surface side) of the region R22 above the void in the laser processing region R2 to about one-third of the way therefrom) is ground. In other words, when the dimension in the Z direction of the region R22 above the void in the laser processing region R2 is H2, the laser processing conditions may be adjusted so that the distance Δ from the upper end of the region R22 above the void in the laser processing region R2 in the drawing to the position of the target thickness Ht satisfies 0<Δ≦H2 / 3.

[0057] In this embodiment, the laser processing region is two layers, R1 and R2, but the present invention is not limited to this. The laser processing region may be formed as a single layer or as a plurality of layers, three or more layers. When forming three or more laser processing regions, the laser processing region closest to the back surface (closest to the back surface Wb of the wafer W) may be formed so that the position of the target thickness Ht overlaps.

[0058] FIG. 6 is an image showing the processed cross section of the chip after grinding, and FIG. 7 is an image showing the surface of the backgrind tape after the chip has been picked up after being cleaved.

[0059] As shown in Figure 6, when grinding was completed about one-third from the top (back side) of the laser processing area R2 and the wafer W was divided, as shown in Figure 7, almost no grinding debris SL was detected on the surface of the back grinding tape BG.

[0060] According to this embodiment, by forming the laser processing region R2 so as to overlap the position of the target thickness Ht, it is possible to prevent grinding debris SL from entering the gap Gap between the chips C after the wafer W is cleaved.

[0061] [others] When grinding, using fine grits such as 6000 grit or polishing grits can easily cause surface burning. On the other hand, using coarse grits can easily cause chipping or small debris. For this reason, it is preferable to use coarse grits such as 3600 grit. [Explanation of symbols]

[0062] 10...wafer processing system, 10-1...laser processing device, 10-2...grinding device, 12...control unit, 14...wafer moving unit, 16...laser processing unit, 18...grinding control unit, 20...thickness measuring unit, 22...wafer moving unit, 50...grinding machine, 52...rotary grinding machine, 54...grinding wheel, T1...suction stage, T2...chuck table

Claims

1. A wafer processing method comprising a laser processing area formation step of forming a laser processing area along a planned dividing line of the wafer, the laser processing area including a void formed in a laser light absorption area near the focal point of the laser inside the substrate of the wafer and a void upper area formed above the void on the back side of the wafer by focusing the laser, the laser processing area having the function of collecting grinding debris generated by grinding the back side of the wafer, so that the void upper area is located at the target thickness of the wafer.

2. A wafer processing method as described in claim 1, wherein the laser processing area has irregularities that can collect the grinding debris.

3. 3. The wafer processing method according to claim 1, further comprising a grinding step of grinding the wafer from the back surface to a part of the region above the void so that the thickness of the wafer becomes the target thickness, thereby exposing the region above the void on the back surface and sidewall of the wafer.

4. 4. The wafer processing method according to claim 3, wherein the laser processing area forming step forms the laser processing area so that the position of the target thickness overlaps an area ranging from a back surface side to one-third of the laser processing area.

5. 4. The wafer processing method according to claim 3, wherein the laser processing region forming step forms the laser processing region so that the position of the target thickness overlaps a region ranging from the back surface side to one-third of the region above the void.

6. A wafer processing system comprising a laser processing device that forms a laser processing area along a planned dividing line of the wafer, the laser processing area including a void formed in a laser light absorption area near the laser focal point inside the substrate of the wafer and a void upper area formed above the void on the back side of the wafer by focusing the laser, so that the void upper area within the laser processing area is positioned at the target thickness of the wafer and has the function of collecting grinding debris generated by grinding the back side of the wafer.

Citation Information

Patent Citations

  • Method for cutting semiconductor substrate

    JP2005086111A

  • Wafer dividing method

    JP2008294191A

  • Formation method of starting point region for cutting

    JP2011216913A

  • Wafer division method

    JP2012238747A

  • Wafer processing method and wafer processing system

    JP2018142717A