Methods for membrane transfer

Abstract

The invention relates to a method for fabricating a device (10) comprising a piezoelectric membrane (14) above a cavity (11), the method comprising the steps of: a) providing a carrier substrate (1) provided with a cavity (11) opening onto a first side (12) of the carrier substrate, the cavity (11) having a lateral dimension greater than 30 μm; b) providing a donor substrate (2) provided with a buried weakened plane (20) defining a surface layer (22); c) depositing on the front side (21) of the donor substrate (2) a reinforcement layer (13) made of a piezoelectric material having a thickness (e) greater than 500 nm; d) bonding the carrier substrate (1) and the donor substrate (2); and e) peeling off the donor substrate (2) at the buried weakened plane (20) to transfer the membrane (14) comprising the surface layer (22) and the reinforcement layer (13) to the carrier substrate (1).

Description

[Technical Field]

[0001] The present invention relates to the field of microelectronics and microsystems, and in particular to a method for fabricating a structure comprising a deformable piezoelectric membrane above at least one cavity. [Background technology]

[0002] MEMS (Microelectromechanical Systems) devices have found wide application in the fabrication of various sensors. The operating principle of many of these MEMS devices is to vibrate a flexible membrane above a cavity. They are sometimes referred to as PMUT (Piezoelectric Micromachined Ultrasonic Transducer) microsystems. In operation, the vibration of the membrane caused by the propagation of a physical parameter, e.g., an acoustic wave, is converted into an electrical signal (or vice versa, depending on whether the device is in receiver or emitter mode).

[0003] A number of approaches have been used to fabricate structures with membranes suspended above cavities. The first approach consists of breaking apart an SOI (silicon-on-insulator) substrate that has previously been attached to a substrate in which the cavity is provided. Another approach involves the steps of membrane deposition and membrane release through chemical attack.

[0004] Forming a suspended membrane by sacrificial deposition has a number of drawbacks: the empty space in the cavity that must be limited, the risk of bonding the membrane to the bottom of the cavity during release, the risk of partial release, the difficulty of managing the mechanical stress on the membrane, etc. In addition, forming a suspended membrane by bonding the SOI substrate before removing it by grinding / chemical attack allows for better control of the atmosphere in the cavity (sealed at the moment of bonding). However, this operation is relatively expensive because it requires the consumption of the SOI substrate.

[0005] Another, neater alternative consists of utilizing layer transfer directly above the cavity using Smart-Cut™ technology to form a suspended membrane.

[0006] With this alternative, it is difficult to transfer the membrane over cavities with large dimensions. However, there is a real need for cavities with large dimensions, especially for PMUT devices where the cavities typically have dimensions of a few hundred microns so that the operating frequency of the PMUT device is not too large, between 0.1 and 10 MHz.

[0007] French patent FR2715502 describes how to transfer a suspended membrane over a cavity using SmartCut. According to this teaching, when the substrate containing the cavity is made of silicon, the dimension of the cavity (Lmax) should be less than 10 times the thickness (e0) of the membrane to be transferred. By "dimension" of the cavity is understood the lateral dimension in the main plane of the front surface of the substrate, e.g. width, length, diameter, etc.

[0008] In addition, the maximum thickness (e0) of the film to be transferred using Smart-Cut™ type methods is limited by the donor substrate implant energy and cannot be more than a few microns. Specifically, high energy ion implants (>250 keV) that would allow deeper implants would have a low flux and the ion implantation step would require significantly longer times. As a result, the target dose (several tens of 16 cm -2 ), this method would be difficult (slow) and expensive to implement. In addition, such equipment is not standard. As a result, the maximum lateral dimensions of the cavities in this type of structure obtained using SmartCut cannot be more than a few tens of microns. Summary of the Invention

[0009] The present invention aims to overcome some or all of the above-mentioned drawbacks. The present invention relates to a method for using Smart Cut to transfer a piezoelectric film onto a substrate containing at least one cavity of large size.

[0010] To that end, the invention relates to a method for manufacturing a device comprising a piezoelectric membrane above at least one cavity, said method comprising the steps of: a) providing a carrier substrate having a first surface extending over a plane (x, y) and provided with a cavity opening onto said first surface, said cavity having a lateral dimension in said plane (x, y) greater than 30 μm; b) providing a donor substrate provided with a buried weakened plane formed by implanting light element species through the front surface of said donor substrate, said weakened plane defining a surface layer; c) depositing on the front surface of the donor substrate a reinforcing layer made of a piezoelectric material having a thickness greater than 500 nm; d) bonding the carrier substrate and the donor substrate at a bonding interface disposed between the first side of the carrier substrate and the reinforcement layer; e) after step d), peeling the donor substrate at the embedded weakened plane to transfer a film including the surface layer and the reinforcement layer to the carrier substrate, the film being located above the cavity; and Includes:

[0011] Other advantageous and non-limiting features of this manufacturing method, which may be implemented alone or in any technically feasible combination, include: the donor substrate is made of silicon or silicon carbide; the carrier substrate is made of silicon; the donor substrate is made of silicon and the strengthening layer is deposited at a temperature below 450°C; the donor substrate is made of silicon carbide and the strengthening layer is deposited at a temperature below 850°C; the implanted light element species are hydrogen ions and / or helium ions, a first conductive layer sandwiched between the reinforcing layer and the carrier substrate, the first layer being in direct contact with the reinforcing layer and configured to form a bottom electrode of the device; a bonding layer is sandwiched between the reinforcing layer and the carrier substrate, the bonding layer being in direct contact with the carrier substrate, the bonding layer being preferably made from silicon oxide; a second conductive layer formed on the reinforcing layer, the second layer configured to form a top electrode of the device; the method comprises, after the stripping step e), at least one mechanical grinding operation and / or at least one chemical-mechanical polishing operation and / or at least one chemical etching operation of the surface layer, the bonding step d) comprises bonding by molecular adhesion between the donor substrate provided with the reinforcement layer on the one hand and the first side of the carrier substrate on the other hand, A step of deposition on the free surface of said surface layer is carried out after step e) in order to increase the thickness of said surface layer.

[0012] According to another aspect of the invention, the invention also relates to a donor substrate adapted to transfer a piezoelectric film to a carrier substrate provided with at least one cavity having a lateral dimension greater than 30 μm, said donor substrate comprising: a weakened plane arranged on the donor substrate (2) and defining a surface layer; a reinforcing layer made of a piezoelectric material disposed on the surface layer (22) and having a thickness (e) greater than 500 nm; Equipped with. [Brief explanation of the drawings]

[0013] Other features and advantages of the invention will become apparent from the following detailed description of the invention which proceeds with reference to the accompanying drawings. [Figure 1] 1A-1C illustrate steps of a method for transferring a membrane positioned above a recessed cavity in accordance with the present invention. [Figure 2] 1A-1C illustrate steps of a method for transferring a membrane positioned above a recessed cavity in accordance with the present invention. [Figure 3] 1A-1C illustrate steps of a method for transferring a membrane positioned above a recessed cavity in accordance with the present invention. [Figure 4] 1A-1C illustrate steps of a method for transferring a membrane positioned above a recessed cavity in accordance with the present invention. [Figure 5] 1A-1C illustrate steps of a method for transferring a membrane positioned above a recessed cavity in accordance with the present invention. [Figure 6A] 5A-5C illustrate variants and other steps of the transfer method according to the invention. [Figure 6B] 5A-5C illustrate variants and other steps of the transfer method according to the invention. [Figure 6C] 5A-5C illustrate variants and other steps of the transfer method according to the invention. [Figure 6D] 5A-5C illustrate variants and other steps of the transfer method according to the invention. DETAILED DESCRIPTION OF THE INVENTION

[0014] In the description, the same reference numbers in several figures may be used for the same type of element. The figures are schematic representations that are not to scale for ease of reading. In particular, the thickness of layers along the z-axis is not to scale with respect to the lateral dimensions along the x- and y-axes, and the relative thicknesses of layers with respect to one another are not necessarily emphasized in the figures.

[0015] The invention relates to a method for transferring a piezoelectric film 14 onto a carrier substrate 1 containing cavities 11 (Figures 1 to 5), said transfer method being aimed at producing structures 10 containing embedded cavities 11 of large size.

[0016] The method according to the invention comprises the step of providing a carrier substrate 1 (see FIG. 1 ), which has a first side 12 intended to be bonded to a donor substrate 2, and a second side 12′ opposite the first side 12, called the back side. By way of non-limiting example, the carrier substrate 1 may be made of silicon, glass, sapphire, etc. The thickness of the carrier substrate 1 may be of the order of a few hundred μm, typically 775 μm for a substrate with a diameter of approximately 300 mm.

[0017] The carrier substrate 1 includes a plurality of cavities 11 opening onto a first side 12 of the carrier substrate. Each cavity 11 has a bottom and a peripheral wall. The carrier substrate 1 is preferably a silicon substrate.

[0018] The geometry of each cavity 11, which depends on the target device, in particular the target MEMS device, is defined by: the shape of the cavity 11 in the plane of the first side 12 (called the main plane (x,y)) of the carrier substrate 1, this shape may possibly be circular, square, rectangular or polygonal; the lateral dimension L of the cavity 11 in its main plane (x, y), said lateral dimension L possibly varying from a few tens of microns to a few millimeters, The depth of the cavity 11 along the z-axis perpendicular to the main plane (x,y), said depth may possibly vary from a few hundred nanometers to a few tens or hundreds of microns.

[0019] According to the invention, the transfer method comprises transferring a piezoelectric membrane 14 to a carrier substrate 1 containing a large-sized embedded cavity 11. By "large size" what is meant is that the lateral dimension L in the plane (x, y) of the cavity 11 is greater than 30 μm.

[0020] The planar distribution of the cavities 11, i.e. the distribution of the cavities in the main plane (x, y), will also depend on the target device and will define the inter-cavity spacing 11: the inter-cavity spacing will likely vary from a few microns to a few hundred microns or even up to a few millimeters. The inter-cavity spacing will likely be uniform and the same over the entire surface of the carrier substrate 1, or will vary between several regions on the surface of said carrier substrate 1.

[0021] It will be noted that, in particular, when various types of devices are integrated together into a structure 10 containing buried cavities, the carrier substrate 1 will likely contain cavities 11 having different shapes, lateral dimensions, depths and / or planar distributions.

[0022] Various layers (e.g., silicon nitride, silicon oxide, etc.) will likely be deposited on the bottom and / or walls of cavity 11 depending on the type of device intended to be fabricated using structure 10 containing buried cavity 11.

[0023] The method according to the invention further comprises the step of providing a donor substrate 2 having a front surface 21, which is to be bonded to the carrier substrate 1, and a back surface 21' (see FIG. 2).

[0024] By way of example and in a non-limiting manner, the donor substrate 2 could possibly comprise at least one semiconductor material, such as silicon, silicon carbide, gallium nitride, etc., or a piezoelectric material, such as lithium tantalate, lithium niobate, aluminum nitride, zinc oxide, PZT, etc. The donor substrate 2 is preferably a silicon substrate or a silicon carbide (SiC) substrate.

[0025] The step of providing the donor substrate 2 further comprises the step of implanting light element species into said donor substrate 2 through the front surface 21 so as to form a plane of weakness 20 lying between a first portion of the donor substrate 1 forming the surface layer 22 and a second portion 23 constituting the remainder of the donor substrate 2. The implanted light element species are preferably hydrogen and / or helium ions.

[0026] The thickness of the first portion, and therefore of the future surface layer 22, depends on the implantation energy of the light element species (e.g., hydrogen and / or helium). The implantation energy is advantageously selected so that the first portion of the donor substrate 2 has a thickness of approximately 0.2 microns to 2 microns.

[0027] In addition, the method according to the invention further comprises a step of depositing a reinforcing layer 13 made of a material having piezoelectric properties on the front surface 21 of the donor substrate 2 (see FIG. 3). The deposition step is carried out after a step of ion implantation of light element species into the donor substrate 2. The thickness e of the layer 13 is greater than 500 nm. It is even more preferred that the thickness e of the layer 13 is greater than 1 μm or even 4 μm.

[0028] The reinforcing layer 13 is made of lithium niobate (LiNbO3), lithium tantalate (LiTaO3), potassium sodium niobate (K x Na 1-x It may be made of materials selected from lead magnesium niobate and lead titanate (PMN-PT) in varying ratios (e.g., 70 / 30 or 90 / 10) depending on the properties desired, zinc oxide (ZnO), aluminum nitride (AlN) or aluminum scandium nitride (AlScN), etc.

[0029] The reinforcing layer 13 is preferably made of AlN or PZT. Specifically, these two materials are considered to be the most commonly used piezoelectric materials in the MEMS field. In addition, the elastic modulus of AlN is on the order of 300 GPa, which is substantially larger than that of PZT. Thus, it is even more preferable to select AlN as the piezoelectric material for the reinforcing layer 13.

[0030] In an exemplary implementation, when the reinforcing layer 13 is made of AlN and the donor substrate 2 is made of silicon provided with cavities having lateral dimensions of approximately 50 μm, the thickness of the reinforcing layer is preferably 1.5 μm or more. According to another similar exemplary implementation, when the reinforcing layer 13 is made of PZT, then the thickness of the reinforcing layer 13 is preferably selected to be greater than 7.5 μm.

[0031] In addition, a person skilled in the art will be able to select the thickness of the reinforcing layer 13 according to the lateral dimension L of the cavity 11 and the mechanical properties (e.g., Young's modulus) of the reinforcing layer 13 so as to successfully transfer the membrane 14.

[0032] A person skilled in the art will also be able to adapt the temperature for the deposition of the reinforcing layer 13 according to the properties of the donor substrate 2 so as to prevent blistering.

[0033] In other words, the reinforcing layer 13 is advantageously deposited at a temperature adapted and configured to prevent blistering that may be caused by the weakened plane 20 under the effect of heat treatments with large thermal budgets.

[0034] Specifically, the effect of implanting light ions is to create defects (atomic vacancies or interstitial defects) at the weakened plane 20. These defects, commonly called platelets, have a size of the order of about 10 nanometers. The effect of temperature causes a change in the population of these defects via Ostwald ripening, resulting in the development of microcracks or microcavities. When supersaturated, the light ions implanted into the donor substrate 2 condense in gaseous form into these microcavities under the effect of temperature. When a large thermal budget is applied, the cavities then grow and coalesce vertically and laterally in the form of bubbles, causing blistering on the front surface 21.

[0035] According to one variant embodiment, when the donor substrate 2 is made of silicon (or comprises a layer made of silicon that has been implanted with light ions), the deposition temperature is preferably lower than 450°C, even more preferably lower than 400°C.

[0036] According to another variant embodiment, when the donor substrate 2 is made of silicon carbide (or comprises a layer made of silicon carbide that has been implanted with light ions), the deposition temperature is preferably lower than 850°C.

[0037] The layer 13 may be deposited using any technique known to those skilled in the art and comparable to conventional methods in the field of microelectronics. Preferably, the reinforcing layer 13 is deposited using cathode sputtering or using a sol-gel technique, a chemical deposition technique.

[0038] By way of example, deposition by cathode sputtering advantageously makes it possible to obtain crystallized piezoelectric layers for deposition temperatures as low as 300 or 400° C. for certain materials such as aluminum nitride (AlN).

[0039] Advantageously, the piezoelectric reinforcing layer 13 made from AlN is deposited according to the invention using cathode sputtering.

[0040] In addition, PZT is deposited using cathode sputtering at relatively higher temperatures than for the deposition of AlN in order to be crystallized. The temperatures for the deposition of PZT can reach 700°C.

[0041] According to one embodiment of the invention, the reinforcement layer 13 made of PZT may be deposited using a sol-gel method. This is a chemical deposition technique in which the precursor to be deposited is added in solid form to a solvent. The resulting solution is then spread over the entire front surface 21 of the donor substrate 2. Spreading may be achieved by spin-coating. The substrate is then dried to evaporate the solvent before undergoing a baking step to break the carbon chains. The sequence of spreading, drying, and baking steps may be repeated multiple times to increase the thickness of the resulting layer. In addition, the resulting layer is generally amorphous in nature and requires a final crystallization / densification heat treatment step.

[0042] According to another embodiment, the reinforcement layer 13 made of PZT may be fabricated using low-temperature MOCVD (metal-organic chemical vapor deposition). In particular, this technique is known to make it possible to deposit PZT in a crystalline state at temperatures that may be lower than 400° C. or even lower.

[0043] According to one embodiment of the invention, the method optionally comprises a heat treatment to repair the deposited reinforcement layer 13. Said repair heat treatment may advantageously serve to partially or completely recrystallize the reinforcement layer 13. This treatment may also be used to outgas and / or remove impurities from the deposited piezoelectric layer that may have been incorporated into the layer before or after deposition of the piezoelectric layer. According to one alternative, the heat treatment may comprise a thermal anneal to improve the crystalline quality of the deposited layer 13.

[0044] 4, the method according to the invention further comprises the step of bonding the carrier substrate 1 and the donor substrate 2. The carrier substrate 1 and the donor substrate 2 are bonded at a bonding interface 30 arranged between a first side 12 of the carrier substrate 1 and a reinforcement layer 13 arranged on a front side 21 of the donor substrate 2.

[0045] Advantageously, this step involves direct bonding by molecular adhesion between the first side 12 of the carrier substrate 1 on the one hand and the reinforcing layer 13 of the carrier substrate 1 on the other hand. The principle of molecular adhesion, which is well known in the prior art, will not be explained in further detail here. It should be noted that the surfaces to be joined must have a very good surface finish (cleanliness, low roughness, etc.) in order to obtain a good quality bond.

[0046] To ensure a good quality bond, it is advantageous for the bonding step to include cleaning the surfaces to be bonded of the donor substrate 2 (here, the surface of the reinforcing layer 13 according to this embodiment) and of the carrier substrate 1 before bringing said surfaces into contact. By way of example, a conventional sequence used in microelectronics, in particular for silicon-based substrates, includes an ozone clean, an SC1 clean (SC1 is the acronym for Standard Clean 1) and an SC2 clean (SC2 is the acronym for Standard Clean 2), with intermediate rinses. The surfaces to be bonded will probably also be activated, for example using plasma, before being brought into contact in order to increase the bonding energy between said surfaces.

[0047] The method according to the invention further provides a step of peeling off the donor substrate 2 at the embedded weakened plane 20 so as to transfer the film 14 comprising the surface layer 22 and the reinforcing layer 13 to the carrier substrate 1. Peeling occurs at the embedded weakened plane 20 between the surface layer 22 and the remainder 23 of the donor substrate 2 (see Figures 2, 4 and 5).

[0048] In addition, the delamination step is of course carried out after the step of bonding the carrier substrate 1 and the donor substrate 2 provided with the reinforcing layer 13. This delamination step is a conventional delamination step according to the Smart Cut method.

[0049] At the completion of the peeling step, a membrane 14 is obtained that has been transferred to the carrier substrate 1, as illustrated in Figure 5. It will be recalled that the SmartCut method advantageously makes it possible to obtain thin layers with excellent thickness uniformity. This criterion can be very advantageous for certain MEMS devices that require flexible membranes exhibiting controlled thickness.

[0050] This delamination is preferably carried out during a heat treatment at a temperature between a few hundred degrees and 950° C. When the weakened plane is arranged in the silicon layer of the donor substrate 2, the delamination is preferably carried out during a heat treatment carried out at a temperature below 700° C. According to another embodiment, when the weakened plane is arranged in the silicon carbide layer of the donor substrate 2, the delamination is carried out during a heat treatment carried out at a temperature below 950° C.

[0051] According to one embodiment, the delaminating step may alternatively be mechanically assisted or performed after the heat treatment using mechanical stress.

[0052] According to an embodiment in which the reinforcement layer 13 is made of PZT deposited using sol-gel, a delamination heat treatment carried out at a temperature between 500 and 750° C. will advantageously allow delamination of the donor substrate and recrystallization of the deposited PZT. In other words, the delamination heat treatment also includes a heat treatment to repair the PZT layer.

[0053] After the film 14 has been transferred to the carrier substrate 1, the delamination step may include a finishing treatment aimed at improving the crystalline quality (removal of defects from the layer), the surface quality (removal of residual roughness from the free surface of the layer 22) and / or modifying the thickness of the surface layer 22. This treatment may possibly include one or more heat treatments, chemical mechanical polishing, chemical etching, epitaxial growth and / or deposition of additional layers.

[0054] In particular, in certain cases where the thickness of the surface layer 22 transferred using the Smart Cut method is insufficient, it is possible to increase this thickness during the above-mentioned finishing process by depositing an additional layer on the free surface of the surface layer 22, for example by epitaxial growth or other known deposition methods (see FIG. 6D). The additional layer is preferably of the same nature as the surface layer 22.

[0055] Upon completion of the method according to the invention, what is obtained is a structure 10 with large buried cavities 11 and a piezoelectric membrane 14 (including a surface layer 22 and a reinforcing layer 13) above one or more cavities 11.

[0056] The method according to the invention is easy to implement and advantageously allows for the effective transfer of a film to a carrier substrate provided with large cavities, the cavities having lateral dimensions greater than 30 μm. The film is transferred in its entirety and benefits from the advantages of the Smart Cut process. Specifically, the applicant observed that a reinforcement layer having a thickness greater than 500 nm, even if its nature is piezoelectric and different from that of the donor substrate, allows for a greater reinforcement effect on the donor substrate. This advantageously allows the Smart Cut process to avoid problems of film blistering and / or partial transfer that can occur when handling carrier substrates covered with large cavities. By "partial transfer," it is meant that part of the film is not transferred to the carrier substrate after the peeling step.

[0057] In addition, the reinforcing layer according to the invention is piezoelectric. Thus, the method according to the invention provides a solution that is simple, easy to implement, and effective for fabricating piezoelectric films on substrates with large cavities, while benefiting from the advantages of the Smart Cut process. In other words, the transferred film has a controlled thickness and exhibits excellent thickness uniformity, which can be extremely advantageous for certain MEMS devices that require a flexible film over a cavity. In particular, the resulting structure may be used to fabricate PMUT devices whose cavities typically measure several hundred microns. Thanks to the advantages of the Smart Cut process, namely the piezoelectricity of the transferred film and the large size of the cavities in the carrier substrate, the method according to the invention makes it possible to obtain a structure specifically designed for fabricating PMUT devices with precise and uniform operating frequencies.

[0058] According to one embodiment illustrated in Figure 6A, the carrier substrate 1 and / or the donor substrate 2 may comprise a bonding layer 32 at the first side 12 and / or above the reinforcement layer 13, respectively, in order to increase the bonding quality and bonding energy of their interface. The bonding layer 32 is preferably arranged on the reinforcement layer 13 so that a bonding interface 30 is between the first side 12 of the carrier substrate 1 and said bonding layer 32 (see Figures 6A and 6C). The bonding layer 32 is advantageously made from silicon oxide. In particular, silicon oxide is an easily deposited material and allows a roughness comparable to that of direct bonding to be obtained.

[0059] Bonding layer 32 is preferably made of silicon oxide and is formed using TEOS (tetraethyl orthosilicate) PECVD. After deposition of the bonding layer, the oxide layer may be planarized and then cleaned to prepare the oxide layer for the direct bonding step, as described above.

[0060] In addition to layer 32 configured to improve bonding, additional layers may be provided, particularly reinforcing layer 13. The location, nature and function of these layers will be explained in detail below.

[0061] According to one embodiment illustrated in Figure 6B, a first conductive layer 31 is sandwiched between the reinforcing layer 13 and the carrier substrate 1. The first layer 31 is in direct contact with the reinforcing layer 13 and is configured to form the bottom electrode 31 of the device 10 fabricated upon completion of the method according to the invention.

[0062] The first layer 31 may be deposited after the step of depositing the reinforcing layer 13. This layer 31 may be made of platinum (Pt), gold (Au), copper (Cu), molybdenum or aluminum (Al). In addition, the first layer 31 may be fabricated using any technique known to those skilled in the art comparable to conventional methods in the field of microelectronics. The bottom electrode 31 may advantageously take the form of interdigitated combs.

[0063] By way of example, the first layer 31 may be deposited using PVD (Physical Vapor Deposition). The deposition is preferably carried out at low temperatures (lower than 450°C). For the deposition of the layer 31, an adhesion layer and / or a diffusion barrier layer may also be provided. The adhesion layer serves to improve the quality of the deposition of the layer 31 on the donor substrate 2, in particular if the layer 31 is of metallic nature. In addition, the diffusion barrier layer advantageously makes it possible to prevent the diffusion of metals into the final structure during possible subsequent technological steps.

[0064] According to one embodiment, when layer 31 is compatible (sufficient level of roughness) for direct bonding, layer 31 may be bonded directly to carrier substrate 1 (e.g. Au / Au direct bonding). In this case, thermocompression bonding may also be envisaged.

[0065] According to one embodiment of the invention, where bonding layer 32 is used as described above, bonding layer 32 may be deposited on first layer 31 .

[0066] According to another embodiment illustrated in Figure 6B, a second conductive layer 33 is formed on the surface layer 22. The second layer 32 is in direct contact with the surface layer 22 and is configured to form the top electrode 32 of the device 10 fabricated upon completion of the method according to the invention.

[0067] A second layer 33 may be deposited after the stripping step (see FIG. 6B) or before the deposition of the reinforcing layer 13 (see FIG. 6C). This layer 33 may be made of platinum (Pt), gold (Au), copper (Cu), molybdenum or aluminum (Al).

[0068] As illustrated in Figure 6C, layer 33 is preferably deposited after the stripping step and before the deposition of reinforcing layer 13 so as to be sandwiched between surface layer 22 and reinforcing layer 13. According to this embodiment, electrodes 31 and 33 are advantageously embedded and therefore passivated so that the electrodes are less susceptible to unwanted oxidation or deterioration.

[0069] Additionally, the second layer 33 may be fabricated in the same way as the layer 31, that is, using any technique known to those skilled in the art comparable to conventional methods in the field of microelectronics. Furthermore, the layers 31 and 33 may have thicknesses ranging from a few nanometers to tens of nanometers.

[0070] The invention also relates to a donor substrate 2 configured to transfer a piezoelectric film 14 to a carrier substrate 1 containing a large-sized cavity 11 (FIGS. 1 to 5).

[0071] 3, the donor substrate 2 comprises a bulk substrate including at least one semiconductor material, such as silicon, silicon carbide, gallium nitride, etc., or a piezoelectric material, such as lithium tantalate, lithium niobate, aluminum nitride, zinc oxide, PZT, etc. The donor substrate 2 is preferably a silicon substrate or a silicon carbide (SiC) substrate.

[0072] The donor substrate according to the invention is provided with a plane of weakness 20 lying between a first part of the donor substrate 1 that will form the surface layer 22 and a second part 23 that will make up the remainder of the donor substrate 2. The plane of weakness is produced by implanting light element species into said donor substrate 2. The implanted light element species are preferably hydrogen and / or helium ions.

[0073] Furthermore, the donor substrate 2 is provided with a piezoelectric reinforcement layer 13 arranged on the front surface 21 of the donor substrate 2. The thickness of the layer 13 is greater than 500 nm. It is even more preferred that the thickness e of the layer 13 is greater than 1 μm or even 4 μm.

[0074] The reinforcing layer 13 is made of lithium niobate (LiNbO3), lithium tantalate (LiTaO3), potassium sodium niobate (K x Na 1-x The material may comprise a material selected from lead magnesium niobate and lead titanate (PMN-PT) in varying ratios (e.g., 70 / 30 or 90 / 10) depending on the properties desired, zinc oxide (ZnO), aluminum nitride (AlN) or aluminum scandium nitride (AlScN), etc.

[0075] The reinforcing layer 13 is preferably made from AlN or PZT.

[0076] The layer 13 may be deposited using any technique known to those skilled in the art comparable to conventional methods in the field of microelectronics. The reinforcing layer 13 is preferably deposited using cathodic sputtering or using the sol-gel technique, which is a chemical deposition technique.

[0077] The donor substrate according to the invention is advantageously configured to transfer a film 14 formed by a reinforcement layer 13 and a surface layer 22 onto a carrier substrate 1 provided with large-sized cavities 11 (see FIG. 5). The donor substrate 2 according to the invention advantageously allows the transfer of a film that provides both reinforcement to facilitate good and effective film transfer and piezoelectricity for fabricating devices requiring such materials, in particular PMUT devices.

Claims

1. A method for fabricating a device (10) comprising a piezoelectric membrane (14) above at least one cavity (11), comprising: a) providing a carrier substrate (1) having a first surface (12) extending over a plane (x, y) and provided with a cavity (11) opening onto said first surface (12), said cavity (11) having a lateral dimension in said plane (x, y) greater than 30 μm; b) providing a donor substrate (2) provided with a buried weakened plane (20) formed by implanting light element species through the front surface (21) of the donor substrate (2), said weakened plane (20) defining a surface layer (22); c) depositing on said front surface (21) of said donor substrate (2) a reinforcing layer (13) made of a piezoelectric material with a thickness (e) greater than 500 nm; d) bonding the carrier substrate (1) and the donor substrate (2) at a bonding interface (30) located between the first surface (12) of the carrier substrate (1) and the reinforcement layer (13); e) after step d), peeling off the donor substrate (2) at the embedded weakened plane (20) so as to transfer a membrane (14) comprising the surface layer (22) and the reinforcing layer (13) to the carrier substrate (1), the membrane (14) being located above the cavity (11); A method comprising:

2. 2. The method of claim 1, wherein the donor substrate (2) is made of silicon or silicon carbide.

3. 2. The method of claim 1, wherein the carrier substrate (1) is made of silicon.

4. 2. The method of claim 1, wherein the donor substrate (2) is made of silicon and the reinforcement layer (13) is deposited at a temperature below 450°C.

5. 2. The method of claim 1, wherein the donor substrate is made of silicon carbide and the strengthening layer (13) is deposited at a temperature below 850°C.

6. The method according to any one of claims 1 to 5, wherein the implanted light element species are hydrogen ions and / or helium ions.

7. 7. The method according to any one of claims 1 to 6, wherein a first conductive layer (31) is sandwiched between the reinforcing layer (13) and the carrier substrate (1), the first conductive layer (31) being in direct contact with the reinforcing layer (13) and configured to form the bottom electrode (31) of the device (10).

8. The method according to any one of claims 1 to 7, wherein a bonding layer (32) is sandwiched between the reinforcing layer (13) and the carrier substrate (1), the bonding layer (32) being in direct contact with the carrier substrate (1).

9. The method of claim 8, wherein the bonding layer (32) is made of silicon oxide.

10. 10. The method according to any one of claims 1 to 9, wherein a second conductive layer (33) is formed on the reinforcing layer (13), the second conductive layer (33) being configured to form a top electrode (33) of the device (10).

11. 11. The method according to any one of claims 1 to 10, comprising, after the stripping step e), subjecting the surface layer (22) to at least one mechanical grinding operation and / or at least one chemical-mechanical polishing operation and / or at least one chemical etching operation.

12. 12. The method according to any one of claims 1 to 11, wherein the joining step d) comprises bonding by molecular adhesion between the donor substrate (2) provided with the reinforcement layer (13) on the one hand and the first side (12) of the carrier substrate (1) on the other hand.

13. The method according to any one of the preceding claims, wherein a step of deposition on the free surface of the surface layer (22) is carried out after step e) in order to increase the thickness of the surface layer (22).

14. A donor substrate (2) configured to transfer a piezoelectric film (14) to a carrier substrate provided with at least one cavity having a lateral dimension greater than 30 μm, a weakened plane (20) arranged on said donor substrate (2) and defining a surface layer (22); a reinforcing layer (13) made of a piezoelectric material disposed on the surface layer (22) and having a thickness (e) greater than 500 nm; A donor substrate (2).

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