Interposer and method for manufacturing the same

The interposer with a sintered metal conductor and ceramic magnetic structure addresses the challenge of high-density inductors by ensuring stable electrical conductivity and increased magnetic permeability, enhancing performance in high-performance processors.

JP7769804B2Active Publication Date: 2025-11-13NGK CORP
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Patent Information

Application Number
JP2024536717
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Filing Date
2022-07-29
Publication Date
2025-11-13
Estimated Expiration
2042-07-29

AI Technical Summary

Technical Problem

Existing interposers face challenges in achieving high-density inductors with sufficient inductance per unit area due to limitations in magnetic permeability and variations in electrical characteristics, particularly when incorporating magnetic materials with organic substrates.

Method used

The interposer is designed with a sintered metal conductor portion and a ceramic magnetic material portion, separated by an insulating layer, to minimize mixing of magnetic components and maintain consistent electrical characteristics, allowing for larger inductance and reduced variations.

Benefits of technology

This design ensures stable electrical conductivity and increased magnetic permeability, enabling high-density inductors with consistent performance and larger inductance per unit area, suitable for high-performance processors.

✦ Generated by Eureka AI based on patent content.

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Abstract

Conductor parts (201A, 201B) pass through a through-hole (HL) in an insulator substrate (100) and are composed of a sintered material including a sintered metal. A magnetic body part (301) surrounds the conductor parts (201A, 201B) in the through-hole (HL), is composed of a ceramic, is inorganically joined to the conductor parts (201A, 201B), and constitutes an inductor with the conductor parts (201A, 201B). Wiring parts (441A, 441B) include connecting vias (441vA, 441vB) that each have a bottom surface electrically connected to the conductor parts (201A, 201B). The bottom surfaces of the connecting vias (441vA, 441vB) are spaced away from the magnetic body part (301).
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Description

[Technical Field]

[0001] The present invention relates to an interposer and a manufacturing method thereof, and more particularly to an interposer with a built-in inductor for mounting a semiconductor element, and a manufacturing method thereof. [Background technology]

[0002] According to Japanese Patent Laid-Open Publication No. 2019-179792 (Patent Document 1), in a semiconductor device, an interposer is disposed between a semiconductor element and a motherboard. The semiconductor element and the motherboard are each connected to the interposer using solder balls. The interposer is shown to be a multilayer printed wiring board, which includes a core substrate, three conductor circuit layers stacked on the core substrate so as to face the semiconductor element, and three conductor circuit layers stacked on the core substrate so as to face the motherboard. On the semiconductor element mounting side of the interposer, the wiring dimensions are gradually reduced by passing through the three conductor circuit layers.

[0003] Efficient power management is often required for semiconductor devices such as integrated circuits (ICs). Typically, a voltage regulator controls the supply voltage to each of the multiple cores in a processor chip (semiconductor device) depending on factors such as the processor's processing volume. A voltage regulator typically requires switches, capacitors, and inductors. Controlling the supply voltage for each core requires a separate switch, capacitor, and inductor. In particular, inductors are difficult to incorporate into semiconductor devices, and are therefore typically prepared separately. To ensure sufficient inductance while minimizing the inductor's footprint, the use of magnetic materials has been proposed.

[0004] U.S. Patent Application Publication No. 2019 / 0279806 (Patent Document 2) discloses a package substrate (here, a type of interposer) disposed between a die (semiconductor element) and a board (motherboard). This package substrate incorporates an inductor for the aforementioned purpose. Specifically, this package substrate has a substrate core, a conductive through-hole penetrating the substrate core, and a magnetic coating around the conductive through-hole. The magnetic coating may contain magnetic particles. The substrate core may be any substrate on which a build-up layer (conductor circuit layer) will be formed. Organic materials are exemplified as materials for the core substrate.

[0005] International Publication No. 2007 / 129526 (Patent Document 3) discloses a core substrate provided with an inductor. The inductor is manufactured by forming a through hole in the axial direction of a longitudinally extending magnetic body, and then forming a conductor on the inner surface of the through hole by metal plating. By forming a hollow in the conductor, stress generated by the difference in thermal expansion between the conductor and the magnetic body is released. The inductor is incorporated into the substrate by forming a through hole in the substrate, inserting the inductor into the through hole, and filling the space between the inductor and the substrate with resin. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] Japanese Patent Application Publication No. 2019-179792 [Patent Document 2] US Patent Application Publication No. 2019 / 0279806 [Patent Document 3] International Publication No. 2007 / 129526 Summary of the Invention [Problem to be solved by the invention]

[0007] In recent years, dies (semiconductor elements) that are bonded to interposers have been equipped with multiple processor cores. In particular, high-performance processors for data servers and other devices have many processor cores to increase their processing power, resulting in a large number of processor cores per die area and a smaller die area per processor core. To address this, there is a demand for high-density inductors that have a larger inductance per unit area of ​​the interposer.

[0008] The above-mentioned U.S. Patent Application Publication No. 2019 / 0279806 exemplifies a method of forming a substrate core primarily made of an organic material with conductive through-holes (conductor portions) and a magnetic coating (magnetic material portion) containing magnetic particles and disposed around the conductor portions. In this case, the magnetic material portion must be formed at or below the heat resistance temperature of the organic material of the substrate core. A typical method for achieving this requirement is to solidify a resin in which magnetic particles are dispersed. However, when the magnetic material portion is formed using magnetic particles dispersed in a resin, it is difficult to ensure high magnetic permeability due to limitations on the magnetic particle filling rate (the proportion of magnetic particles per volume). In response to the above-mentioned increase in interposer density, it is necessary to reduce the size of the inductors built into the interposer. However, because it is difficult to increase the magnetic permeability of the magnetic material portion as described above, it becomes difficult to ensure sufficient inductance when the dimensions of each inductor are reduced due to the increase in density.

[0009] In the above-mentioned International Publication No. 2007 / 129526, the conductor (conductor portion) of the inductor is made of a plating film. In other words, plating is used as a method for forming the conductor portion. In this case, components of the magnetic material of the inductor are likely to be mixed into the plating solution and become mixed into the conductor portion of the inductor. As a result, the electrical characteristics (particularly the conductivity) of the conductor portion of the inductor tend to vary greatly. Therefore, if this inductor is applied to an interposer, the electrical characteristics (particularly the conductivity) of the interposer tend to vary greatly.

[0010] The present invention has been made to solve the above-mentioned problems, and one of its objects is to provide an interposer that can reduce variations in electrical characteristics. [Means for solving the problem]

[0011] Aspect 1 is an interposer with a built-in inductor for mounting a semiconductor element. The interposer includes an insulating substrate, a conductor portion, a magnetic material portion, and a wiring portion. The insulating substrate has a first surface and a second surface opposite the first surface in the thickness direction, and has a through hole between the first surface and the second surface. The conductor portion penetrates the through hole and is made of a sintered material including a sintered metal. The magnetic material portion surrounds the conductor portion in the through hole, is made of ceramics, and is inorganically bonded to the conductor portion, constituting the inductor together with the conductor portion. The wiring portion includes a connection via having a bottom surface electrically connected to the conductor portion. The bottom surface of the connection via is spaced apart from the magnetic material portion.

[0012] A second aspect of the present invention is the interposer according to the first aspect, wherein the conductor portion is a solid body.

[0013] A third aspect of the interposer is the interposer according to the first or second aspect, further comprising an intermediate terminal. The intermediate terminal is primarily made of a sintered metal, faces the conductor portion and the magnetic material portion in the thickness direction, and is inorganically bonded to the conductor portion and the magnetic material portion. The connection via is connected to the conductor portion via the intermediate terminal.

[0014] A fourth aspect is the interposer according to the third aspect, wherein the magnetic material portion contains a ferrite ceramic sintered body as a main component.

[0015] A fifth aspect is the interposer according to the first or second aspect, wherein the connection via is directly connected to the conductor portion.

[0016] A sixth aspect is the interposer according to the fifth aspect, further comprising an insulating layer having via holes in which the connection vias are disposed, the insulating layer separating the wiring portion from each of the magnetic material portion and the insulating substrate.

[0017] A seventh aspect is the interposer according to the sixth aspect, wherein the via hole in the insulating layer is tapered toward the conductor portion.

[0018] An eighth aspect of the present invention is the interposer according to the sixth or seventh aspect, wherein the insulating layer contains an organic material.

[0019] A ninth aspect is the interposer according to any one of the first to eighth aspects, wherein the conductor portion and the magnetic portion are coupled to each other without an organic material therebetween.

[0020] A tenth aspect of the interposer is the interposer according to any one of the first to ninth aspects, wherein the conductor portion and the magnetic material portion are sintered together.

[0021] An eleventh aspect of the present invention is the interposer according to any one of the first to tenth aspects, wherein the wiring portion is a plating layer.

[0022] A twelfth aspect of the interposer according to any one of the first to eleventh aspects, wherein the insulating substrate contains an organic material.

[0023] Aspect 13 is a method for manufacturing an interposer according to any one of aspects 1 to 12, comprising: (a) a step of forming a chip as the inductor, the chip including the conductor portion extending along an extension direction and the magnetic portion surrounding the conductor portion; and (b) a step of placing the chip in the through hole of the insulating substrate so that the extension direction of the chip is along the thickness direction of the insulating substrate. a) includes the steps of: a1) preparing a first molded body containing magnetic powder and having a flat plate shape with a main surface parallel to the extension direction; a2) arranging at least one second molded body containing metal powder and extending along the extension direction on the main surface of the first molded body; a3) forming a laminate including the first molded body, the second molded body, and the third molded body by covering the second molded body arranged on the main surface of the first molded body with a third molded body containing magnetic powder and having a flat plate shape; and a4) firing the laminate so as to form the magnetic material portion from the first molded body and the third molded body and to form the conductor portion from the second molded body. [Effects of the Invention]

[0024] According to the interposers of the first to thirteenth aspects, first, the conductor portion is made of sintered metal. This makes it less likely for components of the magnetic material portion to be mixed into the conductor portion compared to when the conductor portion is made of other materials, such as plated metal. Second, the bottom surface of the connection via is separated from the magnetic material portion. This prevents components of the magnetic material portion from being mixed into the connection via. As a result, the variation in the electrical characteristics of the conductor portion and connection via included in the electrical path of the interposer is reduced. This makes it possible to reduce the variation in the electrical characteristics of the interposer.

[0025] Above aspect 1 3According to the method for manufacturing an interposer of the present invention, the dimension of the magnetic body in the thickness direction can be easily increased by adjusting the dimension of the second molded body arranged in the extension direction in a2). Therefore, compared to a manufacturing method in which the dimension of the magnetic body in the thickness direction is ensured depending on the number of times the stacking process is repeated, an interposer including a magnetic body having a large dimension in the thickness direction can be easily manufactured.

[0026] The objects, features, aspects, and advantages of the present invention will become more apparent from the following detailed description and the accompanying drawings. [Brief explanation of the drawings]

[0027] [Figure 1] FIG. 1 is a cross-sectional view schematically illustrating a configuration of an electronic device. [Figure 2] FIG. 2 is a cross-sectional view showing a modified example of an electronic device of FIG. [Figure 3] 3 is a schematic diagram showing the configuration of an inductor built into a core substrate. FIG. [Figure 4] 4 is a circuit diagram showing an example of electrical connections between the first inductor and the second inductor shown in FIG. 3. FIG. [Figure 5] 1 is a partial cross-sectional view schematically showing the configuration of an interposer according to a first embodiment. [Figure 6] 6 is a partial cross-sectional view schematically showing the configuration of a core substrate of the interposer of FIG. 5. [Figure 7] 7 is a cross-sectional view schematically showing the configuration of an inductor chip provided on the core substrate of FIG. 6. [Figure 8] FIG. 8 is a perspective view schematically illustrating the configuration of the inductor chip of FIG. [Figure 9] 3 is a flow diagram schematically showing a method for manufacturing the interposer according to the first embodiment. [Figure 10] 10 is a partial cross-sectional view schematically showing a step of inserting an inductor chip as one step in FIG. 9. FIG. [Figure 11]10 is a perspective view schematically showing a step for forming an inductor chip in the method for manufacturing the interposer of FIG. 9. FIG. [Figure 12] 10 is a perspective view schematically showing a step for forming an inductor chip in the method for manufacturing the interposer of FIG. 9. FIG. [Figure 13] 10 is a perspective view schematically showing a step for forming an inductor chip in the method for manufacturing the interposer of FIG. 9. FIG. [Figure 14] 10 is a perspective view schematically showing a step for forming an inductor chip in the method for manufacturing the interposer of FIG. 9. FIG. [Figure 15] 10 is a perspective view schematically showing a step for forming an inductor chip in the method for manufacturing the interposer of FIG. 9. FIG. [Figure 16] 10 is a perspective view schematically showing a step for forming an inductor chip in the method for manufacturing the interposer of FIG. 9. FIG. [Figure 17] 10 is a perspective view schematically showing a step for forming an inductor chip in the method for manufacturing the interposer of FIG. 9. FIG. [Figure 18] FIG. 10 is a partial cross-sectional view schematically illustrating the configuration of an interposer according to a second embodiment. [Figure 19] FIG. 11 is a partial cross-sectional view schematically showing the configuration of an interposer according to a third embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0028] Hereinafter, an embodiment of the present invention will be described with reference to the drawings.

[0029] <Preliminary explanation> First, a technique that can be combined with each of the embodiments described below will be described below.

[0030] 1 is a cross-sectional view schematically showing the configuration of electronic device 901. Electronic device 901 has interposer 700, semiconductor element 811 (die), motherboard 812, and package substrate 813. Interposer 700 has core substrate 601, wiring layer 791, and wiring layer 792.

[0031] The wiring layer 791 and the wiring layer 792 are respectively stacked on one surface and the other surface of the core substrate 601 (specifically, directly or indirectly on the first surface SF1 and the second surface SF2 described later). The wiring layer 791 and the wiring layer 792 may be stacked on the core substrate 601 by a build-up method or a sputtering method, or may be bonded as separate wiring boards.

[0032] The wiring layer 791 is preferably a multi-layer wiring layer configured so that the wiring dimensions (e.g., line and space (L / S) dimensions) are reduced from the side facing the core substrate 601 to the side facing the semiconductor element 811. This makes it possible to configure the interposer 700 on which the semiconductor element 811 having a small terminal pitch can be mounted, even if the wiring dimensions (L / S) of the core substrate 601 are not particularly fine. Specifically, the wiring layer 791 may be a laminate of a normal wiring layer facing the core substrate 601 and a fine wiring layer facing the semiconductor element 811.

[0033] Typically, the wiring layer may be formed by providing a wiring structure on a plate-shaped organic material member (e.g., an epoxy-based member) or inorganic material member (e.g., a low temperature co-fired ceramics (LTCC) member or a non-magnetic ferrite member). To form the wiring structure on this organic material member, for example, Cu plating is used. To form the wiring structure on the inorganic material member, when the inorganic material member is formed by a firing process, the wiring structure is simultaneously formed by firing Ag (silver), AgPd (silver palladium), or Cu (copper).

[0034] From the viewpoint of ease of forming fine wiring, the fine wiring layer is preferably formed by providing a wiring structure on a plate-shaped organic material member (e.g., an epoxy-based or polyimide-based member). To form the wiring structure on this organic material member, for example, Cu plating is used.

[0035] The semiconductor element 811 is mounted on the wiring layer 791 of the interposer 700. The semiconductor element 811 is connected to the wiring layer 791 of the interposer 700 by, for example, solder balls 821. The semiconductor element 811 may be an IC (Integrated Circuit) chip. In particular, when the IC chip is a processor chip having multiple processing cores, the above-mentioned voltage regulator can be configured using an inductor, which will be described later.

[0036] The interposer 700 is mounted on the package substrate 813 by bonding the wiring layer 792 to the package substrate 813. This bonding is performed, for example, by solder balls 823. The package substrate 813 is mounted on the motherboard 812, and this bonding is performed, for example, by using solder balls 822.

[0037] According to the above, the element side (the side facing the semiconductor element 811) of the interposer 700 is configured by the wiring layer 791, and the substrate side (the side facing the package substrate 813 and the motherboard 812) of the interposer 700 is configured by the wiring layer 792. A plurality of terminals (not shown) are provided on each of the element side and the substrate side of the interposer 700. The terminal pitch on the element side may be smaller than the terminal pitch on the substrate side, and in this case, the interposer 700 has a function of converting the terminal pitch. As a modification, depending on the application of the interposer, one or both of the wiring layer 791 and the wiring layer 792 may be omitted.

[0038] 2 is a cross-sectional view showing an electronic device 902 that is a modified example of the electronic device 901 (FIG. 1). In the electronic device 902, the interposer 700 is bonded to the motherboard 812 without the package substrate 813 (FIG. 1), and this bonding is performed by, for example, solder balls 822.

[0039] 3 is a schematic diagram showing the configuration of inductors built into core substrate 601. Core substrate 601 has multiple built-in inductors L1 and L2, and may also have further built-in inductors L3 to L6, etc., with any number of inductors. Note that, although the configuration of inductors L1 and L2 will be described in detail below, inductors L3 to L6, etc. may also have a similar configuration.

[0040] 4 is a circuit diagram showing an example of the electrical connection of inductor L1 and inductor L2 shown in FIG. 3. In this example, the series connection of inductor L1 and inductor L2 forms an inductor having a combined inductance greater than the inductance of each of these inductors, and both ends of the inductor are disposed on the second surface SF2 that faces the semiconductor element 811 (FIG. 1). This makes it possible to easily connect an inductor having a sufficiently large inductance to the semiconductor element 811. Note that the electrical connections between the multiple inductors built into the core substrate are not limited to those shown in FIG. 4 and may be designed appropriately depending on the application of the core substrate. This may form a series structure of any number of inductors, a parallel structure of any number of inductors, or a combination thereof.

[0041] <First Embodiment> FIG. 5 is a partial cross-sectional view schematically showing the configuration of an interposer 721 in the first embodiment. FIG. 6 is a partial cross-sectional view schematically showing the configuration of a core substrate 621 included in the interposer 721 (FIG. 5). FIG. 7 is a cross-sectional view schematically showing the configuration of an inductor chip 521 (a chip serving as an inductor) included in the core substrate 621 (FIG. 6). FIG. 8 is a perspective view schematically showing the configuration of the inductor chip 521 (FIG. 7). The interposer 721 has a use similar to that of the interposer 700 (FIGS. 1 and 2) described above. In other words, the interposer 721 is used to mount a semiconductor element 811 (FIGS. 1 and 2), and the core substrate 621 included in the interposer 721 has an inductor L1 and an inductor L2 built in it. Note that the core substrate 621 may have more inductors built in it, as described in the preliminary description above.

[0042] Interposer 721 includes core substrate 621 corresponding to core substrate 601 (FIGS. 1 and 2), a group of components corresponding to wiring layer 791 (FIGS. 1 and 2), and a group of components corresponding to wiring layer 792 (FIGS. 1 and 2). The group of components corresponding to wiring layer 791 (FIGS. 1 and 2) includes insulator layer 502, wiring portion 441A, and wiring portion 441B. The group of components corresponding to wiring layer 792 (FIGS. 1 and 2) includes insulator layer 501. The group of components corresponding to wiring layer 791 and wiring layer 792 (FIGS. 1 and 2) may be added as appropriate depending on the configuration of electronic device 901 (FIG. 1) or electronic device 902 (FIG. 2) in addition to the components shown in FIG. 5. The addition may be performed by a build-up method or a sputtering method, or by joining other components.

[0043] The core substrate 621 has an insulating substrate 100 and an inductor chip 521. The inductor chip 521 has conductor portions 201A and 201B, a magnetic portion 301, and intermediate terminals 481A and 481B.

[0044] The insulator substrate 100 may be made of an organic material, an inorganic material, or a mixture of these materials, such as a resin substrate or a ceramic substrate. Therefore, the insulator substrate 100 may contain an organic material. The insulator substrate 100 has a first surface SF1 and a second surface SF2 opposite the first surface SF1 in the thickness direction. The insulator substrate 100 also has a through-hole HL between the first surface SF1 and the second surface SF2.

[0045] Each of the conductor portion 201A and the conductor portion 201B passes through the through hole HL. Each of the conductor portion 201A and the conductor portion 201B may be a solid body. In other words, the conductor portion 20 1 A and conductor part 20 1 Each of the conductive portions 201A and 201B does not need to have a hollow space therein. This reduces the electrical resistance of the conductive portions 201A and 201B. The conductive portions 201A and 201B are made of a sintered material containing a sintered metal. The sintered metal may be made of at least one of Ag, AgPd, and Cu, for example. The sintered material of the conductive portions 201A and 201B may contain a ceramic material that has lower conductivity than the sintered metal, as long as its function as electrical wiring is maintained. The ratio of the ceramic material to the sintered metal is preferably 5% by volume or more and 30% by volume or less. By including a ceramic material in the material of the conductive portions 201A and 201B, the bond between the conductive portions 201A and 201B and the magnetic portion 301 can be strengthened. The particle size of the ceramic material is preferably 0.5 μm or more and 10 μm or less. The ceramic material is, for example, alumina, zirconia, magnesium oxide, or titanium oxide.

[0046] The magnetic body 301 surrounds the conductor parts 201A and 201B at the through hole HL. In the first embodiment, the magnetic body 301, together with the conductor parts 201A and 201B, respectively, constitutes the inductor L1 and the inductor L2 (FIG. 4). The magnetic body 301 is inorganically bonded to the conductor parts 201A and 201B. In other words, the inorganic material constituting each of the conductor parts 201A and 201B and the inorganic material constituting the magnetic body 301 are bonded to each other without an organic material, specifically by sintering. The magnetic body 301 is made of ceramics (ceramic sintered body). The magnetic body 301 does not need to contain an organic component. To reduce the volume of the inductor, it is desirable that the magnetic material constituting the magnetic body 301 has high magnetic permeability, and it is preferable that the magnetic body 301 has a density of 70% or more. To reduce the electrical loss of the inductor, the magnetic material constituting the magnetic body portion 301 is preferably a soft magnetic material with low magnetic loss at high frequencies, for example, a soft magnetic material with a magnetic loss tangent of 0.1 or less at a frequency of 100 MHz. To reduce magnetic loss at high frequencies, the magnetic material constituting the magnetic body portion 301 preferably has a high volume resistivity, specifically, is an electrical insulator. The magnetic body portion 301 preferably contains a ferrite-based ceramic sintered body as its main component. From the viewpoint of ease of manufacturing, the crystal structure of the ferrite-based ceramic sintered body material is preferably a spinel structure, and Ni-Zn ferrite or Ni-Zn-Cu ferrite is used, for example. To obtain even higher magnetic permeability, hexagonal ferrite with a c-axis orientation along the thickness direction (the vertical direction in FIG. 5) may be used.

[0047] The intermediate terminals 481A and 481B are primarily composed of sintered metal and may additionally contain a small amount of glass. The sintered metal is primarily composed of, for example, Ag, AgPd, or Cu. The intermediate terminal 481A faces the conductor portion 201A and the magnetic material portion 301 in the thickness direction and is inorganically bonded to the conductor portion 201A and the magnetic material portion 301. Similarly, the intermediate terminal 481B faces the conductor portion 201B and the magnetic material portion 301 in the thickness direction and is inorganically bonded to the conductor portion 201B and the magnetic material portion 301.

[0048] The wiring portion 441A and the wiring portion 441B may be plated layers. The wiring portion 441A has a wiring pattern 441pA and a connection via 441vA. The planar layout of the wiring pattern 441pA (the layout in the YZ plane in the drawing) may be designed according to the application of the interposer 721. Similarly, the wiring portion 441B has a wiring pattern 441pB and a connection via 441vB. The planar layout of the wiring pattern 441pB (the layout in the YZ plane in the drawing) may be designed according to the application of the interposer 721.

[0049] The connection via 441vA has a bottom surface electrically connected to the conductor portion 201A. In the first embodiment, the connection via 441vA is connected to the conductor portion 201A by an intermediate terminal 481. A The connection via 441vA is connected to the intermediate terminal 481A via the connection via 441vA. To achieve this connection, the bottom surface of the connection via 441vA is directly connected to the intermediate terminal 481A. Similarly, the connection via 441vB has a bottom surface that is electrically connected to the conductor portion 201B. In the first embodiment, the connection via 441vB is connected to the conductor portion 201B via the intermediate terminal 481B. To achieve this connection, the bottom surface of the connection via 441vB is directly connected to the intermediate terminal 481B.

[0050] The connection vias 441vA and 441vB are each spaced apart from the magnetic material part 301. Therefore, the bottom surfaces of the connection vias 441vA and 441vB are each spaced apart from the magnetic material part 301. Furthermore, the connection vias 441vA and 441vB are each spaced apart from the insulator substrate 100. Therefore, the bottom surfaces of the connection vias 441vA and 441vB are each spaced apart from the insulator substrate 100.

[0051] The insulator layer 502 has via holes HV2A and HV2B in which the connection vias 441vA and 441vB are respectively arranged. The insulator layer 502 may separate the magnetic material portion 301 from the wiring portion 441A and the wiring portion 441B. The insulator layer 502 may also separate the insulator substrate 100 from the wiring portion 441A and the wiring portion 441B. The insulator layer 502 has via holes HV2A and HV2B that expose the intermediate terminals 481A and 481B, respectively, and may locally cover the intermediate terminals 481A and 481B around the via holes HV2A and HV2B, respectively. The via holes HV2A and HV2B may be tapered toward the conductor portion 201A and the conductor portion 201B (downward in FIG. 5 ). The insulating layer 502 contains an organic material, for example, an epoxy-based material.

[0052] The connecting portion 480 electrically connects the conductor portion 201A and the conductor portion 201B to each other on the first surface SF1 of the insulator substrate 100. This results in a series connection between the inductor L1 and the inductor L2 (see the circuit diagram in FIG. 4). The material of the connecting portion 480 may be the same as the material of the intermediate terminals 481A and 481B.

[0053] In the first embodiment, the insulating layer 501 covers the connection portion 480. The material of the insulating layer 501 may be the same as that of the insulating layer 502.

[0054] FIG. 9 is a flow diagram schematically illustrating a method for manufacturing the interposer 721 (FIG. 5). First, in step ST10, the inductor chip 521 (FIGS. 7 and 8) is formed. Next, in step ST20, the inductor chip 521 is inserted into the insulator substrate 100 to obtain the core substrate 621 (FIG. 6). Next, in step ST30, the wiring portion 441A, the wiring portion 441B, the insulator layer 502, and the insulator layer 501 (FIG. 5) are formed using, for example, a build-up method. The wiring portions 441A and 441B may be plated layers. In this case, the wiring portions 441A and 441B and the insulator layer 502 may be formed using a semi-additive method, and may be formed, for example, roughly as follows: An organic insulating film is attached to the second surface SF2 of the core substrate 621 as the insulator layer 502, in which the via holes HV2A and HV2B have not yet been formed. Next, via holes HV2A and HV2B are formed by laser processing. Next, a seed layer is formed by electroless copper plating on the surface of the insulator layer 502, including the inner surfaces of the via holes HV2A and HV2B. Next, the wiring patterns 44 of the wiring portions 441A and 441B are formed. 1 pA,44 1 A plating resist exposing the area where pB will be formed is formed on the insulator layer 502. Next, electrolytic copper plating is performed using the seed layer and plating resist described above. Next, the plating resist is peeled off. This forms the wiring portions 441A and 441B.

[0055] The above manufacturing method provides the interposer 721. The above manufacturing method will be further described in detail below.

[0056] FIG. 10 is a partial cross-sectional view schematically illustrating step ST20 (FIG. 9). The inductor chip 521 formed in step ST10 includes conductor portions 201A and 201B extending along an extension direction, and magnetic material portion 301 surrounding these conductor portions 201A and 201B. The extension direction is the length direction of each of conductor portions 201A and 201B, and corresponds to the vertical direction in FIG. 10. In step ST20, the inductor chip 521 is placed in the through-hole HL of the insulator substrate 100 so that the extension direction of the inductor chip 521 is aligned with the thickness direction of the insulator substrate 100 (X direction in FIG. 10). This placement process can be performed by inserting the inductor chip 521 into the through-hole HL of the insulator substrate 100 with the extension direction of the inductor chip 521 aligned with the thickness direction of the insulator substrate 100, as shown by the arrow (FIG. 10). The inductor chip 521 and the insulating substrate 100 may be fixed together using an adhesive (not shown).

[0057] 11 to 17 are perspective views that schematically show the steps that are sequentially performed for step ST10 (FIG. 9). These steps will be described below.

[0058] Referring to FIG. 11, in step ST11 (FIG. 9), a first compact 1101 is prepared. The first compact 1101 contains magnetic powder. The magnetic powder is, for example, ferrite powder. The first compact 1101 may contain an organic binder for molding the magnetic powder. The first compact 1101 has a flat plate shape with a main surface PS (a main surface parallel to the XY plane in FIG. 11) parallel to the extension direction (the X direction in FIG. 11). The thickness of the flat plate shape is, for example, 150 μm.

[0059] Referring to FIG. 12, in step ST12 (FIG. 9), second compacts 1201A and 1201B are arranged on the main surface PS of the first compact 1101. The second compacts 1201A and 1201B contain metal powder. This arrangement step can be performed, for example, by printing a paste containing Ag powder, AgPd powder, or Cu powder and an organic binder. Note that in the first embodiment, two second compacts 1201A and 1201B are arranged, but as a modified example, any number of second compacts may be arranged. Each of the second compacts 1201A and 1201B extends along the extension direction (the X direction in FIGS. 11 and 12). The thickness of the second compacts 1201A and 1201B is, for example, 150 μm.

[0060] 13, the compact 1102 may be arranged so as to reduce the irregularities caused by the second compacts 1201A and 1201B on the main surface PS of the first compact 1101. The compact 1102 contains magnetic powder. The magnetic powder is, for example, ferrite powder. . Growth Feature 110 2 may contain an organic binder for molding the magnetic powder. This disposing step can be performed by printing a paste containing the magnetic powder and the organic binder. The thickness of the compact 1102 is, for example, 150 μm. The order of the step of disposing the second compact 1201A and the second compact 1201B and the step of disposing the compact 1102 can be arbitrary.

[0061] 14, in step ST13 (FIG. 9), second compacts 1201A and 1201B arranged on main surface PS (see FIG. 12) of first compact 1101 are covered with third compact 1103. Similar to first compact 1101, third compact 1103 contains magnetic powder and has a flat plate shape. This forms a stacked body SG including first compact 1101, second compacts 1201A and 1201B, and third compact 1103. Note that stacked body SG may also include compact 1102 described above. When forming stacked body SG, pressing may be performed at a pressure of about 4 to 10 MPa, and heating may be performed at a temperature of about 100°C.

[0062] 15, in step ST14 (FIG. 9), stacked body SG (FIG. 14) is fired to obtain sintered body SS. Through this firing, magnetic body 301 is formed from first compact 1101, compact 1102, and third compact 1103. Furthermore, conductor portions 201A and 201B are formed from second compacts 1201A and 1201B, respectively.

[0063] 16, the sintered body SS may be cut as needed, as indicated by the dashed line SW in the figure, so as to adjust the length of the sintered body SS (the dimension in the X direction in the figure). By this cutting, the number of sintered bodies SS can be increased.

[0064] Referring to FIG. 17, fourth compacts 1481A and 1481B are arranged so as to contact one end of conductor 201A and one end of conductor 201B, respectively. Furthermore, fifth compact 1480 is arranged so as to contact both the other end of conductor 201A and the other end of conductor 201B. Fourth compacts 1481A, 1481B, and fifth compact 1480 contain metal powder. This arrangement process can be performed, for example, by printing a paste containing Ag powder, an organic binder, and a trace amount of glass. Fourth compacts 1481A, 1481B, and fifth compact 1480 have a thickness of, for example, 20 μm. Each of fourth compacts 1481A and 1481B has a circular shape with a diameter of, for example, 260 μm in the YZ plane. Next, fourth compacts 1481A, 1481B, and fifth compact 1480 are fired. This firing is carried out, for example, in the atmosphere at a temperature of 600 to 800° C. By this firing, intermediate terminals 481A and 481B and connecting portion 480 (FIG. 8) are formed from fourth compacts 1481A and 1481B and fifth compact 1480, respectively.

[0065] Thus, step ST10 (FIG. 9) of forming inductor chip 521 (FIG. 8) is completed. According to the above-described manufacturing method, the outer shape of magnetic material portion 301 of inductor chip 521 has, for example, a thickness (dimension in the X direction) of 1 mm, a width (dimension in the Z direction) of 360 μm, and a depth (dimension in the Y direction) of 720 μm. Furthermore, conductor portions 201A and 201B of inductor chip 521 are formed from second molded bodies 1201A and 1201B (FIG. 12), which are formed on main surface PS of first molded body 1101. Accordingly, each of conductor portions 201A and 201B has a flat surface parallel to the thickness direction (X direction). More specifically, each of conductor portions 201A and 201B may have a rectangular shape in a cross section perpendicular to the thickness direction (X direction in FIG. 8), for example, a square shape with sides of 120 μm.

[0066] According to the interposer 721 (FIG. 5) of the first embodiment, first, the conductor portions 201A and 201B are made of sintered metal. This makes it less likely that components of the magnetic material portion 301 will be mixed into the conductor portions 201A and 201B than when the conductor portions 201A and 201B are made of other materials, such as plated metal. Second, the bottom surfaces of the connection vias 441vA and 441vB are spaced apart from the magnetic material portion 301. This prevents components of the magnetic material portion 301 from being mixed into the connection vias 441vA and 441vB. As a result, variations in the electrical characteristics (particularly conductivity) of the conductor portions 201A and 201B and the connection vias 441vA and 441vB included in the electrical paths of the interposer 721 are reduced. This reduces variations in the electrical characteristics of the interposer 721.

[0067] Furthermore, magnetic material section 301 (FIG. 5) is made of a sintered ceramic body, rather than a resin with dispersed magnetic particles. By densely sintering the ceramic, the magnetic permeability of magnetic material section 301 can be sufficiently increased. Therefore, core substrate 621 can incorporate an inductor with a large inductance per unit area.

[0068] According to the manufacturing method of interposer 721 of the first embodiment, by adjusting the dimensions in the extension direction (X direction in FIG. 12) of second molded bodies 1201A and 1201B arranged in step ST12 (FIG. 9), it is possible to easily increase the dimension in the thickness direction of magnetic body part 301. Therefore, compared to a manufacturing method in which the dimension in the thickness direction (X direction in FIG. 5) of magnetic body part 301 (FIG. 5) is ensured depending on the number of times the stacking process is repeated, it is possible to easily manufacture interposer 721 including magnetic body part 301 having a large dimension in the thickness direction.

[0069] <Embodiment 2> FIG. 18 is a partial cross-sectional view schematically illustrating the configuration of an interposer 722 according to the second embodiment. The interposer 722 includes a core substrate 622. The core substrate 622 includes an inductor chip 522. The inductor chip 522 has a conductor portion 201 similar to one of the conductor portions 201A and 201B of the inductor chip 521 (FIG. 5: first embodiment) in place of these conductor portions, an intermediate terminal 481 similar to one of the intermediate terminals 481A and 481B in place of these intermediate terminals, and a wiring portion 441 similar to one of the wiring portions 441A and 441B in place of these wiring portions. The wiring portion 441 has a wiring pattern 441p and a connection via 441v. Furthermore, the insulator layer 502 has a via hole HV2 similar to one of the via holes HV2A and HV2B in place of these via holes. A connection via 441v is arranged in the via hole HV2. Furthermore, inductor chip 522 has intermediate terminal 483 having a configuration similar to intermediate terminal 481, instead of connection portion 480 (FIG. 5: embodiment 1). Correspondingly, interposer 722 has wiring portion 443 having a configuration similar to wiring portion 441. Wiring portion 443 has wiring pattern 443p and connection via 443v. Insulator layer 501 has via hole HV1 in which connection via 443v is arranged.

[0070] According to the second embodiment, the same effects as those of the first embodiment can be obtained.

[0071] <Third Embodiment> FIG. 19 is a partial cross-sectional view schematically showing the configuration of an interposer 723 in the third embodiment. The interposer 723 includes a core substrate 623. The core substrate 623 includes an inductor chip 523. The interposer 723 has a configuration in which the intermediate terminals 481 and 483 in the interposer 722 (FIG. 18) are omitted. As a result, in the third embodiment, the connection vias 441v and 443v are each directly connected to the conductor portion 201. The insulator layer 502 separates the magnetic material portion 301 and the insulator substrate 100 from the wiring portion 441. Similarly, the insulator layer 501 separates the magnetic material portion 301 and the insulator substrate 100 from the wiring portion 443.

[0072] Each of the via holes HV1 and HV2 may be tapered toward the conductor portion 201. This allows the connection vias 441v and 443v to avoid contact with the magnetic material portion 301, while increasing the cross-sectional area of ​​the connection vias 441v and 443v at locations away from the magnetic material portion 301. This makes it possible to suppress the electrical resistance of the connection vias 441v and 443v.

[0073] The third embodiment also provides substantially the same effects as the first embodiment. Furthermore, the omission of intermediate terminals 481 and 483 simplifies the configuration of the interposer. However, if it is important to ensure electrical connection to the end face of conductor portion 201 over a wide area, the second embodiment, which includes intermediate terminals 481 and 483, is preferable. As a modification of the first embodiment, similar to the third embodiment, intermediate terminals 481A and 481B may be omitted. [Explanation of symbols]

[0074] 100: Insulator substrate 201, 201A, 201B: Conductor part 301: Magnetic material part 441,441A,441B,443: Wiring section 441p, 441pA, 441pB, 443p: Wiring pattern 441v, 441vA, 441vB, 443v: Connection via 480: Connection 481,481A,481B,483: Intermediate terminal 501, 502: Insulator layers 521~523: Inductor chip 621~623: Core substrate 721~723: Interposer 811: Semiconductor element HL:Through hole HV1, HV2, HV2A, HV2B: Via holes L1 to L6: inductors SF1: 1st page SF2:Side 2

Claims

1. An interposer with a built-in inductor for mounting a semiconductor element, an insulating substrate having a first surface and a second surface opposite to the first surface in a thickness direction, the insulating substrate having a through hole between the first surface and the second surface; a conductor portion passing through the through hole and made of a sintered material including a sintered metal; a magnetic material portion surrounding the conductor portion in the through hole, made of ceramics, inorganically bonded to the conductor portion, and constituting the inductor together with the conductor portion; a wiring portion including a connection via having a bottom surface electrically connected to the conductor portion; an intermediate terminal whose main component is a sintered metal, facing each of the conductor portion and the magnetic material portion in the thickness direction, and inorganically bonded to each of the conductor portion and the magnetic material portion; an insulator layer having a via hole in which the connection via is disposed; Equipped with the wiring portion is a plating layer, the bottom surface of the connection via is spaced apart from the magnetic material portion, the connection via is connected to the conductor portion through the intermediate terminal, the insulating layer separates the magnetic material portion and the insulating substrate from the wiring portion, The interposer, wherein the insulator layer comprises an organic material.

2. The interposer of claim 1 , wherein the conductor portion is a solid body.

3. 3. The interposer according to claim 1, wherein the magnetic material portion contains a ferrite ceramic sintered body as a main component.

4. The interposer according to claim 1 or 2, wherein the insulating substrate contains an organic material.

5. A method for manufacturing an interposer according to claim 1 or 2, comprising: a) forming a chip as the inductor, the chip including the conductor portion extending along an extension direction and the magnetic material portion surrounding the conductor portion; b) placing the chip in the through-hole of the insulating substrate such that the extending direction of the chip is along the thickness direction of the insulating substrate; Equipped with The a) is a1) preparing a first compact containing magnetic powder and having a flat plate shape with a main surface parallel to the extension direction; a2) disposing at least one second compact containing a metal powder on the main surface of the first compact and extending along the extension direction; a3) forming a laminate including the first compact, the second compact, and the third compact by covering the second compact arranged on the main surface of the first compact with a third compact containing magnetic material powder and having a flat plate shape; a4) firing the laminate so as to form the magnetic body from the first compact and the third compact and to form the conductor body from the second compact; Including, A method for manufacturing an interposer.

Citation Information

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