Voltage regulator

Abstract

To compensate for a voltage drop due to wiring resistance of a voltage regulator.SOLUTION: A voltage regulator according to an embodiment comprises: an error amplifier; a reference voltage source; a phase compensation circuit; and an offset voltage regulation circuit. The error amplifier is inputted with feedback of output voltage via an inverting input terminal. The reference voltage source supplies reference voltage to a noninverting input terminal of the error amplifier. The phase compensation circuit is connected between a reference-voltage output terminal of the reference voltage source and the noninverting input terminal of the error amplifier, and provides a phase margin of positive feedback from a load terminal. The offset voltage regulation circuit is connected between a ground terminal of the reference voltage source and a ground-potential earth line, and applies an offset voltage to the ground terminal of the reference voltage source.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] TECHNICAL FIELD Embodiments herein relate to a voltage regulator. [Background technology]

[0002] Conventionally, voltage regulators have been used in various electronic devices to stably supply a required power supply voltage to a load. For example, a voltage regulator is configured to control a power transistor so that the output voltage becomes a desired voltage based on the difference between an output voltage detected by an error amplifier and a reference voltage. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2014-010563 Summary of the Invention [Problem to be solved by the invention]

[0004] However, a problem with voltage regulators is that the voltage at the load end drops due to the resistance component of the wiring, that is, the wiring resistance.

[0005] SUMMARY OF THE INVENTION In view of the above, an object of the present invention is to compensate for a voltage drop caused by wiring resistance in a voltage regulator. [Means for solving the problem]

[0006] To solve the above-mentioned problems and achieve the object, a voltage regulator according to an embodiment includes an error amplifier, a reference voltage source, a phase compensation circuit, and an offset voltage adjustment circuit. The error amplifier receives feedback of the output voltage at its inverting input terminal. The reference voltage source supplies a reference voltage to the non-inverting input terminal of the error amplifier. The phase compensation circuit is connected between the reference voltage output terminal of the reference voltage source and the non-inverting input terminal of the error amplifier, and generates a phase margin for positive feedback from the load end. The offset voltage adjustment circuit is connected between the ground terminal of the reference voltage source and a ground line at ground potential, and applies an offset voltage to the ground terminal of the reference voltage source. The offset voltage adjustment circuit includes a current source that generates a current corresponding to the output current or input current of a voltage regulator, and a resistor connected between one end of the current source and a ground line at ground potential, and the ground terminal of the reference voltage source is connected to a connection point between the resistor where an offset voltage is generated and one end of the current source. [Effects of the Invention]

[0007] According to the present invention, it is possible to compensate for the voltage drop caused by the wiring resistance in the voltage regulator. [Brief explanation of the drawings]

[0008] [Figure 1] FIG. 1 is a diagram illustrating an example of the configuration of a voltage regulator according to an embodiment. [Figure 2] FIG. 2 is a diagram illustrating an example of the configuration of a phase compensation circuit in the voltage regulator according to the embodiment. [Figure 3] FIG. 3 is a diagram illustrating another example of the configuration of the phase compensation circuit in the voltage regulator according to the embodiment. [Figure 4] FIG. 4 is a diagram showing another example of the configuration of the phase compensation circuit in the voltage regulator according to the embodiment. [Figure 5] FIG. 5 is a diagram showing another example of the configuration of the phase compensation circuit in the voltage regulator according to the embodiment. [Figure 6] FIG. 6 is a diagram showing another example of the configuration of the phase compensation circuit in the voltage regulator according to the embodiment. [Figure 7] FIG. 7 is a diagram illustrating another example of the configuration of the voltage regulator according to the embodiment. [Figure 8]FIG. 8 is a diagram showing an example of the configuration of a voltage regulator that does not include an offset voltage adjustment circuit, unlike the voltage regulator according to the embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0009] Hereinafter, embodiments of the voltage regulator will be described in detail with reference to the drawings. In the following embodiments, parts with the same reference numerals perform similar operations, and redundant explanations will be omitted as appropriate. In the following embodiments, "connection" means "electrical connection."

[0010] Fig. 1 is a diagram showing an example of the configuration of a voltage regulator 1 according to an embodiment. The voltage regulator 1 is a power supply device configured to supply a required voltage to a load 40 using an input voltage supplied from an external power supply 10. Fig. 1 also shows a schematic example of a wiring resistance Rw1 on the positive side and a wiring resistance Rw2 on the negative side of the load end of the voltage regulator 1.

[0011] External power supply 10 is a power supply that supplies a power supply voltage to voltage regulator 1. One end of external power supply 10 is connected to external input terminal VSUP of power supply circuit 20, and the other end is connected to a node at ground potential (hereinafter referred to as the ground line). Load 40 is a load that operates using the power supply voltage supplied from voltage regulator 1. Load 40 may be a load that requires a variable power supply voltage depending on a request to reduce power consumption or the intended use, or may be a load that operates at a constant voltage. Load 40 has a + terminal connected to the positive side of the load end of voltage regulator 1, and a - terminal connected to the negative side of the load end of voltage regulator 1, i.e., the ground line.

[0012] As shown in FIG. 1, the voltage regulator 1 includes a power supply circuit 20, an offset voltage adjustment circuit 30, a capacitor C1, a capacitor C2, a resistor R1, and a resistor R2.

[0013] Resistors R1 and R2 are connected in series between the positive side of the load end of voltage regulator 1 and the ground line. In other words, resistors R1 and R2 are connected in parallel to load 40. In the example shown in FIG. 1, resistor R1 is connected between resistor R2 and the positive side of the load end. Resistor R2 is connected between resistor R1 and the ground line. The resistance values ​​of resistors R1 and R2 may be determined so as to generate a voltage division according to, for example, wiring resistance Rw1 on the positive side of the load end and the voltage value required by load 40.

[0014] The power supply circuit 20 supplies a voltage required by the load 40. The power supply circuit 20 outputs a predetermined voltage to the external output terminal OUT using an input voltage supplied from an external input terminal VSUP. The external input terminal VSUP is connected to one end of the external power supply 10. The external output terminal OUT is connected to a ground line via a capacitor C2. The external output terminal OUT is also connected to the + terminal of the load 40. In other words, the load 40 is connected to the external output terminal OUT in parallel with the capacitor C2.

[0015] As shown in FIG. 1, the power supply circuit 20 includes a reference voltage source 21, an impedance element 23, and an error amplifier 25.

[0016] The reference voltage source 21 generates a reference voltage in the power supply circuit 20 using an input voltage from an external input terminal VSUP. Specifically, the reference voltage source 21 is a voltage source that generates a reference voltage that is input to a non-inverting input terminal (+) of the error amplifier 25 via an impedance element 23. That is, the reference voltage source 21 supplies a reference voltage from an output terminal BGR-OUT to the non-inverting input terminal (+) of the error amplifier 25. For example, a BGR (Band Gap Reference) circuit is used as the reference voltage source 21. The reference voltage source 21 is connected between the external input terminal VSUP and a ground terminal BGR-GND.

[0017] The error amplifier 25 is an operational amplifier that outputs an amplified result according to the potential difference between its non-inverting input terminal (+) and inverting input terminal (-). The non-inverting input terminal (+) of the error amplifier 25 is connected to the output terminal BGR-OUT of the reference voltage source 21 via an impedance element 23. The non-inverting input terminal (+) of the error amplifier 25 is connected to the input terminal INP of the power supply circuit 20. The inverting input terminal (-) of the error amplifier 25 is connected to the input terminal INN of the power supply circuit 20. The input terminal INN is connected to the connection point between the resistors R1 and R2. As described above, the resistors R1 and R2 are connected in series between the external output terminal OUT and the ground line. That is, a divided voltage (feedback) of the output voltage is input to the inverting input terminal (-) of the error amplifier 25. The inverting input terminal (-) of the error amplifier is connected to the positive side of the load via the input terminal INN and the resistor R1.

[0018] 1 also illustrates a PMOS transistor 251 and an NMOS transistor 253 as the output stage of the error amplifier 25. For simplicity of explanation, the input stage and gain stage of the error amplifier 25 are omitted in the example shown in FIG.

[0019] One of the drain and source of the PMOS transistor 251 is connected to the external input terminal VSUP, and the other is connected to one of the drain and source of the NMOS transistor 253. The other of the drain and source of the NMOS transistor 253 is connected to the ground line via the ground terminal GND. The drains or sources of the PMOS transistor 251 and the NMOS transistor 253 are connected to the external output terminal OUT of the power supply circuit 20.

[0020] The impedance element 23 and the capacitor C1 constitute a phase compensation circuit 35. The phase compensation circuit 35 is a circuit that generates a phase margin by, for example, adding a delay to the positive feedback from the negative side of the load terminal of the voltage regulator 1 connected to the load 40. FIG. 2 is a diagram illustrating an example of the configuration of the phase compensation circuit 35 in the voltage regulator 1 according to the embodiment. FIG. 2 illustrates a resistor R5 as the impedance element 23. That is, the resistor R5 is a resistive element connected between the output terminal BGR-OUT of the reference voltage source 21 and the non-inverting input terminal (+) of the error amplifier 25. The resistor R5 and the non-inverting input terminal (+) of the error amplifier 25 are each connected to the input terminal INP of the power supply circuit 20. The input terminal INP is connected to the ground line via the capacitor C1. In other words, the capacitor C1 is connected between the non-inverting input terminal (+) of the error amplifier 25 and the ground line at ground potential.

[0021] Offset voltage adjustment circuit 30 is a circuit that applies an offset voltage to the ground terminal of reference voltage source 21. Specifically, offset voltage adjustment circuit 30 is a circuit that feeds back the negative potential of the load end of voltage regulator 1, i.e., the potential of the - terminal of load 40, to the ground terminal BGR-GND of reference voltage source 21. In other words, offset voltage adjustment circuit 30 is a circuit that raises the potential of the ground terminal BGR-GND of reference voltage source 21 by applying an offset voltage in accordance with the potential of the - terminal of load 40.

[0022] As shown in FIG. 1, the offset voltage adjustment circuit 30 includes resistors R3 and R4. Resistors R3 and R4 are an example of multiple resistors connected in series between the negative side of the load and a ground line at ground potential. The resistance values ​​of resistors R3 and R4 may be determined so as to generate a voltage division (offset voltage) corresponding to wiring resistance Rw2 on the negative side of the load. For example, if the resistance values ​​of wiring resistance Rw1 on the positive side of the load and wiring resistance Rw2 on the negative side are equal, the resistance values ​​of resistors R1, R2, R3, and R4 may be set so that R1:R2=R3:R4. In the example shown in FIG. 1, resistors R3 and R4 are connected in series between the negative side of the load and a ground line of the voltage regulator 1. Resistor R3 is connected between the negative side of the load and resistor R4. Resistor R4 is connected between resistor R3 and a ground line. The junction of resistors R3 and R4 is connected to the ground terminal BGR-GND of the reference voltage source 21. That is, the ground terminal BGR-GND of the reference voltage source 21 is connected to the connection point of the plurality of resistors R3 and R4 where the offset voltage is generated.

[0023] 8 is a diagram showing an example of the configuration of a voltage regulator 5 that, unlike the voltage regulator 1 according to the embodiment, does not include an offset voltage adjustment circuit 30. As shown in Fig. 8, in the voltage regulator 5, the ground terminal of the reference voltage source 21 is connected to the ground line via the ground terminal GND. In other words, the voltage regulator 5 does not include the offset voltage adjustment circuit 30 according to the embodiment.

[0024] In the past, even if the external output terminal OUT was at the desired voltage, the voltage at the positive terminal of the load could be lower than the desired voltage due to the voltage drop caused by the wiring resistance Rw1. Similarly, the voltage drop caused by the wiring resistance Rw2 could increase the potential at the negative terminal of the load, and the potential difference required by the load could not be obtained at the load end.

[0025] 8, a voltage regulator 5 serving as a general linear regulator can output an output voltage that takes into account the voltage drop caused by the wiring resistance by, for example, performing feedback from near the positive terminal of the load in order to suppress the voltage drop at the load end caused by the wiring resistance. On the other hand, a voltage regulator 5 that does not have an offset voltage adjustment circuit 30 cannot detect the wiring resistance on the negative side of the load end, and therefore cannot suppress the voltage drop caused by the wiring resistance on the negative side of the load end.

[0026] Furthermore, in order to detect the wiring resistance on the negative side of the load terminal, it is necessary to install a circuit for correction, such as a sense circuit, which makes it difficult to reduce the size and cost of the circuit configuration.

[0027] On the other hand, the voltage regulator 1 according to this embodiment has an offset voltage adjustment circuit 30 that is connected between the ground terminal of the reference voltage source 21 and a ground line at ground potential and that applies an offset voltage to the ground terminal of the reference voltage source 21. That is, in the voltage regulator 1 according to this embodiment, the offset voltage adjustment circuit 30 that feeds back the voltage at the load end is provided so as to be connected to the ground terminal BGR-GND that is connected to the ground terminal of the reference voltage source 21 and the ground line.

[0028] Therefore, according to the voltage regulator 1 of this embodiment, an offset voltage is applied by feeding back the voltage at the load end to the ground side of the reference voltage source 21, and the potential at the ground side of the reference voltage source 21 can be raised in accordance with the voltage drop due to wiring resistance. In other words, according to the voltage regulator 1 of this embodiment, voltage correction at the load end is possible without incorporating a correction circuit such as a sense circuit. In other words, according to the voltage regulator 1 of this embodiment, voltage drops due to wiring resistance can be compensated for. As a result, the voltage supplied to the load end can be stabilized without increasing the size of the internal circuitry of the voltage regulator 1.

[0029] Furthermore, the voltage regulator 1 according to this embodiment includes a phase compensation circuit 35 that is connected between the reference voltage output terminal BGR-OUT of the reference voltage source 21 and the non-inverting input terminal (+) of the error amplifier 25 and generates a phase margin in the positive feedback from the load end. As illustrated in FIG. 8, a typical linear regulator may also include a capacitor C1 for the purpose of reducing white noise in the reference voltage from the reference voltage source 21, similar to the capacitor C1 of the phase compensation circuit 35.

[0030] On the other hand, unlike voltage regulator 5 in which reference voltage source 21 is connected to the ground line via ground terminal GND, voltage regulator 1 in this embodiment has ground terminal BGR-GND of reference voltage source 21 connected to the ground line via offset voltage adjustment circuit 30. In other words, in addition to reducing white noise, voltage regulator 1 in this embodiment can achieve the effect of slowing down the speed of positive feedback to make the voltage rise gentler and suppressing oscillation due to positive feedback.

[0031] The impedance element 23 of the phase compensation circuit 35 is not limited to the resistor R5, and other circuit configurations may also be used.

[0032] For example, amplifiers 231 and 233 with limited output current can be used as the impedance element 23.

[0033] 3 is a diagram showing another example of the configuration of the phase compensation circuit 35 in the voltage regulator 1 according to the embodiment. The phase compensation circuit 35 in FIG. 3 has a transconductance amplifier (mutual conductance (gm) amplifier) ​​231 as the impedance element 23.

[0034] 3, the transconductance amplifier 231 is connected between the reference voltage output terminal BGR-OUT of the reference voltage source 21 and the non-inverting input terminal (+) of the error amplifier 25. Specifically, the non-inverting input terminal (+) of the transconductance amplifier 231 is connected to the reference voltage output terminal BGR-OUT of the reference voltage source 21. The inverting input terminal (-) of the transconductance amplifier 231 is connected to the output terminal of the transconductance amplifier 231. The output terminal of the transconductance amplifier 231 is connected to the non-inverting input terminal (+) of the error amplifier 25, and is also connected to the ground line via the input terminal INP and the capacitor C1. Even with this configuration, the same effects as those of the above-mentioned embodiment can be obtained.

[0035] 4 is a diagram showing another example of the configuration of the phase compensation circuit 35 in the voltage regulator 1 according to the embodiment. The phase compensation circuit 35 in FIG.

[0036] The two-stage amplifier 233 includes, for example, a differential stage and an output stage that is provided after the differential stage and has a weaker source capability than the differential stage. In other words, the two-stage amplifier 233 can be described as an amplifier with a limited second-stage current capability. As shown in FIG. 4 , the two-stage amplifier 233 is connected between the reference voltage output terminal BGR-OUT of the reference voltage source 21 and the non-inverting input terminal (+) of the error amplifier 25. Specifically, the non-inverting input terminal (+) of the two-stage amplifier 233 is connected to the reference voltage output terminal BGR-OUT of the reference voltage source 21. The inverting input terminal (−) of the two-stage amplifier 233 is connected to the output terminal of the two-stage amplifier 233. The output terminal of the two-stage amplifier 233 is connected to the non-inverting input terminal (+) of the error amplifier 25 and is also connected to the ground line via the input terminal INP and a capacitor C1. Even with this configuration, the same effects as those of the above-described embodiment can be obtained.

[0037] Furthermore, for example, a circuit configuration in which a capacitor C3 or a diode D1 is connected in parallel to a resistor R5 can be used as the impedance element 23.

[0038] 5 is a diagram showing another example of the configuration of the phase compensation circuit 35 in the voltage regulator 1 according to the embodiment. The phase compensation circuit 35 in FIG. 5 has a resistor R5 and a capacitor C3 connected in parallel with the resistor R5 as the impedance element 23. Even with this configuration, the same effects as those of the above-described embodiment can be obtained.

[0039] 6 is a diagram showing another example of the configuration of the phase compensation circuit 35 in the voltage regulator 1 according to the embodiment. The phase compensation circuit 35 in FIG. 6 includes, as the impedance element 23, a resistor R5 and a diode D1 connected in parallel to the resistor R5.

[0040] Diode D1 is a circuit element that blocks reverse current flow from the input terminal INP or the non-inverting input terminal (+) of error amplifier 25 to the output terminal BGR-OUT of reference voltage source 21. A high-speed charging diode that reduces loss due to forward voltage and switching loss may be used as diode D1. The anode of diode D1 is connected to the output terminal BGR-OUT of reference voltage source 21, and the cathode is connected to the input terminal INP and the non-inverting input terminal (+) of error amplifier 25. Even with this configuration, the same effects as those of the above-mentioned embodiment can be obtained.

[0041] In the voltage regulator 1 according to each of the above-described embodiments, the wiring resistance Rw1 on the positive side of the load end may be known. Fig. 7 is a diagram showing another example of the configuration of the voltage regulator 1 according to the embodiments.

[0042] 7, the end of resistor R1 opposite to the connection point with resistor R2 is connected to external output terminal OUT. That is, the inverting input terminal (-) of error amplifier 25 is connected to the output terminal of error amplifier 25 instead of the positive side of the load.

[0043] 7, the offset voltage adjustment circuit 30 has multiple resistors R6 and R7 instead of the multiple resistors R3 and R4. That is, in the voltage regulator 1 of FIG. 7, the ground terminal BGR-GND of the reference voltage source 21 is connected to the junction of the multiple resistors R6 and R7, where the offset voltage is generated. The resistance values ​​of the resistors R6 and R7 may be determined so as to generate a divided voltage (offset voltage) corresponding to the wiring resistances Rw1 and Rw2 at the load end. Here, it is assumed that the resistance value of the wiring resistance Rw1 on the positive side of the load end is known.

[0044] 7, in addition to the voltage drop caused by the wiring resistance Rw2 on the negative side of the load end, the voltage drop caused by the wiring resistance Rw1 on the positive side of the load end, whose resistance value is known, can be compensated for by the offset voltage adjustment circuit 30. Therefore, in addition to the effects similar to those of the above-described embodiment, the voltage regulator 1 of FIG. 7 has the effect of eliminating the need for a sense wiring on the positive side of the load end, i.e., the wiring between resistor R1 and the positive side of the load end.

[0045] In the voltage regulator 1 according to each of the above-described embodiments, the offset voltage adjustment circuit 30 may include a current source that generates a current proportional to the output current or input current of the voltage regulator 1, and a resistor.

[0046] For example, in the voltage regulator 1 of FIG. 1, the offset voltage adjustment circuit 30 may include a current source instead of the resistor R3 to generate a divided voltage (offset voltage) corresponding to the wiring resistance Rw2 on the negative side of the load. Specifically, the output terminal of the current source, like one terminal of the resistor R3, is connected to the ground terminal BGR-GND of the reference voltage source 21 at the connection point with the resistor R4. Unlike the other terminal of the resistor R3, the input terminal of the current source is connected to a node within the power supply circuit 20, such as the output terminal BGR-OUT or the external input terminal VSUP. Note that the input terminal of the current source is not limited to a node within the power supply circuit 20, and may be connected to a node external to the power supply circuit 20. The current source supplies a current to the resistor R4 that corresponds to the output current from the external output terminal OUT of the voltage regulator 1 or the input current to the external input terminal VSUP. The resistor R4 generates an offset voltage corresponding to the current from the current source. The current source may be provided either inside or outside the power supply circuit 20, as long as it generates a current corresponding to the output current or input current of the voltage regulator 1. This configuration also provides the same effects as the above-described embodiment. Furthermore, even when the current supplied to the load 40 is not constant, an offset voltage is generated according to the increase or decrease in the current supplied to the load 40, making it possible to compensate for the voltage drop caused by the wiring resistance with high precision.

[0047] For example, in the voltage regulator 1 of FIG. 1, the offset voltage adjustment circuit 30 supplies a current from the current source to resistor R4 so as to generate a divided voltage (offset voltage) corresponding to a wiring resistance of a predetermined resistance value. Here, the predetermined resistance value of the wiring resistance is, for example, equal to or greater than the resistance value of wiring resistor Rw2. With this configuration, in addition to the same effects as the above-described embodiment, it is possible to obtain an effect that the resistor R3 and the sense wiring on the negative side of the load end, i.e., the wiring between resistor R4 and the negative side of the load end, are not required.

[0048] For example, in the voltage regulator 1 of FIG. 7, the offset voltage adjustment circuit 30 may include a current source instead of the resistor R6 to generate a divided voltage (offset voltage) corresponding to the wiring resistances Rw1 and Rw2 at the load end. Specifically, the output terminal of the current source, like one terminal of the resistor R6, is connected to the ground terminal BGR-GND of the reference voltage source 21 at the connection point with the resistor R7. Unlike the other terminal of the resistor R6, the input terminal of the current source is connected to a node within the power supply circuit 20, such as the output terminal BGR-OUT or the external input terminal VSUP. Note that the input terminal of the current source is not limited to a node within the power supply circuit 20, and may be connected to a node external to the power supply circuit 20. The current source supplies a current to the resistor R7 that corresponds to the output current from the external output terminal OUT of the voltage regulator 1 or the input current to the external input terminal VSUP. The resistor R7 generates an offset voltage corresponding to the current from the current source. The current source may be provided either inside or outside the power supply circuit 20, as long as it generates a current corresponding to the output current or input current of the voltage regulator 1. This configuration also provides the same effects as the above-described embodiment. Furthermore, even when the current supplied to the load is not constant, an offset voltage is generated according to the increase or decrease in the current supplied to the load, making it possible to compensate for the voltage drop caused by the wiring resistance with high precision.

[0049] 7, the offset voltage adjustment circuit 30 supplies a current from the current source to resistor R7 so ​​as to generate a divided voltage (offset voltage) corresponding to a wiring resistance of a predetermined resistance value. Here, the predetermined wiring resistance is, for example, equal to or greater than the sum of the wiring resistances Rw1 and Rw2. This configuration not only provides the same effects as the above-described embodiment, but also provides the effect of eliminating the need for resistor R3 and the sense wiring at the load end.

[0050] In the voltage regulator 1 according to the above-described embodiments, the resistors R3, R4 and the resistors R6, R7 each include two resistor elements. However, this is not limiting. The resistors R3, R4 and the resistors R6, R7 may each include three or more resistor elements. Furthermore, as described above, when a current source is provided instead of the resistor R3 or when a current source is provided instead of the resistor R6, the resistors R4 and R7 may each include two or more resistor elements. Furthermore, although not shown in the above-described embodiments, a capacitor may be added in parallel to the resistor R4 or R7. Adding a capacitor in this manner can smooth out voltage changes in the generated offset voltage and generate a phase margin similar to the phase compensation circuit 35. This configuration is suitable for improving the oscillation resistance of the voltage regulator 1.

[0051] In the voltage regulator 1 according to each of the above-described embodiments, the resistance values ​​of the plurality of resistors R3, R4 or the plurality of resistors R6, R7 may be determined so as to generate a divided voltage (offset voltage) according to the wiring resistors Rw1, Rw2 at the load end and the voltage required by the load 40. Furthermore, the resistance values ​​of the resistors R3, R4, R6, R7 may be configured so that they can be variably set according to changes in the voltage required by the load 40.

[0052] As described above, the voltage regulator 1 according to the embodiment can compensate for the voltage drop caused by the wiring resistances Rw1 and Rw2.

[0053] Although the embodiments of the present invention have been described above, these embodiments are presented as examples and are not intended to limit the scope of the invention. The novel embodiments described above can be embodied in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments are included within the scope and spirit of the invention, and are also included in the inventions and their equivalents as defined in the claims. [Explanation of symbols]

[0054] 1,5 Voltage regulator 10 External power supply 20 Power circuit 21 Reference voltage source (BGR) 23 Impedance element 231 Transconductance Amplifier 233 Two-stage amplifier 25 Error amplifier 251 PMOS transistors 253 NMOS transistors 30 Offset voltage adjustment circuit 35 Phase compensation circuit 40 Load BGR-GND,GND Ground terminal BGR-OUT output terminal C1, C2, C3 capacitors D1 Diode INN, INP input terminals OUT external output terminal R1,R2,R3,R4,R5,R6,R7 Resistance (resistance element) Rw1, Rw2 wiring resistance VSUP external input terminal

Claims

1. An error amplifier whose inverting input terminal receives feedback of the output voltage; a reference voltage source that supplies a reference voltage to a non-inverting input terminal of the error amplifier; a phase compensation circuit connected between the reference voltage output terminal of the reference voltage source and the non-inverting input terminal of the error amplifier, for generating a phase margin in positive feedback from a load end; an offset voltage adjustment circuit connected between a ground terminal of the reference voltage source and a ground line at ground potential, for applying an offset voltage to the ground terminal of the reference voltage source; the offset voltage adjustment circuit includes a current source that generates a current corresponding to an output current or an input current of a voltage regulator, and a resistor connected between one end of the current source and a ground line at a ground potential; a ground terminal of the reference voltage source is connected to a connection point between the resistor where an offset voltage is generated and one end of the current source; Voltage regulator.

2. 2. The voltage regulator according to claim 1, wherein a voltage corresponding to a voltage on a positive side of a load terminal is input to the inverting input terminal of the error amplifier.

3. 2. The voltage regulator according to claim 1, wherein a voltage corresponding to a voltage at an output terminal of the error amplifier is input to the inverting input terminal of the error amplifier.

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