Reference Voltage Source Circuit

Abstract

To enable stable operation even when a cable is connected from outside for performance evaluation or the like.SOLUTION: A reference power source circuit includes a first PNP bipolar transistor and a second PNP bipolar transistor each having a collector and a base grounded. An emitter of the first PNP bipolar transistor is connected to one end of a third resistor, and between the other end of the third resistor and a reference voltage output terminal, a first resistor is connected. Between an emitter of the second PNP bipolar transistor and the reference voltage output terminal, a second resistor is connected. A non-inversion input terminal of a differential amplifier is connected to the emitter of the second PNP bipolar transistor. The inversion input terminal is connected to a node provided between the first resistor and the third resistor and has an output terminal connected to the reference voltage output terminal. Between the inversion input terminal and the reference voltage output terminal, a first capacitor is connected.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present disclosure relates to a reference voltage source circuit. [Background technology]

[0002] For example, a reference voltage source circuit for supplying a reference voltage to a load is known as a type of analog circuit used in an integrated circuit mounted on a power supply IC such as a linear regulator or a DC-DC converter (for example, Non-Patent Documents 1 and 2). [Prior art documents] [Non-patent literature]

[0003] [Non-Patent Document 1] Kunihiro Asada and Yutaka Nagata, supervising translation, PR Gray, PJ Hulst, SH Levis, and RG Meyer, "Analog Integrated Circuit Design Techniques for System LSI (Basics) (Applications)", Baifukan, 2004 [Non-patent document 2] KAREL E. KUIJK, “A precision reference voltage source,” IEEE Journal of Solid-State Circuits, vol.8, no. 3, pp.222-226, June.1973. Summary of the Invention [Problem to be solved by the invention]

[0004] 9 shows an example of a reference voltage source circuit 1' according to the related art. The reference voltage source circuit 1' is configured as a bandgap reference voltage source, and includes a first PNP bipolar transistor Q whose collector and base are both grounded. p1p , and a second PNP bipolar transistor Q p2p A first PNP bipolar transistor Q p1p The emitter of the 3p One end of the third resistor R 3pThe other end of the first resistor R 1p One end of the first resistor R 1p The other end of the resistor R 2p One end of the second resistor R 2p The other end of the second PNP bipolar transistor Q p2p is connected to the emitter of the

[0005] The reference voltage source circuit 1' includes a differential amplifier AMP. The non-inverting input terminal of the differential amplifier AMP is connected to a second PNP bipolar transistor Q p2p The inverting input terminal is connected to the emitter of the first resistor R 1p and the third resistor R 3p The output terminal is connected to the node at the junction of the first resistor R 1p and the second resistor R 2p The potential of the non-inverting input terminal of the differential amplifier AMP is connected to the node at the connection point of ν 2p , the potential of the inverting input terminal - is ν 1p , voltage gain is A 1p Then, the output voltage V of the differential amplifier AMP Op is expressed by the following equation: TIFF0007770851000001.tif6170

[0006] Voltage gain A of differential amplifier AMP 1p If we set is large enough, ν 2p ≒ν 1p In this case, the first PNP bipolar transistor Q p1p The emitter-base voltage is V EBQp1p , the Q of the second PNP bipolar transistor p2p The emitter-base voltage V EBQp2p Then, the third resistor R 3p The current I R3p is expressed by the following equation: TIFF0007770851000002.tif8170

[0007] Generally, the collector current, base current, saturation current, base-collector current gain, normalized emitter area ratio, and thermal voltage of a PNP bipolar transistor are ICp , I Bp , I Sp , β p , m e , and V T The collector current and the emitter-base voltage V EB In the case of the Gummel-Poon model, the relationship between the collector current and the base current is expressed by the following equation: TIFF0007770851000003.tif8170

[0008] Here, the first PNP bipolar transistor Q p1p The normalized emitter area ratio of the second PNP bipolar transistor Q is m. p2p Assuming that the normalized emitter area ratio of is 1, in the reference example shown in FIG. 9, the first resistor R 1p and second resistor R 2p are set equal (i.e., R 1p =R 2p ), as mentioned above, 2p ≒ν 1p Therefore, the base-emitter voltage V EB The potential V in equation (2) EBQp1p and potential V EBQp2p By applying these to the equations, equation (2) is transformed into the following equation: TIFF0007770851000004.tif9170

[0009] and the first resistor R 1p The voltage generated across the third resistor R 3p The voltage generated at the potential V EBQp1p The sum of these is the output voltage V op Therefore, using equation (4), the output voltage V op is expressed by the following equation: According to the aforementioned Non-Patent Documents 1 and 2, the emitter-base voltage V of a PNP bipolar transistor is EB It is known that the temperature characteristic of has a negative slope, so from equation (5), the first PNP bipolar transistor Q p1pThe emitter-base voltage V EBQp1 The negative slope of the temperature characteristic of T The bandgap reference voltage source has a low output voltage V Op This makes it possible to output a stable voltage that is temperature insensitive.

[0010] In the case of the reference voltage source circuit 1' having the above configuration, the output voltage V Op The cause of the variation is the first PNP bipolar transistor Q p1p The emitter-base voltage V EBQp1p This variation is due to the third resistor R 3p This can be adjusted by trimming the third resistor R 3p When trimming, the second term of equation (5) changes, but this is due to the condition R 1p =R 2p While satisfying the first resistance R 1p and second resistor R 2p It is possible to return it to its original value by trimming it.

[0011] The second term in equation (5) is the output voltage V Op This does not cause variation in R 1p / R 3p The relative accuracy of the thermal voltage V T is a constant that depends only on temperature, and ln(m) is a constant, so there is no factor of variation in the second term of equation (5).

[0012] Here, during the manufacturing of the reference voltage source circuit 1', for example, in a pre-shipment inspection, a measuring device may be connected via a cable to evaluate the performance of the reference voltage source circuit 1'. For example, based on the performance evaluation, the third resistor R 3p When adjusting the first PNP bipolar transistor Q p1p The emitter-base voltage V EBQp1p To understand this, the first PNP bipolar transistor Q p1p The emitter potential of the third resistor R 3pTo determine the value of the third resistor R 3p In this case, the potential across the first resistor R 1p and the third resistor R 3p and between the emitter of the first PNP bipolar transistor and the third resistor R 3p Terminals for monitoring the voltage are provided between the reference voltage source circuit 1 and the reference voltage source circuit 2, and a measuring device is connected to these terminals via a cable. At this time, the reference voltage source circuit 1' has a capacitance component C corresponding to the cable and the measuring device. p1p and C p2p These capacitance components C p1p and C p2p cannot be ignored because the cable is long enough compared to the size of the integrated circuit that includes the reference voltage source circuit 1'.

[0013] FIG. 10 shows the capacitance component C p1p and C p2p 1 is a circuit diagram when a first PNP bipolar transistor Q is added. p1p The voltage-current conversion ratio of g mQp1p , a second PNP bipolar transistor Q p2p The voltage-current conversion ratio of g mQp2p Then, the loop gain in the reference voltage source circuit 1' shown in FIG. TIFF0007770851000006.tif9170On the other hand, the capacitance component C p1p and C p2p The loop gain in the reference voltage source circuit 1' shown in FIG. 10 to which is added changes from the above equation (6) as shown in the following equation: TIFF0007770851000007.tif14170

[0014] Comparing equations (6) and (7), the capacitance component C p1p and C p2pAs a result, as shown in equation (7), the first term representing the negative feedback loop experiences a phase delay due to the influence of the low-pass filter formed by these capacitance components and the resistance components in the circuit, making the circuit unstable and possibly causing oscillation. Furthermore, if the stability of reference voltage source circuit 1' decreases in this way, the potential at each contact will be different during normal operation and adjustment, making it difficult to properly evaluate performance.

[0015] At least one embodiment of the present disclosure has been made in consideration of the above circumstances, and aims to provide a reference voltage source circuit that can operate stably even when an external cable is connected for performance evaluation, etc. [Means for solving the problem]

[0016] (1) In order to solve the above problem, a reference voltage source circuit according to one aspect comprises: a first PNP bipolar transistor and a second PNP bipolar transistor, the collector and base of which are grounded, a PNP bipolar transistor; a third resistor having one end connected to the emitter of the first PNP bipolar transistor; a first resistor connected between the other end of the third resistor and a reference voltage output terminal; A resistor is connected between the emitter of the second PNP bipolar transistor and the reference voltage output terminal. The second resistance followed, The non-inverting input terminal is connected to the emitter of the second PNP bipolar transistor, and the inverting a differential amplifier having an input terminal connected to a node provided between the first resistor and the third resistor and an output terminal connected to the reference voltage output terminal; a first capacitor connected between the inverting input terminal and the reference voltage output terminal; Equipped with The above 1P NP bipolar transistor and 2P The normalized emitter area ratio of an NP bipolar transistor is 1PNP bipolar transistor: 2P The NP bipolar transistor is set to m:1 (m is a positive number).

[0017] According to the above aspect (1), a first capacitor is connected between the inverting input terminal and the reference power supply output terminal of the reference voltage source circuit, which strengthens the negative feedback loop included in the reference power supply circuit relatively to the positive feedback loop, thereby effectively preventing the circuit operation from becoming unstable even when a measurement cable or device for performance evaluation is connected to the negative feedback loop side.

[0020] ( 2 In order to solve the above problem, a reference voltage source circuit according to one aspect of the present invention comprises: a first PNP bipolar transistor and a second PNP bipolar transistor, the collector and base of which are grounded, a PNP bipolar transistor; a third resistor having one end connected to the emitter of the first PNP bipolar transistor; a first resistor connected between the other end of the third resistor and a reference voltage output terminal; A resistor is connected between the emitter of the second PNP bipolar transistor and the reference voltage output terminal. The second resistance followed, The non-inverting input terminal is connected to the emitter of the second PNP bipolar transistor, and the inverting a differential amplifier having an input terminal connected to a node provided between the first resistor and the third resistor and an output terminal connected to the reference voltage output terminal; a first capacitor connected between the inverting input terminal and the reference voltage output terminal; a second capacitor connected between the non-inverting input terminal and a ground point; Equipped with The above 1P NP bipolar transistor and 2P The normalized emitter area ratio of an NP bipolar transistor is 1P NP bipolar transistor: 2PThe NP bipolar transistor is set to m:1 (m is a positive number).

[0021] the above( 2 According to the aspect of (1), the first capacitance and , th This allows the negative feedback loop included in the reference power supply circuit to be strengthened relative to the positive feedback loop. As a result, unstable circuit operation can be more effectively prevented even when measurement cables or devices for performance evaluation are connected to the negative feedback loop. [Effects of the Invention]

[0022] According to at least one embodiment of the present disclosure, it is possible to provide a reference voltage source circuit that can operate stably even when an external cable is connected for performance evaluation or the like. [Brief explanation of the drawings]

[0023] [Figure 1] FIG. 1 is a circuit diagram of a reference voltage source circuit according to a first embodiment. [Figure 2] FIG. 2 is a circuit diagram in which capacitance components and are added to FIG. [Figure 3] FIG. 10 is a circuit diagram of a reference voltage source circuit according to a second embodiment. [Figure 4] FIG. 4 is a circuit diagram in which capacitance components and are added to FIG. 3. [Figure 5] FIG. 10 is a circuit diagram of a reference voltage source circuit according to a third embodiment. [Figure 6] FIG. 6 is a circuit diagram in which capacitance components and are added to FIG. 5. [Figure 7] 10 shows verification results showing amplitude characteristics and phase characteristics of the reference voltage source circuit of FIG. 5 in comparison with the reference voltage source circuit of FIG. 9. [Figure 8] 11 shows verification results showing amplitude characteristics and phase characteristics of the reference voltage source circuit of FIG. 6 in comparison with the reference voltage source circuit of FIG. 10. [Figure 9] FIG. 1 is a circuit diagram of a reference voltage source circuit according to a reference technique. [Figure 10]FIG. 10 is a circuit diagram in which a capacitive component is added to the circuit in FIG. 9. DETAILED DESCRIPTION OF THE INVENTION

[0024] Hereinafter, several embodiments will be described with reference to the accompanying drawings. However, the dimensions, materials, shapes, relative arrangements, etc. of components described as embodiments or shown in the drawings are merely illustrative examples and are not intended to limit the scope of the invention.

[0025] FIG. 1 is a circuit diagram of a reference voltage source circuit 1A according to the first embodiment, and FIG. 2 shows a capacitance component C p1 and C p2 The reference voltage source circuit 1A is configured as a bandgap reference voltage source, and includes a first PNP bipolar transistor Q whose collector and base are grounded. p1 , and a second PNP bipolar transistor Q p2 A first PNP bipolar transistor Q p1 The emitter of the third resistor R3 is connected to one end of the third resistor R3. The other end of the third resistor R3 is connected to one end of the first resistor R1. The other end of the first resistor R1 is connected to one end of the second resistor R2. The other end of the second resistor R2 is connected to the second PNP bipolar transistor Q. p2 is connected to the emitter of the

[0026] The reference voltage source circuit 1A includes a differential amplifier AMP. As shown in FIG. 1, the non-inverting input terminal of the differential amplifier AMP is connected to a second PNP bipolar transistor Q p2 The reference voltage source circuit 1A has a first capacitor C1 connected between the inverting input terminal of the differential amplifier AMP and the reference voltage output terminal. The reference voltage source circuit 1A has a first capacitor C1 connected between the inverting input terminal of the differential amplifier AMP and the reference voltage output terminal. The reference voltage source circuit 1A also has a first capacitor C1 connected between the node of the node of the first resistor R1 and the third resistor R3 or the node of the node of the first resistor R1 and the third resistor R3. p1Voltage monitoring terminals T1 and T2 are provided at the node between the emitter of the third resistor R1 and the third resistor R3. In FIG. 2, a capacitance component C p1 and C p2 is shown.

[0027] The reference voltage source circuit 1A having such a configuration has a negative feedback loop L that runs from the output terminal of the differential amplifier AMP to the inverting input terminal via the first resistor R1. n and a positive feedback loop L that returns from the output terminal of the differential amplifier AMP to the non-inverting input terminal via the second resistor R2. p In such a reference voltage source circuit 1A, the first capacitor C1 is added to form a negative feedback loop L n The loop gain of the negative feedback loop L n is the positive feedback loop L p This strengthens the negative feedback loop L n By connecting cables and devices for performance evaluation to the voltage monitoring terminals T1 and T2 on the side, the capacitance component C p1 and C p2 Even if this occurs, the circuit operation is prevented from becoming unstable, and stable operation is possible.

[0028] FIG. 3 is a circuit diagram of a reference voltage source circuit 1B according to the second embodiment, and FIG. 4 shows a capacitance component C p1 and C p2 3 and 4, components corresponding to those in the reference voltage source circuit 1A according to the first embodiment are denoted by the same reference numerals, and redundant explanations will be omitted unless otherwise specified.

[0029] 3, the reference voltage source circuit 1B includes a second capacitor C2 connected between the non-inverting input terminal of the differential amplifier AMP and the ground point. The reference voltage source circuit 1B also includes a first PNP bipolar transistor Q connected to the node between the first resistor R1 and the third resistor R3 or the node between the first resistor R1 and the third resistor R3. p1Voltage monitoring terminals T1 and T2 are provided at the node between the emitter of the third resistor R1 and the third resistor R3. In FIG. 4, a capacitance component C p1 and C p2 is shown.

[0030] The reference voltage source circuit 1B having such a configuration has a negative feedback loop L that is connected from the output terminal of the differential amplifier AMP to the inverting input terminal via the first resistor R1. n and a positive feedback loop L that returns from the output terminal of the differential amplifier AMP to the non-inverting input terminal via the second resistor R2. p In such a reference voltage source circuit 1B, the second capacitor C2 is added to form a positive feedback loop L p The loop gain of the negative feedback loop L n is the positive feedback loop L p This strengthens the negative feedback loop L n By connecting cables and devices for performance evaluation to the voltage monitoring terminals T1 and T2 on the side, the capacitance component C p1 and C p2 Even if this occurs, the circuit operation is prevented from becoming unstable, and stable operation is possible.

[0031] FIG. 5 is a circuit diagram of a reference voltage source circuit 1C according to the third embodiment, and FIG. 6 shows a capacitance component C p1 and C p2 5 and 6, components corresponding to those in the reference voltage source circuit 1A according to the first embodiment and the reference voltage source circuit 1B according to the second embodiment are denoted by common reference numerals, and redundant explanations will be omitted unless otherwise specified.

[0032] 5, the reference voltage source circuit 1C includes a first capacitor C1 connected between the inverting input terminal of the differential amplifier AMP and the reference voltage output terminal, and a second capacitor C2 connected between the non-inverting input terminal of the differential amplifier AMP and the ground. The reference voltage source circuit 1C also includes a first capacitor C1 connected between the node of the first resistor R1 and the third resistor R3 or a first PNP bipolar transistor Q p1 Voltage monitoring terminals T1 and T2 are provided at the node between the emitter of the third resistor R1 and the third resistor R3. In FIG. 6, a capacitance component C p1 and C p2 is shown.

[0033] The reference voltage source circuit 1C having such a configuration has a negative feedback loop L that is connected from the output terminal of the differential amplifier AMP to the inverting input terminal via the first resistor R1. n and a positive feedback loop L that returns from the output terminal of the differential amplifier AMP to the non-inverting input terminal via the second resistor R2. p In such a reference voltage source circuit 1C, the first capacitor C1 and the second capacitor C2 are added, thereby forming a negative feedback loop L n The loop gain increases in the positive feedback loop L p The loop gain of the negative feedback loop L n is the positive feedback loop L p This strengthens the negative feedback loop L n By connecting cables and devices for performance evaluation to the voltage monitoring terminals T1 and T2 on the side, the capacitance component C p1 and C p2 Even if this occurs, the circuit operation is prevented from becoming unstable, and more stable operation is possible than in the reference voltage source circuit 1A according to the first embodiment and the reference voltage source circuit 1B according to the second embodiment.

[0034] Here, the loop gain A in the circuit shown in Figure 5 L1 , and the loop gain A in the circuit shown in FIG. L2is the voltage gain of the differential amplifier AMP, A1, and the first PNP bipolar transistor Q p1 The voltage-current conversion ratio of g mQp1 , a second PNP bipolar transistor Q p2 The voltage-current conversion ratio of g mQp2 Then, they are expressed by the following formulas: TIFF0007770851000008.tif19170where a=C p1 C p2 R1R3+C1C p2 R1R3, b=C p1 R1R3g mQp1 +C p1 R1+C p2 R1+C p2 R3+C1R1R3g mQp1 +C1R1, c=R1g mQp1 +R3g mQp1 +1, d=C1C p2 R1R3, e=C p2 R3+C1R1R3g mQp1 +C1R1, f=1.

[0035] According to equations (8-1) and (8-2), the loop gain A of the reference voltage source circuit 1C shown in FIG. L1 is the negative feedback loop L n The first term, which represents the frequency, increases with increasing frequency, and the positive feedback loop L p The second term, which represents the negative feedback loop L, decreases with increasing frequency, so it can be seen that this technology is more stable than the reference technology shown in Figure 9. n The numerator order of the first term expressing (1) has increased by one compared to equation (7), and the order of the denominator remains unchanged at 2, which indicates that the phase margin has improved by up to 90°.

[0036] Next, FIG. 7 shows the results of comparison of the amplitude and phase characteristics of the reference voltage source circuit 1C of FIG. 5 with the reference voltage source circuit 1' of FIG. 9, and FIG. 8 shows the results of comparison of the amplitude and phase characteristics of the reference voltage source circuit 1C of FIG. 6 with the reference voltage source circuit 1' of FIG. 10. In FIG. 7 and FIG. 8, R 1p =R1=400kΩ, R 2p =R2=400kΩ, R 2p=R2=400kΩ, R 3p =R3=40kΩ, PNP bipolar transistor Q 1p1 and Q p1 Normalized emitter area ratio of 8, C p1p =C p1 =100pF, C p2p =C p2 =100pF, C1=10pF, C2=10pF, A 1p =A1=A DC / [(1-s / p1)(1-s / p2)], A DC = 107.7 dB, p1 = 2π × 2.33 Hz, and p2 = 2π × 1.24 MHz.

[0037] First, according to FIG. 7, the phase margin of the reference voltage source circuit 1' in FIG. 9 is 87°@80kHz, and the phase margin of the reference voltage source circuit 1C in FIG. 5 is 70°@1MHz, which indicates that both are stable. Also, according to FIG. 8, the phase margin of the reference voltage source circuit 1' in FIG. 10 is -16.5°@50kHz, which indicates that it is unstable, whereas the phase margin of the reference voltage source circuit 1C in FIG. 6 is 71.5°@50kHz, which indicates that it maintains stability. From this, it can be seen that the capacitive component C p1 and C p2 The reference voltage source circuit 1C to which is added has a capacitance component C p1p and C p2p It was confirmed that the stability of the reference voltage source circuit 1' is superior to that of the reference voltage source circuit 1' to which the reference voltage source circuit 1' is added.

[0038] As described above, according to each of the above embodiments, the reference voltage source circuits 1A to 1C are provided with at least one of the first capacitance C1 and the second capacitance C2, thereby strengthening the negative feedback loop included in the reference power supply circuit relatively to the positive feedback loop, thereby effectively preventing the circuit operation from becoming unstable even when a measurement cable or device for performance evaluation is connected to the negative feedback loop side. [Explanation of symbols]

[0039] 1A, 1B, 1C(1´) Reference voltage source circuit AMP Differential amplifier Cp1(Cp1p) Capacitive component Ln negative feedback loop Lp positive feedback loop Qp1 (Q1p1) First bipolar transistor Qp2 (Qp2p) Second bipolar transistor R1(R1p) First resistor R2(R2p) Second resistor R3 (R3p) Third resistor C1 1st capacity C2 2nd capacity

Claims

1. a first PNP bipolar transistor and a second PNP bipolar transistor, the collector and base of which are grounded, respectively; a third resistor having one end connected to the emitter of the first PNP bipolar transistor; a first resistor connected between the other end of the third resistor and a reference voltage output terminal; a second resistor connected between the emitter of the second PNP bipolar transistor and the reference voltage output terminal; a differential amplifier having a non-inverting input terminal connected to the emitter of the second PNP bipolar transistor, an inverting input terminal connected to a node provided between the first resistor and the third resistor, and an output terminal connected to the reference voltage output terminal; a first capacitor connected between the inverting input terminal and the reference voltage output terminal; Equipped with a reference voltage source circuit in which a normalized emitter area ratio of the first PNP bipolar transistor to the second PNP bipolar transistor is set to first PNP bipolar transistor:second PNP bipolar transistor=m:1 (m is a positive number).

2. a first PNP bipolar transistor and a second PNP bipolar transistor, the collector and base of which are grounded, respectively; a third resistor having one end connected to the emitter of the first PNP bipolar transistor; a first resistor connected between the other end of the third resistor and a reference voltage output terminal; a second resistor connected between the emitter of the second PNP bipolar transistor and the reference voltage output terminal; a differential amplifier having a non-inverting input terminal connected to the emitter of the second PNP bipolar transistor, an inverting input terminal connected to a node provided between the first resistor and the third resistor, and an output terminal connected to the reference voltage output terminal; a first capacitor connected between the inverting input terminal and the reference voltage output terminal; a second capacitor connected between the non-inverting input terminal and a ground point; Equipped with a reference voltage source circuit in which a normalized emitter area ratio of the first PNP bipolar transistor to the second PNP bipolar transistor is set to first PNP bipolar transistor:second PNP bipolar transistor=m:1 (m is a positive number).

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