Semiconductor Devices

Abstract

To provide a semiconductor device that is easy to handle.SOLUTION: In a semiconductor device 1, a semiconductor chip 11 has a first gate electrode 111 and a first source electrode 112, being in contact with a first lead frame 10. A first source terminal 17 is arranged side by side with the first lead frame 10 at a side in a first direction. A first gate terminal 15 is arranged side by side with the first source terminal in a second direction crossing the first direction. A connector 14 is in contact with the first source electrode via a conductor and in contact with the first source terminal 17. A second lead frame 20 is located at a side in the first direction. A semiconductor chip 21 has a second gate electrode 211 and a second source electrode 212, being in contact with the second lead frame 20. A second gate terminal 25 is arranged side by side with the first gate terminal 15 at a side in the second direction. A second source terminal 27 is arranged side by side with a second gate terminal 25 at a side in the second direction. A connector 24 is in contact with the second source electrode via a conductor and in contact with the second source terminal 27 via a conductor.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] FIELD An embodiment of the present invention relates to a semiconductor device. [Background technology]

[0002] 2. Description of the Related Art A semiconductor device is known that includes a semiconductor chip, a lead frame, and a resin that seals the semiconductor chip and the lead frame. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2010-258366 Summary of the Invention [Problem to be solved by the invention]

[0004] The object is to provide a semiconductor device that is easy to use. [Means for solving the problem]

[0005] A semiconductor device according to one embodiment includes a first lead frame, a first semiconductor chip, a first source terminal, a first gate terminal, a first conductor, a second lead frame, a second semiconductor, a second gate terminal, a second source terminal, and a second conductor.

[0006] The first semiconductor chip is in contact with the first lead frame, includes a first transistor, and has a first gate electrode and a first source electrode on a surface opposite to the first lead frame, the first gate electrode being connected to the gate of the first transistor, and the first source electrode being connected to the source of the first transistor. The first source terminal is aligned with the first lead frame on a side in a first direction. The first gate terminal is aligned with the first source terminal on a side in a second direction intersecting the first direction, and is electrically connected to the first gate electrode. The first conductor is in contact with the first source electrode via a conductor and is in contact with the first source terminal via a conductor. The second lead frame is the first lead frame. 2 Located on the side of the direction and is separated from the first lead frame. The second semiconductor chip is in contact with the second lead frame, includes a second transistor, and has a second gate electrode and a second source electrode on a surface opposite to the second lead frame, the second gate electrode being connected to the gate of the second transistor, and the second source electrode being connected to the source of the second transistor. The second gate terminal is aligned with the first gate terminal on the side in the second direction and is electrically connected to the second gate electrode. The second source terminal is aligned with the second gate terminal on the side in the second direction. The second conductor is in contact with the second source electrode via a conductor and is in contact with the second source terminal via a conductor. [Brief explanation of the drawings]

[0007] [Figure 1] 1 is a diagram showing the structure of the semiconductor device of the first embodiment along the xy plane. [Figure 2] 1 is a diagram showing the structure of the semiconductor device of the first embodiment along the xy plane. [Figure 3] 2A and 2B are diagrams showing the structure of the lead frame of the semiconductor device according to the first embodiment along the xy plane. [Figure 4] FIG. 2 is a diagram showing the structure of a part of the semiconductor device according to the first embodiment taken along the xz plane. [Figure 5] 3A and 3B are diagrams showing the structure of the connection terminal of the semiconductor device according to the first embodiment along the xy plane. [Figure 6] 3A and 3B are diagrams showing the structure of the connector of the semiconductor device according to the first embodiment along the xy plane. [Figure 7] FIG. 2 is a diagram showing the structure of a part of the semiconductor device according to the first embodiment taken along the xz plane. [Figure 8] 3A and 3B are diagrams showing the structure of the connector of the semiconductor device according to the first embodiment along the xy plane. [Figure 9] FIG. 2 is a diagram showing the structure of a part of the semiconductor device according to the first embodiment taken along the xz plane. [Figure 10] FIG. 1 is a diagram showing a circuit realized by the semiconductor device of the first embodiment. [Figure 11] FIG. 2 is a diagram showing a circuit in an example of an application of the semiconductor device according to the first embodiment. [Figure 12] 1 shows a partial structure of a device to which the semiconductor device of the first embodiment is applied along the xy plane. [Figure 13] FIG. 4 is a diagram showing a current flowing through the semiconductor device of the first embodiment in a normal state. [Figure 14] FIG. 4 is a diagram showing a current flowing through the semiconductor device of the first embodiment in an abnormal state. [Figure 15] FIG. 2 is a view showing the structure of a semiconductor device according to a first modified example of the first embodiment along the xy plane. [Figure 16] FIG. 10 is a diagram showing the structure of a connector of a semiconductor device according to a first modified example of the first embodiment, taken along the xy plane. [Figure 17] FIG. 10 is a view showing a structure along the xz plane of a part of a semiconductor device according to a first modified example of the first embodiment. [Figure 18] FIG. 10 is a diagram showing a circuit realized by a semiconductor device according to a first modification of the first embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0008] Hereinafter, embodiments will be described with reference to the drawings. The drawings are schematic, and the relationship between thickness and planar dimensions, the thickness ratio of each layer, etc. may differ from the actual ones. Furthermore, the drawings may include portions in which the relationship and ratio of dimensions differ from each other.

[0009] Hereinafter, embodiments will be described using an xyz Cartesian coordinate system. The positive direction of the vertical axis of a diagram may be referred to as the upper side, and the negative direction may be referred to as the lower side, and the positive direction of the horizontal axis of a diagram may be referred to as the right side, and the negative direction may be referred to as the left side. That is, in a diagram showing a surface along the xy plane, the upper side refers to the +y direction, the lower side refers to the -y direction, the right side refers to the +x direction, and the left side refers to the -x direction. In a diagram showing a surface along the xz plane, the upper side refers to the +z direction, the lower side refers to the -z direction, the right side refers to the +x direction, and the left side refers to the -x direction.

[0010] 1. First embodiment 1 and 2 show the structure of the semiconductor device 1 of the first embodiment along the xy plane. FIGS. 1 and 2 show the semiconductor device 1 from a top view, i.e., as observed from the +z direction. FIG. 1 shows the external appearance of the semiconductor device 1 in solid lines, and the components located inside the semiconductor device 1 in dashed lines. FIG. 2 shows the components located inside the semiconductor device 1 of the first embodiment in solid lines, and the external appearance in dashed lines. In figures other than the cross-sectional view, including FIG. 2, components may be hatched to improve the visibility of the figures. The hatching does not specify the material of the hatched components.

[0011] As shown in FIG. 1, the semiconductor device 1 includes a lead frame 10, a semiconductor chip 11, a connecting member 13, a connector 14, a gate terminal 15, wiring 16, a source terminal 17, a lead frame 20, a semiconductor chip 21, a connecting member 23, a connector 24, a gate terminal 25, wiring 26, a source terminal 27, and a sealing resin 30.

[0012] The sealing resin 30 is a component that seals all or part of the multiple components of the semiconductor device 1. The sealing resin 30 has a quadrilateral shape along the xy plane, e.g., a rectangular shape. The sealing resin 30 covers part of the lead frame 10, the semiconductor chip 11, the connecting member 13, the connector 14, part of the gate terminal 15, the wiring 16, part of the source terminal 17, part of the lead frame 20, the semiconductor chip 21, the connecting member 23, the connector 24, part of the gate terminal 25, the wiring 26, and part of the source terminal 27. In other words, part of the lead frame 10, the semiconductor chip 11, the connecting member 13, the connector 14, part of the gate terminal 15, the wiring 16, part of the source terminal 17, part of the lead frame 20, the semiconductor chip 21, the connecting member 23, the connector 24, part of the gate terminal 25, part of the wiring 26, and part of the source terminal 27 are located inside the sealing resin 30. The remaining portions of the lead frame 10, the remaining portions of the gate terminal 15, the remaining portions of the source terminal 17, the remaining portions of the lead frame 20, the remaining portions of the gate terminal 25, and the remaining portions of the source terminal 27 are exposed from the sealing resin 30. The sealing resin 30 is, for example, an epoxy resin.

[0013] 2, the lead frame 10 extends along the xy plane. The lead frame 10 is a conductor that supports a semiconductor chip 11. The lead frame 10 has, for example, a plate-like shape. The lead frame 10 includes or is made of a metal.

[0014] The lead frame 10 is located in the left portion of the semiconductor device 1 and faces the left edge of the semiconductor device 1. The lead frame 10 has a first portion 10a and a second portion 10b. The first portion 10a has, for example, a quadrilateral shape except for a slight protrusion on the left portion, and a rectangular shape. The first portion 10a extends along the xy plane. The top edge of the first portion 10a extends along the top edge of the sealing resin 30. A portion of the first portion 10a, including the top edge, is exposed from the sealing resin 30. The remaining portion of the first portion 10a is located inside the sealing resin 30.

[0015] The second portion 10b is located to the right of the first portion 10a. The left side of the second portion 10b is connected to the right side of the first portion 10a. The second portion 10b has, for example, a quadrilateral shape or a rectangular shape. The dimension of the second portion 10b along the y axis is, for example, smaller than the dimension of the first portion 10a along the y axis. The center of the left side of the second portion 10b on the y axis is, for example, located near the center of the left side of the first portion 10a on the y axis.

[0016] The gate terminal 15 is a terminal for electrically connecting the semiconductor device 1 to an external conductor. The gate terminal 15 extends along the xy plane. The gate terminal 15 is aligned with the first portion 10a of the lead frame 10 along the y axis. The gate terminal 15 is located below the first portion 10a of the lead frame 10. There is a gap between the gate terminal 15 and the lead frame 10. A portion of the gate terminal 15, including its lower side, is exposed from the sealing resin 30. The upper side of the gate terminal 15 extends along the lower side of the first portion 10a of the lead frame 10. The gate terminal 15 has, for example, a quadrilateral shape along the xy plane and a rectangular shape.

[0017] The source terminal 17 is a terminal for electrically connecting the semiconductor device 1 to an external conductor. The source terminal 17 extends along the xy plane. The source terminal 17 is aligned with the first portion 10a of the lead frame 10 along the y-axis. The source terminal 17 is located below the first portion 10a of the lead frame 10. The source terminal 17 is spaced apart from the lead frame 10. The source terminal 17 is aligned with the gate terminal 15 along the x-axis. The source terminal 17 is located to the left of the gate terminal 15. A portion of the source terminal 17, including its lower edge, is exposed from the sealing resin 30. The upper edge of the source terminal 17 extends along the lower edge of the first portion 10a of the lead frame 10. The source terminal 17 has, for example, a quadrilateral shape and a rectangular shape along the xy plane. For example, the dimension of the source terminal 17 on the x-axis is larger than the dimension of the gate terminal 15 on the x-axis.

[0018] The semiconductor chip 11 is an IC (Integrated Circuit) including a circuit formed on a semiconductor. The semiconductor chip 11 includes a transistor Tr1 and a diode D1 (neither of which is shown) connected in parallel to the transistor. The semiconductor chip 11 has, for example, a quadrilateral shape along the xy plane and a rectangular shape. The entire semiconductor chip 11 overlaps with the first portion 10a of the lead frame 10 along the xy plane. The center of the outline of the semiconductor chip 11 along the xy plane is located, for example, near the center of the outline of the first portion 10a of the lead frame 10 along the xy plane. The semiconductor chip 11 is located on the surface (top surface) on the +z direction side of the first portion 10a of the lead frame 10. The surface (bottom surface) on the -z direction side of the semiconductor chip 11 has a drain electrode, and the drain electrode is in contact with the lead frame 10.

[0019] The semiconductor chip 11 has a gate electrode 111 and a source electrode 112. The gate electrode 111 is connected to the gate of the transistor Tr1. The gate electrode 111 includes or is made of a conductor such as metal. The gate electrode 111 is located, for example, in the lower right portion of the first portion 10a of the lead frame 10, in other words, in a region including the lower right corner of the first portion 10a. The gate electrode 111 has, for example, a quadrilateral shape along the xy plane, and a rectangular shape. The right and bottom edges of the gate electrode 111 extend along the right and bottom edges of the semiconductor chip 11, respectively.

[0020] The source electrode 112 is connected to the source of the transistor Tr1. The source electrode 112 includes or is made of a conductor such as a metal. The source electrode 112 has a shape in which the region where the gate electrode 111 is located is missing along the xy plane. More specifically, the source electrode 112 has a shape similar to an inverted L. In other words, the source electrode 112 has a roughly quadrilateral shape with one corner missing from the quadrilateral. The source electrode 112 has, for example, a rectangular shape with one corner missing from the rectangular shape. The top, bottom, left, and right sides of the roughly quadrilateral shape of the source electrode 112 (the shape when the corner is assumed to be unmissing) extend along the top, bottom, left, and right sides of the first portion 10a of the lead frame 10, respectively. The missing corner of the source electrode 112 is the lower right corner of the source electrode 112, and the gate electrode 111 is located in the missing portion with a gap therebetween. The bottom and right sides of the approximate quadrilateral shape of the source electrode 112 may be referred to as the main bottom and right sides of the source electrode 112, respectively.

[0021] The wiring 16 is a conductor that electrically connects the gate electrode 111 and the gate terminal 15. The wiring 16 has a linear shape. The wiring 16 is, for example, a bonding wire. The wiring 16 contains a metal or is made of a metal. One end of the wiring 16 is in contact with the upper surface of the gate electrode 111. The other end of the wiring 16 is in contact with the upper surface of the gate terminal 15.

[0022] The connection member 13 is a conductor that fixes the source electrode 112 and the connector 14 and electrically connects the source electrode 112 and the connector 14. The connection member 13 includes or is made of, for example, solder. The connection member 13 has substantially the same shape as the source electrode 112 along the xy plane, for example, a shape similar to that of the source electrode 112. The connection member 13 has, for example, a size slightly smaller than that of the source electrode 112. In other words, the edge of the connection member 13 is located slightly inside the edge of the source electrode 112. The connection member 13 is located on the upper surface of the source electrode 112 and covers substantially the entire upper surface of the source electrode 112.

[0023] The connector 14 is a conductor that electrically connects the source electrode 112 and the source terminal 17. The connector 14 has a shape based on the shape and position of the source electrode 112 along the xy plane and the shape and position of the source terminal 17 along the xy plane. That is, the connector 14 has a shape that allows it to be connected to both the source electrode 112 and the source terminal 17. Specifically, the connector 14 has a shape that at least partially overlaps the source electrode 112 and at least partially overlaps the source terminal 17 along the xy plane. An example of the connector 14 will be described below.

[0024] As a specific example, the connector 14 has a generally L-shape along the xy plane. The connector 14 has a first portion 14a and a second portion 14b. The first portion 14a extends along the xy plane. The first portion 14a occupies a portion including the upper edge of the connector 14. The lower edge of the first portion 14a is connected to the upper edge of the second portion 14b. The entire contour of the first portion 14a along the xy plane overlaps with a portion of the connecting member 13. The first portion 14a has, for example, a quadrilateral shape along the xy plane, i.e., a rectangular shape. The upper, lower, left, and right edges of the first portion 14a extend along the upper, lower, left, and right edges of the source electrode 112, respectively. The upper, left, and right edges of the first portion 14a are located slightly inside the upper, left, and right edges of the source electrode 112, respectively.

[0025] The second portion 14b extends along the xy plane. The second portion 14b occupies a portion including the bottom edge of the connector 14. The second portion 14b has, for example, a quadrilateral shape along the xy plane, or a rectangular shape. The left edge of the second portion 14b is continuous with the left edge of the first portion 14a. The dimension of the second portion 14b along the x axis is smaller than the dimension of the first portion 14a along the x axis. The second portion 14b overlaps with a portion of the connection member 13, a portion of the semiconductor chip 11, a portion of the lead frame 10, and a portion of the source terminal 17. The bottom edge of the second portion 14b is located inside the source terminal 17.

[0026] Generally, some shapes of the lead frame 20, semiconductor chip 21, connecting members 23, connector 24, gate terminals 25, wiring 26, and source terminals 27, as well as the arrangement of the lead frame 20, semiconductor chip 21, connecting members 23, connector 24, gate terminals 25, wiring 26, and source terminals 27, are substantially symmetrical along the y-axis with some shapes of the lead frame 10, semiconductor chip 11, connecting members 13, connector 14, gate terminals 15, wiring 16, and source terminals 17, as well as the arrangement of the lead frame 10, semiconductor chip 11, connecting members 13, connector 14, gate terminals 15, wiring 16, and source terminals 17. Details are as follows.

[0027] The lead frame 20 extends along the xy plane. The lead frame 20 is a conductor that supports and fixes the semiconductor chip 21. The lead frame 20 has, for example, a plate shape. The lead frame 20 includes or is made of a metal.

[0028] The lead frame 20 is located in the right portion of the semiconductor device 1 and faces the right side of the semiconductor device 1. The lead frame 20 has a quadrilateral shape, e.g., a rectangular shape, except for a slight protrusion on the right portion. The top side of the lead frame 20 is aligned with the top side of the sealing resin 30. A portion of the lead frame 20, including the top side, is exposed from the sealing resin 30. The remaining portion of the lead frame 20 is located inside the sealing resin 30. The left side of the lead frame 20 extends along the right side of the second portion 10b of the lead frame 10.

[0029] The gate terminal 25 is a terminal for electrically connecting the semiconductor device 1 to an external conductor. The gate terminal 25 extends along the xy plane. The gate terminal 25 is aligned with the lead frame 20 along the y axis. The gate terminal 25 is located below the lead frame 20. There is a gap between the gate terminal 25 and the lead frame 20. A portion of the gate terminal 25, including its bottom, is exposed from the sealing resin 30. The top edge of the gate terminal 25 extends along the bottom edge of the lead frame 20. The gate terminal 25 has, for example, a quadrilateral shape along the xy plane, and a rectangular shape.

[0030] The source terminal 27 is a terminal for electrically connecting the semiconductor device 1 to an external conductor. The source terminal 27 extends along the xy plane. The source terminal 27 is aligned with the lead frame 20 along the y-axis. The source terminal 27 is located below the lead frame 20. There is a gap between the source terminal 27 and the lead frame 20. The source terminal 27 is aligned with the gate terminal 25 along the x-axis. The source terminal 27 is located to the right of the gate terminal 25. A portion of the source terminal 27, including its lower edge, is exposed from the sealing resin 30. The upper edge of the source terminal 27 extends along the lower edge of the lead frame 20. The source terminal 27 has, for example, a quadrilateral shape and a rectangular shape along the xy plane. For example, the dimension of the source terminal 27 on the x-axis is larger than the dimension of the gate terminal 25 on the x-axis.

[0031] The semiconductor chip 21 is the same semiconductor chip as the semiconductor chip 11. The fact that the semiconductor chip 11 and the semiconductor chip 21 are the same means that they are formed by a common process in different regions of a single semiconductor substrate with the aim of making the semiconductor chips 11 and 21 identical. Therefore, being identical allows for differences between the semiconductor chips 11 and 21 that arise due to errors in the manufacturing process and / or limitations in control accuracy. The semiconductor chip 21 includes a transistor Tr2 and a diode D2 connected in parallel with the transistor (neither is shown).

[0032] Two electrodes of the semiconductor chip 21 corresponding to the gate electrode 111 and source electrode 112 of the semiconductor chip 11 are referred to as a gate electrode 211 and a source electrode 212, respectively. The gate electrode 211 is connected to the gate of the transistor Tr2. The source electrode 212 is connected to the source of the transistor Tr2.

[0033] The semiconductor chip 21 is disposed in a direction different from that of the semiconductor chip 11. That is, the semiconductor chip 21 is rotated +90 degrees along the xy plane from the arrangement of the semiconductor chip 11. Therefore, the missing corner of the gate electrode 211 and the gate electrode 211 are located at the lower left of the semiconductor chip 21. The bottom side and left side of the approximate quadrilateral shape of the source electrode 212 may be referred to as the main bottom side and main left side of the source electrode 212, respectively.

[0034] The entire semiconductor chip 21 overlaps the lead frame 20 along the xy plane. The center of the outline of the semiconductor chip 21 along the xy plane is located, for example, near the center of the outline of the lead frame 20 along the xy plane. The semiconductor chip 21 is located on the upper surface of the lead frame 20. The drain electrode on the lower surface of the semiconductor chip 21 contacts the lead frame 20.

[0035] The wiring 26 is a conductor that electrically connects the gate electrode 211 and the gate terminal 25. The wiring 26 has a linear shape. The wiring 26 is, for example, a bonding wire. The wiring 26 contains a metal or is made of a metal. One end of the wiring 26 is in contact with the upper surface of the gate electrode 211. The other end of the wiring 26 is in contact with the upper surface of the gate terminal 25.

[0036] The connection member 23 is a conductor that fixes the source electrode 212 and the connector 24 and electrically connects the source electrode 212 and the connector 24. The connection member 23 includes or is made of, for example, solder. The connection member 23 has substantially the same shape as the source electrode 212 along the xy plane, for example, a shape similar to that of the source electrode 212. The connection member 23 has, for example, a size that is slightly smaller than the source electrode 212. In other words, the edge of the connection member 23 is located slightly inside the edge of the source electrode 212. The connection member 23 is located on the upper surface of the source electrode 212 and covers substantially the entire upper surface of the source electrode 212.

[0037] The connector 24 is a conductor that electrically connects the source electrode 212 and the source terminal 27. The connector 24 has a shape based on the shape and position of the source electrode 212 along the xy plane and the shape and position of the source terminal 27 along the xy plane. That is, the connector 24 has a shape that allows it to be connected to both the source electrode 212 and the source terminal 27. Specifically, the connector 24 has a shape that at least partially overlaps the source electrode 212 and at least partially overlaps the source terminal 27 along the xy plane. An example of the connector 24 will be described below.

[0038] As a specific example, the connector 24 has a shape that is roughly an inverted L along the xy plane. The connector 24 has a first portion 24a and a second portion 24b. The first portion 24a extends along the xy plane. The first portion 24a occupies a portion including the upper edge of the connector 24. The lower edge of the first portion 24a is connected to the upper edge of the second portion 24b. The entire contour of the first portion 24a along the xy plane overlaps with a portion of the connecting member 23. The first portion 24a has, for example, a quadrilateral shape or a rectangular shape along the xy plane. The upper edge, lower edge, left edge, and right edge of the first portion 24a extend along the upper edge, main lower edge, main left edge, and right edge of the source electrode 212, respectively. The upper edge, left edge, and right edge of the first portion 24a are located slightly inside the upper edge, main left edge, and right edge of the source electrode 212, respectively.

[0039] The second portion 24b extends along the xy plane. The second portion 24b occupies a portion including the lower edge of the connector 24. The upper edge of the second portion 24b is connected to the lower edge of the first portion 24a. The second portion 24b has, for example, a quadrilateral shape or a rectangular shape along the xy plane. The right edge of the second portion 24b is continuous with the right edge of the first portion 24a. The dimension of the second portion 24b along the x-axis is smaller than the dimension of the first portion 24a along the x-axis. The second portion 24b overlaps with part of the connection member 23, part of the semiconductor chip 21, part of the lead frame 20, and part of the source terminal 27. The lower edge of the second portion 24b is located inside the source terminal 27.

[0040] Fig. 3 shows the structure of a portion of the semiconductor device 1 of the first embodiment along the xy plane. Fig. 3 shows the structure of the lead frame 10 along the xy plane in more detail. As shown in Fig. 3 and described above with reference to Fig. 2, the lead frame 10 has a first portion 10a and a second portion 10b. The second portion 10b has a first sub-portion 10bA and a second sub-portion 10bB.

[0041] The first sub-portion 10bA occupies a portion including the right side of the second portion 10b. The first sub-portion 10bA has, for example, a quadrilateral shape, and has a rectangular shape extending along the y-axis. The first sub-portion 10bA is located to the right of the first portion 10a. The first sub-portion 10bA is located above the first portion 10a on the z-axis (toward the +z direction).

[0042] The second sub-portion 10bB occupies a portion including the left side of the second portion 10b. The left side of the second sub-portion 10bB is connected to the right side of the first portion 10a, and the right side of the second sub-portion 10bB is connected to the left side of the first sub-portion 10bA. Therefore, the second sub-portion 10bB is inclined with respect to the xy plane. The second sub-portion 10bB has, for example, a quadrilateral shape along the xy plane and a rectangular shape extending along the y axis.

[0043] FIG. 4 shows the structure of a portion of the semiconductor device 1 of the first embodiment along the xz plane. FIG. 4 shows the structure along line IV-IV in FIG. 2. As shown in FIG. 4 and described above with reference to FIG. 3, the first sub-portion 10bA of the lead frame 10 is located above the first portion 10a on the z-axis. The second sub-portion 10bB connects the first portion 10a and the first sub-portion 10bA. The semiconductor chip 11 is located on the upper surface of the first portion 10a. The source electrode 112 is located on the upper surface of the semiconductor chip 11. The connection member 13 is located on the upper surface of the source electrode 112. The connector 14 is located on the upper surface of the connection member 13.

[0044] Fig. 5 shows the structure of a portion of the semiconductor device 1 of the first embodiment along the xy plane. Fig. 5 shows in more detail the structures of the gate terminal 15, the source terminal 17, the gate terminal 25, and the source terminal 27 along the xy plane. As shown in Fig. 5, the source terminal 17 has a first portion 17a, a second portion 17b, and a third portion 17c.

[0045] The first portion 17a occupies a portion including the lower side of the source terminal 17. The first portion 17a has, for example, a quadrilateral shape along the xy plane, or a rectangular shape. The portion including the lower side of the first portion 17a is exposed from the sealing resin 30 (not shown). The first portion 17a is located, for example, at the same or close coordinate on the z axis as the semiconductor chip 11.

[0046] The lower side of second portion 17b is connected to the upper side of first portion 17a. Second portion 17b is inclined with respect to the xy plane, and the upper side of second portion 17b is located higher on the z axis than the lower side of second portion 17b. Second portion 17b has, for example, a quadrilateral shape along the xy plane, and a rectangular shape.

[0047] The third portion 17c has a bottom side connected to the top side of the second portion 17b. The third portion 17c is located above the first portion 17a along the z-axis. The third portion 17c has, for example, a quadrilateral shape along the xy plane, and a rectangular shape.

[0048] The gate terminal 15 has a first portion 15a, a second portion 15b, and a third portion 15c. The first portion 15a occupies a portion including the lower side of the gate terminal 15. The first portion 15a is aligned, for example, with the first portion 17a of the source terminal 17 along the x-axis. The first portion 15a has, for example, a quadrilateral shape along the xy plane, and a rectangular shape. The portion including the lower side of the first portion 15a is exposed from the sealing resin 30 (not shown). The first portion 15a is located, for example, at the same or similar coordinate as the semiconductor chip 11 on the z-axis.

[0049] The second portion 15b has a lower side connected to the upper side of the first portion 15a. The second portion 15b is aligned with, for example, the second portion 17b of the source terminal 17 along the x-axis. The second portion 15b is inclined with respect to the xy plane, and the upper side of the second portion 15b is located higher on the z-axis than the lower side of the second portion 15b. The second portion 15b has, for example, a quadrilateral shape along the xy plane, and a rectangular shape.

[0050] The third portion 15c has a bottom side connected to the top side of the second portion 15b. The third portion 15c is aligned with, for example, the third portion 17c of the source terminal 17 along the x-axis. The third portion 15c is located above the first portion 15a on the z-axis. The third portion 15c is located at, for example, the same or similar coordinates on the z-axis as the third portion 17c of the source terminal 17. The third portion 15c has, for example, a quadrilateral shape along the xy plane, and a rectangular shape.

[0051] The gate terminal 25 has a first portion 25a, a second portion 25b, and a third portion 25c. The first portion 25a occupies a portion including the lower side of the gate terminal 25. The first portion 25a is aligned with the first portion 15a of the gate terminal 15 along the x-axis, for example. The first portion 25a has a quadrilateral shape along the xy plane, for example, and a rectangular shape. The portion including the lower side of the first portion 25a is exposed from the sealing resin 30 (not shown). The first portion 25a is located at the same or close coordinates as the semiconductor chip 11 on the z-axis, for example.

[0052] The second portion 25b has a lower side connected to the upper side of the first portion 25a. The second portion 25b is aligned with the second portion 15b of the gate terminal 15 along the x-axis, for example. The second portion 25b is inclined with respect to the xy plane, and the upper side of the second portion 25b is located higher on the z-axis than the lower side of the second portion 25b. The second portion 25b has a quadrilateral shape along the xy plane, for example, and a rectangular shape.

[0053] The third portion 25c has a lower side connected to the upper side of the second portion 25b. The third portion 25c is, for example, aligned with the third portion 15c of the gate terminal 15 along the x-axis. The third portion 25c is located higher on the z-axis than the first portion 25a. The third portion 25c is, for example, located at the same or similar coordinates on the z-axis as the third portion 15c of the gate terminal 15. The third portion 25c has, for example, a quadrilateral shape along the xy plane and a rectangular shape.

[0054] The source terminal 27 has a first portion 27a, a second portion 27b, and a third portion 27c. The first portion 27a occupies a portion including the lower side of the source terminal 27. The first portion 27a is aligned, for example, with the first portion 25a of the gate terminal 25 along the x-axis. The first portion 27a has, for example, a quadrilateral shape along the xy plane, and a rectangular shape. A portion including the lower side of the first portion 27a is exposed from the sealing resin 30 (not shown). The first portion 27a is located, for example, at the same or similar coordinates as the semiconductor chip 11 on the z-axis.

[0055] The second portion 27b has a lower side connected to the upper side of the first portion 27a. The second portion 27b is aligned with the second portion 25b of the gate terminal 25 along the x-axis, for example. The second portion 27b is inclined with respect to the xy plane, and the upper side of the second portion 27b is located higher on the z-axis than the lower side of the second portion 27b. The second portion 27b has a quadrilateral shape along the xy plane, for example, and a rectangular shape.

[0056] The third portion 27c has a lower side connected to the upper side of the second portion 27b. The third portion 27c is, for example, aligned with the third portion 25c of the gate terminal 25 along the x-axis. The third portion 27c is located higher on the z-axis than the first portion 27a. The third portion 27c is, for example, located at the same or similar coordinates on the z-axis as the third portion 25c of the gate terminal 25. The third portion 27c has, for example, a quadrilateral shape along the xy plane and a rectangular shape.

[0057] Figure 6 shows the structure of a portion of the semiconductor device 1 of the first embodiment along the xy plane. Figure 6 shows in more detail the structure of the connector 14 along the xy plane. As shown in Figure 6 and as described above with reference to Figure 2, the connector 14 has a first portion 14a and a second portion 14b.

[0058] The second portion 14b includes a first sub-portion 14bA, a second sub-portion 14bB, a third sub-portion 14bC, a fourth sub-portion 14bD, and a fifth sub-portion 14bE. The left sides of the first portion 14a, the first sub-portion 14bA, the second sub-portion 14bB, the third sub-portion 14bC, the fourth sub-portion 14bD, and the fifth sub-portion 14bE are contiguous. The right sides of the first sub-portion 14bA, the second sub-portion 14bB, the third sub-portion 14bC, the fourth sub-portion 14bD, and the fifth sub-portion 14bE are contiguous.

[0059] The first sub-portion 14bA occupies a portion including the upper side of the second portion 14b. The first sub-portion 14bA has, for example, a quadrilateral shape along the xy plane or a rectangular shape. The first sub-portion 14bA is located, for example, at the same or similar coordinates on the z axis as the first portion 14a.

[0060] The second sub-portion 14bB has an upper side connected to the lower side of the first sub-portion 14bA. The second sub-portion 14bB is inclined with respect to the xy plane, and the lower side of the second sub-portion 14bB is located higher on the z-axis than the upper side of the second sub-portion 14bB. The second sub-portion 14bB has, for example, a quadrilateral shape along the xy plane, and a rectangular shape.

[0061] The third sub-portion 14bC occupies a portion including the center of the second portion 14b. The third sub-portion 14bC is located above the first sub-portion 14bA along the z-axis. The third sub-portion 14bC has, for example, a quadrilateral shape along the xy plane, and a rectangular shape.

[0062] The fourth sub-portion 14bD has an upper side connected to the lower side of the third sub-portion 14bC. The fourth sub-portion 14bD is inclined with respect to the xy plane, and the lower side of the fourth sub-portion 14bD is located lower on the z-axis than the upper side of the fourth sub-portion 14bD. The fourth sub-portion 14bD has, for example, a quadrilateral shape along the xy plane, and a rectangular shape.

[0063] The fifth sub-portion 14bE occupies a portion including the lower side of the second portion 14b. The entire contour of the fifth sub-portion 14bE along the xy plane overlaps with the third portion 17c of the source terminal 17. The fifth sub-portion 14bE is located lower on the z-axis than the third sub-portion 14bC. The fifth sub-portion 14bE has, for example, a quadrilateral shape along the xy plane, and a rectangular shape.

[0064] 6, a portion of the third sub-portion 14bC, the entire fourth sub-portion 14bD, and the entire fifth sub-portion 14bE overlap with the third portion 17c of the source terminal 17. However, the arrangement of the third sub-portion 14bC, the fourth sub-portion 14bD, and the fifth sub-portion 14bE is not limited to the example shown in Fig. 6. As long as the portion including the bottom edge of the connector 14 has a shape that at least partially overlaps with the third portion 17c of the source terminal 17, the third sub-portion 14bC, the fourth sub-portion 14bD, and the fifth sub-portion 14bE can have any shape and be arranged in any manner.

[0065] 7 shows the structure of a portion of the semiconductor device 1 of the first embodiment along the xz plane. FIG. 7 shows the structure along line VII-VII in FIG. 2. As shown in FIG. 7, the first portion 14a and the first sub-portion 14bA of the connector 14 are located on the upper surface of the connection member 13. The third sub-portion 14bC is located above the first portion 14a and the first sub-portion 14bA on the z axis. The second sub-portion 14bB connects the first sub-portion 14bA and the third sub-portion 14bC.

[0066] The fifth sub-portion 14bE is located lower than the third sub-portion 14bC on the z-axis. A connection member 18 is provided between the lower surface of the fifth sub-portion 14bE and the upper surface of the third portion 17c of the source terminal 17. The connection member 18 is a conductor that fixes the fifth sub-portion 14bE and the source terminal 17 and electrically connects the fifth sub-portion 14bE and the source terminal 17. The connection member 18 may, for example, include or be made of solder.

[0067] The fourth sub-portion 14bD connects the third sub-portion 14bC and the fifth sub-portion 14bE.

[0068] Figure 8 shows the structure of a portion of the semiconductor device 1 of the first embodiment along the xy plane. Figure 8 shows in more detail the structure of the connector 24 along the xy plane. As shown in Figure 8 and as described above with reference to Figure 2, the connector 24 has a first portion 24a and a second portion 24b.

[0069] The second portion 24b has a first sub-portion 24bA, a second sub-portion 24bB, a third sub-portion 24bC, a fourth sub-portion 24bD, and a fifth sub-portion 24bE. The right sides of the first portion 24a, the first sub-portion 24bA, the second sub-portion 24bB, the third sub-portion 24bC, the fourth sub-portion 24bD, and the fifth sub-portion 24bE are contiguous. The left sides of the first sub-portion 24bA, the second sub-portion 24bB, the third sub-portion 24bC, the fourth sub-portion 24bD, and the fifth sub-portion 24bE are contiguous.

[0070] The first sub-portion 24bA occupies a portion including the upper side of the second portion 24b. The first sub-portion 24bA has, for example, a quadrilateral shape along the xy plane or a rectangular shape. The first sub-portion 24bA is located, for example, at the same or similar coordinates on the z axis as the first portion 24a.

[0071] The second sub-portion 24bB has an upper side connected to the lower side of the first sub-portion 24bA. The second sub-portion 24bB is inclined with respect to the xy plane, and the lower side of the second sub-portion 24bB is located higher on the z-axis than the upper side of the second sub-portion 24bB. The second sub-portion 24bB has, for example, a quadrilateral shape along the xy plane, and a rectangular shape.

[0072] The third sub-portion 24bC occupies a portion including the center of the second portion 24b. The third sub-portion 24bC is located above the first sub-portion 24bA along the z-axis. The third sub-portion 24bC has, for example, a quadrilateral shape along the xy plane, and a rectangular shape.

[0073] The fourth sub-portion 24bD has an upper side connected to the lower side of the third sub-portion 24bC. The fourth sub-portion 24bD is inclined with respect to the xy plane, and the lower side of the fourth sub-portion 24bD is located lower on the z-axis than the upper side of the fourth sub-portion 24bD. The fourth sub-portion 24bD has, for example, a quadrilateral shape along the xy plane and a rectangular shape.

[0074] The fifth sub-portion 24bE occupies a portion including the lower side of the second portion 24b. The entire contour of the fifth sub-portion 24bE along the xy plane overlaps with the third portion 17c of the source terminal 17. The fifth sub-portion 24bE is located lower on the z-axis than the third sub-portion 24bC. The fifth sub-portion 24bE has, for example, a quadrilateral shape along the xy plane, and a rectangular shape.

[0075] 8, a portion of the third sub-portion 24bC, the entire fourth sub-portion 24bD, and the entire fifth sub-portion 24bE overlap with the third portion 17c of the source terminal 17. However, the arrangement of the third sub-portion 24bC, the fourth sub-portion 24bD, and the fifth sub-portion 24bE is not limited to the example shown in Fig. 8. As long as the portion including the bottom edge of the connector 24 has a shape that at least partially overlaps with the third portion 17c of the source terminal 17, the third sub-portion 24bC, the fourth sub-portion 24bD, and the fifth sub-portion 24bE can have any shape and be arranged in any manner.

[0076] 9 shows the structure of a portion of the semiconductor device 1 of the first embodiment along the xz plane. FIG. 9 shows the structure along line IX-IX in FIG. 2. As shown in FIG. 9, the first portion 24a and the first sub-portion 24bA of the connector 24 are located on the upper surface of the connection member 13. The third sub-portion 24bC is located above the first portion 24a and the first sub-portion 24bA on the z axis. The second sub-portion 24bB connects the first sub-portion 24bA and the third sub-portion 24bC.

[0077] The fifth sub-portion 24bE is located lower on the z-axis than the third sub-portion 24bC. A connection member 28 is provided between the lower surface of the fifth sub-portion 24bE and the upper surface of the third portion 17c of the source terminal 17. The connection member 28 is a conductor that fixes the fifth sub-portion 24bE and the source terminal 17 and electrically connects the fifth sub-portion 24bE and the source terminal 17. The connection member 28 may, for example, include or be made of solder.

[0078] The fourth sub-portion 24bD connects the third sub-portion 24bC and the fifth sub-portion 24bE.

[0079] 10 shows a circuit realized by the semiconductor device 1 of the first embodiment. The circuit by the semiconductor device 1 includes a circuit C11 realized by the semiconductor chip 11 and a circuit C21 realized by the semiconductor chip 21. In the semiconductor device 1, the circuit C11 and the circuit C21 are independent of each other.

[0080] Circuit C11 includes transistor Tr1 and diode D1, as shown in Figure 10 and described above with reference to Figure 2. The gate of transistor Tr1 is connected to gate terminal 15. The source of transistor Tr1 is connected to source terminal 17. The drain of transistor Tr1 is connected to lead frame 10.

[0081] The anode of the diode D1 is connected to the drain of the transistor Tr1, and the cathode of the diode D1 is connected to the source of the transistor Tr1.

[0082] 10 and described above with reference to FIG. 2, includes transistor Tr2 and diode D2. The gate of transistor Tr2 is connected to gate terminal 25. The source of transistor Tr2 is connected to source terminal 27. The drain of transistor Tr2 is connected to lead frame 20.

[0083] The anode of the diode D2 is connected to the drain of the transistor Tr2, and the cathode of the diode D2 is connected to the source of the transistor Tr2.

[0084] The semiconductor device 1 can be used as a device that provides a switching function between two external nodes and a fail-safe function that prevents a current flowing between the two nodes in a direction opposite to the expected direction of the current between the two nodes.

[0085] 11 shows a circuit in an example of an application of the semiconductor device 1 of the first embodiment. The semiconductor device 1 is used as a part of a device 100. The device 100 includes a battery 101, the semiconductor device 1, a control circuit 102, a switching circuit 103, and a sub-circuit 104.

[0086] 11, the drain of transistor Tr2 and the cathode of diode D2 are connected at node N1, which is also connected to the positive terminal of battery 101. The source of transistor Tr2, the anode of diode D2, the source of transistor Tr1, and the anode of diode D1 are connected to each other at node N2. The gates of transistors Tr1 and Tr2 receive a control signal S1 from control circuit 102.

[0087] The drain of the transistor Tr1 and the cathode of the diode D1 are connected to a first terminal E1 of the switching circuit 103. A second terminal E2 of the switching circuit 103 is connected to the sub-circuit 104. The switching circuit 103 electrically connects or disconnects the first terminal E1 and the second terminal E2 based on a control signal S2. The control signal S2 is supplied from, for example, the control circuit 102.

[0088] 12 shows the structure of a portion of a device 100 in which the semiconductor device 1 of the first embodiment is used, along the xy plane. FIG. 12 shows a portion of a printed wiring board 106 included in the device 100, on which the semiconductor device 1 is provided. When the semiconductor device 1 is used as part of the device 100, the gate of the transistor Tr1 and the gate of the transistor Tr2 must be electrically connected to each other, as described above with reference to FIG. 11. For this purpose, the printed wiring board 106 includes a conductor (pattern) 107, and the lower surfaces of the gate terminals 15 and 25 contact the upper surface of the conductor 107.

[0089] 11, the source of transistor Tr2 and the anode of diode D2 must be connected to the source and anode of transistor Tr1. For this purpose, source terminals 17 and 27 of semiconductor device 1 must be electrically connected on printed wiring board 106. For this purpose, printed wiring board 106 includes conductor 108, and the lower surfaces of source terminals 17 and 27 are in contact with the upper surface of conductor 108. Conductor 108 has a shape, for example, in which the area of ​​conductor 107 is missing from a quadrilateral.

[0090] During normal operation of device 100, currents flow through semiconductor device 1 as described below with reference to Figure 13. The normal state of device 100 refers to the connections of the components shown in Figure 11, specifically when the positive terminal of battery 101 is connected to node N1. In the normal state, node N1 has a higher potential than node N2, which has a higher potential than node N3.

[0091] While the device 100 is in a normal state and turned on, for example, the control signal S1 has a high potential, i.e., a magnitude sufficient to turn on transistors Tr1 and Tr2. Therefore, current flows from node N1 to node N2 through transistor Tr2. In FIG. 13, the current flow is indicated by a thick solid line. However, because diode D2 is reverse-biased, no current flows through diode D2. The non-flowing current is indicated by a dashed line.

[0092] Also, a current flows from node N2 to node N3 via transistor Tr1. Furthermore, diode D2 is forward biased, and a current flows from node N2 to node N3 via diode D1.

[0093] When the device 100 is in an abnormal state, a current flows through the semiconductor device 1 as shown in Figure 14 and described below. The abnormal state of the device 100 occurs when the components shown in Figure 11 are not connected, particularly when the negative terminal of the battery 101 is connected to node N1. The abnormal state may occur unintentionally while replacing the battery 101. In the abnormal state, node N3 may have a higher potential than node N2.

[0094] An abnormal condition may occur during the replacement of the battery 101 as described above, and the device 100 is not in operation during the replacement of the battery 101. Therefore, the control signal S1 has a low potential, i.e., a magnitude that keeps the transistors Tr1 and Tr2 off, so that no current flows between the drain of the transistor Tr1 and the source of the transistor Tr1.

[0095] As described above, node N3 may have a potential higher than the potential of node N2. In this state, a reverse bias is applied to diode D1, so no current flows through diode D1. Therefore, transistor Tr1 and diode D1 act to suppress or prevent current from flowing between node N3 and node N2. Therefore, when an abnormal state occurs in device 100, current flowing in the opposite direction to the intended direction beyond node N3 (subcircuit 104) is suppressed or prevented.

[0096] As described above, during an abnormal state, the control signal S1 has a low potential, i.e., a magnitude that keeps transistors Tr1 and Tr2 off. Therefore, no current flows between the drain of transistor Tr2 and the source of transistor Tr2. Also, during an abnormal state, the node N2 side may have a higher potential than the node N1 side, so that diode D2 may be forward biased when a current flows into node N2. However, in reality, the function of transistor Tr1 and diode D1 suppresses or prevents current from flowing from node N3 to node N2. Therefore, no forward bias voltage is applied to diode D2. Therefore, current flow from node N2 to node N1 is suppressed or prevented.

[0097] In this way, the function of the semiconductor device 1 suppresses or prevents current from flowing from the node N3 to the node N1 when the device 100 is in an abnormal state.

[0098] The structure described above with reference to FIGS. 1 to 9 realizes a configuration in which the semiconductor device 1 has circuits C11 and C21 that are independent of each other. Hereinafter, the configuration in which the circuits C11 and C21 are independent of each other may be referred to as an independent type or basic type. On the other hand, the semiconductor device 1 can be realized in a configuration in which the circuits C11 and C21 are connected in series, with only minor differences from the independent type. FIG. 15 shows such a configuration, and illustrates a first modification of the first embodiment. Hereinafter, the configuration in which the circuits C11 and C21 are connected in series may be referred to as an internal connection type. In FIG. 15, components located inside the semiconductor device 1b of the first modification of the first embodiment are indicated by solid lines, and the external appearance is indicated by a dashed line.

[0099] 15, the semiconductor device 1b of the first modified example has a connector 34 instead of the connector 24 of the stand-alone semiconductor device 1 of FIG. 2. That is, except for the difference in connector 24 or 34, the semiconductor device 1b has the same components, component arrangement, and component connections as the semiconductor device 1 (i.e., lead frame 10, semiconductor chip 11, connecting member 13, connector 14, gate terminal 15, wiring 16, source terminal 17, lead frame 20, semiconductor chip 21, connecting member 23, gate terminal 25, wiring 26, source terminal 27, and sealing resin 30).

[0100] The connector 34 is a conductor that electrically connects the source electrode 212 and the lead frame 10. The connector 34 has a shape based on the shape and position of the source electrode 212 along the xy plane and the shape and position of the lead frame 10 along the xy plane. That is, the connector 34 has a shape that allows it to be connected to both the source electrode 212 and the lead frame 10. Specifically, the connector 34 has a shape that at least partially overlaps the source electrode 212 and at least partially overlaps the lead frame 10 along the xy plane. An example of the connector 34 will be described below.

[0101] As a specific example, the connector 34 has a shape that is roughly an inverted L along the xy plane. The connector 34 has a first portion 34a, a second portion 34b, a third portion 34c, and a fourth portion 34d. The first portion 34a extends along the xy plane. The first portion 34a occupies a portion including the right edge of the connector 34. The left edge of the first portion 34a is connected to the right edge of the second portion 34b. The entire outline of the first portion 34a along the xy plane overlaps with a portion of the connecting member 23. The first portion 34a has, for example, a quadrilateral shape and a rectangular shape along the xy plane. The top edge, bottom edge, left edge, and right edge of the first portion 34a extend along the top edge, main bottom edge, main left edge, and right edge of the source electrode 212, respectively. The upper, lower, and right sides of the first portion 34a are located slightly inside the upper, lower, and right sides of the source electrode 212, respectively.

[0102] The second portion 34b extends along the xy plane. The second portion 34b occupies the portion of the connector 34 to the left of the first portion 34a. The right side of the second portion 34b is connected to the left side of the first portion 34a. The second portion 34b has, for example, a quadrilateral shape along the xy plane, or a rectangular shape. The top side of the second portion 34b is continuous with the top side of the first portion 34a. The dimension of the second portion 34b along the y axis is smaller than the dimension of the first portion 34a along the y axis. The second portion 34b overlaps with part of the connecting member 23 and part of the semiconductor chip 21. The left side of the second portion 34b overlaps with, for example, the semiconductor chip 21.

[0103] The third portion 34c extends along the xy plane. The third portion 34c occupies the portion of the connector 34 to the left of the second portion 34b. The right side of the third portion 34c is connected to the left side of the second portion 34b. The third portion 34c has, for example, a quadrilateral shape along the xy plane. The third portion 34c has, for example, a trapezoid shape along the xy plane. In this case, the dimension of the left side of the third portion 34c along the y axis is greater than the dimension of the right side of the third portion 34c along the y axis.

[0104] The fourth portion 34d extends along the xy plane. The fourth portion 34d occupies a portion of the connector 34 to the right of the third portion 34c and including the left edge of the connector 34. The right edge of the fourth portion 34d is connected to the left edge of the third portion 34c. The fourth portion 34d has, for example, a quadrilateral shape along the xy plane, or a rectangular shape. The fourth portion 34d overlaps with the first portion 10a of the lead frame 10. That is, the left edge of the fourth portion 34d is located inside the first portion 10a of the lead frame 10.

[0105] Figure 16 shows the structure of a portion of a semiconductor device 1b according to a modification of the first embodiment along the xy plane. Figure 16 shows the structure of the connector 34 along the xy plane in more detail. As shown in Figure 16 and as described above with reference to Figure 15, the connector 34 has a first portion 34a, a second portion 34b, a third portion 34c, and a fourth portion 34d.

[0106] The third portion 34c is inclined with respect to the xy plane, and the left side of the third portion 34c is located above the right side of the third portion 34c on the z axis.

[0107] The fourth portion 34d includes a first sub-portion 34dA, a second sub-portion 34dB, and a third sub-portion 34dC. The first sub-portion 34dA occupies a portion including the right side of the fourth portion 34d. The right side of the first sub-portion 34dA is connected to the left side of the third portion 34c. The first sub-portion 34dA is located above the first portion 34a and the second portion 34b on the z-axis. The first sub-portion 34dA has, for example, a quadrilateral shape, and may have a rectangular shape.

[0108] The second sub-portion 34dB occupies the center of the fourth portion 34d. The right side of the second sub-portion 34dB is connected to the left side of the first sub-portion 34dA. The second sub-portion 34dB is inclined with respect to the xy plane, and the left side of the second sub-portion 34dB is located lower on the z-axis than the right side of the second sub-portion 34dB. The second sub-portion 34dB has, for example, a quadrilateral or rectangular shape.

[0109] The third sub-portion 34dC occupies a portion including the left side of the fourth portion 34d. The right side of the third sub-portion 34dC is connected to the left side of the second sub-portion 34dB. The third sub-portion 34dC is located lower on the z-axis than the first sub-portion 34dA. The second sub-portion 34db has, for example, a quadrilateral shape, and has a rectangular shape.

[0110] 16, the entire second sub-portion 34dB and the entire third sub-portion 34dC overlap with the first sub-portion 10bA of the lead frame 10. However, the arrangement of the second sub-portion 34dB and the third sub-portion 34dC is not limited to the example shown in Fig. 16. As long as the portion including the left edge of the connector 34 has a shape that at least partially overlaps with the first sub-portion 10bA of the lead frame 10, the second sub-portion 34dB and the third sub-portion 34dC can have any shape and be arranged in any manner.

[0111] FIG. 17 shows the structure of a portion of the semiconductor device 1b according to the first modification of the first embodiment along the xz plane. FIG. 17 shows the structure along line XVII-XVII in FIG. 15. As shown in FIG. 17, the first portion 34a and the second portion 34b of the connector 34 are located on the upper surface of the connection member 23. The first sub-portion 34dA is located above the first portion 34a and the second portion 34b on the z axis. The third portion 34c connects the second portion 34b and the first sub-portion 34dA.

[0112] The third sub-portion 34dC is located below the first sub-portion 34dA on the z-axis. A connection member 38 is provided between the lower surface of the third sub-portion 34dC and the upper surface of the first sub-portion 10bA of the lead frame 10. The connection member 38 is a conductor that fixes the third sub-portion 34dC to the first sub-portion 10bA of the lead frame 10 and electrically connects the third sub-portion 34dC to the first sub-portion 10bA. The connection member 38 may, for example, include or be made of solder.

[0113] The second sub-portion 34dB connects the first sub-portion 34dA and the third sub-portion 34dC.

[0114] Fig. 18 shows a circuit realized by a semiconductor device 1b according to a first modification of the first embodiment. The circuit by the semiconductor device 1b includes a circuit C11 realized by a semiconductor chip 11 and a circuit C21 realized by a semiconductor chip 21, similar to the semiconductor device 1 according to the basic form of the first embodiment shown in Fig. 10. However, unlike the semiconductor device 1, in the semiconductor device 1b, the pair of the source of the transistor Tr2 and the anode of the diode D2 is connected to the pair of the drain of the transistor Tr1 and the cathode of the diode D1.

[0115] The semiconductor device 1b of the first modification, i.e., the internal connection type, can be applied as the switching circuit 103 described above with reference to Fig. 10. In this case, gate terminals 15 and 25 (gates of transistors Tr1 and Tr2) are connected to each other and receive a control signal S2. Also, a lead frame 20 (drain of transistor Tr2) of the semiconductor device 1b is connected to a lead frame 10 (drain of transistor Tr1) of the semiconductor device 1b outside the semiconductor device 1b.

[0116] The semiconductor device 1b of the first modified example can be realized simply by preparing and arranging the connector 34 instead of the connector 24. In other words, the basic semiconductor device 1 and the semiconductor device 1b of the first modified example can be made differently by using structures other than the connectors 24 and 34 and selectively using the connectors 24 and 34.

[0117] According to the first embodiment, it is possible to provide a semiconductor device that can provide a switching function and a current backflow prevention function and that can be easily mounted.

[0118] The switching function and current backflow prevention function can be realized by appropriately electrically connecting the connection terminals (external connectors) of a semiconductor device including circuits C11 and C21 (see FIG. 10) on a printed wiring board, as in semiconductor device 1. Such a semiconductor device can also be realized by incorporating two identical semiconductor chips including parallel-connected transistors and diodes into a single semiconductor device, as in semiconductor device 1. The use of two identical semiconductor chips facilitates the manufacture of the semiconductor device. To realize the switching function and current backflow prevention function using a semiconductor device including two identical semiconductor chips, i.e., the circuit shown in FIG. 10, a first reference semiconductor device (semiconductor device 1R1) can be considered in which the two semiconductor chips are arranged in the same orientation, unlike semiconductor device 1. In such a case, the structures consisting of a set of multiple components including each semiconductor chip are substantially identical, and the two structures are arranged side by side. Therefore, the source terminal (corresponding to source terminal 17 of semiconductor device 1) and gate terminal (corresponding to gate terminal 15 of semiconductor device 1) for one semiconductor chip, and the source terminal (corresponding to source terminal 27 of semiconductor device 1) and gate terminal (corresponding to gate terminal 25 of semiconductor device 1) for the other semiconductor chip are arranged in this order. Therefore, in order to use first reference semiconductor device 1R1 as part of circuits C11 and C12 in device 100, two non-adjacent source connection terminals must be connected to each other and two non-adjacent gate connection terminals must be connected to each other. This complicates the pattern layout on printed wiring board 106 of device 100 and hinders miniaturization of device 100 due to the large area required for pattern layout.

[0119] Alternatively, two identical semiconductor chips may be arranged in opposite directions to form a second reference semiconductor device (semiconductor device 1R2). In such a case, the gate terminals of the two semiconductor chips (corresponding to gate terminals 15 and 25 of semiconductor device 1) are located separately on two opposing sides of semiconductor device 1R1. Similarly, the source terminals of the two semiconductor chips (corresponding to source terminals 17 and 27 of semiconductor device 1) are also located separately on two opposing sides of semiconductor device 1R1. Therefore, in order to use second reference semiconductor device 1R1 as part of circuits C11 and C12 in device 100, the two opposite terminals must be electrically connected. This requires the installation of a conductor above semiconductor device 1R1, complicating implementation.

[0120] According to the first embodiment, the semiconductor device 1 includes a semiconductor chip 11 including a transistor Tr1 and a diode D1 connected in parallel, and a semiconductor chip 21 including a transistor Tr2 and a diode D2 connected in parallel. The semiconductor device 1 can provide a switching function between the drain of the transistor Tr1 and the drain of the transistor Tr2 and a function to suppress or prevent a current from flowing in a direction opposite to the intended direction by externally electrically connecting the source of the transistor Tr1 and the source of the transistor Tr2 to each other and electrically connecting the gate of the transistor Tr1 and the gate of the transistor Tr2 to each other.

[0121] According to the first embodiment, the semiconductor device 1 further includes lead frames 10 and 20, source terminals 17 and 27, and gate terminals 15 and 25. The semiconductor chips 11 and 21 are the same semiconductor chip. Therefore, the shapes of the gate electrode 111 and the source electrode 112 and the positions of the gate electrode 111 and the source electrode 112 in the semiconductor chip 11 are (substantially) the same as the shapes of the gate electrode 211 and the source electrode 212 and the positions of the gate electrode 211 and the source electrode 212 in the semiconductor chip 21. In addition, the semiconductor chip 21 is positioned in an orientation rotated −90° from the orientation of the semiconductor chip 11. Therefore, the gate electrode 111 and the gate electrode 211 are aligned along the x-axis without the source electrodes 112 and 212 being positioned between them. Therefore, the gate terminal 15 connected to the gate electrode 111 by the wiring 16 and the gate terminal 25 connected to the gate electrode 211 by the wiring 26 can be positioned on the same side of the semiconductor device 1 (the lower side in the example of FIG. 2). Similarly, the source terminals 17 and 27 can be located on the same side (the bottom side in the example of FIG. 2) of the semiconductor device 1. This facilitates interconnection of the gate terminals 15 and 25 outside the semiconductor device 1 and of the source terminals 17 and 27 outside the semiconductor device 1, which are necessary for the semiconductor device 1 to provide the switching function and the current backflow prevention function, as described above with reference to FIG.

[0122] Furthermore, according to the first embodiment, the source terminals 17 and 27 are located outside the pair of gate terminals 15 and 25, i.e., the gate terminals 15 and 25 are located away from the edge of the semiconductor device 1. Generally, external connection terminals of a semiconductor device are more likely to be damaged with use and / or over time if they are located at the edge. Since the gate terminals 15 and 25 are located away from the edge of the semiconductor device 1, they are less likely to be damaged. Instead, the source terminals 17 and 27, which are located at the edge, are more likely to be damaged. However, since the source terminals 17 and 27 have a larger area than the gate terminals 15 and 25, the source terminals 17 and 27 are less likely to be damaged than the gate terminals 15 and 25. Therefore, arranging the source terminals 17 and 27 at the edge reduces the risk of damage to the product (semiconductor device 1).

[0123] Although several embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These embodiments can be implemented in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their modifications are included within the scope and spirit of the invention, as well as within the scope of the invention described in the claims and their equivalents. [Explanation of symbols]

[0124] 1...Semiconductor device 10...Lead frame 11...Semiconductor chip 13...Connecting member 14...Connector 15...Gate terminal 16...Wiring 17...Source terminal 20...Lead frame 21...Semiconductor chip 23...Connecting member 24...Connector 25...Gate terminal 26...Wiring 27...Source terminal 30…Sealing resin

Claims

1. a first lead frame; a first semiconductor chip in contact with the first lead frame, including a first transistor, the first semiconductor chip having a first gate electrode and a first source electrode on a surface opposite to the first lead frame, the first gate electrode being connected to a gate of the first transistor, and the first source electrode being connected to a source of the first transistor; a first source terminal aligned with the first lead frame on a side in a first direction; a first gate terminal aligned with the first source terminal on a side of a second direction intersecting the first direction and electrically connected to the first gate electrode; a first conductor in contact with the first source electrode via a conductor and in contact with the first source terminal via a conductor; a second lead frame located on the second direction side of the first lead frame and spaced apart from the first lead frame; a second semiconductor chip in contact with the second lead frame, including a second transistor, the second semiconductor chip having a second gate electrode and a second source electrode on a surface opposite to the second lead frame, the second gate electrode being connected to the gate of the second transistor, and the second source electrode being connected to the source of the second transistor; a second gate terminal aligned with the first gate terminal on the second direction side and electrically connected to the second gate electrode; a second source terminal aligned with the second gate terminal on the second direction side; a second conductor in contact with the second source electrode via a conductor and in contact with the second source terminal via a conductor; A semiconductor device comprising:

2. the first source electrode includes a first portion and a second portion connected to the first portion; the first portion is aligned with the first gate electrode on a side in a third direction opposite to the first direction, the second portion is aligned with the first gate electrode on a side in a fourth direction opposite to the second direction, the second source electrode includes a third portion and a fourth portion connected to the third portion; the third portion is aligned with the second gate electrode on a side in the third direction, the fourth portion is aligned with the second gate electrode on a side in the second direction; The semiconductor device according to claim 1 .

3. the first semiconductor chip has a first side, a second side located closer to the first side in the second direction, and a third side facing the first source terminal; the first gate electrode faces the second side and the third side, the second semiconductor chip has a fourth side, a fifth side located closer to the fourth side in the second direction, and a sixth side facing the second source terminal; the second gate electrode faces the fourth side and the sixth side; The semiconductor device according to claim 2 .

4. the first semiconductor chip further includes a first diode having a first anode connected to the source of the first transistor and a first cathode connected to the drain of the first transistor; the second semiconductor chip further includes a second diode having a second anode connected to the source of the second transistor and a second cathode connected to the drain of the second transistor; The semiconductor device according to claim 3 .

5. the first lead frame includes a fifth portion and a sixth portion; the sixth portion is connected to the fifth portion on the side in the second direction, is aligned with the second lead frame, and is located on the fifth direction side from the first lead frame toward the first semiconductor chip, relative to the fifth portion; The semiconductor device according to claim 4 .

6. a shape of the first semiconductor chip, a shape of the first gate electrode and a position thereof in the first semiconductor chip, and a shape of the first source electrode and a position thereof in the first semiconductor chip are the same as a shape of the second semiconductor chip, a shape of the second gate electrode and a position thereof in the second semiconductor chip, and a shape of the second source electrode and a position thereof in the second semiconductor chip, respectively; The semiconductor device according to claim 5 .

7. further comprising a resin that entirely or partially covers each of the first lead frame, the first semiconductor chip, the first source terminal, the first gate terminal, the first conductor, the second lead frame, the second semiconductor chip, the second gate terminal, the second source terminal, and the second conductor; each of the first lead frame and the second lead frame is partially exposed from the resin on a side in the third direction; each of the first source terminal, the first gate terminal, the second gate terminal, and the second source terminal is partially exposed from the resin on the first direction side; The semiconductor device according to claim 6.

8. the first source terminal includes a seventh portion and an eighth portion located closer to the seventh portion in the fifth direction, the first conductor includes a ninth portion, a tenth portion, and an eleventh portion located closer to the fifth direction than the ninth portion and the tenth portion, the second source terminal includes a twelfth portion and a thirteenth portion located closer to the fifth direction than the twelfth portion, the second conductor includes a fourteenth portion, a fifteenth portion, and a sixteenth portion located closer to the fourteenth portion and the fifteenth portion in the fifth direction; The semiconductor device according to claim 7 .

9. a first lead frame; a first semiconductor chip in contact with the first lead frame, including a first transistor, the first semiconductor chip having a first gate electrode and a first source electrode on a surface opposite to the first lead frame, the first gate electrode being connected to a gate of the first transistor, and the first source electrode being connected to a source of the first transistor; a first source terminal aligned with the first lead frame on a side in a first direction; a first gate terminal aligned with the first source terminal on a side of a second direction intersecting the first direction and electrically connected to the first gate electrode; a first conductor in contact with the first source electrode via a conductor and in contact with the first source terminal via a conductor; a second lead frame located on the second direction side of the first lead frame and spaced apart from the first lead frame; a second semiconductor chip in contact with the second lead frame, including a second transistor, the second semiconductor chip having a second gate electrode and a second source electrode on a surface opposite to the second lead frame, the second gate electrode being connected to the gate of the second transistor, and the second source electrode being connected to the source of the second transistor; a second gate terminal aligned with the first gate terminal on the second direction side and electrically connected to the second gate electrode; a second source terminal aligned with the second gate terminal on the second direction side; a second conductor in contact with the second source electrode via a conductor and in contact with the second source terminal via a conductor; Equipped with a shape of the first semiconductor chip, a shape of the first gate electrode and a position thereof in the first semiconductor chip, and a shape of the first source electrode and a position thereof in the first semiconductor chip are the same as a shape of the second semiconductor chip, a shape of the second gate electrode and a position thereof in the second semiconductor chip, and a shape of the second source electrode and a position thereof in the second semiconductor chip, respectively; The orientation of the second semiconductor chip is rotated from the orientation of the first semiconductor chip. Semiconductor device.

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