Control system and control method for control system

The control system efficiently supplies AC power to loads by using a wireless power transmission system with synchronized switching and rectification, addressing the size and power supply challenges of existing systems, ensuring high precision and reduced interference.

JP7778526B2Active Publication Date: 2025-12-02CANON KK
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Patent Information

Application Number
JP2021173776
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Filing Date
2021-10-25
Publication Date
2025-12-02
Estimated Expiration
2041-10-25

AI Technical Summary

Technical Problem

The integration of a motor driver on the power receiving side of wireless power transmission increases the size of the coarse movement stage, and there is a need to supply appropriate AC power to the load efficiently.

Method used

A control system that includes a power transmitting unit and a power receiving unit, utilizing a switch circuit and clock signal generation to wirelessly transmit and receive AC power, with a rectifier circuit to restore the AC voltage waveform, and a clock switching circuit to synchronize the switching timing based on detected power levels, eliminating the need for a motor driver on the power receiving unit.

Benefits of technology

Enables the precise and efficient supply of AC power to the load, minimizing the size of the power receiving unit and reducing electromagnetic interference, thereby maintaining high positioning accuracy.

✦ Generated by Eureka AI based on patent content.

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Patent Text Reader

Abstract

To supply appropriate AC power to a load.SOLUTION: A power transmission unit has: a switch unit that performs switching of AC power at the timing based on a first clock signal, and wirelessly transmits the switched AC power; and a clock transmission unit that wirelessly transmits the first clock signal. A power reception unit has: a clock reception unit that receives the first clock signal wirelessly transmitted from the clock transmission unit; a detection unit that detects the amount of the AC power wirelessly transmitted by the switch unit and the switching timing; a clock generation unit that generates a second clock signal based on the switch timing detected by the detection unit; a clock selection unit that, according to the amount of power detected by the detection unit, selects the first clock signal or the second clock signal; and a rectification unit that performs switching of the AC power wirelessly transmitted by the switch unit at the timing based on the clock signal selected by the clock selection unit.SELECTED DRAWING: Figure 1
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Description

[Technical Field]

[0001] The present disclosure relates to a control system and a control method for a control system. [Background technology]

[0002] There are systems that supply power to motors to drive them. For example, in a semiconductor exposure apparatus, a coarse movement stage that moves the wafer to the exposure position is mounted on a fine movement stage that moves the wafer by small amounts to form a pattern on the wafer, and a motor that drives this fine movement stage is mounted on the coarse movement stage. A power supply cable that supplies power to drive this motor is connected to the motor mounted on the coarse movement stage. Because this power supply cable moves in conjunction with the movement of the coarse movement stage, the tension in the power supply cable affects the positioning accuracy of the stage. Therefore, wireless power transmission for driving the motor is being considered.

[0003] An AC voltage must be applied to the motor that moves the stage. For example, a positive voltage must be applied to move the stage in the positive direction on one axis, and a negative voltage must be applied to move it in the negative direction. To move the fine movement stage, an AC voltage must be applied to the motor mounted on the coarse movement stage.

[0004] The AC voltage applied to a motor is generally generated by a circuit called a motor driver. The AC voltage applied to the motor is generated by providing the motor driver with a DC voltage and a control signal. Patent Document 1 describes the configuration of a wireless motor drive system in which a motor driver is placed on a coarse movement stage and an AC voltage is applied to a motor mounted on the coarse movement stage using wireless power transmission. The coarse movement stage is the power receiving side of the wireless power transmission, and a power receiving unit for wireless power transmission is placed on the coarse movement stage. A DC voltage is wirelessly transmitted to the power receiving unit on the coarse movement stage and the DC voltage is provided to the motor driver on the coarse movement stage, generating the AC voltage to be applied to the motor mounted on the coarse movement stage and driving the motor. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Japanese Patent Application Publication No. 2018-54847 Summary of the Invention [Problem to be solved by the invention]

[0006] However, since space is required to place the motor driver on the power receiving side of the wireless power transmission, the coarse movement stage becomes larger, which requires a large-scale coarse movement stage control system.In addition, it is required to supply an appropriate amount of AC power to the load.

[0007] The object of the present disclosure is to enable the supply of appropriate AC power to a load. [Means for solving the problem]

[0008] The control system includes a power transmitting unit that wirelessly transmits AC power and a power receiving unit that receives the AC power wirelessly transmitted from the power transmitting unit, wherein the power transmitting unit includes a first switch that switches the AC power at a timing based on a first clock signal and wirelessly transmits the switched AC power. circuit and a clock transmitting unit that wirelessly transmits the first clock signal, and the power receiving unit includes a clock receiving unit that receives the first clock signal wirelessly transmitted from the clock transmitting unit, and the first switch circuit a first detection unit that detects the amount of AC power wirelessly transmitted by the power supply and a switching timing; and a second clock signal that generates a second clock signal based on the switching timing detected by the first detection unit. 2 Clock generation circuit a first clock signal receiving unit that selects a clock signal based on the first clock signal or the second clock signal output from the clock receiving unit according to the amount of power detected by the first detection unit; Switching Circuit and the first clock Switching CircuitThe first switch is operated at a timing based on a clock signal selected by circuit A first rectification circuit for switching AC power wirelessly transmitted by the circuit It has the following. [Effects of the Invention]

[0009] According to the present disclosure, appropriate AC power can be supplied to a load. [Brief explanation of the drawings]

[0010] [Figure 1] FIG. 1 is a block diagram illustrating an example of the configuration of a control system. [Figure 2] FIG. 1 is a perspective view showing an example of the configuration of a control system. [Figure 3] 10A and 10B are diagrams showing voltage waveforms generated in a power receiving antenna and a receiving antenna; [Figure 4] FIG. 1 is a block diagram illustrating an example of the configuration of a control system. [Figure 5] FIG. 1 is a block diagram illustrating an example of the configuration of a control system. [Figure 6] FIG. 1 is a perspective view showing an example of the configuration of a control system. [Figure 7] FIG. 1 is a block diagram illustrating an example of the configuration of a control system. DETAILED DESCRIPTION OF THE INVENTION

[0011] Hereinafter, the embodiments will be described in detail with reference to the drawings. Note that the following embodiments do not limit the scope of the claims. Although the embodiments describe multiple features, not all of these multiple features are necessarily essential, and multiple features may be combined arbitrarily. Furthermore, in the drawings, the same reference numerals are used to designate the same or similar components, and redundant explanations will be omitted.

[0012] (First embodiment) [System Configuration] FIG. 1 is a block diagram showing an example configuration of a control system 300 according to the first embodiment. The control system 300 includes a power transmitting unit 100, a power receiving unit 200, an AC power supply 401, and a load 402. There is no physical connection between the power transmitting unit 100 and the power receiving unit 200. Power is transmitted contactlessly from the power transmitting antenna 101 to the power receiving antenna 201, and a clock signal is transmitted contactlessly from the transmitting antenna 103 to the receiving antenna 203. The power transmitting antenna 101 and the power receiving antenna 201 are coupled by magnetic field coupling. Meanwhile, the transmitting antenna 103 and the receiving antenna 203 are coupled by electric field coupling. A control method for the control system 300 will be described below.

[0013] The power transmitting unit 100 includes a power transmitting antenna 101 and a switch circuit 102. The switch circuit 102 switches an AC voltage supplied from an AC power source 401 at a frequency higher than the frequency of the AC voltage supplied from the AC power source 401, and transmits the switched AC voltage to the power transmitting antenna 101. The power transmitting antenna 101 transmits power to the power receiving antenna 201 wirelessly.

[0014] The switch circuit 102 has, for example, a bidirectional switch formed by connecting the sources and gates of two FETs together to switch the supplied AC voltage. The bidirectional switch can switch the AC voltage because the body diodes of the two FETs do not turn on regardless of whether a positive or negative voltage is applied between the drains of the two FETs. By applying a voltage between the gate and source of the two FETs, the drains of the two FETs are switched on / off.

[0015] The power transmitting unit 100 also has a transmitting antenna 103, a clock transmitting circuit 104, and a first clock generating circuit 105. The first clock generating circuit 105 generates a first clock signal and sends the generated first clock signal to the transmitting antenna 103 via the clock transmitting circuit 104. The transmitting antenna 103 wirelessly transmits the first clock signal to the receiving antenna 203. The first clock generating circuit 105 also sends the first clock signal to the switch circuit 102 to control the switching timing of the switch circuit 102.

[0016] The power receiving unit 200 has a power receiving antenna 201 and a rectifier circuit 202. The power receiving antenna 201 wirelessly receives AC power transmitted from the power transmitting antenna 101. The rectifier circuit 202 rectifies the AC power wirelessly received by the power receiving antenna 201 to restore the original AC voltage waveform supplied by the AC power supply 401, and outputs the restored AC voltage to a load 402. The switch circuit 102, the power transmitting antenna 101, the power receiving antenna 201, and the rectifier circuit 202 form a resonant circuit for efficient wireless transmission of power.

[0017] The rectifier circuit 202 switches in synchronization with the switch circuit 102, thereby rectifying the AC voltage switched by the switch circuit 102 and restoring the AC voltage supplied from the AC power supply 401. The rectifier circuit 202 has a bidirectional switch similar to the switch circuit 102 in order to output the AC voltage to the load 402. The switch circuit 102 using the bidirectional switch and the rectifier circuit 202 enable wireless power transmission of the desired AC voltage to be applied from the AC power supply 401 to the load 402. The load 402 is, for example, a motor that physically displaces when an AC current is applied thereto, such as a voice coil motor.

[0018] In Patent Document 1, the AC voltage used to control the direction of movement of a fine movement stage driven by a motor, which is a load 402, is generated by a power receiving unit 200, and a DC voltage is applied to a power transmitting unit 100 from a DC power supply. The DC voltage is supplied to the power receiving unit 200 via wireless power transmission, and the DC voltage is supplied to a motor driver in the power receiving unit 200. The motor driver then generates an AC voltage to apply to the motor, thereby controlling the direction of movement of the fine movement stage. To ensure high precision of the AC voltage applied to the motor, the DC voltage is controlled to be kept constant.

[0019] On the other hand, unlike the configuration of Patent Document 1, the control system 300 of this embodiment does not have a motor driver in the power receiving unit 200, and the power receiving unit 200 is small. An AC power supply 401 corresponds to the motor driver of Patent Document 1. An AC voltage generated by the AC power supply 401 is applied to the power transmitting unit 100 for controlling the direction of movement of the fine movement stage. This AC voltage is then supplied to the power receiving unit 200 by wireless power transmission via the switch circuit 102, restored to the original AC voltage waveform by the rectifier circuit 202, and applied to a load 402, which is a motor that moves the fine movement stage.

[0020] The power receiving unit 200 also includes a detection unit 205, a second clock generation circuit 206, and a clock switching circuit 207. The detection unit 205 detects the amount and timing of AC power received by the power receiving antenna 201. The waveform of the AC voltage received by the power receiving antenna 201 is a waveform obtained by switching the AC voltage waveform applied from the AC power source 401 using the switch circuit 102. The amount of power to be detected is the magnitude of the AC power amplitude calculated from the AC voltage amplitude, the AC current amplitude, or both received by the power receiving antenna 201. The timing to be detected is the timing at which the waveform of the AC power calculated from the AC voltage, the AC current, or both received by the power receiving antenna 201 approaches zero. The second clock generation circuit 206 generates a second clock signal based on the timing detected by the detection unit 205 and sends the second clock signal to the clock switching circuit 207.

[0021] The power receiving unit 200 also has a receiving antenna 203 and a clock receiving circuit 204. The receiving antenna 203 wirelessly receives the first clock signal transmitted from the transmitting antenna 103. The clock receiving circuit 204 performs waveform shaping on the first clock signal wirelessly received by the receiving antenna 203, and sends the waveform-shaped first clock signal to the clock switching circuit 207.

[0022] The clock switching circuit 207 selects either the input first clock signal or the second clock signal and outputs it to the rectifier circuit 202. The rectifier circuit 202 restores the AC voltage supplied from the AC power source 401 by switching the AC voltage received by the power receiving antenna 201 based on the selected first clock signal or second clock signal, and supplies the restored AC voltage to the load 402.

[0023] 2 is a perspective view showing an example of the configuration of a control system 300 according to the first embodiment. The power receiving antenna 201 and the rectifier circuit 202 are mounted on a stage 502 that slides on one axis using a linear motor 501. The stage 502 is, for example, a coarse-motion stage. The power transmitting antenna 101 is longer than the power receiving antenna 201. As the stage 502 moves, the power transmitting antenna 101 and the power receiving antenna 201 face each other in a non-contact manner at any position of the stage 502. This allows the power receiving antenna 201 to wirelessly receive power from the power transmitting antenna 101 no matter what position the stage 502 is in.

[0024] Similarly, the receiving antenna 203 and clock receiving circuit 204 are mounted on the stage 502. The transmitting antenna 103 is longer than the receiving antenna 203. As the stage 502 moves, the transmitting antenna 103 and the receiving antenna 203 face each other without contacting each other, regardless of the position of the stage 502. This allows the receiving antenna 203 to wirelessly receive the clock signal from the transmitting antenna 103, regardless of the position of the stage 502.

[0025] [Role of the clock switching circuit] Clock switching circuit 207 selects either the input first clock signal or the second clock signal and outputs it to rectifier circuit 202. Clock switching circuit 207 selects either the first clock signal or the second clock signal based on the amount of power detected by detection unit 205. Clock switching circuit 207 selects the second clock signal when the amount of power detected by detection unit 205 is greater than a threshold, and selects the first clock signal when the amount of power detected by detection unit 205 is less than the threshold. The threshold is a preset threshold.

[0026] The reason for this selection is explained below. When the detected amount of power is greater than the threshold, that is, when the amount of power supplied from AC power supply 401 to load 402 is large, the voltages generated at power transmitting antenna 101 and power receiving antenna 201 are also large. As an example, FIG. 3(a) shows the simulation results of the voltage waveform generated at power receiving antenna 201 when a DC voltage of 45 V is wirelessly transmitted to load 402 of 9 Ω. The switching frequency of switch circuit 102 is 1.51 MHz, the inductance of power transmitting antenna 101 is 1.8 μH, and the inductance of power receiving antenna 201 is 0.98 μH. From the graph in FIG. 3(a), it can be seen that the voltage generated at power receiving antenna 201 is about 290 Vpp due to resonance.

[0027] In contrast, the amplitude of the clock signal received by the receiving antenna 203 is very small because the clock signal is attenuated between the transmitting antenna 103 and the receiving antenna 203. As an example, Figure 3(b) shows the measured voltage waveform received by the clock receiving circuit 204 when an 8 MHz, 10 Vpp clock signal is applied to the transmitting antenna 103. A comparator circuit is used as the clock receiving circuit 204. The two wavy waveforms near -2.5 V in the graph of Figure 3(b) represent the voltage waveforms on the positive and negative sides of the comparator circuit, and the peaked waveforms at the top and bottom represent the difference between these two waveforms, representing the differential input waveform of the comparator circuit. As can be seen from the graph of Figure 3(b), the voltage amplitude of the differential input waveform of the comparator circuit, i.e., the signal received by the receiving antenna 203 and transmitted to the clock receiving circuit 204, is only about 25 mV.

[0028] The power receiving antenna 201 and the receiving antenna 203, which generate these voltages, are closely spaced as shown in FIG. 2 . The stage 502 on which the power receiving unit 200 is mounted must be as small as possible to reduce the load on the linear motor 501 and the inertia generated by its own movement. Therefore, the power receiving antenna 201 and the receiving antenna 203 of the power receiving unit 200 must be closely packed into as little space as possible. This can cause electromagnetic interference between the power receiving antenna 201 and the receiving antenna 203, resulting in large-amplitude noise from the power receiving antenna 201 being superimposed on the small-amplitude signal transmitted to the clock receiving circuit 204, preventing the clock receiving circuit 204 from properly shaping the waveform. This can cause errors, such as missing bits, in the first clock signal output by the clock receiving circuit 204, resulting in an incorrect clock signal. As a result, the switching of the switch circuit 102 and the switching of the rectifier circuit 202 cannot be synchronized, and the rectifier circuit 202 may not be able to properly restore the AC power waveform.

[0029] On the other hand, at this time, the voltage generated in the power receiving antenna 201 is large, so the detector 205 correctly detects the amount of power and timing, and the second clock generating circuit 206 correctly generates the second clock signal. Also, the amount of power detected by the detector 205 is large.

[0030] Therefore, when the amount of power detected by the detection unit 205 is large, the clock switching circuit 207 selects the correctly generated second clock signal and outputs it to the rectifier circuit 202, causing the switch circuit 102 and the rectifier circuit 202 to perform switching in synchronization. As a result, the rectifier circuit 202 can restore the AC voltage supplied from the AC power supply 401 with high precision.

[0031] Next, a case where the amount of power supplied from AC power supply 401 to load 402 is small will be described. In this case, the voltage generated at power transmitting antenna 101 and power receiving antenna 201 is also small, and the amount of noise superimposed on receiving antenna 203 is small, making it less likely to affect the first clock signal. As a result, clock receiving circuit 204 can output a first clock signal whose waveform has been properly shaped.

[0032] On the other hand, at this time, the voltage generated at the power receiving antenna 201 is small, so the amount of power detected by the detection unit 205 is small. Furthermore, even if the detection unit 205 attempts to detect the timing, the voltage generated at the power receiving antenna 201 is so small that if the voltage falls below the detection limit of the detection unit 205, the detection unit 205 may not be able to detect the timing. Furthermore, if the power originally supplied to the load 402 by the AC power supply 401 has a waveform that alternates between positive and negative around zero, it may be impossible to distinguish this from the switching timing of the switch circuit 102, whose waveform is originally around zero. As a result, an error such as a missing bit may occur in the second clock signal generated by the second clock generation circuit 206 based on the timing detected by the detection unit 205, causing the second clock signal to become incorrect. As a result, the switching of the switch circuit 102 and the switching of the rectifier circuit 202 may not be synchronized, and the rectifier circuit 202 may not be able to correctly restore the AC power waveform.

[0033] Therefore, when the amount of power detected by the detection unit 205 is small, the clock switching circuit 207 selects the correctly generated first clock signal and outputs it to the rectifier circuit 202, causing the switch circuit 102 and the rectifier circuit 202 to perform switching in synchronization. As a result, the rectifier circuit 202 can restore the AC voltage supplied from the AC power supply 401 with high precision.

[0034] When the voltage generated in the power receiving antenna 201 is small and below the detection limit of the detector 205, the noise superimposed on the signal from the receiving antenna 203 due to electromagnetic interference is necessarily smaller than the detection limit. This does not affect the waveform shaping of the clock receiving circuit 204. Conversely, when the voltage generated in the power receiving antenna 201 exceeds the detection limit of the detector 205, the second clock generating circuit 206 can generate a correct second clock signal. Therefore, the first clock signal can always be divided into two cases: a case where the first clock signal is correct, and a case where the second clock signal is correct.

[0035] As described above, the clock switching circuit 207 selects and outputs the correct first clock signal or second clock signal based on the amount of power detected by the detection unit 205. The control system 300 suppresses clock signal errors caused by electromagnetic interference, and the switch circuit 102 and the rectifier circuit 202 perform switching in synchronization with each other, regardless of the amount of power supplied to the load 402, thereby enabling the AC voltage supplied from the AC power supply 401 to be restored with high precision.

[0036] [Synchronization of switch circuit and rectifier circuit] The first clock signal and the second clock signal input to the clock switching circuit 207 have the same frequency because they both originate from the clock signal generated by the first clock generation circuit 105. However, the first clock signal and the second clock signal do not necessarily have the same phase because they travel through different paths. The switching timing required for the switching operation of the rectifier circuit 202 is the switching timing of the voltage generated in the power receiving antenna 201, which is the switching target. Therefore, the switching timing required for the rectifier circuit 202 is the switching timing detected by the detection unit 205 from the voltage generated in the power receiving antenna 201. Therefore, before switching, the clock switching circuit 207 may shift the phase of the first clock signal output from the clock reception circuit 204 to match the phase of the switching timing detected by the detection unit 205.

[0037] When clock switching circuit 207 shifts the phase of the first clock signal to match the phase of the second clock signal, if the power supplied to load 402 is small, as described above, detection unit 205 may not be able to detect the voltage if it falls below the detection limit of detection unit 205. Furthermore, if the power supplied to load 402 has a waveform that alternates between positive and negative around zero, detection unit 205 may not be able to distinguish this from the switching timing of switch circuit 102 that it should detect. In such cases, detection unit 205 may not be able to detect the correct switching timing, and clock switching circuit 207 may not be able to correctly shift the phase of the first clock signal to match the phase of the second clock signal.

[0038] To avoid such a situation, the control system 300 may perform an initial operation to synchronize the switch circuit 102 and the rectifier circuit 202 before starting a sequence for supplying the desired power to the load 402. Specifically, as the initial operation of the control system 300, the AC power supply 401 outputs a power sufficient for the detection unit 205 to detect the timing. At that time, the clock switching circuit 207 shifts the phase of the first clock signal to match the phase of the second clock signal. Thereafter, the clock switching circuit 207 maintains this phase shift. By doing so, even when the sequence for supplying the desired power to the load 402 starts, the first clock signal always matches the phase of the second clock signal. Therefore, regardless of which clock signal the clock switching circuit 207 switches to, the switching timing of the switch circuit 102 and the rectifier circuit 202 can always be synchronized, and the AC voltage supplied from the AC power supply 401 can be restored with high accuracy.

[0039] As described above, the power transmitting unit 100 transmits AC power wirelessly. The power receiving unit 200 receives the AC power wirelessly transmitted from the power transmitting unit 100. The clock generating circuit 105 is a clock generating unit that generates a first clock signal. The switch circuit 102 is a switch unit that switches the AC power of the AC power supply 401 via the power transmitting antenna 101 at a timing based on the first clock signal generated by the clock generating circuit 105, and transmits the switched AC power wirelessly. The clock transmitting circuit 104 is a clock transmitting unit that wirelessly transmits the first clock signal generated by the clock generating circuit 105 via the transmitting antenna 103.

[0040] The clock receiving circuit 204 is a clock receiving unit that receives the first clock signal wirelessly transmitted from the clock transmitting circuit 104 via the receiving antenna 203. The detecting unit 205 detects the amount of AC power wirelessly transmitted by the switch circuit 102 and the switching timing. The clock generating circuit 206 generates a second clock signal based on the switching timing detected by the detecting unit 205.

[0041] Clock switching circuit 207 is a clock selection unit that selects the second clock signal generated by clock generation circuit 206 when the amount of power detected by detection unit 205 is a first amount of power. Furthermore, clock switching circuit 207 selects a clock signal based on the first clock signal output from clock reception circuit 204 when the amount of power detected by detection unit 205 is a second amount of power that is smaller than the first amount of power.

[0042] The rectifier circuit 202 is a rectifier unit, and switches the AC power wirelessly transmitted by the switch circuit 102 at a timing based on the clock signal selected by the clock switching circuit 207 .

[0043] The clock switching circuit 207 may shift the phase of the first clock signal output from the clock receiving circuit 204 so that the first clock signal matches the phase of the switching timing detected by the detection unit 205. In this case, when the amount of power detected by the detection unit 205 is the second amount of power, the clock switching circuit 207 selects the phase-shifted clock signal.

[0044] The clock switching circuit 207 shifts the phase of the first clock signal so that it matches the phase of the switching timing detected by the detection unit 205 during the period immediately after the start-up of the control system 300, and thereafter can maintain the amount of phase shift. The period immediately after the start-up of the control system 300 is a period during which the AC power wirelessly transmitted by the switch circuit 102 exceeds the lower detection limit of the detection unit 205.

[0045] Furthermore, when the amount of power detected by the detecting unit 205 is greater than the threshold, the clock switching circuit 207 selects the second clock signal generated by the clock generating circuit 206. Furthermore, when the amount of power detected by the detecting unit 205 is less than the threshold, the clock switching circuit 207 selects the clock signal based on the first clock signal output from the clock receiving circuit 204.

[0046] Two thresholds may be set. When the amount of power detected by the detection unit 205 is greater than the first threshold, the clock switching circuit 207 selects the second clock signal generated by the clock generation circuit 206. When the amount of power detected by the detection unit 205 is less than the second threshold, the clock switching circuit 207 selects a clock signal based on the first clock signal output from the clock reception circuit 204. When the amount of power detected by the detection unit 205 is less than the first threshold and greater than the second threshold, the clock switching circuit 207 selects a clock signal obtained by adding the first clock signal output from the clock reception circuit 204 and the second clock signal.

[0047] The threshold value may have a hysteresis characteristic, which can prevent chattering that occurs when the amount of power detected by the detection unit 205 frequently crosses the threshold value.

[0048] The switch circuit 102 and the rectifier circuit 202 each use a bidirectional switch for switching. As shown in Fig. 2, the power receiving antenna 201 is movable relative to the power transmitting antenna 101. The receiving antenna 203 is movable relative to the transmitting antenna 103.

[0049] As described above, according to this embodiment, the control system 300 can apply an AC voltage to, for example, a motor on the coarse movement stage 502 using wireless power transmission, thereby enabling the power receiving unit 200 to be miniaturized. Furthermore, when the amount of power detected by the detection unit 205 is large, the amount of noise superimposed on the first clock signal of the receiving antenna 203 increases. When the amount of power detected by the detection unit 205 is small, the amount of noise superimposed on the first clock signal of the receiving antenna 203 decreases. The clock switching circuit 207 selects a clock signal according to the amount of power detected by the detection unit 205, thereby appropriately controlling the switching timing of the rectifier circuit 202 and applying the wirelessly transmitted AC voltage to the load 402 with high precision.

[0050] (Second embodiment) Fig. 4 is a block diagram showing an example configuration of a control system 300 according to the second embodiment. The control system 300 in Fig. 4 is configured by adding a first frequency divider circuit 106 and a second frequency divider circuit 208 to the control system 300 in Fig. 1. The power transmitting unit 100 has the first frequency divider circuit 106. The power receiving unit 200 has the second frequency divider circuit 208. Differences between the second embodiment and the first embodiment will be described below.

[0051] The first clock generation circuit 105 of the power transmission unit 100 generates a first clock signal and sends the generated first clock signal to the first frequency divider circuit 106. The first frequency divider circuit 106 divides the frequency of the first clock signal to change the frequency of the first clock signal, and then sends the divided clock signal to the switch circuit 102 to control the switching timing of the switch circuit 102. The switch circuit 102 performs switching using the clock signal having the frequency changed by the first frequency divider circuit 106. Therefore, the frequency of the switching timing detected by the detection unit 205 is also the frequency changed by the first frequency divider circuit 106. The frequency of the second clock signal generated by the second clock generation circuit 206 based on the timing detected by the detection unit 205 and sent to the clock switching circuit 207 is also the frequency changed by the first frequency divider circuit 106.

[0052] The clock receiving circuit 204 of the power receiving unit 200 sends the first clock signal to the second frequency dividing circuit 208. The second frequency dividing circuit 208 divides the frequency of the first clock signal to change the first clock signal to the same frequency as that of the first frequency dividing circuit 106, and then sends the divided first clock signal to the clock switching circuit 207.

[0053] As described above, the frequencies of the first clock signal and the second clock signal sent to the clock switching circuit 207 are both changed by the first frequency divider circuit 106 and the second frequency divider circuit 208 and match. However, as in the first embodiment, the phases of the first clock signal and the second clock signal do not necessarily match. Therefore, before switching, the clock switching circuit 207 may shift the phase of the first clock signal output from the second frequency divider circuit 208 so that it matches the phase of the switching timing of the changed frequency detected by the detection unit 205.

[0054] By providing the first frequency divider circuit 106 and the second frequency divider circuit 208, the switch circuit 102 and the rectifier circuit 202 can perform synchronous switching at any frequency. In this way, the control system 300 can wirelessly supply power output from multiple independent AC power sources 401 to multiple independent loads 402 at different frequencies simultaneously.

[0055] FIG. 5 is a block diagram showing an example of the configuration of a control system 300 according to the second embodiment in the case where powers output from two independent AC power sources 401 and 411 are simultaneously supplied to two independent loads 402 and 412 at different frequencies.

[0056] The control system 300 in Fig. 5 is obtained by adding an AC power supply 411, a power transmitting antenna 111, a switch circuit 112, and a first frequency divider circuit 116 to the control system 300 in Fig. 4. Furthermore, the control system 300 in Fig. 5 is obtained by adding a power receiving antenna 211, a rectifier circuit 212, a detector 215, a second clock generating circuit 216, a clock switching circuit 217, a second frequency divider circuit 218, and a load 412 to the control system 300 in Fig. 4.

[0057] The power transmitting unit 100 has a power transmitting antenna 111, a switch circuit 112, and a first frequency dividing circuit 116. The power receiving unit 200 has a power receiving antenna 211, a rectifier circuit 212, a detector 215, a second clock generating circuit 216, a clock switching circuit 217, and a second frequency dividing circuit 218.

[0058] The switch circuit 112 switches the AC voltage supplied from the AC power source 411 at a frequency higher than the frequency of the AC voltage supplied from the AC power source 411 and sends the switched AC voltage to the power transmitting antenna 111. The power transmitting antenna 111 wirelessly transmits power to the power receiving antenna 211. The first clock generating circuit 105 sends the generated first clock signal to the first frequency dividing circuits 106 and 116. The first frequency dividing circuit 106 divides the first clock signal to change the frequency of the first clock signal, and then sends the divided clock signal to the switch circuit 112 to control the switching timing of the switch circuit 112.

[0059] The power receiving antenna 211 wirelessly receives the AC power transmitted from the power transmitting antenna 111. The rectifier circuit 212 rectifies the AC power wirelessly received by the power receiving antenna 211 to restore the original AC voltage waveform supplied by the AC power supply 411, and outputs the restored AC voltage to the load 412.

[0060] The detection unit 215 detects the amount and timing of AC power received by the power receiving antenna 211. The second clock generation circuit 216 generates a second clock signal based on the timing detected by the detection unit 215 and sends the second clock signal to the clock switching circuit 217.

[0061] The clock receiving circuit 204 sends the first clock signal to the second frequency divider circuits 208 and 218. The second frequency divider circuit 208 divides the frequency of the first clock signal to change the frequency of the first clock signal to the same frequency as that of the first frequency divider circuit 116, and then sends the divided first clock signal to the clock switching circuit 217.

[0062] The clock switching circuit 217 selects the second clock signal when the amount of power detected by the detection unit 215 is greater than the threshold, and selects the first clock signal when the amount of power detected by the detection unit 215 is less than the threshold. Then, the clock switching circuit 217 outputs the selected first clock signal or second clock signal to the rectification circuit 212. The rectification circuit 212 restores the AC voltage supplied from the AC power source 411 by switching the AC voltage received by the power receiving antenna 211 based on the selected first clock signal or second clock signal, and supplies the restored AC voltage to the load 412.

[0063] Compared to Figure 4, the control system 300 in Figure 5 has a configuration in which the first clock generation circuit 105, clock transmission circuit 104, transmission antenna 103, receiving antenna 203, and clock reception circuit 204 are all shared and form one set, while the remaining circuits are increased to two. Two independent sets of switch circuits 102, 112 and rectifier circuits 202, 212 can be synchronized by one clock signal sent contactlessly using one set of transmission antenna 103 and receiving antenna 203. Thus, the control system 300 can simultaneously wirelessly supply power output from two independent AC power sources 401 and 411 to two independent loads 402 and 412 at different frequencies.

[0064] The advantages of using different frequencies will now be described. FIG. 6 is a perspective view showing an example configuration of a control system 300 according to the second embodiment in which powers output from two independent AC power sources 401 and 411 are simultaneously supplied to two independent loads 402 and 412 at different frequencies. An additional switch circuit 112 and power transmitting antenna 111 are arranged overlappingly on the switch circuit 102 and power transmitting antenna 101, and an additional power receiving antenna 211 and rectifier circuit 212 are arranged overlappingly on the power receiving antenna 201 and rectifier circuit 202. As described above, the stage 502 on which the power receiving unit 200 is mounted is required to be as small as possible in order to reduce the load on the linear motor 501 and to reduce the inertia generated by its own movement. Therefore, the power receiving antenna 201 of the power receiving unit 200 and the additional power receiving antenna 211 must be accommodated closely in as small a space as possible. This may cause electromagnetic interference between power receiving antenna 201 and power receiving antenna 211, causing the AC powers to be superimposed on each other, making it impossible to supply correct AC power to loads 402 and 412.

[0065] However, by changing the first frequency divider circuits 106 and 116 to different frequencies and similarly changing the second frequency divider circuits 208 and 218 to different frequencies, the switching frequencies of the voltages generated at the power receiving antennas 201 and 211 are different from each other. Furthermore, because the switching frequencies of the rectifier circuits 202 and 212 are also different from each other, even if the voltages are superimposed on each other, the rectifier circuits 202 and 212 do not rectify the voltages of different frequencies, and as a result, they do not affect each other's AC powers supplied to the loads 402 and 412. Therefore, even if the power receiving antenna 201 of the power receiving unit 200 and the additional power receiving antenna 211 are arranged closely to each other, the AC voltages output from the AC power sources 401 and 411 can be independently restored with high accuracy and supplied to the loads 402 and 412.

[0066] Although the example described above is a case where power output from two independent AC power sources 401 and 411 is supplied at different frequencies to two independent loads 402 and 412 simultaneously, three or more power sources may be used. In this case, additional switch circuits, power transmitting antennas, power receiving antennas, and rectifier circuits may be stacked on top of each other.

[0067] 4, the frequency divider circuit 106 is a frequency changer, and outputs a clock signal obtained by changing the frequency of the first clock signal generated by the clock generation circuit 105 to the switch circuit 102. The switch circuit 102 switches the AC power at a timing based on the clock signal output from the frequency divider circuit 106.

[0068] The frequency divider circuit 208 outputs a clock signal obtained by changing the frequency of the first clock signal output from the clock receiving circuit 204 to the clock switching circuit 207. When the amount of power detected by the detection unit 205 is smaller than a threshold value, the clock switching circuit 207 selects the clock signal output from the frequency divider circuit 208.

[0069] Next, the control system 300 in Fig. 5 will be described. The frequency divider circuit 116 outputs a clock signal obtained by changing the frequency of the first clock signal generated by the clock generation circuit 105. The switch circuit 112 switches other AC power at a timing based on the clock signal output from the frequency divider circuit 116, and transmits the switched AC power wirelessly via the power transmitting antenna 111.

[0070] The frequency divider circuit 218 outputs a clock signal obtained by changing the frequency of the first clock signal output from the clock receiving circuit 204. The detector 215 detects the amount of AC power wirelessly transmitted by the switch circuit 112 and the switching timing. The clock generator circuit 216 generates a clock signal based on the switching timing detected by the detector 215.

[0071] When the amount of power detected by the detection unit 215 is a third amount of power, the clock switching circuit 217 selects the clock signal generated by the clock generation circuit 216. When the amount of power detected by the detection unit 215 is a fourth amount of power that is smaller than the third amount of power, the clock switching circuit 217 selects the clock signal output from the frequency divider circuit 218. The rectifier circuit 212 switches the AC power wirelessly transmitted by the switch circuit 112 at a timing based on the clock signal selected by the clock switching circuit 217.

[0072] As described above, according to this embodiment, by providing the frequency divider circuits 106, 116, 208 and 218, it is possible to apply appropriate AC voltages to the plurality of loads 402 and 412.

[0073] (Third embodiment) FIG. 7 is a block diagram showing an example configuration of a control system 300 according to the third embodiment. The control system 300 in FIG. 7 is configured by adding a first control circuit 120, a frequency divider circuit 209, a phase shift circuit 210, and a second control circuit 220 to the control system 300 in FIG. 1. The power transmitting unit 100 has the first control circuit 120. The power receiving unit 200 has the frequency divider circuit 209, a phase shift circuit 210, and a second control circuit 220. The first control circuit 120 has a frequency divider circuit 121, a phase shift circuit 122, and a pulse width adjustment circuit 123. The second control circuit 220 has a frequency divider circuit 221, a phase shift circuit 222, and a pulse width adjustment circuit 223. Differences between the third embodiment and the first and second embodiments will be described below.

[0074] The first clock generating circuit 105 of the power transmitting unit 100 sends the generated first clock signal to the first control circuit 120. The first control circuit 120 changes the frequency, phase, and pulse width of the first clock signal generated by the first clock generating circuit 105 using the frequency dividing circuit 121, the phase shifting circuit 122, and the pulse width adjusting circuit 123, and sends the changed first clock signal to the switch circuit 102. In this way, the first control circuit 120 controls the switching timing of the switch circuit 102. The first control circuit 120 may be, for example, an MCU (microcontrol unit).

[0075] Because switch circuit 102 performs switching at the frequency changed by first control circuit 120, the frequency of the switching timing detected by detection unit 205 is also the frequency changed by first control circuit 120. The frequency of the second clock signal generated by second clock generation circuit 206 based on the timing detected by detection unit 205 is also a similarly changed frequency. Frequency divider circuit 209 changes the frequency of the second clock signal generated by second clock generation circuit 206 to the frequency of the first clock signal generated by first clock generation circuit 105.

[0076] The frequency of the first clock signal output from the clock receiving circuit 204 remains the same as the original frequency of the first clock signal generated by the first clock generating circuit 105. The phase shift circuit 210 shifts the phase of the first clock signal output from the clock receiving circuit 204 to match the phase of the second clock signal output from the frequency dividing circuit 209, and sends the phase shifted first clock signal to the clock switching circuit 207.

[0077] Furthermore, the frequency divider circuit 209 sends the changed second clock signal to the clock switching circuit 207. Therefore, the first clock signal whose phase has been shifted by the phase shift circuit 210 and the second clock signal whose phase has been changed by the frequency divider circuit 209 are input to the clock switching circuit 207. The phases of the first clock signal and the second clock signal input to the clock switching circuit 207 are matched by the phase shift circuit 210. As in the first embodiment, the phase shift circuit 210 may shift the phase during initial operation to achieve synchronization and maintain it thereafter.

[0078] The clock switching circuit 207 selects either the first clock signal or the second clock signal depending on the amount of power detected by the detection unit 205, and outputs the selected signal to the second control circuit 220. As in the first embodiment, the clock switching circuit 207 selects the first clock signal when the amount of power is smaller than the threshold, and selects the second clock signal when the amount of power is larger than the threshold.

[0079] The second control circuit 220 changes the frequency, phase, and pulse width of the selected first or second clock signal using the frequency divider circuit 221, phase shift circuit 222, and pulse width adjustment circuit 223, and sends the changed first or second clock signal to the rectifier circuit 202. In this way, the second control circuit 220 controls the switching timing of the rectifier circuit 202. The second control circuit 220 may be, for example, an MCU (microcontrol unit).

[0080] The second control circuit 220 may change the frequency of the clock signal output from the clock switching circuit 207 to the same frequency as that of the first control circuit 120, and then shift the phase to match the phase of the switching timing detected by the detection unit 205. Furthermore, the second control circuit 220 may shift the phase during initial operation to achieve synchronization and maintain it thereafter, as in the first embodiment.

[0081] Furthermore, the first control circuit 120 and the second control circuit 220 can change the pulse width of the clock signal using the pulse width adjustment circuits 123 and 223. For example, the pulse width adjustment circuits 123 and 223 can change the pulse width to provide a dead time to the clock signal. By providing a dead time, it is possible to suppress through current in the switch circuit 102 and the rectifier circuit 202 and reduce switching loss.

[0082] Furthermore, as in the second embodiment, the switch circuit 102 and the rectifier circuit 202 can perform synchronous switching at any frequency. Therefore, power output from multiple independent AC power sources 401 may be wirelessly supplied to multiple independent loads 402 at different frequencies simultaneously. In this case, the clock switching circuit 207 and other components need only be provided in a first set of AC power sources 401 and loads 402 that performs wireless power transmission using the power transmitting antenna 101 and power receiving antenna 201 adjacent to the transmitting antenna 103 and receiving antenna 203 in FIG. 6 . The clock switching circuit 207 does not need to be provided in a second set of AC power sources 411 and loads 412 that uses the power transmitting antenna 111 and power receiving antenna 211 that are distant from the transmitting antenna 103 and receiving antenna 203, or in third and subsequent sets stacked on top of that. The second and subsequent sets do not need to be provided with the second clock generation circuit 206, clock switching circuit 207, frequency divider circuit 209, and phase shift circuit 210, and the output of the clock switching circuit 207 provided only in the first set may be input to each of the second and subsequent sets of second control circuits 220. Then, the detection unit 205 only needs to detect the timing. The second control circuit 220 changes the frequency of the clock signal received from the clock switching circuit 207 to the same frequency as the first control circuit 120, and then shifts the phase to match the timing detected by the detection unit 205, thereby achieving synchronization.

[0083] The reason why only the first set needs the clock generation circuit 206, clock switching circuit 207, frequency divider circuit 209, and phase shift circuit 210 is that the receiving antenna 203 is susceptible to noise superposition due to electromagnetic interference with the adjacent power receiving antenna 201. In the first set, the clock switching circuit 207 ensures that the clock signal generated by the first clock generation circuit 105 is always correctly obtained. Therefore, the clock signal output from this clock switching circuit 207 can be used for the second and subsequent sets. Regarding synchronization of the switch circuits 102 and rectifier circuits 202 for the second and subsequent sets, since the switching frequencies for the second and subsequent sets are different due to the frequency divider circuit 121, synchronization can be achieved using the respective detectors 205 and second control circuits 220. The switching frequencies for the second and subsequent sets do not all need to be different; they can be the same. When electromagnetic interference is a problem, frequency separation can be used to suppress interference.

[0084] Furthermore, the clock switching circuit 207 may arbitrarily set a threshold for the amount of power, and may have a hysteresis characteristic. This prevents chattering that occurs when the amount of power detected by the detection unit 205 frequently crosses the threshold. Alternatively, the clock switching circuit 207 may have two thresholds and divide the amount of power detected by the detection unit 205 into three levels: high, medium, and low. The clock switching circuit 207 may select the second clock signal when the amount of power is high, the first clock signal when the amount of power is low, and output a clock signal obtained by adding both the first and second clock signals using an OR circuit or the like when the amount of power is medium. By providing a medium level, the clock switching circuit 207 can prevent the disappearance of clock signals or the occurrence of surges during switching. Furthermore, even if one of the clock signals becomes erroneous due to external noise or the like, the presence of the other clock signal enhances error suppression.

[0085] Furthermore, a filter may be provided in the frequency divider circuit to adjust the bandwidth to remove noise from the clock signal, or to maintain the original clock signal without reacting to single-shot noise, thereby further improving the reliability of the clock signal.

[0086] The power transmitting antenna 101 and the power receiving antenna 201 may be formed by wiring on a printed circuit board, or a magnetic sheet may be attached to the printed circuit board to reduce loss during electromagnetic field coupling and electromagnetic noise radiation. The power transmitting antenna 101 and the power receiving antenna 201 may also be a wound transformer using a magnetic material such as ferrite and a winding such as a litz wire.

[0087] The coupling between the power transmitting antenna 101 and the power receiving antenna 201 and the coupling between the transmitting antenna 103 and the receiving antenna 203 may be any combination of coupling such as electric field coupling, magnetic field coupling, optical coupling, or acoustic wave coupling.

[0088] As described above, the frequency divider circuit 121 outputs a clock signal obtained by changing the frequency of the first clock signal generated by the clock generation circuit 105. The phase shift circuit 122 and the pulse width adjustment circuit 123 can be omitted. The switch circuit 102 switches the AC power at a timing based on the clock signal output from the frequency divider circuit 121.

[0089] The frequency divider circuit 209 outputs a clock signal obtained by changing the frequency of the second clock signal generated by the clock generator circuit 206. The phase shifter circuit 210 is a phase shifter that shifts the phase of the first clock signal output from the clock receiver circuit 204 so that the phase matches the phase of the clock signal output from the frequency divider circuit 209.

[0090] The frequency divider circuit 221 outputs a clock signal obtained by changing the frequency of the clock signal selected by the clock switching circuit 207. The phase shift circuit 222 and the pulse width adjustment circuit 223 can be omitted. The rectifier circuit 202 switches the AC power wirelessly transmitted by the switch circuit 102 at a timing based on the clock signal output from the frequency divider circuit 221.

[0091] Next, the second set will be described. In the second set, the clock switching circuit 207 can be omitted. The frequency divider circuit 121 of the second set outputs a clock signal obtained by changing the frequency of the first clock signal generated by the clock generation circuit 105. The switch circuit 102 of the second set switches other AC power at a timing based on the clock signal output from the frequency divider circuit 121 of the second set, and transmits the switched AC power wirelessly via the power transmitting antenna 101 of the second set.

[0092] The second set of frequency divider circuit 221 outputs a clock signal obtained by changing the frequency of the clock signal selected by the clock switching circuit 207. The second set of rectifier circuit 202 switches the AC power wirelessly transmitted by the second set of switch circuit 102 at a timing based on the clock signal output from the second set of frequency divider circuit 221.

[0093] The pulse width adjustment circuits 123 and 223 can also be applied to the first and second embodiments. The pulse width adjustment circuit 123 is a pulse width adjustment unit that adjusts the pulse width of the clock signal input to the switch circuit 102. The pulse width adjustment circuit 123 adjusts the pulse width of the clock signal input to the rectifier circuit 202.

[0094] As described above, according to this embodiment, by providing frequency divider circuits 121 and 221, it is possible to apply an appropriate AC voltage to multiple loads 402. Furthermore, by sharing clock switching circuit 207 among multiple sets, it is possible to omit clock switching circuit 207 from the second set onwards.

[0095] It should be noted that the above-described embodiments merely illustrate specific examples of implementing the present disclosure, and the technical scope of the present disclosure should not be construed as being limited by these embodiments. In other words, the present disclosure is not limited to the above-described embodiments, and various changes and modifications are possible. [Explanation of symbols]

[0096] 100 power transmitting unit, 101 power transmitting antenna, 102 switch circuit, 103 transmitting antenna, 104 clock transmitting circuit, 105 first clock generating circuit, 106 frequency dividing circuit, 111 power transmitting antenna, 112 switch circuit, 116 frequency dividing circuit, 120 first control circuit, 200 power receiving unit, 201 power receiving antenna, 202 rectifier circuit, 203 receiving antenna, 204 clock receiving circuit, 205 detection unit, 206 second clock generating circuit, 207 clock switching circuit, 208 frequency dividing circuit, 209 frequency dividing circuit, 210 phase shift circuit, 211 power receiving antenna, 212 rectifier circuit, 215 detection unit, 216 clock generating circuit, 217 clock switching circuit, 218 frequency dividing circuit, 220 second control circuit, 300 control system, 401 AC power supply, 402 Load, 411 AC power supply, 412 Load, 501 Linear motor, 502 Stage

Claims

1. a power transmission unit that wirelessly transmits AC power; a power receiving unit that receives AC power wirelessly transmitted from the power transmitting unit, The power transmission unit is a first switch circuit that switches the AC power at a timing based on a first clock signal and wirelessly transmits the switched AC power; a clock transmitting unit that wirelessly transmits the first clock signal, The power receiving unit is a clock receiving unit that receives a first clock signal wirelessly transmitted from the clock transmitting unit; a first detection unit that detects the amount of AC power wirelessly transmitted by the first switch circuit and a switching timing; a second clock generation circuit that generates a second clock signal based on the switching timing detected by the first detection unit; a first clock switching circuit that selects a clock signal based on the first clock signal output from the clock receiving unit or the second clock signal in accordance with the amount of power detected by the first detecting unit; a first rectifier circuit that switches AC power wirelessly transmitted by the first switch circuit at a timing based on the clock signal selected by the first clock switching circuit; A control system comprising:

2. 2. The control system according to claim 1, wherein the first clock switching circuit selects the second clock signal when the amount of power detected by the first detection unit is a first amount of power, and selects a clock signal based on the first clock signal output from the clock receiving unit when the amount of power detected by the first detection unit is a second amount of power that is smaller than the first amount of power.

3. 3. The control system according to claim 2, wherein, when the amount of power detected by the first detection unit is the second amount of power, the first clock switching circuit selects a clock signal obtained by shifting the phase of the first clock signal output from the clock receiving unit so as to match the phase of the switching timing detected by the first detection unit.

4. 4. The control system according to claim 3, wherein the first clock switching circuit shifts the phase of the first clock signal to match the phase of the switching timing detected by the first detection unit during a period in which the AC power wirelessly transmitted by the first switch circuit is above a lower limit of the detection limit of the first detection unit, and thereafter holds the amount of phase shift.

5. 5. The control system according to claim 4, wherein the period during which the lower limit is exceeded is a period immediately after the control system is started up.

6. The control system according to any one of claims 1 to 5, characterized in that the first clock switching circuit selects the second clock signal when the amount of power detected by the first detection unit is greater than a threshold value, and selects a clock signal based on the first clock signal output from the clock receiving unit when the amount of power detected by the first detection unit is less than the threshold value.

7. The first clock switching circuit includes: selecting the second clock signal when the amount of power detected by the first detection unit is greater than a first threshold; If the amount of power detected by the first detector is smaller than a second threshold, a clock signal based on the first clock signal output from the clock receiver is selected; A control system as described in any one of claims 1 to 5, characterized in that when the amount of power detected by the first detection unit is smaller than the first threshold value and larger than the second threshold value, a clock signal obtained by adding the first clock signal output from the clock receiving unit and the second clock signal is selected.

8. 8. The control system according to claim 6, wherein the threshold value has a hysteresis characteristic.

9. the power transmitting unit further includes a first frequency dividing circuit that outputs a clock signal obtained by changing the frequency of the first clock signal to the first switch circuit; the power receiving unit further includes a second frequency divider circuit that outputs a clock signal obtained by changing the frequency of the first clock signal output from the clock receiving unit to the first clock switching circuit; the first switch circuit switches the AC power at a timing based on the clock signal output from the first frequency divider circuit; The control system according to any one of claims 2 to 5, characterized in that the first clock switching circuit selects the clock signal output from the second frequency divider circuit when the amount of power detected by the first detection unit is the second amount of power.

10. The power transmission unit is a third frequency divider circuit that outputs a clock signal obtained by changing the frequency of the first clock signal; a second switch circuit that switches another AC power at a timing based on the clock signal output from the third frequency divider circuit and wirelessly transmits the switched AC power, The power receiving unit is a fourth frequency divider circuit that outputs a clock signal obtained by changing the frequency of the first clock signal output from the clock receiving unit; a second detection unit that detects the amount of AC power wirelessly transmitted by the second switch circuit and a switching timing; a third clock generation circuit that generates a third clock signal based on the switching timing detected by the second detection unit; a second clock switching circuit that selects the third clock signal or the clock signal output from the fourth frequency divider circuit in accordance with the amount of power detected by the second detector; 10. The control system according to claim 9, further comprising: a second rectifier circuit that switches the AC power wirelessly transmitted by the second switch circuit at a timing based on the clock signal selected by the second clock switching circuit.

11. 11. The control system according to claim 10, wherein the second clock switching circuit selects the third clock signal when the amount of power detected by the second detection unit is a third amount of power, and selects the clock signal output from the fourth frequency divider circuit when the amount of power detected by the second detection unit is a fourth amount of power that is smaller than the third amount of power.

12. the power transmitting unit further includes a first frequency dividing circuit that outputs a clock signal obtained by changing the frequency of the first clock signal; The power receiving unit is a second frequency divider circuit that outputs a clock signal obtained by changing the frequency of the second clock signal; a phase shift circuit that shifts the phase of the first clock signal output from the clock receiving unit so that the phase of the first clock signal matches the phase of the clock signal output from the second frequency divider circuit; a third frequency divider circuit that outputs a clock signal obtained by changing the frequency of the clock signal selected by the first clock switching circuit, the first switch circuit switches the AC power at a timing based on the clock signal output from the first frequency divider circuit; The control system according to any one of claims 1 to 8, characterized in that the first rectifier circuit switches the AC power wirelessly transmitted by the first switch circuit at a timing based on the clock signal output from the third frequency divider circuit.

13. The power transmission unit is a fourth frequency divider circuit that outputs a clock signal obtained by changing the frequency of the first clock signal; a second switch circuit that switches another AC power at a timing based on the clock signal output from the fourth frequency divider circuit and wirelessly transmits the switched AC power, The power receiving unit is a fifth frequency divider circuit that outputs a clock signal obtained by changing the frequency of the clock signal selected by the first clock switching circuit; 13. The control system according to claim 12, further comprising: a second rectifier circuit that switches the AC power wirelessly transmitted by the second switch circuit at a timing based on the clock signal output from the fifth frequency divider circuit.

14. the power transmitting unit further includes a first pulse width adjusting circuit that adjusts a pulse width of a clock signal input to the first switch circuit; The control system according to any one of claims 1 to 13, characterized in that the power receiving unit further has a second pulse width adjustment circuit that adjusts the pulse width of the clock signal input to the first rectifier circuit.

15. 15. The control system according to claim 1, wherein the first switch circuit and the first rectifier circuit each perform switching using a bidirectional switch.

16. the first switch circuit wirelessly transmits the switched AC power via a power transmitting antenna; the first rectifier circuit receives, via a power receiving antenna, the AC power wirelessly transmitted by the first switch circuit; the clock transmitter wirelessly transmits the first clock signal via a transmission antenna; The control system according to any one of claims 1 to 15, characterized in that the clock receiving unit receives the first clock signal wirelessly transmitted from the clock transmitting unit via a receiving antenna.

17. the power receiving antenna is movable relative to the power transmitting antenna, 17. The control system of claim 16, wherein the receiving antenna is movable relative to the transmitting antenna.

18. 18. The control system according to claim 1, wherein the power transmission unit further comprises a first clock generation circuit that generates the first clock signal.

19. a power transmission unit that wirelessly transmits AC power; a power receiving unit that receives AC power wirelessly transmitted from the power transmitting unit, a step in which a first switch circuit of the power transmission unit switches the AC power at a timing based on a first clock signal and wirelessly transmits the switched AC power; a clock transmission unit of the power transmission unit wirelessly transmitting the first clock signal; a clock receiving unit of the power receiving unit receiving a first clock signal wirelessly transmitted from the clock transmitting unit; a step in which a first detection unit of the power receiving unit detects the amount of AC power wirelessly transmitted by the first switch circuit and switching timing; a second clock generating circuit of the power receiving unit generating a second clock signal based on the switching timing detected by the first detecting unit; a first clock switching circuit of the power receiving unit selecting a clock signal based on the first clock signal output from the clock receiving unit or the second clock signal according to the amount of power detected by the first detection unit; a step in which a first rectifier circuit of the power receiving unit switches the AC power wirelessly transmitted by the first switch circuit at a timing based on the clock signal selected by the first clock switching circuit; A control method for a control system, comprising:

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