Carrier concentration measurement method, silicon carbide epitaxial substrate manufacturing method, and silicon carbide semiconductor device manufacturing method

Abstract

To accurately measure a carrier concentration of a silicon carbide epitaxial substrate in a short time.SOLUTION: A first silicon carbide epitaxial substrate in which a first silicon carbide epitaxial layer is provided on a first silicon carbide substrate is prepared. The first silicon carbide epitaxial layer includes a first layer disposed on the first silicon carbide substrate and a second layer disposed on the first layer. A carrier concentration of the first layer is higher than a carrier concentration of the second layer. Further, a voltage is applied to the first silicon carbide epitaxial substrate in a state where a first electrode is disposed in the second layer, and an electrostatic capacity of the first silicon carbide epitaxial substrate is measured. The carrier concentration of the first layer is calculated based on the voltage and the electrostatic capacity. The carrier concentration of the first layer is 1×1018 / cm3 or more.SELECTED DRAWING: Figure 3

Description

[Technical Field]

[0001] The present disclosure relates to a method for measuring carrier concentration, a method for manufacturing a silicon carbide epitaxial substrate, and a method for manufacturing a silicon carbide semiconductor device. [Background technology]

[0002] International Publication No. 2020 / 115951 (Patent Document 1) describes a method for measuring the nitrogen concentration of a silicon carbide epitaxial substrate using SIMS (Secondary Ion Mass Spectrometry). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] International Publication No. 2020 / 115951 Summary of the Invention [Problem to be solved by the invention]

[0004] However, when the nitrogen concentration of a silicon carbide epitaxial substrate is measured using SIMS, the measurement time is long.

[0005] An object of the present disclosure is to measure the carrier concentration of a silicon carbide epitaxial substrate accurately in a short period of time. [Means for solving the problem]

[0006] A method for measuring a carrier concentration according to the present disclosure includes the following steps: A first silicon carbide epitaxial substrate is prepared, in which a first silicon carbide epitaxial layer is provided on a first silicon carbide substrate. The first silicon carbide epitaxial layer includes a first layer disposed on the first silicon carbide substrate and a second layer disposed on the first layer. The carrier concentration of the first layer is higher than the carrier concentration of the second layer. Furthermore, a voltage is applied to the first silicon carbide epitaxial substrate with a first electrode disposed on the second layer, and the capacitance of the first silicon carbide epitaxial substrate is measured. The carrier concentration of the first layer is calculated based on the voltage and the capacitance. The carrier concentration of the first layer is calculated to be 1×10 18 / cm 3 That's all. [Effects of the Invention]

[0007] According to the present disclosure, the carrier concentration of a silicon carbide epitaxial substrate can be measured accurately in a short time. [Brief explanation of the drawings]

[0008] [Figure 1] FIG. 1 is a cross-sectional view schematically illustrating the configuration of a first silicon carbide epitaxial substrate. [Figure 2] FIG. 2 is a flow chart that schematically shows the method for measuring carrier concentration according to this embodiment. [Figure 3] FIG. 3 is a cross-sectional view schematically illustrating a step of measuring the capacitance of the first silicon carbide epitaxial substrate. [Figure 4] FIG. 4 is a diagram showing the relationship between the capacitance of the first silicon carbide epitaxial substrate and the bias voltage. [Figure 5] FIG. 5 is an enlarged view of the second region. [Figure 6] FIG. 6 is a cross-sectional view schematically illustrating the configuration of an apparatus for manufacturing a silicon carbide epitaxial substrate according to this embodiment. [Figure 7] FIG. 7 is a flow diagram schematically showing a method for manufacturing a silicon carbide epitaxial substrate according to this embodiment. [Figure 8]FIG. 8 is a cross-sectional view schematically showing a step of preparing a second silicon carbide substrate. [Figure 9] FIG. 9 is a cross-sectional view schematically illustrating a step of forming a second silicon carbide epitaxial layer on a second silicon carbide substrate. [Figure 10] FIG. 10 is a flowchart schematically showing a method for manufacturing a silicon carbide semiconductor device according to this embodiment. [Figure 11] FIG. 11 is a schematic cross-sectional view showing a step of forming a body region. [Figure 12] FIG. 12 is a schematic cross-sectional view showing a step of forming a source region. [Figure 13] FIG. 13 is a cross-sectional view schematically illustrating a step of forming a trench in the sixth main surface of the second silicon carbide epitaxial layer. [Figure 14] FIG. 14 is a cross-sectional view showing a process of forming a gate insulating film. [Figure 15] FIG. 15 is a cross-sectional view showing a process of forming a gate electrode and an interlayer insulating film. [Figure 16] FIG. 16 is a cross-sectional view schematically showing the configuration of a silicon carbide semiconductor device in accordance with this embodiment. [Figure 17] FIG. 17 is a cross-sectional view schematically illustrating a method for measuring the carrier concentration of the silicon carbide epitaxial substrate according to Sample 1. As shown in FIG. [Figure 18] FIG. 18 is a graph showing the relationship between the capacitance and the bias voltage of the silicon carbide epitaxial substrate according to Sample 1. As shown in FIG. DETAILED DESCRIPTION OF THE INVENTION

[0009] [Summary of the embodiments of the present disclosure] First, an overview of the embodiments of the present disclosure will be described. In the crystallographic descriptions in this specification, individual orientations are represented by [ ], collective orientations by < >, individual planes by ( ), and collective planes by {}. A negative crystallographic index is usually represented by placing a "-" (bar) above the number, but in this specification, a negative crystallographic index is represented by placing a negative sign before the number.

[0010] (1) A method for measuring a carrier concentration according to the present disclosure includes the following steps. A first silicon carbide epitaxial substrate 101 is prepared, which includes a first silicon carbide epitaxial layer 80 provided on a first silicon carbide substrate 70. The first silicon carbide epitaxial layer 80 includes a first layer 81 disposed on the first silicon carbide substrate 70 and a second layer 82 disposed on the first layer 81. The carrier concentration of the first layer 81 is higher than the carrier concentration of the second layer 82. Furthermore, a voltage is applied to the first silicon carbide epitaxial substrate 101 with a first electrode 6 disposed on the second layer 82, and the capacitance of the first silicon carbide epitaxial substrate 101 is measured. The carrier concentration of the first layer 81 is calculated based on the voltage and the capacitance. The carrier concentration of the first layer 81 is calculated to be 1×10 18 / cm 3 That's all.

[0011] (2) According to the method for measuring the carrier concentration in (1) above, the carrier concentration of the second layer 82 is 1×10 16 / cm 3 It may be the following:

[0012] (3) According to the method for measuring the carrier concentration according to (1) or (2) above, the thickness of the second layer 82 may be 0.1 μm or more.

[0013] (4) According to the method for measuring a carrier concentration according to any one of (1) to (3) above, the voltage may be −10 V or less.

[0014] (5) According to the method for measuring carrier concentration according to any one of the above (1) to (4), the material of the first electrode 6 may be mercury.

[0015] (6) According to the method for measuring carrier concentration according to any one of the above (1) to (4), the material of the first electrode 6 may be titanium, nickel, aluminum, platinum, or gold.

[0016] (7) According to the method for measuring carrier concentration according to any one of (1) to (6) above, in the step of measuring the capacitance of first silicon carbide epitaxial substrate 101, a voltage may be applied between first electrode 6 and the second electrode with the second electrode disposed on first silicon carbide substrate 70.

[0017] (8) A method for manufacturing a silicon carbide epitaxial substrate 102 according to the present disclosure includes the following steps: A flow rate of a nitrogen source is determined based on the carrier concentration of first layer 81 calculated by the method for measuring carrier concentration according to any one of (1) to (7) above; A second silicon carbide substrate 11 different from first silicon carbide substrate 70 is prepared; A second silicon carbide epitaxial layer 20 is formed on second silicon carbide substrate 11; The determined flow rate of the nitrogen source is used in the step of forming second silicon carbide epitaxial layer 20 on second silicon carbide substrate 11.

[0018] (9) A method for manufacturing silicon carbide semiconductor device 400 according to the present disclosure includes the following steps: Silicon carbide epitaxial substrate 102 manufactured by the manufacturing method described in (8) above is prepared. Silicon carbide epitaxial substrate 102 is processed.

[0019] [Details of the embodiments of the present disclosure] Hereinafter, the details of the embodiments of the present disclosure will be described. In the following description, the same or corresponding elements will be denoted by the same reference numerals, and the same description thereof will not be repeated.

[0020] First, the configuration of the first silicon carbide epitaxial substrate according to this embodiment will be described. Fig. 1 is a cross-sectional view schematically illustrating the configuration of the first silicon carbide epitaxial substrate.

[0021] As shown in FIG. 1 , a first silicon carbide epitaxial substrate 101 according to this embodiment includes a first silicon carbide substrate 70 and a first silicon carbide epitaxial layer 80. The first silicon carbide epitaxial layer 80 is provided on the first silicon carbide substrate 70. The first silicon carbide epitaxial layer 80 includes a first layer 81 and a second layer 82. The first layer 81 is disposed on the first silicon carbide substrate 70. The first layer 81 is in contact with the first silicon carbide substrate 70. The second layer 82 is disposed on the first layer 81. The second layer 82 is in contact with the first layer 81.

[0022] The first silicon carbide epitaxial substrate 101 has a first main surface 91 and a second main surface 92. In the first silicon carbide epitaxial substrate 101, the second main surface 92 is located on the opposite side to the first main surface 91. The first main surface 91 constitutes the front surface of the silicon carbide epitaxial substrate 101. The first main surface 91 is constituted by the second layer 82. The second main surface 92 constitutes the back surface of the silicon carbide epitaxial substrate 101. The second main surface 92 is constituted by the first silicon carbide substrate 70.

[0023] The first silicon carbide substrate 70 has a third main surface 93. The third main surface 93 is in contact with the first layer 81. In the first silicon carbide substrate 70, the third main surface 93 is located on the opposite side to the second main surface 92. The polytype of the silicon carbide constituting the first silicon carbide substrate 70 is not particularly limited, but is, for example, 4H. Similarly, the polytype of the silicon carbide constituting each of the first layer 81 and the second layer 82 is not particularly limited, but is, for example, 4H.

[0024] The diameter of first silicon carbide epitaxial substrate 101 is not particularly limited, but is, for example, 100 mm (4 inches) or more. The diameter of first silicon carbide epitaxial substrate 101 may be 125 mm (5 inches) or more, or 150 mm (6 inches) or more. The upper limit of the diameter of first silicon carbide epitaxial substrate 101 is not particularly limited, but may be, for example, 200 mm (8 inches) or less.

[0025] In this specification, 4 inches refers to 100 mm or 101.6 mm (4 inches x 25.4 mm / inch). 5 inches refers to 125 mm or 127.0 mm (5 inches x 25.4 mm / inch). 6 inches refers to 150 mm or 152.4 mm (6 inches x 25.4 mm / inch). 8 inches refers to 200 mm or 203.2 mm (8 inches x 25.4 mm / inch).

[0026] First main surface 91 of first silicon carbide epitaxial substrate 101 may be inclined at an off angle of 8° or less with respect to the {0001} plane or the {0001} plane. Specifically, first main surface 91 may be inclined at an off angle of 8° or less with respect to the (0001) plane or the (0001) plane. Second main surface 92 may be inclined at an off angle of 8° or less with respect to the (000-1) plane or the (000-1) plane.

[0027] The upper limit of the off angle is not particularly limited, but may be, for example, 6° or less, or 4° or less. The lower limit of the off angle is not particularly limited, but may be, for example, 2° or more, or 1° or more. The off direction is not particularly limited, but may be, for example, the <11-20> direction. <0001> It may be a direction.

[0028] The first silicon carbide substrate 70 contains n-type impurities such as nitrogen (N). The conductivity type of the first silicon carbide substrate 70 is, for example, n-type (first conductivity type). In this case, the carriers are electrons. The carrier concentration of the first silicon carbide substrate 70 is, for example, 1×10 18 m -3 More than 1×10 20 cm -3 The thickness (third thickness T3) of first silicon carbide substrate 70 is not particularly limited, but is, for example, not less than 200 μm and not more than 500 μm (see FIG. 1).

[0029] The first layer 81 contains n-type impurities such as nitrogen (N). The conductivity type of the first layer 81 is, for example, n-type (first conductivity type). In this case, the carriers are electrons. The carrier concentration of the first layer 81 is 1×1018 / cm 3 The lower limit of the carrier concentration of the first layer 81 is not particularly limited, but is, for example, 3×10 18 / cm 3 May be more than 5 x 10 18 / cm 3 May be more than 1 x 10 19 / cm 3 The upper limit of the carrier concentration of the first layer 81 is not particularly limited, but may be, for example, 1×10 20 / cm 3 It may be less than 7 x 10 19 / cm 3 May be less than 5 x 10 19 / cm 3 It may be the following:

[0030] The thickness of the first layer 81 (first thickness T1) is not particularly limited, but is, for example, 0.1 μm or more and 10 μm or less. The lower limit of the first thickness T1 is not particularly limited, but may be, for example, 0.5 μm or more, or 1 μm or more. The upper limit of the first thickness T1 is not particularly limited, but may be, for example, 8 μm or less, or 5 μm or less.

[0031] The second layer 82 contains n-type impurities such as nitrogen (N). The conductivity type of the second layer 82 is, for example, n-type (first conductivity type). In this case, the carriers are electrons. The carrier concentration of the second layer 82 is, for example, 1×10 16 / cm 3 The lower limit of the carrier concentration of the second layer 82 is not particularly limited, but for example, 3×10 14 / cm 3 May be more than 5 x 10 14 / cm 3 It may be more than 7 x 10 14 / cm 3 The upper limit of the carrier concentration of the second layer 82 is not particularly limited, but may be, for example, 7×10 15 / cm 3 May be less than 5 x 10 15 / cm 3May be less than 1 x 10 15 / cm 3 The carrier concentration of the first layer 81 is higher than the carrier concentration of the second layer 82.

[0032] The thickness of the second layer 82 (second thickness T2) is, for example, 0.1 μm or more. The lower limit of the second thickness T2 is not particularly limited, but may be, for example, 0.3 μm or more, or 0.5 μm or more. The upper limit of the second thickness T2 is not particularly limited, but may be, for example, 3 μm or less, 2 μm or less, or 1 μm or less.

[0033] FIG. 2 is a flow chart that schematically shows the method for measuring carrier concentration according to this embodiment. As shown in FIG. 2, the method for measuring carrier concentration according to this embodiment includes a step (S10) of preparing a first silicon carbide epitaxial substrate, a step (S20) of measuring the capacitance of the first silicon carbide epitaxial substrate, and a step (S30) of measuring the carrier concentration of a first layer of the first silicon carbide epitaxial substrate.

[0034] First, the step (S10) of preparing a first silicon carbide epitaxial substrate is carried out. Specifically, a first silicon carbide epitaxial substrate 101 shown in FIG.

[0035] Next, a step (S20) of measuring the capacitance of the first silicon carbide epitaxial substrate is carried out.

[0036] The capacitance of first silicon carbide epitaxial substrate 101 can be measured using, for example, a CV (capacitance-voltage) measuring device (model number: CVmap92A) manufactured by Four Dimensions. FIG. 3 is a cross-sectional view schematically illustrating a process for measuring the capacitance of first silicon carbide epitaxial substrate 101. As shown in FIG. 3, a first electrode 6 is disposed on second layer 82 of first silicon carbide epitaxial substrate 101. The CV measuring device has first electrode 6 and a main body 5. First electrode 6 is located inside main body 5. First electrode 6 is made of, for example, mercury. First electrode 6 contacts second layer 82 of first silicon carbide epitaxial substrate 101 at first main surface 91. The measuring diameter of first electrode 6 is, for example, 1.2 mm. The measuring speed is, for example, 1 minute.

[0037] The material of the first electrode 6 is not limited to mercury. The material of the first electrode 6 may be any material that can form a Schottky contact with silicon carbide, such as titanium (Ti), nickel (Ni), aluminum (Al), platinum (Pt), or gold (Au). When titanium (Ti), nickel (Ni), aluminum (Al), platinum (Pt), or gold (Au) is used as the material of the first electrode 6, it can be formed by vacuum deposition or the like. It is also possible to form a circular first electrode 6 by photolithography. Alternatively, it is also possible to form a circular first electrode 6 by using a metal mask.

[0038] As shown in FIG. 3 , the second electrode 8 of the CV measurement device is disposed on, for example, the second main surface 92 of the first silicon carbide epitaxial substrate 101. Specifically, the second electrode 8 is disposed on the first silicon carbide substrate 70. The second electrode 8 is ohmically connected to the first silicon carbide substrate 70. The second electrode 8 can be, for example, a metal stage on which a wafer is placed. The ohmic connection can be achieved by vacuum suction bringing the second main surface 92 and the metal stage on which the wafer is placed into close contact. With the first electrode 6 disposed on the second layer 82 and the second electrode 8 disposed on the first silicon carbide substrate 70, a voltage (hereinafter also referred to as a bias voltage) is applied between the first electrode 6 and the second electrode 8. This causes a depletion layer to expand from the boundary between the second layer 82 and the first electrode 6 into the second layer 82. With a voltage applied between the first electrode 6 and the second electrode 8, the capacitance between the first electrode 6 and the second electrode 8 is measured.

[0039] As described above, with first electrode 6 disposed on second layer 82 of first silicon carbide epitaxial substrate 101, a voltage is applied to first silicon carbide epitaxial substrate 101, and the capacitance of first silicon carbide epitaxial substrate 101 is measured. Note that, although the above description has been given of the case where second electrode 8 is disposed on first silicon carbide substrate 70, the method for measuring carrier concentration according to this embodiment is not limited to the above. The ohmic-connected electrode corresponding to second electrode 8 may be disposed on second layer 82 or first layer 81.

[0040] Next, a step (S30) of measuring the carrier concentration of the first layer of the first silicon carbide epitaxial substrate is performed. Specifically, the carrier concentration of first layer 81 is calculated based on the voltage (V) and the capacitance (C). The carrier concentration of first layer 81 is found using the following Equation 1.

[0041] 1 / C 2 ={2 / (e×ε0×ε S )}×(VV d )×N d (Equation 1) C: Capacitance measured at the first electrode (F) e: Elementary charge = 1.602×10 -19 (C) ε S : Relative permittivity of the first layer ε0: Dielectric constant of vacuum = 8.854 × 10 -14 (F / cm) V: Voltage applied to the silicon carbide epitaxial substrate (V) V d :Reference potential (V) N d : Carrier concentration in the first layer (cm -3 ) FIG. 4 is a diagram showing the relationship between the capacitance of the first silicon carbide epitaxial substrate and the bias voltage. The horizontal axis of FIG. 4 represents the bias voltage applied to the first silicon carbide epitaxial substrate. The vertical axis of FIG. 4 represents the reciprocal of the square of the capacitance of the first silicon carbide epitaxial substrate (1 / C 2 )

[0042] 4, in the region (first region 111) where the bias voltage is equal to or higher than −2 V and lower than 0 V, it is considered that the depletion layer expands in the second layer 82. As the absolute value of the bias voltage increases, the 2 By increasing the absolute value of the bias voltage, the depletion layer spreads from the second layer 82 toward the first layer 81. In the region (second region 112) where the bias voltage is −40 V or more and −20 V or less, it is considered that the depletion layer spreads in the second layer 82 and the first layer 81. 1 / C per unit bias voltage in the second region 112 2 The change in the first region 111 is 1 / C per unit bias voltage. 2 In the method for measuring carrier concentration according to this embodiment, the bias voltage is applied up to a value of −10 V or less. The bias voltage may be applied up to a value of −20 V or less, or may be applied up to a value of −40 V or less.

[0043] 5 is an enlarged view of the second region. As shown in FIG. 5, in the region where the bias voltage is −40 V or more and −30 V or less, the capacitance decreases by 1 / C as the absolute value of the bias voltage increases. 2 becomes larger. 1 / C for bias voltage2 changes linearly. The carrier concentration of the first layer 81 is calculated based on the electrostatic region and the bias voltage in the bias voltage range of -40 V or more and -30 V or less. The carrier concentration of the first layer 81 may also be calculated based on the electrostatic region and the bias voltage in the bias voltage range of -40 V or more and -20 V or less.

[0044] Fig. 6 is a cross-sectional view showing the configuration of an apparatus for manufacturing a silicon carbide epitaxial substrate according to this embodiment. As shown in Fig. 6, the apparatus 200 for manufacturing a silicon carbide epitaxial substrate is, for example, a hot-wall horizontal CVD (Chemical Vapor Deposition) apparatus. The apparatus 200 for manufacturing a silicon carbide epitaxial substrate mainly includes a chamber 201, a gas supply unit 235, a control unit 245, a heating element 203, a quartz tube 204, a heat insulating material (not shown), and an induction heating coil (not shown).

[0045] The heating element 203 has, for example, a cylindrical shape, and defines a chamber 201 therein. The heating element 203 is made of, for example, graphite. The heating element 203 is provided inside a quartz tube 204. A heat insulating material surrounds the outer periphery of the heating element 203. The induction heating coil is wound around, for example, the outer periphery of the quartz tube 204. The induction heating coil is configured so that an alternating current can be supplied to it from an external power source (not shown). This causes the heating element 203 to be induction heated. As a result, the chamber 201 is heated by the heating element 203.

[0046] The chamber 201 is formed by being surrounded by an inner wall surface 205 of a heating element 203. A susceptor 210 that holds a silicon carbide substrate (not shown) is provided in the chamber 201. The susceptor 210 is made of, for example, silicon carbide. The silicon carbide substrate is placed on the susceptor 210. The susceptor 210 is placed on a stage 206. The stage 206 is rotatably supported by a rotation shaft 209. The rotation of the stage 206 causes the susceptor 210 to rotate.

[0047] The silicon carbide epitaxial substrate manufacturing apparatus 200 further includes a gas inlet 207 and a gas exhaust outlet 208. The gas exhaust outlet 208 is connected to an exhaust pump (not shown). The arrows in FIG. 6 indicate the flow of gas. The gas is introduced into the chamber 201 from the gas inlet 207 and exhausted from the gas exhaust outlet 208. The pressure inside the chamber 201 is adjusted by balancing the amount of gas supplied and the amount of gas exhausted.

[0048] The gas supply unit 235 is configured to be able to supply a mixed gas containing a source gas, a dopant gas, and a carrier gas to the chamber 201. Specifically, the gas supply unit 235 includes, for example, a first gas supply unit 231, a second gas supply unit 232, a third gas supply unit 233, and a fourth gas supply unit 234.

[0049] The first gas supply unit 231 is configured to be able to supply a first gas containing, for example, carbon atoms. The first gas supply unit 231 is, for example, a gas cylinder filled with the first gas. The first gas is, for example, propane (C3H8) gas. The first gas may also be, for example, methane (CH4) gas, ethane (C2H6) gas, acetylene (C2H2) gas, etc.

[0050] The second gas supply unit 232 is configured to be able to supply a second gas containing, for example, silane gas. The second gas supply unit 232 is, for example, a gas cylinder filled with the second gas. The second gas is, for example, silane (SiH4) gas. The second gas may be a mixed gas of silane gas and a gas other than silane.

[0051] The third gas supply unit 233 is configured to be able to supply a third gas containing, for example, ammonia gas. The third gas supply unit 233 is, for example, a gas cylinder filled with the third gas. The third gas is a doping gas containing N (nitrogen atoms). Ammonia gas is more susceptible to thermal decomposition than nitrogen gas, which has a triple bond. The third gas may be nitrogen gas.

[0052] The fourth gas supply unit 234 is configured to be able to supply a fourth gas (carrier gas) such as hydrogen, etc. The fourth gas supply unit 234 is, for example, a gas cylinder filled with hydrogen.

[0053] The control unit 245 is configured to be able to control the flow rate of the mixed gas supplied from the gas supply unit 235 to the chamber 201. Specifically, the control unit 245 may include a first gas flow rate control unit 241, a second gas flow rate control unit 242, a third gas flow rate control unit 243, and a fourth gas flow rate control unit 244. Each control unit may be, for example, an MFC (Mass Flow Controller). The control unit 245 is disposed between the gas supply unit 235 and the gas inlet 207. In other words, the control unit 245 is disposed in a flow path connecting the gas supply unit 235 and the gas inlet 207.

[0054] (Method for manufacturing silicon carbide epitaxial substrate) Next, a method for manufacturing a silicon carbide epitaxial substrate according to this embodiment will be described. Fig. 7 is a flow chart schematically showing the method for manufacturing a silicon carbide epitaxial substrate according to this embodiment. As shown in Fig. 7, the method for manufacturing a silicon carbide epitaxial substrate according to this embodiment includes a step (S40) of determining a flow rate of a nitrogen source based on the carrier concentration of the first layer, a step (S50) of preparing a second silicon carbide substrate, and a step (S60) of forming a second silicon carbide epitaxial layer on the second silicon carbide substrate.

[0055] First, a step (S40) of determining a flow rate of a nitrogen source based on the carrier concentration of a first layer is performed. Specifically, the carrier concentration of first layer 81 of first silicon carbide epitaxial substrate 101 is measured using the carrier concentration measurement method according to the present embodiment. The carrier concentration of first layer 81 is compared with a target carrier concentration.

[0056] If the carrier concentration of first layer 81 is lower than the target carrier concentration, the flow rate of the third gas used in forming first layer 81 will be lower than the required flow rate. Therefore, third gas flow rate control unit 243 is adjusted to increase the flow rate of the third gas. As a result, the carrier concentration of the epitaxial layer formed during the next epitaxial growth will be higher than the carrier concentration of first layer 81 and will approach the target carrier concentration.

[0057] Conversely, if the carrier concentration of first layer 81 is higher than the target carrier concentration, the flow rate of the third gas used in forming first layer 81 is higher than the required flow rate. Therefore, third gas flow rate control unit 243 is adjusted to reduce the flow rate of the third gas. As a result, the carrier concentration of the epitaxial layer formed during the next epitaxial growth will be lower than the carrier concentration of first layer 81 and will approach the target carrier concentration.

[0058] Next, the step (S50) of preparing a second silicon carbide substrate is performed. FIG. 8 is a cross-sectional view schematically showing the step of preparing second silicon carbide substrate 11. Second silicon carbide substrate 11 is a substrate different from first silicon carbide substrate 70. Second silicon carbide substrate 11 is obtained by slicing a silicon carbide ingot (not shown) formed by, for example, sublimation. Second silicon carbide substrate 11 contains n-type impurities such as nitrogen (N). The conductivity type of second silicon carbide substrate 11 is, for example, n-type (first conductivity type). In this case, the carriers are electrons. The carrier concentration of second silicon carbide substrate 11 is, for example, 1×10 19 m -3 More than 1×10 20 cm -3 The thickness of second silicon carbide substrate 11 is not particularly limited, but is, for example, not less than 200 μm and not more than 500 μm.

[0059] As shown in FIG. 8 , second silicon carbide substrate 11 has fourth main surface 3 and fifth main surface 1. Fifth main surface 1 is located on the opposite side to fourth main surface 3. The polytype of silicon carbide constituting second silicon carbide substrate 11 is, for example, 4H. The diameter of second silicon carbide substrate 11 is not particularly limited, but is, for example, 100 mm (4 inches) or more. The diameter of second silicon carbide substrate 11 may be 125 mm (5 inches) or more, or 150 mm (6 inches) or more. The upper limit of the diameter of second silicon carbide substrate 11 is not particularly limited, but may be, for example, 200 mm (8 inches) or less.

[0060] The fourth main surface 3 may be inclined at an off angle of 8° or less with respect to the {0001} plane or the {0001} plane, for example. Specifically, the fourth main surface 3 may be inclined at an off angle of 8° or less with respect to the (0001) plane or the (0001) plane. The second main surface 92 may be inclined at an off angle of 8° or less with respect to the (000-1) plane or the (000-1) plane.

[0061] Next, a step (S60) of forming a second silicon carbide epitaxial layer on the second silicon carbide substrate is performed. First, second silicon carbide substrate 11 is placed in chamber 201. Second silicon carbide substrate 11 is placed on susceptor 210 in chamber 201. Next, chamber 201 is heated to a temperature of, for example, 1600°C or higher and 1700°C or lower. Next, a mixed gas containing, for example, silane, propane, ammonia, and hydrogen is introduced into chamber 201. As a result, second silicon carbide epitaxial layer 20 is formed on second silicon carbide substrate 11.

[0062] FIG. 9 is a cross-sectional view schematically illustrating a step of forming a second silicon carbide epitaxial layer 20 on a second silicon carbide substrate 11. As shown in FIG. 9, a buffer layer 23 is formed on the second silicon carbide substrate 11. Specifically, a mixed gas containing silane, propane, ammonia, and hydrogen is introduced into a chamber 201, thereby forming the buffer layer 23 on the second silicon carbide substrate 11. In the step of forming the buffer layer 23, the flow rate of the silane gas is adjusted to, for example, 46 sccm. The flow rate of the propane gas is adjusted to, for example, 14 sccm. The flow rate of the hydrogen gas is adjusted to, for example, 120 slm.

[0063] The flow rate of the ammonia gas is, for example, 0.7 sccm. As described above, the flow rate of the ammonia gas (third gas) is determined based on the carrier concentration of the first layer 81. Therefore, compared with the carrier concentration of the first layer 81, the carrier concentration of the buffer layer 23 approaches the target carrier concentration. This allows the carrier concentration of the buffer layer 23 to be controlled with high precision.

[0064] Next, the drift layer 22 is formed on the buffer layer 23. In the process of forming the drift layer 22, the flow rate of the silane gas is adjusted to, for example, 115 sccm. The flow rate of the propane gas is adjusted to, for example, 37.5 sccm. The flow rate of the hydrogen gas is adjusted to, for example, 120 slm. The flow rate of the ammonia gas is adjusted to, for example, 0.23 sccm. In this way, the drift layer 22 is formed on the buffer layer 23.

[0065] In this way, second silicon carbide epitaxial substrate 102 is manufactured. As shown in Fig. 9 , second silicon carbide epitaxial substrate 102 has second silicon carbide substrate 11, second silicon carbide epitaxial layer 20, and sixth main surface 2. Second silicon carbide epitaxial layer 20 has buffer layer 23 and drift layer 22. Buffer layer 23 is on second silicon carbide substrate 11. Drift layer 22 is on buffer layer 23. Sixth main surface 2 is formed of drift layer 22.

[0066] (Method for manufacturing silicon carbide semiconductor device) Next, a method for manufacturing the silicon carbide semiconductor device 400 according to this embodiment will be described. Fig. 10 is a flowchart that schematically shows the method for manufacturing the silicon carbide semiconductor device 400 according to this embodiment. As shown in Fig. 10, the method for manufacturing the silicon carbide semiconductor device 400 according to this embodiment mainly includes a step (S70) of preparing a second silicon carbide epitaxial substrate and a step (S80) of processing the second silicon carbide epitaxial substrate.

[0067] First, the step (S70) of preparing a second silicon carbide epitaxial substrate is performed. In the step (S70) of preparing a second silicon carbide epitaxial substrate, a second silicon carbide epitaxial substrate 102 is prepared using the method for manufacturing a silicon carbide epitaxial substrate according to this embodiment (see FIG. 9).

[0068] Next, a step (S80) of processing the silicon carbide epitaxial substrate is performed. "Processing" includes various processes such as ion implantation, heat treatment, etching, oxide film formation, electrode formation, and dicing. That is, the step (S80) of processing the silicon carbide epitaxial substrate may include at least one of ion implantation, heat treatment, etching, oxide film formation, electrode formation, and dicing. Specifically, ions are first implanted into silicon carbide epitaxial substrate 102.

[0069] 11 is a cross-sectional view schematically illustrating a step of forming a body region. Specifically, p-type impurities such as aluminum are ion-implanted into sixth main surface 2 of second silicon carbide epitaxial layer 20. This forms body region 13 having p-type conductivity. A portion of second silicon carbide epitaxial layer 20 where body region 13 is not formed becomes drift region 21. Body region 13 has a thickness of, for example, 0.9 μm.

[0070] Next, a step of forming a source region is performed. FIG. 12 is a cross-sectional view showing the step of forming the source region. Specifically, n-type impurities such as phosphorus are ion-implanted into the body region 13. This forms a source region 14 having n-type conductivity. The thickness of the source region 14 is, for example, 0.4 μm. The concentration of the n-type impurities contained in the source region 14 is higher than the concentration of the p-type impurities contained in the body region 13.

[0071] Next, p-type impurities such as aluminum are ion-implanted into the source region 14 to form the contact region 18. The contact region 18 is formed to penetrate the source region 14 and the body region 13 and to be in contact with the drift region 21. The concentration of the p-type impurity contained in the contact region 18 is higher than the concentration of the n-type impurity contained in the source region 14.

[0072] Next, activation annealing is performed to activate the ion-implanted impurities. The temperature of the activation annealing is preferably 1500°C or higher and 1900°C or lower, for example, about 1700°C. The activation annealing time is, for example, about 30 minutes. The atmosphere for the activation annealing is preferably an inert gas atmosphere, for example, an argon atmosphere.

[0073] Next, a step of forming trenches in the sixth main surface 2 of the second silicon carbide epitaxial layer 20 is performed. FIG. 13 is a cross-sectional schematic diagram showing the step of forming trenches in the sixth main surface 2 of the second silicon carbide epitaxial layer 20. A mask 17 having openings is formed on the sixth main surface 2 including the source region 14 and the contact region 18. The source region 14, the body region 13, and a portion of the drift region 21 are removed by etching using the mask 17. As an etching method, for example, reactive ion etching, particularly inductively coupled plasma reactive ion etching, can be used. Specifically, for example, inductively coupled plasma reactive ion etching using SF or a mixed gas of SF and O as a reactive gas can be used. Recesses are formed in the sixth main surface 2 by etching.

[0074] Next, thermal etching is performed on the recesses. Thermal etching can be performed, for example, by heating the sixth main surface 2 with the mask 17 formed thereon in an atmosphere containing a reactive gas having at least one type of halogen atom. The at least one type of halogen atom includes at least one of chlorine (Cl) atoms and fluorine (F) atoms. The atmosphere can include, for example, Cl2, BCl3, SF6, or CF4. For example, a mixed gas of chlorine gas and oxygen gas is used as the reactive gas, and the thermal etching is performed at a heat treatment temperature of, for example, 700°C or higher and 1000°C or lower. The reactive gas may contain a carrier gas in addition to the above-mentioned chlorine gas and oxygen gas. Examples of the carrier gas that can be used include nitrogen gas, argon gas, and helium gas.

[0075] 13 , trenches 56 are formed in the sixth main surface 2 by thermal etching. The trenches 56 are defined by sidewall surfaces 53 and a bottom wall surface 54. The sidewall surfaces 53 are formed by the source region 14, the body region 13, and the drift region 21. The bottom wall surface 54 is formed by the drift region 21. Next, the mask 17 is removed from the sixth main surface 2.

[0076] Next, a step of forming a gate insulating film is performed. Fig. 14 is a cross-sectional schematic view showing the step of forming a gate insulating film. Specifically, silicon carbide epitaxial substrate 102 having trench 56 formed in sixth main surface 2 is heated in an oxygen-containing atmosphere at a temperature of, for example, 1300°C or higher and 1400°C or lower. This forms gate insulating film 15 that is in contact with drift region 21 at bottom wall surface 54, in contact with drift region 21, body region 13, and source region 14 at sidewall surface 53, and in contact with source region 14 and contact region 18 at sixth main surface 2.

[0077] Next, a step of forming a gate electrode is performed. Fig. 15 is a cross-sectional view showing a step of forming a gate electrode and an interlayer insulating film. Gate electrode 27 is formed inside trench 56 so as to contact gate insulating film 15. Gate electrode 27 is disposed inside trench 56 and is formed on gate insulating film 15 so as to face each of sidewall surface 53 and bottom wall surface 54 of trench 56. Gate electrode 27 is formed, for example, by LPCVD (Low Pressure Chemical Vapor Deposition).

[0078] Next, an interlayer insulating film 26 is formed. The interlayer insulating film 26 is formed so as to cover the gate electrode 27 and to be in contact with the gate insulating film 15. The interlayer insulating film 26 is formed, for example, by chemical vapor deposition. The interlayer insulating film 26 is made of a material containing silicon dioxide, for example. Next, the interlayer insulating film 26 and part of the gate insulating film 15 are etched so as to form openings above the source region 14 and the contact region 18. As a result, the contact region 18 and the source region 14 are exposed from the gate insulating film 15.

[0079] Next, a step of forming a source electrode is performed. The source electrode 16 is formed so as to contact each of the source region 14 and the contact region 18. The source electrode 16 is formed by, for example, a sputtering method. The source electrode 16 is made of a material containing, for example, Ti (titanium), Al (aluminum), and Si (silicon).

[0080] Next, alloying annealing is performed. Specifically, the source electrode 16 in contact with each of the source region 14 and the contact region 18 is maintained at a temperature of 900°C or higher and 1100°C or lower for about 5 minutes. This causes at least a portion of the source electrode 16 to be silicided. This forms the source electrode 16 in ohmic contact with the source region 14. Preferably, the source electrode 16 forms an ohmic contact with the contact region 18.

[0081] Next, the source wiring 19 is formed. The source wiring 19 is electrically connected to the source electrode 16. The source wiring 19 is formed so as to cover the source electrode 16 and the interlayer insulating film .

[0082] Next, a step of forming a drain electrode is carried out. First, the second silicon carbide substrate 11 is polished at the fifth main surface 1. This reduces the thickness of the second silicon carbide substrate 11. Next, the drain electrode 24 is formed. The drain electrode 24 is formed so as to be in contact with the second silicon carbide substrate 11 at the fifth main surface 1. In this way, the silicon carbide semiconductor device 400 according to this embodiment is manufactured.

[0083] 16 is a cross-sectional view schematically illustrating the configuration of a silicon carbide semiconductor device according to this embodiment. Silicon carbide semiconductor device 400 is, for example, a MOSFET (Metal Oxide Semiconductor Field Effect Transistor). Silicon carbide semiconductor device 400 mainly has a silicon carbide epitaxial substrate 102, a gate electrode 27, a gate insulating film 15, a source electrode 16, a drain electrode 24, a source wiring 19, and an interlayer insulating film 26. Silicon carbide epitaxial substrate 102 has a drift region 21, a body region 13, a source region 14, and a contact region 18. Silicon carbide semiconductor device 400 may be, for example, an IGBT (Insulated Gate Bipolar Transistor) or the like.

[0084] Next, the effects of the method for measuring carrier concentration, the method for manufacturing a silicon carbide epitaxial substrate, and the method for manufacturing a silicon carbide semiconductor device according to this embodiment will be described.

[0085] The carrier concentration of a silicon carbide epitaxial layer can be measured using a CV measurement device. However, when the carrier concentration is high (for example, 5×10 18 cm -3When a voltage is applied to a silicon carbide epitaxial layer having a capacitance (or higher) with first electrode 6 of a CV measurement device disposed thereon, a leakage current occurs at the Schottky junction between first electrode 6 and the silicon carbide epitaxial layer. This prevents a stable formation of a depletion layer in the silicon carbide epitaxial layer. Therefore, when the vertical axis represents the reciprocal of the square of the capacitance and the horizontal axis represents the bias voltage, the CV characteristics do not become linear. As a result, the carrier concentration of a silicon carbide epitaxial layer with a high carrier concentration cannot be accurately measured using a CV measurement device.

[0086] The inventors have conducted extensive research into a method for accurately measuring the carrier concentration of a silicon carbide epitaxial layer having a high carrier concentration using a CV measurement device, and as a result, have obtained the following knowledge and discovered the method for measuring carrier concentration according to the present embodiment.

[0087] Specifically, first, a second layer 82 having a low carrier concentration is formed on a first layer 81 having a high carrier concentration. Next, a voltage is applied to the silicon carbide epitaxial substrate with a first electrode 6 disposed on the second layer 82, and the capacitance of the silicon carbide epitaxial substrate is measured. In this manner, a depletion layer is formed in the second layer 82 having a low carrier concentration, and then a bias voltage is applied to the silicon carbide epitaxial substrate, thereby extending the depletion layer to the first layer 81 having a high carrier concentration. As a result, it is believed that a depletion layer can be stably formed in the first layer 81. It has been found that this enables the carrier concentration of the first layer 81 to be measured with high accuracy.

[0088] According to the method for measuring carrier concentration according to the present disclosure, first silicon carbide epitaxial layer 80 includes first layer 81 and second layer 82 disposed on first layer 81. The carrier concentration of first layer 81 is higher than the carrier concentration of second layer 82. With first electrode 6 disposed on second layer 82, a voltage is applied to first silicon carbide epitaxial substrate 101, and the capacitance of first silicon carbide epitaxial substrate 101 is measured. The carrier concentration of first layer 81 is calculated based on the voltage and capacitance. The carrier concentration of first layer 81 is 1×10 18 / cm 3 This makes it possible to accurately measure the carrier concentration of the first layer 81. Furthermore, by using the voltage-capacitance method, the measurement time can be shortened compared to when measuring the carrier concentration using SIMS.

[0089] According to the method for measuring the carrier concentration of the present disclosure, the carrier concentration of the second layer 82 is 1×10 16 / cm 3 or less. This allows a depletion layer to be stably formed in the second layer 82 when the absolute value of the applied voltage is small. Therefore, even when the absolute value of the applied voltage increases, the depletion layer can be stably extended from the second layer 82 to the first layer 81. As a result, the carrier concentration in the first layer 81 can be measured with even greater accuracy.

[0090] Furthermore, according to the method for measuring carrier concentration according to the present disclosure, the thickness of the second layer 82 may be 0.1 μm or more. This allows a depletion layer to be stably formed in the second layer 82 when the absolute value of the applied voltage is small. Therefore, even when the absolute value of the applied voltage increases, the depletion layer can be stably extended from the second layer 82 to the first layer 81. As a result, the carrier concentration of the first layer 81 can be measured with even greater accuracy.

[0091] Furthermore, according to the method for measuring carrier concentration according to the present disclosure, the voltage may be −10 V or less. This allows the depletion layer to be sufficiently extended from the second layer 82 to the first layer 81. As a result, the carrier concentration of the first layer 81 can be measured with even greater accuracy.

[0092] Furthermore, according to the method for measuring carrier concentration according to the present disclosure, the material of the first electrode 6 may be mercury. By using mercury as the material of the first electrode 6, the carrier concentration can be measured without using vapor deposition or the like. Therefore, the carrier concentration can be measured easily.

[0093] According to the method for manufacturing silicon carbide epitaxial substrate 102 according to the present disclosure, the flow rate of the nitrogen source is determined based on the carrier concentration of first layer 81 calculated by the above-described method for measuring carrier concentration. Second silicon carbide epitaxial layer 20 is formed on second silicon carbide substrate 11. The determined flow rate of the nitrogen source is used in the step of forming second silicon carbide epitaxial layer 20 on second silicon carbide substrate 11. This makes it possible to control the carrier concentration of second silicon carbide epitaxial layer 20 with high precision. As a result, the yield of silicon carbide epitaxial substrate 102 can be improved.

[0094] According to the method for manufacturing silicon carbide semiconductor device 400 according to the present disclosure, silicon carbide epitaxial substrate 102 manufactured by the manufacturing method described above is prepared. The silicon carbide epitaxial substrate is processed. This makes it possible to improve the yield of silicon carbide semiconductor device 400. [Example]

[0095] (Sample preparation) Silicon carbide epitaxial substrates according to Samples 1 to 4 were prepared. The silicon carbide epitaxial substrates according to Samples 1 to 3 are examples. The silicon carbide epitaxial substrate according to Sample 4 is an example.

[0096] 17 is a cross-sectional view schematically illustrating a method for measuring the carrier concentration of a silicon carbide epitaxial substrate according to Sample 4. The silicon carbide epitaxial substrate according to Sample 4 includes a silicon carbide substrate 70 and a silicon carbide epitaxial layer 80. The silicon carbide epitaxial layer 80 is a single layer. The carrier concentration of the silicon carbide epitaxial layer 80 measured by SIMS was 5×10 18 / cm 3 17, a first electrode 6 was disposed on the surface of the silicon carbide epitaxial layer. A second electrode 8 was disposed on the back surface of the silicon carbide substrate .

[0097] 1, the silicon carbide epitaxial substrates according to Samples 1 to 3 include a silicon carbide substrate 70 and a silicon carbide epitaxial layer 80. The silicon carbide epitaxial layer includes a first layer 81 and a second layer 82. In the silicon carbide epitaxial substrates according to Samples 1 to 3, the carrier concentration of first layer 81 is 5.3×10 18 / cm 3 , 7.9×10 18 / cm 3 and 2.4 × 10 18 / cm 3 The carrier concentration of the second layer 82 was 3×10 15 / cm 3 The thickness of the second layer 82 was 1 μm. As shown in FIG. 3, a first electrode 6 was disposed on the surface of the second layer 82. A second electrode 8 was disposed on the back surface of the silicon carbide substrate 70.

[0098] (Evaluation method) The capacitance of the silicon carbide epitaxial substrate was measured using a CV (capacitance-voltage) measuring device (model number: CVmap92A) manufactured by Four Dimensions. A first electrode 6 was placed on the front surface of the silicon carbide epitaxial substrate and a second electrode 8 was placed on the back surface of the silicon carbide substrate, and a bias voltage was applied between the first electrode 6 and the second electrode 8. The capacitance between the first electrode 6 and the second electrode 8 was measured while changing the bias voltage. The first electrode 6 was made of mercury. The measurement diameter of the first electrode 6 was 1.2 mm.

[0099] (Evaluation results) 18 is a diagram showing the relationship between the capacitance and bias voltage of the silicon carbide epitaxial substrate of Sample 4. As shown in FIG. 18, in the bias voltage range from 0 V to about −0.5 V, 2 increases monotonically as the bias voltage decreases. However, as the bias voltage decreases further, the 2 gradually decreases.

[0100] In the silicon carbide epitaxial substrates of Samples 1 to 3, it is believed that a leakage current occurs at the Schottky junction between the silicon carbide epitaxial layer having a high carrier concentration and the first electrode 6. Therefore, 1 / C 2 does not change linearly with respect to the bias voltage. As a result, in the silicon carbide epitaxial substrates of Samples 1 to 3, the carrier concentration cannot be measured with high accuracy.

[0101] On the other hand, as shown in FIGS. 4 and 5, in the silicon carbide epitaxial substrates according to Samples 1 to 3, in a region (second region 112) where the bias voltage is lower than, for example, −20 V, 1 / C 2 changes linearly with respect to the bias voltage. Therefore, in the silicon carbide epitaxial substrate of Sample 2, the carrier concentration can be measured with high accuracy.

[0102] [Table 1]

[0103] Table 1 shows the relationship between the carrier concentration of first layer 81 measured by CV measurement and the carrier concentration of first layer 81 measured by SIMS. As shown in Table 1, in the silicon carbide epitaxial substrates according to Samples 1 to 3, the carrier concentration of first layer 81 measured by CV measurement was almost the same as the carrier concentration of first layer 81 measured by SIMS. From the above results, it was confirmed that the carrier concentration can be measured with high accuracy in the silicon carbide epitaxial substrates according to the examples.

[0104] The embodiments and examples disclosed herein are illustrative in all respects and should not be considered limiting. The scope of the present invention is defined by the claims rather than the above-described embodiments and examples, and it is intended to include any modifications within the scope of the claims that are equivalent to the claims. [Explanation of symbols]

[0105] 1 5th main surface 2 Sixth main surface 3 Fourth main surface 5 Main body 6 1st electrode 8 Second electrode 11 Second silicon carbide substrate 13 Body Region 14 Source Region 15 Gate insulating film 16 Source electrode 17 Mask 18 Contact Area 19 Source wiring 20 Second silicon carbide epitaxial layer 21 Drift Region 22 Drift Layer 23 Buffer layer 24 Drain electrode 26 Interlayer insulating film 27 Gate electrode 53 Side wall 54 Bottom wall 56 Trench 70 First silicon carbide substrate (silicon carbide substrate) 80 First silicon carbide epitaxial layer (silicon carbide epitaxial layer) 81 1st layer 82 2nd layer 91 First main surface 92 Second main surface 93 Third main surface 101 First silicon carbide epitaxial substrate (silicon carbide epitaxial substrate) 102 Second silicon carbide epitaxial substrate (silicon carbide epitaxial substrate) 111 First area 112 Second area 200 Manufacturing equipment 201 Chamber 203 Heating element 204 Quartz tube 205 Inner wall surface 206 Stages 207 Gas inlet 208 Gas exhaust port 209 Rotational Axis 210 Susceptor 231 First Gas Supply Unit 232 Second gas supply section 233 Third Gas Supply Section 234 4th Gas Supply Section 235 Gas Supply Section 241 First gas flow control section 242 Second gas flow control section 243 Third gas flow control section 244 Fourth gas flow control section 245 Control Unit 400 Silicon carbide semiconductor device T1 First thickness T2 Second thickness T3 Third thickness

Claims

1. providing a first silicon carbide epitaxial substrate having a first silicon carbide epitaxial layer provided on a first silicon carbide substrate; the first silicon carbide epitaxial layer includes a first layer disposed on the first silicon carbide substrate and a second layer disposed on the first layer; a carrier concentration of the first layer is higher than a carrier concentration of the second layer; and applying a voltage to the first silicon carbide epitaxial substrate with a first electrode disposed on the second layer, and measuring the capacitance of the first silicon carbide epitaxial substrate; calculating a carrier concentration of the first layer based on the voltage and the capacitance; The carrier concentration of the first layer is 1×10 18 / cm 3 That's all, a capacitance measuring step of measuring a carrier concentration, wherein after a depletion layer is formed in the second layer, the voltage is further applied to extend the depletion layer into the first layer;

2. The carrier concentration of the second layer is 1×10 16 / cm 3 The method for measuring carrier concentration according to claim 1, wherein:

3. 3. The method for measuring a carrier concentration according to claim 1, wherein the second layer has a thickness of 0.1 μm or more.

4. 4. The method for measuring a carrier concentration according to claim 1, wherein the voltage is −10 V or less.

5. The method for measuring a carrier concentration according to claim 1 , wherein the first electrode is made of mercury.

6. 5. The method for measuring a carrier concentration according to claim 1, wherein the first electrode is made of titanium, nickel, aluminum, platinum, or gold.

7. 7. The method for measuring a carrier concentration according to claim 1, wherein, in the step of measuring the capacitance of the first silicon carbide epitaxial substrate, the voltage is applied between the first electrode and the second electrode in a state where a second electrode is disposed on the first silicon carbide substrate.

8. A method for measuring carrier concentration described in any one of claims 1 to 7, wherein the thickness of the second layer is 3 μm or less.

9. determining a flow rate of a nitrogen source based on the carrier concentration of the first layer calculated by the method for measuring carrier concentration according to any one of claims 1 to 8; preparing a second silicon carbide substrate different from the first silicon carbide substrate; forming a second silicon carbide epitaxial layer on the second silicon carbide substrate; the determined flow rate of the nitrogen source is used in the step of forming a second silicon carbide epitaxial layer on the second silicon carbide substrate.

10. preparing a silicon carbide epitaxial substrate manufactured by the manufacturing method of claim 9; and processing the silicon carbide epitaxial substrate.

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