Semiconductor Devices

Abstract

To provide a semiconductor device in which an oxide semiconductor is used and on-state current is high.SOLUTION: A semiconductor device includes a first transistor 100a provided in a driver circuit portion and a second transistor 100b provided in a pixel portion, the first transistor and the second transistor having different structures. Furthermore, the first transistor and the second transistor are transistors having a top-gate structure. In oxide semiconductor films 105, 108, an impurity element is contained in regions 105b, 105c, 108b, 108c which do not overlap with gate electrodes 119, 120. The regions function as low-resistance regions, and are in contact with an insulating film 126 containing hydrogen. In addition, conductive films 134-137 which function as a source electrode and a drain electrode and which are in contact with the regions containing the impurity element through openings in the insulating films containing hydrogen are provided. The first transistor includes two gate electrodes 102, 119 which overlap with each other through the oxide semiconductor film.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] One embodiment of the present invention is a semiconductor device including an oxide semiconductor film and a display device including the semiconductor device. Regarding the device.

[0002] Note that one embodiment of the present invention is not limited to the above technical fields. The technical field of one aspect of the present invention relates to a product, a method, or a manufacturing method. Process, Machine, Manufacture, or Composition of Matter In particular, one embodiment of the present invention relates to a semiconductor device, a display device, a light-emitting device, a power storage device, a memory device, The present invention relates to a device, a driving method thereof, or a manufacturing method thereof.

[0003] In this specification and the like, a semiconductor device is a device that can function by utilizing semiconductor characteristics. Refers to devices in general, including semiconductor elements such as transistors, semiconductor circuits, arithmetic units, and memory The device is one aspect of a semiconductor device. Optical devices, power generation devices (including thin-film solar cells, organic thin-film solar cells, etc.), and electronic devices The device may include a semiconductor device. [Background technology]

[0004] A transistor (thin film transistor) is made using a semiconductor thin film formed on a substrate with an insulating surface. The technology of constructing thin-film transistors (also called thin-film transistors (TFTs)) is attracting attention. It is widely used in electronic devices such as integrated circuits (ICs) and image display devices (display devices). Semiconductor materials, such as silicon, are widely known as semiconductor thin films that can be used in transistors. However, oxide semiconductors are attracting attention as another material.

[0005] For example, amorphous oxides containing In, Zn, Ga, Sn, etc. are used as oxide semiconductors. Patent Document 1 discloses a technique for fabricating a transistor using this method. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] Japanese Patent Application Laid-Open No. 2006-165529 Summary of the Invention [Problem to be solved by the invention]

[0007] As a transistor using an oxide semiconductor film, for example, an inverted staggered type (bottom gate structure) The oxide semiconductor is a planar type (also called a top gate structure) or a planar type (also called a top gate structure). When a transistor using a conductor film is applied to a display device, it is more However, the manufacturing process of the inverted staggered transistor is relatively simple and the manufacturing cost can be reduced. However, as the screen size of display devices increases, High definition image quality of devices (for example, 4k x 2k (horizontal pixel count = 3840 pixels, vertical pixel count = 1000 pixels) Prime number = 2160 pixels) or 8k x 4k (horizontal pixel count = 7680 pixels, vertical pixel count = 8k x 4k) As high-resolution display devices (represented by a 4320 pixel display) advance, inverted staggered transistors In the case of a transistor, there is a parasitic capacitance between the gate electrode and the source electrode and between the gate electrode and the drain electrode. The capacitance increases signal delays and the like, which causes problems such as deterioration of the image quality of the display device. In addition, in the case of an inverted staggered transistor, the transistor Therefore, a planar transistor using an oxide semiconductor film is proposed. For Renner-type transistors, the structure has stable semiconductor characteristics and high reliability. Furthermore, there is a demand for the development of a transistor that can be formed through a simple manufacturing process.

[0008] In view of the above problems, one embodiment of the present invention provides a novel semiconductor device including an oxide semiconductor. In particular, a planar semiconductor device using an oxide semiconductor is provided. To provide a semiconductor device using a conductor with a large on-state current, or to provide an off-state semiconductor using an oxide semiconductor To provide a semiconductor device with a small current, or to provide a semiconductor device with a small area using an oxide semiconductor To provide a semiconductor device using an oxide semiconductor and having stable electrical characteristics. or to provide a highly reliable semiconductor device using an oxide semiconductor, or to provide a novel semiconductor One of the objects is to provide a semiconductor device or a novel display device.

[0009] The above description of the problem does not preclude the existence of other problems. The embodiment does not necessarily have to solve all of these problems. Problems other than those mentioned above can be solved by the specification. It is clear from the description of the specification, etc. that the problems other than those mentioned above cannot be extracted from the description of the specification, etc. It is possible to issue it. [Means for solving the problem]

[0010] One embodiment of the present invention is a semiconductor device including a first transistor provided in a driver circuit portion and a second transistor provided in a pixel portion. a semiconductor device having a first transistor and a second transistor, The first and second transistors have different structures. A transistor having a gate structure, in which an oxide semiconductor film does not overlap with a gate electrode The region containing the impurity element in the oxide semiconductor film has low resistance. In addition, in the oxide semiconductor film, the region containing the impurity element has a function as a The hydrogen-containing film is in contact with the impurity element at the opening of the hydrogen-containing film. A conductive film having a function as a source electrode and a drain electrode may be provided in contact with the region. .

[0011] Note that the first transistor provided in the driver circuit portion overlaps with the first transistor provided with an oxide semiconductor film interposed therebetween. It has two gate electrodes.

[0012] Impurity elements include hydrogen, boron, carbon, nitrogen, fluorine, aluminum, silicon, and lithium. These include fluorine, chlorine, or rare gas elements.

[0013] In the oxide semiconductor film, hydrogen, a rare gas element, boron, carbon, nitrogen, fluorine, and aluminum are By containing at least one impurity element selected from the group consisting of ammonium, silicon, phosphorus, and chlorine, the conductive Therefore, in the oxide semiconductor film, a region containing the impurity element is formed by applying a gate voltage The region having the impurity element is a source electrode and a drain electrode. By contacting the transistor with the It becomes a transistor with a high on-current.

[0014] In addition, the first transistor provided in the driver circuit portion and the second transistor provided in the pixel portion The transistors may have oxide semiconductor films with different atomic ratios of metal elements.

[0015] In addition, the first transistor provided in the driver circuit portion and the second transistor provided in the pixel portion Each of the transistors is a multi-layer transistor in which a first film and a second film are stacked instead of an oxide semiconductor film. It may have a layer film. [Effects of the Invention]

[0016] According to one embodiment of the present invention, a novel semiconductor device including an oxide semiconductor can be provided. In particular, a planar semiconductor device using an oxide semiconductor can be provided. Alternatively, a semiconductor device including an oxide semiconductor and having a large on-state current can be provided. A semiconductor device using an oxide semiconductor and having a small off-state current can be provided. A semiconductor device using an oxide semiconductor and occupying a small area can be provided. A semiconductor device using an oxide semiconductor and having stable electrical characteristics can be provided. In this way, a highly reliable semiconductor device using an oxide semiconductor can be provided. A novel semiconductor device can be provided. Alternatively, a novel display device can be provided. .

[0017] The description of these effects does not preclude the existence of other effects. An embodiment does not necessarily have to have all of these effects. The above will be made clear from the description, drawings, claims, etc. It is possible to extract other effects from the descriptions in the aspects and claims. [Brief explanation of the drawings]

[0018] [Figure 1] 1A and 1B are top views illustrating one embodiment of a semiconductor device. [Figure 2] 1A and 1B are cross-sectional views illustrating one embodiment of a semiconductor device. [Figure 3] 1A and 1B are cross-sectional views illustrating one embodiment of a semiconductor device. [Figure 4] 1A and 1B are cross-sectional views illustrating one embodiment of a semiconductor device. [Figure 5] 1A to 1C are cross-sectional views illustrating one embodiment of a method for manufacturing a semiconductor device. [Figure 6] 1A to 1C are cross-sectional views illustrating one embodiment of a method for manufacturing a semiconductor device. [Figure 7] 1A to 1C are cross-sectional views illustrating one embodiment of a method for manufacturing a semiconductor device. [Figure 8] FIG. 1 is a top view illustrating one embodiment of a semiconductor device. [Figure 9] 1A and 1B are cross-sectional views illustrating one embodiment of a semiconductor device. [Figure 10] 1A and 1B are cross-sectional views illustrating one embodiment of a semiconductor device. [Figure 11] 1A to 1C are cross-sectional views illustrating one embodiment of a method for manufacturing a semiconductor device. [Figure 12] 1A to 1C are cross-sectional views illustrating one embodiment of a method for manufacturing a semiconductor device. [Figure 13] 1A to 1C are cross-sectional views illustrating one embodiment of a method for manufacturing a semiconductor device. [Figure 14] 1A and 1B are diagrams illustrating band structures of a transistor according to one embodiment of the present invention. [Figure 15] 1A and 1B are diagrams illustrating band structures of a transistor according to one embodiment of the present invention. [Figure 16] 1A and 1B are cross-sectional views illustrating a structure of a transistor. [Figure 17] 1A and 1B are cross-sectional views illustrating a structure of a transistor. [Figure 18] 1A and 1B are cross-sectional views illustrating a structure of a transistor. [Figure 19] 1A and 1B are cross-sectional views illustrating a structure of a transistor. [Figure 20] 1A and 1B are cross-sectional views illustrating a structure of a transistor. [Figure 21] 1A to 1C are cross-sectional views illustrating a manufacturing process of a transistor. [Figure 22] 1A and 1B are cross-sectional views illustrating a structure of a transistor. [Figure 23] 1A and 1B are cross-sectional views illustrating a structure of a transistor. [Figure 24] 1A and 1B are cross-sectional views illustrating a structure of a transistor. [Figure 25] 1A and 1B are cross-sectional views illustrating a structure of a transistor. [Figure 26] 1A and 1B are cross-sectional views illustrating a structure of a transistor. [Figure 27] FIG. 1 is a diagram illustrating a calculation model. [Figure 28] FIG. 1 is a diagram illustrating the initial state and the final state. [Figure 29] 1 is a diagram illustrating the activation barrier. [Figure 30] FIG. 1 is a diagram illustrating the initial state and the final state. [Figure 31] 1 is a diagram illustrating the activation barrier. [Figure 32] FIG. 1 is a diagram illustrating the transition levels of VOH. [Figure 33] 1A and 1B are a block diagram and a circuit diagram illustrating a display device. [Figure 34] FIG. 1 is a top view illustrating one embodiment of a display device. [Figure 35] 1A and 1B are cross-sectional views illustrating one embodiment of a display device. [Figure 36] 1A and 1B are cross-sectional views illustrating one embodiment of a display device. [Figure 37] 1A and 1B are cross-sectional views illustrating a structure of a pixel portion of a light-emitting device. [Figure 38] FIG. 2 is a diagram illustrating a display module. [Figure 39] 1A to 1C illustrate electronic devices. [Figure 40] FIG. 10 is a diagram illustrating the temperature dependence of resistivity. [Figure 41] Cs-corrected high-resolution TEM image of a cross section of CAAC-OS, and a schematic cross-sectional diagram of CAAC-OS. [Figure 42] Cs-corrected high-resolution TEM image of the CAAC-OS in the plane. [Figure 43] 10A and 10B illustrate structural analyses of a CAAC-OS and a single-crystal oxide semiconductor by XRD. [Figure 44] Electron diffraction patterns of CAAC-OS. [Figure 45] FIG. 1 is a diagram illustrating the change in the crystalline portion of an In—Ga—Zn oxide due to electron irradiation. DETAILED DESCRIPTION OF THE INVENTION

[0019] Hereinafter, embodiments of the invention disclosed in this specification will be described in detail with reference to the drawings. However, the present invention is not limited to the following description, and any deviation from the spirit and scope of the present invention is not permitted. It will be readily understood by those skilled in the art that various modifications can be made to the form and details of the present invention. Therefore, the present invention should not be construed as being limited to the following description of the embodiments. .

[0020] In addition, the position, size, range, etc. of each component shown in the drawings etc. are not necessarily shown in order to facilitate understanding. It may not represent the actual position, size, range, etc. Therefore, the disclosed invention The position, size, range, etc. are not necessarily limited to those disclosed in the drawings, etc.

[0021] In this specification, ordinal numbers such as "first," "second," and "third" refer to the order of components. It should be noted that this is added to avoid confusion and is not intended to limit the number.

[0022] In this specification, the terms "above" and "below" are used to indicate whether the positional relationship of a component is "directly above" or "below." For example, the term "gate electrode on the gate insulating film" does not necessarily mean "directly under" the gate insulating film. If the expression "electrode" is used, it excludes those that include other components between the gate insulating film and the gate electrode. do not.

[0023] In addition, the terms "electrode" and "wiring" used in this specification and the like refer to these components functionally. This is not a limitation. For example, an "electrode" may be used as part of a "wiring." , and vice versa. Furthermore, the terms "electrode" and "wiring" may be used interchangeably with "electrodes" and "wiring." This also includes cases where the wiring is formed integrally.

[0024] Also, the functions of "source" and "drain" can be changed by using transistors with different polarities. Or, when the direction of the current changes during circuit operation, the positions may be swapped. Therefore, in this specification and the like, the terms "source" and "drain" are used interchangeably. It is assumed that this is possible.

[0025] In this specification, "electrically connected" means "something that has some kind of electrical effect." This includes cases where the device is connected via a "of" is not subject to any particular restrictions as long as it allows the transmission and reception of electrical signals between connected objects. For example, "things that have some kind of electrical action" include electrodes, wiring, and transistors. It has various functions such as switching elements, resistors, inductors, capacitors, etc. This includes elements such as:

[0026] (Embodiment 1) In this embodiment mode, one mode of a semiconductor device and a manufacturing method of the semiconductor device will be described with reference to FIGS. This will be used to explain.

[0027] <Configuration 1 of semiconductor device> 1 and 2 show a top-gate structure transistor as an example of a transistor included in a semiconductor device. Here, a display device will be described as an example of a semiconductor device. In addition, the structure of a transistor provided in each of a driver circuit portion and a pixel portion of a display device will be described. The display device described in this embodiment has a transistor structure in a driver circuit portion and a pixel portion. The transistors included in the driver circuit section have a dual gate structure, and the pixel section The transistors included in the figure have a single gate structure.

[0028] In FIG. 1, a transistor 100a provided in a driver circuit portion and a transistor 100b provided in a pixel portion are A top view of transistor 100a and transistor 100b is shown in FIG. 2, and a cross-sectional view of transistors 100a and 100b is shown in FIG. FIG. 1A is a top view of the transistor 100a, and FIG. 1B is a top view of the transistor 100b. 2(A) is a cross-sectional view taken along the dashed line AB in FIG. 1(A), and FIG. 1(B) is a cross-sectional view taken along the dashed line AB in FIG. 2(B) is a cross-sectional view of the cross section between the dashed lines CD and G in FIG. 1(A). 1B. In FIG. 1, for clarity, Therefore, the substrate 101, the insulating film 104, the insulating film 126, the insulating film 127, and the like are omitted. FIG. 2A is a cross-sectional view of the transistors 100a and 100b in the channel length direction. FIG. 2B is a cross-sectional view of the transistors 100a and 100b in the channel width direction. do.

[0029] In the top view of the transistor, the transistor 100a is also shown in the following drawings. As with the transistor 100b, some of the components may be omitted in the illustration. The dashed-dotted line AB direction and the dashed-dotted line CD direction are the channel length direction, and the dashed-dotted line GH direction The direction of the dashed dotted line IJ may be referred to as the channel width direction.

[0030] The transistor 100a shown in FIG. 2 includes a conductive film 102 over a substrate 101 and a The insulating film 104 over the conductive film 102, the oxide semiconductor film 105 over the insulating film 104, and the oxide semiconductor The insulating film 116 is in contact with the conductive film 105, and the insulating film 116 is overlapped with the oxide semiconductor film 105 via the insulating film 116. and a conductive film 119.

[0031] The conductive film 102 and the conductive film 119 function as gate electrodes. The transistor 100a is a transistor with a dual gate structure. The insulating film 116 functions as a gate insulating film.

[0032] Although not shown, the conductive film 102 is formed so as to overlap the entire oxide semiconductor film 105. That's fine.

[0033] The oxide semiconductor film 105 has a channel region 105 overlapping with the conductive film 102 and the conductive film 119. The channel region 105a is sandwiched between low resistance regions 105b and 105c.

[0034] In the transistor 100a, the insulating film in contact with the low-resistance regions 105b and 105c An insulating film 126 may be provided on the insulating film 126. The oxide semiconductor film 105 is thinned in the openings 128 and 129 of the insulating film 126 and the insulating film 127. Conductive films 134 and 135 are provided in contact with the resistance regions 105b and 105c.

[0035] It is preferable to provide a nitride insulating film 161 on the substrate 101. The nitride insulating film 161 may be a silicon nitride film, an aluminum nitride film, or the like. Covering 101 is preferable because it is possible to prevent the elements contained in substrate 101 from diffusing.

[0036] The transistor 100b is formed by an oxide semiconductor film on an insulating film 104 formed on a substrate 101. 108, an insulating film 117 in contact with the oxide semiconductor film 108, and an oxide semiconductor film 117 The semiconductor film 108 and the conductive film 120 overlap each other.

[0037] The conductive film 120 functions as a gate electrode. It functions as a velum.

[0038] The oxide semiconductor film 108 has a channel region 108a overlapping with the conductive film 120 and a channel region 108b overlapping with the conductive film 120. The low resistance regions 108b and 108c sandwich the region 108a.

[0039] In the transistor 100b, the insulating film in contact with the low-resistance regions 108b and 108c An insulating film 126 may be provided on the insulating film 126. The oxide semiconductor film 108 is thinned in the openings 130 and 131 of the insulating film 126 and the insulating film 127. Conductive films 136 and 137 are provided in contact with the resistance regions 108b and 108c.

[0040] A nitride insulating film 162 is provided to cover the conductive films 134, 135, 136, and 137. The nitride insulating film 162 is preferably provided to prevent diffusion of impurities from the outside. It is possible.

[0041] In the oxide semiconductor film 105, oxygen vacancies are formed in a region that does not overlap with the conductive film 119. In addition, in the oxide semiconductor film 108, a region that does not overlap with the conductive film 120 The oxide semiconductor film contains an element that forms oxygen vacancies. The elements that form oxygen vacancies in the nitride semiconductor film will be referred to as impurity elements in the following description. Representative examples include hydrogen, boron, carbon, nitrogen, fluorine, aluminum, silicon, phosphorus, These include chlorine and rare gas elements. Typical examples of rare gas elements are helium, neon, and argon. , krypton, and xenon.

[0042] The insulating film 126 is a film containing hydrogen, and is typically a nitride insulating film. Examples of the insulating film include a silicon nitride film and an aluminum nitride film. When the insulating film 126 comes into contact with the oxide semiconductor films 105 and 108, hydrogen contained in the insulating film 126 is absorbed by the oxide semiconductor As a result, the oxide semiconductor films 105 and 108 are The area in contact with the film 126 contains a large amount of hydrogen.

[0043] When an impurity element is added to an oxide semiconductor, the metal element and oxygen in the oxide semiconductor bond together. The oxygen vacancies are formed by adding impurity elements. When hydrogen is added to a semiconductor, hydrogen enters the oxygen vacancy site, and a donor level is created near the conduction band. As a result, an oxide conductor can be formed. Therefore, the oxide conductor has light-transmitting properties. The oxide semiconductor is called an oxide conductor.

[0044] Oxide conductors are degenerate semiconductors, and the conduction band edge and the Fermi level are coincident or nearly coincident. Therefore, it is assumed that the oxide conductor film and the source and drain electrodes The contact with the functional conductive film is an ohmic contact, and the oxide conductive film and the source electrode and The contact resistance with the conductive film that functions as the drain electrode can be reduced.

[0045] That is, the low resistance regions 105b, 105c, 108b, and 108c are the source and drain regions. It functions as a transcription region.

[0046] The conductive films 134, 135, 136, and 137 are made of tungsten, titanium, or aluminum. Conductive materials that easily bond with oxygen, such as copper, molybdenum, chromium, or tantalum alone or in alloys When the conductive film 134 or 135 is formed using a material, oxygen contained in the oxide semiconductor film and the conductive film 134 or 135 The conductive materials contained in the oxide semiconductor films 105 and 108 are bonded to each other. In addition, the conductive films 134 and 135 are formed on the oxide semiconductor films 105 and 108. , 136, 137. As a result, low resistance regions 105b, 105c, and The regions 108b and 108c have increased conductivity and function as a source region and a drain region. do.

[0047] the impurity element is a rare gas element, and the oxide semiconductor films 105 and 108 are formed by a sputtering method. When the low resistance regions 105b, 105c, 108b, and 108c are formed of rare gas, The resistivity of the region 105b is lower than that of the channel region 105a. The oxide semiconductor films 105c, 108b, and 108c have higher concentrations of rare gas elements. When 105 and 108 are formed by a sputtering method, a rare gas is used as a sputtering gas. In order to use the oxide semiconductor film 105, the oxide semiconductor film 108 contains a rare gas. In order to form oxygen vacancies in the regions 105b, 105c, 108b, and 108c, This is because rare gas is added to the low resistance regions 105b, 105c, and 108. In the channel regions 105a and 108a, a rare gas element different from that in the channel regions 105b and 108c is added. It may be possible.

[0048] Furthermore, since the low resistance regions 105b and 105c are in contact with the insulating film 126, the channel region 10 The low-resistance regions 108b and 108c have a higher hydrogen concentration than the insulating film 12. 6, the concentration of hydrogen is higher than that of the channel region 108a.

[0049] Secondary ion mass spectrometry is performed in the low resistance regions 105b, 105c, 108b, and 108c. The concentration of hydrogen obtained by 19 atoms / cm 3 or more, or 1 x 10 20 atoms / cm 3 or more, or 5 x 10 20 atoms / cm 3 It can be more than The hydrogen concentrations obtained by secondary ion mass spectrometry of the channel regions 105a and 108a are Degrees are 5 x 10 19 atoms / cm 3 or less, or 1 x 10 19 atoms / cm 3 below , or 5 x 10 18 atoms / cm 3 or less, or 1 x 10 18 atoms / cm 3 below , or 5 x 10 17 atoms / cm 3 or less, or 1 x 10 16 atoms / cm 3 below It can be said that:

[0050] Compared to the channel regions 105a and 108a, the low resistance regions 105b, 105c, and 108 In the samples of b and c, the hydrogen concentration is high and the amount of oxygen deficiency is large due to the addition of rare gas elements. Therefore, the conductivity is high and they function as source and drain regions. is the resistivity of the low resistance regions 105b, 105c, 108b, and 108c, and is 1×10 -3 Ωcm or more 1×10 4 Less than Ωcm or 1×10 -3 Ωcm or more 1×10 -1 Less than Ωcm It can be said that:

[0051] In the low resistance regions 105b, 105c, 108b, and 108c, the amount of hydrogen is If the amount of the vacancies is equal to or less than that of the oxygen vacancies, hydrogen is easily captured by the oxygen vacancies, and the channel region 105a As a result, a transistor with normally-off characteristics can be fabricated. This can be done.

[0052] In addition, in the low resistance regions 105b, 105c, 108b, and 108c, the amount of hydrogen is compared When the amount of oxygen vacancies is large, the amount of hydrogen is controlled to reduce the amount of oxygen vacancies in the low resistance regions 105b and 105 Alternatively, the carrier density of the low resistance region 10c, 108b, and 108c can be controlled. In 5b, 105c, 108b, and 108c, the amount of hydrogen is large compared to the amount of oxygen vacancy. In this case, the amount of oxygen vacancies is controlled to form low resistance regions 105b, 105c, 108b, and 10 The carrier density of the low resistance regions 105b, 105c, and 108c can be controlled. The carrier density of 08b and 108c is 5×10 18 pieces / cm 3 or more, or 1 x 10 19 pieces / cm 3 or more, or 1 x 10 20 pieces / cm 3 By doing so, the channel region and the source electrode and between the conductive films 134, 135, 136, and 137 that function as drain electrodes. It is possible to manufacture a transistor with low resistance and large on-state current.

[0053] The transistors 100a and 100b shown in this embodiment each have a channel region and a source electrode. and between the conductive films 134, 135, 136, and 137 that function as drain electrodes. , and the low resistance regions 105b, 105c, 108b, and 108c provide low parasitic resistance.

[0054] In the transistor 100a, the conductive film 119 overlaps with the conductive films 134 and 135. Therefore, in order to reduce the parasitic capacitance between the conductive film 119 and the conductive films 134 and 135, In addition, the conductive film 120 does not overlap with the conductive films 136 and 137. Therefore, it is possible to reduce the parasitic capacitance between the conductive film 120 and the conductive films 136 and 137. is.

[0055] Therefore, the transistors 100a and 100b have a large on-state current and a high field-effect mobility. expensive.

[0056] In addition, in the transistor 100a, the conductive film 119 is used as a mask to In the transistor 100b, the conductive film 120 The impurity element is added to the oxide semiconductor film 108 using the mask. The lines can form low resistance areas.

[0057] In addition, in the transistor 100a, the conductive film 102 and the conductive film 119 are not connected to each other. By applying different potentials to the transistors 100a and 100b, the threshold voltage of the transistor 100a can be controlled. Alternatively, as shown in FIGS. 1A and 2B, the conductive film 102 and the conductive film 103 may be formed. 19 are connected at the opening 113 and the same potential is applied, Reduction of -GBT (-Gate Bias-Temperature) stress test This makes it possible to suppress the change in the on-state current rise voltage at different drain voltages. In addition, in the oxide semiconductor film 105, as shown in FIG. When the conductive films 102 and 119 are connected to each other, the electric field between the conductive films 102 and 119 is 5, the top surface and side surface of the oxide semiconductor film 105 are affected, and therefore, carriers flow throughout the entire oxide semiconductor film 105. That is, the area where the carriers flow becomes larger in the film thickness direction, so the movement of the carriers As a result, the on-current of the transistor 100a increases and the field effect The transistor 100a has a large on-state current and therefore a large area in a plane. As a result, the area occupied by the driver circuit section is small and the frame is narrow. It is possible to manufacture a display device having such a structure.

[0058] In addition, in the display device, the channel lengths of the transistors included in the driver circuit portion and the pixel portion are It may be different.

[0059] Typically, the channel length of the transistor 100a included in the driving circuit section is set to less than 2.5 μm. On the other hand, the thickness of the pixel portion can be set to 1.45 μm or more and 2.2 μm or less. The channel length of the transistor 100b is 2.5 μm or more, or 2.5 μm or more and 20 μm or less. It can be said that:

[0060] The channel length of the transistor 100a included in the driving circuit section is set to less than 2.5 μm, preferably By making the thickness between 1.45 μm and 2.2 μm, the transistor 10 included in the pixel portion can be Compared to 0b, it is possible to increase the field effect mobility and increase the on-current. As a result, a driving circuit section capable of high speed operation can be manufactured. A display device with a circuit portion that occupies a small area can be manufactured.

[0061] In addition, by using a transistor with high field effect mobility, It is possible to form a demultiplexer circuit in the signal line driver circuit. A circuit is a circuit that distributes one input signal to one of multiple outputs, so It is possible to reduce the number of input terminals. For example, if one pixel has a red sub-pixel and a green sub-pixel, By providing a demultiplexer circuit in each pixel, Since the input signal input to each sub-pixel can be distributed by a demultiplexer circuit, This makes it possible to reduce the number of input terminals to one-third.

[0062] Furthermore, by providing the transistor 100b with a large on-state current in the pixel portion, a large display device can be realized. Even if the number of wires increases in devices and high-definition display devices, the signal delay in each wire can be reduced. This makes it possible to suppress display unevenness.

[0063] From the above, it is possible to manufacture a driver circuit section using transistors capable of high-speed operation. In addition, by manufacturing the pixel portion using transistors with low parasitic capacitance and parasitic resistance, high precision can be achieved. Therefore, a thin display device capable of double-speed driving can be manufactured.

[0064] The configuration shown in FIG. 2 will be described in detail below.

[0065] The substrate 101 can be made of various substrates and is not limited to a specific one. Examples of the substrate include a semiconductor substrate (for example, a single crystal substrate or a silicon substrate), an SOI Substrates, glass substrates, quartz substrates, plastic substrates, metal substrates, stainless steel substrates, Stainless steel foil substrate, tungsten substrate, tungsten foil a substrate having a fibrous material, a flexible substrate, a laminated film, a paper containing a fibrous material, or a base film Examples of glass substrates include barium borosilicate glass and aluminoborose glass. Examples include fluorine-based glass and soda-lime glass. Flexible substrates, lamination films, substrates Examples of material films include the following: Polyethylene naphthalate (PET), polyethylene naphthalate (PEN), polyethersulfone ( Plastics such as PES are also available. For example, synthetic resins such as acrylic are also available. For example, polypropylene, polyvinyl fluoride, or polyvinyl chloride may be used. Examples include polyester, polyamide, polyimide, and aramide. Examples include adhesives, epoxy, inorganic vapor deposition films, and paper. In particular, semiconductor substrates and single crystal substrates By manufacturing transistors using a silicon-on-insulator (SOI) substrate, the characteristics, size, is used to manufacture small-sized transistors with little variation in shape, high current capacity, etc. When a circuit is constructed using such transistors, the circuit consumes less power. This allows for a higher integration of the circuit.

[0066] In addition, a flexible substrate is used as the substrate 101, and a transistor is formed directly on the flexible substrate. Alternatively, a separation layer may be provided between the substrate 101 and the transistor. After a semiconductor device is partially or entirely completed on the substrate, it is separated from the substrate 101 and then attached to another substrate. In this case, the transistors can be mounted on substrates with poor heat resistance or flexible substrates. The above-mentioned release layer may be formed, for example, by a tungsten film and a silicon oxide film. The laminated structure of inorganic film with acrylic film, or organic resin film such as polyimide formed on the substrate The configuration etc. can be used.

[0067] An example of a substrate on which a transistor is transferred is a substrate on which the above-mentioned transistor is formed. In addition to the substrates that can be used, paper substrates, cellophane substrates, aramid film substrates, polyimide film substrates, Lum substrate, stone substrate, wood substrate, fabric substrate (natural fibers (silk, cotton, linen), synthetic fibers (nylon) , polyurethane, polyester) or regenerated fiber (acetate, cupra, rayon, These substrates include recycled polyester, leather substrates, and rubber substrates. By using this, it is possible to form transistors with good characteristics and low power consumption. This allows for the manufacture of devices that are less likely to break, heat resistant, lightweight, or thin.

[0068] The insulating film 104 can be formed as a single layer or a stacked layer of an oxide insulating film or a nitride insulating film. In order to improve the interface characteristics with the oxide semiconductor films 105 and 108, the insulating film 10 In the case of 4, at least the regions in contact with the oxide semiconductor films 105 and 108 are formed of an oxide insulating film. In addition, an oxide insulating film that releases oxygen by heating may be used as the insulating film 104. By using the oxide semiconductor film 105, oxygen contained in the insulating film 104 can be removed by heat treatment. , 108. In addition, the insulating film 104 can be connected to the conductive film 102. By forming the region where the conductive film 102 is to be formed with a nitride insulating film, the metal element contained in the conductive film 102 can be converted into an oxide semiconductor. It is possible to prevent the transfer to the conductive films 105 and 108, which is preferable.

[0069] The thickness of the insulating film 104 is 50 nm or more, or 100 nm or more and 3000 nm or less, or 2 By making the insulating film 104 thick, the insulating film 104 can be formed to have a thickness of 1000 nm or more and 1000 nm or less. The amount of oxygen released from the insulating film 104 can be increased, and the insulating film 104 and the oxide semiconductor The interface state density at the interfaces with the oxide semiconductor film 105 and the oxide semiconductor film 108 and the a channel region 105a included in the oxide semiconductor film 108; It is possible to reduce oxygen vacancies that occur.

[0070] The insulating film 104 may be, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, or nitride. silicon oxide, aluminum oxide, hafnium oxide, gallium oxide or Ga-Zn oxide Any of these may be used, and the layer may be provided as a single layer or a multilayer.

[0071] Here, the insulating film 104 is formed by stacking an insulating film 104a and an insulating film 104b. Note that by using a nitride insulating film as the insulating film 104a, the The metal element can be prevented from diffusing. As a result, the interface state density at the interfaces with the oxide semiconductor films 105 and 108 can be reduced. can be done.

[0072] The oxide semiconductor films 105 and 108 are typically made of In—Ga oxide or In—Zn oxide. In-M-Zn oxide (M is Mg, Al, Ti, Ga, Y, Zr, La, Ce, Nd The oxide semiconductor films 105 and 108 are formed of a metal oxide such as Hf or Hf. It has photosensitivity.

[0073] When the oxide semiconductor films 105 and 108 are made of In-M-Zn oxide, the atoms of In and M are The ratio of In to M is 25 atomic % when the sum of In and M is 100 atomic %. or more, M is less than 75 atomic %, or In is 34 atomic % or more, M is 66 atomic % Less than omic%.

[0074] The oxide semiconductor films 105 and 108 have an energy gap of 2 eV or more, or 2.5 eV or more. or more, or 3 eV or more.

[0075] The thickness of the oxide semiconductor films 105 and 108 is greater than or equal to 3 nm and less than or equal to 200 nm, or greater than or equal to 3 nm. It can be 100 nm or less, or 3 nm or more and 50 nm or less.

[0076] The oxide semiconductor films 105 and 108 are In-M-Zn oxides (M is Mg, Al, Ti, G In the case of In-M-Zn oxide, a film is formed. The atomic ratio of the metal elements in the sputtering target used for this purpose is In≧M, Zn≧M. It is preferable that the atomic ratio of the metal elements in such a sputtering target is In:M:Zn=1:1:1, In:M:Zn=1:1:1.2, In:M:Zn= 2:1:1.5, In:M:Zn=2:1:2.3, In:M:Zn=2:1:3, In The oxide semiconductor films 105 and 108 are preferably formed in a ratio of M:Zn=3:1:2. The atomic ratio of each metal element contained in the sputtering target is included as an error. The atomic ratio of the elements varies by plus or minus 40%.

[0077] In addition, the oxide semiconductor films 105 and 108 contain silicon, which is one of the Group 14 elements, When carbon is contained, oxygen vacancies increase in the oxide semiconductor films 105 and 108, and the oxide semiconductor films 105 and 108 become n-type. Therefore, the oxide semiconductor films 105 and 108, especially the channel region 10 In 5a and 108a, the concentrations of silicon and carbon (obtained by secondary ion mass spectrometry) concentration) to 2 x 10 18 atoms / cm 3 or less, or 2 x 10 17 atoms / cm 3 As a result, the transistor has a positive threshold voltage. It has a characteristic (also called a normally-off characteristic).

[0078] In addition, the oxide semiconductor films 105 and 108, particularly the channel regions 105a and 108a In the case of the concentration of alkali metals or alkaline earth metals obtained by secondary ion mass spectrometry, Degrees, 1 x 10 18 atoms / cm 3 or less, or 2 x 10 16 atoms / cm 3 below When an alkali metal or alkaline earth metal is bonded to an oxide semiconductor, Carriers may be generated, which may increase the off-state current of the transistor. Therefore, the concentration of the alkali metal or alkaline earth metal in the channel regions 105a and 108a As a result, the transistor has a potential at which the threshold voltage is positive. It has a normally-off characteristic.

[0079] In addition, the oxide semiconductor films 105 and 108, particularly the channel regions 105a and 108a When nitrogen is contained in the silicon dioxide, electrons acting as carriers are generated, the carrier density increases, and the silicon dioxide becomes n-type. As a result, a transistor using an oxide semiconductor film containing nitrogen may Therefore, the oxide semiconductor film, particularly the channel In the regions 105a and 108a, it is preferable that nitrogen be reduced as much as possible. For example, the nitrogen concentration obtained by secondary ion mass spectrometry is 5×10 18 atoms / cm 3 It can be the following:

[0080] In the oxide semiconductor films 105 and 108, particularly in the channel regions 105a and 108a, By reducing the impurity elements, the carrier density of the oxide semiconductor film can be reduced. Therefore, the oxide semiconductor films 105 and 108, particularly the channel regions 105a and 105b, In 08a, the carrier density is 1×10 17 pieces / cm 3 or less, or 1 x 10 15 pieces / cm 3 or less, or 1 x 10 13 pieces / cm 3 or less, or 8 x 10 11 pieces / cm 3 The following, or 1×10 11 pieces / cm 3 Less than 1 × 10 10 pieces / cm 3 Less than 1 x 10 -9 pieces / cm 3 It can be more than that.

[0081] The oxide semiconductor films 105 and 108 are formed of an oxide semiconductor having a low impurity concentration and a low density of defect states. By using a semiconductor film, it is possible to manufacture a transistor with even better electrical characteristics. Here, the low impurity concentration and low defect level density (low oxygen vacancies) are considered to be High purity genuine or substantially high purity genuine. High purity genuine or substantially high purity genuine acid In the case of nitride semiconductors, the carrier density can be reduced because there are few carrier sources. Therefore, a transistor in which a channel region is formed in the oxide semiconductor film has a certain The electrical characteristics tend to be such that low voltages become positive (also known as normally-off characteristics). Since a highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor film has a low density of defect states, In addition, the trap level density may also be low. A certain oxide semiconductor film has a significantly small off-state current and a low voltage ( In the drain voltage range of 1V to 10V, the off-state current is Below the measurement limit of the isa, i.e., 1 × 10 -13 A characteristic of less than A can be obtained. Therefore, a transistor in which a channel region is formed in the oxide semiconductor film has fluctuations in electrical characteristics. This may result in a highly reliable transistor.

[0082] The oxide semiconductor films 105 and 108 may have, for example, a non-single-crystal structure. For example, CAAC-OS (C Axis Aligned Crystal Line Oxide Semiconductor), polycrystalline structure, microcrystalline structure (described later) Among non-single crystal structures, the amorphous structure has the lowest defect level density. The CAAC-OS has the lowest defect state density.

[0083] Note that the oxide semiconductor films 105 and 108 may have an amorphous structure, a microcrystalline structure, or a polycrystalline structure. A mixed film having two or more of a crystal structure region, a CAAC-OS region, and a single crystal structure region. The mixed film may have, for example, an amorphous structure region, a microcrystalline structure region, and a polycrystalline structure region. A single-layer structure having two or more regions selected from the group consisting of a CAAC-OS region, a single-crystal structure region, and a single-crystal structure region. The mixed film may have, for example, an amorphous structure region, a microcrystalline structure region, a polycrystalline structure region, or a mixed film. The layer is made up of two or more of a crystal structure region, a CAAC-OS region, and a single crystal structure region. There may be a structure like this.

[0084] In the oxide semiconductor film 105, the channel region 105a and the low-resistance region 105b In addition, the crystallinity of the oxide semiconductor film 108 may be different from that of the oxide semiconductor film 105c. The crystallinity of the panel region 108a may differ from that of the low-resistance regions 108b and 108c. This occurs when impurity elements are added to the low resistance regions 105b, 105c, 108b, and 108c. As a result, damage occurs to the low resistance regions 105b, 105c, 108b, and 108c. This is because the crystallinity decreases.

[0085] The insulating films 116 and 117 are formed as a single layer or a stack of an oxide insulating film or a nitride insulating film. Note that in order to improve the interface characteristics with the oxide semiconductor films 105 and 108, At least the regions of the insulating films 116 and 117 that are in contact with the oxide semiconductor films 105 and 108 are oxide films. It is preferable to form the insulating films 116 and 117 using oxide insulating films. Silicon, silicon oxynitride, silicon nitride oxide, silicon nitride, aluminum oxide, oxide Hafnium oxide, gallium oxide, Ga-Zn oxide, etc. may be used, and may be formed as a single layer or a multilayer. It can be established.

[0086] The insulating films 116 and 117 are made of insulating material having a blocking effect against oxygen, hydrogen, water, etc. By providing the insulating film, oxygen can be diffused from the oxide semiconductor films 105 and 108 to the outside, and the insulating film can be Therefore, hydrogen, water, and the like can be prevented from entering the oxide semiconductor films 105 and 108. Examples of insulating films that have a blocking effect on oxygen, water, etc. include aluminum oxide and aluminum oxynitride. Aluminum, Gallium Oxide, Gallium Oxide Nitride, Yttrium Oxide, Yttrium Oxide Nitride , hafnium oxide, hafnium oxynitride, etc.

[0087] The insulating films 116 and 117 are made of hafnium silicate (HfSiO x ), nitrogen Doped hafnium silicate (HfSi x O y N z ), nitrogen-doped hafnium Aluminate (HfAl x O y N z ), hafnium oxide, yttrium oxide, etc. The use of hk materials can reduce gate leakage of transistors.

[0088] The insulating films 116 and 117 are formed using oxide insulating films that release oxygen when heated. By this heat treatment, oxygen contained in the insulating films 116 and 117 is removed from the oxide semiconductor film 105 , 108.

[0089] The thickness of the insulating films 116 and 117 is 5 nm or more and 400 nm or less, or 5 nm or more and 300 nm or less. The thickness can be 10 nm or less, or 10 nm or more and 250 nm or less.

[0090] The conductive films 119 and 120 are made of aluminum, chromium, copper, tantalum, titanium, or molybdenum. , nickel, iron, cobalt, tungsten, or the above-mentioned metal elements It can be formed using an alloy containing the above metal elements or an alloy combining the above metal elements. In addition, the present invention uses a metal element selected from one or more of manganese and zirconium. The conductive films 119 and 120 may have a single-layer structure or a stacked structure of two or more layers. For example, a single layer structure of an aluminum film containing silicon, a single layer structure of a copper film containing manganese, Two-layer structure: titanium film laminated on aluminum film; titanium film laminated on titanium nitride film Two-layer structure with a tungsten film layered on a titanium nitride film, two-layer structure with a tantalum nitride film layered on a titanium nitride film Or a two-layer structure in which a tungsten film is laminated on a tungsten nitride film, or a copper film containing manganese A two-layer structure in which a copper film is laminated on top of a titanium film, and an aluminum film is laminated on top of the titanium film. A three-layer structure in which a titanium film is formed on top of that, a copper film is laminated on top of a copper film containing manganese, and There are three-layer structures, such as a copper film containing manganese on top of aluminum. Select from tantalum, tungsten, molybdenum, chromium, neodymium, and scandium. Alternatively, an alloy film or a nitride film made by combining one or more of the above elements may be used.

[0091] The conductive films 119 and 120 are made of indium tin oxide or indium containing tungsten oxide. Indium oxide, indium zinc oxide with tungsten oxide, indium zinc oxide with titanium oxide Indium tin oxide, indium zinc oxide, silicon oxide A light-transmitting conductive material such as indium tin oxide containing Alternatively, the light-transmitting conductive material and the metal element may be laminated together.

[0092] The thickness of the conductive films 119 and 120 is 30 nm or more and 500 nm or less, or 100 nm or more and 400 nm or less. 00 nm or less.

[0093] The conductive films 134, 135, 136, and 137 function as source and drain electrodes. The conductive films 134, 135, 136, and 137 are made of the same material as that of the conductive films 119 and 120. and structures can be used as appropriate.

[0094] The insulating film 127 can be formed as a single layer or a stacked layer of an oxide insulating film or a nitride insulating film. Note that an oxide insulating film that releases oxygen by heating can be used as the insulating film 127. By the heat treatment, oxygen contained in the insulating film 127 is transferred to the oxide semiconductor films 105 and 108. It is possible to do this.

[0095] The insulating film 127 may be, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, or nitride. silicon oxide, aluminum oxide, hafnium oxide, gallium oxide or Ga-Zn oxide Any of these may be used, and the layer may be provided as a single layer or a multilayer.

[0096] The thickness of the insulating film 127 is 30 nm or more and 500 nm or less, or 100 nm or more and 400 nm or less. It can be as follows:

[0097] <Configuration 2 of semiconductor device> Next, another configuration of the semiconductor device will be described with reference to FIG. The oxide semiconductor film of the transistor 100c formed in the pixel portion and the oxide semiconductor film of the transistor 100b formed in the pixel portion are The oxide semiconductor film of the second insulating film 100d is characterized by having a different atomic ratio of metal elements from that of the oxide semiconductor film of the first insulating film 100a.

[0098] The oxide semiconductor film 105 included in the transistor 100c is made of M (M is Mg, Al, Ti The atomic ratio of In to the number of atoms of other elements (Ga, Y, Zr, La, Ce, Nd, or Hf) is large. The oxide semiconductor film 105 is an In-M-Zn oxide (M is Mg, Al, Ti, Ga, Y, Zr , La, Ce, Nd, or Hf), the oxide semiconductor film 105 is formed using the In the target, if the atomic ratio of metal elements is In:M:Zn=x1:y1:z1, Preferably, x1 / y1 is greater than 1 and equal to or less than 6. Typical examples of the electron number ratio are In:M:Zn=2:1:1.5 and In:M:Zn=2:1: 2.3, In:M:Zn=2:1:3, In:M:Zn=3:1:2, In:M:Zn= Examples include In:M:Zn=3:1:3, In:M:Zn=3:1:4, etc.

[0099] The oxide semiconductor film 108 included in the transistor 100d is made of M (M is Mg, Al, Ti , Ga, Y, Zr, La, Ce, Nd, or Hf) have the same atomic ratio of In, or The oxide semiconductor film 108 is an In-M-Zn oxide (M is Mg, Al, Ti, Ga , Y, Zr, La, Ce, Nd, or Hf), the oxide semiconductor film 108 is formed by In the target used for this purpose, the atomic ratio of the metal elements is In:M:Zn=x2:y2:z 2, it is preferable that x2 / y2 is 1 / 6 or more and 1 or less. is preferably 1 / 3 or more and 6 or less, and more preferably 1 or more and 6 or less. When the value of the saturation coefficient is set to 1 or more and 6 or less, a CAAC-OS film is formed as the oxide semiconductor film 108. A typical example of the atomic ratio of the metal elements in the target is In:M:Zn=1: 1:1, In:M:Zn=1:1:1.2, In:M:Zn=1:3:2, In:M:Z n=1:3:4, In:M:Zn=1:3:6, In:M:Zn=1:3:8, In:M :Zn=1:4:4, In:M:Zn=1:4:5, In:M:Zn=1:4:6, In :M:Zn=1:4:7, In:M:Zn=1:4:8, In:M:Zn=1:5:5, In:M:Zn=1:5:6, In:M:Zn=1:5:7, In:M:Zn=1:5: 8, In:M:Zn=1:6:8, etc.

[0100] The oxide semiconductor film 105 included in the transistor 100c is made of M (M is Mg, Al, T Since the atomic ratio of In to In, Ga, Y, Zr, La, Ce, Nd, or Hf is large, Therefore, the field-effect mobility is high. Typically, the field-effect mobility is 10 cm 2 / Vs is greater than 60cm 2 / Vs less than 15cm 2 / Vs or more 50cm 2 / Vs However, when light is irradiated, the current in the off state increases. Therefore, the conductive film 102 may function as a light-shielding film. By providing a separate light-shielding film in the drive circuit section, the field-effect mobility is high and the As a result, a driver circuit section capable of high-speed operation can be fabricated. It is possible.

[0101] On the other hand, the oxide semiconductor film 108 included in the transistor 100b is made of M (M is Mg, A The atomic ratio of In to In, Ti, Ga, Y, Zr, La, Ce, Nd, or Hf is the same Since the oxide semiconductor film has the same or small value, an increase in off-state current is small even when the oxide semiconductor film is irradiated with light. For this reason, the pixel area is made of M (M is Mg, Al, Ti, Ga, Y, Zr, La, Ce, Nd a transistor having an oxide semiconductor film with the same or smaller atomic ratio of In to Hf; By providing a resistor, it is possible to manufacture a pixel section with less deterioration due to light irradiation and excellent display quality. can be done.

[0102] <Configuration 3 of semiconductor device> Next, another configuration of the semiconductor device will be described with reference to FIG. a transistor 100e formed in the pixel portion, and a transistor 100f formed in the pixel portion, In this case, the conductive films 119 and 120 functioning as gate electrodes have a laminated structure. 4A shows the transistors 100e and 100 in the channel length direction. 4(B) shows a cross-sectional view of the transistors 100e and 100f in the channel width direction. A cross-sectional view is shown.

[0103] The conductive film 119 includes a conductive film 119a in contact with the insulating film 116 and a conductive film 119b in contact with the insulating film 116. The conductive film 119a has an edge portion outside the edge portion of the conductive film 119b. That is, the conductive film 119a protrudes from the conductive film 119b.

[0104] In addition, the end of the insulating film 116 is located outside the end of the conductive film 119a. The insulating film 116 has a shape that protrudes from the conductive film 119a. The sides may be curved.

[0105] The conductive film 120 includes a conductive film 120a in contact with the insulating film 117 and a conductive film 120b in contact with the insulating film 117. The conductive film 120a has an end portion outside the end portion of the conductive film 120b. That is, the conductive film 120a has a shape that protrudes from the conductive film 120b.

[0106] In addition, the end of the insulating film 117 is located outside the end of the conductive film 120a. The insulating film 117 has a shape that protrudes from the conductive film 120a. The sides may be curved.

[0107] The conductive films 119a and 120a may be made of titanium, tantalum, molybdenum, or tungsten. or alloys, or titanium nitride, tantalum nitride, molybdenum nitride, tungsten nitride, etc. Alternatively, the conductive films 119a and 120a can be formed using a Cu—X alloy (X can be formed using Mn, Ni, Cr, Fe, Co, Mo, Ta, or Ti) can.

[0108] The conductive films 119b and 120b are formed using a low-resistance material. b) Copper, aluminum, gold, silver, tungsten, etc., or alloys thereof It can be formed using a compound containing the main component.

[0109] The conductive films 119a and 120a are made of a Cu-X alloy (X is Mn, Ni, Cr, Fe When using a material such as a silicon dioxide (Co), a metal oxide (Mo), a metal oxide (Ta), or a titanium dioxide (Ti), the region in contact with the insulating film is covered by heat treatment. A coating film may be formed. The coating film is formed by a compound containing X. Compound containing X Examples of the oxides of X include oxides of X and nitrides of X. The coating film formed acts as a blocking film, and the Cu in the Cu-X alloy film Therefore, the intrusion of the oxygen atoms into the oxide semiconductor film can be suppressed.

[0110] The copper concentration in the channel regions of the oxide semiconductor films 105 and 108 is set to 1×10 18 atoms / cm 3 By the following, the insulating film 116 having the function as a gate insulating film is formed. , 117 and the oxide semiconductor films 105 and 108. As a result, it is possible to achieve excellent subthreshold swing (S value) It is possible to create a resistor.

[0111] As shown in the transistors 100e and 100f, the conductive film 119 having the shape shown in FIG. , 120 and insulating films 116, 117, the electric potential of the drain region of the transistor is Therefore, the threshold voltage of the transistor due to the electric field in the drain region can be reduced. It is possible to reduce deterioration such as voltage fluctuations.

[0112] <Band structure> Next, as a typical example of the transistor described in this embodiment, a transistor shown in FIG. The band structure in an arbitrary cross section of the capacitor 100a will be described.

[0113] FIG. 14A shows an OP including the channel region of the transistor 100a shown in FIG. The band structure in the cross section is shown. 16 has a sufficiently larger energy gap than the channel region 105a. The Fermi layer of the channel region 105a, the insulating film 104a, the insulating film 104b, and the insulating film 116 The level (denoted as Ef) is approximately equal to the intrinsic Fermi level (denoted as Ei). The work functions of the conductive films 102 and 119 are set to be approximately the same as the Fermi level. The degree.

[0114] When the gate voltage is set to a value equal to or higher than the threshold voltage of the transistor, electrons flow into the channel region 105 The energy at the bottom of the conduction band is denoted as Ec, and the energy at the top of the valence band is denoted as is written as Ev.

[0115] Next, in FIG. 14B, the source region or drain region of the transistor 100a shown in FIG. 2A is The band structure in the QR cross section including the low resistance region 105b is shown. In the low-resistance region 105b, the channel region 105a is in a degenerated state. The Fermi level of the low-resistance region 105c is set to be approximately equal to the energy of the bottom of the conduction band. be.

[0116] At this time, the energy barrier between the conductive film 134 and the low-resistance region 105b is sufficiently small. Similarly, the conductive film 135 and the low resistance region 105c are in ohmic contact. The ohmic contact is achieved because the ohmic barrier is sufficiently small. The electrons can be smoothly exchanged between the conductive film 135 and the channel region 105a. I understand.

[0117] As described above, the transistor according to one embodiment of the present invention has a source electrode and a drain electrode. The electrons are smoothly exchanged between the gate electrode and the channel region, and the channel resistance is kept low. It is a small transistor, i.e., a transistor with excellent switching characteristics. We can see that.

[0118] <Method 1 for manufacturing semiconductor device> Next, a method for manufacturing the transistors 100a and 100b shown in FIGS. 5 to 7 will be used to explain this.

[0119] Films (insulating films, oxide semiconductor films, conductive films, etc.) that constitute the transistors 100a and 100b The methods include sputtering, chemical vapor deposition (CVD), vacuum evaporation, and pulsed laser deposition ( Alternatively, it can be formed by a coating method or a printing method. The film formation methods include sputtering and plasma enhanced chemical vapor deposition (PECVD). is a typical example, but thermal CVD may also be used. An example of thermal CVD is MOCVD (metal organic CVD). Chemical vapor deposition (CVD) and atomic layer deposition (ALD) may also be used.

[0120] In the thermal CVD method, the pressure in the chamber is atmospheric or reduced, and the source gas and oxidant are simultaneously mixed in the chamber. The reaction is carried out near or on the substrate, and the film is deposited on the substrate. As described above, the thermal CVD method is a film formation method that does not generate plasma. This has the advantage that no defects are created by the image.

[0121] In the ALD method, the pressure inside the chamber is atmospheric or reduced, and the source gases for the reaction are sequentially introduced. Next, the gas is introduced into the chamber, and the film is formed by repeating this gas introduction sequence. By switching each switching valve (also called high-speed valve), two or more types of raw materials can be The gases are supplied to the chamber in order, and the first source gas is supplied to the chamber in order to prevent the mixture of the source gases. Simultaneously with or after this, an inert gas (argon, nitrogen, etc.) is introduced, and the second raw material If an inert gas is introduced at the same time, the inert gas is introduced as a carrier gas. In addition, an inert gas may be introduced at the same time as the second source gas is introduced. Instead of introducing an inert gas, the first source gas is discharged by evacuation, and then the second source gas is introduced. A source gas may be introduced. The first source gas is adsorbed on the surface of the substrate to form a first monoatomic layer. The second monolayer is formed on the first monolayer by reacting with the second source gas introduced later. The thin film is formed by stacking the layers.

[0122] This gas introduction sequence is repeated multiple times while controlling it until the desired thickness is achieved. The thickness of the thin film increases depending on the number of times the gas introduction sequence is repeated. Therefore, precise film thickness control is possible, and fine transistors can be fabricated. It is suitable for manufacturing.

[0123] As shown in FIG. 5(A), an insulating film 161 is formed on a substrate 101, and a conductive film is formed on the insulating film 161. A conductive film 102 is formed, and an insulating film 104 is formed on the conductive film 102. Next, the insulating film 104 is formed on the driving circuit section. An oxide semiconductor film 105 is formed on the insulating film 104 in the pixel portion. A film 108 is formed.

[0124] The conductive film 102 can be formed by a sputtering method, a vacuum deposition method, a pulsed laser deposition (PLD) method, A conductive film is formed using a thermal CVD method or the like, and a mask is formed on the conductive film by a lithography process. After forming the insulating film, etching is performed to form the insulating film.

[0125] In addition, a tungsten film can be formed as a conductive film using a film formation device that uses ALD. In this case, WF6 gas and B2H6 gas are introduced repeatedly in sequence to obtain the initial tungsten content. A tungsten film is formed, and then WF6 gas and H2 gas are introduced simultaneously to form a tungsten film. It should be noted that SiH4 gas may be used instead of B2H6 gas.

[0126] The conductive film 102 may be formed by electrolytic plating, printing, inkjet printing, or the like instead of the above-mentioned method. It may be formed by a tubing method or the like.

[0127] Here, a tungsten film having a thickness of 100 nm is deposited by sputtering as the conductive film 102. It is formed using

[0128] The insulating film 104 can be formed by a method such as sputtering, CVD, evaporation, or pulsed laser deposition (PLD). ) method, printing method, coating method, etc. After forming the film, oxygen can be added to the insulating film to form the insulating film 104. The oxygen added to the insulating film can be oxygen radicals, oxygen atoms, oxygen atomic ions, or oxygen molecular ions. The doping method includes ion doping, ion implantation, plasma treatment, etc. Furthermore, after forming a film that suppresses oxygen desorption on the insulating film, the insulating film is Oxygen may be added to the membrane.

[0129] In addition, the substrate placed in the evacuated processing chamber of the plasma CVD device is heated to 180°C or higher. The temperature is kept at 280°C or below, or 200°C to 240°C, and the raw material gas is introduced into the processing chamber. The pressure in the treatment room should be between 100 Pa and 250 Pa, or between 100 Pa and 200 Pa. The electrode in the processing chamber is set to 0.17 W / cm 2 More than 0.5W / cm 2 Below, again is 0.25W / cm 2 More than 0.35W / cm 2 Under the following conditions for supplying high frequency power: A silicon oxide film or a silicon oxynitride film capable of releasing oxygen by heat treatment is used as an insulating film. It can be formed as a veneer 104.

[0130] Here, the insulating film 104 is formed by stacking the insulating film 104a and the insulating film 104b. In addition, a silicon nitride film having a thickness of 100 nm was formed as the insulating film 104a by using a plasma CVD method. Then, a silicon oxynitride film having a thickness of 300 nm is formed as the insulating film 104b by plasma CVD. It is formed using

[0131] A method for forming the oxide semiconductor films 105 and 108 will be described below. Sputtering method, coating method, pulsed laser deposition method, laser ablation method, thermal CV The oxide semiconductor film is formed by a method such as D. Next, heat treatment is performed to form the oxide semiconductor film contained in the insulating film 104. Next, the oxide semiconductor film is subjected to a lithography process to transfer oxygen thereto. After forming a mask, part of the oxide semiconductor film is etched using the mask. As a result, oxide semiconductor films 105 and 108 can be formed as shown in FIG. After that, the mask is removed. After the layers 105 and 108 are formed, a heat treatment may be performed.

[0132] Alternatively, the oxide semiconductor films 105 and 108 may be formed by a printing method, so that the oxide semiconductor films 105 and 108 may be formed by element separation. The oxide semiconductor films 105 and 108 can be formed directly.

[0133] When an oxide semiconductor film is formed by a sputtering method, a power source for generating plasma is used. The device may be an RF power supply device, an AC power supply device, a DC power supply device, or the like. The CAAC-OS film can be formed by using an AC power supply or a DC power supply. In addition, the oxide semiconductor film is formed by a sputtering method using an RF power supply. In addition, oxide semiconductor films are formed by sputtering using an AC power supply or a DC power supply. This is preferable because it results in a uniform distribution of the film thickness, the film composition, or the crystallinity.

[0134] The sputtering gas is a rare gas (typically argon), oxygen, or a mixture of rare gas and oxygen. In the case of a mixture of rare gas and oxygen, the ratio of the rare gas to the oxygen gas is A higher ratio is preferred.

[0135] The target may be appropriately selected depending on the composition of the oxide semiconductor film to be formed. .

[0136] Note that when the oxide semiconductor film is formed by, for example, a sputtering method, The temperature is set to 150°C or higher and 750°C or lower, or 150°C or higher and 450°C or lower, or 200°C or higher and 3 The oxide semiconductor film is formed at a temperature of 50° C. or less to form a CAAC-OS film. Furthermore, by setting the substrate temperature to 25° C. or higher and lower than 150° C., a microcrystalline oxide semiconductor A film can be formed.

[0137] In addition, in order to form a CAAC-OS film described later, the following conditions are preferably applied: It's nice.

[0138] By suppressing the inclusion of impurities during film formation, it is possible to prevent the crystal state from being destroyed by impurities. For example, the concentration of impurities (hydrogen, water, carbon dioxide, nitrogen, etc.) present in the film formation chamber can be In addition, the impurity concentration in the deposition gas can be reduced. A deposition gas having a temperature of -80°C or lower or -100°C or lower is used.

[0139] In addition, by increasing the oxygen ratio in the deposition gas and optimizing the power, plasma damage during deposition can be reduced. The oxygen ratio in the film forming gas is preferably 30% by volume or more, or 100% by volume. Let's say.

[0140] After the oxide semiconductor film is formed, heat treatment is performed to dehydrogenate or The temperature of the heat treatment is typically 150°C or higher and lower than the substrate distortion point, or The temperature is 250°C or higher and 450°C or lower, or 300°C or higher and 450°C or lower.

[0141] Heat treatment is carried out using rare gases such as helium, neon, argon, xenon, krypton, or nitrogen. It is carried out in an inert gas atmosphere containing oxygen, or after heating in an inert gas atmosphere, it is heated in an oxygen atmosphere. It is to be noted that the inert atmosphere and oxygen atmosphere must not contain hydrogen, water, etc. The treatment time is preferably from 3 minutes to 24 hours.

[0142] The heat treatment can be carried out using an electric furnace, an RTA device, or the like. Therefore, heat treatment can be performed at a temperature above the strain point of the substrate for a short period of time. The processing time can be reduced.

[0143] The oxide semiconductor film is formed while being heated, and after the oxide semiconductor film is formed, By performing heat treatment, the oxide semiconductor film is The hydrogen concentration is 5×10 19 atoms / cm 3 or less, or 1 x 10 19 atoms / cm 3 Below, 5 x 10 18 atoms / cm 3 or less, or 1 x 10 18 atoms / cm 3 Below Below, or 5x10 17 atoms / cm 3 or less, or 1 x 10 16 atoms / cm 3 Below It can be below.

[0144] Oxide semiconductor films, such as InGaZnO, are formed using a deposition system that uses ALD. X (X>0) When forming a film, In(CH3)3 gas and O3 gas are introduced in sequence and repeatedly to form InO Then, Ga(CH3)3 gas and O3 gas are introduced simultaneously to form a GaO layer. Then, Zn(CH3)2 and O3 gas are introduced simultaneously to form a ZnO layer. The order of these layers is not limited to this example. Also, by mixing these gases, the InGaO2 layer and mixed compound layers such as InZnO2 layer, GaInO layer, ZnInO layer, and GaZnO layer. It is also possible to use H2O gas bubbled with an inert gas such as Ar instead of O3 gas. However, it is preferable to use O3 gas that does not contain H. In(CH3) In place of the gas In(C2H5)3, gas Ga(CH3)3 may be used. Alternatively, Ga(C2H5)3 gas may be used instead of Zn(CH3)2 gas. Zn(C2H5)2 gas may be used instead.

[0145] Here, an oxide semiconductor film having a thickness of 35 nm is formed by a sputtering method. Heat treatment is performed to move oxygen contained in the insulating film 104 to the oxide semiconductor film. A mask is formed over the oxide semiconductor film, and part of the oxide semiconductor film is selectively etched. In this way, the oxide semiconductor films 105 and 108 are formed. An In-Ga-Zn oxide film with a Ga:Zn ratio of 1:1:1.2 is formed.

[0146] The heat treatment should be performed at a temperature between 350°C and 650°C, or between 450°C and 600°C. By doing so, the CAAC conversion rate described below will be between 60% and 100%, or between 80% and 100%. %, or 90% or more and less than 100%, or 95% or more and 98% or less In addition, it is possible to obtain an oxide semiconductor film in which the contents of hydrogen, water, and the like are reduced. That is, it is possible to form an oxide semiconductor film having a low impurity concentration and a low density of defect states. It is possible.

[0147] Next, as shown in FIG. 5B, a film was formed on the insulating film 104 and the oxide semiconductor films 105 and 108. An insulating film 115 is formed. Next, conductive films 119 and 120 are formed over the insulating film 115.

[0148] When a low-resistance material is used for the conductive films 119 and 120, for example, a low-resistance material is used for the oxide semiconductor film. If the material is mixed in, the electrical characteristics of the transistor may be deteriorated. By forming the insulating film 115 before forming the conductive films 119 and 120, the oxide semiconductor film 1 Since the channel regions of the gate electrodes 105 and 108 are not in contact with the conductive films 119 and 120, the current This makes it possible to suppress the amount of fluctuation in electrical characteristics, typically the threshold voltage.

[0149] The insulating film 115 is formed of a silicon oxide film or a silicon oxynitride film by using a CVD method. In this case, the source gas may be a deposition gas containing silicon and an oxidizing gas. Representative examples of deposition gases containing silicon include silane, disilane, and the like. Examples of oxidizing gases include silane, trisilane, and fluorinated silane. Examples of oxidizing gases include oxygen, ozone, and monoxide. Examples include dinitrogen and nitrogen dioxide.

[0150] In addition, the insulating film 115 is formed by mixing an oxidizing gas with a deposition gas that is 20 times or more and 100 times or more. The pressure in the processing chamber is set to less than 100 Pa, or 50 Pa or less. By using a CVD method with a thickness of 0.1 or less, a silicon oxynitride film with a small amount of defects can be formed. This can be done.

[0151] In addition, the substrate placed in the evacuated processing chamber of the plasma CVD device is heated to 280°C or higher. The temperature is kept at 400°C or less, and the raw material gas is introduced into the processing chamber to reduce the pressure in the processing chamber to 20 Pa or less. The pressure in the processing chamber is set to 250 Pa or less, and more preferably 100 Pa or more and 250 Pa or less. Depending on the conditions under which high frequency power is supplied to the electrodes, a dense oxide film is formed as the insulating film 115. A silicon film or a silicon oxynitride film can be formed.

[0152] The insulating film 115 may be formed by a plasma CVD method using microwaves. Microwaves refer to the frequency range from 300MHz to 300GHz. The electron temperature is low and the electron energy is small. Also, the electron acceleration is low for the supplied power. The proportion of the ionized gas used for dissociation and ionization of molecules is small, so that it can be used for dissociation and ionization of more molecules. This allows for the excitation of high density plasma. The insulating film 115 can be formed with less defects due to less plasma damage to the surface and deposits. can be done.

[0153] The insulating film 115 can be formed by a CVD method using organic silane gas. The organic silane gases include ethyl silicate (TEOS: chemical formula Si(OC2H5)4), Tetramethylsilane (TMS: chemical formula Si(CH3)4), tetramethylcyclotetrasilane Octamethylcyclotetrasiloxane (TMCTS), Octamethylcyclotetrasiloxane (OMCTS), Hexa Methyldisilazane (HMDS), triethoxysilane (SiH(OC2H5)3), tri Silicon-containing compounds such as dimethylaminosilane (SiH(N(CH3)2)3) are used. By using the CVD method with organic silane gas, it is possible to obtain insulating films with high coating properties. A film 115 can be formed.

[0154] When a gallium oxide film is formed as the insulating film 115, it is formed by MOCVD. It is possible.

[0155] The insulating film 115 is formed by oxidizing a film using a thermal CVD method such as an MOCVD method or an ALD method. When forming a hafnium film, a liquid containing a solvent and a hafnium precursor compound (hafnium Alkoxide solution, typically tetrakisdimethylamidohafnium (TDMAH) Two types of gases are used: the source gas vaporized from and ozone (O3) as an oxidizing agent. The chemical formula for tetrakisdimethylamidohafnium is Hf[N(CH3)2]4. Other liquid materials include tetrakis(ethylmethylamido)hafnium.

[0156] The insulating film 115 is formed by oxidizing a film using a thermal CVD method such as an MOCVD method or an ALD method. When forming an aluminum film, a liquid containing a solvent and an aluminum precursor compound (trimethylsilylsilane) is used. The raw material gas is vaporized methylaluminum (TMA) and 2H2O as an oxidizer. The chemical formula for trimethylaluminum is Al(CH3)3. Other liquid materials include tris(dimethylamido)aluminum and triisobutyl Aluminum, Aluminum tris(2,2,6,6-tetramethyl-3,5-heptane) By forming it using the ALD method, it is possible to achieve high coverage and a thin film thickness. An insulating film 115 can be formed.

[0157] The insulating film 115 is formed by oxidizing a film using a thermal CVD method such as an MOCVD method or an ALD method. When forming a silicon film, hexachlorodisilane is adsorbed onto the surface to be formed, and the adsorbed material Removes chlorine and provides radicals of oxidizing gases (O2, nitrous oxide) to absorb and react with it.

[0158] Here, the insulating film 115 is a 100 nm thick oxynitride silicon film formed by plasma CVD. Form a polymer membrane.

[0159] In addition, a conductive film that will later become the conductive films 119 and 120 is formed here, and lithography is performed on the conductive film. After forming masks 122 and 123 by a lithography process, the conductive film is etched to form conductive The conductive films 119 and 120 are formed.

[0160] The conductive films 119 and 120 may be formed by electrolytic plating, printing, ink jet printing, or the like instead of the above-mentioned method. It may also be formed by an ink jet method or the like.

[0161] Next, as shown in FIG. 6(A), the insulating film 115 is removed while the masks 122 and 123 remain. Etching is performed to form insulating films 116 and 117.

[0162] Next, as shown in FIG. 6B, the oxide semiconductor film 122 is removed while the masks 122 and 123 are left. An impurity element 125 is added to the oxide semiconductor film 105 and 108. The impurity element is added to the region not covered by the gate electrodes 122 and 123. The addition of 25 causes oxygen vacancies in the oxide semiconductor film.

[0163] After removing the masks 122 and 123, an impurity element 125 is added to the oxide semiconductor film. A film having a thickness that allows the impurity to be removed is formed, typically a nitride insulating film, an oxide insulating film, or the like. The element 125 may be added to the oxide semiconductor film. The thickness that can be added to the film is 0.1 nm to 50 nm, or 1 nm to 10 nm or less.

[0164] The impurity element 125 can be added by ion doping, ion implantation, plasma In the case of plasma treatment, the plasma is heated in a gas atmosphere containing the impurity element to be added. By generating a plasma and performing a plasma treatment, impurity elements can be added. The plasma generating device may be a dry etching device or a plasma CVD device. A high density plasma CVD apparatus or the like can be used. In this case, the substrate is placed on the cathode side of the parallel plate electrodes, and a bias is applied to the substrate 101 side. The RF power may be supplied in such a manner that the power density is, for example, 0.1 W / cm 2 More than 2W / cm 2 As a result, the oxide semiconductor films 105 and 108 The amount of the impurity element added can be increased, and the oxide semiconductor films 105 and 108 This allows for the formation of more oxygen vacancies.

[0165] The source gases for the impurity element 125 are B2H6, PH3, CH4, N2, and NH3 , AlH3, AlCl3, SiH4, Si2H6, F2, HF, H2 and one or more of the rare gases Alternatively, B2H6, PH3, N2, NH3, A diluted with rare gases can be used. One or more of IH3, AlCl3, F2, HF, and H2 can be used. Dilution with a noble gas of B2H6, PH3, N2, NH3, AlH3, AlCl3, F2, HF and H2 By adding one or more impurity elements 125 to the oxide semiconductor films 105 and 108, Gases and hydrogen, boron, carbon, nitrogen, fluorine, aluminum, silicon, phosphorus and chlorine One or more of these can be added to the oxide semiconductor films 105 and 108 at the same time.

[0166] Alternatively, after adding a rare gas to the oxide semiconductor films 105 and 108, BH, PH, or CH 4, N2, NH3, AlH3, AlCl3, SiH4, Si2H6, F2, HF and H2 One or more of the above may be added to the oxide semiconductor films 105 and 108.

[0167] or B2H6, PH3, CH4, N2, NH3, AlH3, AlCl3, SiH4, After adding one or more of Si2H6, F2, HF, and H2 to the oxide semiconductor films 105 and 108, A rare gas may be added to the oxide semiconductor films 105 and 108.

[0168] The addition of the impurity element 125 is controlled by appropriately setting implantation conditions such as acceleration voltage and dose amount. For example, when adding argon by ion implantation, the acceleration voltage is 10 kV, The amount of deviation is 1×10 13 ions / cm 2 More than 1×10 16 ions / cm 2 If we do the following, For example, 1×10 14 ions / cm 2 In addition, phosphorus can be implanted by ion implantation. When adding ions, the acceleration voltage is 30 kV and the dose is 1 × 10 13 ions / cm 2 Below top 5×10 16 ions / cm 2 For example, 1×10 15 ions / c m 2 This can be done as follows.

[0169] As a result, low-resistance regions 105b and 105c can be formed in the oxide semiconductor film 105. In addition, low-resistance regions 108b and 108c can be formed in the oxide semiconductor film 108. After this, the masks 122 and 123 are removed.

[0170] Note that when the impurity element 125 is added in a state where the conductive films 119 and 120 are exposed, the conductive films Parts of 119 and 120 peel off and adhere to the side surfaces of the insulating films 116 and 117. As a result, the leakage current of the transistor increases. The oxide semiconductor films 105 and 108 are doped with the impurity element 125 while the oxide semiconductor films 119 and 120 are covered with the impurity element 125. By adding the conductive film 119, 120, a part of the conductive film 119, 120 adheres to the side surface of the insulating film 116, 117. After the masks 122 and 123 are removed, the oxide semiconductor film An impurity element 125 may be added to the layers 105 and 108 .

[0171] After that, a heat treatment is performed to further increase the conductivity of the region to which the impurity element 125 is added. The temperature of the heat treatment is typically 150°C or higher and lower than the substrate strain point, or 250°C or higher. or higher and lower than 450°C, or higher and lower than 300°C and lower than 450°C.

[0172] Next, as shown in FIG. 6C, the insulating film 104, the oxide semiconductor films 105 and 108, and the insulating film 106 are An insulating film 126 is formed on the films 116 and 117 and the conductive films 119 and 120 .

[0173] The insulating film 126 can be formed by a sputtering method, a CVD method, a vacuum deposition method, a pulse deposition method, or the like. Laser deposition (PLD) method, etc. Silane and ammonia, or silane and nitrogen A silicon nitride film containing hydrogen is formed by the plasma CVD method using the above as a raw material gas. In addition, by using the plasma CVD method, the oxide semiconductor films 105 and 108 can be formed with a dielectric film. This can give an image, and oxygen vacancies are formed in the oxide semiconductor films 105 and 108. It is possible.

[0174] Since the insulating film 126 contains hydrogen, the oxide semiconductor films 105 and 108 When the region to which the impurity element is added comes into contact with the insulating film 126, the water contained in the insulating film 126 is The impurity element moves to the regions of the oxide semiconductor films 105 and 108 to which the impurity element is added. Since the region to which the impurity element is added contains oxygen vacancies, the oxide semiconductor film 105 , 108 can be formed with low resistance regions.

[0175] Alternatively, instead of the insulating film 126, an aluminum film or an aluminum oxide film is formed. Then, heat treatment is performed to convert oxygen contained in the oxide semiconductor films 105 and 108 into aluminum. The aluminum film or aluminum oxide film reacts with the silicon dioxide film, and the aluminum oxide film is formed as the insulating film 126. The low-resistance regions 105b and 105c of the oxide semiconductor films 105 and 108 are also formed. Oxygen vacancies are formed in the regions 108b and 108c. It is possible to increase the conductivity of 5b, 105c, 108b, and 108c.

[0176] Here, a silicon nitride film having a thickness of 100 nm is formed as the insulating film 126 by plasma CVD. It is formed using.

[0177] After that, a heat treatment is performed to form the low resistance regions 105b, 105c, 108b, and 108c. The temperature of the heat treatment is typically 150° C. or higher but not higher than the substrate distortion point. or 250°C or higher and 450°C or lower, or 300°C or higher and 450°C or lower.

[0178] Next, as shown in FIG. 7A, an insulating film 127 may be formed. By doing so, the conductive films 134, 135, 136, and 137 to be formed later and the conductive film 119 , 120 can be reduced.

[0179] Next, openings 128 and 129 are formed in the insulating films 126 and 127 to expose a part of the low resistance region. After the deposition, conductive films 134, 135, 136, and 137 are formed. It is preferable to form 62 (see FIG. 7(B)).

[0180] The conductive films 134, 135, 136, and 137 are formed by the same method as the conductive films 119 and 120. The nitride insulating film 162 can be formed by a sputtering method, a CVD method, or the like. It can be formed using

[0181] Through the above steps, the transistors 100a and 100b can be manufactured.

[0182] <Method 2 for manufacturing semiconductor device> Next, a method for manufacturing the transistors 100c and 100d shown in FIG. 3 will be described.

[0183] In the step of forming the oxide semiconductor film shown in FIG. 5A, first, On 104, if the atomic ratio of metal elements is In:M:Zn=x1:y1:z1, 、 x1 / y1 is an In-M-Zn oxide (where M is Mg, Al, Ti, or G) that is greater than 1 and less than 6. The oxide semiconductor film 10 is formed by using a target (Y, Zr, La, Ce, Nd, or Hf). Form 5.

[0184] Next, on the insulating film 104 of the pixel portion, the atomic ratio of metal elements is In:M:Zn=x2:y2 If you set it to :z2 、 x2 / y2 is 1 / 6 or more and 1 or less. In-M-Zn oxide (M is Mg, Al, Ti, Ga, Y, Zr, La, Ce, Nd, or Hf) target Then, the oxide semiconductor film 108 is formed.

[0185] After that, the transistor 100c is fabricated by the same steps as those shown in FIGS. 5(B), 6, and 7. 100d can be produced.

[0186] The transistor described in this embodiment has a function as a source electrode and a drain electrode. Since the conductive film having the function of a gate electrode does not overlap with the conductive film having the function of a gate electrode, the parasitic capacitance is reduced. The transistor described in this embodiment has a large on-state current. Since it is possible to form a stable low resistance region, the on-current is improved and the transistor Variations in the electrical characteristics of the transistors are reduced.

[0187] The configurations and methods described in this embodiment may be different from the configurations and methods described in other embodiments. can be used in appropriate combination.

[0188] (Embodiment 2) In this embodiment mode, one mode of a semiconductor device and a manufacturing method thereof will be described with reference to FIGS. This will be explained using:

[0189] <Configuration 1 of semiconductor device> 8 and 9 show a top-gate structure as an example of a transistor included in a semiconductor device. Here, a display device will be described as an example of a semiconductor device. In addition, the structure of a transistor provided in each of a driver circuit portion and a pixel portion of a display device will be described. The display device described in this embodiment has a transistor structure in a driver circuit portion and a pixel portion. The transistors included in the driver circuit section have a dual gate structure, and the pixel section The transistors included in the figure have a single gate structure.

[0190] In FIG. 8, a transistor 100o provided in a driver circuit portion and a transistor 100b provided in a pixel portion are shown. 9 shows a top view of transistors 100o and 100p, and FIG. 9 shows cross-sectional views of transistors 100o and 100p. FIG. 8A is a top view of the transistor 100o, and FIG. 8B is a top view of the transistor 100p. 9(A) is a cross-sectional view taken along the dashed line AB in FIG. 8(A), and FIG. 8(B) is a cross-sectional view taken along the dashed line AB in FIG. 9(B) is a cross-sectional view of the cross section between the dashed lines CD and G in FIG. 8B is a cross-sectional view taken along the dashed line IJ in FIG. 8B.

[0191] The transistor 100o shown in FIG. 9 includes a conductive film 102 over a substrate 101 and a The insulating film 104 on the conductive film 102, the multilayer film 107 on the insulating film 104, and the multilayer film 107 and a conductive film 119 overlapping the multilayer film 107 via the insulating film 116. The transistor 100o has the same structure as the transistor 100a described in Embodiment 1 except that it is made of an oxide semiconductor. The film 105 is a multilayer film 107. Here, the multilayer film 107 will be described in detail. Further, the detailed description of the same configuration as that shown in the first embodiment will be given in the transistor of the first embodiment. The explanation of the star 100a can be used.

[0192] The multilayer film 107 includes a channel region 107a overlapping the conductive film 102 and the conductive film 119, and a channel region 107b overlapping the conductive film 102 and the conductive film 119. The channel region 107a is sandwiched between low resistance regions 107b and 107c. The region 107a is a channel region 105a in contact with the insulating film 104 and a region 107b in contact with the channel region 105a. The low resistance region 107b has a channel region 106a in contact with the insulating film 104. The resistive region 105b and the low-resistive region 106b are in contact with the low-resistive region 105b. The region 107c is a low-resistance region 105c that is in contact with the insulating film 104 and a low-resistance region 105c that is in contact with the insulating film 104. Although not shown in FIG. 9, the channel region 105a, The oxide semiconductor film having the low-resistance region 105b and the low-resistance region 105c is 105, a channel region 106a, a low resistance region 106b, and a low resistance region 106c. The oxide semiconductor film having the oxide semiconductor layer is referred to as the oxide semiconductor film 106. A compound semiconductor film 105 and an oxide semiconductor film 106 are stacked.

[0193] In the top view, the oxide semiconductor film 106 is formed on the outer side of the edge of the oxide semiconductor film 105. That is, the oxide semiconductor film 106 is formed on the upper surface of the oxide semiconductor film 105 and the Cover the sides.

[0194] In the transistor 100o, the insulating film in contact with the low-resistance regions 107b and 107c An insulating film 126 may be provided on the insulating film 126. In the openings 128 and 129 of the film 126 and the insulating film 127, the low resistance region of the multilayer film 107 Conductive films 134 and 135 are provided in contact with 107b and 107c.

[0195] The transistor 100p includes a multilayer film 110 on an insulating film 104 formed on a substrate 101. The insulating film 117 is in contact with the multilayer film 110, and the conductive film 117 is overlapped with the multilayer film 110 via the insulating film 117. The transistor 100p has the same structure as the transistor 100 described in Embodiment 1. 0b is formed into a multilayer film 110. In addition, detailed description of the same configuration as that shown in the first embodiment will be given in the second embodiment. The description of the transistor 100b of the first embodiment can be used.

[0196] The multilayer film 110 includes a channel region 110a overlapping the conductive film 120 and a channel region 110b. The channel region 110a has low resistance regions 110b and 110c sandwiching the insulating layer 110a. A channel region 108a in contact with the insulating film 104 and a channel region 108b in contact with the channel region 108a The low resistance region 110b has a low resistance region 108b in contact with the insulating film 104. The low resistance region 110c has a low resistance region 109b in contact with the low resistance region 108b. The low resistance region 108c contacting the insulating film 104 and the low resistance region 108c contacting the low resistance region 108c are Although not shown in FIG. 9, the channel region 108a and the low-resistance region 108 The oxide semiconductor film including the low-resistance region 108b and the low-resistance region 108c is referred to as the oxide semiconductor film 108. The oxide semiconductor has a channel region 109a, a low resistance region 109b, and a low resistance region 109c. The multilayer film 110 is an oxide semiconductor film 108. and an oxide semiconductor film 109 are stacked.

[0197] Note that in the top view, the oxide semiconductor film 109 is formed on the outside of the edge of the oxide semiconductor film 108. That is, the oxide semiconductor film 109 is formed on the upper surface of the oxide semiconductor film 108 and the Cover the sides.

[0198] In the transistor 100p, the insulating film in contact with the low-resistance regions 110b and 110c An insulating film 126 may be provided on the insulating film 126. In the openings 130 and 131 of the film 126 and the insulating film 127, the low resistance region of the multilayer film 110 Conductive films 136 and 137 are provided in contact with 110b and 110c.

[0199] In the multilayer film 107, in the region that does not overlap with the conductive film 119, an element that forms oxygen vacancies is In addition, in the multilayer film 110, in the region that does not overlap with the conductive film 120, there is an oxygen deficiency. The element that forms oxygen vacancies includes the impurity element shown in Embodiment 1. elements can be used.

[0200] The insulating film 126 is a film containing hydrogen, and is typically a nitride insulating film. Examples of the insulating film include a silicon nitride film and an aluminum nitride film. When the insulating film 126 comes into contact with the multilayer films 107 and 110, hydrogen contained in the insulating film 126 is absorbed by the multilayer films 107 and 110. As a result, in the region of the multilayer films 107 and 110 that contacts the insulating film 126, In this case, hydrogen is contained in large amounts.

[0201] When an impurity element is added to an oxide semiconductor, the metal element and oxygen in the oxide semiconductor bond together. The oxygen vacancies are formed by adding impurity elements. When hydrogen is added to a semiconductor, hydrogen enters the oxygen vacancy site, and a donor level is created near the conduction band. As a result, an oxide conductor can be formed. Therefore, the oxide conductor has light-transmitting properties.

[0202] Oxide conductors are degenerate semiconductors, and the conduction band edge and the Fermi level are coincident or nearly coincident. Therefore, it is assumed that the oxide conductor film and the source and drain electrodes The contact with the functional conductive film is an ohmic contact, and the oxide conductive film and the source electrode and The contact resistance with the conductive film that functions as the drain electrode can be reduced.

[0203] That is, the low resistance regions 107b, 107c, 110b, and 110c are the source and drain regions. It functions as a transcription region.

[0204] The conductive films 134, 135, 136, and 137 are made of tungsten, titanium, or aluminum. Conductive materials that easily bond with oxygen, such as copper, molybdenum, chromium, or tantalum alone or in alloys When the conductive film 134 or 135 is formed using a material, oxygen contained in the oxide semiconductor film and the conductive film 134 or 135 The conductive materials contained in 136 and 137 are bonded to each other, and oxygen deficiency occurs in the multilayer films 107 and 110. In addition, the multilayer films 107 and 110 are provided with conductive films 134, 135, 136, and 137. As a result, some of the constituent elements of the conductive material forming the conductive film 13 may be mixed in. 4, 135, 136, 137 and the low resistance regions 107b, 107c, 110b, 110 The region c has increased conductivity and functions as a source region and a drain region.

[0205] The impurity element is a rare gas element, and the multilayer films 107 and 110 are formed by a sputtering method. When the low resistance regions 107b, 107c, 110b, and 110c are formed, the low resistance regions 107b, 107c, 110b, and 110c each contain a rare gas element. and low resistance regions 107b and 107c compared to the channel regions 107a and 110a. , 110b, and 110c have higher concentrations of rare gas elements. When formed by sputtering, rare gas is used as the sputtering gas, so The layers 107 and 110 contain rare gases, and the low resistance regions 107b, 107c, and In 10b and 110c, a rare gas is intentionally added to form oxygen vacancies. In the low resistance regions 107b, 107c, 110b, and 110c, The channel regions 107a and 110a may be doped with a different rare gas element.

[0206] Furthermore, since the low resistance regions 107b and 107c are in contact with the insulating film 126, the channel region 10 The low resistance regions 110b and 110c have a higher concentration of hydrogen than the insulating film 12. 6, the concentration of hydrogen is higher than that of the channel region 110a.

[0207] In the low resistance regions 107b, 107c, 110b, and 110c, secondary ion mass spectrometry is performed. The concentration of hydrogen obtained by 19 atoms / cm 3 or more, or 1 x 10 20 atoms / cm 3 or more, or 5 x 10 20 atoms / cm 3 It can be more than The hydrogen concentrations obtained by secondary ion mass spectrometry of the channel regions 107a and 110a are Degrees are 5 x 10 19 atoms / cm 3 or less, or 1 x 10 19 atoms / cm 3 below , or 5 x 10 18 atoms / cm 3 or less, or 1 x 10 18 atoms / cm 3 below , or 5 x 10 17 atoms / cm 3 or less, or 1 x 1016 atoms / cm 3 below It can be said that:

[0208] Compared to the channel regions 107a and 110a, the low resistance regions 107b, 107c, and 110 In the case of 110b and 110c, the hydrogen concentration is high and the amount of oxygen deficiency is large due to the addition of rare gas elements. Therefore, the conductivity is high and they function as source and drain regions. is the resistivity of the low resistance regions 107b, 107c, 110b, and 110c, and is 1×10 -3 Ωcm or more 1×10 4 Less than Ωcm or 1×10 -3 Ωcm or more 1×10 -1 Less than Ωcm It can be said that:

[0209] In the low resistance regions 107b, 107c, 110b, and 110c, the amount of hydrogen is If the amount of the vacancies is equal to or less than that of the oxygen vacancies, hydrogen is easily captured by the oxygen vacancies, and the channel region 107a As a result, it is possible to manufacture a transistor with normally-off characteristics. This can be done.

[0210] In addition, in the low resistance regions 107b, 107c, 110b, and 110c, the amount of hydrogen is compared When the amount of oxygen vacancies is large, the amount of hydrogen is controlled to reduce the resistance of the low-resistance regions 107b and 107 Alternatively, the carrier density of the low resistance region 10 can be controlled. In 7b, 107c, 110b, and 110c, the amount of hydrogen is large compared to the amount of oxygen vacancy. In this case, the amount of oxygen vacancies is controlled to form low resistance regions 107b, 107c, 110b, and 111c. The carrier density of the low-resistance regions 107b, 107c, and 108c can be controlled. The carrier density of 10b and 110c is 5×1018 pieces / cm 3 or more, or 1 x 10 19 pieces / cm 3 or more, or 1 x 10 20 pieces / cm 3 By doing so, the channel region and the source electrode and between the conductive films 134, 135, 136, and 137 that function as drain electrodes. It is possible to manufacture a transistor with low resistance and large on-state current.

[0211] The transistors 100o and 100p shown in this embodiment each have a channel region and a source electrode. and between the conductive films 134, 135, 136, and 137 that function as drain electrodes. , and the low resistance regions 107b, 107c, 110b, and 110c provide low parasitic resistance.

[0212] In the transistors 100o and 100p, the conductive film 119, the conductive film 134, and the conductive film 1 Therefore, the parasitic capacitance between the conductive film 119 and the conductive films 134 and 135 is In addition, the conductive film 120 and the conductive films 136 and 137 overlap each other. Therefore, the parasitic capacitance between the conductive film 120 and the conductive films 136 and 137 is reduced. As a result, when a large-area substrate is used as the substrate 101, the conductive film 119 , 120, 134, 135, 136, and 137. do.

[0213] Therefore, the transistors 100o and 100p have a large on-state current and a low field-effect mobility. expensive.

[0214] In addition, in the transistor 100o, the conductive film 119 is used as a mask to The conductive film 120 is added to the layer film 107. In other words, the impurity element is added to the multilayer film 110 to form a self-aligned low resistance region. A region can be formed.

[0215] In addition, in the transistor 100o, the conductive film 102 and the conductive film 119 are not connected to each other. By applying different potentials to the transistors 100o, the threshold voltage of the transistor 100o can be controlled. Alternatively, as shown in FIG. 9B, the conductive film 102 and the conductive film 119 are connected to each other. By applying the same potential, the initial characteristic variations are reduced, and -Temperature) stress test degradation suppression and at different drain voltages In addition, in the multilayer film 107, As shown in FIG. 9B, the conductive film 102 and the conductive film 119 are connected to each other, so that the conductive film 102 Since the electric field of 119 affects the top and side surfaces of the multilayer film 107, the entire multilayer film 107 That is, the area where the carriers flow becomes larger in the film thickness direction. As a result, the on-current of the transistor 100o increases. The transistor 100o has a large on-state current and a high field-effect mobility. As a result, the area occupied by the drive circuit section can be reduced. Small, narrowly framed displays can be made.

[0216] In addition, in the display device, the channel lengths of the transistors included in the driver circuit portion and the pixel portion are It may be different.

[0217] Typically, the channel length of the transistor 100 included in the driving circuit section is set to less than 2.5 μm. On the other hand, the thickness of the pixel portion can be set to 1.45 μm or more and 2.2 μm or less. The channel length of the transistor 100p is 2.5 μm or more, or 2.5 μm or more and 20 μm or less. It can be said that:

[0218] The channel length of the transistor 100o included in the driving circuit section is set to less than 2.5 μm, preferably By making the thickness between 1.45 μm and 2.2 μm, the transistor 10 included in the pixel portion can be Compared to 0p, it is possible to increase the field effect mobility and increase the on-current. As a result, a driving circuit section capable of high speed operation can be manufactured. A display device with a circuit portion that occupies a small area can be manufactured.

[0219] In addition, by using a transistor with high field effect mobility, It is possible to form a demultiplexer circuit in the signal line driver circuit. A circuit is a circuit that distributes one input signal to one of multiple outputs, so It is possible to reduce the number of input terminals. For example, if one pixel has a red sub-pixel and a green sub-pixel, By providing a demultiplexer circuit in each pixel, Since the input signal input to each sub-pixel can be distributed by a demultiplexer circuit, This makes it possible to reduce the number of input terminals to one-third.

[0220] In addition, by providing a transistor 100p with a large on-state current in a pixel portion, a large display device can be realized. Even if the number of wires increases in devices and high-definition display devices, the signal delay in each wire can be reduced. This makes it possible to suppress display unevenness.

[0221] From the above, it is possible to manufacture a driver circuit section using transistors capable of high-speed operation. In addition, by manufacturing the pixel portion using transistors with low parasitic capacitance and parasitic resistance, high precision can be achieved. Therefore, a thin display device capable of double-speed driving can be manufactured.

[0222] The configuration shown in FIG. 9 will be described in detail below.

[0223] In the transistor 100o, the oxide semiconductor film 105 and the oxide semiconductor film 106 included in the multilayer film 107 are The compound semiconductor film 106 has a different composition. The oxide semiconductor film 108 and the oxide semiconductor film 109 included in the present invention have different compositions. The oxide semiconductor film 105 included in the multilayer film 107 and the oxide semiconductor film 110 included in the multilayer film 110 The oxide semiconductor film 106 and the multilayer film 108 have the same composition. The oxide semiconductor film 109 included in the oxide semiconductor film 110 has the same composition. The oxide semiconductor film 105 and the oxide semiconductor film 108 are formed at the same time. The oxide semiconductor film 109 is formed at the same time.

[0224] In the transistor 100o, a channel is formed in the oxide semiconductor film 105. In the transistor 100p, a channel is formed in the oxide semiconductor film 108. The films 105 and 108 are thicker than the oxide semiconductor films 106 and 109 .

[0225] The thickness of the oxide semiconductor films 105 and 108 is 3 nm to 200 nm, or 10 nm to 10 nm. The oxide semiconductor film 106, 1 The thickness of 09 is 3 nm or more and 200 nm or less, or 3 nm or more and 100 nm or less, or 1 The thickness is 0 nm or more and 100 nm or less, or 30 nm or more and 50 nm or less.

[0226] The oxide semiconductor films 105, 106, 108, and 109 are made of a metal oxide containing at least In. Typically, In-Ga oxide, In-M-Zn oxide (M is Mg, Al , Ti, Ga, Y, Zr, La, Ce, Nd, or Hf). The oxide semiconductor films 105 and 108 contain more indium than the semiconductor films 106 and 109. By this, the transistors 100o and 100p each form a buried channel. This will be explained in detail in the section on band structure below. To reduce the fluctuation of the threshold voltage of each of the transistors 100o and 100p. This makes it possible to reduce the channel resistance.

[0227] The oxide semiconductor films 105 and 108 are made of M (M is Mg, Al, Ti, Ga, Y, Zr, L The oxide semiconductor film 105 has a large atomic ratio of In to the number of atoms of other elements (In, Ce, Nd, or Hf). 108 is In-M-Zn oxide (M is Mg, Al, Ti, Ga, Y, Zr, La, Ce) , Nd, or Hf), the temperature used to form the oxide semiconductor films 105 and 108 is In the get, if the atomic ratio of metal elements is In:M:Zn=x1:y1:z1, then x It is preferable that 1 / y1 is greater than 1 and not greater than 6. The number of atoms of the metal element in the target Typical ratios are In:M:Zn=2:1:1.5 and In:M:Zn=2:1:2. 3, In:M:Zn=2:1:3, In:M:Zn=3:1:2, In:M:Zn=3: 1:3, In:M:Zn=3:1:4, etc.

[0228] The oxide semiconductor films 106 and 109 are made of M (M is Mg, Al, Ti, Ga, Y, Zr, L The atomic ratio of In to the number of elements (a, Ce, Nd, or Hf) is the same or smaller. The films 106 and 109 are In-M-Zn oxides (where M is Mg, Al, Ti, Ga, Y, Zr, In the case of La, Ce, Nd, or Hf, the oxide semiconductor films 106 and 109 are formed using In the target used, the atomic ratio of the metal elements is In:M:Zn=x2:y2:z2. Then, it is preferable that x2 / y2 is 1 / 6 or more and 1 or less. Also, z2 / y2 is It is preferable that z2 / y2 is 1 / 3 or more and 6 or less, and more preferably 1 or more and 6 or less. When the concentration is 6 or more, CAAC-OS films are formed as the oxide semiconductor films 106 and 109. A typical example of the atomic ratio of the metal elements in the target is In:M:Zn= 1:1:1, In:M:Zn=1:1:1.2, In:M:Zn=1:3:2, In:M :Zn=1:3:4, In:M:Zn=1:3:6, In:M:Zn=1:3:8, In :M:Zn=1:4:4, In:M:Zn=1:4:5, In:M:Zn=1:4:6, In:M:Zn=1:4:7, In:M:Zn=1:4:8, In:M:Zn=1:5: 5, In:M:Zn=1:5:6, In:M:Zn=1:5:7, In:M:Zn=1: 5:8, In:M:Zn=1:6:8, etc.

[0229] The transistors 100o and 100p are made of M (M is Mg, Al, Ti, Ga, Y, Zr, an oxide semiconductor film 105 having a high atomic ratio of In to La, Ce, Nd, or Hf; Since a channel is formed in 108, the field effect mobility is high. degree is 10cm 2 / Vs is larger than 60cm2 / Vs less than 15cm 2 / Vs or later Upper 50cm 2 However, when light is irradiated, the transistor is in the off state. Therefore, in the case of the transistor 100o, the current in the conductive film 1 The channel region 107a of the multilayer film 107 is surrounded by the conductive film 119, thereby The transistor has high mobility and low current in the off state. By providing a light-shielding film that overlaps with 100p, the field-effect mobility is high and the As a result, a transistor capable of high-speed operation can be fabricated. It is possible.

[0230] In addition, in the multilayer films 107 and 110, silicon, carbon, and aluminum, which are elements of Group 14, are used. It is preferable to reduce the concentrations of alkali metals or alkaline earth metals, nitrogen, impurity elements, etc. Typically, silicon, which is one of the Group 14 elements shown in the oxide semiconductor films 105 and 108, is used. The concentrations are similar to those of carbon, alkali metals or alkaline earth metals, nitrogen, impurity elements, etc. By doing so, the transistors 100o and 100p have electrical characteristics in which the threshold voltage is positive. (also called normally-off characteristics).

[0231] The multilayer films 107 and 110, particularly the channel regions 107a and 110a, are As in the case of the panel regions 105a and 108a, the impurity elements are reduced, and thus the oxide semiconductor film The carrier density can be reduced.

[0232] The multilayer films 107 and 110 are oxide semiconductor films with low impurity concentrations and low defect state densities. By using the above, a transistor with better electrical characteristics can be manufactured. Here, a low impurity concentration and a low defect level density (few oxygen vacancies) are referred to as high purity pure silicon. High purity intrinsic or substantially high purity intrinsic oxide semiconductors The body may be able to have a low carrier density due to the scarcity of carrier sources. Therefore, a transistor in which a channel region is formed in the oxide semiconductor film has a threshold voltage The electrical characteristics tend to be positive (also called normally-off characteristics). An intrinsic or substantially highly purified intrinsic oxide semiconductor film has a low density of defect states, and therefore, The level density may also be lower. The off-state current of the semiconductor film is extremely small, and the voltage between the source and drain electrodes (drain When the voltage is in the range of 1V to 10V, the off-state current is Below the limit, i.e., 1×10 -13 A or less. A transistor in which a channel region is formed in the oxide semiconductor film has small fluctuations in electrical characteristics. This may result in a highly reliable transistor.

[0233] The oxide semiconductor films 106 and 109 have the same crystal structure as the oxide semiconductor films 105 and 108. The structure can be appropriately used.

[0234] In the multilayer film 107, the channel region 107a and the low resistance regions 107b and 107 In the multilayer film 110, the crystallinity of the channel region 110a may be different from that of the channel region 110a. The crystallinity of the low-resistance regions 110b and 110c may differ. When impurity elements are added to the regions 107b, 107c, 110b, and 110c, the low resistance region 1 Damage occurs to 07b, 107c, 110b, and 110c, resulting in a decrease in crystallinity. This is the case.

[0235] <Configuration 2 of semiconductor device> Next, another configuration of the semiconductor device will be described with reference to FIG. a transistor 100q formed in the pixel portion, a transistor 100r formed in the pixel portion, In each case, conductive films 119 and 120 functioning as gate electrodes have a stacked structure. 10A shows the structure of the transistors 100q and 100q in the channel length direction. 10(B) shows a cross-sectional view of the transistors 100q and 100r in the channel width direction. 1. The transistor 100q is the same as the transistor 100 described in Embodiment 1. The oxide semiconductor film 105 in FIG. 1 is formed into a multilayer film 107. For a detailed description of the same configuration, the description of the transistor 100e of the first embodiment can be cited. The transistor 100r can be formed using the oxide semiconductor of the transistor 100f described in Embodiment 1. The structure is such that the conductor film 108 is made into a multilayer film 110. The details of the structure are the same as those shown in the first embodiment. For a detailed description, the description of the transistor 100f in the first embodiment can be cited.

[0236] The conductive film 119 includes a conductive film 119a in contact with the insulating film 116 and a conductive film 119b in contact with the insulating film 116. The conductive film 119a has an edge portion outside the edge portion of the conductive film 119b. That is, the conductive film 119a protrudes from the conductive film 119b.

[0237] In addition, the end of the insulating film 116 is located outside the end of the conductive film 119a. The insulating film 116 has a shape that protrudes from the conductive film 119a. The sides may be curved.

[0238] The conductive film 120 includes a conductive film 120a in contact with the insulating film 117 and a conductive film 120b in contact with the insulating film 117. The conductive film 120a has an end portion outside the end portion of the conductive film 120b. That is, the conductive film 120a has a shape that protrudes from the conductive film 120b.

[0239] In addition, the end of the insulating film 117 is located outside the end of the conductive film 120a. The insulating film 117 has a shape that protrudes from the conductive film 120a. The sides may be curved.

[0240] As shown in the transistors 100q and 100r, the conductive film 11 having the shape shown in FIG. 9, 120 and insulating films 116, 117, the drain region of the transistor Therefore, the threshold voltage of the transistor caused by the electric field in the drain region can be reduced. This makes it possible to reduce deterioration such as fluctuations in the value voltage.

[0241] <Band structure> Next, as a typical example of the transistor described in this embodiment, the transistors shown in FIGS. 8 and 9 will be described. The band structure in an arbitrary cross section of the star 100o will be explained.

[0242] FIG. 15A shows an OP including the channel region of the transistor 100o shown in FIG. The band structure in the cross section is shown. The energy gap is slightly larger than that of the insulating film 104a, the insulating film 104b, and the insulating film 104c. The insulating film 116 is thicker than the channel region 106a and the channel region 105a. The energy gap is large. The Fermi levels (denoted as Ef) of the insulating films 104a, 104b, and 116 .) is assumed to be approximately equal to the intrinsic Fermi level (denoted as Ei). The work functions of the film 102 and the conductive film 119 are set to be approximately the same as the Fermi level.

[0243] When the gate voltage is set to be equal to or higher than the threshold voltage of the transistor, the channel region 106a and the transistor The electrons flow into the channel region 105a due to the difference in the energy of the bottom of the conduction band between the In other words, it is assumed that electrons are embedded in the channel region 105a. The energy at the bottom of the conduction band is denoted as Ec, and the energy at the top of the valence band is denoted as - is written as Ev.

[0244] Therefore, the transistor according to one aspect of the present invention can prevent interface scattering due to electron implantation. Therefore, the transistor according to one embodiment of the present invention has a reduced channel resistance. The resistance is small.

[0245] Next, in FIG. 15B, the source region or drain of the transistor 100o shown in FIG. The band structure in the QR cross section including the low resistance region 105b is shown. The low resistance regions 105b, 105c, 106b, and 106c are in a degenerated state. , 106b, 106c, the Fermi level Ef is approximately equal to the energy Ec of the bottom of the conduction band. In the low-resistance region 105b, the energy of the bottom of the conduction band is The Fermi level of the low-resistance region 106b is set to be approximately equal to the Fermi level of the low-resistance region 105a. The energy at the edge is set to be approximately the same as the Fermi level of the channel region 106a. The same applies to 5c and low resistance region 106c.

[0246] At this time, the energy barrier between the conductive film 134 and the low-resistance region 106b is sufficiently small. Therefore, an ohmic contact is formed between the low resistance region 106b and the low resistance region 105b. Similarly, the conductive film 135 and the low resistance region 106c form an energy barrier. The wall is small enough to provide ohmic contact. Therefore, the conductive film 134 and the conductive film 135 are in ohmic contact with each other. Electrons are smoothly exchanged between the channel region 106a and the channel region 105a. It can be seen that this is done in

[0247] As described above, the transistor according to one embodiment of the present invention has a source electrode and a drain electrode. The electrons are smoothly exchanged between the gate electrode and the channel region, and the channel resistance is kept low. It is a small transistor, i.e., a transistor with excellent switching characteristics. We can see that.

[0248] <Method 1 for manufacturing semiconductor device> Next, a method for manufacturing the transistors 100o and 100p shown in FIGS. 11 to 13 will be used to explain this.

[0249] Films (insulating films, oxide semiconductor films, conductive films, etc.) that constitute the transistors 100o and 100p The method for forming a film constituting a transistor described in Embodiment 1 can be used as appropriate. .

[0250] As shown in FIG. 11(A), an insulating film 161 is formed on a substrate 101 in the same manner as in the first embodiment. A conductive film 102 is formed on the insulating film 161, and an insulating film 104 is formed on the conductive film 102. Next, an oxide semiconductor film 105 is formed over the insulating film 104 in the driver circuit portion, and an insulating film 105 is formed over the pixel portion. The oxide semiconductor film 108 is formed over the insulating film 104 in the driver circuit portion. An oxide semiconductor film 106 is formed on the oxide semiconductor film 105, and the insulating film 104 and the oxide semiconductor film 106 are formed on the pixel portion. An oxide semiconductor film 109 is formed over the oxide semiconductor film 108 .

[0251] Here, a tungsten film having a thickness of 100 nm is deposited by sputtering as the conductive film 102. It is formed using

[0252] Here, the insulating film 104 is formed by stacking the insulating film 104a and the insulating film 104b. In addition, a silicon nitride film having a thickness of 100 nm was formed as the insulating film 104a by using a plasma CVD method. Then, a silicon oxynitride film having a thickness of 300 nm is formed as the insulating film 104b by plasma CVD. It is formed using

[0253] The oxide semiconductor films 105, 106, 108, and 109 are formed using the oxide semiconductor It can be formed in the same manner as the films 105 and 108 .

[0254] Further, as in Embodiment 1, after the oxide semiconductor film is formed, heat treatment is performed. The semiconductor film may be dehydrogenated or dehydrated.

[0255] Here, an oxide semiconductor film having a thickness of 35 nm is formed by a sputtering method. A mask is formed over the oxide semiconductor film, and part of the oxide semiconductor film is selectively etched. In this way, the oxide semiconductor films 105 and 108 are formed. An In-Ga-Zn oxide film with an In:Ga:Zn ratio of 3:1:2 is formed.

[0256] Next, in the driver circuit portion, an oxide semiconductor film 106 is formed over the oxide semiconductor film 105. In the pixel portion, the oxide semiconductor film 109 is formed over the oxide semiconductor film 108. The oxide semiconductor film 105 and the oxide semiconductor film 106 are stacked in this order to form a multilayer film 107. In addition, a multilayer film 110 in which the oxide semiconductor film 108 and the oxide semiconductor film 109 are stacked in this order is formed. Form.

[0257] In this step, the oxide semiconductor film 105 is formed on the oxide semiconductor film 106 so as to cover the top surface and the side surface of the oxide semiconductor film 105. By forming the conductor film 106, it will function as a source electrode and a drain electrode later. In the step of forming the conductive film, the oxide semiconductor film 105 is not etched. The oxide semiconductor film 109 is formed so as to cover the top surface and the side surface of the conductive film 108. In the process of forming a conductive film that functions as a source electrode and a drain electrode, The conductive film 108 is not etched. As a result, the channel width of the transistor is This is preferable because it can reduce fluctuations in the lengths of the oxide semiconductor films 105 and 108 .

[0258] Here, a 20-nm-thick oxide semiconductor film is formed by sputtering. A mask is formed over the oxide semiconductor film, and part of the oxide semiconductor film is selectively etched. In this way, the oxide semiconductor films 106 and 109 are formed. As 109, an In-Ga-Zn oxide film with In:Ga:Zn=1:1:1.2 is formed. do.

[0259] Next, heat treatment is performed to move oxygen contained in the insulating film 104 to the oxide semiconductor film. Note that the heat treatment was performed after forming the oxide semiconductor films 106 and 109. After that, the oxide semiconductor film is etched to form oxide semiconductor films 106 and 109. You may go before.

[0260] The heat treatment should be performed at a temperature between 350°C and 650°C, or between 450°C and 600°C. By doing so, the CAAC conversion rate described below will be between 60% and 100%, or between 80% and 100%. %, or 90% or more and less than 100%, or 95% or more and 98% or less In addition, it is possible to obtain an oxide semiconductor film in which the contents of hydrogen, water, and the like are reduced. That is, it is possible to form an oxide semiconductor film having a low impurity concentration and a low density of defect states. It is possible.

[0261] Next, as shown in FIG. 11(B), the insulating film 104 and the multilayer films 107 and 110 are coated with the As in the first embodiment, the insulating film 115 is formed. Next, as in the first embodiment, the insulating film 115 Conductive films 119 and 120 are formed thereon.

[0262] Here, the insulating film 115 is a 100 nm thick oxynitride silicon film formed by plasma CVD. Form a polymer membrane.

[0263] In this case, masks 122 and 123 are formed on the conductive film by a lithography process. Thereafter, the conductive film is etched to form conductive films 119 and 120 .

[0264] Next, as shown in FIG. 12(A), masks 122 and 123 are left as in the first embodiment. While this is being done, the insulating film 115 is etched to form insulating films 116 and 117 .

[0265] Next, as shown in FIG. 12(B), similarly to the first embodiment, the masks 122 and 123 are left. While the multilayer films 107 and 110 are in this state, an impurity element 125 is added to the multilayer films 107 and 110. 7, 110, impurity elements are added to the regions not covered by the masks 122, 123. The addition of the impurity element 125 causes oxygen vacancies in the multilayer films 107 and 110. can be.

[0266] As a result, low resistance regions 107b and 107c can be formed in the multilayer film 107. In addition, low resistance regions 110b and 110c can be formed in the multilayer film 110. The masks 122 and 123 are removed.

[0267] Note that when the impurity element 125 is added in a state where the conductive films 119 and 120 are exposed, the conductive films Parts of 119 and 120 peel off and adhere to the side surfaces of the insulating films 116 and 117. As a result, the leakage current of the transistor increases. The multilayer films 107 and 110 are doped with an impurity element 125 while the conductive films 119 and 120 are covered. By doing so, it is possible to prevent parts of the conductive films 119 and 120 from adhering to the side surfaces of the insulating films 116 and 117. After removing the masks 122 and 123, the multilayer films 107 and 110 An impurity element 125 may be added.

[0268] Thereafter, in the same manner as in the first embodiment, a heat treatment is carried out to remove the impurity element 125 from the region. The conductivity of the region may be further increased.

[0269] Next, as shown in FIG. 12(C), the insulating film 104 and the multilayer film 10 7, 110, the insulating film 126 is formed on the insulating films 116, 117 and the conductive films 119, 120. .

[0270] Here, a silicon nitride film having a thickness of 100 nm is formed as the insulating film 126 by plasma CVD. It is formed using.

[0271] Thereafter, similarly to the first embodiment, a heat treatment is performed to form low resistance regions 107b, 107c, The conductivity of 110b and 110c may be further increased. The temperature of the heat treatment is typically 1 50°C or higher but lower than the substrate distortion point, or 250°C or higher but lower than 450°C, or 300°C or higher but lower than 450°C The following applies.

[0272] Next, as shown in FIG. 13(A), an insulating film 127 is formed in the same manner as in the first embodiment. By forming the insulating film 127, the conductive films 134, 135, and 136 to be formed later can be formed. , 137 and the conductive films 119 and 120 can be reduced.

[0273] Next, similarly to the first embodiment, openings are formed in the insulating films 126 and 127, and the low resistance region After exposing a portion, conductive films 134, 135, 136, and 137 are formed. It is preferable to form an insulating film 162 (see FIG. 13(B)).

[0274] The conductive films 134, 135, 136, and 137 are formed by the same method as the conductive films 119 and 120. The nitride insulating film 162 can be formed by a sputtering method, a CVD method, or the like. It can be formed using

[0275] Through the above steps, the transistors 100o and 100p can be manufactured.

[0276] The transistor described in this embodiment has a function as a source electrode and a drain electrode. Since the conductive film having the function of a gate electrode does not overlap with the conductive film having the function of a gate electrode, the parasitic capacitance is reduced. The transistor described in this embodiment has a large on-state current. Since it is possible to form a stable low resistance region, the on-current is improved and the transistor Variations in the electrical characteristics of the transistors are reduced.

[0277] The configurations and methods described in this embodiment may be different from the configurations and methods described in other embodiments. can be used in appropriate combination.

[0278] (Embodiment 3) Here, modifications of the transistor described in the above embodiment will be described with reference to FIGS. 22 to 26. First, the transistor described in Embodiment 1 A modification will be described. As a transistor, a transistor formed in a pixel portion is used. The transistor shown in FIG. 16 is formed on an insulating film 104 on a substrate 101. an oxide semiconductor film 108 formed on the insulating film 117 and an insulating film 117 in contact with the oxide semiconductor film 108; The conductive film 120 is in contact with the insulating film 117 and overlaps with the oxide semiconductor film 108.

[0279] The insulating film 126 in contact with the oxide semiconductor film 108 and the insulating film 126 The insulating film 126 and the insulating film 127 are provided in the transistor. In the portions 130 and 131, the conductive films 136 and 137 in contact with the oxide semiconductor film 108 are The conductive films 136 and 137 are provided on the source and drain electrodes. It functions as an electrode.

[0280] In the transistor illustrated in FIG. 16A, the oxide semiconductor film 108 is A channel region 108a formed in the overlapping region and a non-transparent region sandwiching the channel region 108a. The conductive film 13 has regions containing pure elements, i.e., low resistance regions 108b and 108c. 6, 137 contact the low resistance regions 108b, 108c.

[0281] Alternatively, as in the transistor illustrated in FIG. 16B, in the oxide semiconductor film 108, The regions 108d and 108e in contact with the conductive films 136 and 137 are not doped with impurity elements. In this case, the regions 108d and 108e in contact with the conductive films 136 and 137 and the channel Between the insulating layer 108a and the insulating layer 108b, there are regions containing impurity elements, i.e., low-resistance regions 108b and 108c. In addition, the regions 108d and 108e are formed when a voltage is applied to the conductive films 136 and 137. Since the SiO 2 layer has conductivity, it functions as a source region and a drain region.

[0282] Note that the transistor shown in FIG. 16B is formed by forming the conductive films 136 and 137. The film 120 and the conductive films 136 and 137 are used as masks to add an impurity element to the oxide semiconductor film. By doing so, it can be formed.

[0283] The conductive film 120 may have a tapered end. The angle θ1 between the surface where the film 117 and the conductive film 120 come into contact and the side surface of the conductive film 120 is 90°. or 10° or more and 85° or less, or 15° or more and 85° or less, or 30° or more and 8 It may be 5° or less, or 45° to 85°, or 60° to 85°. The angle θ1 is set to less than 90°, or 10° or more and 85° or less, or 15° or more and 85° or less, Or 30° to 85°, or 45° to 85°, or 60° to 85° By setting the insulating film 117 and the conductive film 120 at the lower side, the insulating film 126 can be effectively covered with the insulating film 126. It is possible to increase it.

[0284] Next, a modified example of the low resistance regions 108b and 108c will be described. 16A to 16F are enlarged views of the oxide semiconductor film 108 and its vicinity shown in FIG. 16A. Here, the channel length L is the distance between the pair of low resistance regions.

[0285] As shown in FIG. 16C, in the cross section in the channel length direction, the channel region 108 The boundary between the low-resistance regions 108a and 108c is formed by the insulating film 117. That is, in the top view, the channel region 108a and the The boundaries of the low-resistance regions 108b and 108c coincide or approximately coincide with the ends of the conductive film 120. is doing.

[0286] Alternatively, as shown in FIG. 16(D), in the cross section in the channel length direction, The region 108a has a region that does not overlap with the edge of the conductive film 120. This region is called an offset region. The length of the offset region in the channel length direction is L off and indicate If there are multiple offset areas, the length of one offset area is L off Toi Uh. L off is included in the channel length L. Also, L off is less than 20% of the channel length L or less than 10%, or less than 5%, or less than 2%.

[0287] Alternatively, as shown in FIG. 16(E), in the cross section in the channel length direction, The insulating film 117 is formed between the conductive film 120 and the insulating film 117. The overlap region in the channel length direction functions as an overlap region. The length of the loop area is L ov L ov is less than 20% or less than 10% of the channel length L , or less than 5%, or less than 2%.

[0288] Alternatively, as shown in FIG. 16(F), in the cross section in the channel length direction, The low-resistance region 108f is located between the low-resistance region 108a and the low-resistance region 108b. The low resistance region 108g is located between the low resistance region 108a and the low resistance region 108c. The low-resistance regions 108g have a lower concentration of impurity elements and a higher resistivity than the low-resistance regions 108b and 108c. Here, the low resistance regions 108f and 108g overlap the insulating film 117, but the insulating film 117 and It may overlap with the conductive film 120 .

[0289] 16C to 16F, the transistor shown in FIG. As explained above, the transistor shown in FIG. 16(B) can also be used in the same manner as in FIGS. The structure of F) can be applied as appropriate.

[0290] In the transistor shown in FIG. 17A, the edge of the insulating film 117 is closer to the edge of the conductive film 120 than the edge of the insulating film 117. That is, the insulating film 117 has a shape that protrudes from the conductive film 120. Since the insulating film 126 can be separated from the channel region 108a, This can prevent the contained nitrogen, hydrogen, etc. from entering the channel region 108a.

[0291] In the transistor shown in FIG. 17B, the insulating film 117 and the conductive film 120 have tapered shapes. The angles of the tapered portions are different. The angle θ1 between the surface of the conductive film 120 and the side surface of the oxide semiconductor film 108 and the insulating film 11 The angle θ2 formed by the surface where the insulating film 117 is in contact with the surface of the insulating film 117 is different from the angle θ2 formed by the surface where the insulating film 117 is in contact with the surface of the insulating film 117. It may be less than 0°, or between 30° and 85°, or between 45° and 70°. For example, if the angle θ2 is smaller than the angle θ1, the coverage of the insulating film 126 is improved. If θ2 is greater than the angle θ1, the transistor can be miniaturized.

[0292] Next, modifications of the low resistance regions 108b and 108c will be described with reference to FIGS. 17(C) to 17(F). 17(C) to 17(F) are the same as those in the oxidation step shown in FIG. 1 is an enlarged view of the vicinity of the compound semiconductor film 108.

[0293] As shown in FIG. 17C, in the cross section in the channel length direction, the channel region 108 The boundary between the low-resistance regions 108a and 108c is formed by the end of the conductive film 120 and the insulating film 117. That is, in the top view, the channel region 108a The boundaries of the low resistance regions 108b and 108c are aligned or substantially aligned with the ends of the conductive film 120. It is.

[0294] Alternatively, as shown in FIG. 17(D), in the cross section in the channel length direction, The region 108a has a region that does not overlap with the conductive film 120. This region is called an offset region. That is, in the top view, the ends of the low resistance regions 108b and 108c are insulating. The edge of the conductive film 120 is aligned with or substantially aligned with the edge of the insulating film 117 and does not overlap with the edge of the conductive film 120 .

[0295] Alternatively, as shown in FIG. 17(E), in the cross section in the channel length direction, The insulating film 117 is formed between the conductive film 120 and the insulating film 117. The overlapping region is called an overlapping region. The end of 8c overlaps with the conductive film 120.

[0296] Alternatively, as shown in FIG. 17(F), in the cross section in the channel length direction, The low-resistance region 108f is located between the low-resistance region 108a and the low-resistance region 108b. The low resistance region 108g is located between the low resistance region 108a and the low resistance region 108c. The low-resistance regions 108g have a lower concentration of impurity elements and a higher resistivity than the low-resistance regions 108b and 108c. Here, the low resistance regions 108f and 108g overlap the insulating film 117, but the insulating film 117 and It may overlap with the conductive film 120 .

[0297] 17C to 17F, the transistor shown in FIG. As explained above, the transistor shown in FIG. 17(B) can also be used in the same manner as in FIGS. The structure of F) can be applied as appropriate.

[0298] In the transistor shown in FIG. 18A, the conductive film 120 has a stacked structure, and the insulating film 117 The conductive film 120a is in contact with the conductive film 120b, and the conductive film 120b is in contact with the conductive film 120a. The end of the conductive film 120a is located outside the end of the conductive film 120b. 0a has a shape that protrudes from the conductive film 120b.

[0299] Next, a modified example of the low resistance regions 108b and 108c will be described. 18(E), 19(A), and 19(B) show the oxide semiconductor shown in FIG. 1 is an enlarged view of the vicinity of the membrane 108. FIG.

[0300] As shown in FIG. 18B, in the cross section in the channel length direction, the channel region 108 a and the boundary between the low resistance regions 108b and 108c are formed by the conductive film 120a included in the conductive film 120. The end of the insulating film 117 is aligned or substantially aligned with the end of the insulating film 117. The boundary between the channel region 108a and the low resistance regions 108b and 108c is located at the edge of the conductive film 120. It matches or nearly matches the part.

[0301] Alternatively, as shown in FIG. 18(C), in the cross section in the channel length direction, The region 108a has a region that does not overlap with the conductive film 120. This region is called an offset region. That is, in the top view, the ends of the low resistance regions 108b and 108c are conductive. It does not overlap with the end of the conductive film 120.

[0302] Alternatively, as shown in FIG. 18(D), in the cross section in the channel length direction, The conductive film 108b and 108c have regions that overlap with the conductive film 120, here the conductive film 120a. This region is called an overlap region. The end of 08c overlaps with the conductive film 120a.

[0303] Alternatively, as shown in FIG. 18(E), in the cross section in the channel length direction, The low-resistance region 108f is located between the low-resistance region 108a and the low-resistance region 108b. The low-resistance region 108g is located between the low-resistance region 108a and the low-resistance region 108c. 0a and added to the low resistance regions 108f and 108g. The region 108g has a lower concentration of impurity elements and a higher resistivity than the low-resistivity regions 108b and 108c. Here, the low resistance regions 108f and 108g overlap the conductive film 120a, but It may overlap the film 120a and the conductive film 120b.

[0304] Alternatively, as shown in FIG. 19A, in the cross section in the channel length direction, the conductive film 12 The end of the conductive film 120a is located outside the end of the conductive film 120b, and the conductive film 120a is tapered. That is, the surface where the insulating film 117 and the conductive film 120a are in contact with each other and the surface where the conductive film 120a is in contact with each other may have a shape similar to that of the insulating film 117. The angle formed by the side of a is less than 90°, or 5° to 45°, or 5° to 30° It may be below.

[0305] Furthermore, the end of the insulating film 117 may be located outside the end of the conductive film 120a.

[0306] Furthermore, the side surfaces of the insulating film 117 may be curved.

[0307] Furthermore, the insulating film 117 may have a tapered shape. The angle formed by the surface where the insulating film 117 contacts with the side surface of the insulating film 117 is less than 90°, preferably It may be greater than or equal to 30° and less than 90°.

[0308] The oxide semiconductor film 108 shown in FIG. 19A includes a channel region 108a and a channel region Low resistance regions 108f and 108g sandwiching 108a, and low resistance regions 108f and 108g sandwiching The low resistance regions 108h and 108i and the low resistance regions 10 The impurity element passes through the insulating film 117 and the conductive film 120a. Since the low resistance regions 108f, 108g, 108h, and 108i are doped, the low resistance regions 10 8f, 108g, 108h, and 108i are regions where impurity elements are removed from the low-resistance regions 108b and 108c. The concentration of is low and the resistivity is high.

[0309] The oxide semiconductor film 108 shown in FIG. 19B includes a channel region 108a and a channel region Low resistance regions 108h and 108i sandwiching 108a, and low resistance regions 108h and 108i sandwiching The impurity elements pass through the insulating film 117 to form the low resistance regions 108b and 108c. Since the low resistance regions 108h and 108i are doped with The concentration of impurity elements is lower and the resistivity is higher than in the regions 108b and 108c.

[0310] In the channel length direction, the channel region 108a overlaps with the conductive film 120b. The resistance regions 108f and 108g are formed by the conductive film 120a protruding outside the conductive film 120b. The overlapping low resistance regions 108h and 108i are insulating films that protrude outside the conductive film 120a. The low resistance regions 108b and 108c are provided outside the insulating film 117.

[0311] As shown in FIG. 18E and FIG. 19, the oxide semiconductor film 108 has a low-resistance region 108b, Low-resistivity regions 108f and 108g have a lower impurity element concentration and higher resistivity than 108c. By providing 108h and 108i, the electric field in the drain region can be alleviated. Reduces degradation such as fluctuations in the threshold voltage of transistors caused by the electric field in the drain region It is possible.

[0312] The transistor shown in FIG. 20A has a channel region 108a, a low-resistance region 108b, The oxide semiconductor film 108 includes the low-resistance regions 108b and 108c. The low-resistance region 108b has a thickness smaller than that of the low-resistance region 108a. 8c has a region whose thickness is 0.1 nm or more and 5 nm or less smaller than that of the channel region 108a. .

[0313] The transistor shown in FIG. 20B includes the insulating film 104 and the insulating film 105 in contact with the oxide semiconductor film 108. At least one of the insulating film 104 and the insulating film 104b has a multilayer structure. The insulating film 104b is in contact with the insulating film 104a and the oxide semiconductor film 108. The insulating film 117 includes an insulating film 117a in contact with the oxide semiconductor film 108 and an insulating film 117b in contact with the insulating film 117a. The insulating film 117b is formed on the insulating film 117a.

[0314] The insulating films 104b and 117a are oxide insulating films with low nitrogen oxide content and low defect level density. It can be formed using an oxide insulating film with a low nitrogen oxide content and a low density of defect levels. Specifically, the density of the defect level between 4.6 eV and 8 eV from the vacuum level is In other words, the density of defect levels caused by nitrogen oxides is low. As an oxide insulating film with low nitrogen oxide content and low density of defect states, , a silicon oxynitride film that releases a small amount of nitrogen oxide, or a silicon oxynitride film that releases a small amount of nitrogen oxide An aluminum oxynitride film or the like can be used. The average film thickness is 0.1 nm or more and 50 nm or less, or 0.5 nm or more and 10 nm or less.

[0315] The silicon oxynitride film, which emits a small amount of nitrogen oxides, was analyzed by thermal desorption spectroscopy (TD). In Thermal Desorption Spectroscopy (S), This membrane releases more ammonia than nitrogen oxides, and typically releases ammonia. Output is 1 x 10 18 pieces / cm 3 5x10 or more 19 pieces / cm 3 The following is the case. The amount of a release of a film is determined when the surface temperature of the film is 50°C or higher and 650°C or lower, preferably 50°C or higher and 550°C or lower. The amount released by the following heat treatment is assumed.

[0316] The insulating films 104a and 117b are formed using an oxide insulating film that releases oxygen when heated. The insulating films 104a and 117b have an average film thickness of 5 nm or more and 1000 nm or less. m or less, or 10 nm to 500 nm.

[0317] Typical examples of oxide insulating films that release oxygen when heated include silicon oxynitride films and oxide Examples include an aluminum nitride film.

[0318] Nitrogen oxides (NO x , x is 0 or more and 2 or less, preferably 1 or more and 2 or less), typically NO 2 or NO forms a level in the insulating film 104 and the insulating film 117. The level is The nitrogen oxide is formed in the energy gap of the oxide semiconductor film 108. When the insulating films 104 and 117 and the oxide semiconductor film 108 are diffused to the interfaces thereof, the levels are Electrons may be trapped on the 104 and 117 sides. The molecules remain near the interfaces between the insulating films 104 and 117 and the oxide semiconductor film 108. This shifts the threshold voltage of the transistor in the positive direction.

[0319] Nitrogen oxide reacts with ammonia and oxygen during heat treatment. The nitrogen oxides contained in the insulating films 104b and 117a are deposited on the insulating films 104b and 117a during the heat treatment. The nitrogen oxides contained in the insulating films 104a and 117b react with the ammonia contained therein. Therefore, at the interfaces between the insulating films 104 and 117 and the oxide semiconductor film 108, , electrons are less likely to be trapped.

[0320] The insulating films 104b and 117a are made of oxides having a low content of nitrogen oxides and a low density of defect levels. By using an insulating film, it is possible to reduce the shift in the threshold voltage of a transistor. This reduces fluctuations in the electrical characteristics of the transistor.

[0321] The heat treatment in the manufacturing process of a transistor is typically performed at a temperature of 300° C. or higher but below the substrate distortion point. By the heat treatment, the insulating films 104b and 117a are obtained by measuring the ESR at 100K or less. In the spectrum, the first signal with a g value between 2.037 and 2.039, A second signal between 0.001 and 2.003 and a g value between 1.964 and 1.966 The third signal below is observed. The split width of the second and third signals is determined by the X-band ESR measurement. The g value is approximately 5 mT. a second signal with a g-value between 2.001 and 2.003, and a g-value between 1.964 and 1.964 The sum of the spin densities of the third signals that are 1.966 or less is 1×10 18 spins / cm 3 less than 1 × 10 17 spins / cm 3 More than 1×1018 spi ns / cm 3 is less than.

[0322] In addition, the g value is between 2.037 and 2.039 in the ESR spectrum below 100K. The first signal has a g value of 2.001 or more and 2.003 or less, and the second signal has a g value of 1 The third signal, between 0.964 and 1.966, corresponds to the signal caused by nitrogen dioxide. That is, the first signal has a g value of 2.037 or more and 2.039 or less, and the second signal has a g value of 2.001 or more. A second signal with a g value of 2.003 or less and a third signal with a g value of 1.964 or more and 1.966 or less. The smaller the total spin density of the signal, the more nitrogen oxides are contained in the oxide insulating film. It can be said that the amount is small.

[0323] In addition, the heat treatment in the manufacturing process of the transistor is typically performed at temperatures above 300°C and below the substrate distortion point. After heat treatment, the oxide insulating film with less nitrogen oxide and low density of defect levels is SI Measured by MS (Secondary Ion Mass Spectrometry) The nitrogen concentration is 6×10 20 atoms / cm 3 The following is the result.

[0324] The substrate temperature is 220°C or higher, or 280°C or higher, or 350°C or higher, and silane and The plasma CVD method using nitrous oxide and dinitrogen monoxide was used to produce a material with low nitrogen oxide content and low defect level density. By forming an oxide insulating film with a low hardness, a dense film with high hardness can be formed. can be done.

[0325] The transistor illustrated in FIG. 20C includes the oxide semiconductor film 108, the insulating film 117, and a conductive film. An insulating film 141 is provided between the film 120 and the insulating film 126. The insulating film 141 is B) oxide films 104b and 117a, which have a low density of nitrogen oxides and a low density of defect levels. The insulating film can be formed using a nitride insulating film.

[0326] In addition, in the cross section in the channel length direction, the channel region 108a and the low resistance region 10 8b, and the low resistance region 108f is formed between the channel region 108a and the low resistance region 108c. The low resistance regions 108f and 108g are the low resistance region 108 The concentration of impurity elements is lower than that of 108b and 108c, and the resistivity is higher. The insulating film 117 and the insulating film 141 contacting the side surfaces of the conductive film 120 are overlapped with the insulating film 141. The low resistance regions 108f and 108g are formed by insulating film 126 and conductive film 12. May overlap with 0.

[0327] In the transistor illustrated in FIG. 20D, the insulating film 117 is formed in the channel of the oxide semiconductor film 108. The insulating layer 108a is in contact with the low resistance regions 108b and 108c. The film 117 has low resistance regions 108b and 108c compared to the region in contact with the channel region 108a. The film thickness in the area in contact with 8c is thin, typically with an average film thickness of 0.1 nm or more and 50 nm or less. As a result, the oxide film 117 is formed on the insulating film 117. Impurity elements can be added to the semiconductor film 108, and the insulating film 126 can also contain impurity elements. The hydrogen can be transferred to the oxide semiconductor film 108 through the insulating film 117. As a result, low resistance regions 108b and 108c can be formed.

[0328] Furthermore, the insulating film 104 has a multilayer structure of insulating films 104a and 104b, and is heated to remove oxygen. The insulating film 104a is formed using an oxide insulating film that emits nitrogen oxides, and the insulating film 104a has a low nitrogen oxide content and a defect level. The insulating film 104b is formed using an oxide insulating film with a low nitrogen oxide density. The insulating film 117 is formed using an oxide insulating film having a low density of defect states. The oxide semiconductor film 108 is covered with an oxide insulating film having a small amount of oxide and a low density of defect states. As a result, oxygen contained in the insulating film 104a is converted into the oxide semiconductor by heat treatment. The oxygen vacancies contained in the channel region 108a of the oxide semiconductor film 108 are transferred to the film 108. While reducing the capacitance at the interface between the insulating films 104b and 117 and the oxide semiconductor film 108, As a result, the threshold voltage of the transistor can be reduced. It is possible to reduce the shift and the fluctuation of the electrical characteristics of the transistor. Cut.

[0329] Next, modifications of the transistor described in Embodiment 2 will be described with reference to FIGS. 22 to 26. Here, a transistor formed in a pixel portion is used as a typical example of a transistor. The transistor shown in FIG. 22 is formed on an insulating film 104 on a substrate 101. The multilayer film 110 is formed by the above-mentioned method, and the insulating film 117 is in contact with the multilayer film 110. The multilayer film 110 and the conductive film 120 overlap each other.

[0330] In addition, the insulating film 126 in contact with the multilayer film 110 and the insulating film 127 in contact with the insulating film 126 are , are provided in the transistor. Also, an opening 130 in the insulating film 126 and the insulating film 127 , 131, conductive films 136 and 137 in contact with the multilayer film 110 are provided in the transistor. It is being done.

[0331] In the transistor shown in FIG. 22(A), the multilayer film 110 has a region overlapping with the conductive film 120. a channel region 110a formed in the region, and a region including an impurity element In other words, the low resistance regions 110b and 110c are formed by the conductive films 136 and 13 7 contacts the low resistance regions 110b and 110c.

[0332] Alternatively, as in the transistor shown in FIG. 22(B), in the multilayer film 110, the conductive film 1 The regions 110d and 110e in contact with the electrodes 36 and 137 may not be doped with impurity elements. In this case, the regions 110d and 110e in contact with the conductive films 136 and 137 and the channel region 110d and 110e in contact with the conductive films 136 and 137 are Between the first and second electrodes 110a and 110b, there are regions containing impurity elements, i.e., low resistance regions 110b and 110c. When a voltage is applied to the conductive films 136 and 137, the regions 110d and 110e become conductive. , and therefore functions as a source region and a drain region.

[0333] Note that the transistor shown in FIG. 22B is formed by forming the conductive films 136 and 137. The film 120 and the conductive films 136 and 137 are used as masks to add an impurity element to the oxide semiconductor film. By doing so, it can be formed.

[0334] The conductive film 120 may have a tapered end. The angle θ1 between the surface where the film 117 and the conductive film 120 come into contact and the side surface of the conductive film 120 is 90°. or 10° or more and 85° or less, or 15° or more and 85° or less, or 30° or more and 8 It may be 5° or less, or 45° to 85°, or 60° to 85°. The angle θ1 is set to less than 90°, or 10° or more and 85° or less, or 15° or more and 85° or less, Or 30° to 85°, or 45° to 85°, or 60° to 85° By setting the insulating film 117 and the conductive film 120 at the lower side, the insulating film 126 can be effectively covered with the insulating film 126. It is possible to increase it.

[0335] Next, a modified example of the low resistance regions 110b and 110c will be described. 22(F) through 22(F) are enlarged views of the vicinity of the multilayer film 110 shown in FIG. The channel length L is the distance between the pair of low resistance regions.

[0336] As shown in FIG. 22C, in the cross section in the channel length direction, the channel region 110 The boundary between the low-resistance regions 110a and 110c is formed by the insulating film 117. That is, in the top view, the channel region 110a and the The boundaries of the low resistance regions 110b and 110c coincide or approximately coincide with the ends of the conductive film 120. is doing.

[0337] Alternatively, as shown in FIG. 22(D), in the cross section in the channel length direction, The region 110a has a region that does not overlap with the edge of the conductive film 120. This region is called an offset region. The length of the offset region in the channel length direction is L off It is shown as follows. If there are multiple offset areas, the length of one offset area is L off That is said. off is included in the channel length L. Also, L off is less than 20% of the channel length L, or or less than 10%, or less than 5%, or less than 2%.

[0338] Alternatively, as shown in FIG. 22(E), in the cross section in the channel length direction, The insulating film 117 is formed between the conductive film 120 and the insulating film 110b. The overlap region in the channel length direction functions as an overlap region. The length of L ov L ov is less than 20% of the channel length L, or less than 10%, or is less than 5% or less than 2%.

[0339] Alternatively, as shown in FIG. 22(F), in the cross section in the channel length direction, The low-resistance region 110f is located between the low-resistance region 110a and the low-resistance region 110b. The low resistance region 110g is located between the low resistance region 110a and the low resistance region 110c. The low-resistance regions 110g have a lower concentration of impurity elements and a higher resistivity than the low-resistance regions 110b and 110c. Here, the low resistance regions 110f and 110g overlap the insulating film 117, but the insulating film 117 and It may overlap with the conductive film 120 .

[0340] 22C to 22F, the transistor shown in FIG. As explained above, the transistor shown in FIG. 22(B) can also be used in the same manner as in FIGS. The structure of F) can be applied as appropriate.

[0341] In the transistor shown in FIG. 23A, the edge of the insulating film 117 is closer to the edge of the conductive film 120 than the edge of the insulating film 117. That is, the insulating film 117 has a shape that protrudes from the conductive film 120. Since the insulating film 126 can be separated from the channel region 110a, This can prevent the contained nitrogen, hydrogen, etc. from entering the channel region 110a.

[0342] In the transistor shown in FIG. 23B, the insulating film 117 and the conductive film 120 have tapered shapes. The angles of the tapered portions are different. The angle θ1 between the surface of the conductive film 120 and the side surface of the conductive film 120 and the angle θ2 between the surface of the conductive film 120 and the side surface of the conductive film 120 are The angle θ2 formed by the surface of the insulating film 117 and the side surface of the insulating film 117 is different from the angle θ2 formed by the surface of the insulating film 117 and the side surface of the insulating film 117. The angle θ2 is less than 90°. , or may be 30° or more and 85° or less, or 45° or more and 70° or less. When the angle θ2 is smaller than the angle θ1, the coverage of the insulating film 126 is improved. If the angle θ is greater than θ1, the transistor can be miniaturized.

[0343] Next, modifications of the low resistance regions 110b and 110c will be described with reference to FIGS. 23(C) to 23(F). 23(C) to 23(F) are the same as those in the multilayer structure shown in FIG. 23(A). FIG. 1 is an enlarged view of the vicinity of the membrane 110.

[0344] As shown in FIG. 23C, in the cross section in the channel length direction, the channel region 110 The boundary between the low-resistance regions 110a and 110c is formed by the end of the conductive film 120 and the insulating film 117. That is, in the top view, the channel region 110a The boundaries of the low resistance regions 110b and 110c are aligned or substantially aligned with the ends of the conductive film 120. It is.

[0345] Alternatively, as shown in FIG. 23(D), in the cross section in the channel length direction, The region 110a has a region that does not overlap with the conductive film 120. The region is called an offset region. That is, in the top view, the ends of the low resistance regions 110b and 110c are in contact with the insulating film 1. The edge of the conductive film 120 is aligned or approximately aligned with the edge of the conductive film 17 and does not overlap with the edge of the conductive film 120.

[0346] Alternatively, as shown in FIG. 23(E), in the cross section in the channel length direction, The insulating film 117 is formed between the conductive film 120 and the insulating film 110b. The overlapping region is called an overlapping region. The end of Oc overlaps with the conductive film 120.

[0347] Alternatively, as shown in FIG. 23(F), in the cross section in the channel length direction, The low-resistance region 110f is located between the low-resistance region 110a and the low-resistance region 110b. The low resistance region 110g is located between the low resistance region 110a and the low resistance region 110c. The low-resistance regions 110g have a lower concentration of impurity elements and a higher resistivity than the low-resistance regions 110b and 110c. Here, the low resistance regions 110f and 110g overlap the insulating film 117, but the insulating film 117 and It may overlap with the conductive film 120 .

[0348] 23C to 23F, the transistor shown in FIG. As explained above, the transistor shown in FIG. 23(B) can also be used in the same manner as in FIGS. The structure of F) can be applied as appropriate.

[0349] In the transistor shown in FIG. 24A, the conductive film 120 has a stacked structure, and the insulating film 117 The conductive film 120a is in contact with the conductive film 120b, and the conductive film 120b is in contact with the conductive film 120a. The end of the conductive film 120a is located outside the end of the conductive film 120b. 0a has a shape that protrudes from the conductive film 120b.

[0350] Next, modifications of the low resistance regions 110b and 110c will be described. 24(E), 25(A), and 25(B) show the multilayer film 11 shown in FIG. 24(A). This is an enlarged view of the vicinity of 0.

[0351] As shown in FIG. 24B, in the cross section in the channel length direction, the channel region 110 The boundary between the low resistance regions 110a and 110c is formed by the conductive film 120a included in the conductive film 120. The end of the insulating film 117 is aligned or substantially aligned with the end of the insulating film 117. The boundary between the channel region 110a and the low resistance regions 110b and 110c is the edge of the conductive film 120. It matches or nearly matches the part.

[0352] Alternatively, as shown in FIG. 24(C), in the cross section in the channel length direction, The region 110a has a region that does not overlap with the conductive film 120. The region is called an offset region. That is, in the top view, the ends of the low resistance regions 110b and 110c are It does not overlap with the edge of 20.

[0353] Alternatively, as shown in FIG. 24(D), in the cross section in the channel length direction, The regions 110b and 110c have regions that overlap with the conductive film 120, here the conductive film 120a. This region is called an overlap region. The end of 10c overlaps with the conductive film 120a.

[0354] Alternatively, as shown in FIG. 24(E), in the cross section in the channel length direction, The low-resistance region 110f is located between the low-resistance region 110a and the low-resistance region 110b. The low-resistance region 110g is located between the low-resistance region 110a and the low-resistance region 110c. 0a and added to the low resistance regions 110f and 110g. The region 110g has a lower concentration of impurity elements and a higher resistivity than the low-resistivity regions 110b and 110c. Here, the low resistance regions 110f and 110g overlap the conductive film 120a, but It may overlap the film 120a and the conductive film 120b.

[0355] Alternatively, as shown in FIG. 25(A), in the cross section in the channel length direction, the conductive film 12 The end of the conductive film 120a is located outside the end of the conductive film 120b, and the conductive film 120a is tapered. That is, the surface where the insulating film 117 and the conductive film 120a are in contact with each other and the surface where the conductive film 120a is in contact with each other may have a shape similar to that of the insulating film 117. The angle formed by the side of a is less than 90°, or 5° to 45°, or 5° to 30° It may be below.

[0356] Furthermore, the end of the insulating film 117 may be located outside the end of the conductive film 120a.

[0357] Furthermore, the side surfaces of the insulating film 117 may be curved.

[0358] Furthermore, the insulating film 117 may have a tapered shape. The angle between the surface of the insulating film 117 and the side of the insulating film 117 is less than 90°, preferably 30° or more. It may be less than 90° upward.

[0359] The multilayer film 110 shown in FIG. 25(A) has a channel region 110a and a low resistance regions 110f and 110g sandwiching the low resistance regions 110f and 110g The low resistance regions 110h and 110i are sandwiched between the low resistance regions 110b and 110i. The impurity element passes through the insulating film 117 and the conductive film 120a and reaches the low-resistance region 10c. Since the low resistance regions 110f, 110g, 110h, and 110i are doped, The regions 110g, 110h, and 110i have a higher concentration of impurity elements than the low-resistance regions 110b and 110c. low and resistivity is high.

[0360] The multilayer film 110 shown in FIG. 25(B) includes a channel region 110a and a The low resistance areas 110h and 110i are sandwiched between the low resistance areas 110h and 110i. The impurity element passes through the insulating film 117 and reaches the low resistance region 110b and 110c. Since the low resistance regions 110h and 110i are doped with the low resistance region 11 It has a lower concentration of impurity elements and a higher resistivity than 0b and 110c.

[0361] In the channel length direction, the channel region 110a overlaps with the conductive film 120b, and The resistance regions 110f and 110g are formed by the conductive film 120a protruding outside the conductive film 120b. The overlapping low resistance regions 110h and 110i are insulating films that protrude outside the conductive film 120a. The low resistance regions 110b and 110c are provided outside the insulating film 117.

[0362] As shown in FIG. 24(E) and FIG. 25, the multilayer film 110 has low resistance regions 110b and 110c. Therefore, the concentration of impurity elements is low and the resistivity is high in the low resistance regions 110f, 110g, and 110h. , 110i, the electric field in the drain region can be relaxed. It is possible to reduce degradation such as fluctuations in the threshold voltage of transistors caused by the electric field in the region. It is Noh.

[0363] The transistor shown in FIG. 26A includes a channel region 110a and a low-resistance region 110b. The multilayer film 110 includes the low resistance regions 110b and 110c. The low-resistance regions 110b and 110c have a thickness smaller than that of the low-resistance regions 110a. It has a region whose thickness is 0.1 nm or more and 5 nm or less smaller than that of the channel region 110a.

[0364] The transistor shown in FIG. 26(B) has a small number of insulating films 104 and 117 in contact with the multilayer film 110. At least one of them has a multilayer structure. For example, the insulating film 104 includes an insulating film 104a and an insulating film 104b. The insulating film 117 has an insulating film 104a and an insulating film 104b in contact with the multilayer film 110. The insulating film 117a is in contact with the layer film 110, and the insulating film 117b is in contact with the insulating film 117a. do.

[0365] The insulating films 104b and 117a are oxide insulating films with low nitrogen oxide content and low defect level density. It can be formed using a film.

[0366] The transistor shown in FIG. 26C includes a multilayer film 110, an insulating film 117, and a conductive film 120. 26(B) and the insulating film 126. The insulating films 104b and 117a are oxide insulating films with low nitrogen oxide content and low defect level density. It can be formed using a film.

[0367] In addition, in the cross section in the channel length direction, the channel region 110a and the low resistance region 11 0b, and a low resistance region 110f is formed between the channel region 110a and the low resistance region 110c. The low resistance regions 110f and 110g are the low resistance regions 110 The concentration of impurity elements is lower than that of 110c and 110b, and the resistivity is higher. 110f and 110g overlap the insulating film 117 and the insulating film 141 that contacts the side surfaces of the conductive film 120. The low resistance regions 110f and 110g are formed by insulating film 126 and insulating film 14. May overlap with 1.

[0368] In the transistor shown in FIG. 26(D), the insulating film 117 is formed on the channel region 1 of the multilayer film 110. The insulating film 117 contacts the low resistance regions 110a and 110b, 110c. The region in contact with the low resistance regions 110b and 110c is larger than the region in contact with the channel region 110a. The thickness of the region where the film is to be formed is thin, typically with an average thickness of 0.1 nm or more and 50 nm or less, or As a result, the thickness of the multilayer film 110 is 0.5 nm or more and 10 nm or less through the insulating film 117. It is possible to add an impurity element and also to convert hydrogen contained in the insulating film 126 into the insulating film 1 17 to the multilayer film 110. As a result, the low resistance region 110b , 110c can be formed.

[0369] Furthermore, the insulating film 104 has a multilayer structure of insulating films 104a and 104b, and is heated to remove oxygen. The insulating film 104a is formed using an oxide insulating film that emits nitrogen oxides, and the insulating film 104a has a low nitrogen oxide content and a defect level. The insulating film 104b is formed using an oxide insulating film with a low nitrogen oxide density. The insulating film 117 is formed using an oxide insulating film having a low density of defect states. The multilayer film 110 can be covered with an oxide insulating film having a small amount of oxide and a low density of defect levels. As a result, oxygen contained in the insulating film 104a is transferred to the multilayer film 110 by the heat treatment. In this way, the oxygen vacancies in the channel region 110a of the multilayer film 110 are reduced, and the insulating film 10 4b, 117 and the multilayer film 110. As a result, it is possible to reduce the shift in the threshold voltage of the transistor. This can reduce fluctuations in the electrical characteristics of the transistor.

[0370] (Fourth embodiment) Here, a film for suppressing oxygen desorption is formed on the insulating film, and then oxygen is introduced into the insulating film through the film. The method of adding the element will be explained with reference to FIGS. 21(A) and 21(B).

[0371] As shown in FIG. 21(A), an insulating film 104 is formed on a substrate 101.

[0372] Next, a film 145 for suppressing oxygen desorption is formed on the insulating film 104. Next, the film 145 Oxygen 146 is added to the insulating film 104 via the insulating film 104 .

[0373] The film 145 for suppressing oxygen desorption may be made of aluminum, chromium, tantalum, titanium, molybdenum, or the like. a metal element selected from iridium, nickel, iron, cobalt, and tungsten; Alloys containing the above elements, alloys combining the above metal elements, alloys containing the above metal elements metal nitrides containing the above-mentioned metal elements, metal oxides containing the above-mentioned metal elements, metal nitrides containing the above-mentioned metal elements, The insulating film is formed using a conductive material such as an oxide.

[0374] The thickness of the film 145 for suppressing oxygen desorption is 1 nm or more and 20 nm or less, or 2 nm or more and 1 It can be 0 nm or less.

[0375] The method of adding oxygen 146 to the insulating film 104 through the film 145 is ion doping. The methods include a laser beam irradiation method, an ion implantation method, and a plasma treatment method. By exposing the film 145 to the plasma generated in the above state, the amount of oxygen added to the insulating film 104 is increased. As an example of an apparatus for performing such a plasma treatment, There is a locking device.

[0376] By providing the film 145 on the insulating film 104 and adding oxygen, the film 145 is Therefore, the insulating film 104 functions as a protective film that prevents oxygen from being released from the insulating film 104. More oxygen can be added.

[0377] In addition, when oxygen is introduced in plasma treatment, the oxygen is excited by microwaves to form high-density oxygen. By generating oxygen plasma, the amount of oxygen introduced into the insulating film 104 can be increased. .

[0378] After that, the film 145 is removed, and as shown in FIG. 21(B), an oxide film is left on the substrate 101. The insulating film 104 to which silicon is added can be formed.

[0379] (Embodiment 5) In this embodiment, a V formed in a low-resistance region of an oxide semiconductor film O Explaining H .

[0380] <(1). V O Ease of formation and stability of H> When the oxide semiconductor film (hereinafter referred to as IGZO) is a perfect crystal, H is predominantly During the heat treatment at 450°C, H diffuses along the ab plane and In this study, oxygen vacancies in IGZO are considered. O If there is In this case, H is oxygen deficiency V O We calculated whether it is easy to enter the oxygen vacancy V. O The state where there is an H inside is V O It is written as H.

[0381] For the calculation, the InGaZnO4 crystal model shown in Figure 27 was used.O H in H V O The activation barrier (E a ) to NEB (Nud The calculation conditions are shown in Table 1.

[0382] [Table 1]

[0383] In addition, in the InGaZnO4 crystal model, the difference in the number and metal elements to which oxygen is bonded Therefore, there are oxygen sites 1 to 4 as shown in FIG. 27. Here, oxygen vacancies V O The calculation was carried out for oxygen site 1 and oxygen site 2, which are likely to form

[0384] First, oxygen deficiency V O As oxygen site 1, which is likely to form The calculations were carried out for the oxygen sites bonded to the .

[0385] The model of the initial state is shown in Figure 28(A), and the model of the final state is shown in Figure 28(B). In addition, the calculated activation barrier (E a ) is shown in Figure 29. , here the initial state is oxygen vacancy V O There is an H inside (V O H) and the final state is is oxygen deficiency V O and the state where oxygen bonded to one Ga and two Zn atoms is bonded to H ( HO).

[0386] As a result of the calculation, oxygen deficiency V O It takes about 1.52 eV of energy for the H in the is required, whereas H bonded to O is oxygen vacant VO To enter, it takes about 0.46 eV Energy was needed.

[0387] Here, the calculated activation barrier (E a ) and Equation 1 to calculate the reaction frequency (Γ) In addition, in the formula 1, k B is the Boltzmann constant and T is the absolute temperature.

[0388]

number

[0389] Frequency factor ν=10 13 The reaction frequency at 350°C was calculated assuming [1 / sec] The frequency of H moving from the model shown in Figure 28(A) to the model shown in Figure 28(B) is 5.5 2×10 0 [1 / sec]. Also, from the model shown in Figure 28(B), The frequency of H transfer to the model shown in is 1.82 × 10 9 [1 / sec]. Therefore, H diffusing in IGZO is attracted to nearby oxygen vacancies V. O There is V O It is easy to form H Once V O H forms oxygen vacancy V O It is thought that it is difficult to be released from

[0390] Next, oxygen deficiency V O As oxygen site 2, which is likely to form a bond with one Ga and two Zn, Calculations were performed for the combined oxygen sites.

[0391] The model of the initial state is shown in Figure 30(A), and the model of the final state is shown in Figure 30(B). In addition, the calculated activation barrier (E a ) is shown in Figure 31. , here the initial state is oxygen vacancy V O There is an H inside (V O H) and the final state is is oxygen deficiency V O and the state where oxygen bonded to one Ga and two Zn atoms is bonded to H ( HO).

[0392] As a result of the calculation, oxygen deficiency V O The H in the bond with another O requires about 1.75 eV of energy is required, whereas H bonded to O is oxygen vacant V O To enter, it takes about 0.35 eV Energy was needed.

[0393] In addition, the calculated activation barrier (E a ) and the above formula 1, the reaction frequency (Γ) is Calculated.

[0394] Frequency factor ν=10 13 The reaction frequency at 350°C was calculated assuming [1 / sec] The frequency of H moving from the model shown in Figure 30 to the model shown in Figure 30(B) is 7.53 × 1 0 -2 [1 / sec]. Also, from the model shown in Figure 30(B), The frequency of H transfer to the model is 1.44×10 10 [1 / sec]. So, once V O H forms oxygen vacancy V O It is thought that H is difficult to release from

[0395] From the above, it can be seen that H in IGZO is easily diffused during heat treatment, and oxygen vacancy V O In some cases In this case, oxygen deficiency V O Enter V O It was found that H is easily obtained.

[0396] <(2). VO H transition level > Oxygen vacancy V in IGZO O and H exists, <(1). V O H formation From the calculation using the NEB method shown in the section on ease and stability, oxygen vacancies V O and H is V O H shape Easy to achieve and V O H is considered stable. Therefore, V O H is a career tracker To investigate whether V O The transition levels of H were calculated.

[0397] The calculation was performed using an InGaZnO4 crystal model (112 atoms). V for oxygen site 1 and oxygen site 2 O The H model was created and the transition level was calculated. The calculation conditions are shown in Table 2.

[0398] [Table 2]

[0399] By adjusting the mixing ratio of the exchange terms to obtain a band gap close to the experimental value, we obtained a defect-free The band gap of the new InGaZnO4 crystal model is 3.08 eV, which is lower than the experimental value of 3.1 The result was close to 5 eV.

[0400] The transition level (ε(q / q')) of the model with defect D is calculated by the following formula 2: In addition, ΔE(D q ) is the formation energy of defect D at charge q, calculated from Eq. It is served.

[0401]

number

[0402]

number

[0403] In Equation 2 and Equation 3, E tot (D q ) is the charge q of the model including the defect D. Total energy, E tot (bulk) is the total energy of a defect-free model (perfect crystal), Δn i is the number of atoms i that are added or removed due to the defect, μ i is the chemical potential of atom i, ε VBM Missing The energy of the top of the valence band in the defect-free model, ΔV q is related to the electrostatic potential Correction term, E F is the Fermi energy.

[0404] Calculated V O The transition levels of H are shown in Figure 32. The values ​​in Figure 32 represent the depth from the bottom of the conduction band. From Figure 32, V for oxygen site 1 O The transition level of H is 0.0 below the conduction band edge. 5 eV, and V for oxygen site 2 O The transition level of H is 0.11e below the conduction band edge. V, so each V O H is thought to be involved in electron trapping. , V O It was revealed that H acts as a donor. O IGZO with H It was revealed that the material is electrically conductive.

[0405] <Oxide conductor film> V O Regarding the temperature dependence of resistivity in an oxide conductor film containing H, I will explain.

[0406] Here, a sample having an oxide conductor film was fabricated. The oxide conductor film (OC_SiN) formed by the semiconductor film contacting the silicon nitride film x ) In the doping device, argon is added to the oxide semiconductor film, and the silicon nitride film is The oxide conductive film (OC_Ar doped + SiN x ), or In the plasma processing device, the oxide semiconductor film is exposed to argon plasma and silicon nitride is The oxide conductive film formed by contacting with the film (OC_Ar plasma + SiN x )of The silicon nitride film contains hydrogen.

[0407] Oxide conductor film (OC_SiN x The method for preparing a sample containing the SiO2 film is as follows: After forming a silicon oxynitride film with a thickness of 400 nm by plasma CVD, By exposing the silicon oxynitride film to plasma and adding oxygen ions to it, oxygen is released by heating. Next, a silicon oxynitride film that releases oxygen when heated was formed. A sputtering target with an atomic ratio of In:Ga:Zn=1:1:1.2 was placed on the silicon film. A 100 nm thick In-Ga-Zn oxide film was formed by sputtering using After heat treatment in a nitrogen atmosphere at 450°C, the specimen was heated in a nitrogen and oxygen mixed gas atmosphere at 450°C. Next, a silicon nitride film with a thickness of 100 nm was formed by plasma CVD. Next, the substrate was heat-treated at 350° C. in a mixed gas atmosphere of nitrogen and oxygen.

[0408] Oxide conductor film (OC_Ar doped + SiN x The preparation method of the sample containing A 400 nm thick silicon oxynitride film was formed on a glass substrate by plasma CVD. After the formation, the silicon oxynitride film is exposed to oxygen plasma to add oxygen ions to the film. A silicon oxynitride film that releases oxygen by heating was formed. On the silicon oxynitride film, a sputtering layer with an atomic ratio of In:Ga:Zn=1:1:1.2 was formed. A 100 nm thick In-Ga-Zn oxide film was deposited by sputtering using a ZnO target. After forming a nitride film, it was heat-treated in a nitrogen atmosphere at 450°C, and then heated in a nitrogen and oxygen mixture at 450°C. Next, a doping device was used to dope the In-Ga-Zn oxide film. The film was irradiated with 10 kV of acceleration voltage and 5 × 10 14 / cm 2 of argon was added Next, oxygen vacancies were formed in the In-Ga-Zn oxide film by plasma CVD. Next, a silicon nitride film with a thickness of 0.1 nm was formed. Next, a nitrogen and oxygen mixed gas atmosphere was added at 350°C. It was heat treated.

[0409] Oxide conductor film (OC_Ar plasma + SiN x The sample preparation method including A silicon oxynitride film with a thickness of 400 nm was formed on a glass substrate by plasma CVD. After forming the silicon oxynitride film, it is exposed to oxygen plasma to release oxygen when heated. Next, a silicon oxynitride film with an atomic ratio of I was formed on the silicon oxynitride film, which releases oxygen when heated. Sputtering method using a sputtering target of n:Ga:Zn=1:1:1.2 A 100 nm thick In-Ga-Zn oxide film was formed by this method, and then it was heated at 450°C in a nitrogen atmosphere. After the heat treatment, the plate was heated at 450°C in a mixed gas atmosphere of nitrogen and oxygen. In the Zuma processing device, argon plasma is generated and accelerated argon ions are The oxygen vacancies were created by colliding the Zn-Ga oxide film with the Zn-Ga oxide film. Next, a silicon nitride film with a thickness of 100 nm was formed by annealing in a mixture of nitrogen and oxygen at 350°C. The heat treatment was carried out in a gas atmosphere.

[0410] Next, the resistivity of each sample was measured and the results are shown in Figure 40. Here, the resistivity was measured using a four-terminal In FIG. 40, the horizontal axis indicates the measurement temperature, and the vertical axis indicates the indicates the resistivity. x ) measurement results are indicated by square marks, Oxide conductor film (OC_Ar doped + SiN x The measurement results of oxide conductors are shown by circles. Electrical film (OC_Ar plasma+SiN x ) measurement results are indicated by triangles.

[0411] Although not shown, the oxide semiconductor film that is not in contact with the silicon nitride film has a high resistivity. Therefore, it is considered that the oxide conductor film has a higher resistivity than the oxide semiconductor film. It is clear that it is low.

[0412] As can be seen from FIG. 40, the oxide conductor film (OC_Ar doped+SiN x ) and acid Compound conductor film (OC_Ar plasma+SiN x ) contains oxygen vacancies and hydrogen The resistivity fluctuation is small. Typically, the resistivity fluctuation is small between 80K and 290K. The resistivity fluctuation is less than ±20%. Or, the resistivity fluctuation is less than ±20% between 150K and 250K. The coefficient is less than ±10%. Therefore, it is assumed that the oxide conductor film is By using it as the source and drain regions of a transistor, the oxide conductor film and the source The contact with the conductive film that functions as the electrode and drain electrode is an ohmic contact, and the oxide conductive The contact resistance between the conductive film and the conductive film that functions as the source electrode and the drain electrode can be reduced. In addition, since the resistivity of the oxide conductor has low temperature dependency, the oxide conductor film and the source electrode and drain electrode can be easily formed. The amount of change in contact resistance with the conductive film that functions as the drain electrode is small, resulting in highly reliable transistors. It is possible to create a star.

[0413] (Embodiment 6) In this embodiment, a structure of an oxide semiconductor film included in a semiconductor device of one embodiment of the present invention will be described. This will be explained in detail below.

[0414] In this specification, "parallel" means that two straight lines are arranged at an angle of -10° or more and 10° or less. Therefore, it includes the case where the angle is between -5° and 5°. "Parallel" refers to a state in which two lines are arranged at an angle of between -30° and 30°. Also, "perpendicular" means that two straight lines are arranged at an angle of 80° or more and 100° or less. Therefore, it also includes cases where the angle is between 85° and 95°. This refers to a state in which two straight lines are arranged at an angle of 60° or more and 120° or less.

[0415] In this specification, when the crystal is a trigonal or rhombohedral crystal, it is represented as a hexagonal crystal system. vinegar.

[0416] <Oxide semiconductor structure> The structure of an oxide semiconductor will be described below.

[0417] Oxide semiconductors are divided into single-crystal oxide semiconductors and other non-single-crystal oxide semiconductors. Examples of non-single-crystal oxide semiconductors include CAAC-OS, polycrystalline oxide semiconductors, and nc-O S(nanocrystalline oxide semiconductor), pseudo Pseudo-amorphous oxide semiconductor (a-like OS) e Semiconductor), amorphous oxide semiconductor, etc.

[0418] From another point of view, oxide semiconductors are classified into amorphous oxide semiconductors and other crystalline oxides. Crystalline oxide semiconductors are divided into single-crystal oxide semiconductors, CAAC- Examples include OS, polycrystalline oxide semiconductor, and nc-OS.

[0419] The definition of an amorphous structure is generally that it is not fixed in a metastable state and is isotropic. It is known that the bond angle is flexible and the bond is short-range. This can also be described as a structure that has a high degree of order but no long-range order.

[0420] On the other hand, in the case of an essentially stable oxide semiconductor, it is possible to obtain a completely amorphous structure. It cannot be called an oxide semiconductor (isotropic amorphous). The oxide semiconductor is then oxidized to form a completely amorphous structure. However, a-like OS is a semiconductor that can be used in a microscopic area. Although it has a periodic structure, it has voids and is an unstable structure. It can be said that the physical properties are similar to those of an amorphous oxide semiconductor.

[0421] <caac-os> First, let me explain about CAAC-OS.

[0422] CAAC-OS is an oxide having multiple crystal parts (also called pellets) aligned along the c-axis. It is a type of semiconductor.

[0423] Transmission Electron Microscope (TEM) A combined analysis image (high resolution) of the bright-field image and diffraction pattern of CAAC-OS was obtained by using a microscope. When observing a high-resolution TEM image, multiple pellets can be confirmed. On the other hand, high-resolution TEM images reveal the boundaries between pellets, i.e., grain boundaries. Therefore, the CAAC-OS is not clearly characterized by the grain boundaries. It can be said that the resulting decrease in electron mobility is unlikely to occur.

[0424] Below, we will explain the CAAC-OS observed by TEM. 1 shows a high-resolution TEM image of a cross section of CAAC-OS observed from a direction approximately parallel to the sample surface. For high-resolution TEM imaging, spherical aberration correction is required. The spherical aberration correction function was used to obtain high-resolution TEM images. , specifically referred to as a Cs-corrected high-resolution TEM image. Cs-corrected high-resolution TEM images can be obtained, for example, This is performed using an atomic resolution analytical electron microscope such as the JEM-ARM200F manufactured by JEOL Ltd. It is possible.

[0425] An enlarged Cs-corrected high-resolution TEM image of area (1) in Figure 41(A) is shown in Figure 41(B). From Figure 41(B), it can be seen that the metal atoms are arranged in layers in the pellet. The arrangement of each metal atom layer is determined by the surface on which the CAAC-OS film is to be formed (also referred to as the surface on which the film is to be formed). Or it reflects the unevenness of the top surface and is parallel to the surface on which the CAAC-OS is formed or the top surface.

[0426] As shown in Figure 41(B), CAAC-OS has a characteristic atomic arrangement. ) shows the characteristic atomic arrangement with auxiliary lines. ) the size of each pellet is about 1 nm to 3 nm, and the size of each pellet is about 1 nm to 3 nm. It can be seen that the size of the gap caused by the tilt is about 0.8 nm. The pellets can also be called nanocrystals (nc). AAC-OS, CANC(C-Axis Aligned nanocrystals) ) can also be referred to as an oxide semiconductor.

[0427] Here, based on the Cs-corrected high-resolution TEM image, the pellets of CAAC-OS on the substrate 5120 were The layout of the 5100 is shown diagrammatically as a stack of bricks or blocks. (See FIG. 41(D)). Between the pellets observed in FIG. 41(C), The portion where the tilt occurs corresponds to the region 5161 shown in FIG.

[0428] FIG. 42(A) shows the C of the plane of the CAAC-OS observed from a direction approximately perpendicular to the sample surface. s-corrected high-resolution TEM images are shown. Regions (1), (2), and (3) in Figure 42(A). ) are enlarged Cs-corrected high-resolution TEM images shown in Figure 42(B), Figure 42(C), and As shown in Figure 42(D), Figure 42(B), Figure 42(C) and Figure 42(D) show that the pellet It can be seen that the metal atoms are arranged in a triangular, quadrangular or hexagonal shape. However, no regularity is observed in the arrangement of metal atoms among different pellets.

[0429] Next, C analyzed by X-ray diffraction (XRD) For example, CAAC-O with InGaZnO4 crystals When S is subjected to structural analysis using the out-of-plane method, the results are as shown in Figure 43(A). As shown in the figure, a peak may appear at a diffraction angle (2θ) of around 31°. Since this is attributed to the (009) plane of the ZnO4 crystal, it is believed that the CAAC-OS crystal is c-axis oriented. It can be seen that the c-axis is oriented in a direction substantially perpendicular to the surface on which the film is formed or the upper surface.

[0430] In addition, in the structural analysis of CAAC-OS using the out-of-plane method, 2θ is 31 In addition to the peak around 2θ of 36°, a peak may also appear around 2θ of 36°. The peaks in the vicinity indicate that some of the CAAC-OS crystals do not have a c-axis orientation. The more preferable CAAC-OS is a structure produced by the out-of-plane method. The analysis shows a peak at 2θ around 31°, but no peak at 2θ around 36°.

[0431] On the other hand, in-pla, X-rays are incident on the CAAC-OS from a direction almost perpendicular to the c-axis. When structural analysis is performed using the NE method, a peak appears at 2θ around 56°. This peak is due to I It is attributed to the (110) plane of the nGaZnO4 crystal. In the case of CAAC-OS, 2θ is set to 5 The sample is fixed at approximately 6° and analyzed while rotating around the normal vector of the sample surface (φ axis). Even if a (φ scan) is performed, no clear peak appears as shown in Figure 43(B). On the other hand, in the case of a single crystal oxide semiconductor such as InGaZnO4, 2θ is fixed at around 56° and φ When scanned, it is assigned to a crystal plane equivalent to the (110) plane as shown in Figure 43(C). Six peaks are observed. Therefore, from the structural analysis using XRD, CAAC-OS It can be seen that the orientation of the a-axis and b-axis is irregular.

[0432] Next, we will explain the CAAC-OS analyzed by electron diffraction. For CAAC-OS with ZnO4 crystals, the probe diameter is 300 nm parallel to the sample surface. When an electron beam is incident on the sample, a diffraction pattern (selected area transmission electron diffraction) as shown in Figure 44(A) is generated. This diffraction pattern may appear due to the presence of InGaZnO4 This includes spots due to the (009) plane of the crystal. The pellets contained in the CAAC-OS have a c-axis orientation, and the c-axis faces the surface to be formed or the upper surface. On the other hand, when the probe was applied to the same sample perpendicular to the sample surface, The diffraction pattern when an electron beam with a diameter of 300 nm was incident is shown in Figure 44(B). 4(B), a ring-shaped diffraction pattern is confirmed. Therefore, electron diffraction It can be seen that the a-axis and b-axis of the pellets contained in CAAC-OS do not have any orientation. The first ring in FIG. 44(B) is the (010) plane of the InGaZnO4 crystal. This is thought to be due to the (100) plane and the like. This is thought to be due to the (110) surface.

[0433] As described above, CAAC-OS is an oxide semiconductor with high crystallinity. Crystallinity can be reduced by the incorporation of impurities or the generation of defects, so the opposite view can be taken. Therefore, CAAC-OS can be considered an oxide semiconductor with few impurities and defects (such as oxygen vacancies).

[0434] The impurities are elements other than the main components of the oxide semiconductor, such as hydrogen, carbon, silicon, and transition metals. For example, metal elements such as silicon are more oxidative than metal elements that constitute oxide semiconductors. Elements with strong bonding strength with the oxide semiconductor remove oxygen from the oxide semiconductor, which changes the atomic arrangement of the oxide semiconductor. In addition, heavy metals such as iron and nickel, argon, Carbon dioxide and other molecules have a large atomic radius (or molecular radius), so the atomic arrangement of oxide semiconductors This disrupts the structure and reduces the crystallinity.

[0435] When an oxide semiconductor has impurities or defects, its characteristics may change due to light, heat, etc. For example, impurities contained in oxide semiconductors can act as carrier traps or In addition, oxygen vacancies in oxide semiconductors can act as carrier traps. In some cases, the SiO 2 can become a carrier generation source by capturing hydrogen.

[0436] CAAC-OS, which has few impurities and oxygen vacancies, is an oxide semiconductor with low carrier density. Specifically, the carrier density is 8×10 11 / cm 3 Less than 1 x 10 11 / cm 3 less than 1×10 10 / cm 3 Less than 1 x 10 -9 / cm 3 Such an oxide semiconductor can be a highly pure intrinsic or substantially highly pure oxide semiconductor. CAAC-OS has a low impurity concentration and a low density of defect states. In other words, it can be said that the oxide semiconductor has stable characteristics.

[0437] <nc-os> Next, we will explain nc-OS.

[0438] In the high-resolution TEM image, nc-OS has two distinct regions: one where crystals can be confirmed and the other where clear crystals can be confirmed. The crystalline part contained in nc-OS is The size is often between 1 nm and 10 nm, or between 1 nm and 3 nm. An oxide semiconductor having a crystal size of 10 nm or more and 100 nm or less is called a microcrystalline oxide. For example, in high-resolution TEM images, nc-OS shows grain boundaries. In some cases, the nanocrystals are not clearly visible. Therefore, in the following, the crystalline part of nc-OS is referred to as the pellet. There is a chance to call.

[0439] nc-OS is a material that can be used in microscopic areas (e.g., areas between 1 nm and 10 nm, especially areas between 1 nm and 10 nm). The atomic arrangement is periodic in the region of 3 nm or less. There is no regularity in the crystal orientation between the layers. Therefore, no orientation is observed throughout the film. Therefore, depending on the analytical method, nc-OS may be classified as a-like OS or amorphous oxide semiconductor. For example, in contrast to nc-OS, there are cases where it is difficult to distinguish the particles from the pellets. When X-rays are used, the peaks that indicate the crystal planes are In addition, for nc-OS, a probe diameter larger than the pellet (e.g., 50 When electron diffraction is performed using an electron beam of 1000 nm or more, a halo-like diffraction pattern is produced. On the other hand, for nc-OS, pellets with sizes close to or smaller than the pellets were observed. When nanobeam electron diffraction is performed using an electron beam with a lobe diameter, spots are observed. When nanobeam electron diffraction is performed on nc-OS, high brightness regions are observed in a circular (ring-like) pattern. In addition, multiple spots may be observed within a ring-shaped area. This may be the case.

[0440] In this way, the crystal orientation between the pellets (nanocrystals) is not regular, so nc -OS with RANC (Random Aligned nanocrystals) oxide semiconductors, or NANCs (Non-Aligned Nanocrystals) The semiconductor may also be referred to as an oxide semiconductor having a structure (s).

[0441] The nc-OS is an oxide semiconductor with higher order than an amorphous oxide semiconductor. The nc-OS has a lower density of defect states than the a-like OS and amorphous oxide semiconductors. However, in nc-OS, there is no regularity in the crystal orientation between different pellets. Therefore, the nc-OS has a higher density of defect states than the CAAC-OS.

[0442] <a-like OS> The a-like OS is an oxide semiconductor with a structure between the nc-OS and amorphous oxide semiconductor. It is a semiconductor.

[0443] In a-like OS, pores may be observed in high-resolution TEM images. In the high-resolution TEM image, there are areas where crystalline parts can be clearly seen, and areas where crystalline parts can be seen. and areas where it is not possible to

[0444] Because of the porosity, the a-like OS has an unstable structure. e OS has an unstable structure compared with CAAC-OS and nc-OS. This shows the structural changes caused by electron irradiation.

[0445] The samples to be irradiated with electrons were a-like OS (referred to as sample A), nc-OS (hereinafter referred to as Sample B) and CAAC-OS (hereinafter referred to as Sample C) are prepared. Both samples are In-Ga-Zn oxides.

[0446] First, high-resolution cross-sectional TEM images of each sample are acquired. It can be seen that all the materials have crystalline parts.

[0447] The determination of which part is to be regarded as one crystal part can be made as follows. For example, The unit cell of the InGaZnO4 crystal has three In-O layers and one Ga-Zn-O layer. It is known that the structure has a total of nine layers, six of which are stacked in layers in the c-axis direction. The spacing between these adjacent layers is approximately the same as the lattice spacing (also called the d value) of the (009) plane. The value is calculated to be 0.29 nm from crystal structure analysis. The areas where the spacing is 0.28 nm or more and 0.30 nm or less are considered to be InGaZnO4 crystal parts. The lattice fringes correspond to the ab plane of the InGaZnO4 crystal.

[0448] Figure 45 shows an example of investigating the average size of the crystal parts (22 to 45 locations) of each sample. However, the length of the lattice fringes mentioned above is the size of the crystal part. It can be seen that the crystalline part of ke OS grows in size according to the cumulative amount of electron irradiation. Specifically, as shown by (1) in Figure 45, the initial TEM observation showed a size of about 1.2 nm. The crystal part (also called the initial nucleus) was 4.2 × 10 8 e - / n m 2 On the other hand, in the nc-O For S and CAAC-OS, the cumulative electron irradiation dose from the start of electron irradiation was 4.2 × 10 8 e - / nm 2 It can be seen that there is no change in the size of the crystal part within the range of As shown in (2) and (3) in Figure 45, regardless of the cumulative electron dose, the nc-OS and The sizes of the crystal parts of the CAAC-OS and CAAC-OS are approximately 1.4 nm and 2.1 nm, respectively. It can be seen that...

[0449] In this way, the growth of crystalline parts can be observed in a-like OS due to electron irradiation. On the other hand, in nc-OS and CAAC-OS, the growth of the crystals by electron irradiation is almost nonexistent. In other words, a-like OS is not as good as nc-OS and CAAC- It is clear that it has an unstable structure compared to the OS.

[0450] In addition, due to its porosity, a-like OS is more flexible than nc-OS and CAAC-OS. Specifically, the density of a-like OS is lower than that of a single crystal of the same composition. The density of the nc-OS is 78.6% or more and less than 92.3% of that of the normal crystal. The density of C-OS is 92.3% or more but less than 100% of the density of a single crystal of the same composition. It is difficult to form a film of an oxide semiconductor having a crystal density of less than 78%.

[0451] For example, in an oxide semiconductor having an atomic ratio of In:Ga:Zn=1:1:1, The density of single-crystal InGaZnO4 with a rhombohedral crystal structure is 6.357 g / cm 3 It becomes. For example, in an oxide semiconductor that satisfies the atomic ratio of In:Ga:Zn=1:1:1, The density of a-like OS is 5.0 g / cm 3 More than 5.9g / cm 3 It will be less than For example, in an oxide semiconductor having an atomic ratio of In:Ga:Zn=1:1:1, , the density of nc-OS and the density of CAAC-OS are 5.9 g / cm 3 More than 6.3g / cm 3 It will be less than.

[0452] In some cases, single crystals with the same composition do not exist. In such cases, crystals with different compositions may be used in any proportion. By combining single crystals with the desired composition, the density equivalent to that of a single crystal can be estimated. The density corresponding to a single crystal of a desired composition can be obtained by combining single crystals of different compositions. The density should be as low as possible. It is preferable to estimate by combining different types of single crystals.

[0453] As described above, oxide semiconductors have various structures, each of which has various characteristics. The oxide semiconductor may be, for example, an amorphous oxide semiconductor, an a-like OS, or an nc-OS. The film may be a laminated film having two or more of the above-mentioned compounds.

[0454] As described above, the structures and methods described in this embodiment mode may be appropriately combined with the structures and methods described in other embodiments. They can be used in combination.

[0455] (Embodiment 7) In this embodiment, a display device in which a semiconductor device of one embodiment of the present invention can be used will be described. This will be explained with reference to FIG.

[0456] The display device shown in FIG. 33A has a region having pixels of a display element (hereinafter referred to as a pixel portion 542). ) and a circuit section ( hereinafter referred to as a drive circuit section 544), and a circuit having a function of protecting the element (hereinafter referred to as a protection circuit 54 6) and a terminal portion 547. Note that the protection circuit 546 is not provided. That's fine.

[0457] A part or the whole of the driver circuit portion 544 is formed on the same substrate as the pixel portion 542. This makes it possible to reduce the number of parts and terminals. If a part or all of the pixel portion 542 is not formed on the same substrate, the driving circuit A part or the whole of the path portion 544 is made of COG (Chip On Glass) or TAB (T This can be implemented using the APEX Automated Bonding.

[0458] The pixel section 542 is arranged in X rows (X is a natural number of 2 or more) and Y columns (Y is a natural number of 2 or more). The display device further includes a circuit for driving a plurality of display elements (hereinafter referred to as pixel circuit 541), The path section 544 is a circuit (hereinafter referred to as a gate driver) that outputs a signal (scanning signal) for selecting a pixel. 544a), for supplying signals (data signals) for driving the display elements of the pixels. The source driver 544b includes a driving circuit such as the circuit (hereinafter referred to as a source driver 544b).

[0459] The gate driver 544a includes a shift register and the like. A signal for driving the shift register is inputted through the terminal portion 547, and a signal for outputting the shift register is outputted through the terminal portion 547. For example, the gate driver 544a receives a start pulse signal, a clock signal, etc. The gate driver 544a receives a scanning signal and outputs a pulse signal. The gate has a function of controlling the potential of the scanning lines GL_1 to GL_X. A plurality of drivers 544a are provided, and the plurality of gate drivers 544a drive the scanning lines GL_1 to Alternatively, the gate driver 544a may control the GL_X by dividing it into two parts. However, the gate driver 54 has a function of supplying 4a may also provide other signals.

[0460] The source driver 544b includes a shift register and the like. Through the terminal portion 547, signals for driving the shift register as well as the source of the data signal are transmitted. The source driver 544b receives a signal (image signal) that is to be output from the pixel circuit The source driver 544b has a function of generating a data signal to be written to the source driver 541. A data signal is generated in accordance with a pulse signal obtained by inputting a start pulse, a clock signal, etc. The source driver 544b has a function of controlling the output of a signal. The signal lines DL_1 to DL_Y are connected to the power supply 101. Alternatively, the source driver 544b may have a function to supply an initialization signal. However, the present invention is not limited to this, and the source driver 544b may supply other signals. It is Noh.

[0461] The source driver 544b is configured using, for example, a plurality of analog switches. The source driver 544b sequentially turns on a plurality of analog switches, The image signal can be time-divided and output as a data signal. The source driver 544b may be configured using this.

[0462] Each of the plurality of pixel circuits 541 is connected to one of the plurality of scanning lines GL to which a scanning signal is applied. A pulse signal is input via the signal line DL, and a data signal is given via one of the signal lines DL. A data signal is input to each of the pixel circuits 541. 44a controls writing and holding of data of the data signal. For example, The pixel circuit 541 is connected to the gate driver 5 via the scanning line GL_m (m is a natural number equal to or less than X). A pulse signal is input from 44a, and a signal line DL_n (n is A data signal is input from the source driver 544b via a line (Y) (a natural number equal to or less than Y).

[0463] The protection circuit 546 shown in FIG. 33(A) is, for example, a gate driver 544a and a pixel circuit 5 41. Alternatively, the protection circuit 546 is connected to the scanning line GL, which is the wiring between the source driver The signal line DL is connected between the driver 544b and the pixel circuit 541. The circuit 546 can be connected to the wiring between the gate driver 544a and the terminal section 547. Alternatively, the protection circuit 546 may be provided on the wiring between the source driver 544b and the terminal section 547. The terminal section 547 can be connected to the display device via an external circuit. This refers to the part where terminals for inputting control signals and image signals are provided.

[0464] When a potential outside a certain range is applied to the wiring to which the protection circuit 546 is connected, the protection circuit 546 This is a circuit that brings one wire into electrical continuity with another wire.

[0465] As shown in FIG. 33A, a pixel section 542 and a drive circuit section 544 are provided with a protection circuit 54. 6, ESD (Electro Static Discharge: This can improve the resistance of the display device to overcurrents caused by electrostatic discharges and the like. However, the configuration of the protection circuit 546 is not limited to this. For example, A configuration in which a protection circuit 546 is connected, or a configuration in which the protection circuit 546 is connected to the source driver 544b Alternatively, a configuration in which a protection circuit 546 is connected to the terminal portion 547 may be used. It can also be done as follows.

[0466] In FIG. 33(A), the gate driver 544a and the source driver 544b Therefore, although an example in which the driving circuit section 544 is formed is shown, the present invention is not limited to this configuration. For example, only the gate driver 544a is formed, and a separately prepared source driver circuit is formed. A substrate (for example, a drive circuit substrate formed of a single crystal semiconductor film or a polycrystalline semiconductor film) is implemented. It may also be configured to be equipped with

[0467] Furthermore, the plurality of pixel circuits 541 shown in FIG. 33(A) may be, for example, a configuration shown in FIG. 33(B). It can be said that:

[0468] The pixel circuit 541 shown in FIG. 33B includes a liquid crystal element 570, a transistor 550, and a capacitor. and a capacitance element 560.

[0469] The transistor described in the above embodiment can be used as the transistor 550 as appropriate. can.

[0470] The potential of one of the pair of electrodes of the liquid crystal element 570 is set appropriately according to the specifications of the pixel circuit 541. The orientation state of the liquid crystal element 570 is set by the written data. A common potential is applied to one of a pair of electrodes of the liquid crystal element 570 included in each of the pixel circuits 541. A common potential may be applied to the pair of liquid crystal elements 570 of the pixel circuits 541 in each row. One of the electrodes may be given a different potential.

[0471] In the pixel circuit 541 in the mth row and the nth column, the source electrode or the drain electrode of the transistor 550 One of the electrodes is electrically connected to the signal line DL_n, and the other is a pair of electrodes of the liquid crystal element 570. The gate electrode of the transistor 550 is electrically connected to the other of the scan lines GL _m. The transistor 550 can be turned on or off. This has the function of controlling the writing of data of the data signal.

[0472] One of the pair of electrodes of the capacitor 560 is connected to a wiring to which a potential is supplied (hereinafter, a potential supply line VL ) and the other is electrically connected to the other of the pair of electrodes of the liquid crystal element 570. The value of the potential of the potential supply line VL is set appropriately according to the specifications of the pixel circuit 541. The capacitor 560 functions as a storage capacitor for storing written data.

[0473] For example, in a display device having the pixel circuit 541 of FIG. 33(B), for example, The pixel circuits 541 in each row are sequentially selected by the gate driver 544a shown in FIG. 550 is turned on and data of the data signal is written.

[0474] The pixel circuit 541 to which the data has been written is turned off by turning off the transistor 550. By repeating this process for each row, an image can be displayed.

[0475] Furthermore, the plurality of pixel circuits 541 shown in FIG. 33(A) may be, for example, a configuration shown in FIG. 33(C). It can be said that:

[0476] The pixel circuit 541 shown in FIG. 33C includes transistors 552 and 554 and a capacitor. The transistor 552 and the light-emitting element 572 are connected to each other. The transistors described in the above embodiments are applied as appropriate to either one or both of the transistors 554. It is possible.

[0477] One of the source and drain electrodes of the transistor 552 is supplied with a data signal. The gate voltage of the transistor 552 is electrically connected to the wiring (signal line DL_n). The electrodes are electrically connected to wiring (scanning lines GL_m) to which gate signals are applied.

[0478] Transistor 552 is turned on or off to transfer the data of the data signal. It has the function of controlling the writing of data.

[0479] One of the pair of electrodes of the capacitor 562 is connected to a wiring to which a potential is applied (hereinafter, a potential supply line VL _a), and the other is electrically connected to the source electrode and drain electrode of the transistor 552. The second electrode is electrically connected to the other of the first and second electrodes.

[0480] The capacitor 562 functions as a storage capacitor for holding written data.

[0481] One of the source electrode and the drain electrode of the transistor 554 is connected to the potential supply line VL_a. Furthermore, the gate electrode of transistor 554 is electrically connected to the It is electrically connected to the other of the source electrode and the drain electrode.

[0482] One of the anode and cathode of the light emitting element 572 is electrically connected to the potential supply line VL_b. The other is electrically connected to the other of the source electrode and drain electrode of the transistor 554. will be done.

[0483] The light emitting element 572 may be, for example, an organic electroluminescence element (also known as an organic EL element). However, the light emitting element 572 is not limited to this. Alternatively, an inorganic EL element made of an inorganic material may be used.

[0484] A high power supply potential VDD is applied to one of the potential supply lines VL_a and VL_b. and the other is supplied with a low power supply potential VSS.

[0485] In a display device having the pixel circuit 541 of FIG. 33(C), for example, The pixel circuits 541 of each row are selected in sequence by the gate driver 544a, and the transistors 552 are turned on. The data signal is written by turning it on.

[0486] The pixel circuit 541 to which the data is written is turned off by turning off the transistor 552. Furthermore, the transistor 554 is held in a holding state in response to the potential of the written data signal. The amount of current flowing between the source electrode and the drain electrode is controlled, and the light emitting element 572 The light is emitted at a brightness that corresponds to the flow rate. By repeating this process row by row, an image can be displayed.

[0487] The structure described in this embodiment mode may be used in appropriate combination with structures described in other embodiments. can be done.

[0488] (Embodiment 8) In this embodiment, a display device using the transistor described in the previous embodiment will be described. An example will be described below with reference to FIGS.

[0489] 34 is a top view showing an example of a display device. The display device 700 shown in FIG. A pixel portion 702 provided on a substrate 701 and a source driver 703 provided on the first substrate 701 are connected to the pixel portion 702. The pixel section 702, the source driver circuit section 704, the gate driver circuit section 706, a sealant 712 arranged to surround the gate driver circuit section 704 and the gate driver circuit section 706; and a second substrate 705 provided so as to face the first substrate 701. The first substrate 701 and the second substrate 705 are sealed with a sealant 712. That is, the pixel section 702, the source driver circuit section 704, and the gate driver circuit section 706 are The first substrate 701, the sealant 712, and the second substrate 705 are sealed. Although not shown in FIG. 34, a display element is provided between the first substrate 701 and the second substrate 705. can be done.

[0490] The display device 700 is surrounded by a sealant 712 on the first substrate 701. The pixel section 702, the source driver circuit section 704, and the gate driver circuit section 706 are arranged in a region different from the region. The flexible printed circuit (FPC) terminal 708 is electrically connected to the flexible printed circuit (FPC) circuit 706. In addition, the FPC terminal section 708 is provided with an FP The pixel section 702 and the source driver circuit section 704 are connected by the FPC 716. Various signals are supplied to the pixel portion 702, the gate driver circuit portion 706, and the like. The base driver circuit section 704, the gate driver circuit section 706, and the FPC terminal section 708 are , and signal lines 710 are connected to the respective FPCs 716. The pixel section 702, the source driver circuit section 704, the gate driver circuit section 706, and the like are connected via a line 710. 706 and an FPC terminal portion 708.

[0491] The display device 700 may be provided with a plurality of gate driver circuits 706. The device 700 includes a source driver circuit section 704 and a gate driver circuit section 706. Although an example in which the pixel portion 702 is formed on the same first substrate 701 is shown, the present invention is not limited to this configuration. For example, only the gate driver circuit section 706 may be formed on the first substrate 701. Alternatively, only the source driver circuit portion 704 may be formed on the first substrate 701. In this case, the substrate on which the source driver circuit or the gate driver circuit etc. is formed (for example, A driving circuit board formed of a monocrystalline semiconductor film or a polycrystalline semiconductor film is mounted on a first substrate 701. The method of connecting the separately formed drive circuit board is not particularly limited. Instead, COG method, wire bonding method, etc. can be used.

[0492] The display device 700 also includes a pixel section 702, a source driver circuit section 704, and a gate The driver circuit portion 706 includes a plurality of transistors. A transistor having a specific position can be applied.

[0493] The display device 700 can also include various elements, such as liquid crystal Elements, EL (electroluminescence) elements (EL elements including organic and inorganic materials, organic EL elements, inorganic EL elements), LEDs (white LEDs, red LEDs, green LEDs, blue LEDs) transistors (transistors that emit light according to the current), electron emitters, electron insulators Electrophoretic element, Grating light valve (GLV), Plasma display (P Display elements using DP, MEMS (microelectromechanical systems), Digital Micromirror Device (DMD), DMS (Digital Micro Shutter) ), MIRASOL (registered trademark), IMOD (Interference Modulation ) element, shutter type MEMS display element, optical interference type MEMS display element, elect Low-wetting element, piezoelectric ceramic display, display using carbon nanotubes In addition to these, it has at least one of an electric or magnetic function. The display medium may have a contrast, brightness, reflectance, transmittance, etc. that change depending on the display device. An example of a display device using an EL element is an EL display. An example of a display device using electrons is a field emission display (FED) or is a SED (Surface-conduction E) flat panel display. LCD displays include liquid crystal displays. An example of the device is a liquid crystal display (transmissive liquid crystal display, semi-transmissive liquid crystal display). LCD, reflective LCD, direct view LCD, projection LCD) An example of a display device using electronic ink or electrophoretic elements is electronic paper. In addition, when realizing a semi-transmissive liquid crystal display or a reflective liquid crystal display, In this case, a part or all of the pixel electrodes may function as a reflective electrode. For example, a part or the whole of the pixel electrode may be made of aluminum, silver, etc. Furthermore, in this case, a memory circuit such as an SRAM can be provided under the reflective electrode. This makes it possible to further reduce power consumption.

[0494] The display method of the display device 700 may be a progressive method or an interlace method. In addition, the color elements controlled by pixels when displaying colors include R It is not limited to the three colors GB (R stands for red, G stands for green, B stands for blue). For example, It may be composed of four pixels: a pixel, a B pixel, and a W (white) pixel. Like the column, two colors of RGB make up one color element, and two different colors are created by the color element. Alternatively, you can select one or more colors such as yellow, cyan, magenta, etc. for RGB. The size of the display area may be different for each dot of the color element. However, the disclosed invention is not limited to color display devices, but also to monochrome display devices. The present invention can also be applied to display devices such as those shown in the accompanying drawings.

[0495] In this embodiment, a liquid crystal element and an EL element are used as display elements. 35 and 36. Note that FIG. 35 shows the area indicated by the dashed line QR in FIG. 36 is a cross-sectional view of the display device, which uses a liquid crystal element as the display element. 34 is a cross-sectional view taken along the dashed line QR, and shows a configuration in which an EL element is used as a display element. is.

[0496] 35(A) and 36(A) show a structure in which the first substrate 701 and the second substrate 705 are made of glass. The display device 700 uses the above-mentioned materials and has high mechanical strength. B) is a display device 7 using plastic or the like as a first substrate 701 and a second substrate 705. The first substrate 701 is a flexible substrate. 2. The capacitor element 790 is fixed to the insulating film 719 via an adhesive 720. The second substrate 705 has an insulating film 739 on which a colored film 736, a light-shielding film 738, etc. are formed. It is fixed via adhesive 740.

[0497] First, the common parts shown in Figures 35 and 36 will be explained, and then the different parts will be explained. This will be explained below.

[0498] <Explanation of common parts of display devices> The display devices 700 and 700a shown in FIGS. 35 and 36 include a wiring portion 711 and a pixel The display panel 700 includes a display unit 702, a source driver circuit unit 704, and an FPC terminal unit 708. The lead wiring portion 711 has a signal line 710. The pixel portion 702 has a transistor 750 and a capacitor element 790. The source driver circuit portion 704 also includes a transistor It has a 752.

[0499] The transistor 750 and the transistor 752 are the same as those of the transistors described in the above embodiments. The structure can be used as appropriate.

[0500] The transistor used in this embodiment is made of a highly purified oxide in which the formation of oxygen vacancies is suppressed. The transistor has a semiconductor film. The transistor has a low current value in an off state (off-state current value). Therefore, the retention time of the electric signals such as the image signals can be extended, and the power supply When it is on, the write interval can be set longer. Therefore, the frequency of refresh operations can be reduced. This has the effect of reducing power consumption.

[0501] In addition, the transistor used in this embodiment has a relatively high field-effect mobility. For example, a transistor capable of such high speed driving can be used in a liquid crystal display. By using this in a display device, the switching transistor in the pixel section and the driver circuit section can be In other words, the driver transistor can be formed on the same substrate as a separate driver circuit. Therefore, it is not necessary to use a semiconductor device formed from a silicon wafer or the like. The number of components can be reduced. By using a register, high quality images can be provided.

[0502] 35 and 36, the transistor 750, the transistor 752, and the capacitor An insulating film 766 and a planarizing insulating film 770 are provided on the capacitor 790 .

[0503] The insulating film 766 can be formed using a material and a method similar to those of the insulating film 126 described in the above embodiment. The planarization insulating film 770 can be formed by a method. Acrylic resin, polyimide amide resin, benzocyclobutene resin, polyamide resin, epoxy Heat-resistant organic materials such as epoxy resins can be used. The planarization insulating film 770 may be formed by stacking a plurality of insulating films. The planarizing insulating film 770 may not be provided.

[0504] The signal line 710 is connected to the source and drain electrodes of the transistors 750 and 752. The signal line 710 is formed in the same process as the conductive film having the function of the transistor. A conductive film that functions as the gate electrodes of the signal lines 750 and 752 may be used. For example, if a material containing copper is used, signal delays caused by wiring resistance will be reduced. This allows for large-screen display without requiring a large screen.

[0505] The FPC terminal portion 708 includes a connection electrode 760, an anisotropic conductive film 780, and an FPC 71. 6. The connection electrode 760 is connected to the source and drain electrodes of the transistors 750 and 752. The connection electrode 760 is formed in the same process as the conductive film that functions as the drain electrode. is electrically connected to a terminal of the FPC 716 via an anisotropic conductive film 780 .

[0506] The first substrate 701 and the second substrate 705 may be made of, for example, glass. In addition, the first substrate 701 and the second substrate 705 may be flexible substrates. The flexible substrate may be, for example, a plastic substrate. do.

[0507] In addition, a structure 778 is provided between the first substrate 701 and the second substrate 705. The structure 778 is a columnar spacer obtained by selectively etching an insulating film. The distance (cell gap) between the first substrate 701 and the second substrate 705 is controlled. It should be noted that the structures 778 may be spherical spacers.

[0508] On the second substrate 705 side, a light-shielding film 73 having a function as a black matrix is ​​provided. 8, a colored film 736 having a function as a color filter, a light-shielding film 738 and a colored film 7 An insulating film 734 is provided in contact with the insulating film 36 .

[0509] <Configuration example of a display device using a liquid crystal element as a display element> The display devices 700 and 700a shown in FIG. 35 include a liquid crystal element 775. The second conductive film 774 includes a conductive film 772, a conductive film 774, and a liquid crystal layer 776. It is provided on the substrate 705 side and functions as a counter electrode. 700a, the voltage applied to the conductive film 772 and the conductive film 774 changes the polarity of the liquid crystal layer 776. By changing the orientation state, light transmission or non-transmission can be controlled, allowing images to be displayed. .

[0510] The conductive film 772 serves as a source electrode and a drain electrode of the transistor 750. The conductive film 772 is formed over the planarization insulating film 770. This film functions as a pixel electrode, that is, one of the electrodes of a display element. The display devices 700 and 700a shown in FIG. The conductive film 772 reflects light and displays it through the colored film 736, which is called a reflective color. It is a liquid crystal display device.

[0511] The conductive film 772 may be a conductive film that transmits visible light or a conductive film that reflects visible light. A conductive film having a light-transmitting property in visible light can be used. For example, a material containing one of the elements selected from indium (In), zinc (Zn), and tin (Sn) As a conductive film that is reflective in visible light, for example, aluminum In this embodiment, the conductive film 772 may be formed using a material containing silver or silver. A conductive film that is reflective in visible light is used.

[0512] In the display devices 700 and 700a shown in FIG. 35, the pixel section 702 is planarized and insulated. The unevenness is formed in a part of the film 770. For example, the unevenness is formed by forming the planarization insulating film 770 with an organic The insulating layer can be formed by forming a resin film or the like and providing a recess or protrusion on the surface of the organic resin film. In addition, the conductive film 772 having the function of a reflective electrode is formed along the above-mentioned irregularities. Therefore, when external light is incident on the conductive film 772, This allows for diffused reflection of light, improving visibility.

[0513] The display devices 700 and 700a shown in FIG. 35 are reflective color liquid crystal display devices. However, the present invention is not limited to this. For example, the conductive film 772 may be formed as a light-transmitting film that transmits visible light. By using a certain conductive film, a transmissive color liquid crystal display device may be formed. In the case of a liquid crystal display device, the unevenness provided on the planarization insulating film 770 is not provided. That's fine.

[0514] Although not shown in FIG. 35, the conductive films 772 and 774 are in contact with the liquid crystal layer 776. Although not shown in FIG. Optical members (optical substrates) such as optical members, phase difference members, and anti-reflection members may be provided as appropriate. For example, circularly polarized light produced by a polarizing substrate and a retardation substrate may be used. Critters, sidelights, etc. may also be used.

[0515] When liquid crystal elements are used as display elements, thermotropic liquid crystals, low molecular weight liquid crystals, polymer liquid crystals, The liquid crystals that can be used include polymer dispersed liquid crystals, ferroelectric liquid crystals, and antiferroelectric liquid crystals. Depending on the conditions, the liquid crystal material can be in a cholesteric phase, a smectic phase, a cubic phase, or a chiral phase. It shows nematic phase, isotropic phase, etc.

[0516] In addition, when the in-plane switching method is adopted, a liquid crystal that exhibits a blue phase without using an alignment film may be used. The blue phase is one of the liquid crystal phases, and when the temperature of cholesteric liquid crystal is increased, the cholesteric The blue phase appears just before the transition from the black phase to the isotropic phase. Therefore, in order to improve the temperature range, a liquid crystal composition containing a chiral agent of several weight percent or more is used. The liquid crystal composition containing a liquid crystal exhibiting a blue phase and a chiral agent is used in a liquid crystal layer. It has a short response time, is optically isotropic so alignment treatment is not required, and has little viewing angle dependency. In addition, since there is no need to provide an alignment film, rubbing treatment is also unnecessary. Therefore, it is possible to prevent electrostatic breakdown caused by the electrostatic discharge, and to prevent defects in the liquid crystal display device during the manufacturing process. Damage can be reduced.

[0517] When a liquid crystal element is used as a display element, a TN (Twisted Nematic) ) mode, IPS (In-Plane-Switching) mode, FFS (Frin ge Field Switching) mode, ASM (Axially Symme tric aligned Micro-cell) mode, OCB(Optical Compensated Birefringence mode, FLC (Ferrero) lectric Liquid Crystal) mode, AFLC (AntiFerr It can be used in dielectric liquid crystal mode. .

[0518] In addition, normally black type liquid crystal display devices, for example, those employing vertical alignment (VA) mode The liquid crystal display device may be a transmission type. For example, MVA (Multi-Domain Vertical Alignment) mode, PVA (Patterned Vertical Alignment) mode , ASV mode, etc. can be used.

[0519] <Display device using light-emitting elements as display elements> The display devices 700 and 700a shown in FIG. 36 have a light-emitting element 782. The display device 7 shown in FIG. 36 includes a conductive film 784, an EL layer 786, and a conductive film 788. 700a, an image is generated by the EL layer 786 of the light emitting element 782 emitting light. can be displayed.

[0520] The conductive film 784 serves as a source electrode and a drain electrode of the transistor 750. The conductive film 784 is formed over the planarization insulating film 770. This film functions as a pixel electrode, that is, one electrode of a display element. The conductive film is transparent to visible light or reflective to visible light. As a conductive film that is transparent to visible light, for example, indium ( It is advisable to use a material containing one of the following elements: In, zinc (Zn), and tin (Sn). Examples of conductive films that are reflective in visible light include materials containing aluminum or silver. It is recommended to use

[0521] In addition, the display devices 700 and 700a shown in FIG. 36 include a planarization insulating film 770 and a conductive film 7 An insulating film 730 is provided over the conductive film 784. The insulating film 730 covers part of the conductive film 784. The light-emitting element 782 has a top-emission structure. The top electrode 784 has a thickness of 100 μm and transmits light emitted from the EL layer 786. The mission structure is exemplified below, but is not limited to this. A bottom emission structure that emits light or a structure that emits light to both the conductive film 784 and the conductive film 788 may be used. It can also be applied to dual emission structures.

[0522] A colored film 736 is provided at a position overlapping the light-emitting element 782, and a colored film 736 is provided at a position overlapping the insulating film 730. A light-shielding film 738 is provided in the position where the light-shielding film 738 is to be drawn, the wiring portion 711, and the source driver circuit portion 704. The colored film 736 and the light-shielding film 738 are covered with an insulating film 734. In addition, the space between the light emitting element 782 and the insulating film 734 is filled with a sealing film 732. In the display devices 700 and 700a shown in FIG. 1, a colored film 736 is provided. However, the present invention is not limited to this. For example, when the EL layer 786 is formed by coloring, In some cases, the colored film 736 may not be provided.

[0523] The structure described in this embodiment mode may be used in appropriate combination with structures described in other embodiments. can be done.

[0524] (Embodiment 9) In this embodiment, one embodiment of a light-emitting device using a semiconductor device according to one embodiment of the present invention will be described. In this embodiment mode, a structure of a pixel portion of a light-emitting device will be described with reference to FIG. Reveal.

[0525] In FIG. 37, a plurality of FETs 500 are formed on a first substrate 502, and each FET 5 00 is electrically connected to each light emitting element (504R, 504G, 504B, 504W). Specifically, each FET 500 is electrically connected to a first conductive film 506 of the light emitting element. Each of the light emitting elements (504R, 504G, 504B, 504W) is connected to the first The conductive film 506, the second conductive film 507, the EL layer 510, and the third conductive film 512 It is composed.

[0526] Also, at positions facing each light emitting element (504R, 504G, 504B, 504W), Each of the color layers (514R, 514G, 514B, 514W) is provided. The color layers (514R, 514G, 514B, 514W) are in contact with the second substrate 516. A sealing film 518 is provided between the first substrate 502 and the second substrate 516. The sealing film 518 is made of, for example, a glass material such as glass frit, Hardening resins that harden at room temperature, such as two-component mixed resins, photo-hardening resins, thermosetting resins, etc. The resin material can be used.

[0527] In addition, the partition wall 5 is formed so as to cover the ends of the first conductive film 506 and the second conductive film 507 adjacent to each other. A structure 509 is provided on the partition wall 508. The first conductive film 506 functions as a reflective electrode and as an anode of the light-emitting element. The second conductive film 507 has a function of adjusting the optical path length of each light-emitting element. An EL layer 510 is formed on the second conductive film 507, and a third The third conductive film 512 is formed as a semi-transmissive and semi-reflective electrode. The structure 509 functions as a light-emitting element and a cathode of the light-emitting element. It is provided between the colored layers and functions as a spacer.

[0528] In addition, the EL layer 510 is formed by the respective light-emitting elements (504R, 504G, 504B, 504 W). , 504W) are formed by the first conductive film 506 and the third conductive film 512 from the EL layer 510. It has a micro-optical resonator (also called a microcavity) structure that resonates light emission, and Even with the EL layer 510, it is possible to narrow the spectrum of light of different wavelengths and extract it. Specifically, each of the light-emitting elements (504R, 504G, 504B, 504W) has an EL layer By adjusting the film thickness of the second conductive film 507 provided below 510, The spectrum obtained from the EL layer 510 is set to the desired emission spectrum, and light emission with good color purity is obtained. Therefore, by using the configuration shown in FIG. 37, it is possible to obtain the EL layer by coloring it separately. This eliminates the need for the above process, making it easier to achieve high definition.

[0529] Furthermore, the light emitting device shown in FIG. 37 further includes a colored layer (also called a color filter). This is a configuration that emits light with a desired emission spectrum. By combining this structure with a color filter, it is possible to obtain light emission with even better color purity. Specifically, the light path length of the light emitting element 504R is adjusted so as to obtain red light emission. The red light is emitted in the direction of the arrow through the colored layer 514R. The element 504G has an optical path length adjusted so as to obtain green light emission, and the colored layer Green light is emitted in the direction of the arrow through light-emitting element 514G. The optical path length of the light emitting element is adjusted so that light can be emitted. The light emitting element 504W emits blue light in the direction of the arrow A. The optical path length of the light-emitting element is adjusted, and white light is emitted in the direction of the arrow through the colored layer 514W. It is served.

[0530] The method for adjusting the optical path length of each light-emitting element is not limited to this. In the optical element, the optical path length may be adjusted by adjusting the film thickness of the EL layer 510.

[0531] The colored layers (514R, 514G, 514B) transmit light in a specific wavelength range. For example, a red (R) color filter that transmits light in the red wavelength band may be used. -filter, green (G) color filter that transmits light in the green wavelength band, blue wavelength band A blue (B) color filter that transmits light in the blue (B) region can be used. For example, acrylic resin material that does not contain pigments may be used as 514W. The colored layers (514R, 514G, 514B, 514W) can be made of various materials. It is formed by printing, inkjet printing, etching using photolithography technology, etc. It is possible.

[0532] The first conductive film 506 is, for example, a film with high reflectivity (visible light reflectivity of 40% or more). A metal film having a film thickness of 0.00% or less, preferably 70% to 100% can be used. The conductive film 506 is made of aluminum, silver, or an alloy containing these metal materials (for example, For example, an alloy of silver, palladium, and copper) can be formed as a single layer or a multilayer.

[0533] The second conductive film 507 may be formed using, for example, a conductive metal oxide. Conductive metal oxides include indium oxide, tin oxide, zinc oxide, and indium Indium tin oxide (also known as ITO), indium zinc Lead oxide (Indium Zinc Oxide), or these metal oxide materials with acid The second conductive film 50 may contain silicon oxide or tungsten oxide. 7, a thin film is formed between the EL layer 510 to be formed later and the first conductive film 506. This is advantageous because it can suppress the formation of an insulating film formed on the first conductive film 50. A conductive metal oxide film used as a second conductive film 507 may be formed below the layer 6 .

[0534] The third conductive film 512 is made of a conductive material having a reflectivity and a conductive material having a light-transmitting property. and the reflectance of visible light is 20% or more and 80% or less, preferably 40% or more. The third conductive film 512 is preferably made of, for example, silver, magnesium, or the like. or an alloy containing these metal materials is formed thinly (for example, 10 nm or less), and After that, a conductive metal oxide that can be used for the second conductive film 507 may be formed.

[0535] In the configuration described above, the structure in which light is extracted to the second substrate 516 side (top electrode) is used. The light emitting device has a mission structure, and the first substrate 501 on which the FET 500 is formed is a structure in which light is extracted from the first substrate 501 side (bottom emission structure), or a structure in which light is extracted from the first substrate 501 side and the second substrate 502 side The light emitting device has a structure (dual emission structure) in which light is extracted from both sides of the substrate 516. In the case of a bottom emission structure, for example, the colored layers (514R, 514G, 51 4B, 514W) may be formed below the first conductive film 506. A light-transmitting substrate may be used for the substrate on the light-emitting side, and a transparent substrate may be used for the substrate on the non-light-emitting side. Both light-transmitting and light-shielding substrates can be used.

[0536] In addition, in FIG. 37, the light emitting element has four colors (red (R), green (G), blue (B), and white (W) ) is illustrated as an example, but the present invention is not limited to this. For example, the light emitting element may have three colors (red (R), , green (G), and blue (B).

[0537] (Embodiment 10) In this embodiment, a display module in which the semiconductor device of one embodiment of the present invention can be used is described. The electronic device will be described with reference to FIGS. 38 and 39.

[0538] The display module 8000 shown in FIG. 38 includes an upper cover 8001 and a lower cover 8002. Between them, touch panel 8004 connected to FPC8003 and Display panel 8006, backlight 8007, frame 8009, printed circuit board 801 0, has battery 8011.

[0539] The semiconductor device of one embodiment of the present invention can be used for the display panel 8006, for example.

[0540] The upper cover 8001 and the lower cover 8002 are connected to the touch panel 8004 and the display panel The shape and dimensions can be changed as needed to fit the size of the 8006.

[0541] The touch panel 8004 is a resistive or capacitive touch panel. The display panel 8006 can be used by overlapping it with the opposing substrate (sealing substrate). It is also possible to provide the display panel 8 with a touch panel function. It is also possible to provide an optical sensor in each pixel of 006 to make it an optical touch panel.

[0542] The backlight 8007 has a light source 8008. In FIG. Although the configuration in which the light source 8008 is disposed on the base 8007 has been illustrated, the present invention is not limited to this. For example, a light source 8008 is arranged at the end of a backlight 8007, and a light diffusion plate is further used. In addition, when a self-luminous light emitting element such as an organic EL element is used, or when a reflective In the case of a flat panel or the like, the backlight 8007 may not be provided.

[0543] The frame 8009 has a function of protecting the display panel 8006 and also a function of preventing the movement of the printed circuit board 8010. It also functions as an electromagnetic shield to block electromagnetic waves generated by the operation of the The frame 8009 may also function as a heat sink.

[0544] The printed circuit board 8010 includes a power supply circuit, a signal circuit for outputting a video signal and a clock signal. The power supply circuit is provided with a signal processing circuit. Alternatively, the power source may be a battery 8011 provided separately. 1 can be omitted if commercial power is used.

[0545] In addition, the display module 8000 includes components such as a polarizing plate, a retardation plate, and a prism sheet. It may also be provided in addition.

[0546] 39(A) to 39(D) are diagrams showing electronic devices. These electronic devices are housed in a housing. Body 600, display unit 601, speaker 603, LED lamp 604, operation keys 605 (power switch or operation switch), connection terminal 606, sensor 607 (force, displacement, position , speed, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, chemicals, sound, time, Hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, odor or infrared rays 608, etc.

[0547] FIG. 39(A) shows a mobile computer, which includes, in addition to the above, a switch 609, It may have an infrared port 620, etc. FIG. 39(B) shows a portable In addition to the above, the image reproducing device (for example, a DVD reproducing device) is a second display unit. 602, a recording medium reading unit 621, etc. In addition to the components described above, it may also have a tuner, an image processor, etc. (D) is a portable television receiver, which, in addition to the above, has a charging port capable of transmitting and receiving signals. It may have an electric device 627, etc.

[0548] 39(E) to 39(G) show a foldable mobile information terminal 610. 39(E) shows the portable information terminal 610 in an unfolded state. The figure shows the mobile information terminal 610 in the process of changing from one folded state to the other. 39(G) shows the portable information terminal 610 in a folded state. It is highly portable when folded, and has a seamless, large display area when unfolded. Excellent display visibility.

[0549] The display unit 612 is supported by three housings 615 connected by hinges 613 . The two housings 615 are bent via the hinge 613, and the mobile information terminal 610 The present invention can be reversibly transformed from an unfolded state to a folded state. A display device manufactured by applying the above method can be used for the display portion 612. For example, A display device that can be bent to a diameter of 1 mm or more and 150 mm or less can be applied.

[0550] The electronic devices shown in FIGS. 39A to 39G can have various functions. For example, functions to display various information (still images, videos, text images, etc.) on the display, Panel function, calendar, date or time display function, various software ( It has a function to control processing by a program, a wireless communication function, and various controls using the wireless communication function. Functions for connecting to computer networks, transmitting various data using wireless communication functions, The function of receiving, reading out the program or data recorded on the recording medium and displaying it on the display Furthermore, in an electronic device having multiple display units, In this case, one display section is used mainly to display image information, and another display section is used mainly to display text information. or a function to display images that take parallax into account on multiple displays to create a three-dimensional effect. Furthermore, in electronic devices having an image receiving unit, The camera has the functions to take still images, record videos, and automatically or manually correct captured images. function to correct the image, to save the captured image to a recording medium (external or built-in to the camera), 39(A) to 39(B) can have a function of displaying the image on the display unit. The functions that the electronic device shown in 9(G) can have are not limited to these, and various functions can be It can have.

[0551] The electronic device described in this embodiment has a display unit for displaying some information. Note that the semiconductor device of one embodiment of the present invention is not limited to an electronic device that does not have a display portion. It can also be applied to

[0552] The structure described in this embodiment mode may be used in appropriate combination with structures described in other embodiments. can be done.

Claims

1. A semiconductor device having a first transistor and a second transistor on a substrate, a first conductive film located on the substrate and functioning as a first gate electrode of the first transistor; a first insulating film having a region in contact with an upper surface of the first conductive film; a second insulating film having a region in contact with an upper surface of the first insulating film; a first oxide semiconductor film having a region in contact with an upper surface of the second insulating film and including a channel formation region of the first transistor; a third insulating film having a region in contact with an upper surface of the first oxide semiconductor film; a second conductive film having a region located on the third insulating film and functioning as a second gate electrode of the first transistor; a fourth insulating film having a region in contact with an upper surface of the second insulating film, a region in contact with an upper surface of the first oxide semiconductor film, a region in contact with a side surface of the third insulating film, a region in contact with a side surface of the second conductive film, and a region in contact with the upper surface of the second conductive film; a third conductive film having a region located over the fourth insulating film and a region in contact with the first oxide semiconductor film in a first opening of the fourth insulating film, the third conductive film functioning as one of a source electrode and a drain electrode of the first transistor; a second oxide semiconductor film having a region in contact with a top surface of the second insulating film and including a channel formation region of the second transistor; a fifth insulating film having a region in contact with an upper surface of the second oxide semiconductor film; a fourth conductive film having a region located on the fifth insulating film and functioning as a gate electrode of the second transistor; a fifth conductive film having a region located over the fourth insulating film and a region in contact with a top surface of the second oxide semiconductor film in a second opening of the fourth insulating film, the fifth conductive film functioning as one of a source electrode and a drain electrode of the second transistor; an upper surface of the second oxide semiconductor film, a side surface of the fifth insulating film, a side surface of the fourth conductive film, and an upper surface of the fourth conductive film have regions in contact with the fourth insulating film; In a cross-sectional view in a channel length direction of the first transistor, a width of the first conductive film in the channel length direction of the first transistor is larger than a width of the third insulating film in the channel length direction of the first transistor; the first opening does not overlap with the first conductive film, the first transistor and the second transistor have different channel lengths; The semiconductor device, wherein the second transistor is a transistor with a single gate structure.

2. A semiconductor device having a first transistor and a second transistor on a substrate, a first conductive film located on the substrate and functioning as a first gate electrode of the first transistor; a first insulating film having a region in contact with an upper surface of the first conductive film; a second insulating film having a region in contact with an upper surface of the first insulating film; a first oxide semiconductor film having a region in contact with an upper surface of the second insulating film and including a channel formation region of the first transistor; a third insulating film having a region in contact with an upper surface of the first oxide semiconductor film; a second conductive film located on the third insulating film and functioning as a second gate electrode of the first transistor; a fourth insulating film having a region in contact with an upper surface of the second insulating film, a region in contact with an upper surface of the first oxide semiconductor film, a region in contact with a side surface of the third insulating film, a region in contact with a side surface of the second conductive film, and a region in contact with the upper surface of the second conductive film; a third conductive film having a region located over the fourth insulating film and a region in contact with the first oxide semiconductor film in a first opening of the fourth insulating film, the third conductive film functioning as one of a source electrode and a drain electrode of the first transistor; a second oxide semiconductor film having a region in contact with a top surface of the second insulating film and including a channel formation region of the second transistor; a fifth insulating film having a region in contact with an upper surface of the second oxide semiconductor film; a fourth conductive film located on the fifth insulating film and functioning as a gate electrode of the second transistor; a fifth conductive film having a region located over the fourth insulating film and a region in contact with a top surface of the second oxide semiconductor film in a second opening of the fourth insulating film, the fifth conductive film functioning as one of a source electrode and a drain electrode of the second transistor; an upper surface of the second oxide semiconductor film, a side surface of the fifth insulating film, an upper surface of the fifth insulating film, a side surface of the fourth conductive film, and an upper surface of the fourth conductive film have regions in contact with the fourth insulating film; In a cross-sectional view in a channel length direction of the first transistor, a width of the first conductive film in the channel length direction of the first transistor is larger than a width of the third insulating film in the channel length direction of the first transistor; the first opening does not overlap with the first conductive film, the first transistor and the second transistor have different channel lengths; In a cross-sectional view in a channel length direction of the second transistor, a width of the fifth insulating film in the channel length direction of the second transistor is larger than a width of the fourth conductive film in the channel length direction of the second transistor; The semiconductor device, wherein the second transistor is a transistor with a single gate structure.

3. In claim 1 or 2, the first oxide semiconductor film includes a pair of low-resistance regions sandwiching a channel formation region of the first transistor; the third conductive film has a region in contact with one of the pair of low-resistance regions.

4. In any one of claims 1 to 3, the first oxide semiconductor film includes a metal oxide containing indium; the second oxide semiconductor film includes a metal oxide containing indium.

Images