Multilevel Converter with Voltage Divider for Precharging Flying Capacitors

Abstract

The multilevel converter includes a flying capacitor and a resistive voltage divider. The multilevel converter is configured to convert an input voltage to an output voltage. The resistive voltage divider is configured to charge the flying capacitors in the multilevel converter during an initial charging mode of operation. In some implementations, the multilevel converter includes a plurality of resistive voltage dividers, including a plurality of flying capacitors and a resistive voltage divider for each flying capacitor in the plurality of flying capacitors.

Description

[Technical Field]

[0001] The present invention relates generally to a system and method for precharging flying capacitors for multilevel converters, and more particularly to a multilevel converter for precharging flying capacitors at start-up. [Background technology]

[0002] In a typical N-level converter, it is relatively easy to maintain a voltage of approximately 1 / (N-1) of the input voltage across the flying capacitor during steady-state operation. However, during startup, the flying capacitor must be precharged before the multilevel converter can operate in steady state. Until the positive terminal of the flying capacitor is charged to the desired voltage, the multilevel converter may experience faults and other types of failures. Many multilevel converters include a separate charging circuitry to precharge the flying capacitor during startup to achieve the desired voltage. The additional charging circuitry increases the circuit complexity and area of ​​the multilevel converter on an integrated circuit. In addition, the separate charging circuitry complicates the control of the multilevel converter. Summary of the Invention [Means for solving the problem]

[0003] The present invention addresses the circuit and control complexity and large area disadvantages associated with separate charging circuits for precharging the flying capacitors in conventional multilevel converters described above by providing a resistive voltage divider for precharging the flying capacitors. The present invention comprises a multilevel converter with a resistive voltage divider configured to precharge the flying capacitors during an initial charging phase, as described herein. Once the flying capacitors are charged to an appropriate voltage, the multilevel converter transitions to a normal operating mode. The resistive voltage divider comprises passive components that occupy less area than a separate charging circuit. Additionally, the passive components simplify control of the multilevel converter compared to incorporating a separate charging circuit into the multilevel converter.

[0004] The multi-level converter is an N-level converter that includes N-1 upper and N-1 lower transistors, N-2 flying capacitors, and N-2 resistive voltage dividers. The upper transistors are connected in series with each other and with the lower transistors, which are also connected in series with each other. Each flying capacitor is connected across one or more of the upper transistors and one or more of the lower transistors. Each resistive voltage divider is connected to one of the flying capacitors and configured to charge the respective flying capacitor during an initial charging operation phase.

[0005] Each resistive voltage divider includes a first resistor and a second resistor. The ratio of the resistance of the first resistor to the resistance of the second resistor is selected based on a desired voltage on the positive terminal of the flying capacitor. The resistances of the resistors are selected to regulate the charging rate of the flying capacitor. A controller enables a charging path from the resistive voltage divider through the flying capacitor to the ground node during an initial charging phase of operation and monitors the voltage on the positive terminal of the flying capacitor. In response to the voltage on the positive terminal of the flying capacitor satisfying a voltage reference, the controller may transition the multilevel converter from the initial charging phase of operation to a steady-state phase of operation.

[0006] These and other preferred features set forth herein, including various novel details of implementation and combination of elements, will now be more particularly described with reference to the accompanying drawings and pointed out in the claims. It is to be understood that the specific methods and apparatus are shown by way of example only and not as limitations of the claims. As will be understood by those skilled in the art, the principles and features of the teachings herein may be employed in various and numerous embodiments without departing from the scope of the claims.

[0007] The features, objects, and advantages of the present disclosure will become more apparent from the detailed description set forth below when taken in conjunction with the drawings in which like reference characters identify correspondingly throughout. [Brief explanation of the drawings]

[0008] [Figure 1] 1 illustrates a schematic diagram of a three-level converter with flying capacitors in accordance with an exemplary embodiment of the present invention; [Figure 2] FIG. 1 illustrates a schematic diagram of a four-level converter with two flying capacitors in accordance with an exemplary embodiment of the present invention. [Figure 3] FIG. 1 illustrates a schematic diagram of a hybrid converter with flying capacitors in accordance with an exemplary embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0009] In the following detailed description, reference will be made to certain embodiments. These embodiments will be described in sufficient detail to enable those skilled in the art to practice them. It will be understood that other embodiments may be utilized and that various structural, logical, and electrical changes may be made. The combinations of features disclosed in the following detailed description may not be necessary to practice the teachings in the broadest sense, but are instead taught merely to describe particularly representative examples of the present teachings.

[0010] FIG. 1 illustrates a flying capacitor C according to an exemplary embodiment of the present invention. FLY 1 illustrates a schematic diagram of a three-level converter 100 comprising two upper transistors Q1, Q2, two lower transistors Q3, Q4, and a capacitor C FLY , C BUS and C OUT , resistor R C1 and R C2 , and inductor L OUT Transistors Q1-Q4 are n-type field effect transistors (FETs). In some implementations, transistors Q1-Q4 are gallium nitride (GaN) FETs, metal oxide semiconductor (MOS) FETs, bipolar junction transistors (BJTs), or any suitable type or combination of transistors.

[0011] The upper level transistors Q1 and Q2 are connected in series with each other and with the lower level transistors Q3 and Q4, which are also connected in series with each other. The drain terminal of Q1 is connected to V IN and the source terminal of Q4 is connected to ground 105. Capacitor C BUS is connected to the input node 110 and to ground 105. Capacitor C FLY is connected at node 120 between Q1 and Q2 and at node 130 between Q3 and Q4.

[0012] resistor R C1 is connected to the input node 110 and to the capacitor C FLY and between transistors Q1 and Q2. Resistor R C2 is connected to the capacitor C FLY and between transistors Q1 and Q2 and ground 105. Resistor R C1 is the resistor R C2 Resistor R works in conjunction with the resistor R to act as a resistive voltage divider. C1 and resistor R C2 The ratio of node 120 and capacitor CFLY is used to determine the voltage at the positive terminal of the inductor L OUT is applied between transistors Q2 and Q3 at node 140 and V OUT and an output node 150 configured to provide a capacitor C OUT is connected to the output node 150 and to ground 105.

[0013] In response to being powered up, the three-level converter 100 connects the capacitor C FLY During the initial charge mode, transistor Q4 is turned on to charge R from input node 110 before passing through transistor Q4 to ground 105. C1 and R C2 through a resistor divider to the capacitor C FLY until the capacitor C FLY Provides a charging path for R C1 resistance and R C2 The ratio of the resistors at node 120 and capacitor C FLY The voltage at the positive terminal of IN or the input voltage V corresponding to the leakage from transistors Q1 to Q4. IN until the capacitor C FLY The expected input voltage V IN The value of the resistor is also chosen based on the capacitor C FLY The charge current to the capacitor C is chosen to control the amount of time required to charge it. FLY is charged, the three-level converter 100 transitions to normal operation mode, and the capacitor C FLY The voltage on the positive terminal of IN is maintained at about half of the original value.

[0014] Before steady-state operation, capacitor C FLYIn contrast to conventional multilevel converters that use an independent power system to charge the three-level converter 100, the three-level converter 100 uses passive components in a resistive voltage divider that occupies a much smaller area than an independent charging system. C1 and R C2 does not add complexity to the control of the three-level converter 100. In some embodiments, the resistor R C2 is already included in a conventional three-level converter as a voltage sensing resistor to provide voltage information to the controller, so that the only additional component included to create the resistive voltage divider to charge the flying capacitor is resistor R. C1 is.

[0015] The resistive voltage divider used to charge the flying capacitors can be extended from a three-level converter to other multilevel converters and multilevel inverters. An N-level flying capacitor multilevel converter includes (N-1) upper transistors and (N-1) lower transistors, (N-2) flying capacitors, and (N-2) resistive voltage dividers. FIG. 2 shows a diagram of a three-level converter with two flying capacitors C according to an exemplary embodiment of the present invention. F1 and C F2 2 illustrates a schematic diagram of a four-level converter 200 having a

[0016] The four-level converter 200 of FIG. 2 is similar to the three-level converter 100 illustrated in FIG. 1, but includes additional transistors Q5 and Q6, an additional flying capacitor C F2 , and resistor R C21 and R C22 Similar to the three-level converter 100, the four-level converter 200 includes an additional resistive voltage divider including a flying capacitor C F1 and C F2 and a passive component R in the first resistor divider to reduce power consumption compared to an independent power system. C11 and R C12 and the second resistor divider R C21 and R C22 Use.

[0017] Transistors Q1 to Q6 are n-type FETs connected together in series. The drain terminal of Q1 is connected to V IN and the source terminal of Q6 is connected to ground 205. Capacitor C BUS is connected to the input node 210 and to ground 205. Capacitor C F1 is connected between Q1 and Q2 at node 220 and between Q5 and Q6 at node 230. Resistor R C11 is connected to input node 210 and to capacitor C F1 and between transistors Q1 and Q2. Resistor R C12 is connected to the capacitor C F1 and between transistors Q1 and Q2 and ground 205. Resistor R C11 is the first flying capacitor C F1 Resistor R C12 acts in cooperation with the resistors as a voltage divider.

[0018] Capacitor C F2 is connected between Q2 and Q3 at node 240 and between Q4 and Q5 at node 250. Resistor R C21 is connected to node 220 and to node 240 by capacitor C F2 Connected to resistor R C22 is connected to the capacitor C F2 and ground 205. Resistor R C21 is the second flying capacitor C F2 Resistor R C22 It acts as a resistive voltage divider in cooperation with the inductor L OUT is applied between transistors Q3 and Q4 at node 260 and V OUT 2. A capacitor C OUT is connected to the output node 270 and to ground 205.

[0019] In response to being powered up, the four-level converter 200 connects the flying capacitor C F1 and C F2 During the initial charge mode, transistor Q6 is turned on to charge R C11 and R C12 through a resistor divider to the capacitor C F1 until the capacitor C F1 Provides a charging path for the capacitor C F1 is connected to node 220 and capacitor C F1 The voltage at the positive terminal of IN or the input voltage V IN It will charge to slightly more than 2 / 3 of its capacity.

[0020] First, capacitor C F1 When the capacitor C is charged F1 While R is charging, transistor Q5 is turned on, allowing current to flow from input node 210 through transistors Q5 and Q6 before reaching ground 205. C11 and R C12 through the first resistor divider, R C21 and R C22 through a second resistor divider to capacitor C F2 until the capacitor C F2 Provides a charging path for the capacitor C F2 is connected to node 240 and capacitor C F2 is charged until the voltage at the positive terminal of is approximately 1 / 3 of the voltage at node 220, or slightly more than 1 / 3 of the voltage at node 220, corresponding to leakage from transistors Q1-Q6. F2 is charged, the four-level converter 200 transitions to normal operation mode, and the capacitor C F1 and the voltage on the positive terminal of capacitor C F2 The voltages on the positive terminals of the are maintained at their respective values.

[0021] In addition to multilevel converters with more than two levels, the resistive voltage divider used to charge the flying capacitor can be extended to hybrid converters that combine a multilevel converter with other types of converters, such as a buck-boost converter, a bootstrap converter, etc. Figure 3 illustrates a schematic diagram of a hybrid converter 300 that combines a converter and a synchronous buck according to an exemplary embodiment of the present invention. The hybrid converter 300 is similar to the three-level converter 100 illustrated in Figure 1, but includes a capacitor C connected between transistors Q2 and Q3 at node 340. MID In addition, the inductor L OUT is connected between transistors Q3 and Q4 at node 330 rather than at node 340. Hybrid converter 300 is configured to charge capacitor C through transistor Q4 during the initial charging phase. FLY Resistor R that charges C1 and R C2 The resistor divider includes:

[0022] The above description and drawings should be considered as merely illustrative of specific embodiments that achieve the features and advantages described herein. Modifications and substitutions of specific process conditions can be made. Therefore, embodiments of the present invention should not be considered as limited by the above description and drawings. [Explanation of symbols]

[0023] 100 3-level converter 105 Grand 110 Input Nodes 120, 130, 140 nodes 150 output nodes 200 4-level converter 205 grand 210 input nodes 220, 230, 240, 250, 260 nodes 270 Output Nodes 300 Hybrid Converter 330, 340 nodes C BUS , C OUT capacitor C FLY Flying Capacitor C F1 , C F2 Flying Capacitor C MID capacitor L OUT inductor Q1, Q2 upper transistor Q3, Q4 lower transistors Q5, Q6 transistors R C1 , R C2 resistor R C11 , R C12 resistor R C21 , R C22 resistor

Claims

1. a flying capacitor multilevel converter configured to convert an input voltage to an output voltage; a resistive voltage divider configured to passively charge a flying capacitor in the flying capacitor multilevel converter during an initial charging mode of operation, the resistive voltage divider comprising a first resistor and a second resistor electrically connected in series between an input node and ground, a node between the first resistor and the second resistor, a first terminal of the first resistor connected to the input node, a second terminal of the first resistor connected directly to the node, a first terminal of the second resistor connected directly to the node, a second terminal of the second resistor connected directly to the ground, the node connected directly to the flying capacitor, and the second resistor being a voltage sensing resistor for providing voltage information to a controller based on a current flowing through the second resistor; A multilevel converter comprising:

2. 10. The multilevel converter of claim 1, wherein the flying capacitor multilevel converter comprises a plurality of flying capacitors, and the multilevel converter further comprises a resistive voltage divider connected to each flying capacitor.

3. 2. The multilevel converter of claim 1, wherein a ratio of the resistance of the first resistor to the resistance of the second resistor is selected based on a desired voltage on the positive terminal of the flying capacitor.

4. 2. The multilevel converter of claim 1, wherein the resistance of the first resistor and the resistance of the second resistor are selected to control the charging rate of the flying capacitor.

5. 10. The multilevel converter of claim 1, further comprising: a controller, wherein during the initial charging mode of operation, the controller is configured to enable a charge path from the resistive voltage divider through the flying capacitor to a ground node.

6. 6. The multilevel converter of claim 5, wherein the controller is further configured to transition the flying capacitor multilevel converter from the initial charging mode of operation to a normal mode of operation once the flying capacitor is charged.

7. N-1 upper transistors connected in series; N-1 lower transistors connected in series, the N-1 lower transistors connected in series with the N-1 upper transistors; N-2 flying capacitors, each flying capacitor connected across one or more of the upper transistors and one or more of the lower transistors; N-2 resistive voltage dividers, each configured to passively charge one of the flying capacitors, each resistive voltage divider comprising a first resistor and a second resistor electrically connected in series between an input node and ground, a node between the first resistor and the second resistor, a first terminal of the first resistor connected to the input node, a second terminal of the first resistor connected directly to the node, a first terminal of the second resistor connected directly to the node, a second terminal of the second resistor connected directly to the ground, the node connected directly to one of the flying capacitors, and the second resistor being a voltage sensing resistor for providing voltage information to a controller based on a current flowing through the second resistor; An N-level flying capacitor multilevel converter comprising:

8. 8. The N-level flying capacitor multilevel converter of claim 7, wherein the resistive voltage divider is configured to charge the flying capacitor during an initial charging operation phase.

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