Characterization system and method

Abstract

To solve a problem in which a manual cleaning process and a machine set-up process are lengthy and often require complex calibration processes.SOLUTION: A cleaning assembly disclosed herein includes a substrate. One or more patterns are formed on a bottom surface of the substrate. One or more structures in the one or more patterns attract one or more particles from the chuck via at least one of electrostatic attraction or mechanical trapping when the substrate is placed on the chuck.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates generally to chuck cleaning, and more particularly to in situ process chamber chuck cleaning. [Background technology]

[0002] CROSS-REFERENCE TO RELATED APPLICATIONS This application claims the benefit under 35 U.S.C. § 119(e) of U.S. Provisional Patent Application No. 62 / 859,587, entitled "In Situ Process Chamber Chuck Cleaning by Dummy Substrate," filed June 10, 2019, naming Mor Azaria, Giampietro Bieli, Shai Mark, Adi Pahima, and Yoram Uziel as inventors, which is incorporated herein by reference in its entirety. This application also claims the benefit under 35 U.S.C. § 119(e) of U.S. Provisional Patent Application No. 62 / 910,139, entitled IN-SITU PROCESS CHAMBER CHUCK CLEANING BY CLEANING SUBSTRATE, filed October 3, 2019, naming Mor Azaria, Giampietro Bieli, Shai Mark, Adi Pahima, and Yoram Uziel as inventors, which is incorporated herein by reference in its entirety.

[0003] Chuck cleaning is frequently required due to the presence of particles within process chambers. These particles can be introduced into a process chamber in a variety of ways. Contamination particles can be generated by materials used by a process tool accumulating on the walls of the process chamber. Particulate matter from these materials can then fall off the walls of the process chamber during processing. In addition, foreign particles can be carried into the process chamber on external objects, such as wafers. Particles can cause the wafer to come into uneven contact with a given process tool's process chuck, which can lead to uneven temperature levels across the wafer during processing. Currently, chuck cleaning is performed by opening the equipment and using manual cleaning processes. Often, the chuck is manually cleaned using tissues or brushes. In such cases, the cleaning process requires shutting down the machine, purging the vacuum, and cooling the equipment. Additionally, access to the chuck is highly limited, and access to the wafer chuck for a given process tool likely requires opening the process chamber cover. This manual cleaning process and machine setup process are lengthy and often require complex calibration processes. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] U.S. Patent Application Publication No. 2015 / 0261104 [Patent Document 2] U.S. Patent No. 5,622,413 Summary of the Invention [Problem to be solved by the invention]

[0005] It would therefore be advantageous to provide a system and method that ameliorate the above-identified shortcomings of conventional approaches. [Means for solving the problem]

[0006] A cleaning assembly is disclosed according to one or more embodiments of the present disclosure. In one embodiment, the cleaning assembly includes a substrate. In another embodiment, one or more patterns are formed on a bottom surface of the substrate. In another embodiment, one or more structures in the one or more patterns attract one or more particles from the chuck via at least one of electrostatic attraction or mechanical trapping when the substrate is placed on the chuck.

[0007] A system according to one or more embodiments of the present disclosure is disclosed. In one embodiment, the system includes a process chamber. The process chamber can accommodate one or more chucks. In another embodiment, the system includes a handling apparatus. The handling apparatus may be configured to receive a cleaned substrate cabinet that accommodates one or more cleaned substrates. The handling apparatus may be further configured to transfer the one or more cleaned substrates from the cleaned substrate cabinet to one or more wafer chucks in the process chamber. In another embodiment, one or more patterns are formed on a bottom surface of the one or more cleaned substrates. In another embodiment, one or more structures in the one or more patterns attract one or more particles from the one or more wafer chucks via at least one of electrostatic attraction or mechanical trapping when the one or more cleaned substrates are placed on the one or more wafer chucks.

[0008] A characterization system is disclosed in accordance with one or more embodiments of the present disclosure. In one embodiment, the characterization system includes a characterization subsystem. The characterization subsystem may be configured to inspect a portion of a wafer disposed on a chuck of a process tool. The characterization subsystem may be further configured to generate characterization data based on the inspection of the portion of the wafer disposed on the chuck of the process tool. In another embodiment, the characterization system includes a controller including one or more processors configured to receive the inspection data from the characterization subsystem. In another embodiment, the characterization system includes a controller including one or more processors configured to determine one or more cleaning parameters based on the characterization data. In another embodiment, the characterization system includes a controller including one or more processors configured to direct one or more robot assemblies to position the cleaned substrate on the chuck of the process tool.

[0009] A method according to one or more embodiments of the present disclosure is disclosed. In one embodiment, the method can include providing a cleaned substrate in a cleaned substrate cabinet. In another embodiment, the method can include transferring the cleaned substrate from the cleaned substrate cabinet via a handling device onto a wafer chuck housed in a process chamber. In another embodiment, the method can include cleaning a surface of a wafer chuck with the cleaned substrate, wherein one or more patterns are formed on a bottom surface of the cleaned substrate. In another embodiment, one or more structures in the one or more patterns attract one or more particles from the chuck via at least one of electrostatic attraction or mechanical trapping when the cleaned substrate is placed on the chuck.

[0010] It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not necessarily restrictive of the invention as claimed. The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and, together with the general description, serve to explain the principles of the invention.

[0011] The many advantages of the present disclosure may be better understood by those skilled in the art by reference to the accompanying drawings. [Brief explanation of the drawings]

[0012] [Figure 1] FIG. 1 is a simplified schematic diagram of a wafer processing system in accordance with one or more embodiments of the present disclosure. [Figure 2A] 1 is a simplified schematic diagram of a process chamber illustrating the processing of a wafer in accordance with one or more embodiments of the present disclosure. [Figure 2B] FIG. 1 is a simplified schematic diagram of a process chamber illustrating the incorporation of a cleaning assembly in accordance with one or more embodiments of the present disclosure. [Figure 3A] FIG. 1 is a simplified schematic diagram of a cleaning assembly including a cleaning substrate according to one or more embodiments of the present disclosure. [Figure 3B] FIG. 1 is a simplified schematic diagram of a cleaning assembly including a cleaning substrate and a power supply according to one or more embodiments of the present disclosure. [Figure 3C] FIG. 1 is a simplified schematic diagram of a cleaning assembly including a cleaning substrate and a power supply according to one or more embodiments of the present disclosure. [Figure 3D] 1 is a simplified schematic diagram of a cleaning assembly including a cleaning substrate and a reservoir according to one or more embodiments of the present disclosure. [Figure 3E] 1 is a simplified schematic diagram of a cleaning assembly including a cleaning substrate and a reservoir according to one or more embodiments of the present disclosure. [Figure 3F] 1 is a simplified schematic diagram of a cleaning assembly including a cleaning substrate and a reservoir according to one or more embodiments of the present disclosure. [Figure 3G] 1 is a simplified schematic diagram of a cleaning assembly including a cleaning substrate and a gas reservoir according to one or more embodiments of the present disclosure. [Figure 4] 1A-1C are simplified top views of one or more patterns formed on a surface of a cleaning substrate in accordance with one or more embodiments of the present disclosure. [Figure 5] 1 is a flow chart illustrating a method for cleaning a wafer chuck of a process tool using a cleaning assembly in accordance with one or more embodiments of the present disclosure. [Figure 6] FIG. 1 is a simplified schematic diagram of a characterization system configured to direct the performance of cleaning of a wafer chuck of a process tool in accordance with one or more embodiments of the present disclosure. [Figure 7] 1 is a flow chart illustrating a method for determining cleaning efficiency of a cleaning substrate in accordance with one or more embodiments of the present disclosure. [Figure 8] FIG. 1 illustrates an exemplary implementation of inspection and review-driven cleaning efficiency determination in accordance with one or more embodiments of the present disclosure. [Figure 9] 1 is a flow chart illustrating a method for cleaning triggered by characterization of a wafer chuck of a process tool in accordance with one or more embodiments of the present disclosure. [Figure 10] 1 is a simplified schematic diagram of an exemplary wafer transport apparatus in accordance with one or more embodiments of the present disclosure. [Figure 11] 1 is a simplified top view of an exemplary wafer transport apparatus in accordance with one or more embodiments of the present disclosure. DETAILED DESCRIPTION OF THE INVENTION

[0013] Reference will now be made in detail to the disclosed subject matter, which is illustrated in the accompanying drawings.

[0014] 1-11, an in situ chuck cleaning system and method will be described in accordance with one or more embodiments of the present disclosure.

[0015] Embodiments of the present disclosure are directed to in situ chuck cleaning systems and methods for cleaning process tool chucks. More particularly, the present disclosure is directed to cleaning substrates suitable for cleaning process tool chucks. The cleaning substrates may include one or more patterns formed on a surface of the cleaning substrate that attract particles from the process tool chuck using at least one of electrostatic attraction, mechanical trapping, or the like. Embodiments of the present disclosure are also directed to cleaning triggered by characterization of the process tool chuck.

[0016] FIG. 1 illustrates a wafer processing system 100 in accordance with one or more embodiments of the present disclosure. In one embodiment, the processing system 100 includes one or more process chambers 102 configured to perform one or more semiconductor manufacturing processes. For example, the one or more semiconductor manufacturing processes may include, but are not limited to, one or more lithography processes, such as substrate preparation, spin coating, a pre-bake process, an exposure process, a post-exposure bake process, a development process, and a post-bake process. For example, the one or more lithography processes may include, but are not limited to, a patterning process, an etching process, a stripping process, an annealing process, a chemical mechanical planarization (CMP) process, and the like. As another example, the one or more semiconductor manufacturing processes may include, but are not limited to, one or more film deposition processes. For example, the one or more film deposition processes may include, but are not limited to, a chemical vapor deposition (CVD) process, a physical vapor deposition (PVD) process, and the like. It should be noted herein that the processing system 100 may include one or more process chambers 102 having the same capacity (e.g., performing the same manufacturing process) or one or more process chambers 102 having different capacity (e.g., performing different manufacturing processes) to improve throughput.

[0017] In another embodiment, the processing system 100 includes one or more wafer transport apparatuses 104 (e.g., front-opening universal pods (FOUPs)) configured to transport wafer lots. It should be noted that for purposes of this disclosure, the terms "FOUP" and "wafer transport apparatus" may be used interchangeably herein unless otherwise noted. A description of the use of wafer transport apparatuses is provided in U.S. Patent Publication No. 2019 / 0295874, published September 26, 2019, which is incorporated herein by reference in its entirety. Additionally, a description of the use of wafer transport apparatuses is provided in U.S. Patent Publication No. 10,177,020, issued January 8, 2019, which is incorporated herein by reference in its entirety.

[0018] In another embodiment, the processing system 100 includes a handling apparatus 106. For example, the handling apparatus 106 may be configured to receive a cleaned substrate cabinet 120 containing one or more cleaned substrates 216. As another example, the handling apparatus 106 may be configured to receive one or more FOUPs 104 containing wafer lots (e.g., wafers 210). In another embodiment, the handling apparatus 106 includes a robot assembly 110 configured to extract at least one of the wafers 210 from the wafer lot of the FOUP 104 or the cleaned substrates 216 from the cleaned substrate cabinet 120. The processing system 100 may include any handling apparatus 106 known in the art. For example, the processing system 100 may include an atmospheric handling apparatus. For example, the atmospheric handling apparatus may be at or near atmospheric pressure. As another example, the processing system 100 may include a vacuum handling apparatus. For example, the vacuum handling apparatus may be at or near vacuum pressure. For purposes of this disclosure, "vacuum pressure" is understood to mean any pressure lower than atmospheric pressure.

[0019] In another embodiment, the cleaning substrate cabinet 120 is configured to prepare one or more cleaning substrates 216 for an operation (e.g., cleaning the process chuck 212). For example, the cleaning substrate cabinet 120 can prepare different cleaning substrates based on one or more parameters (e.g., particle size, particle material, etc.). For example, the cleaning substrate cabinet 120 can prepare a first cleaning substrate 216 that is used to remove first particles 214 on the first wafer 210. In a further example, the cleaning substrate cabinet 120 can prepare additional cleaning substrates 216 that are used to remove additional particles 214 on the first wafer 210 and / or additional wafers 210.

[0020] In another embodiment, the cleaning substrate cabinet 120 is configured to clean the cleaning substrate 216 such that the cleaning substrate 216 can be configured for multiple cleaning cycles. For example, the cleaning substrate cabinet 120 can clean the cleaning substrate 216 using either a wet or dry cleaning method. For example, the cleaning substrate cabinet 120 can utilize a dry cleaning method such as carbon dioxide (CO2) snow cleaning. In a further example, the cleaning substrate cabinet 120 can utilize a wet cleaning method such as megasonic cleaning.

[0021] As used throughout this disclosure, the term "wafer" refers to a substrate formed of semiconductor and / or non-semiconductor materials. For example, semiconductor or semiconductor materials can include, but are not limited to, monocrystalline silicon, gallium arsenide, and indium phosphide. Therefore, the above description should not be construed as limiting the scope of the present disclosure, but rather as merely illustrative.

[0022] In another embodiment, the processing system 100 includes a pre-alignment (P / A) module 108 configured to align the wafer 210 or cleaning substrate 216. For example, the P / A module 108 may include one or more optical sensors configured to detect a notch on a surface (e.g., top or bottom) of the wafer 210 or cleaning substrate 216. After the notch is detected, the P / A module 108 may locate the center of the wafer 210 or cleaning substrate 216 using any algorithm known in the art.

[0023] In another embodiment, the processing system 100 includes a load lock apparatus 114 configured to receive at least one of the wafer 210 or the cleaning substrate 216. The load lock apparatus 114 may include any load lock apparatus 114 known in the art, including, but not limited to, a vacuum load lock apparatus, an atmospheric load lock apparatus, etc. For example, the load lock apparatus 114 may be an atmospheric load lock apparatus 114. For example, the atmospheric load lock apparatus 114 may be configured to receive at least one of the wafer 210 or the cleaning substrate 216 while at or near atmospheric pressure (14.696 psi).

[0024] In another embodiment, the load lock apparatus 114 housing at least one of the wafer 210 or cleaning substrate 216 is configured to receive air until a sufficient pressure level is achieved. For example, the load lock apparatus 114 may be configured to receive air until the load lock apparatus 114 is under high vacuum pressure (e.g., 10 -5 ~10 -8 ) may be configured to receive air.

[0025] 2A shows a simplified schematic diagram of the process chamber 102 illustrating the processing of a wafer 210 in accordance with one or more embodiments of the present disclosure. FIG. 2B shows a simplified schematic diagram of the process chamber 102 illustrating the incorporation of a cleaning assembly 300 in accordance with one or more embodiments of the present disclosure.

[0026] In another embodiment, the processing system 100 includes a handling device 112 configured to transport (e.g., deliver) at least one of a wafer 210 or a cleaning substrate 216 to a chuck 212 in one or more process chambers 102 via a robot assembly 116.

[0027] In another embodiment, the robot assembly 116 includes a robot 200 and an end effector 202. Although not shown, the robot assembly 110 may also include a robot and an end effector. It is noted herein that the robot assemblies 110, 116 may include any type of robot known in the art. For example, the robot assemblies 110, 116 may include at least one of an atmospheric robot or a vacuum robot. For example, the robot assemblies 110, 116 may include at least one of an atmospheric internal rotation robot or a vacuum internal rotation robot.

[0028] It is noted herein that the various systems and subsystems within the processing system 100 may share any number of components. For example, the system 100 may share one or more components of one or more robot assemblies 110, 116. As another example, the system 100 may share one or more components of the handling devices 106, 112.

[0029] In another embodiment, the end effector 202 includes an edge gripper 204 configured to interact with at least one of the wafer 210 ( FIG. 2A ) or the cleaning substrate 216 ( FIG. 2B ) to remove the at least one of the wafer 210 or the cleaning substrate 216 from the handling apparatus 112 and insert the at least one of the wafer 210 or the cleaning substrate 216 into one or more process chambers 102. For example, the edge gripper 204 may be configured to insert the wafer 210 into one or more process chambers 102 so that the one or more process chambers 102 can begin one or more semiconductor manufacturing processes. As another example, the edge gripper 204 may be configured to insert the cleaning substrate 216 into one or more process chambers 102 to begin a cleaning process described herein after the chuck 212 has accommodated the one or more particles 214.

[0030] 2A shows the wafer 210 depositing one or more particles 214 onto the chuck 212, it should be noted that such depiction is provided for illustrative purposes only and should not be construed as limiting the scope of the present disclosure. For example, one or more walls of the process chamber 102 can deposit one or more particles 214 onto the chuck 212.

[0031] In another embodiment, the robot assembly 116 is configured to remove at least one of the wafer 210 or the cleaning substrate 216 from one or more process chambers 102. For example, the edge gripper 204 of the end effector 202 may be configured to remove at least one of the wafer 210 or the cleaning substrate 216. For example, the edge gripper 204 may be configured to remove the wafer 210 from one or more process chambers 102 after one or more semiconductor manufacturing processes are completed. In a further example, the edge gripper 204 may be configured to remove the cleaning substrate 216 from one or more process chambers 102 after the chuck 212 has been cleaned (further described in FIGS. 3A-3E).

[0032] In another embodiment, the handling device 112 includes a gate 206. In another embodiment, the gate 206 includes an actuator 208 configured to open and close the gate 206. For example, the actuator 208 may open the gate 206 when the robot assembly 116 is ready to remove and / or insert at least one of the wafer 210 or the cleaning substrate 216. As another example, the actuator 208 may close the gate 206 when the robot assembly 116 has finished removing and / or inserting at least one of the wafer 210 or the cleaning substrate 216. It is noted herein that the gate 206 may include any actuator 208 known in the art. For example, the gate 206 may include a hydraulic actuator, an electric actuator, a mechanical actuator, etc.

[0033] In another embodiment, the processing system 100 uses at least one of the robot assembly 116 or the robot assembly 110 to return at least one of the wafer 210 or the cleaning substrate 216 to the FOUP 104. For example, the processing system 100 can return the wafer 210 to the FOUP 104 via the robot assemblies 110, 116 before the cleaning substrate 216 is transferred (e.g., delivered) to one or more process chambers 102. For example, the cleaning substrate 216 may be transferred (e.g., delivered) to one or more process chambers 102 after the wafer 210 is removed so that the cleaning substrate 216 can remove one or more particles 214 from the chuck 212 in the one or more process chambers 102.

[0034] It should be noted herein that the conditions of the process chamber 102 may vary. For example, the process chamber 102 may have a temperature between 180°C and 520°C. For example, during chemical vapor deposition (CVD), the process chamber 102 may have a temperature between 420°C and 520°C. In another example, during etching, the process chamber 102 may have a temperature of at least 180°C. As another example, the process chamber 102 may have a vacuum level between 0 and 1.0 mTorr at the base pressure. As another example, the process chamber 102 may have a vacuum level between 0.5 mTorr and 100 Torr at the process pressure. For example, during CVD, the process pressure may be between 2.0 and 10.0 torr 95% of the time and 100 torr or less 5% of the time. In another example, during etching, the process pressure may be between 0.5 and 400 mTorr 95% of the time and 400 mTorr or less 5% of the time.

[0035] Additionally, it should be noted that the process chamber 102 may be configured to hold wafers and / or cleaning substrates of any dimensions. For example, the process chamber 102 may be configured to hold wafers 210 and / or cleaning substrates 216 having heights between 1.0 and 10 mm. For example, the wafers 210 and / or cleaning substrates 216 may have a height of 3.0 mm.

[0036] In one embodiment, the conditions of the process chamber 102 limit the amount of time that the cleaning substrate 216 and / or wafer 210 can be maintained within the process chamber 102. For example, the temperature of the process chamber 102 may limit the amount of time that the cleaning substrate 216 and / or wafer 210 can be maintained within the process chamber 102. The net radiant power (P) of the cleaning substrate 216 can be described as follows:

number

[0037] In Equation 1, ∈ is the emissivity of the cleaning substrate, and σ is Boltzmann's constant (5.67037×10 -8 watts / m 2 K 4 ) and A s,r is the area of ​​the emitter (e.g., cleaning substrate 216), T is the temperature of the emitter (e.g., cleaning substrate 216), and T c is the temperature of the surroundings (e.g., the process chamber 102). The amount of thermal energy (Q) that the particle 214 gains or loses can be written as:

number

[0038] In Equation 2, m is the mass of the particle and C p is the heat capacity of the particle and ΔT is the change in temperature of the particle. Heat transfer by radiation (P) is equal to the amount of heat transferred (Q) as follows:

number

number

[0039] Solving equations 3 and 4 for t gives the time to failure (t) based on an approximate failure temperature (e.g., 130°C).

[0040] 3A-3E illustrate a cleaning assembly 300 including a cleaning substrate 216 in accordance with one or more embodiments of the present disclosure. In one embodiment, the cleaning assembly 300 includes a cleaning substrate 216 (as shown in FIGS. 2A and 2B). For example, the cleaning substrate 216 may include a ceramic wafer. As another example, the cleaning substrate 216 may include a substrate shaped as a semiconductor wafer. It is noted herein that the dimensions of the cleaning substrate 216 may be varied to optimize cleaning of the chuck 212, thereby allowing the cleaning substrate 216 to be handled as if it were a standard silicon wafer (e.g., wafer 210).

[0041] FIG. 4 shows a simplified top view of one or more patterns 302 formed on a surface (eg, top or bottom) of a cleaning substrate 216 in accordance with one or more embodiments of the present disclosure.

[0042] In another embodiment, one or more patterns 302 are formed on a surface (e.g., a top surface or a bottom surface) of the cleaning substrate 216. For example, the one or more patterns 302 may be formed on a bottom surface of the cleaning substrate 216. As another example, the one or more patterns 302 may be formed on a top surface of the cleaning substrate 216. It is noted herein that the one or more patterns 302 may be formed using any material known in the art that is suitable for withstanding the conditions (e.g., temperature and other environmental conditions) of the process chamber 102 during the cleaning process described herein. For example, carbon nanotubes (CNTs) may be deposited on a surface (e.g., a top surface or a bottom surface) of the cleaning substrate 216 to form the one or more patterns 302 such that van der Waals forces are amplified (e.g., to optimize cleaning of the chuck 212), as described below.

number

number

[0043] In Equations 5 and 6, H 12 is Hamaker's constant, R is the size of the particle 214, and d is the distance between the particle 214 and the CNTs deposited on the surface of the cleaned substrate 216. As shown by Equation 6, when the CNTs are deposited on the surface of the cleaned substrate 216, the van der Waals forces are dependent on R compared to the R dependence of Equation 5. 2 Enhanced due to dependency.

[0044] It is noted herein that the rigidity and thermal stability of the CNT-patterned layer (e.g., one or more patterns 302 formed with CNTs) of the cleaning substrate 216 creates a brush effect that grips particles without causing further contamination (e.g., particle breakage). Additionally, the use of CNTs can add electrical features that help attract particles (as shown in FIG. 3B).

[0045] In another embodiment, the cleaning substrate 216 includes multiple pattern types 302. For example, the multiple pattern types 302 can include, without limitation, one or more pitches, whereby each pattern type is configured to attract one or more particles 214 of different sizes. For example, a single cleaning substrate (e.g., cleaning substrate 216) can have a first pattern 302 and a second pattern 302, whereby the shape of the pattern 302 can optimally clean the chuck 212.

[0046] In another embodiment, one or more structures 402 in the one or more patterns 302 attract one or more particles 214 from the chuck 212 via at least one of electrostatic attraction, mechanical trapping, etc. when the cleaning substrate 216 is placed on the chuck 212.

[0047] 3A , in another embodiment, one or more particles 214 are removed from the chuck 212 via electrostatic attraction. In this regard, one or more particles 214 on the surface 303 of the chuck 212 become charged by conduction, and a high electric field is generated by the approach of the cleaning substrate 216. Furthermore, the one or more particles 214 are subjected to a force (described below) that may exceed adhesive forces, such that the one or more particles 214 migrate to the cleaning substrate 216 (e.g., the cleaning substrate 216 attracts the one or more particles 214). Note that herein, the one or more particles 214 are charged more slowly on the cleaning substrate 216 to prevent the particles from returning to the chuck 212.

[0048] For example, the electrostatic attraction of the particles 214 may be caused by van der Waals forces. For example, when the cleaning substrate 216 is placed near a surface (e.g., top or bottom) of the chuck 212, van der Waals (VDW) forces remove the particles 214 from the surface (e.g., top or bottom) of the chuck 212 (e.g., the VDW forces exceed the adhesive forces of one or more particles 214). The sum of the van der Waals forces (F(s)) of the cleaning substrate 216 can be written as follows:

number

[0049] In Equation 7, A is the Hammerker constant, S is the distance between the particle and the surface of the cleaning substrate (dipole-induced effects are neglected), R is the particle radius, and the minus sign (-) indicates that the force is attractive. For example, A is 1.40 x 10 -19 Joules (J), where R is 5.00 x 10 -6 m, and S is 4.00 x 10 -10 m, whereby the van der Waals force (F(s)) is about -7.29 x 10 -7 N. In this regard, gravity (e.g., about 10 -11 N) can be neglected. The Lifshitz-Van der Waals equation (F(s)), which describes the surface roughness of one or more particles, can be written as:

number

[0050] In Equation 8, r a is the surface radius of curvature, h is the Lifshitz-van der Waals constant (in energy units), and S is the distance between the particle and the surface of the cleaning substrate.

[0051] In another embodiment, the one or more particles 214 are removed by the cleaning substrate 216 via magnetic forces. For example, the magnetic forces result from the interaction of the magnetic dipoles of the one or more particles 214 with the magnetic dipoles of the cleaning substrate 216. The magnetic force (F m ) can be written in general form as follows:

number

number

number

[0052] In Equations 9 to 11, m is the magnetic dipole, ∇ is the gradient, and H is the magnetic field. In Equations 10 to 11, m1 and m2 are the magnetic dipoles of the particle and the cleaning substrate, respectively. Furthermore, in Equation 10,

number

number

[0053] In Equation 12, saturation (m~10 -15 When two iron particles with a diameter (Z) of 1000 Å magnetized to a magnetization angle (emu) are separated by a distance (Z) of 1000 Å, the resultant force (F z ) is approximately 5.00 x 10 -11 N. In this regard, the rate of change of force (∂F / ∂z) is approximately 2.00×10 -2 It may also be N / m.

[0054] 3B and 3C , in another embodiment, the cleaning assembly 300 includes a power supply 306. The power supply 306 can include any power supply known in the art. For example, the power supply 306 can include a direct current (DC) power supply. For example, the DC power supply can include one or more batteries (e.g., nickel-metal hydride batteries, lithium-ion batteries, lithium-ion polymer batteries, sodium-ion batteries, etc.). As another example, the power supply 306 can include an alternating current (AC) power supply.

[0055] 3B , in another embodiment, the cleaning assembly 300 includes a conductor element 304 attached to the upper surface of the substrate 216. The conductor element 304 may include any conductor element known in the art. For example, the conductor element 304 may include an electrode. For example, the conductor element 304 may include a metal layer or coating containing at least one of aluminum (Al), gold (Au), copper (Cu), and the like. In another embodiment, the power source 306 is electrically coupled to the conductor element 304. In another embodiment, the chuck 212 is electrically conductive and connected to ground 308. In this regard, the cleaning assembly 300 is configured in a capacitor configuration, with the conductor element 304 and the chuck 212 acting as electrodes and separated by a dielectric (e.g., the cleaning substrate 216). The power source 306 may be mounted on the cleaning substrate 216. For example, one or more batteries may be disposed on the upper surface of the conductor element 304 and electrically coupled to the conductor element 304.

[0056] It should be noted that, as used herein, the chuck 212 of the cleaning assembly 300 is not limited to a conductive chuck. For example, the cleaning assembly 300 may include a non-conductive chuck. Therefore, the above description should not be construed as limiting the scope of the present disclosure, but rather as merely illustrative.

[0057] 3C, in another embodiment, the cleaning assembly 300 includes one or more anode / cathode pairs arranged in a horizontal configuration. For example, for each pair, an electric field can be established between the cathode and anode. The electric field assists in capturing particles from the chuck 212 surface.

[0058] In another embodiment, the power supply 306 is configured to establish an electric field between the conductor element 304 and the chuck 212. In another embodiment, the power supply 306 is configured to establish an electric field between the anode / cathode and the chuck 212. For example, the power supply 306 may be configured to establish an electric field of 0.1 kV to 5 kV. For example, the power supply 306 may be configured to establish an electric field of 2.5 kV. It is noted herein that the electric field enhances electrostatic-based capture of charged particles (e.g., one or more particles 214) from the chuck 212. The electrostatic force (F) of the cleaning substrate is e ) can be written as follows:

number

[0059] In Equation 13, ε0 is the dielectric constant (e.g., ε0=1 for a vacuum), and ε r is the relative permittivity (e.g., ε r =8.85×10 -12 F / m) and A e is the effective area of ​​the particle (m 2 ), where V is the voltage difference between the particle and the electrode (in volts), and h is the gap between the particle and the electrode (in meters). For example, V is the electrostatic force (F e ) is 3.48 × 10 -6 N is 5.00 x 10 2 In this regard, gravity (e.g., about 10 -11 N) is negligible, the cleaning substrate 216 can remove one or more particles 214 from the chuck 212.

[0060] 3E-3F, in another embodiment, the cleaning assembly 300 includes one or more reservoirs 310 disposed within the cleaning substrate 216. It should be noted that the size, location, and shape of the one or more reservoirs 310 shown in FIGS. 3C-3E are merely exemplary and are not intended to limit the scope of the present disclosure.

[0061] In another embodiment, the cleaning assembly 300 includes one or more valves 312 configured to release one or more reactants. It is noted herein that the one or more reactants may include any reactants known in the art that are suitable for cleaning a chuck. For example, the one or more reactants may include one or more reactant radicals. For example, the one or more reactant radicals may include at least one of atmospheric oxygen, fluorine, nitrogen, etc.

[0062] 3E, in another embodiment, the one or more valves 312 include one or more mechanical valves configured to open when the cleaning substrate 216 is placed on the chuck 212. For example, although not shown, the cleaning assembly 300 can include a controller configured to cause one or more processors to release one or more reactants from the one or more valves 312 (e.g., one or more mechanical valves).

[0063] 3E and 3F, in another embodiment, one or more reservoirs 310 are configured to release one or more reactants upon exposure to a thermal shock.

[0064] In another embodiment, one or more reservoirs 310 include a shape memory alloy actuator 314 configured to actuate one or more valves 312 upon exposure to a thermal shock. For example, the shape memory alloy actuator 314 may be configured to open one or more valves 312 based on a change in temperature of the shape memory alloy actuator 314. For example, the shape memory alloy actuator 314 is configured to undergo a shape deformation at a threshold transformation temperature and recover to its original shape upon heating above the threshold transformation temperature. Note that, herein, the threshold transformation temperature may be between room temperature (e.g., 23°C) and 520°C.

[0065] It is noted herein that the shape memory alloy actuator 314 may be formed from any alloy known in the art, including, but not limited to, nickel-titanium alloy (nitinol), copper-iron alloy, etc. For example, the shape memory alloy actuator 314 may include a nitinol actuator, which reduces the risk of leaks in chemical reactors when such leaks are undesirable.

[0066] 3G, in another embodiment, the cleaning assembly 300 includes a gas reservoir 316 configured to contain one or more gases. The gas reservoir 316 may include any gas known in the art, including, but not limited to, argon gas.

[0067] In another embodiment, the cleaning assembly 300 includes one or more tunnels 318 disposed within the cleaning substrate 216. It should be noted that, as used herein, the size, location, and shape of the one or more tunnels 318 shown in FIG. 3G are merely exemplary and are not intended to limit the scope of the present disclosure.

[0068] In another embodiment, the gas reservoir releases one or more gases that move one or more particles 214 through a time flow. For example, particles may be exhausted from the chuck 212 through the gas and pumped by a pump within the process chamber 102.

[0069] Reynolds number (R e ) (Equation 14) can be used to predict the flow patterns of one or more gases. For example, low (e.g., 10-10 3 ) Reynolds number (R e ) indicates laminar flow in a tunnel. 3 Reynolds number (R e ) indicates turbulent flow in a tunnel. The Reynolds number (R e ) can be written as follows:

number

number

[0070] In Equation 14, L is the linear dimension (m), U is the fluid velocity relative to the particle (m / s), and ρ is the fluid density (kg / m 3 ) and μ is the dynamic viscosity of the fluid (Pa sec). For example, when using argon gas, L = 50 m, μ = 4.64 × 10 -5 Pa sec (at 500°C or 773K), ρ = 1.6172 kg / m 3 (at 2.6 atm), and U(v2) = 570 m / s (solve using Eq. 15), R e =0.993×10 6 In this regard, a high Reynolds number indicates that the gas flow in the tunnel is turbulent. D ) (e.g., the force component in the direction of the flow velocity) can be written as:

number

[0071] In Equation 16, ρ is the mass density of the fluid, u is the flow velocity relative to the object, A is the reference area, and C D is the drag coefficient. In this specification, the drag coefficient (C D ) is the Reynolds number R (as shown in Eq. 14) e Note that the mass of the saturation current depends on the mass of the saturation current, e.g., ρ = 1.6172 kg / m 3 (at 2.6 atm), u=570 m / s, C D =0.1(R e =10 6 (smooth sphere in the case of ), A=7.853×10 -11 m 2 Then, F D =2.06×10 -6 N. Resistance (F D ) and particle removal (e.g., accumulator pressure P D ) can be described as follows:

number

number

number

[0072] For example, particle removal is achieved by increasing the accumulator pressure (P D ) and particle size (A). For example, it may be necessary to increase the initial pressure to accurately remove particles. Note that, although the above calculations (Equations 14-19) herein assume a pressure of 2.6 atm, such pressure is provided for illustrative purposes only and is not intended to limit the scope of the present disclosure.

[0073] It should be noted herein that the one or more particles 214 may be of any size known in the art. For example, the one or more particles may be 0-1.0 μm. For example, the one or more particles may be 0.019 μm. It should also be noted herein that the one or more particles 214 may be of any type of particle known in the art, including, but not limited to, airborne molecular contamination (AMC), metals, etc. For example, the one or more particles 214 may be metals (Al, Cu, etc.), fluorinated rubber (e.g., O-rings), grease, metal oxides, oxide films, bare silicon (Si), thermal oxides, nitride films, PR, Si, fluoride deposits, quartz, etc.

[0074] Further, it is noted herein that the process chamber 102 may have various chemical residues on the walls of the process chamber 102. For example, during CVD, the chamber walls may have halide residues (e.g., HCl, HI, F, etc.). As another example, during etching, the chamber walls may have residues containing at least one of C, O, F, Al, Y, Fe, Na, Ti, Zr, etc.

[0075] 5 shows a flow diagram illustrating a method 500 for cleaning the chuck 212 of the process tool 100 using the cleaning assembly 300 in accordance with one or more embodiments of the present disclosure. It is noted herein that the steps of the method 500 may be performed in whole or in part by the system 100. However, it is further recognized that the method 500 is not limited to the system 100 in that additional or alternative system-level embodiments may perform all or a portion of the steps of the method 500.

[0076] In step 502, a cleaning substrate is provided in the cleaning substrate cabinet. In another embodiment, the cleaning substrate cabinet 120 is configured to store (e.g., mount) one or more cleaning substrates 216 within the cabinet 120 and prepare the one or more cleaning substrates 216 for an optimal cleaning process.

[0077] In step 504, the cleaned substrate is moved from the cleaned substrate cabinet 120 onto a wafer chuck 212 housed within the process chamber 102. In another embodiment, one or more robot assemblies 110 are configured to remove the cleaned substrate 216 from the cleaned substrate cabinet 120 to begin the cleaning process. For example, the edge gripper 204 of the robot assembly 110 can interact with the cleaned substrate 216 to remove it from the cleaned substrate cabinet 120.

[0078] In another embodiment, one or more robot assemblies are configured to position the cleaned substrate 216 near the chuck 212 of one or more process tools 100. For example, after the cleaned substrate 216 is removed from the cleaned substrate cabinet 120 via the robot assembly 110, the robot assembly 110 can transfer (e.g., deliver) the cleaned substrate to the robot assembly 116 of the handling apparatus 112. As another example, the robot assembly 116 can insert the cleaned substrate 216 into the process chamber 102 of the process tool 100.

[0079] The cleaning substrate is used to clean the surface 303 of the wafer chuck in step 506. The chuck 212 can be cleaned using at least one of electrostatic attraction, mechanical trapping, etc. (as shown in Figures 3A-3E).

[0080] FIG. 6 shows a simplified schematic diagram of a characterization system 600 configured to direct the performance of cleaning of a wafer chuck 212 of a process tool 100 in accordance with one or more embodiments of the present disclosure.

[0081] Referring generally to FIG. 6, in one embodiment, a system 600 includes one or more process tools 100 (eg, the processing system 100 shown in FIG. 1), a controller 602, and one or more characterization tools 604.

[0082] In another embodiment, the one or more characterization tools 604 (e.g., a characterization subsystem) include one or more inspection tools. For example, the one or more inspection tools can include, but are not limited to, optical characterization tools. For example, the optical characterization tools can generate one or more high-resolution images representative of the electrical integrity of the wafer 210 and can operate at wavelengths corresponding to, but not limited to, visible light, ultraviolet (UV) radiation, deep ultraviolet (DUV) radiation, vacuum ultraviolet (VUV) radiation, extreme ultraviolet (EUV) radiation, and / or X-ray radiation. In addition, the optical characterization tools can include broadband inspection tools, including, but not limited to, laser-sustained plasma (LSP)-based inspection tools. Furthermore, the optical characterization tools can include narrowband characterization tools, including, but not limited to, laser scanning inspection tools, etc. A description of inspection tools is provided in U.S. Patent No. 8,559,001, issued October 15, 2013, which is incorporated herein by reference in its entirety. Additionally, a description of an inspection tool can be found in U.S. Patent No. 9,170,209, issued October 27, 2015, which is incorporated herein by reference in its entirety. Further, a description of an inspection tool can be found in U.S. Patent No. 8,749,149, issued June 10, 2014, which is incorporated herein by reference in its entirety. Additionally, a description of an inspection tool can be found in U.S. Patent No. 8,941,336, issued January 27, 2015, which is incorporated herein by reference in its entirety.

[0083] In another embodiment, the one or more characterization tools 604 include one or more review tools. For example, the one or more characterization tools 604 include one or more particle beam review tools. For example, the one or more particle beam review tools can include, but are not limited to, electron beam (e-beam) tools. A description of particle beam review tools is provided in U.S. Patent Application No. 16 / 163,263, filed October 17, 2018, which is incorporated herein by reference in its entirety. Additionally, a description of particle beam review tools is provided in U.S. Patent Application No. 16 / 564,981, filed September 9, 2019, which is incorporated herein by reference in its entirety.

[0084] In another embodiment, the system 600 includes a controller 602 including one or more processors. In another embodiment, the controller 602 is operably coupled to one or more components of the system 600. For example, the controller 602 can be operably coupled to one or more process tools 100, one or more characterization tools 604, and / or one or more additional components. In this regard, the controller 602 can direct any of the components of the system 600 and / or any components of one or more process tools 100, one or more characterization tools 604, and / or one or more additional components to perform any one or more of the various functions described throughout this disclosure.

[0085] In another embodiment, system 600 may include a controller 602 communicatively coupled to a server via a network. In another embodiment, controller 602 includes one or more processors and memory. In another embodiment, the one or more processors may be configured to execute a set of program instructions stored in the memory, the set of program instructions configured to cause the one or more processors to perform the steps of the present disclosure. It should be noted that, as used herein, discussions herein relating to a server, one or more processors, and memory may also be considered to apply to controller 602, one or more processors, and memory, unless otherwise stated herein.

[0086] It is noted herein that one or more components of system 600 may be communicatively coupled to various other components of system 600 in any manner known in the art. For example, one or more processors may be communicatively coupled to each other and to other components via wired (e.g., copper wire, fiber optic cable, etc.) or wireless connections (e.g., RF coupling, IR coupling, data network communication (e.g., WiFi, WiMAX, Bluetooth, etc.)).

[0087] In one embodiment, the one or more processors may include any one or more processing elements known in the art. In this sense, the one or more processors may include any microprocessor-type device configured to execute software algorithms and / or instructions. In one embodiment, the one or more processors may comprise a desktop computer, a mainframe computer system, a workstation, an image computer, a parallel processor, or other computer system (e.g., a network computer) configured to execute a program configured to operate system 600 as described throughout this disclosure. It should be appreciated that the steps described throughout this disclosure may be performed by a single computer system, or alternatively, multiple computer systems. Furthermore, it should be appreciated that the steps described throughout this disclosure may be performed by any one or more of one or more processors. In general, the term “processor” may be broadly defined to encompass any device having one or more processing elements that execute program instructions from memory. Furthermore, different subsystems of system 600 may include processors or logic elements suitable for performing at least some of the steps described throughout this disclosure. Therefore, the above description should not be construed as a limitation on the present disclosure, but merely as an example.

[0088] The memory may include any storage medium known in the art suitable for storing program instructions executable by one or more associated processors and data received from a transmitting device. For example, the memory may include a non-transitory memory medium. For example, the memory may include, but is not limited to, read-only memory (ROM), random access memory (RAM), magnetic or optical memory devices (e.g., disks), magnetic tape, solid-state drives, etc. In another embodiment, the memory is configured to store data including, but not limited to, entity data, association data (e.g., spatial relationship data), operation data, GPS data, time-stamped data, geo-fenced data, etc. received from the transmitting device. It is further noted that the memory may be housed within a common controller housing along with one or more processors. In an alternative embodiment, the memory may be located remotely relative to the physical location of the processors, server, controller, etc. In another embodiment, the memory maintains program instructions for causing one or more processors to perform various steps described throughout this disclosure.

[0089] 7 shows a flow diagram illustrating a method 700 of using a characterization system to collect characterization data used to determine cleaning efficiency of a cleaning substrate 216, according to one or more embodiments of the present disclosure. FIG. 8 shows an exemplary diagram of one or more steps of the method 700 shown in FIG. 7, according to one or more embodiments of the present disclosure. It is noted herein that the steps of method 700 may be performed in whole or in part by system 600. However, it is further recognized that method 700 is not limited to system 600, in that additional or alternative system-level embodiments may perform all or a portion of the steps of method 700.

[0090] 8, the surface of the cleaned substrate 216 is inspected via one or more inspection tools to generate pre-cleaning inspection data. For example, the inspection tools may be configured to inspect the surface of the cleaned substrate 216 to generate pre-cleaning inspection data regarding the surface of the cleaned substrate 216. For example, the pre-cleaning inspection data may include information regarding one or more patterns 302 of the cleaned substrate 216.

[0091] In step 704, one or more particles 214 on the surface 303 of the wafer chuck 212 are removed via a cleaning substrate 216, as shown in view 804 of Figure 8. For example, the cleaning substrate 216 can be positioned near the surface 303 of the chuck 212 to remove the one or more particles 214 from the surface 303 of the chuck 212.

[0092] 8, the surface of the cleaned substrate 216 is inspected via one or more inspection tools to generate post-cleaning inspection data. In another embodiment, the one or more inspection tools are configured to generate the post-cleaning inspection data based on an inspection of the surface of the cleaned substrate 216. For example, the one or more inspection tools are configured to detect one or more particles 214 on the cleaned substrate that were removed from the chuck 212 during the process chamber cleaning step 614. The inspection data may include information regarding the location, size, and material of the one or more particles 214 on the cleaned substrate 216.

[0093] In another embodiment, the inspection tool is configured to compare the inspection data from step 702 and step 706, respectively. For example, the inspection tool can compare the sum of all signals reflected from the cleaning substrate 216, with any differences signaling a cleaning action. As another example, the cleaning substrate 216 may have a known pattern (e.g., rows or circles at a particular pitch). For example, the inspection tool can compare regions across the cleaning substrate 216 to detect any deviations from the known pattern (e.g., rows or circles at a particular pitch) identified during step 702.

[0094] In optional step 708, as shown in view 808 of FIG. 8 , one or more particles 214 on the surface of the cleaned substrate 216 are reviewed via one or more particle review tools to generate particle review data. For example, the one or more particle review tools may image the surface of the cleaned substrate 216 to capture images of one or more defects on the surface of the cleaned substrate 216. For example, the one or more particle review tools may capture images of one or more particles on the surface of the cleaned substrate 216. The particle review data may include more detailed information regarding the location, size, and / or material of the one or more particles 214 than the post-cleaning inspection data. In this regard, the particle review data may be used to prepare the cleaned substrate 216 for optimal cleaning. For example, the particle review data may be used to determine one or more patterns 302 on the cleaned substrate 216 to optimize cleaning of the chuck 212.

[0095] 9 is a flow chart illustrating a method 900 of cleaning triggered by characterization of a wafer chuck 212 of a process tool 100, in accordance with one or more embodiments of the present disclosure. It is noted herein that the steps of method 900 may be performed in whole or in part by system 600. However, it is further recognized that method 900 is not limited to system 600, in that additional or alternative system-level embodiments may perform all or a portion of the steps of method 900.

[0096] In step 902, one or more process tools 100 of the system 600 perform one or more semiconductor manufacturing processes on a wafer 210. The wafer 210 may deposit one or more particles 214 on a chuck 212 during the one or more semiconductor manufacturing processes. Additionally, one or more walls of a process chamber 102 of the process tool 100 may deposit one or more particles 214 on the chuck 212.

[0097] In step 904, at least one of the wafer 210 or the cleaned substrate 216 is transferred (e.g., delivered) to one or more characterization tools 604 of the system 600 via one or more robot assemblies of the process tool 100. For example, the cleaned substrate 216 may be transferred to at least one of one or more inspection tools or one or more particle review tools. As another example, the wafer 210 may be transferred to at least one of one or more inspection tools or one or more particle review tools.

[0098] In step 906, at least one surface of the wafer 210 or the cleaned substrate is characterized using one or more characterization tools 604 of the system 600. In another embodiment, the one or more characterization tools 604 include one or more inspection tools. For example, one or more inspection tools may be used to inspect a bottom surface of at least one of the wafer 210 or the cleaned substrate. As another example, one or more inspection tools may be used to inspect a top surface of at least one of the wafer 210 or the cleaned substrate 216. In another embodiment, the one or more characterization tools 605 include one or more particle review tools. For example, the bottom surface of at least one of the wafer 210 or the cleaned substrate 216 may be reviewed using one or more particle review tools. As another example, the top surface of at least one of the wafer 210 or the cleaned substrate 216 may be reviewed using one or more particle review tools.

[0099] In step 908, the one or more characterization tools 604 generate characterization data (e.g., inspection data or particle review data) based on an inspection or review of at least one surface of the wafer 210 or the cleaned substrate. For example, the one or more characterization tools 604 can generate the inspection data based on an inspection of the at least one surface of the wafer 210 or the cleaned substrate using one or more inspection tools. As another example, the one or more characterization tools 604 can generate the particle review data based on a review of the at least one surface of the wafer 210 or the cleaned substrate. In another embodiment, the one or more characterization tools 604 are communicatively coupled to the controller 602 such that one or more processors of the controller 602 receive the characterization data (e.g., inspection data or particle review data) from the one or more characterization tools 604. The characterization data (e.g., inspection data) can include information regarding the location, size, and material of one or more particles 214 on the surface 303 of the wafer 210 or the cleaned substrate 216.

[0100] In step 910, the controller 602 causes one or more processors to determine one or more cleaning parameters based on the characterization data (e.g., inspection data or particle review data). In another embodiment, the controller 602 receives characterization data (e.g., inspection data or particle review data) from one or more characterization tools 604 and causes one or more processors to initiate one or more cleaning parameters. The one or more cleaning parameters may include at least one of preparing the cleaning substrate 216, initiating a cleaning cycle, orienting the cleaning substrate 216, etc. For example, the one or more processors of the controller 602 may trigger one or more process tools 100 to initiate the cleaning process described in FIGS. 1-5 . As another example, the at least one of the inspection data or particle review data may be used to determine an orientation of the cleaning substrate 216 for optimal cleaning performance. For example, the one or more processors of the controller 602 may trigger the P / A module 108 of the handling device 106 to optimally orient the cleaning substrate 216 based on the at least one of the inspection data or particle review data. As a further example, at least one of the inspection data or particle review data can be used to control one or more additional cleaning parameters to ensure that the process tool 100 optimally cleans the chuck 212.

[0101] In step 912, the controller 602 causes one or more processors to direct one or more robot assemblies to position the cleaning substrate 216 on the chuck 212 of the process tool 100. For example, the robot assembly 110 can transfer (e.g., deliver) the cleaning substrate 216 to the robot assembly 116 of the handling apparatus 112. For example, the robot assembly 116 of the handling apparatus 112 can insert the cleaning substrate 216 into the process chamber 102 of the process tool 100 when the gate 206 opens.

[0102] In step 914, the cleaning substrate 216 removes one or more particles 214 from the chuck 212 via at least one of electrostatic attraction, mechanical trapping, or the like.

[0103] In step 916, one or more robot assemblies remove the cleaned substrate 216 from the process tool 100 and return the cleaned substrate 216 to the cleaned substrate cabinet 120. For example, the robot assembly 116 can remove the cleaned substrate 216 from the process chamber 102 of the process tool 100 and insert the cleaned substrate 216 into the handling apparatus 114. As another example, the robot assembly 110 can remove the cleaned substrate 216 from the handling apparatus 114 and return the cleaned substrate to the cleaned substrate cabinet 120.

[0104] It should be noted herein that one or more inspection tools and / or one or more particle review tools of system 600 can perform a single function or multiple functions. For example, a first inspection tool may be configured to inspect the surface of wafer 210, and a second inspection tool may be configured to inspect the surface of cleaned substrate 216. As another example, the inspection tools may be configured to inspect the surface of wafer 210 and the surface of cleaned substrate 216. As a further example, a first review tool may be configured to review the surface of wafer 210, and a second review tool may be configured to review the surface of cleaned substrate 216. As another example, the particle review tool may be configured to review the surface of wafer 210 and the surface of cleaned substrate 216.

[0105] Figure 10 shows a simplified schematic diagram of a wafer transport apparatus 104 in accordance with one or more embodiments of the present disclosure. Figure 11 shows a simplified top view of a wafer transport apparatus 104 in accordance with one or more embodiments of the present disclosure.

[0106] In one embodiment, the wafer transport apparatus 104 includes an imaging system 1006 positioned to detect one or more particles 214 on the wafer 210. In another embodiment, the imaging system 1006 includes a light source 1008 configured to generate a collimated light beam. For example, the wafer transport apparatus 104 may include an LED projector 1008 configured to generate the collimated light beam. In another embodiment, the optics of the imaging system 1006 are configured to direct the collimated light beam 1009 onto the surface of the wafer 210, such that illumination is reflected, scattered, diffracted, or emitted from the one or more particles 214 or the wafer 210.

[0107] In another embodiment, the imaging system 1006 includes an objective lens 1010 configured to collect light 1009 emanating (e.g., reflected, scattered, diffracted, or emitted) from the particles 214. In another embodiment, the imaging system 1006 includes a detector 1011 (e.g., a CCD detector). For example, the imaging system 1006 and the detector 1011 of the imaging system 1006 may be arranged in a dark-field configuration. For example, dark-field imaging can detect one or more particles 214 axially or externally of the lens. For example, dark-field imaging can detect one or more particles 214 having dimensions between 0 and 1.0 μm. It should be noted herein that the objective lens 1010 may be at any distance from the wafer 210. For example, the objective lens 1010 may be 100 mm from the surface of the wafer 210.

[0108] In one embodiment, the wafer transport apparatus 104 includes a rotational stage 1002 configured to rotate the wafer 210 about the z-axis (e.g., up and down). For example, the rotational stage 1002 may include a rotational stage configured to rotate the wafer about the z-axis so that one or more particles 214 can be imaged at any one time. In another embodiment, the wafer transport apparatus 104 includes a linear stage 1004 configured to scan a surface (e.g., top or bottom) of the wafer 210. For example, the linear stage 1004 may be configured to translate the imaging system 1006 along the surface of the wafer 210 to scan the bottom surface of the wafer 210 and detect one or more particles 214. The rotational stage 1002 and the linear stage 1004 may be utilized to scan the entire wafer 210. For example, as shown in FIG. 11 , the rotational mechanism 1002 may rotate the wafer 210 a selected distance such that the linear stage 1004 can translate the imaging system 1006 along a scan line. In this regard, the rotation mechanism 1002 can rotate the wafer 210 until the entire wafer 210 is scanned by the imaging system 1006 .

[0109] In another embodiment, the wafer transport apparatus 104 includes a main module 1012. In another embodiment, the main module includes a power supply 1014 configured to charge the cleaning substrate 216 before each activation. It is noted herein that the power supply 306 (discussed in FIG. 3B ) may share one or more components with the power supply 1014 of FIG. 10 . In another embodiment, the main module 1012 includes a charging mechanism 1020 configured to provide power to the wafer transport apparatus 104. The charging mechanism 1020 may include any charging mechanism known in the art, including, but not limited to, a battery. It is noted herein that the power supply 1014 and the charging mechanism 1020 may share one or more components.

[0110] In another embodiment, the main module 1012 includes a cleaning mechanism 1016 (e.g., the cleaning assembly 300) configured to remove one or more particles 214 using an electrostatic field. For example, the wafer transport apparatus 104 may include an electrostatic field generator 1022 such that the cleaning substrate 216 can remove one or more particles 214 using an electrostatic field.

[0111] In another embodiment, the main module 1012 includes a computing engine 1018 (e.g., one or more processors) configured to at least one of collect, process, or transmit data. For example, the computing engine 1018 (e.g., one or more processors) may be configured to perform image processing. As another example, the computing engine 1018 (e.g., one or more processors) may be configured to execute one or more algorithms. The data may include one or more characteristics of the particles 214 and / or the surface of the wafer 210. For example, the data may include information regarding the size, position, material, etc. of the particles 214. The computing engine (e.g., one or more processors) may include any computing engine known in the art, including, but not limited to, a microprocessor.

[0112] Those skilled in the art will recognize that the components, devices, objects, and accompanying discussion described herein are used as examples for conceptual clarity, and that various configuration variations are contemplated. As such, as used herein, the specific examples described and accompanying discussion are intended to be representative of their more general classes. In general, the use of any specific example is intended to be representative of its class, and the exclusion of particular components, devices, and objects should not be construed as limiting.

[0113] With respect to the use of virtually any plural and / or singular term herein, those of skill in the art can convert from plural to singular and / or from singular to plural as appropriate to the context and / or application. The various singular / plural permutations are not expressly set forth herein for the sake of clarity.

[0114] The subject matter described herein sometimes depicts different components contained within or connected to other components. It should be understood that architectures so depicted are merely exemplary, and that in fact, many other architectures that achieve the same functionality may be implemented. In a conceptual sense, any arrangement of components to achieve the same functionality is effectively “associated” such that the desired functionality is achieved. Thus, any two components combined herein to achieve a particular function can be considered to be “associated” with each other such that the desired functionality is achieved, regardless of the architecture or intermediate components. Similarly, any two components so associated can also be considered to be “connected” or “coupled” with each other to achieve the desired functionality, and any two components so associated can also be considered to be “couplable” with each other to achieve the desired functionality. Specific examples of what is couplable include, but are not limited to, physically matable and / or physically interacting components, wirelessly interacting and / or wirelessly interacting components, and / or logically interacting and / or logically interacting components.

[0115] The foregoing description is presented to enable one skilled in the art to make and use the invention as provided in the context of a particular application and its requirements. As used herein, directional terms such as "top," "bottom," "above," "below," "upper," "upward," "lower," "below," and "downward" are intended to indicate relative positions for purposes of description and are not intended to specify an absolute frame of reference. Various modifications to the described embodiments will be apparent to those skilled in the art, and the general principles defined herein may be applied to other embodiments. Thus, the present invention is not intended to be limited to the particular embodiments shown and described, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

[0116] It should further be understood that the present invention is defined by the appended claims. In general, those skilled in the art will understand that the terms used herein, and particularly in the appended claims (e.g., the body of the appended claims), are generally intended as "open" terms (e.g., the term "including" should be interpreted as "including but not limited to," the term "having" should be interpreted as "having at least," the term "including" should be interpreted as "including but not limited to," etc.). If a specific number of introduced claim recitations is intended, such intent will be explicitly stated in the claim; in the absence of such recitation, those skilled in the art will further understand that no such intent exists. For example, to aid in understanding, the appended claims below may include the use of the introductory phrases "at least one" and "one or more" to introduce claim recitations. However, the use of such phrases should not be construed as meaning that introducing a claim recitation with the indefinite article "a" or "an" limits any particular claim containing such introduced claim recitation to inventions containing only one such recitation, even if the same claim includes the introductory phrase "one or more" or "at least one" and an indefinite article such as "a" or "an" (e.g., "a" and / or "an" should typically be interpreted to mean "at least one" or "one or more"). The same applies to the use of definite articles used to introduce claim recitations. Additionally, even when a specific number of introduced claim recitations is explicitly recited, those skilled in the art will recognize that such a recitation should typically be interpreted to mean at least the recited number (e.g., the mere recitation of "two recitations" without other modifiers typically means at least two recitations, or more than two recitations).Furthermore, when phrases similar to "at least one of A, B, and C, etc." are used, generally such a configuration is intended in the sense that one of ordinary skill in the art would understand the phrase (e.g., "a system having at least one of A, B, and C" includes, but is not limited to, systems having A only, B only, C only, A and B together, A and C together, B and C together, and / or A, B, and C together, etc.). When phrases similar to "at least one of A, B, or C, etc." are used, generally such a configuration is intended in the sense that one of ordinary skill in the art would understand the phrase (e.g., "a system having at least one of A, B, or C" includes, but is not limited to, systems having A only, B only, C only, A and B together, A and C together, B and C together, and / or A, B, and C together, etc.). It will be further understood by those skilled in the art that virtually any disjunction word and / or phrase presenting two or more alternative terms, whether in the specification, claims, or drawings, should be understood to contemplate the possibility of including one of the terms, either of the terms, or both terms. For example, the phrase "A or B" is understood to include the possibilities of "A" or "B" or "A and B."

[0117] The present disclosure and many of its attendant advantages will be understood from the foregoing description, and it will be apparent that various changes can be made in the form, construction and arrangement of the elements without departing from the disclosed subject matter or sacrificing all of its important advantages. The described forms are merely illustrative, and it is the intent of the following claims to embrace and include all such modifications.

Claims

1. one or more characterization subsystems configured to inspect a portion of a wafer disposed on a chuck of a process tool and further configured to generate characterization data based on the inspection of the portion of the wafer disposed on the chuck of the process tool; a controller including one or more processors, wherein the one or more processors: receiving the characterization data from the one or more characterization subsystems; determining one or more cleaning parameters based on the characterization data; Directing one or more robot assemblies to position a cleaned substrate having one or more patterns formed on its bottom surface onto the chuck of the process tool. A characteristic evaluation system configured as follows.

2. 10. The characterization system of claim 1, wherein the one or more characterization subsystems: at least one of an inspection tool or a particle review tool; A characteristic evaluation system comprising:

3. 3. The characterization system of claim 2, wherein the particle review tool comprises an electron beam tool.

4. 4. The characterization system of claim 3, wherein the electron beam tool is configured to generate particle review data.

5. 10. The characterization system of claim 1, wherein the one or more cleaning parameters are: At least one of preparing the cleaning substrate, initiating a cleaning cycle, or orienting the cleaning substrate; A characteristic evaluation system comprising:

6. A method comprising: providing a cleaning assembly in the cabinet, the cleaning assembly being moved from the cabinet onto a conductive chuck housed in a process chamber via a handling device, and cleaning a surface of the conductive chuck with the cleaning assembly; The cleaning assembly includes: an insulating cleaning substrate; one or more batteries; a conductive element attached to an upper surface of the cleaning substrate; the one or more batteries are electrically coupled to the conductor element and configured to establish an electric field between the conductor element and the conductive chuck in a capacitor configuration to enhance electrostatic attraction of charged particles from the conductive chuck. method.

7. The cleaning substrate comprising a ceramic wafer. The method of claim 6.

8. The cleaning substrate is formed as a semiconductor wafer. The method of claim 6.

9. One or more structures in one or more patterns are formed of carbon nanotubes (CNTs). The method of claim 6.

10. The cleaning substrate is configured for manipulation via the handling device. The method of claim 6.

11. The cleaning substrate includes a plurality of pattern types, each pattern type configured to attract particles of a different size. The method of claim 6.

12. The electrostatic attraction is caused by van der Waals forces. The method of claim 6.

13. The cleaning assembly further comprising a ground connection portion, the ground connection portion configured to ground the conductive chuck. The method of claim 6.

14. The one or more batteries are configured to establish an electric field of 0.1 to 5 kV between the conductor element and the conductive chuck to enhance electrostatic attraction of charged particles from the conductive chuck. The method of claim 13.

15. The cleaning substrate comprising one or more reservoirs. The method of claim 6.

16. The one or more reservoirs are configured to carry one or more chemical reactants.

16. The method of claim 15.

17. The cleaning substrate includes one or more valves for releasing one or more chemical reactants from the one or more reservoirs onto the conductive chuck.

17. The method of claim 16.

18. The one or more valves include one or more mechanical valves configured to open when the cleaning substrate is positioned on the conductive chuck.

18. The method of claim 17.

19. The one or more reservoirs are configured to release the one or more chemical reactants upon exposure to thermal shock.

17. The method of claim 16.

20. The one or more reservoirs include one or more valves actuable by a shape memory alloy actuator, the shape memory alloy actuator configured to open the one or more valves based on a temperature change.

16. The method of claim 15.

21. The cleaning substrate can be loaded into a cleaning substrate cabinet, and the cleaning substrate can be transported from the cleaning substrate cabinet to the process chamber via a handling device. The method of claim 6.

Images