Power semiconductor element test equipment

Abstract

To solve the problem in which: conventional semiconductor test devices cannot test semiconductor elements in conformity with actual usage conditions.SOLUTION: A snubber circuit 138a (RC snubber circuit) and a snubber circuit 138b (RCD snubber circuit) are formed. The snubber circuit 138a is selected by a switch circuit S1, and the snubber circuit 138b is selected by a switch circuit S2. The RC snubber circuit 138a is suitable for a chopper circuit, but loss generated by snubber resistance R1 in the snubber circuit 138a is large, and when it is applied to a large-capacity element, it is necessary to set the snubber resistance to a low value, and collector current at turn-on increases. Since the RCD snubber circuit 138b has a diode added to the RC snubber circuit 138a, snubber resistance R2 can be increased. Therefore, an element current burden at turn-on can be avoided.SELECTED DRAWING: Figure 5

Description

[Technical Field]

[0001] The present invention relates to an electric element testing apparatus and method for testing semiconductor elements and electric elements, and also to a semiconductor element evaluation method, an evaluation test apparatus, and the configuration of a semiconductor element. [Background technology]

[0002] Life tests for electrical elements such as semiconductor elements are conducted by turning the current they pass on and off. The currents from semiconductor elements that are supplied to inverter circuits and power circuits are large, at tens of amperes or more. There are many types of tests for electrical elements, and the connection wiring must be changed depending on the type of test. In addition, tests for semiconductor elements must be conducted in accordance with the circuit configuration in which they will actually be tested. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Patent Publication No. 2017-17822 Summary of the Invention [Problem to be solved by the invention]

[0004] Because circuit operations such as inverter circuits are complex, semiconductor test equipment must also change its operation and the connections of connecting lines to suit the circuit operations, etc. However, with conventional semiconductor test equipment, it was not easy to change its operation or change the connections of connecting lines to suit actual use conditions.

[0005] Many of the devices driven by inverter circuits have large inductances, such as motors. When current flows through an inductance, large surge voltages and transient phenomena occur. Therefore, it is necessary to conduct tests on transistors and other devices that drive inverter circuits, taking into account the surge voltages and transient phenomena that may occur. However, surge voltages and transient phenomena are so diverse that it is not easy to carry out tests that address all of these assumptions.

[0006] The constant current applied to test semiconductor elements such as transistors is several hundred amperes, so the connecting wires must be thick and low-resistance. Thick connecting wires are hard and inflexible. Changing the connections of thick connecting wires to suit the test items takes a long time. Furthermore, the heavy weight of the connecting wires makes them prone to coming loose from the connections. [Means for solving the problem]

[0007] The semiconductor device testing device of the present invention has a plurality of power supply devices 121, and the plurality of power supply devices 121 are configured to generate currents with at least different polarities. When the semiconductor devices 117 to be tested are connected in series, the plurality of power supply devices 121 that generate currents with different polarities select a current using a switch circuit, and also select one of the semiconductor devices 117 connected in series with the current using the switch circuit, apply the test current, and perform the test.

[0008] The semiconductor device testing apparatus includes a drive variable circuit 126. The drive variable circuit 126 is connected to the gate terminals of the transistors 117s and 117m to be tested. A plurality of drive element circuits 127 are arranged within the drive variable circuit 126.

[0009] The drive element circuit 127 is controlled and selected by the controller 111. An on / off signal for the transistor 117 output from the gate signal control circuit 112 is converted to a predetermined voltage value by the gate driver circuit 113 and input to the drive variable circuit 126. The rising and falling waveforms of the voltage waveform are determined by the selected drive element circuit 127 in the drive variable circuit 126 and applied to the transistor 117.

[0010] To enable testing that is applicable to surge voltages, voltage oscillations, and transient phenomena that occur in actual use conditions, the present invention has a variable drive circuit 126 that allows for the free setting of the signal waveform that drives the gate terminal of transistor 117. It also has a variety of snubber circuits 138, allowing for the selection or connection switching of snubber circuits 138. As a result, it is possible to generate surge voltages, voltage oscillations, and transient voltages that are suited to actual use conditions.

[0011] In the semiconductor element testing apparatus of the present invention, a space within the semiconductor element testing apparatus in which semiconductor elements to be tested are arranged is separated by a partition wall from the location of the circuit board from which control signals for the semiconductor elements are generated.

[0012] A fork plug 205 is used for connection to a circuit board or the like on which a switch circuit or the like is configured. Connection and connection change are made by inserting the fork plug 205 as a connection means through an opening provided in the partition wall and bringing the fork plug 205 into electrical contact with the conductor plate 204 on the circuit board. [Effects of the Invention]

[0013] The device has a first power supply 121 that outputs a forward current and a second power supply 121 that outputs a reverse current, and a switch circuit selectively applies the current from the power supplies to the first semiconductor element and the second semiconductor element. Since the semiconductor elements can be tested under operating conditions close to actual operation, life tests and reliability tests can be easily performed.

[0014] The semiconductor device testing device of the present invention has a variety of snubber circuits 138 and can select or switch the connection of the snubber circuits 138. This makes it possible to generate surge voltages, voltage oscillations, and transient voltages that are suited to actual use conditions.

[0015] The connection between semiconductor element 117 and the test circuit can be easily changed by changing the position of fork plug 205 inserted into opening 216. The connection work or connection change of connection wiring 211 for each test item is performed by changing the position of fork plug 205, so the time required for connection change can be significantly reduced. [Brief explanation of the drawings]

[0016] [Figure 1] 1 is a block diagram and an explanatory diagram of a semiconductor device testing apparatus according to the present invention; [Figure 2] 1 is a configuration diagram of a semiconductor device testing device according to the present invention; [Figure 3] 1 is a block diagram and an explanatory diagram of a semiconductor device testing apparatus according to the present invention; [Figure 4] 1 is a block diagram and an explanatory diagram of a semiconductor device testing apparatus according to the present invention; [Figure 5] 1 is a block diagram and an explanatory diagram of a semiconductor device testing apparatus according to the present invention; [Figure 6] 1 is a block diagram and an explanatory diagram of a semiconductor device testing apparatus according to the present invention; [Figure 7] 1 is a block diagram and an explanatory diagram of a semiconductor device testing apparatus according to the present invention; [Figure 8] 1 is a block diagram and an explanatory diagram of a semiconductor device testing apparatus according to the present invention; [Figure 9] 1A and 1B are explanatory and configuration diagrams of a semiconductor device testing device according to the present invention; [Figure 10] 1A and 1B are explanatory and configuration diagrams of a semiconductor device testing device according to the present invention; [Figure 11] 1A and 1B are explanatory and structural diagrams of a semiconductor element mounting portion of a semiconductor element testing apparatus according to the present invention; [Figure 12] 1A and 1B are explanatory and structural diagrams of a semiconductor element mounting portion of a semiconductor element testing apparatus according to the present invention; [Figure 13] 1A and 1B are explanatory and structural diagrams of a connection structure of a semiconductor element testing apparatus according to the present invention; [Figure 14] 1A and 1B are explanatory and structural diagrams of a connection structure of a semiconductor element testing apparatus according to the present invention; [Figure 15]1A and 1B are explanatory and structural diagrams of a heat pipe portion of a semiconductor element testing apparatus according to the present invention; [Figure 16] 1A and 1B are explanatory and structural diagrams of a heat pipe portion of a semiconductor element testing apparatus according to the present invention; [Figure 17] 1A and 1B are explanatory and structural diagrams of a mounting fixture for a semiconductor device testing apparatus according to the present invention; [Figure 18] 1A and 1B are explanatory and structural diagrams of a mounting fixture for a semiconductor device testing apparatus according to the present invention; [Figure 19] 1 is an explanatory diagram of a test method for a semiconductor device according to an embodiment of the present invention; [Figure 20] 1 is an explanatory diagram of a test method for a semiconductor device according to an embodiment of the present invention; [Figure 21] 1 is a block diagram and an explanatory diagram of a semiconductor device testing apparatus according to an embodiment of the present invention; [Figure 22] 1 is an explanatory diagram of a test method for a semiconductor device according to an embodiment of the present invention; [Figure 23] 1 is an explanatory diagram of a test method for a semiconductor device according to an embodiment of the present invention; [Figure 24] 1A and 1B are explanatory diagrams and an equivalent circuit diagram of a semiconductor element to be tested; [Figure 25] FIG. 1 is an explanatory diagram illustrating driving a three-phase motor using semiconductor elements. [Figure 26] FIG. 2 is an explanatory diagram of three-phase current waveforms. [Figure 27] FIG. 1 is an explanatory diagram of a method for generating a sine wave current using a PWM signal. [Figure 28] 1 is an explanatory diagram of a test method for a semiconductor device according to an embodiment of the present invention; [Figure 29] 1 is an explanatory diagram of a test method for a semiconductor device according to an embodiment of the present invention; [Figure 30] 1 is an explanatory diagram of a test method for a semiconductor device according to an embodiment of the present invention; [Figure 31] 1A and 1B are diagrams illustrating the configuration and explanation of a wiring attachment portion of a semiconductor testing device according to the present invention; [Figure 32] 1A and 1B are diagrams illustrating the configuration and explanation of a wiring attachment portion of a semiconductor testing device according to the present invention; [Figure 33]1A and 1B are diagrams illustrating the configuration and explanation of a wiring attachment portion of a semiconductor testing device according to the present invention; DETAILED DESCRIPTION OF THE INVENTION

[0017] Hereinafter, a testing apparatus and a testing method for an electric element according to an embodiment of the present invention will be described with reference to the accompanying drawings. In the embodiments described in the specification, the IGBT will be mainly used as an example of a power semiconductor element as an electric element.

[0018] The present invention is not limited to IGBTs, but can be applied to various semiconductor elements such as reverse conducting IGBTs (RC-IGBTs), SiC transistors, MOSFETs, JFETs, thyristors, diodes, triacs, GaN transistors, thermistors, and posistors.

[0019] In the semiconductor element such as an IGBT, the transistor and diode are illustrated as being integrally configured, but this is not limiting. For example, the transistor and diode may be formed on separate chips and placed in a single package.

[0020] The present invention is not limited to semiconductor elements, and it goes without saying that the present invention can also be applied to electrical elements other than semiconductor elements, such as resistor elements, capacitors, coils, crystal elements, varistors, and ZNR.

[0021] It goes without saying that the embodiments of the present invention described in the specification and drawings can be combined in part or in whole with each other, and can be combined with modifications.

[0022] Fig. 2 is a diagram illustrating the configuration and explanation of the semiconductor device testing apparatus of the present invention. As shown in Fig. 2, the semiconductor device testing apparatus of the present invention has a housing 210, a chiller (cooling / heating device) 136, a heating / cooling plate 134, and a circulating water pipe 135 that circulates water between the heating / cooling plate 134 and the chiller 136.

[0023] The transistor 117 to be tested and the like are placed in close contact with the heating / cooling plate 134. To achieve close contact, a thermally conductive sheet may be placed and silicone grease may be applied.

[0024] 12, the partition wall 217 has an opening 216 for inserting a connection structure 218, which will be described with reference to Figures 9, 10, 11, etc. The partition wall 215 has a hole for inserting a power supply wiring 212.

[0025] 2 includes a power supply device 132 that supplies a test current and a test voltage to the semiconductor element 117, and a control circuit 133 that controls the semiconductor element 117 or sets test conditions. The power supply device 132 includes, for example, a power supply device 132a and a power supply device 132b. The power supply device 132a outputs a forward current Id (positive polarity), and the power supply device 132b outputs or generates a current Id (reverse polarity) in the opposite direction to the power supply device 132a. Although the IGBT has a collector current and the MOSFET has a drain current, in this specification, for ease of explanation, both are described as current Id.

[0026] The current flowing out of or into the power supply device 132 is detected or picked up by the current sensor 129, and the current is detected or measured by the clamp meter 128. The current sensor 129 may be placed at a position (current sensor 129a) where the current in the ground wiring in FIG. 1 is detected.

[0027] There are many types of current sensor 129, such as a pickup coil or a sensor made of a semiconductor element, but any type can be used as long as it can detect or measure the flowing current.

[0028] Although the current Id is described as a constant current, it is not limited to a constant current. It may be a variable current that changes depending on the test state of the semiconductor device being tested. Furthermore, what is supplied to the semiconductor device being tested is not limited to the current Id, and may be a voltage.

[0029] The control circuit 133 sets test conditions by changing the current Id, gate voltage Vg, and inter-channel voltage Vce of the transistor 117 so that the temperature information Tj of the semiconductor element 117 becomes a predetermined value, and then performs the test.

[0030] The temperature information Tj includes the temperature of a test element such as a transistor, the terminal voltage due to the current flowing through the element to be tested such as a transistor or diode, a change in the terminal voltage, temperature-related information obtained from the terminal voltage, a value calculated from the terminal voltage, heat obtained by measuring the test element, etc. Although the temperature information Tj is used in this specification, it goes without saying that the temperature information is not limited to Tj. The control circuit 133 controls the power supply device 132, which supplies a test voltage or current to the semiconductor device 117 under test.

[0031] If the temperature information Tj changes or changes to a predetermined value, it is determined that the semiconductor element 117 being tested has deteriorated or its characteristics have changed, and the test of the semiconductor element 117 is stopped or the test method or control method is changed.

[0032] The temperature of the semiconductor element 117 is maintained at a specified or predetermined value by heating or cooling the circulating water of the chiller 136. In addition, the temperature of the semiconductor element etc. is periodically changed in accordance with the test conditions, and the element is cooled or heated at a constant temperature.

[0033] The semiconductor element testing apparatus and semiconductor element testing method of the present invention can be applied to a wide variety of semiconductor elements 117 and semiconductor modules 117. As an example, the semiconductor element 117 in Fig. 24 has terminals P electrode terminal, O electrode terminal, and N electrode terminal to which a large current is applied or output, gate terminals g (gate terminal gm, gate terminal gs) to which a gate voltage is applied, collector terminals c (collector terminal cm, collector terminal cs), and emitter terminals e (emitter terminal em, emitter terminal es).

[0034] Fig. 24 shows an overview of the semiconductor device and its equivalent circuit diagram. In Fig. 24, the transistor is shown as an IGBT, but this is just one example, and it goes without saying that other types of transistors, such as SiC or GaN, may also be used.

[0035] 24(a1) and 24(a2) show a configuration having a transistor 117 (transistor 117m, transistor 117s) and a diode Di (diode Dim, diode Dis).

[0036] Figures 24(b1) and (b2) show a configuration in which multiple transistors are connected together to perform testing by connecting the terminals of a semiconductor element having a transistor 117 (transistor 117m or transistor 117s) and a diode Di (diode Dim or diode Dis).

[0037] 24(c1) and 24(c2) show the configuration of a semiconductor element in which the transistor 117 (transistor 117m or transistor 117s) and the diode D (diode Dm, diode Ds) have independent terminals.

[0038] In the following embodiments, the semiconductor element 117 shown in Fig. 24 will be mainly used as an example for explanation. However, it is not limited to this, and it goes without saying that the embodiments of the present invention can also be applied to electrical elements other than semiconductor elements, such as resistor elements. 1 is a block diagram and an explanatory diagram of a semiconductor device testing apparatus according to the present invention, which will be explained using FIG. 24(a2) as an example of a semiconductor device 117 to be tested.

[0039] The semiconductor device testing equipment has a power supply device 132a that generates a constant current in the forward direction and a power supply device 132b that generates a constant current in the reverse direction. When applying a test current to transistors 117s and 117m, the constant current is supplied from power supply device 132a. When applying a test current to diodes Dis and Dim, the constant current is supplied from power supply device 132b. The diodes may be built into the transistor chip or may be configured as separate external chips.

[0040] The connection to the switch circuit 124 for changing the connection is made using a fork plug 205. Connection and change of connection are made by inserting the fork plug 205 through an opening provided in the partition wall of the housing and making electrical contact with the switch circuit 124.

[0041] The power supply device 132 outputs a large constant current for testing the transistor 117. The power supply device 132 supplies power (current, voltage) in synchronization with a control signal from the control circuit board (controller) 111. The power supply device 132 can set the maximum voltage value to be output.

[0042] The power supply device 132 includes a power supply device 132a that outputs a forward current Id and a power supply device 132b that outputs a reverse current Id. The power supply devices 132a and 132b are controlled by the controller 111.

[0043] The switch circuit 122a (SWa) has a function of turning on (supply, application) and off (shutoff, open) the supply of the constant current output by the power supply device 132a. The switch circuit 122b (SWb) has a function of turning on (supply, application) and off (shutoff, open) the supply of the constant current output by the power supply device 132b.

[0044] It should be noted that the same function as the switch circuit 124a can be achieved by simultaneously turning on the switch circuit 124c and the switch circuit 124d, in which case the switch circuit 124a may be omitted.

[0045] In the case of inverter circuit operation during testing (for example, when transistor 117s is turned on, transistor 117m is turned off, and when transistor 117m is turned on, transistor 117s is turned off), testing of transistors 117s and 117m can be performed by controlling on / off signals applied to the gate terminals of transistors 117m and 117s and switch circuits 124c and 124d. In this case, switch circuit 124b is not required.

[0046] The switch circuit 124c mainly functions to short-circuit the channel (emitter terminal-collector terminal) of the transistor 117s, or to connect the ground wiring and the collector terminal of the transistor 117m.

[0047] The switch circuit 124d mainly has a function of short-circuiting the channel (emitter terminal-collector terminal) of the transistor 117m, or a function of connecting the power supply wiring 212 and the emitter terminal of the transistor 117s.

[0048] 1, a connector 202m is connected to the terminals (emitter terminal em, gate terminal gm, collector terminal cm) of a transistor 117m, and a connector 202s is connected to the terminals (emitter terminal es, gate terminal gs, collector terminal cs) of a transistor 117s.

[0049] 3, 8, etc., fork plug 205e is connected to the P electrode terminal (element terminal 226a), fork plug 205h is connected to the O electrode terminal (element terminal 226c), and fork plug 205c is connected to the N electrode terminal (element terminal 226b). By attaching or detaching fork plug 205, switch circuit 124 and terminals (P terminal, O terminal, N terminal) of semiconductor element 117 are connected to each other.

[0050] A predetermined constant current Ic is applied to the diode Di (diode Dim, diode Dis) of the semiconductor element 117 (semiconductor element 117s, semiconductor element 117m) to be tested during a period when the test current Id is not being applied. The equivalent resistance value of the diode changes with temperature, and the terminal voltage of the diode Di changes when a predetermined constant current is applied. Temperature information Tj is obtained from information on this terminal voltage Vi.

[0051] 1, a short circuit 137m is formed between the gate terminal gm and the emitter terminal em of the transistor 117m, and a short circuit 137s is formed between the gate terminal gs and the emitter terminal es of the transistor 117s. The short circuit 137 is not limited to a switch, but may be, for example, a short connector.

[0052] When the short circuit 137s is turned on, the gate terminal gs and the emitter terminal es of the transistor 117s are short-circuited, and the transistor 117s is diode-connected.

[0053] When the short circuit 137m is turned on, the gate terminal gm and the emitter terminal em of the transistor 117m are short-circuited, and the transistor 117m is diode-connected.

[0054] 3, a constant current circuit is configured to pass a constant current Icm through the diode Dim of transistor 117m, and the voltage across the diode Dim is measured by the voltage across the collector terminal cm and emitter terminal em of transistor 117m. Also, a constant current circuit is configured to pass a constant current Ics through the diode Dis of transistor 117s, and the voltage across the diode Dis is measured by the voltage across the collector terminal cs and emitter terminal es of transistor 117s.

[0055] When a constant current is to flow through the diode Di, the transistor 117 is turned off. The constant current Icm to the diode Dim is fed as a sink current from the transistor Tm. The constant current Ics to the diode Dis is fed as a sink current from the transistor Ts.

[0056] The voltage across the diode Dim is measured or obtained by a voltage detection circuit 116m connected to the collector terminal cm and emitter terminal em of a transistor 117m. The voltage across the diode Dis is measured or obtained by a voltage detection circuit 116s connected to the collector terminal cs and emitter terminal es of a transistor 117s. As shown in FIG. 1, a connector 202m is connected to the transistor 117m, and a connector 202s is connected to the transistor 117s.

[0057] A predetermined constant current Ic (Ics, Icm) for temperature monitoring is applied to at least one of the diodes Dm and Ds. The equivalent resistance value of the diode changes depending on the temperature of the semiconductor element 117, and application of the predetermined constant current changes the terminal voltage of the diode D (diode Dm, diode Ds). From information on this terminal voltage Vi, the temperature measurement circuits (temperature measurement circuits 115s, 115m) calculate temperature information Tj (temperature information Tjs, temperature information Tjm).

[0058] As shown in FIG. 1, a short circuit 137m is formed between the gate terminal gm and the emitter terminal em of a transistor 117m. A short circuit 137s is formed between the gate terminal gs and the emitter terminal es of a transistor 117s. The short circuit 137 is, for example, a switching transistor. Note that the short circuit 137 is not limited to elements such as transistors. For example, it may be mechanically shorted using a connector or a short pin.

[0059] When short circuit 137 (short circuit 137m, short circuit 137s) is turned on, the emitter terminal and gate terminal of transistor 117m or transistor 117s are shorted. When the emitter terminal and gate terminal of transistor 117m or transistor 117s are shorted, transistor 117m or transistor 117s are diode-connected. Note that short circuit 137 (short circuit 137s, short circuit 137m) may be disposed or configured within sample connection circuit 203 (sample connection circuit 203s, sample connection circuit 203m).

[0060] The sample connection circuit 203 includes a gate driver circuit 113, a gate signal control circuit 112, a voltage detection circuit 116 that measures the terminal voltage of the diode, a constant current circuit 118 (constant current circuit 118s, constant current circuit 118m) that generates a constant current to be applied to the diode, a drive variable circuit 126 (drive variable circuit 126s, drive variable circuit 126m), and the like.

[0061] In FIG. 1, the temperature of the semiconductor element 117 under test is measured by applying a constant current to the diode Di (diode Dim, diode Dis) and measuring the terminal voltage of the diode Di. However, this is not limited to this. Instead of the diode Di, a parasitic diode (in the case of a MOS transistor) additionally formed during the formation of the transistor 117 may be used to measure the temperature. Alternatively, a thermocouple, a temperature sensor, or the like may be used. The means for measuring the temperature may be built into the semiconductor element 117 or may be attached in close proximity to the semiconductor element 117. The temperature of the transistor 117 may also be measured by a thermocouple or the like attached to the package of the transistor 117.

[0062] 1, 9, and 10, the sample connection circuit 203 is arranged near the transistor 117 (semiconductor element 117) so as to shorten the length of the signal wiring 222 connected to the transistor 117. Nearby means approximately 50 mm or less.

[0063] The sample connection circuit 203m1 includes a gate driver circuit 113m that generates a gate signal waveform to be applied to the gate terminal gm of the transistor 117m, a drive variable circuit 126m that adjusts or sets the rising and falling waveforms of the gate signal, a short circuit 137m, and the like.

[0064] The sample connection circuit 203m2 includes a constant current circuit 118m that generates a constant current Icm to be applied to the diode Dm of the transistor 117m, and a voltage detection circuit 116m that measures or detects the terminal voltage of the diode Dm.

[0065] The sample connection circuit 203s1 includes a gate driver circuit 113s that generates a gate signal waveform to be applied to the gate terminal gs of the transistor 117s, a drive variable circuit 126s that adjusts or sets the rising and falling waveforms of the gate signal, a short circuit 137s, and the like.

[0066] The sample connection circuit 203s2 includes a constant current circuit 118s that generates a constant current Ics to be applied to the diode Ds of the transistor 117s, and a voltage detection circuit 116s that measures or detects the terminal voltage of the diode Ds.

[0067] The Vi voltage (Vis, Vim) is measured or acquired by a differential amplifier (subtractor) circuit. Therefore, an overvoltage is not applied to the transistor 117 and the diode Di, and the Vi voltage (Vis, Vim) can be acquired stably.

[0068] The differential amplifier (subtractor) circuit is not limited to an analog circuit that uses an operational amplifier circuit or the like. For example, it goes without saying that the terminal voltage of the diode Di and the terminal voltage of the variable drive circuit 126 may be analog-to-digital converted and the Vi voltage (Vis, Vim) may be obtained by digital circuit processing or the like. The same applies to the voltage detection circuit 116 (voltage detection circuit 116m, voltage detection circuit 116s) and its peripheral circuitry.

[0069] A terminal of the transistor 117m is connected to a connection pin 206 of a connector 202m, and a terminal of the transistor 117s is connected to a connection pin 206 of a connector 202s. The connector 202 is configured so that it can be easily attached to and detached from the terminal of the transistor 117m.

[0070] In the sample connection circuit 203 (sample connection circuit 203s1, sample connection circuit 203s2, sample connection circuit 203m1, sample connection circuit 203m2) in FIG. 1, a gate driver circuit 113, a drive variable circuit 126, and a constant current circuit 118 are arranged or formed.

[0071] As shown in FIG. 9, the sample connection circuit 203 is located separately from the device control circuit board 209 so that it can be located close to the transistor 117 under test.

[0072] It is preferable to provide one sample connection circuit 203 for each transistor 117 to be tested, or each transistor 117m, or each transistor 117s, etc. However, this is not limitative, and one sample connection circuit 203 including multiple signal circuits may be provided for multiple transistors 117, etc.

[0073] 9, the sample connection circuit 203 is connected to the transistor 117 via a connection pin 206 of the connector 202. The gate driver circuit 113 and the gate terminals g (gate terminals gm, gs) of the transistors 117 (transistors 117m, 117s) are arranged so as to be a short distance of 30 mm or less.

[0074] If the distance between the gate driver circuit 113 and the gate terminal g of the transistor 117 is long, noise or the like is superimposed on the gate terminal g, causing the transistor 117 to malfunction and directly leading to the destruction of the transistor 117.

[0075] As shown in FIG. 2, the sample connection circuits 203s (sample connection circuits 203s1 and 203s2) are connected to a device control circuit board 209s via a connector 208s.

[0076] The sample connection circuit 203m (sample connection circuit 203m1, sample connection circuit 203m2) is connected to the device control circuit board 209m via a connector 208m.

[0077] The control circuit board 111 (controller 111) controls the device control circuit board 209 (device control circuit board 209s, device control circuit board 209m), the sample connection circuit 203s (sample connection circuit 203s1, sample connection circuit 203s2), and the short circuit 137 (short circuit 137m, short circuit 137s), and transmits and receives various data, voltages, and current values ​​as necessary.

[0078] 9, the device control circuit board 209 is placed in room B of the housing 210 of the semiconductor device testing apparatus. The housing 210 is a frame or the main body of the apparatus in which the power supply unit 132, the drive circuit, and the heating / cooling plate 134 of the semiconductor device testing apparatus are incorporated. The sample connection circuit 203 is placed in the C1 chamber of the housing 210 of the semiconductor device testing apparatus in order to be located close to the transistor 117 to be tested.

[0079] The sample connection circuits 203 (sample connection circuits 203m1, 203m2, 203s1, and 203s2) are connected to a connector 208 arranged on the side of the housing 210. Wiring connected to connection pins 206 of the connector 208 is connected to a device control circuit board 209 in Room B.

[0080] In the embodiment of the present invention, a fork plug will be described as an example of the connection plug 205. Fork plugs 205 are connected to one end of each connection wiring 211 and each power supply wiring 212, such as fork plug 205e connected to the collector terminal of transistor 117 and fork plug 205d connected to one terminal of power supply device 132, and are then connected to conductor plate 204.

[0081] Although the present specification and drawings describe the conductor plate 204, it is not limited to a plate shape and may be rod-shaped. It may be composed of multiple structures. It may have any shape as long as it can be joined to a structure such as the fork plug 205. For example, it may be a structure such as a socket or connector. Furthermore, the conductor plate 204 may be in the shape of a fork plug, and the fork plug 205 may be connected to the fork plug.

[0082] The present invention may have any configuration as long as a fork plug 205 or the like is formed or placed on at least one terminal of the transistor 117 to be tested, and an electrical connection is made between the fork plug 205 and a connection object such as a conductor plate 204.

[0083] The fork plug 205 will be described as being inserted into a component or structure that separates spaces, such as the partition wall 214. However, this is not limiting. For example, the fork plug 205c may be connected to the conductive plate 204b, inserted through the partition wall 214, and electrically connected to one terminal (emitter terminal e) of the transistor 117.

[0084] The partitions 214, 215, and 217 of the semiconductor device testing apparatus of the present invention shown in Fig. 9 and other figures may be of any shape as long as they divide or separate spaces or regions, and may have a wide variety of configurations or structures such as a wall, plate, mesh, film, or foil.

[0085] The fork plug 205 may have any configuration, structure, form, style, or method that allows it to be electrically connected to an object such as the conductive plate 204 by press-fitting, pressure welding, insertion, crimping, clamping, fitting, or the like.

[0086] The test current Id to be passed through the transistor 117 is supplied by operating the power supply device 132. The power supply device 132 is controlled to operate / not operate (on / off) by a signal from the control circuit board (controller) 111. The power supply device 132 also switches between outputting and not outputting the current Id. The device control circuit board 209 is controlled by the control circuit board (controller) 111.

[0087] 1, 3, 8, etc., the transistor 117 to be tested will be described as having a diode Di (diode Dim, diode Dis) as shown in FIG. 24(a). The emitter terminal em of the transistor 117m will be described as being grounded. The gate terminal g (gate terminal gm, gate terminal gs) of the transistor 117 (transistor 117m, transistor 117s) is connected to the gate driver circuit 113 (gate driver circuit 113m, gate driver circuit 113s).

[0088] The sample connection circuit 203 (sample connection circuit 203m, sample connection circuit 203s) has a gate driver circuit 113, a drive variable circuit 126, a constant current circuit 118, and a voltage detection circuit 116 arranged or formed therein.

[0089] The sample connection circuit 203 is connected to the transistor 117 via a connection pin 206 of the connector 202. The gate driver circuit 113 and the gate terminal g of the transistor 117 are arranged so that the distance between them is short, 30 mm or less. If the distance between the gate driver circuit 113 and the gate terminal g of the transistor 117 is long, noise etc. will be superimposed on the gate terminal g, causing the transistor 117 to malfunction.

[0090] 1 and 3, a test signal is applied from the gate driver circuit 113 to the gate terminal g of the transistor 117. The gate driver circuit 113 has an operational amplifier circuit.

[0091] 9, the device control circuit board 209 is placed in room B of a housing 210 of the semiconductor device tester. The housing 210 incorporates a power supply unit 132, a drive circuit system, a heating / cooling plate 134, and the like.

[0092] The sample connection circuit 203 is placed in the C1 chamber of the housing 210 of the semiconductor device testing device in order to be located close to the transistor 117 to be tested. The sample connection circuit 203 is connected to a connector 208 placed on the side of the housing 210. Wiring connected to the connection pin 206 of the connector 208 is connected to a device control circuit board 209 in the B chamber.

[0093] The sample connection circuit 203 is connected to a device control circuit board 209 by connection pins 206 of a connector 208. The sample connection circuits 203 are individually arranged corresponding to the transistors 117 to be tested, and the sample connection circuits 203 are configured so as to be easily detachable by connectors 202, etc.

[0094] A constant current circuit 118 supplies a constant current Ic to a diode Di arranged or formed between the channels of the transistor 117. A voltage detection circuit 116 buffers the terminal voltage of the diode Di (to reduce the output impedance) and outputs it as a voltage Vi. The voltage Vi is converted from analog to digital by a temperature measurement circuit 115.

[0095] The temperature measurement circuit 115 obtains temperature information Tj of the transistor 117 from the terminal voltage Vi and transfers it to the control circuit board 111. The temperature information is output from the connector 213 of the device control circuit board 209 to the mother board 207 and sent to the control circuit board 111. The gate driver circuit 113 applies a set on-voltage to the gate terminal of the transistor 117 at a set frequency (on-off cycle).

[0096] The Vg signal voltage output from the gate driver circuit 113 causes the transistor 117 to operate / non-operate (ON / OFF), and a current Id flows between the channels of the transistor 117 while the transistor 117 is ON.

[0097] The resistance value Vr of the variable drive circuit 126 is configured so that it can be set to a constant voltage or a time-varying voltage between 0 (Ω) and 500 (Ω). The variable drive circuit 126 can also vary the gate voltage it outputs. For example, when applying a constant current Ic to a transistor, it is set to a voltage higher than the on-voltage during testing. When supplying a current Id to test a transistor, a voltage lower than the above voltage is applied to the gate terminal of the transistor. The output voltage can be set or changed periodically in real time.

[0098] The drive variable circuit 126 can set the slope of the rising waveform (rise time Tr) and the slope of the falling waveform (fall time Td) of the gate voltage signal applied to the gate terminal g of the transistor 117.

[0099] 3 and other figures, the resistance value Vr of the drive variable circuit 126 is variable, but this is not limiting. For example, the drive variable circuit 126 may be an external resistor.

[0100] A constant current circuit 118 supplies a predetermined constant current Ic. The constant current Ic is applied to a diode Di. By monitoring the terminal voltage of the diode Di, the temperature change of the transistor 117 can be measured or observed.

[0101] FIG. 4 is an explanatory diagram and block diagram of a semiconductor element testing device of the present invention, and is mainly an explanatory diagram of a circuit that sets the impedance of the gate terminal of a semiconductor element such as transistor 117, and the rising (turn-on) waveform and falling (turn-off) time waveform of the signal waveform applied to the gate terminal.

[0102] 4, a plurality of drive element circuits 127 are arranged in a drive variable circuit 126. The drive variable circuit 126 is arranged to correspond to the transistors 117s and 117m. The resistance element of the drive element circuit 127a is configured so that the resistance value can be varied within a range from 0Ω to 300Ω.

[0103] The switch circuit S1 (switch circuit S1s, switch circuit S1m), switch circuit S2 (switch circuit S2s, switch circuit S2m), switch circuit S3 (switch circuit S3s, switch circuit S3m), and switch circuit S4 (switch circuit S4s, switch circuit S4m) are configured so that they can be independently set to on or off (open or close). Therefore, multiple drive element circuits 127 can be selected simultaneously.

[0104] To maintain a low on-state voltage, IGBTs and bipolar transistors require a large base current. On the other hand, power MOSFETs are voltage-controlled elements, so they can be driven with just the small amount of power required to charge the gate. However, a gate driver circuit may be added to enable high-speed charging and discharging. The input capacitance of a power MOSFET is relatively large, so a low-impedance signal source is required to quickly charge and discharge the input capacitance, especially when switching at high speeds. A low impedance drive is required to shorten the turn-on time, but increasing the gate-source voltage conversely lengthens the turn-off time.

[0105] As described above, it is necessary to appropriately set the input impedance to the gate terminal in accordance with the characteristics of the semiconductor element 117 to be tested. In the present invention, the input impedance can be easily set by providing the drive element circuit 127 within the drive variable circuit 126. In other words, the switching time can be changed by changing the gate resistance value of the semiconductor element to be tested.

[0106] In the present invention, if it is desired to change the switching performance on the ON and OFF sides, this can be done by selecting any drive element circuit 127 in the drive variable circuit 126 and changing the resistance value of the drive element circuit 127a.

[0107] For example, in the case of drive element circuit 127b, the gate resistance when on is R1 and the gate resistance when off is R2. In the case of drive element circuit 127c, the gate resistance when on is R1 and R2 in parallel and the gate resistance when off is R2. In the case of drive element circuit 127d, the gate resistance when on is R2 and the gate resistance when off is R1 and R2 in parallel. The selection of drive element circuit 127 is performed by controller 111.

[0108] As described above, the semiconductor device testing apparatus of the present invention can test semiconductor devices in actual use conditions using the drive variable circuit 126. In addition, overload driving and the like can be easily performed.

[0109] 4, it has been explained that the resistance value of the resistance R can be varied. In the snubber circuit 138 described in FIGS. 5, 6, 7, etc., it is also preferable to configure the capacitance of the capacitor C, the resistance value of the resistor R, and the capacitance of the coil L that constitute the snubber circuit 138 so that they can be varied.

[0110] Snubber circuits are often used in circuit designs that use transistors, etc. Snubber circuits are circuits that suppress ringing that occurs in switching circuits, and there are various types, such as RC snubber circuits, which are made up of resistors and capacitors, and RCD snubber circuits, which are made up of resistors, capacitors, and diodes.

[0111] Typically, a snubber circuit is connected between the switching node and ground (GND), and in principle absorbs ringing by dissipating the energy of high-frequency components in a resistor or by regenerating it in the power supply.Semiconductor test equipment must be adapted to actual use when testing semiconductor elements 117.

[0112] 5, 6, and 7 are explanatory diagrams and block diagrams of the semiconductor device test circuit of the present invention. Note that, for ease of explanation and illustration, Fig. 5, 6, and 7 are shown as separate drawings, but it goes without saying that simultaneous or multiple snubber circuits may be formed or arranged, or snubber circuits may be formed or arranged separately.

[0113] In the drawings, for ease of illustration or understanding, configurations unnecessary for the explanation of the embodiments, etc. For example, the gate variable circuit 126 in Fig. 4, the snubber circuit 138 in Fig. 5 to Fig. 7, etc. are not shown in the other drawings.

[0114] By taking into consideration the snubber circuit incorporated in the actual circuit, or by incorporating an appropriate snubber circuit into the semiconductor test equipment and conducting the test, it is possible to realize appropriate testing or evaluation of the semiconductor device. The surge voltage is generated by the stray inductance of the circuit. The snubber circuit is connected in parallel to the switching element such as the transistor 117 to absorb the surge voltage. There are two types of snubber circuits: individual snubber circuits that are attached one-to-one to each element, and lump-sum snubber circuits that are attached to the power line all at once.

[0115] When the current in a circuit is suddenly interrupted, stray inductance causes a sudden voltage rise. A snubber circuit suppresses this surge voltage, protecting the semiconductor element serving as the switching element and surrounding electronic components. The semiconductor testing apparatus and semiconductor element testing method of the present invention use and select snubber circuit 138, allowing tests to be performed that are close to actual use conditions. Tests under overload conditions can also be easily performed.

[0116] 5, a snubber circuit 138a (RC snubber circuit) and a snubber circuit 138b (RCD snubber circuit) are configured. The snubber circuit 138a is selected by a switch circuit S1, and the snubber circuit 138b is selected by a switch circuit S2.

[0117] The RC snubber circuit 138a is suitable for a chopper circuit, but the loss generated by the snubber resistor R1 in the snubber circuit 138a is large, so when applied to a large-capacity element, the snubber resistor must be set to a low value, and the drain current increases when turned on.

[0118] The RCD snubber circuit 138b has a diode added to the RC snubber circuit 138a, so that the snubber resistance R2 can be increased, thereby avoiding the burden of the element current when turned on.

[0119] 6 includes a resistor R1, a capacitor C1, and a diode D1. The snubber circuit 138a is selected by a switch circuit S1 and a switch circuit S2.

[0120] 6 is suitable for high-frequency switching applications because it can suppress turn-off surge voltages, and is also characterized by low loss in the snubber circuit 138a.

[0121] A coil component may also be generated in the snubber circuit 138, which may generate a surge voltage. To test or evaluate the effect of this surge voltage, the coil L is selected by the switch circuit S2 in FIG.

[0122] 7 is a simple circuit, but is prone to voltage oscillation due to LC resonance caused by the stray inductance of the main circuit and the snubber capacitor. Furthermore, snubber circuit 138 (RCD snubber circuit) may experience high spike voltages due to snubber diode D and voltage oscillations during reverse recovery of snubber diode D. The snubber circuit 138b is selected by the switch circuit S1, and the snubber circuit 138a is selected by the switch circuit S2.

[0123] 5, 6 and 7 are incorporated into the semiconductor device testing device of the present invention, and are selected and controlled by the control circuit 111. Also, each switch circuit S is selected.

[0124] As described above, by selecting or adopting a snubber circuit 138 suited to an actual circuit, it is possible to carry out a test suited to actual use. Also, by generating or suppressing a surge voltage or the like, it is possible to actually measure the effect on the semiconductor element 117 being tested.

[0125] It goes without saying that the driver variable circuit 126 in Fig. 4 may be combined with the snubber circuit 138 in Fig. 5, 6, or 7. It also goes without saying that the driver variable circuit 126 and snubber circuit 138 may be combined with other embodiments of the present invention. It goes without saying that the driver variable circuit 126 and snubber circuit 138 may be added or combined with other embodiments.

[0126] In order to prevent the transistor 117 from generating heat due to the constant current Ic, the constant current Ic is set to a current value that is sufficiently smaller than the constant current Id that flows through the channel of the transistor 117 or the like.

[0127] Specifically, the constant current Ic is set to 1 / 1000 or less of the current Id that is passed through the transistor 117 during testing. Preferably, the current Ic that is passed through the transistor 117 is set to 1×10 of the current Id. 6 1 or more of 1 x 10 4 The constant current Ic should be between 0.1mA and 100mA.

[0128] The channel current Id, collector current, etc. are changed, and the diode Di voltage (voltage between the collector and emitter terminals of the transistor 117) is measured to determine the temperature coefficient K. The determined temperature coefficient K is stored in the temperature measurement circuit 115.

[0129] The temperature coefficient K is determined by heating the transistor 117 to a predetermined temperature using the heating / cooling plate 134, passing a constant current Ic through the diode Di, and measuring the terminal voltage. By varying the predetermined temperature and measuring the terminal voltage of the diode Di, the terminal voltage of the diode Di relative to the temperature of the transistor 117 can be obtained. Therefore, the temperature coefficient K of the transistor 117 can be determined from the terminal voltage of the diode Di relative to the temperature.

[0130] The constant current Ic flows through the diode Di when the channel current Id is not flowing. In other words, when the transistor 117 is not turned on, the constant current Ic flows and the voltage across the diode Di is measured. The voltage detection circuit 116 outputs the terminal voltage Vi (terminal c-terminal e) of the diode Di.

[0131] The voltage detection circuit 116 is not limited to one configured with an operational amplifier element, but may be any circuit having an output impedance lower than the input impedance.

[0132] The obtained temperature information Tj is sent to a control circuit board (controller) 111. When the temperature information Tj becomes equal to or greater than a predetermined set value, the control circuit board (controller) 111 determines that the transistor 117 is in a predetermined stress state or a deteriorated state, and changes the control of the test or stops the test.

[0133] In the embodiments such as FIG. 1(a), the switch circuit 124 uses the symbol for the switch circuit. Examples of the switch circuit 124 include a transistor, a mechanical relay, a phototransistor, a photodiode switch, a photoMOS relay, and a MOSFET. As shown in FIG. 1(b), the switch circuit 124 is preferably a MOSFET. A MOSFET is preferable because it has a small inter-channel voltage (Vsd). In the following embodiments, the switch circuit 124 will be described as a power MOSFET 124.

[0134] It is preferable to select a channel voltage (Vsda) of the power MOSFET 124a when it is on that is equal to or lower than the channel voltage (Vsdb) of the power MOSFET 124b when it is on. The channel voltage (Vsda) of the power MOSFET 124a when it is on is set to be smaller than the channel voltage (Vsdb) of the power MOSFET 124b when it is on. This is to ensure that the current Im flows stably when the switch circuit 124a is turned on and the terminals of the power supply device 132 are short-circuited.

[0135] The switch circuit 124 is mounted or formed on the switch circuit board 201. The switch circuit 124 is connected to a conductor plate 204. The conductor plate 204 is, for example, a copper plate having a thickness of 5 mm and a width of 50 mm. The length of the conductor plate 204 is, for example, 250 mm. 8, 9, and 13 show the fork plug 205 and the connection (contact) state between the fork plug 205 and the conductive plate 204. FIG.

[0136] Fig. 13(a) is a diagram showing a state in which a conductor plate 204 is attached to a switch circuit board (printed circuit board) 201 on which a switch circuit and the like are formed, and a fork plug 205 is connected to the conductor plate 204, as viewed from above. Fig. 13(b) is an explanatory diagram showing a state in which the fork plug 205 is clamped at one end of the conductor plate 204.

[0137] 8, 9, 10, etc., two conductive plates 204 are attached to the switch circuit board 201. The conductive plates 204 and the switch circuit board 201 are tightly attached and fixed together with screws or the like.

[0138] Electrical connection is achieved by mechanically fitting fork plug 205 and conductive plate 204. When fork plug 205 is inserted into conductive plate 204, the U-shaped or rectangular portion (recess) of fork plug 205 is properly joined to conductive plate 204. 13, a connecting bolt 219 is attached to the fork plug 205. A connecting wire 211 is connected to the connecting bolt 219.

[0139] A cross section taken along line AA' in Figure 13(a) is shown in Figure 13(b). The conductive plate 204 and the fork plug 205 make contact at contact parts 220a and 220b formed on the fork plug 205. The contact parts 220 are made of phosphor bronze, nickel alloy, or beryllium copper, and have spring properties. The surface of the contact parts 220 is gold- or silver-plated. Plating improves the electrical stability of the connection parts 220. The use of beryllium copper is particularly preferable.

[0140] As shown in FIGS. 9 and 10, the fork plug 205 and the conductor plate 204 are electrically connected by inserting the fork plug 205 through an opening 216 in the partition wall 214 .

[0141] 9 shows the arrangement of each component of the semiconductor device testing apparatus of the present invention. The housing 210 of the semiconductor device testing apparatus has multiple sections. The lower part of the housing is separated into chamber A and chamber B. The power supply unit 132 is placed in chamber A. Chamber A and chamber B are separated by a partition wall 215. Chamber C1 and chamber C2 are separated by a partition wall 217.

[0142] The power supply device 132, switch circuit board 201, and transistor 117 generate large noises due to repeated operation / non-operation. The noise can cause malfunctions of the circuit boards, etc. Malfunctions can be prevented by providing electrostatic and electromagnetic shields to the partition walls of each chamber.

[0143] Electrostatic shielding and electromagnetic shielding are realized by attaching or forming conductive plates, metal plates, metal films, or wire mesh around the periphery of each chamber or on the surface or inside of the partition wall.

[0144] In the C1 chamber, the heating / cooling plate 134, the circulating water pipe 135, etc. shown in FIG. 2 are arranged, and the transistor 117 to be tested is arranged in close contact with the heating / cooling plate 134.

[0145] Water leak sensors (not shown) are installed around the heating and cooling plate in chamber C1. If the circulating water (cooling medium) leaks, the water leak sensors will activate and stop the semiconductor device testing equipment or issue an alarm.

[0146] A drainage groove (not shown) is formed around the periphery of the heating / cooling plate 134. When circulating water (cooling medium) leaks from the heating / cooling plate, the circulating water (cooling medium) flows into the drainage groove and is discharged outside the semiconductor device testing apparatus. The heating / cooling plate 134 is mounted on a tray (not shown), and the tray is configured to be detachable from the partition wall 214 . As described above, the partition wall 214 is configured so that even if the circulating water pipe 135 or the like is damaged, the circulating water (cooling medium) or the like will not leak into the lower chambers A and B.

[0147] A partition wall 215 is formed between chamber A, in which the power supply unit 132 is disposed, and chamber B, in which the drive circuit system is disposed. An electrostatic shield plate or an electromagnetic shield plate is disposed on the partition wall 215, which blocks noise from the power supply unit 132 and prevents the noise from being applied to the drive circuit system in chamber B.

[0148] In this embodiment of the present invention, a fork plug 205 is inserted from chamber C2 and connected to the conductive plate 204 in chamber B. An opening 216 into which the fork plug 205 is inserted is formed in the partition wall 214.

[0149] In this embodiment of the present invention, the fork plug 205 is inserted from the top to the bottom. However, the present invention is not limited to this. For example, the conductor plate 204 may be placed in the C2 chamber, and the fork plug 205 may be inserted from the B chamber to electrically connect the fork plug 205 and the conductor plate 204.

[0150] 13(c), a connector 213 is attached to a motherboard 207. A control circuit board 111, a device control circuit board 209, and a switch circuit board 201 are attached to the connector 213 of the motherboard 207. The number of switch circuit boards 201 is prepared according to the number of transistors 117 to be tested. The number of switch circuit boards 201 can be easily changed by changing the number of switch circuit boards 201 attached to the motherboard 207.

[0151] Temperature information Tj, voltage Vi, a control signal for the variable drive circuit 126, a control signal for the constant current circuit 118, etc. are transmitted to the motherboard 207. In addition, power supply wiring and ground wiring for each circuit are formed and supplied to each circuit board via a connector 213.

[0152] 13(c), the conductive plate 204 is disposed so as to protrude from the switch circuit board 201. A fork plug 205 is connected to this protruding portion.

[0153] The fork plug 205a is connected to the conductor plate 204a of the switch circuit board 201a. The power supply wiring 212 is connected to the switch circuit board 201a through an opening 216 in the partition wall 215.

[0154] 13 illustrates that the fork plug 205 is inserted from top to bottom into the opening 216 of the partition wall 214 to electrically connect the fork plug 205 and the conductor plate 204, but this is not limiting. For example, it goes without saying that the partition wall 214 may be arranged vertically, and the fork plug 205 may be inserted laterally (for example, from right to left) into the opening 216 of the partition wall 214 arranged vertically to electrically connect the fork plug 205 and the conductor plate 204.

[0155] 9 and 10, fork plug 205d is connected to conductor plate 204c of switch circuit board 201b. Power supply wiring 212 is connected to switch circuit board 201b through opening 216 in partition wall 215. Fork plug 205b is connected to conductor plate 204b of switch circuit board 201a. Power supply wiring 212 is connected to switch circuit board 201a through opening 216 in partition wall 215.

[0156] 8, a switch circuit 124b is disposed between the conductor plates 204d and 204c of the switch circuit board 201b, and electrically shorts the conductor plates 204d and 204c. By shorting the conductor plates 204d and 204c, a current output by the power supply device 132 is supplied to the transistor 117 as the test current Id.

[0157] 8, switch circuit 124a is disposed between conductor plate 204i and conductor plate 204j of switch circuit board 201a. When switch circuit 124a is turned on, conductor plate 204i and conductor plate 204j are short-circuited. When this short-circuit occurs, current Id output by power supply device 132 flows to ground as discharge current Im. Alternatively, the charge stored in power supply device 132 is discharged. Therefore, transient voltages and the like are not applied across the channels of transistor 117, and transient currents and the like do not flow through transistor 117, preventing breakdown of electrical elements such as transistor 117.

[0158] A fork plug 205c is connected to the conductive plate 204b. A fork plug 205f is connected to the conductive plate 204a. A fork plug 205e is connected to the conductive plate 204d. A fork plug 205d is connected to the conductive plate 204c.

[0159] The fork plug 205 is made of a metal such as aluminum. The fork plug 205 has a nickel-plated base and a silver-plated surface. The fork plug 205 is formed with a thread so that the connection wiring 211 can be attached to the fork plug 205 with a connection bolt 219 .

[0160] 10 shows two switch circuit boards 201a and 201b. The switch circuit board 201 is connected to a connector 213 on the mother board 207.

[0161] 9 and 10, for example, fork plug 205c is inserted through opening 216 in partition wall 214 provided between chamber C2 and chamber B and connected to conductive plate 204b. Fork plug 205e is inserted through opening 216 in partition wall 214 provided between chamber C2 and chamber B and connected to conductive plate 204d.

[0162] The current flowing through the transistor 117 to be tested is large, on the order of several hundred amperes or even kiloamperes, so the connecting wires 211 used are also thick. As a result, the thick connecting wires 211 and power supply wires 212 are hard and cannot be easily bent. As a result, it is not easy to change the connections of the connecting wires 211 and power supply wires 212.

[0163] In the semiconductor device testing apparatus of the present invention, the fork plug 205 is inserted from the C2 chamber into any opening 216 in the partition wall 214. By changing the position of the opening 216 into which the fork plug 205 is inserted, connection to any switch circuit board 201 can be made.

[0164] Therefore, changing the connection with the switch circuit board 201 used depending on the test conditions of the transistor 117 does not require changing the wiring of the connection wiring 211, but only requires changing the position of the opening 216 into which the fork plug 205 is inserted. Also, as shown in Figure 13(c), the switch circuit board 201 only requires changing the position of the connector 213 that connects to the motherboard 207.

[0165] As described above, the switch circuit board 201 and the device control circuit board 209 connected to the motherboard 207 are arranged according to the test content of the electric elements 117 such as semiconductor elements and the number of electric elements 117 to be tested. In addition, the connection switching with the switch circuit board 201 etc. is performed by changing the position of the fork plug 205 inserted into the opening 216 of the partition wall 214.

[0166] 1, 8, 9, and 10, the connection wiring 211a connected to the transistor 117 is connected to the fork plug 205e. The connection wiring 211b connected to the transistor 117 is connected to the fork plug 205h. The connection wiring 211c connected to the transistor 117 is connected to the fork plug 205c.

[0167] By attaching and detaching the fork plugs 205e, 205f, and 205c to and from the conductive plate 204, the semiconductor device 117 to be tested can be attached and detached from the test circuit.

[0168] 8 and other figures, the number of switch circuit boards 201b that short-circuit the outputs of the current power supplies 121 may correspond to the number of the current power supplies 121. For example, if the semiconductor device testing equipment has one current power supply 121, one switch circuit board 201b (switch circuit 124b) may be sufficient.

[0169] The number of switch circuit boards 201 required is equal to or greater than the number of transistors 117 to be tested. For example, if there are 12 transistors 117 to be tested, it is preferable to prepare 12 or more switch circuit boards 201. Specifically, the number of switch circuit boards prepared corresponds to the number of electric elements 117 to be tested.

[0170] It is cost-effective to use the same board specifications for the switch circuit board 201 corresponding to the semiconductor element 117 to be tested and the switch circuit board 201 that shorts the output of the power supply device 132. In other words, the switch circuit boards 201 have a common configuration.

[0171] 9, it is preferable that a plurality of transistors or the like be mounted as switch circuits 124 on switch circuit board 201. The greater the number of switch circuits 124, the smaller the impedance that short-circuits two conductive plates 204 can be.

[0172] 14(a) and (b) illustrate the state in which the fork plug 205 is inserted into the opening 216 of the partition wall 214. Fig. 14(a) is a view from the front side of the partition wall 214, and Fig. 14(b) is a view from the back side of the partition wall 214.

[0173] 14, fork plug 205b and multiple fork plugs 205c (fork plugs 205c1 to 205c5) are connected to conductive plate 204b, for example. Fork plug 205e1 is connected to conductive plate 204d1, fork plug 205e2 is connected to conductive plate 204d2, fork plug 205e3 is connected to conductive plate 204d3, fork plug 205e4 is connected to conductive plate 204d4, and fork plug 205e5 is connected to conductive plate 204d5.

[0174] 9, 10, 14, etc., the fork plug 205 is shown as being inserted downward from above the partition wall 214. When the fork plug 205 is inserted downward from above the partition wall 214, the weight of the fork plug 205 often maintains a good connection with the conductor plate 204.

[0175] However, fork plug 205 may be configured to be inserted in the left-right direction (horizontally), in which case the weight of fork plug 205 or connection wiring 211 connected to fork plug 205 may cause poor connection with conductive plate 204.

[0176] 13, 31, 32, and 33 are explanatory diagrams of a configuration in which the fork plug 205 is inserted laterally and the connection state of the fork plug 205 to the conductor plate 204 is stably maintained.

[0177] The mounting plate 510 is attached to the partition wall 214, or is arranged or configured as the partition wall 214. The signal line insertion portion 512 of the mounting plate 510 is a portion for connecting the signal wires 222, 235, and the connector 213.

[0178] As shown in the figure, the mounting plate 510 has a plurality of insertion holes 514 formed therein for inserting the fork plugs 205. Also, screw holes 516 for fixing the mounting plate 510 and the fixing plate 511 are formed or configured therein.

[0179] As shown in the figure, the fixing plate 511 also has a plurality of fixing holes 515 formed therein for inserting and fixing the fork plugs 205. In addition, attachment holes 517 for fixing the attachment plate 510 and the fixing plate 511 are formed, arranged, or configured therein.

[0180] 13, 17, and 32, a temperature sensor 521 is attached to the fork plug 205a, etc. Examples of the temperature sensor 521 include a digital temperature sensor IC and an analog temperature sensor IC. If the connection between the conductor plate 204 and the fork plug 205a, etc., is poor and heat is generated at the contact point, the temperature sensor 521 measures the temperature change and sends the temperature data to the control circuit 133, which then controls whether to stop or continue the test of the semiconductor element.

[0181] Also, if there is no change in temperature at all after the test starts and the test current is supplied to the semiconductor element, it is determined to be a connection abnormality (the semiconductor device is not connected), and the control circuit 133 controls whether to stop or continue the test of the semiconductor element.

[0182] The fork plug 205 is made up of a fork plug 205a which is a tip portion and a fork plug 205b which is an extension portion. The fork plug 205a and the fork plug 205b which is an extension portion are integrally formed using a screw (not shown) or the like.

[0183] A groove 518 is configured or formed between fork plug 205a and fork plug 205b. A fixing plate 511 is inserted into this groove 518, and attachment plate 310 and fixing plate 511 are integrated with fixing screws 224. In addition, fixing plate 511 fixes fork plug 205 to conductive plate 504 so that it does not come off.

[0184] 32(a), the tip of the fork plug, fork plug 205a, is inserted into insertion hole 514 of mounting plate 510. At the same time, the tip of fork plug 205a is brought into contact with conductive plate 204, thereby electrically connecting fork plug 205a to conductive plate 204.

[0185] 33(a) is an explanatory diagram showing a state in which the fork plug 205a of the attachment plate 510 is inserted and the fork plug 205a is integrated with the conductive plate 504 (not shown). A plurality of fork plugs 205a are inserted into the insertion hole 514 at the same time.

[0186] Next, as shown in FIG. 32(b), the fixing holes 515 of the fixing plate 511 are aligned with the insertion holes 514, and adjustments are made so that the fork plug 205 and the conductive plate 204 are securely fixed.

[0187] 32(c), fixing plate 511 is slid and adjusted so that one side of fixing hole 515 of fixing plate 511 is within groove 518 of fork plug 205. After adjustment, fixing screw 224 is inserted into screw hole 516, and attachment plate 310 and fixing plate 511 are integrated with fixing screw 224. In addition, fork plug 205 is pressed down by fixing plate 511, and fork plug 205 and conductive plate 504 are fixed in place.

[0188] 33(b) is an explanatory diagram showing a state in which fork plugs 205a are inserted into attachment plate 510 and fixing plate 511, and fixing plate 511 is slid and moved so that one side of fixing hole 515 in fixing plate 511 is inside groove 518 of fork plug 205. By sliding fixing plate 511, multiple fork plugs 205a are fixed simultaneously. Therefore, multiple fork plugs 205a can be easily fixed.

[0189] 13, 32, and 33 have been described as examples in which the fork plug 205 is inserted horizontally, but the present invention is not limited to this. It goes without saying that the present invention may also be applied to cases in which the fork plug 205 is inserted vertically, as shown in Figures 9 and 10. It also goes without saying that the present invention is useful when the fork plug 205 is inserted from below upward.

[0190] 13, 17, 32, and 33, grooves 518 are formed or configured in fork plugs 205, connection holders 233, etc., but this is not limited to this. Groove 518 may have any configuration or shape as long as it integrates fixing plate 511, etc. with bulkhead 217, mounting plate 510, etc., and simultaneously fixes multiple fork plugs 205. For example, it goes without saying that a protrusion (not shown) may be formed or configured in fork plugs 205, connection holders 233, etc., and the fork plugs 205, connection holders 233, etc., so that they can be fixed by pressing the protrusion with fixing plate 511, etc.

[0191] Turning on and off the switch circuit 124 of the switch circuit board 201 generates a large amount of noise. As a countermeasure against this, although not shown in FIG. 13(c), a metal plate that functions as a shield is placed between the two switch circuit boards 201 and is grounded. Alternatively, a metal plate that functions as a shield may be placed on the fixed plate 511 and the attachment plate 510 and the metal plate may be grounded. The fixed plate 511 and the attachment plate 510 may be made of a material that has a shielding function.

[0192] The heat generated by the switch circuit 124 is dissipated to the conductor plate 204. A heat sink (not shown) is attached to the switch circuit 124. The ground terminal of the switch circuit 124 is connected to the ground of the switch circuit board 201. The heat of the conductor plate 204 is also dissipated via the ground copper foil of the switch circuit board 201.

[0193] 8, conductive plates 204i and 204j are attached to switch circuit board 201a. Conductive plate 204j is connected to fork plug 205j. Conductive plate 204i is connected to fork plug 205i. Fork plug 205i is connected to an output terminal of power supply device 132. Conductive plate 204j is connected to fork plug 205j. Fork plug 205j is connected to a ground terminal of power supply device 132.

[0194] When the switch circuit 124a is turned on (closed), the output terminals of the power supply device 132 are short-circuited, and a short-circuit current Im flows to ground. Therefore, the output current of the power supply device 132 is not supplied to the transistor 117. When the switch circuit 124a is open, the output current Id of the power supply device 132 is supplied to the transistor 117.

[0195] Conductive plates 204c and 204d are attached to switch circuit board 201b. Conductive plate 204c is connected to fork plug 205d. Fork plug 205d is connected to the output terminal of power supply device 132. Conductive plate 204d is connected to fork plug 205e. Fork plug 205e is connected to the collector terminal of transistor 117 to be tested.

[0196] Conductive plates 204e and 204f are attached to switch circuit board 201c. Fork plugs 205h and 205g are connected to conductive plate 204f. Fork plug 205a is connected to conductive plate 204e. Fork plug 205a is connected to the output terminal of power supply device 132. Fork plug 205h is connected to the O terminal of transistor 117 to be tested.

[0197] Conductive plates 204b and 204a are attached to switch circuit board 201d. Fork plug 205b is connected to conductor plate 204b. Fork plug 205f is connected to conductor plate 204a. Fork plug 205f is connected to fork plug 205g. Fork plug 205b is connected to fork plug 205j, which is connected to conductor plate 204a of switch circuit board 201a, and fork plug 205j is connected to power supply device 132.

[0198] 10 shows one transistor 117 for ease of illustration. A connection structure 218a is inserted into the opening 216a of the partition wall 217, a connection structure 218b is inserted into the opening 216b of the partition wall 217, and a connection structure 218c is inserted into the opening 216c of the partition wall 217.

[0199] The semiconductor testing device of the present invention performs testing by placing a plurality of semiconductor elements 117 on the heating / cooling plate 134. Therefore, a plurality of openings 216 are formed in the partition wall 217, as shown in FIG.

[0200] 12, n (n is a positive number equal to or greater than 1) openings 216 are formed. n is the maximum number of semiconductor elements 117 that can be tested simultaneously, or the maximum number of semiconductor elements 117 that can be placed or mounted on the heating / cooling plate 134.

[0201] Connection structure 218a1 is inserted into opening 216a1, connection structure 218b1 is inserted into opening 216b1, and connection structure 218c1 is inserted into opening 216c1.

[0202] Connection structure 218a2 is inserted into opening 216a2, connection structure 218b2 is inserted into opening 216b2, and connection structure 218c2 is inserted into opening 216c2.

[0203] Thereafter, similarly, a connection structure 218an is inserted into the opening 216an, a connection structure 218bn is inserted into the opening 216bn, and a connection structure 218cn is inserted into the opening 216cn.

[0204] Connection structure 218a is coupled to device terminal 226a of transistor 117, and connection structure 218b is coupled to device terminal 226b of transistor 117. Connection structure 218c is coupled to device terminal 226c of transistor 117.

[0205] 10, a connector 202s is connected to the collector terminal cs, gate terminal gs, and emitter terminal es of the transistor 117. A connector 202m is connected to the collector terminal cm, gate terminal gm, and emitter terminal em of the transistor 117.

[0206] The signal wiring 222 (signal wiring 222m, signal wiring 222s) connected to the connector 202 (connector 202m, connector 202s) is connected to the sample connection circuit 203. The signal wiring 235 of the sample connection circuit 203 is connected to the device control circuit board 209 via the connector 208.

[0207] The partitions (partitions 214, 215, and 217) have the function of separating each chamber (chamber C1, chamber C2, chamber A, and chamber B) and the function of preventing outside air from flowing in. In particular, since condensation may occur in chamber C1 during tests at low temperatures, dry air is allowed to flow into chamber C1.

[0208] 10, 11, 15, and 16, a fixing screw 221 is attached to the other end of connection structure 218, and connection wiring 211 is connected to connection structure 218. A fork plug 205 serving as a connection member is attached to the other end of connection wiring 211. Fixing screw 221 is not limited to a screw, and may be any type that can electrically connect connection wiring 211 to connection structure 218.

[0209] The sample connection circuit 203 is connected to a device control circuit board 209 by connection pins 206 of a connector 208. The sample connection circuits 203 are individually arranged corresponding to the respective transistors 117 to be tested, and the sample connection circuits 203 are configured to be easily removable.

[0210] Fig. 15 is an explanatory diagram of a connection structure 218 which is one embodiment of a semiconductor device testing apparatus according to the present invention. Fig. 15(a) is a diagram showing a schematic back surface, and Fig. 15(b) is a diagram showing a schematic side surface.

[0211] The heat pipe 223 is in close contact with the recess 234 of the connection structure 218. Heat conductive grease or heat dissipating silicone oil compound may be applied between the recess 234 of the connection structure 218 and the heat pipe.

[0212] The heat pipes 223 are arranged so as to fit into the recesses 234. Arranging the heat pipes 223 in the recesses on the back surface of the connection structure 218 reduces the risk of damaging the heat pipes 223. The heat pipes 223 may also be arranged on both sides of the connection structure 218.

[0213] The connection structure 218 is heated during testing, and therefore the heat pipe 223 and the heat pipe fitting 231 are also heated, causing the heat pipe 223 and the heat pipe fitting 231 to expand due to the heating.

[0214] In the present invention, a material having a linear expansion coefficient smaller than that of the heat pipe 223 is used for the heat pipe fitting 231 of the connection structure 218. Alternatively, a material having a linear expansion coefficient larger than that of the heat pipe fitting 231 is used for the heat pipe 223 of the connection structure 218. The material of the heat pipe 223 expands more in the recess 234, so that the heat pipe 223 is more firmly fitted into the recess 234. Therefore, the heat pipe 223 will not come off.

[0215] Examples of materials for the heat pipe fitting 231 include copper (linear expansion coefficient 16.8), brass (linear expansion coefficient 19), iron (linear expansion coefficient 12.1), and stainless steel (SUS304) (linear expansion coefficient 17.3). Examples of materials for the heat pipe 223 include materials with a linear expansion coefficient greater than that of the heat pipe fitting 231, such as aluminum (linear expansion coefficient 23), tin (linear expansion coefficient 26.9), and lead (linear expansion coefficient 29.1). Among these, it is preferable to use copper (linear expansion coefficient 16.8) for the material of the heat pipe fitting 231 and aluminum (linear expansion coefficient 23) for the material of the heat pipe 223. The heat pipe fitting 231 can also be made of materials other than metal, such as carbon.

[0216] The connection structure 218 mainly comprises a heat pipe fitting 231, a connection pressure part 232, and a connection holding part 233. Between the connection pressure part 232 and the connection holding part 233, an element terminal 226 of the semiconductor element is inserted. 11 is an explanatory diagram illustrating the connection state between the transistor 117 and the connection structure 218. The heat pipe 223 is disposed on the back surface of the connection structure 218.

[0217] The transistor 117 is fixed in close contact with the heating / cooling plate 134. The fixing is performed by pressing with a spring (not shown). If necessary, a heating / cooling plate is also placed above the transistor 117 so that the transistor 117 can be set to a predetermined temperature condition.

[0218] The transistors 117 to be tested must be fixed in close contact with the heating and cooling plate 134, and are therefore difficult to remove. The transistor 117 installation process begins by fixing the multiple transistors 117 to be tested to the heating and cooling plate 134. Next, the transistor 117 to be tested is selected, and a connecting structure 218 is inserted through the opening 216 in the partition wall 217 and attached to the element terminals 226 of the semiconductor element 117.

[0219] That is, the selected transistor 117 is electrically connected to the element terminal 226 of the semiconductor element 117 by inserting the connection structure 218 from the C2 chamber side into the opening 216 where the selected transistor 117 is located.

[0220] Electrical connection with semiconductor element 117 is easy since it is only necessary to select the position for inserting connection structure 218. Furthermore, by changing the signal applied to connection wiring 211 connected to connection structure 218, the test conditions and test contents of semiconductor element 117 can be easily changed.

[0221] A connection wiring 211 is connected to one end of the connection structure 218, and a constant current Id is applied to the semiconductor element 117 from the connection wiring 211. A heat pipe 223 is disposed on the rear surface side of the connection structure 218.

[0222] A current of several hundred amperes (A) flows through element terminal 226. Even if there is a slight resistance in contact portion 225, a current of several hundred amperes (A) generates a large amount of heat, overheating element terminal 226. If element terminal 226 overheats, semiconductor element 117 will also overheat, causing deterioration or destruction of semiconductor element 117.

[0223] In the present invention, heat generated at element terminal 226 is transferred to connection wiring 211 of connection structure 218 by heat pipe 223. Therefore, contact point 225 does not overheat. Cooling fan 227 is disposed below connection structure 218 to dissipate heat from heat pipe 223.

[0224] As shown in Fig. 16(a), heat dissipation fins 228 may be formed or arranged so as to be in close contact with the heat pipe 223. As shown in Fig. 16(b), a circulating water pipe 135 may be formed or arranged within the connection structure 218 to cool the connection structure 218.

[0225] Figure 11 is an explanatory diagram showing the connection state between a semiconductor module 117 having three element terminals 226 (element terminal 226a (P), element terminal 226b (O), element terminal 226c (N)) such as those shown in Figure 24, and a connection structure 218.

[0226] 11, a heat pipe 223a is formed or disposed in connection structure 218a, a heat pipe 223b is formed or disposed in connection structure 218b, and a heat pipe 223c is formed or disposed in connection structure 218c.

[0227] Note that if no current flows through the element terminal 226b (O terminal) or if the current is small, there is no need to form the heat pipe 223b in the connection structure 218b. For example, in the embodiment of FIG. 1, if the short circuit 137s or the short circuit 137m is operated, one of the transistors 117 (transistor 117s, transistor 117m) is diode-connected, and the other transistor 117 (transistor 117m, transistor 117s) is turned on (operated), no current flows through the O terminal. In this case, the connection structure 218b can be made thinner than the other connection structures 218 (connection structure 218a, connection structure 218c), thereby facilitating the connection between the connection structure 218 and the element terminal 226 of the transistor 117. Furthermore, since the space required for arranging the transistor 117 is small, a larger number of transistors 117 can be mounted on the heating / cooling plate 134.

[0228] 17(a), a connection structure 218 in another embodiment of the present invention mainly comprises a heat pipe fitting 231, a connection receiving portion 225, a connection pressure portion 232, and a connection holding portion 233. An element terminal 226 of a semiconductor element is inserted between the connection receiving portion 225 and the connection holding portion 233.

[0229] A spring 236 is inserted or placed in a spring hole 239 of the connection receiving portion 225 and the connection pressure portion 232. A positioning screw 237 is inserted or placed in a positioning screw hole 240 in the center of the connection receiving portion 225, and the connection receiving portion 225 and the connection pressure portion 232 are positioned relative to each other.

[0230] The spring 236 is a pressing means, a sliding means, or a positioning means. One example of the spring 236 is a coil spring. Other examples include a leaf spring, a spiral spring, and a disc spring. The spring 236 is formed or configured from a metal material. It may also be formed from heat-resistant rubber, plastic, or ceramic material.

[0231] A coil spring 236 is disposed between the connection receiving portion 225 and the connection pressure portion 232. The connection pressure portion 232 is connected by one or more fixing screws 224b. By tightening or attaching the fixing screws 224b, pressure (pressure) is applied between the connection receiving portion 225 and the connection holding portion 233.

[0232] The element terminal 226 is sandwiched between the connection receiving portion 225 and the connection holding portion 233, and the pressure of the spring 236 causes the element terminal 226 to be sandwiched between the connection receiving portion 225 and the connection holding portion 233 with a predetermined pressure (predetermined pressing force).

[0233] The pressure (pressure) can be easily adjusted by changing the spring 236. The pressure (pressure) can also be adjusted or set by the degree of tightening of the fixing screw 224b. The heat pipe metal fitting 231 and the connection holder 233 are fixed with one or more fixing screws 224a.

[0234] The connection receiving portion 225 is disposed between the connection pressure portion 232 and the connection holding portion 233. The constituent material or at least the surface material of the connection receiving portion 225 is platinum, gold, silver, tungsten, copper, nickel, molybdenum, or an alloy of a combination thereof.

[0235] Similarly, the surface of the connection holder 233 that comes into contact with the element terminal 226 is made of platinum, gold, silver, tungsten, copper, nickel, molybdenum, or an alloy of any of these.

[0236] The connection holder 233 is fixed to the heat pipe metal fitting 231 with a fixing screw 224a. The connection pressure part 232 is fixed to the connection holder 233 with a fixing screw 224b. The connection wiring 211 is fixed to the left end of the heat pipe metal fitting 231 with a fixing screw 221. 17(a) and 17(d) are explanatory diagrams for explaining the combined state of the connection holding portion 233, the connection receiving portion 225, and the connection pressure portion 232. FIG.

[0237] Connection holding portion 233 connects and fixes heat pipe 223 and heat pipe fitting 231 with screws 224a (not shown) inserted into screw holes 238a1 and 238a2. Heat pipe 223 and heat pipe fitting 231 are connected and fixed in close contact to ensure good thermal and electrical conductivity. Connection holding portion 233 is also connected and fixed to connection pressure portion 232 with screws 224b (not shown) inserted into screw holes 238b1 and 238b2.

[0238] The connection receiving portion 225 has protrusions 251 formed on both ends, and the connection pressure portion 232 has grooves 252 formed on both ends. The protrusions 251 of the connection receiving portion 225 are fitted into the grooves 252 of the connection pressure portion 232. The protrusions 251 of the connection receiving portion 225 and the grooves 252 of the connection pressure portion 232 are configured to be in electrical contact with each other.

[0239] In order to improve the contact between the element terminals 226 and the connection receiving portions 225, it is preferable to form triangular or other irregularities on the surface of the connection receiving portions 225 as shown in FIG. 17(c). In the configuration of FIG. 17, the element terminal 226 is sandwiched between the flat surface of the connection pressure portion 232 and the flat surface of the connection holding portion 233 .

[0240] Even in the configuration of FIG. 17 , there is a possibility that the element terminal 226 and the connection holder 233 may come off. For this reason, a groove 518 is formed or configured between the connection holder 233 and the heat pipe fitting 231, etc., as in FIGS. 31 , 32 , and 33 . As in FIG. 32( c ), the fixing plate 511 is slid into the groove 518, and adjustment is made so that one side of the fixing hole 515 of the fixing plate 511 is within the groove 518 of the connection holder 233, etc. After adjustment, a fixing screw (not shown) is inserted into the screw hole (not shown), and the partition wall 217 and the fixing plate 511 are integrated with the fixing screw 2. In addition, the fixing plate 511 presses down the connection holder 233, etc., and fixes the connection holder 233, etc., and the element terminal 226.

[0241] The above mechanism simultaneously fixes the plurality of connection holding portions 233 etc. to the element terminals 226. Therefore, the connection state with the plurality of element terminals 226 can be easily and stably maintained.

[0242] 17, grooves 518 are formed or configured in connection retaining portion 233, etc., but this is not limited to this. Groove 518 may have any configuration or shape as long as it integrates fixing plate 511, etc. with partition wall 217, attachment plate 510, etc., and simultaneously fixes multiple fork plugs 205. For example, it goes without saying that a convex portion (not shown) may be formed or configured in connection retaining portion 233, etc., and the convex portion may be pressed by fixing plate 511, etc., to integrate with or fix to partition wall 217.

[0243] 18 shows a configuration in which the element terminal 226 is sandwiched between a pressing tool mounting plate 313 and a connection holder 233. Pressing tools 311a and 311b are attached to the pressing tool mounting plate 313. The pressing tool 311 is exemplified by a metal leaf spring. The pressing tool 311 may also be formed from a non-conductive material such as a silicone resin material. The pressing tool 311 is fitted into the pressing tool mounting plate 313.

[0244] The element terminal 226 is clamped between the flat surfaces of the pressing tool 311 and the connection holder 233. When the pressing tool 311 presses, the element terminal 226 and the connection holder 233 are electrically connected.

[0245] 17(a), the spring (pressure fitting) 236 was inserted into the spring hole 239 of the contact part 225. If the spring (pressure fitting) 236, the contact part 225, and the connection pressure part 232 are made of conductive materials, electricity may flow from the element terminal 226 → contact part 225 → spring (pressure fitting) 236 → connection pressure part 232. In this case, if the resistance value of the spring (pressure fitting) 236 is high, current will flow through the spring (pressure fitting) 236, causing the spring to generate heat and burn out.

[0246] In the embodiment of the present invention shown in Figure 18, spring hole 239 is formed in insulating plate 312. Pressing tool 311 contacts element terminal 226, and spring 236 presses pressing tool mounting plate 313. Insulating plate 312 is arranged above pressing tool mounting plate 313, providing insulation between pressing tool mounting plate 313 and spring 236. Spring hole 239 is formed in insulating plate 312, and spring 236 is inserted into spring hole 239. The other configuration is the same as in Figure 15, so description will be omitted. Insulating plate 312 may be an insulating film, an insulating film, or an insulating gas such as air.

[0247] Fig. 18(b) is a side view of the pressing tool attachment plate 313. Pressing tools 311a and 311b are arranged and inserted into the pressing tool attachment plate 313. Fig. 18(c) is a view seen from direction A in Fig. 18(b).

[0248] Since the insulating plate 312 is made of an insulating material, even if the pressing tool mounting plate 313 is made of a conductive material such as metal, no current flows through the spring (pressure fitting) 236. Therefore, no current path is generated from the element terminal 226 to the contact portion 225 to the spring (pressure fitting) 236 to the connecting pressure portion 232.

[0249] The embodiment of Fig. 18(a) has a configuration in which insulation is achieved by an insulating plate 312. The insulating effect of the present invention is not limited to the configuration in which an insulating plate 312 is used, as in Fig. 18(a). For example, a configuration shown in Fig. 18(d) is exemplified.

[0250] 18(d) shows a configuration in which an insulating part 315 made of a resin material or the like is arranged around the screw hole 238b of the connection pressure part 232. Because the area around the screw hole 238b is insulated by the insulating part 315, no current flows through the fixing screw 224b. Therefore, no current path is generated from the element terminal 226 to the contact part 225 to the spring (pressure fitting) 236 to the connection pressure part 232, and the spring (pressure fitting) 236 will not be burned. As described above, the present invention is configured such that insulating plate 312 is disposed on the side of spring 236 that applies pressure, so that current does not flow to pressing tool mounting plate 313 and contact portion 225 side.

[0251] When a current flows, it flows through pressing parts such as spring 236 and fixing screw 224b, burning out spring 236 and fixing screw 224b. A test current is supplied to element terminal 226 via connection holding portion 233, which has fewer high resistance parts such as spring 236.

[0252] 19 and 20 are explanatory diagrams of a method for testing a semiconductor device in the first embodiment of the present invention. The semiconductor device 117 to be tested is shown in FIGS. 24(a) and 24(b) by way of example, but is not limited to this. Another example of the semiconductor element 117 is one in which three or more transistors are configured as one package, as shown in FIG.

[0253] Figure 25 shows an inverter that rotates a three-phase motor 229. Three-phase AC is generated by six transistors in a semiconductor element 117. Inverters are used to rotate three-phase motors such as those used in trains and electric vehicles.

[0254] The waveforms applied to the UVW phases of the motor 229 are shown in Fig. 26. The UVW phases are analog waveforms, but as shown in Fig. 27, these analog waveforms are made pseudo-analog by repeatedly turning on and off the transistor 117 in the semiconductor element 117 at high speed, changing the ratio of the on time to the off time.

[0255] A control method that obtains a pseudo-analog signal by varying the ratio of ON time to OFF time while keeping the ON / OFF cycle constant is called PWM (Pulse Width Modulation), and the ratio of ON time to OFF time is called the duty ratio.

[0256] FETs and IGBTs are used for the switches, and because they are driven clearly as either ON or OFF, there is almost no power consumption by the elements. By using PWM sine waves that are 120 degrees apart for each, three-phase AC can be obtained. In the case of a three-phase inverter, six transistors are required as switches. Fig. 27(a) is a U-phase drive pulse, Fig. 27(b) is a V-phase drive pulse, and Fig. 27(c) is a W-phase drive pulse. Each pulse is 120° out of phase with each other.

[0257] The test can be performed by using semiconductor elements 117a, 117b, and 117c as semiconductor elements 117 that make up the inverter circuit shown in Figure 25. Furthermore, since the test is performed as an inverter, semiconductor elements 117a, 117b, and 117c are driven to produce the PWM waveform shown in Figure 27. Therefore, semiconductor elements 117a, 117b, and 117c are driven in the same way. However, in actual use, the phases differ by 120°.

[0258] In the following embodiment, the semiconductor element 117 will be described as a transistor 117. In Figures 19, 20, 22 and 23, the transistor 117 corresponds to the transistor 117a, the transistor 117b and the transistor 117c in Figure 21.

[0259] 19, when the switch circuit 124a is turned on, the output of the power supply device 132 is short-circuited, and the current Id output by the power supply device 132 flows to the ground as a current Im. Alternatively, when the switch circuit 124b is turned on, the charge stored between the terminals of the power supply device 132 is discharged. By passing the current Im, the voltage between the terminals of the power supply device 132 becomes 0 (V), and the transistor 117 to be tested is not destroyed by driving other than for the test.

[0260] When the switch circuits 124c and 124d are simultaneously turned on, the current Im flows, the output of the power supply device 132 is short-circuited, and the electric charge of the power supply device 132 is discharged.

[0261] It is also effective to stagger the timing at which the switch circuits 124c and 124d turn on. For example, if the switch circuit 124c turns on before the switch circuit 124d, a short circuit occurs between the channels of the transistor 117s.

[0262] Next, switch circuit 124d turns on, shorting the channel of transistor 117m. Alternatively, switch circuit 124d turns on before switch circuit 124c, shorting the channel of transistor 117m. Next, switch circuit 124c turns on, shorting the channel of transistor 117s. As described above, by sequentially turning on the switch circuits 124, the occurrence of surge voltages and the like in the semiconductor element 117 can be further suppressed.

[0263] It goes without saying that the above matters can be similarly applied to other embodiments such as those shown in Figures 21, 22, and 23. It also goes without saying that the above matters can be combined with or applied to other embodiments or similar operations and configurations described in this specification. The fork plug 205 is inserted through the opening 216 in the partition wall 214 and is electrically connected to the switch circuit board 201 .

[0264] After the switch circuit 124a is turned off (open), the switch circuit 124b is turned on (closed). On the other hand, the switch circuit 122a of the power supply device 132 is turned on and the switch circuit 122b is turned off, thereby controlling so that a constant current Id in the forward direction is output from the current power supply 121a.

[0265] 19(a), an on-voltage is applied to the gate terminal gs of the transistor 117s, and an off-voltage is applied to the gate terminal gm of the transistor 117m. The switch circuit 124d is turned on, and the switch circuit 124c is turned off. The switch circuits 124c and 124d are controlled by the controller 111.

[0266] 19, 20, 22, and 23, the on / off control of the transistors 117s and 117m is performed so as to obtain the PWM waveforms shown in FIG. When the switch circuit 124a is turned on, the current Id output by the power supply device 132 is supplied to the transistor 117s.

[0267] As shown in FIG. 19(a), the forward current Id flows from the power supply device 132a, through the switch circuit 124b, through the transistor 117s, through the switch circuit 124d, and then through the power supply device 132a.

[0268] Next, as shown in FIG. 19(b), the switch circuit 122a of the power supply device 132 is turned off and the switch circuit 122b is turned on, thereby controlling so that a constant current Id is output in the reverse direction from the current power supply 121b.

[0269] As shown in FIG. 19(b), the reverse current Id flows from the power supply device 132b to the switch circuit 124d, through the diode Dis, through the switch circuit 124b, and then to the power supply device 132b. By the above operation of FIG. 19, the test of the transistor 117s (diode Dis) is carried out.

[0270] 20, a turn-off voltage is applied to the gate terminal gs of the transistor 117s, and a turn-on voltage is applied to the gate terminal gm of the transistor 117m. Also, the switch circuit 124c is turned on, and the switch circuit 124d is turned off.

[0271] As shown in FIG. 20(c), the switch circuit 122a of the power supply device 132 is turned on and the switch circuit 122b is turned off, thereby controlling the current source 121a to output a constant current Id in the forward direction.

[0272] As shown in FIG. 20(c), the forward current Id flows from the power supply device 132a to the switch circuit 124c, through the transistor 117m, and then to the power supply device 132a.

[0273] As shown in FIG. 20(d), the switch circuit 122a of the power supply device 132 is turned off and the switch circuit 122b is turned on, thereby controlling the current source 121b to output a constant current Id in the reverse direction.

[0274] As shown in FIG. 20(d), the reverse current Id flows from the power supply device 132b to the switch circuit 124c, through the diode Dim, and then to the power supply device 132b. By the above operation of FIG. 20, a test of the transistor 117m (diode Dim) is carried out.

[0275] 19(a), 19(b), 20(a), and 20(b) can be controlled to produce the PWM waveform of Fig. 27, thereby enabling testing suitable for actual operation. Also, by performing the testing method for the semiconductor element of the present invention shown in Figs. 19 and 20 on transistors 117a, 117b, and 117c of Fig. 25 with a phase difference of 120°, testing suitable for UVW AC driving can be realized.

[0276] The semiconductor testing device of the present invention can perform testing by simultaneously passing current Id through transistors 117s and 117m by operating short circuit 137 shown in Fig. 1. In this case, switch circuits 124c and 124d are turned off, or fork plug 205h is disconnected from conductor plate 204f.

[0277] By turning on the short circuit 137s of the transistor 117s, the transistor 117s is diode-connected. Therefore, by applying an on-voltage to the gate terminal gm of the transistor 117m, a test current Id flows through the transistors 117s and 117m. Therefore, by applying an on / off signal to the gate terminal gm of the transistor 117m, the transistor 117 can be tested.

[0278] Furthermore, by turning on the short circuit 137m of the transistor 117m, the transistor 117m is diode-connected. Therefore, by applying an on-voltage to the gate terminal gs of the transistor 117s, a test current Id flows through the transistors 117s and 117m. Therefore, by applying an on / off signal to the gate terminal gs of the transistor 117s, the transistor 117 can be tested.

[0279] 3, constant current Icm or constant current Ics is supplied to diode Dis or diode Dim to acquire temperature information Tj and monitor deterioration or changes in transistor 117. Testing of transistor 117 is stopped or its operation is controlled based on the rate and amount of change in temperature information Tj.

[0280] It goes without saying that the above matters can be similarly applied to other embodiments such as those shown in Figures 21, 22, and 23. It also goes without saying that the above matters can be combined with or applied to other embodiments or similar operations and configurations described in this specification.

[0281] 21 is a diagram illustrating the configuration of a semiconductor device testing apparatus according to a second embodiment of the present invention. The difference from FIG. 1 is that a current power supply 121 that outputs a constant current in a forward direction is provided in a power supply device 132, but a current power supply 121 that outputs a constant current in a reverse direction is not provided. Also, switch circuits 124g, 124h, 124e, and 124f have been added.

[0282] The switch circuit 124c, the switch circuit 124d, the switch circuit 124e, the switch circuit 124f, the switch circuit 124g, and the switch circuit 124h are controlled by the controller 111. Other configurations or operations are the same as or similar to those in FIG. 1, and therefore will not be described. 22 and 23 are explanatory diagrams for explaining a method of testing a semiconductor device in the semiconductor device testing apparatus of the present invention shown in FIG. In FIG. 22, an on-voltage is applied to the gate terminal gs of the transistor 117s, and an off-voltage is applied to the gate terminal gm of the transistor 117m.

[0283] 22(a), the switch circuits 124g, 124b, 124d, and 124h are turned on, while the switch circuits 124a, 124c, and 124e are turned off.

[0284] As shown in FIG. 22( a ), the current Id flows in the order of the power supply device 132 ➝ the switch circuit 124 g ➝ the transistor 117 s ➝ the switch circuit 124 d ➝ the switch circuit 124 h ➝ the power supply device 132 .

[0285] 22(b), the switch circuits 124b, 124d, 124e, and 124f are turned on, and the switch circuits 124c, 124g, and 124h are turned off.

[0286] As shown in FIG. 22( b ), the current Id flows in the order of the power supply device 132 ➝ the switch circuit 124 e ➝ the switch circuit 124 d ➝ the diode Dis ➝ the switch circuit 124 b ➝ the switch circuit 124 g ➝ the power supply device 132 . Next, as shown in FIG. 23, a turn-off voltage is applied to the gate terminal gs of the transistor 117s, and a turn-on voltage is applied to the gate terminal gm of the transistor 117m.

[0287] 23(c), the switch circuits 124g, 124c, and 124h are turned on, while the switch circuits 124b, 124d, 124e, and 124f are turned off.

[0288] As shown in FIG. 23( c ), the current Id flows in the order of the power supply device 132 ➝ the switch circuit 124 g ➝ the switch circuit 124 c ➝ the transistor 117 m ➝ the switch circuit 124 h ➝ the power supply device 132 .

[0289] 23(d), the switch circuits 124c, 124e, and 124 are turned on, while the switch circuits 124b, 124g, 124d, and 124h are turned off.

[0290] As shown in FIG. 23( d ), the current Id flows in the order of the power supply device 132 ➝ the switch circuit 124 e ➝ the diode Dim ➝ the switch circuit 124 c ➝ the switch circuit 124 f ➝ the power supply device 132 .

[0291] 21, 22, and 23, the power supply device 132 can achieve the forward constant current and the reverse constant current shown in FIGS. 1, 19, and 20 with one current power supply 121. Therefore, the cost of the power supply device 132 can be reduced.

[0292] In the above embodiment, for ease of illustration or understanding, one test element such as a power transistor 117 is connected to one power supply device 132 (constant current (voltage) circuit 121). However, the present invention is not limited to this.

[0293] 28, etc., only one switch circuit 124a that short-circuits the output of the power supply device 132 (constant current (voltage) circuit 121) is required for the semiconductor device testing device. This is because short-circuiting the output of the power supply device 132 prevents voltage and current from being applied to the multiple transistors 117 to be tested.

[0294] That is, even if there are a plurality of transistors 117 to be tested, a single substrate for the switch circuit 124a will suffice as long as the output current Id of the power supply device 132 is made to flow as Im to the ground line.

[0295] The number of switch circuits 151 required corresponds to the number of transistors 117 to be tested. For example, if there are 12 transistors 117 to be tested, it is preferable to prepare 12 switch circuits 151. It is also advantageous in terms of cost to make the switch circuits 124b and the switch circuits 151 have the same specifications.

[0296] A plurality of transistors or the like are mounted on the switch circuit board 201 as the switch circuits 124. The greater the number of switch circuits 124, the smaller the impedance that shorts between the two conductive plates 204. The number of switch circuits 151 mounted on the switch circuit 201 is determined so that the on-resistance of the switch circuit 151 is smaller than the on-resistance of the transistor 117 to be tested. In the embodiment shown in FIG. 28, the power supply wiring 212b is grounded (ground potential or reference potential).

[0297] 28 is an explanatory diagram of a semiconductor testing device according to a seventh embodiment of the present invention. In Fig. 28, a plurality of transistors 117 (transistors 117Q1 to 117Qn) to be tested are connected in parallel to a current power supply device 121. FIG. 29 is an explanatory diagram of a semiconductor device testing method in an embodiment of the present invention, illustrating the operation of FIG.

[0298] As shown in FIG. 29(a), when switches St1 (151s1) to Stn (151sn) are turned on (Vg voltage is applied to Vge), constant currents Id1 to Idn flow through transistor 117. For example, the application time of constant current Id is ton, and constant currents Id1 and Id2 are applied to transistor 117 sequentially at intervals of time tcycle. When transistor 117 is turned on, the channel voltage of transistor 117 changes sequentially.

[0299] Therefore, for example, the constant current Id1 and the constant current Id2 do not overlap in time. Therefore, the output capacitance of the current power supply device 121 may be the output capacitance required for testing one transistor 117.

[0300] As shown in Figure 29(a), the on-voltages (Vg) applied to the gate terminals of the transistors 117 are controlled so as not to overlap in time. It is also preferable to provide an interval of 1 microsecond or more between the constant currents Id (Id1 to Idn). The driving and control methods described in other embodiments of the present invention are implemented for each transistor 117.

[0301] The constant current Ic to be supplied to each transistor 117Q is supplied to the diode Ds of each transistor 117Q by sequentially turning on the switches Ssa (Ssa1 to Ssan).

[0302] The voltage Vi (Vi1 to Vin) corresponding to the terminal voltage of the diode Ds is selected by the selector 127 in synchronization with the switch Ssa (Ssa1 to Ssan). For example, when the current Ic is supplied to the transistor 117Q1, the selector 127 selects the terminal voltage of the diode Ds of the transistor 117Q1. When the current Ic is supplied to the transistor 117Q3, the selector 127 selects the terminal voltage of the diode Ds of the transistor 117Q3. The selected voltage Vi is supplied to the temperature measurement circuit 115. The other configurations and operations are the same as those explained in the other embodiments, so the explanation will be omitted.

[0303] In the timing chart of Figure 29(a), an on-voltage (Vg) is applied to transistors 117Q1 to 117Q5 (as an example, there are five transistors 117 to be tested) in sequence, and a constant current Id is applied to the transistors 117 to perform the test.

[0304] However, during the test, a transistor 117 may break down, stopping the test current to the transistor 117. Alternatively, a transistor 117 may deteriorate, stopping the test current to the transistor 117.

[0305] 29(b) shows a state in which the test current to transistor 117Q3 is stopped. When transistor 117Q3 is stopped (stopped), the Vg voltage is not applied to transistor 117Q3 between t3 and t4, and the voltage applied to each gate of transistor 117Q3 is maintained at 0V.

[0306] If an on-voltage is not applied to the gate voltage of transistor 117Q3, no current is supplied from current power supply 121 to the test device during that period, no current flows through power supply wiring 212, etc., and the corresponding switch circuit 151 is not turned on, causing the thermal state and other conditions to change from the test state shown in Figure 29(a).In addition, the states of the surge voltage and surge current during the test change, making it impossible to maintain a constant test state.

[0307] In Fig. 29(b), to address this issue, the test current to transistor 117Q3 is stopped, but Vg voltage is applied to transistor 117Q4 between t3 and t4, and the current output from current power supply 121 is maintained constant. In other words, during the period when the on-voltage of the transistor whose operation has been stopped is applied, the next transistor is turned on, and the state in which the transistors are turned on sequentially is maintained. A left-justified operation is performed.

[0308] In the embodiment of the present invention, a test is performed by applying a test current (constant current) to the transistor 117 to be tested. However, the present invention is not limited to this. For example, as shown in FIG. 30, a motor circuit 509 may be configured with transistors Ss (transistors Ssu, Ssv, and Ssw) and transistors Sm (transistors Smu, Smv, and Smw), and the motor circuit 509 may be driven to perform the test.

[0309] A power supply 508 is connected to a motor circuit 509, and a motor circuit 509a drives a synchronous motor 506a. An induction motor 506b is connected to the shaft of the synchronous motor, and the induction motor 506b is connected to a motor circuit 509b.

[0310] Induction motor 506b is regeneratively driven by driving synchronous motor 506a, and the state of regenerative driving is monitored by ammeter 507. The current value and direction of current flow of ammeter 507 change depending on the regenerative state.

[0311] The synchronous motor 506a and the like are operated by the transistors Ss and Sm that constitute the motor circuit 509, so that the transistors Ss and Sm can be tested. In the embodiment of the present invention, the transistor 117 has been mainly described as an IGBT, but the present invention is not limited to this.

[0312] For example, it goes without saying that the transistors may be N-channel JFETs, P-channel JFETs, N-channel MOSFETs, P-channel MOSFETs, N-channel bipolar FETs, P-channel bipolar FETs, etc. Also, semiconductor elements such as SiC and GaN may be used.

[0313] Furthermore, the device is not limited to a three-terminal device, but may be a two-terminal element such as a diode. A two-terminal element does not require the gate signal Vgs. It goes without saying that the semiconductor testing device and semiconductor element testing method of the present invention can be applied by conducting a test by passing a constant current Id using the current-voltage device 121.

[0314] In the embodiment of the present invention, a semiconductor device in which the transistors 117m and 117s are connected in series is tested, but this is not limitative. For example, it goes without saying that a test may be performed by connecting one transistor 117 to the power supply device 132. It goes without saying that the matters or contents described in this specification and drawings can be combined with each other. [Industrial Applicability]

[0315] The present invention provides a semiconductor element testing apparatus and semiconductor testing method that can be adapted to the circuit operation of an inverter circuit or the like and that allows easy connection changes depending on the test contents of semiconductor elements such as transistors and the number of semiconductor elements to be tested simultaneously. [Explanation of symbols]

[0316] 111 Control circuit board (controller) 112 Gate signal control circuit 113 Gate driver circuit 115 Temperature measurement circuit 116 Operational amplifier (buffer amplifier) 117 Power Transistor 118 Constant current circuit 121 Current (voltage) power supply 122 Switch Circuit 124 Switch Circuit 126 Drive variable circuit 127 Drive element circuit 128 Clamp Meter 129 Current Sensor 131 Control Rack 132 Power supply 133 Control circuit 134 Heating and cooling plate 135 Circulating Water Pipe 136 Chiller 137 Short Circuit 138 Snubber Circuit 201 Switch circuit board 202 Connector 203 Sample connection circuit 204 Conductor Plate 205 fork plug 206 connecting pins 207 Motherboard 208 Connector 209 Device control circuit board 210 cabinet 211 Connection wiring 212 Power wiring 213 Connector 214 Bulkhead 215 Bulkhead 216 Opening 217 Bulkhead 219 Connection bolt 220 Contact part 221 Fixing screw 222 signal wiring 223 Heat Pipe 224 Fixing screw 225 Contact point 226 Element terminal 227 Cooling Fan 228 Heat dissipation fin 229 Motor 231 Heat pipe fittings 232 Connection pressure part 233 Connection holder 234 recess 235 Signal Wiring 236 Spring (pressure fitting) 237 Position fixing screw 238 screw holes 239 Spring hole 240 positioning screw hole 251 Convex 252 Groove 302 Voltage selection circuit 311 Pressing tool 312 Insulating board 313 Pressing tool mounting plate 315 Insulation section 506 Motor 507 Ammeter 508 Power supply 509 Motor Circuit 510 Mounting plate 511 Fixed plate 512 Signal line insertion section 514 Insertion hole 515 fixing hole 516 screw holes 517 Mounting hole 518 Groove

Claims

1. A power semiconductor element testing apparatus for testing a power semiconductor element, a plate on which the power semiconductor element is disposed; a power supply device that supplies a test current or a test voltage to the power semiconductor element; a switch circuit connected to the power supply device and applying the test current or test voltage to the power semiconductor element; a conductor plate; and a circuit board on which the switch circuit connected to the conductor plate is mounted or formed; a connecting member having a protrusion or groove and a tip portion to be fitted with the conductive plate; an attachment plate having an insertion hole formed therein into which the tip end of the connecting member is inserted; a fixing plate having a fixing hole into which the tip of the connecting member is inserted, and fixing the connecting member by the convex portion or the groove portion; the connecting member is connected to the power semiconductor element, and the tip portion is fitted to the conductor plate to form a path for supplying the test current or test voltage to the power semiconductor element; the conductive plate has a portion protruding from the circuit board, a protruding portion of the conductor plate is disposed at the position of the insertion hole of the mounting plate; a tip end of the connection member is inserted into the fixing hole of the fixing plate and the insertion hole of the attachment plate, and the tip end of the connection member is fitted into the protruding portion of the conductor plate; A power semiconductor element testing device characterized in that the connecting member is fixed by sliding the fixing plate and pressing or inserting the fixing plate into the convex portion or groove portion of the connecting member.

2. A power semiconductor element testing apparatus for testing a power semiconductor element, a plate on which the power semiconductor element is disposed; a power supply device that supplies a test current or a test voltage to the power semiconductor element; a switch circuit connected to the power supply device and applying the test current or test voltage to the power semiconductor element; a conductor plate; and a circuit board on which the switch circuit connected to the conductor plate is mounted or formed; a connecting member having a protrusion or groove and a tip portion to be fitted with the conductive plate; an attachment plate having a plurality of insertion holes formed therein into which the tip ends of the connection members are inserted; a fixing plate having a plurality of fixing holes formed therein into which the tip ends of the connection members are inserted, and fixing the connection members by the convex portions or the groove portions; the connecting member is connected to the power semiconductor element, and the tip portion is fitted to the conductor plate to form a path for supplying the test current or test voltage to the power semiconductor element; the conductive plate has a portion protruding from the circuit board, a protruding portion of the conductor plate is disposed at the position of the insertion hole of the mounting plate; a tip end of the connection member is inserted into the fixing hole of the fixing plate and the insertion hole of the attachment plate, and the tip end of the connection member is fitted in the longitudinal direction of the conductor plate and into the protruding portion of the conductor plate; A power semiconductor element testing device characterized in that the connecting member is fixed by sliding the fixing plate and pressing or inserting the fixing plate into the convex portion or groove portion of the connecting member.

3. A power semiconductor element testing apparatus for testing a power semiconductor element, The motherboard and a plate on which the power semiconductor element is disposed; a power supply device that supplies a test current or a test voltage to the power semiconductor element; a switch circuit connected to the power supply device and applying the test current or test voltage to the power semiconductor element; a conductor plate; and a circuit board on which the switch circuit connected to the conductor plate is mounted or formed; a connecting member having a protrusion or groove and a tip portion to be fitted with the conductive plate; an attachment plate having an insertion hole formed therein into which the tip end of the connecting member is inserted; a fixing plate having a fixing hole into which the tip of the connecting member is inserted, and fixing the connecting member by the convex portion or the groove portion; the circuit board is connected to the motherboard; the connecting member is connected to the power semiconductor element, and the tip portion is fitted to the conductor plate to form a path for supplying the test current or test voltage to the power semiconductor element; the conductive plate has a portion protruding from the circuit board, a protruding portion of the conductor plate is disposed at the position of the insertion hole of the mounting plate; a tip end of the connection member is inserted into the fixing hole of the fixing plate and the insertion hole of the attachment plate, and the tip end of the connection member is fitted into the protruding portion of the conductor plate; A power semiconductor element testing device characterized in that the connecting member is fixed by sliding the fixing plate and pressing or inserting the fixing plate into the convex portion or groove portion of the connecting member.

4. A power semiconductor element testing apparatus for testing a power semiconductor element, a plate on which the power semiconductor element is disposed; a power supply device that supplies a test current or a test voltage to be applied to an element terminal of the power semiconductor element; a plurality of snubber circuits connected to element terminals of the power semiconductor elements; a selection circuit for selecting one snubber circuit from the plurality of snubber circuits; a switch circuit connected to the power supply device and applying the test current or test voltage to the power semiconductor element; a conductor plate; and a circuit board on which the switch circuit connected to the conductor plate is mounted or formed; a connecting member having a protrusion or groove and a tip portion to be fitted with the conductive plate; an attachment plate having an insertion hole formed therein into which the tip end of the connecting member is inserted; a fixing plate having a fixing hole into which the tip of the connecting member is inserted, and fixing the connecting member by the convex portion or the groove portion; the connecting member is connected to the power semiconductor element, and the tip portion is fitted to the conductor plate to form a path for supplying the test current or test voltage to the power semiconductor element; the conductive plate has a portion protruding from the circuit board, a protruding portion of the conductor plate is disposed at the position of the insertion hole of the mounting plate; a tip end of the connection member is inserted into the fixing hole of the fixing plate and the insertion hole of the attachment plate, and the tip end of the connection member is fitted into the protruding portion of the conductor plate; A power semiconductor element testing device characterized in that the connecting member is fixed by sliding the fixing plate and pressing or inserting the fixing plate into the convex portion or groove portion of the connecting member.

5. 5. The power semiconductor device testing apparatus according to claim 1, wherein the mounting plate is made of a material having a shielding function.

6. the connecting member is a fork plug, 5. The power semiconductor element testing device according to claim 1, 2, 3, or 4, characterized in that, at the tip of the connecting member, the contact portion between the tip and the conductor plate is made of any one of phosphor bronze, nickel alloy, and beryllium copper.

7. A temperature sensor is attached to the connection member, 5. The power semiconductor device testing device according to claim 1, 2, 3 or 4, wherein the temperature data from the temperature sensor is used to control whether the test of the power semiconductor device testing device is stopped or continued.

8. The system further includes a circulating water pipe for circulating water attached to the plate, and a water leak sensor.

5. The power semiconductor device testing device according to claim 1, wherein the water leakage sensor detects a leakage of the circulating water in the circulating water pipe and stops the power semiconductor device testing device or issues an alarm.

9. The power semiconductor element is disposed in a first chamber; the circuit board is disposed in a second chamber; 5. The power semiconductor device testing apparatus according to claim 1, wherein a partition wall is provided between the first chamber and the second chamber.

10. 4. The power semiconductor device testing device according to claim 3, wherein a plurality of said circuit boards are connected to said motherboard.

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