Semiconductor device and method for manufacturing the same

The use of a compensation layer with controlled thermal expansion on amorphous glass substrates addresses warpage and degassing issues, enhancing semiconductor device quality and yield by stabilizing characteristics.

JP7785929B2Active Publication Date: 2025-12-15JAPAN DISPLAY INC
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Patent Information

Application Number
JP2024521671
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Priority Date
2022-05-18
Filing Date
2023-05-08
Publication Date
2025-12-15
Estimated Expiration
2043-05-08

AI Technical Summary

Technical Problem

Semiconductor device fabrication using amorphous glass substrates faces issues of warpage and oxygen contamination due to degassing, which degrade device characteristics and yield, especially with large-diameter substrates.

Method used

A gallium nitride based semiconductor device with a compensation layer on the amorphous glass substrate having a thermal expansion coefficient greater than the glass substrate but less than the semiconductor layer, formed using sputtering to reduce warpage and degassing effects.

Benefits of technology

Reduces substrate warpage and oxygen contamination, improving device characteristics and manufacturing yield by ensuring uniform film formation and enhancing resistance to chemical treatments.

✦ Generated by Eureka AI based on patent content.

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Patent Text Reader

Abstract

Provided is a gallium nitride semiconductor device comprising: an amorphous glass substrate; a gallium nitride semiconductor layer on a first surface of the amorphous glass substrate; and a compensation layer on a second surface of the amorphous glass substrate. The coefficient of thermal expansion of the compensation layer is greater than the coefficient of thermal expansion of the amorphous glass substrate, and less than the coefficient of thermal expansion of the gallium nitride semiconductor layer.
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Description

[Technical Field]

[0001] An embodiment of the present invention relates to a semiconductor device in which a gallium nitride based semiconductor layer is formed on an amorphous glass substrate, and a method for manufacturing the same. [Background technology]

[0002] A semiconductor laminated structure is known in which warpage of the substrate during the manufacturing process of the semiconductor laminated structure is prevented by forming a film, which is mainly composed of Si and has a lower thermal expansion coefficient and a higher Young's modulus than the Si substrate, on the back surface of the Si substrate (see Patent Document 1).A method for manufacturing a semiconductor wafer is known in which a SiC or GaN film is formed on the front surface of a Si substrate and a Si3N4 film is formed on the back surface (see Patent Document 2).A method for growing a thin film of a semiconductor material is known, which includes forming a GaN or AlN layer to prevent warpage on the back surface of a sapphire substrate having a GaN layer on the front surface (see Patent Document 3). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2012-84913 A [Patent Document 2] Japanese Patent Application Laid-Open No. 2003-218031 [Patent Document 3] Japanese Patent Application Laid-Open No. 2005-116785 Summary of the Invention [Problem to be solved by the invention]

[0004] It is known that quartz or sapphire substrates are used in the process of fabricating semiconductor devices by forming a gallium nitride semiconductor layer on a substrate. Semiconductor device fabrication typically requires photolithography and plasma etching processes for processing and electrode formation. If the device substrate is warped during this process, it can have the disadvantage of degrading the characteristics and yield of the manufactured device.

[0005] Using amorphous glass as a substrate offers cost advantages compared to sapphire, as it allows for the creation of larger substrates. However, these large substrates are prone to warping, making it necessary to reduce the amount of warping during device fabrication. Since the amount of warping is proportional to the square of the substrate diameter, warping is a significant issue when using large-diameter substrates. Furthermore, when forming a gallium nitride semiconductor layer on the surface of an amorphous glass substrate, degassing, such as H2O, from the backside of the substrate can cause oxygen contamination in the gallium nitride semiconductor film, adversely affecting film quality.

[0006] The present invention has been made in view of the above problems, and has as its object to reduce warpage of a gallium nitride semiconductor device including a gallium nitride semiconductor layer on an amorphous glass substrate during the fabrication process, thereby improving the characteristics and yield of the device. Another object is to reduce the effect of degassing during the formation of the gallium nitride semiconductor layer on the film quality. [Means for solving the problem]

[0007] A gallium nitride based semiconductor device according to one embodiment of the present invention comprises an amorphous glass substrate, a gallium nitride based semiconductor layer on a first surface of the amorphous glass substrate, and a compensation layer on a second surface of the amorphous glass substrate, the compensation layer having a thermal expansion coefficient greater than that of the amorphous glass substrate and less than that of the gallium nitride based semiconductor layer.

[0008] A method for fabricating a gallium nitride based semiconductor device according to one embodiment of the present invention includes forming a compensation layer on a second surface of an amorphous glass substrate, forming a gallium nitride based semiconductor layer on a first surface of the amorphous glass substrate, and forming the compensation layer by sputtering using a target whose thermal expansion coefficient exceeds that of the amorphous glass substrate and is less than that of the gallium nitride based semiconductor layer. [Brief explanation of the drawings]

[0009] [Figure 1]1 is a cross-sectional view showing the structure of a gallium nitride based semiconductor device according to one embodiment of the present invention. [Figure 2] 1 is a cross-sectional view showing the structure of a gallium nitride based semiconductor device according to one embodiment of the present invention. [Figure 3] 1 shows the structure of a gallium nitride based semiconductor device according to one embodiment of the present invention, and shows the cross-sectional structure of an LED. [Figure 4] 1 shows the structure of a gallium nitride based semiconductor device according to one embodiment of the present invention, and shows the cross-sectional structure of an LED. [Figure 5] 1 shows the structure of a gallium nitride based semiconductor device according to one embodiment of the present invention, illustrating the cross-sectional structure of a transistor. [Figure 6] 1 shows the structure of a gallium nitride based semiconductor device according to one embodiment of the present invention, illustrating the cross-sectional structure of a transistor. DETAILED DESCRIPTION OF THE INVENTION

[0010] Hereinafter, embodiments of the present invention will be described with reference to the drawings. However, the present invention can be implemented in many different forms, and should not be construed as being limited to the description of the embodiments exemplified below. To clarify the explanation, the drawings may show the width, thickness, shape, etc. of each part schematically compared to the actual form, but these are merely examples and are not intended to limit the interpretation of the present invention. Furthermore, in this specification and each drawing, elements similar to those described above with reference to the previous drawings will be given the same reference numerals (or reference numerals with a, b, etc. suffixed thereto), and detailed descriptions may be omitted as appropriate.

[0011] In this specification, when a component or region is described as being "on (or under)" another component or region, unless otherwise specified, this includes not only the case where it is directly above (or directly under) the other component or region, but also the case where it is above (or under) the other component or region, i.e., the case where another component is included between the component or region and above (or under) the other component or region.

[0012] Details of a gallium nitride semiconductor device according to one embodiment of the present invention are provided below. In this specification, a gallium nitride semiconductor device refers to a semiconductor device including a gallium nitride semiconductor layer formed on an amorphous glass substrate and configured to exhibit a predetermined function. Semiconductor devices can include light-emitting devices such as light-emitting diodes and active devices such as transistors. Specific examples of gallium nitride semiconductor devices include diodes, transistors, thyristors, light-emitting devices, light-receiving devices, high-frequency diodes, high-frequency transistors, various sensors (temperature sensors, pressure sensors, acceleration sensors, etc.), integrated circuits, and other semiconductor devices. Furthermore, a gallium nitride semiconductor layer refers to a single-layer or multi-layer structure of a semiconductor containing at least one layer of gallium nitride as the main component, and includes a structure in which multiple gallium nitride layers with different conductivity types are stacked, and a structure in which not only gallium nitride but also layers of III-V compound semiconductors with different compositions, such as gallium nitride with specified elements added, such as indium or aluminum, are stacked.

[0013] (1) Basic structure 1 shows an example of the cross-sectional structure of a gallium nitride based semiconductor device 100 according to one embodiment of the present invention. The gallium nitride based semiconductor device 100 has an amorphous glass substrate 104, and has a structure in which a layer including a gallium nitride based semiconductor layer 108 is formed on a first surface of the amorphous glass substrate 104, and a layer including a compensation layer 102 is formed on a second surface thereof.

[0014] (2) Amorphous glass substrate The amorphous glass substrate 104 is a substrate made of a glass material that does not generally have a crystalline structure but has a trace amount of crystalline structure. The amorphous glass substrate 104 has a first surface on which the gallium nitride semiconductor layer 108 is to be formed, a second surface on which the compensation layer 102 is to be formed, and an end surface, with the first surface and the second surface being in a front-rear relationship.

[0015] The amorphous glass substrate 104 can be made of a material whose thermal expansion coefficient does not deviate significantly from that of the gallium nitride based semiconductor layer 108 in order to reduce warpage that adversely affects the processing and patterning steps during semiconductor device fabrication. For example, the thermal expansion coefficient of the amorphous glass substrate 104 is 4.2(×10 -6 / K), preferably less than 4.0 (×10 -6 / K) and is less than 3.0(×10 -6 / K), preferably greater than 3.5 (×10 -6 / K).

[0016] The glass material used for the amorphous glass substrate 104 may have a low alkali metal content in order to prevent alkali metal components generated from the glass material from contaminating the gallium nitride based semiconductor layer 108. For example, the alkali metal content in the amorphous glass is 0.1 mass % or less.

[0017] As an example of such an amorphous glass substrate 104, an amorphous glass material made of aluminoborosilicate glass or aluminosilicate glass is used. Such amorphous glass materials are used in liquid crystal displays and organic electroluminescence (organic EL) displays, and large-area glass substrates called mother glasses are available on the market. By selecting the amorphous glass substrate 104 as a substrate for a semiconductor device, gallium nitride-based semiconductor devices can be manufactured at low cost using large-area substrates.

[0018] The amorphous glass substrate 104 must be resistant to the heat history during the fabrication of semiconductor devices. Therefore, the glass transition point of the amorphous glass substrate 104 is, for example, 650°C or higher, preferably 720°C or higher, and 900°C or lower, preferably 810°C or lower. For the same reason, the softening point is 900°C or higher, preferably 950°C or higher, and 1150°C or lower, preferably 1050°C or lower.

[0019] The surface roughness of the first surface (the gallium nitride semiconductor layer side) and the second surface (the compensation layer side) of the amorphous glass substrate 104 do not have to be the same, but from the viewpoint of preventing electrostatic breakdown due to peeling electrification when the substrate is removed from various equipment during the semiconductor device fabrication process, the surface roughness of the second surface can be made rougher than that of the first surface.

[0020] The thickness of amorphous glass substrate 104 is not particularly limited, but from the viewpoint of reducing warpage, a substrate that is sufficiently thicker than the thickness of gallium nitride based semiconductor layer 108 formed on the first surface can be used. As an example, amorphous glass substrate 104 has a thickness that is 50 times or more the thickness of gallium nitride based semiconductor layer 108. As an example, amorphous glass substrate 104 has a thickness of 0.5 to 1.0 mm.

[0021] There are no particular limitations on the mechanical strength of the amorphous glass substrate 104, but from the viewpoint of reducing warpage, it is preferable that the amorphous glass substrate 104 has a Young's modulus of 70 to 90 GPa, for example.

[0022] (3) Gallium nitride semiconductor layer The gallium nitride based semiconductor layer 108 may include at least one gallium nitride layer. For example, the gallium nitride based semiconductor layer 108 may be formed of a single layer made of gallium nitride. Furthermore, the gallium nitride based semiconductor layer 108 may have a stacked structure including at least one layer selected from, for example, an indium gallium nitride layer, an aluminum gallium nitride layer, or another gallium nitride based semiconductor, in addition to the at least one gallium nitride layer. Alternatively, the gallium nitride based semiconductor layer 108 may be a single layer or stacked layer made of an indium gallium nitride layer, an aluminum gallium nitride layer, or another gallium nitride based semiconductor, without including a gallium nitride layer. The gallium nitride layer, indium gallium nitride layer, aluminum gallium nitride layer, and the like that form the gallium nitride based semiconductor layer 108 preferably have a stoichiometric composition, but may deviate from the stoichiometric composition.

[0023] The gallium nitride semiconductor layer 108 preferably has crystallinity. That is, the gallium nitride semiconductor material constituting the gallium nitride semiconductor layer 108 preferably has at least crystallinity. These may be single crystals, but may also be polycrystalline, microcrystalline, or nanocrystalline. The crystalline structure of the gallium nitride semiconductor layer 108 may have a wurtzite structure. The gallium nitride semiconductor material constituting the gallium nitride semiconductor layer 108 preferably has a c-axis orientation or a (111) orientation.

[0024] The conductivity type of at least one layer or all layers constituting the gallium nitride based semiconductor layer 108 may be substantially intrinsic, or may have n-type or p-type conductivity. Each layer constituting the gallium nitride based semiconductor layer 108 may contain a dopant for valence electron control. The n-type gallium nitride based semiconductor layer may be doped with, for example, an element selected from silicon (Si) or germanium (Ge) as a dopant. The p-type gallium nitride layer may be doped with, for example, an element selected from magnesium (Mg), zinc (Zn), cadmium (Cd), and beryllium (Be) as a dopant. The n-type gallium nitride based semiconductor layer has a dopant density of 1×10 18 / cm 3 The p-type gallium nitride semiconductor layer preferably has a carrier concentration of 5×10 16 / cm 3 It is preferable that the carrier concentration is equal to or higher than this.

[0025] The gallium nitride based semiconductor layer 108 can be formed, for example, by a film formation method using sputtering.

[0026] There is no limit to the thickness of the gallium nitride based semiconductor layer 108 that is formed, and it can be set appropriately depending on the structure of the semiconductor device to be fabricated. However, from the viewpoint of reducing warpage, which is detrimental in the semiconductor device fabrication process, the thickness can be formed to be sufficiently thinner than the thickness of the amorphous glass substrate 104. For example, the thickness can be set to 1 / 50 or less of the thickness of the amorphous glass substrate 104.

[0027] (4) Compensation layer The compensation layer 102 is formed on the second surface of the amorphous glass substrate 104. By providing the compensation layer 102, it is possible to reduce warpage of the substrate, which is detrimental when fabricating semiconductor devices.

[0028] Furthermore, the presence of compensation layer 102 on the second surface during the reduced pressure and heating process for forming gallium nitride based semiconductor layer 108 reduces degassing such as H2O from the second surface side of amorphous glass substrate 104, thereby reducing oxygen contamination into gallium nitride based semiconductor layer 108. Furthermore, by appropriately selecting the material of compensation layer 102, the resistance to acidic chemical treatment used in the semiconductor device fabrication process is improved.

[0029] By setting the thermal expansion coefficient of the compensation layer 102 within a predetermined range, it is possible to mitigate warpage of the substrate caused by the difference in thermal expansion coefficient between the amorphous glass substrate 104 and the gallium nitride based semiconductor layer 108. The thermal expansion coefficient of the compensation layer 102 is preferably greater than that of the amorphous glass substrate 104 and less than that of the gallium nitride based semiconductor layer 108. An example of the thermal expansion coefficient of the compensation layer 102 is 4.0(×10 -6 / K), preferably 4.1 (× 10 -6 / K) and exceeds 5.0 (×10 -6 / K), preferably less than 4.6 (×10 -6 / K).

[0030] Since the compensation layer 102 is adjacent to the amorphous glass substrate 104, by setting the thermal conductivity to a predetermined value, heat can be transferred efficiently and uniformly across the entire substrate during the heating step of forming the gallium nitride based semiconductor layer 108 on the amorphous glass substrate 104, thereby improving the uniformity of the thickness of the gallium nitride based semiconductor layer 108. For this reason, the compensation layer 102 preferably has a thermal conductivity higher than that of the amorphous glass substrate 104. The thermal conductivity of the compensation layer 102 can be set appropriately depending on the material constituting the amorphous glass substrate 104, but as an example, it is 10 (W·m ―1 ·K ―1), preferably above 40 (W m ―1 ·K ―1 ) exceeding.

[0031] The thermal conductivity of the compensation layer 102 can be adjusted by adjusting the film density to a predetermined value. The relationship between film density and thermal conductivity varies depending on the material that constitutes the compensation layer 102. For example, the film density of the compensation layer 102 is 2.50 (g / cm 3 ) or more, preferably 2.60 (g / cm 3 ) or more, 4.10 (g / cm 3 ) or less, preferably 4.00 (g / cm 3 ) is as follows.

[0032] The material used for the compensation layer 102 is not particularly limited as long as it satisfies the above-mentioned physical properties, but it is more preferable if it is resistant to chemical treatment with acids, etc., used in the semiconductor device fabrication process. As an example, the compensation layer 102 may have a structure in which an aluminum nitride layer or an aluminum oxide layer, or an aluminum nitride layer and an aluminum oxide layer are stacked.

[0033] The method for forming the compensation layer 102 is not particularly limited, and any known film formation method can be used, but it is preferable to form it by sputtering in order to form it on a large-area substrate and to prevent the temperature of the substrate from rising excessively. The sputtering conditions are not particularly limited, and any known sputtering device can be used, and the conditions can be set appropriately.

[0034] There is no limitation on the thickness of the compensation layer 102, and it is set appropriately depending on the device structure. However, from the viewpoint of reducing warpage of the substrate, it is preferable that the compensation layer 102 is not excessively thin compared to the gallium nitride based semiconductor layer 108. For example, the compensation layer 102 may have a thickness of 80% or more of that of the gallium nitride based semiconductor layer 108.

[0035] (5) Buffer layer 2 shows an example of the cross-sectional structure of a gallium nitride based semiconductor device 100 according to another embodiment of the present invention. The gallium nitride based semiconductor device 100 has a structure in which a buffer layer 106 is provided between a first surface of an amorphous glass substrate 104 and a gallium nitride based semiconductor layer 108, and a compensation layer 102 is provided on the second surface. The buffer layer 106 is a layer provided to reduce the difference in thermal expansion coefficient between the amorphous glass substrate 104 and the gallium nitride based semiconductor layer 108, and to reduce warpage of the entire gallium nitride based semiconductor device 100.

[0036] The thermal expansion coefficient of the buffer layer 106 is preferably greater than that of the amorphous glass substrate 104 and less than that of the gallium nitride based semiconductor layer 108. The material itself is not particularly limited as long as the thermal expansion coefficients satisfy the above relationship, but aluminum nitride may be used as an example.

[0037] (6) Other configurations The semiconductor device according to one embodiment of the present invention is not limited to the above configuration, and other elements can be added as appropriate according to the design of the semiconductor device.

[0038] Although not shown, a base insulating layer may be formed between the amorphous glass substrate 104 and the gallium nitride based semiconductor layer 108 to add a structure that prevents diffusion of alkali metal components and the like from the amorphous glass substrate 104 to the gallium nitride based semiconductor layer 108. The base insulating layer may have a single layer or a multilayer structure, and examples thereof include inorganic insulating films such as a silicon nitride film, a silicon oxide film, a silicon oxynitride film, an aluminum nitride film, an aluminum oxide film, and an aluminum oxynitride film.

[0039] Furthermore, an orientation control layer is provided as appropriate to alleviate lattice mismatch between the amorphous glass substrate 104 and the gallium nitride semiconductor layer 108. The orientation control layer has a c-axis oriented crystal structure, which facilitates crystallization of the gallium nitride semiconductor layer 108. That is, the orientation control layer has a c-axis orientation and a crystalline surface with six-fold rotational symmetry, such as a hexagonal close-packed structure or a face-centered cubic structure, which controls the orientation of the gallium nitride semiconductor layer 108 so that the c-axis of the gallium nitride semiconductor layer 108 grows in the film thickness direction (the direction perpendicular to the first surface of the amorphous glass substrate 104). In this embodiment, the buffer layer 106 also functions as an orientation control layer. Although not shown, a separate orientation control layer different from the buffer layer 106 may be provided between the buffer layer 106 and the gallium nitride semiconductor layer 108.

[0040] (7) Semiconductor device manufacturing An example of a manufacturing process for a gallium nitride based semiconductor device 100 according to one embodiment of the present invention will be described. A compensation layer 102 is formed on the second surface of an amorphous glass substrate 104 by sputtering. Thereafter, a buffer layer 106 is formed on the first surface as needed. One or more gallium nitride based semiconductor layers constituting a gallium nitride based semiconductor layer 108 are then formed on the first surface by sputtering, thereby producing the gallium nitride based semiconductor device 100. Electrodes for use in the gallium nitride based semiconductor device 100 can be formed by forming the gallium nitride based semiconductor layer 108, followed by photolithography and plasma etching, and then applying an electrode material using a known technique such as vacuum deposition.

[0041] When the compensation layer 102 is formed by sputtering, the temperature (set temperature) during film formation is controlled, for example, to 100 to 600°C, preferably 400 to 600°C. For example, aluminum nitride and / or aluminum oxide is used as the sputtering target. For example, argon (Ar) or a mixed gas of argon (Ar) and nitrogen (N) is used as the gas (sputtering gas) introduced during film formation by sputtering. For example, a two-pole sputtering device, a magnetron sputtering device, a dual magnetron sputtering device, a facing target sputtering device, an ion beam sputtering device, an inductively coupled plasma (ICP) sputtering device, or the like can be used as the sputtering device.

[0042] When layers with different compositions, such as an aluminum oxide layer and an aluminum nitride layer, are stacked as the compensation layer 102, successive film formation can be performed in a vacuum by using sputtering targets with different compositions and a multi-chamber sputtering apparatus.

[0043] When the gallium nitride semiconductor layer 108 is formed by sputtering, the sputtering apparatus and conditions are not particularly limited, and a known sputtering apparatus can be used, with the conditions appropriately set. For example, the substrate temperature (set temperature) during film formation is controlled to 100 to 600°C, preferably 400 to 600°C. To form the gallium nitride semiconductor layer 108 by sputtering, a sintered body of a gallium nitride semiconductor material is used as the sputtering target. The gas introduced during sputtering film formation (sputtering gas) is argon (Ar) or a mixed gas of argon (Ar) and nitrogen (N). Examples of sputtering apparatuses that can be used include a two-pole sputtering apparatus, a magnetron sputtering apparatus, a dual magnetron sputtering apparatus, a facing target sputtering apparatus, an ion beam sputtering apparatus, and an inductively coupled plasma (ICP) sputtering apparatus.

[0044] When the gallium nitride based semiconductor layer 108 is formed by stacking layers with different compositions, such as a gallium nitride layer, an indium gallium nitride layer, and an aluminum gallium nitride layer, sputtering targets with different compositions can be used, and successive films can be formed in a vacuum using, for example, a multi-chamber sputtering apparatus.

[0045] Below, some specific examples of the configuration of the gallium nitride based semiconductor device 100 according to one embodiment of the present invention are given. Note that the gallium nitride based semiconductor device according to one embodiment of the present invention is not limited to the specific examples of semiconductor devices given below.

[0046] [First embodiment] 1-1. Light-emitting diode: LED (light-emitting diode) 3 is a schematic diagram of an LED 200 as an example of a gallium nitride semiconductor device according to one embodiment of the present invention. The LED 200 has a compensation layer 102 on the second surface of an amorphous glass substrate 104, and has, on the first surface, a buffer layer 106 and a gallium nitride semiconductor layer 108, which are provided as needed. The gallium nitride semiconductor layer 108 may have multiple layers including a light-emitting layer 204, and as one example, may suitably include an n-type gallium nitride semiconductor layer, a p-type gallium nitride semiconductor layer, and an undoped gallium nitride semiconductor layer composed of an undoped gallium nitride semiconductor.

[0047] The structure of the light-emitting layer 204 is not particularly limited, and any known light-emitting layer structure using a gallium nitride-based semiconductor that can be used in an LED device can be used. For example, the light-emitting layer 204 can be formed of a quantum well layer in which gallium nitride layers and indium gallium nitride layers are alternately stacked.

[0048] When an n-type gallium nitride semiconductor layer is included, the material is not particularly limited, but for example, a layer made of a gallium nitride semiconductor doped with silicon (Si) can be formed.Similarly, when a p-type gallium nitride semiconductor layer is included, the material is not particularly limited, but for example, a layer made of a gallium nitride semiconductor doped with magnesium (Mg) can be formed.

[0049] When the gallium nitride based semiconductor layer 108 is made by stacking a plurality of layers with different compositions, it can be manufactured using sputtering targets corresponding to the respective compositions.

[0050] The LED 200 may have, for example, a p-type electrode 252 and an n-type electrode 254 formed on the gallium nitride semiconductor layer 108. The p-type electrode 252 and the n-type electrode 254 may be made of known electrode materials, such as metal materials including platinum group metals such as aluminum (Al), gold (Au), silver (Ag), palladium (Pd), and indium (In). The method for forming the p-type electrode 252 and the n-type electrode 254 is not particularly limited, and known film formation methods may be used. For example, the p-type electrode 252 and the n-type electrode 254 may be formed by vacuum deposition using a resistance heating evaporation source or a high-frequency induction heating evaporation source using the metal electrode materials.

[0051] 1-2. Making an LED 4 shows a specific example of fabricating an LED 200 related to a semiconductor device according to one embodiment of the present invention. An amorphous glass substrate 104 made of aluminosilicate glass and having a second surface with greater surface roughness than the first surface is prepared. A compensation layer 102 made of aluminum nitride or the like is formed on the second surface of the amorphous glass substrate 104 by sputtering.

[0052] Next, a buffer layer 106 made of aluminum nitride or the like is formed on the first surface of the amorphous glass substrate 104, and then an undoped gallium nitride layer 208 and a Si-doped gallium nitride layer 202 are formed by sputtering. Furthermore, an indium gallium nitride layer and a gallium nitride layer are laminated by sputtering as the light-emitting layer 204, and an Mg-doped gallium nitride layer 206 is formed thereon by sputtering.

[0053] Thereafter, after patterning by photolithography and plasma etching, an n-type electrode 254 made of indium is formed on the Si-doped gallium nitride layer 202, and a p-type electrode 252 made of palladium and gold (a layered structure of Pd / Au from the top in Figure 4) is formed on the Mg-doped gallium nitride layer 206 by vacuum deposition.

[0054] [Second embodiment] Transistor 5 is a schematic diagram of a transistor 300 as an example of a gallium nitride based semiconductor device according to one embodiment of the present invention. The transistor 300 has a compensation layer 102 on the second surface of an amorphous glass substrate 104, and has a buffer layer 106, a gallium nitride based semiconductor layer 108, and a gate insulating layer 314 on the first surface. The gallium nitride based semiconductor layer 108 may include multiple layers, and examples thereof may include an n-type gallium nitride based semiconductor layer, a p-type gallium nitride based semiconductor layer, an undoped gallium nitride based semiconductor layer, etc.

[0055] The transistor 300 can have a source electrode 302, a drain electrode 304, and a gate electrode 306 formed on the gallium nitride based semiconductor layer 108. The source electrode 302, the drain electrode 304, and the gate electrode 306 can be made of known electrode materials, for example, metal materials including platinum group metals such as aluminum (Al), nickel (Ni), titanium (Ti), gold (Au), silver (Ag), and palladium (Pd) and indium (In). The source electrode, the drain electrode, and the gate electrode can be fabricated by vacuum deposition using a resistance heating evaporation source or a high-frequency induction heating evaporation source using the metal materials for electrodes.

[0056] 2-2. Fabrication of transistors 6 shows a specific example of fabricating a transistor 300 for a semiconductor device according to one embodiment of the present invention. An amorphous glass substrate 104 made of aluminosilicate glass and having a second surface with greater surface roughness than a first surface is prepared. A compensation layer 102 made of aluminum nitride or the like is formed on the second surface of the amorphous glass substrate 104 by sputtering.

[0057] Subsequently, aluminum nitride is formed as the buffer layer 106 on the first surface of the amorphous glass substrate 104, and then an undoped gallium nitride layer 308, an undoped gallium aluminum nitride layer 310, and an Mg-doped gallium nitride layer 312 are formed by sputtering.

[0058] Thereafter, a gate electrode 306 composed of a gold layer and a nickel layer (a laminated structure of Au / Ni from the top in FIG. 6) is formed by vacuum deposition, and the gate electrode 306 and the Mg-doped gallium nitride layer 312 are processed by photolithography and plasma etching. A source electrode 302 composed of a laminated structure formed of gold, titanium, and aluminum layers (a laminated structure of Au / Ti / Al / Ti from the top in FIG. 6) and a drain electrode 304 composed of a laminated structure formed of gold, titanium, and aluminum layers (a laminated structure of Au / Ti / Al / Ti from the top in FIG. 6) are formed on the undoped gallium aluminum nitride layer 310 by vacuum deposition, and these electrodes are processed by photolithography and plasma etching.

[0059] In the semiconductor device including the LED and transistor according to one embodiment of the present invention, warping of the amorphous glass substrate 104 is significantly reduced, so that the gallium nitride based semiconductor device can be fabricated on the amorphous glass substrate 104 even after undergoing photolithography and plasma etching processes.

[0060] Furthermore, the semiconductor device according to one embodiment of the present invention has the compensation layer 102 with good thermal conductivity provided on the amorphous glass substrate 104, which allows for efficient heat transfer during heating in the gallium nitride based semiconductor layer formation process, thereby improving the uniformity of the formed film.

[0061] Furthermore, the presence of the compensation layer 102 reduces degassing of H2O and other gases from the backside of the substrate, thereby reducing oxygen contamination into the gallium nitride based semiconductor layer 108 and further improving the quality of the formed film. Furthermore, using aluminum nitride or aluminum oxide as the compensation layer 102 greatly improves resistance to chemical treatments such as acid, greatly improving the manufacturing yield of semiconductor devices.

[0062] By using the semiconductor device according to one embodiment of the present invention, it is possible to stabilize the characteristics of various devices and improve the manufacturing yield.

[0063] The above-described embodiments of the present invention can be combined as appropriate as long as they are not mutually inconsistent. A product in which a person skilled in the art appropriately adds or deletes components or modifies designs, or adds or omits steps or modifies conditions, based on each embodiment, is also included within the scope of the present invention as long as it includes the gist of the present invention.

[0064] Furthermore, even if there are other effects and advantages different from those brought about by the aspects of each of the above-mentioned embodiments, if they are clear from the description in this specification or can be easily predicted by a person skilled in the art, they are naturally understood to be brought about by the present invention. [Explanation of symbols]

[0065] 100: gallium nitride semiconductor device, 102: compensation layer, 104: amorphous glass substrate, 106: buffer layer, 108: gallium nitride semiconductor layer, 200: LED, 202: Si-doped gallium nitride layer, 204: light-emitting layer, 206: Mg-doped gallium nitride layer, 208: undoped gallium nitride layer, 252: p-type electrode, 254: n-type electrode, 300: transistor, 302: source electrode, 304: drain electrode, 306: gate electrode, 308: undoped gallium nitride layer, 310: undoped gallium aluminum nitride layer, 312: Mg-doped gallium nitride layer, 314: gate insulating layer

Claims

1. an amorphous glass substrate; a gallium nitride based semiconductor layer on a first surface of the amorphous glass substrate; a compensation layer on the second surface of the amorphous glass substrate; the thermal expansion coefficient of the compensation layer is greater than the thermal expansion coefficient of the amorphous glass substrate and less than the thermal expansion coefficient of the gallium nitride based semiconductor layer; A gallium nitride based semiconductor device, wherein the thermal conductivity of the compensation layer exceeds the thermal conductivity of the amorphous glass substrate, and the film density of the compensation layer is 2.50 g / cm 3 or more and 4.10 g / cm 3 or less.

2. The gallium nitride based semiconductor device of claim 1 , wherein the compensation layer comprises one or both of aluminum oxide and aluminum nitride.

3. 2. The gallium nitride based semiconductor device according to claim 1, wherein the thickness of the compensation layer is 80% or more of the thickness of the gallium nitride based semiconductor layer, and the thickness of the amorphous glass substrate is 50 times or more the thickness of the gallium nitride based semiconductor layer.

4. The gallium nitride based semiconductor device according to claim 1 , further comprising a buffer layer between the first surface of the amorphous glass substrate and the gallium nitride based semiconductor layer.

5. 5. The gallium nitride based semiconductor device according to claim 1, wherein the compensation layer is formed on an amorphous glass substrate by sputtering.

6. forming a compensation layer on the second surface of the amorphous glass substrate; forming a gallium nitride based semiconductor layer on a first surface of the amorphous glass substrate; forming the compensation layer by sputtering using a target whose thermal expansion coefficient exceeds that of the amorphous glass substrate and is less than that of the gallium nitride based semiconductor layer, so that the film density is 2.50 g / cm3 or more and 4.10 g / cm3 or less.

7. 7. The method for producing a gallium nitride based semiconductor device according to claim 6, wherein the compensation layer is formed by sputtering using aluminum oxide and / or aluminum nitride as a target.

8. 8. The method for producing a gallium nitride based semiconductor device according to claim 6, wherein the compensation layer is formed by sputtering at a temperature of 100 to 600°C.

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