adhesive tape

The adhesive tape with controlled stress relaxation addresses the issue of imprecise component pickup by maintaining adhesive strength within a specific range, enhancing precision in semiconductor manufacturing processes.

JP7786172B2Active Publication Date: 2025-12-16SUMITOMO BAKELITE CO LTD
View PDF 5 Cites 0 Cited by

Patent Information

Application Number
JP2021198148
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Filing Date
2021-12-06
Publication Date
2025-12-16
Estimated Expiration
2041-12-06

AI Technical Summary

Technical Problem

Existing adhesive tapes used in semiconductor manufacturing processes fail to accurately pick up components with precision due to inadequate control of adhesive strength after energy application, leading to pick-up errors.

Method used

An adhesive tape with a specific stress relaxation ratio of 30.0% to 65.0% is used, containing a curable resin that hardens upon energy application, allowing precise component pickup by maintaining the adhesive strength within this range.

Benefits of technology

The adhesive tape enables accurate and precise pickup of components by minimizing stress relaxation, reducing pick-up errors and ensuring high success rates.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure 0007786172000002
    Figure 0007786172000002
  • Figure 0007786172000003
    Figure 0007786172000003
  • Figure 0007786172000004
    Figure 0007786172000004
Patent Text Reader

Abstract

To provide an adhesive tape that is used in picking up components after application of energy to an adhesive layer included in the adhesive tape with the components temporarily fixed to the adhesive tape, and that can execute the pick-up of the components with excellent accuracy.SOLUTION: An adhesive tape of the present invention comprises a base material and an adhesive layer, and is used with at least one of a substrate and components temporarily fixed thereto. Application of energy to the adhesive layer reduces its adhesive force. Before the application of energy to the adhesive layer, a test piece formed of the adhesive layer is manufactured having a thickness of 0.8 mm×a width of 6 mm×a length of 20 mm, and the test piece is elongated in a longitudinal direction in conditions of 25°C, an inter-chuck distance of 10 mm, and a tension speed of 10 mm / min until a percentage of elongation in the longitudinal direction becomes 30%. Subsequently, the elongated state is maintained for one minute, and a stress relaxation rate measured at this time is 30.0% or more and 65.0% or less.SELECTED DRAWING: Figure 2
Need to check novelty before this filing date? Find Prior Art

Description

[Technical Field]

[0001] The present invention relates to an adhesive tape used for temporarily fixing a substrate and a component. [Background technology]

[0002] In response to the recent trend toward more sophisticated electronic devices and the expansion of mobile applications, there is a growing demand for higher density and integration of semiconductor devices, and IC packages are becoming larger in capacity and higher in density.

[0003] A method for manufacturing this semiconductor device involves, for example, adhering an adhesive tape (dicing tape) for processing semiconductor substrates (described in Patent Document 1) to a semiconductor substrate (semiconductor wafer), fixing the outer periphery of the semiconductor substrate with a wafer ring, and then cutting and separating (singling) the semiconductor substrate into individual semiconductor elements in a dicing process using a dicing saw, followed by an expanding process and then a pick-up process in which the diced semiconductor elements are picked up.

[0004] Next, the process proceeds to a mounting process in which the semiconductor elements obtained by singulation are mounted on a substrate (e.g., a tape substrate, an organic hard substrate, etc.). In this mounting process, the picked-up semiconductor elements are mounted on the substrate, and then an underfill material is filled between the substrate and the semiconductor elements, thereby bonding them to the substrate. Then, the semiconductor elements and the upper surface of the substrate are sealed with a semiconductor sealing material, thereby manufacturing a semiconductor device.

[0005] In this semiconductor device manufacturing method, by repeatedly performing the pick-up process and subsequent steps, multiple semiconductor elements are extracted from a single semiconductor substrate, thereby manufacturing multiple semiconductor devices. Furthermore, since the mounting process and subsequent steps using the semiconductor elements obtained by singulation are repeatedly performed, multiple substrates are prepared, which leads to process complexity. For these reasons, the obtained semiconductor elements may be transported and then processed on a different line or factory, i.e., in a different location.

[0006] Therefore, in order to carry out the mounting process and subsequent processes more efficiently and to facilitate smooth transportation to different locations, the semiconductor elements picked up in the pick-up process are repeatedly rearranged onto an adhesive tape for transporting semiconductor elements (shipping tape), and the resulting adhesive tape for transporting semiconductor elements with multiple semiconductor elements rearranged (attached) is transported to a different line or factory, i.e., a different location, and then the semiconductor elements are picked up from this adhesive tape for transporting semiconductor elements (pick-up process) to manufacture a semiconductor device.

[0007] In the semiconductor device manufacturing method carried out as described above, an adhesive tape for processing semiconductor substrates (dicing tape) and an adhesive tape for transporting semiconductor elements (shipping tape) are used as adhesive tapes, and semiconductor elements are picked up from these adhesive tapes in each pick-up process.

[0008] The adhesive tapes used in these pickup processes, i.e., the adhesive tape for semiconductor substrate processing and the adhesive tape for semiconductor element transport, both have a substrate (film substrate) and an adhesive layer formed on the substrate, and the semiconductor elements are fixed by the adhesive layer. Furthermore, the adhesive layer is usually composed of a resin composition containing an adhesive base resin and a photocurable resin, etc., so that the semiconductor elements can be picked up after being transported. That is, when energy is applied to the adhesive layer prior to picking up the semiconductor elements, the resin composition hardens and the adhesiveness of the adhesive layer decreases, so that the adhesive tape can be easily peeled off from the semiconductor elements in the pickup process, thereby enabling the semiconductor elements to be picked up.

[0009] In adhesive tapes having such a configuration, prior to the aforementioned pick-up process, energy must be applied to the adhesive layer to reduce the adhesive strength of the adhesive layer, and then in the pick-up process, the semiconductor element must be picked up by suction with a vacuum collet or air tweezers, etc. However, in reality, it has not been possible to pick up this semiconductor element with high precision, and pick-up errors have occurred.

[0010] Furthermore, this problem is not limited to cases where semiconductor elements are picked up as components obtained by cutting a semiconductor substrate in the thickness direction, but also occurs in cases where sealed semiconductor bodies are picked up as components obtained by cutting a sealed semiconductor linked body in the thickness direction, in which multiple semiconductor elements are sealed with sealing portions, and in cases where components are picked up by cutting various types of substrates, such as glass substrates, ceramic substrates, resin material substrates, and metal material substrates, in the thickness direction. [Prior art documents] [Patent documents]

[0011] [Patent Document 1] Japanese Patent Application Laid-Open No. 2009-245989 Summary of the Invention [Problem to be solved by the invention]

[0012] An object of the present invention is to provide an adhesive tape that can pick up a component with excellent accuracy after applying energy to an adhesive layer of the adhesive tape while the component is temporarily fixed to the adhesive tape. [Means for solving the problem]

[0013] These objects can be achieved by the present invention as set forth in (1) to (11) below. (1) An adhesive tape comprising a substrate and an adhesive layer laminated on one surface of the substrate, the adhesive tape being used to temporarily fix at least one of a substrate and a component, the adhesive layer contains a base resin having adhesiveness and a curable resin that is cured by the application of energy, and the adhesive strength of the adhesive layer is reduced by applying energy to the adhesive layer to cure the adhesive layer; A test piece made of the pressure-sensitive adhesive layer having a thickness of 0.8 mm, a width of 6 mm, and a length of 20 mm was prepared. Before the application of the energy, the test piece was stretched in the longitudinal direction at 25°C under conditions of a chuck distance of 10 mm and a tensile speed of 10 mm / min until the stretching ratio reached 30%. Then, the stretched state was maintained for 1 minute, and the measured stress relaxation ratio was 38.1%~57.6% An adhesive tape characterized by:

[0014] (2) The pressure-sensitive adhesive tape according to (1), wherein the stress measured on the test piece when the above state is maintained for 1 minute is 3.0 kPa or more and 50.0 kPa or less.

[0015] (3) The pressure-sensitive adhesive tape according to (1) or (2) above, wherein the stress relaxation rate measured after the energy is applied to the test piece is 50.0% or more and 85.0% or less.

[0016] (4) The pressure-sensitive adhesive tape according to any one of (1) to (3), wherein the stress measured when the test piece is maintained in the above-mentioned state for 1 minute after the energy is applied to the test piece is 50.0 kPa or more and 800.0 kPa or less.

[0017] (5) The adhesive tape according to any one of (1) to (4) above, wherein the adhesive layer has a thickness of 5 μm or more and 30 μm or less.

[0018] (6) The pressure-sensitive adhesive tape according to any one of (1) to (5), wherein the curable resin is at least one of an ester of (meth)acrylic acid and a polyhydric alcohol, a urethane acrylate, and a bisphenol A-based epoxy acrylate.

[0019] (7) The adhesive tape according to any one of (1) to (6) above, wherein the base resin is an acrylic resin.

[0020] (8) The pressure-sensitive adhesive tape according to any one of (1) to (7) above, wherein the pressure-sensitive adhesive layer further contains a crosslinking agent, and the crosslinking agent is an isocyanate-based crosslinking agent.

[0021] (9) The adhesive tape according to any one of (1) to (8) above, which is used when a substrate is fixed on the adhesive layer, the adhesive tape is cut from the substrate to reach partway in the thickness direction of the base material to separate the substrate into individual parts, and then the adhesive tape is stretched in the planar direction while the parts are pushed up from the base material side and pulled out from the opposite side of the base material, thereby detaching the parts from the adhesive layer.

[0022] (10) The adhesive tape according to any one of (1) to (9) above is used to detach a part obtained by cutting a substrate in the thickness direction from the adhesive layer by bonding the part to the surface of the adhesive layer opposite the base material, and then transporting or storing the part in a state where the part is temporarily fixed.

[0023] (11) The adhesive tape according to any one of (1) to (7) above, which satisfies the following requirement A:

[0024] Requirement A: A silicon chip measuring 4mm long x 4mm wide x 200μm thick is fixed to the adhesive tape, and then stored at 25°C for 7 days. When the silicon chip is then picked up from the adhesive tape with the silicon chip raised 600μm, the success rate of picking up the silicon chip must be 95% or higher. [Effects of the Invention]

[0025] According to the present invention, the pressure-sensitive adhesive tape satisfies the following criteria: a test piece is prepared from a pressure-sensitive adhesive layer measuring 0.8 mm thick x 6 mm wide x 20 mm long before energy is applied to the pressure-sensitive adhesive layer; the test piece is stretched in the longitudinal direction at 25°C with a chuck distance of 10 mm and a pulling rate of 10 mm / min until an elongation ratio reaches 30%; and the stretched state is then maintained for 1 minute; the stress relaxation ratio measured is 30.0% or more and 65.0% or less. Therefore, after energy is applied to the pressure-sensitive adhesive layer of the pressure-sensitive adhesive tape, pickup errors can be appropriately suppressed or prevented when picking up a component temporarily fixed to the pressure-sensitive adhesive tape, and the component can be picked up with excellent accuracy. [Brief explanation of the drawings]

[0026] [Figure 1] 1 is a longitudinal sectional view showing an example of a semiconductor device manufactured using the pressure-sensitive adhesive tape of the present invention. [Figure 2] FIG. 2 is a vertical cross-sectional view illustrating a method for manufacturing the semiconductor device shown in FIG. 1 using the pressure-sensitive adhesive tape of the present invention. [Figure 3] FIG. 2 is a vertical cross-sectional view illustrating a method for manufacturing the semiconductor device shown in FIG. 1 using the pressure-sensitive adhesive tape of the present invention. [Figure 4] FIG. 2 is a vertical cross-sectional view illustrating a method for manufacturing the semiconductor device shown in FIG. 1 using the pressure-sensitive adhesive tape of the present invention. [Figure 5] 1 is a longitudinal sectional view showing an embodiment in which the pressure-sensitive adhesive tape of the present invention is applied to a pressure-sensitive adhesive tape for processing semiconductor substrates. [Figure 6]1 is a longitudinal sectional view showing an embodiment in which the pressure-sensitive adhesive tape of the present invention is applied to a pressure-sensitive adhesive tape for transporting semiconductor elements. DETAILED DESCRIPTION OF THE INVENTION

[0027] The pressure-sensitive adhesive tape of the present invention will be described in detail below. First, before describing the pressure-sensitive adhesive tape of the present invention, a semiconductor device manufactured using the pressure-sensitive adhesive tape of the present invention will be described.

[0028] <Semiconductor device> Figure 1 is a longitudinal cross-sectional view showing an example of a semiconductor device manufactured using the pressure-sensitive adhesive tape of the present invention. In the following description, the upper side in Figure 1 will be referred to as "top" and the lower side as "bottom." In addition, in each drawing referred to in this specification, dimensions in the left-right direction and / or thickness direction are exaggerated and differ significantly from the actual dimensions.

[0029] The semiconductor device 10 shown in Figure 1 has a semiconductor chip (semiconductor element) 20, an interposer (substrate) 30 that supports the semiconductor chip 20, a plurality of conductive bumps (terminals) 70, and a molded portion (sealing portion) 17 that seals the semiconductor chip 20.

[0030] The semiconductor chip 20 is obtained by dividing the semiconductor substrate 7, which will be described later, into individual pieces, and in this embodiment, a circuit is formed on the upper surface of the semiconductor chip 20, and terminals 21 are formed on the lower surface thereof.

[0031] The interposer 30 is an insulating substrate and is made of various resin materials such as polyimide, epoxy, cyanate, bismaleimide triazine (BT resin), etc. The planar shape of the interposer 30 is usually a quadrangle such as a square or rectangle.

[0032] On the upper surface (one surface) of the interposer 30, terminals 41 made of a conductive metal material such as copper are provided in a predetermined shape.

[0033] Furthermore, a plurality of vias (through holes) (not shown) are formed in the interposer 30 so as to penetrate through the interposer 30 in the thickness direction.

[0034] Each bump 70 has one end (upper end) electrically connected to a part of the terminal 41 through a respective via, and the other end (lower end) protrudes from the lower surface (other surface) of the interposer 30.

[0035] The portion of the bump 70 that protrudes from the interposer 30 is substantially spherical (ball-shaped).

[0036] The bumps 70 are mainly made of a brazing material such as solder, silver brazing, copper brazing, or phosphorus copper brazing.

[0037] Furthermore, terminals 41 are formed on the interposer 30. Terminals 21 of the semiconductor chip 20 are electrically connected to the terminals 41 via connecting portions 81.

[0038] In this embodiment, as shown in FIG. 1, the terminals 21 are configured to protrude from the surface formed on the semiconductor chip 20, and the terminals 41 are also configured to protrude from the interposer 30.

[0039] The gap between the semiconductor chip 20 and the interposer 30 is filled with an underfill material made of various resin materials, and the hardened underfill material forms a sealing layer 80. This sealing layer 80 has the function of improving the bonding strength between the semiconductor chip 20 and the interposer 30 and the function of preventing the intrusion of foreign matter, moisture, etc. into the gap.

[0040] Furthermore, on the upper side of the interposer 30, a molded portion 17 formed to cover the semiconductor chip 20 and the interposer 30 is made of a hardened semiconductor sealing material, thereby sealing the semiconductor chip 20 within the semiconductor device 10 and preventing the intrusion of foreign matter, moisture, etc. into the semiconductor chip 20.

[0041] The semiconductor device 10 having such a configuration is manufactured, for example, by a semiconductor device manufacturing method using an adhesive tape for processing semiconductor substrates (adhesive tape of the present invention; dicing tape) and an adhesive tape for transporting semiconductor elements (adhesive tape of the present invention; shipping tape) as follows.

[0042] <Method of manufacturing a semiconductor device> 2 to 4 are longitudinal cross-sectional views illustrating a method for manufacturing the semiconductor device shown in FIG. 1 using the adhesive tape of the present invention, FIG. 5 is a longitudinal cross-sectional view showing an embodiment in which the adhesive tape of the present invention is applied to an adhesive tape for processing semiconductor substrates, and FIG. 6 is a longitudinal cross-sectional view showing an embodiment in which the adhesive tape of the present invention is applied to an adhesive tape for transferring semiconductor elements. In the following description, the upper side in FIGS. 2 to 6 will be referred to as "upper" and the lower side will be referred to as "lower." Furthermore, in each of the drawings referred to in this specification, the dimensions in the left-right and / or thickness directions are exaggerated and differ significantly from the actual dimensions.

[0043] [1A] First, prepare an adhesive tape 100 for processing semiconductor substrates (hereinafter, sometimes simply referred to as "adhesive tape 100 for processing") that is composed of a laminate having a base material 4 and an adhesive layer 2 laminated on the upper surface of the base material 4 (see Figures 2(a) and 5).

[0044] [2A] Next, as shown in FIG. 2(b), the semiconductor substrate 7 is placed on the adhesive layer 2 at the center 122 of the processing adhesive tape 100, and lightly pressed to laminate (attach) the semiconductor substrate 7 (semiconductor wafer) to the processing adhesive tape 100 (attachment process).

[0045] Thereafter, the adhesive tape 100 for processing with the semiconductor substrate 7 attached thereto is placed on a dicer table (not shown).

[0046] The semiconductor substrate 7 has circuits formed in advance on its upper surface, which will be included in the semiconductor chips 20 formed by singulation, and terminals 21 formed in advance on its lower surface, and the semiconductor substrate 7 is attached to the processing adhesive tape 100 with the upper surface on which the circuits are formed facing the adhesive layer 2. Therefore, the upper surface of the semiconductor substrate 7 on which the circuits are formed, i.e., the uneven surface on which the unevenness based on the circuits is formed, is bonded to the adhesive layer 2. The semiconductor substrate 7 typically has a diameter of approximately 6 inches to 12 inches and a thickness of approximately 100 μm to 600 μm.

[0047] [3A] Next, the outer peripheral portion 121 (edge ​​portion) of the adhesive layer 2 is fixed with a cylindrical wafer ring 9, and then the semiconductor substrate 7 is cut (diced) using a dicing saw (blade) not shown to separate the semiconductor substrate 7, thereby obtaining multiple semiconductor chips 20 as components on the processing adhesive tape 100 (single process; see Figure 2(c)).

[0048] At this time, the adhesive tape for processing 100 has a cushioning effect and prevents cracks, chips, etc. when the semiconductor substrate 7 is cut.

[0049] 2(c), the cutting of the semiconductor substrate 7 using the blade is performed so as to reach partway through the thickness direction of the base material 4. This ensures that the semiconductor substrate is divided into individual pieces.

[0050] At this time, in order to prevent the scattering of dust generated when the semiconductor substrate 7 is cut and to prevent the semiconductor substrate 7 from being unnecessarily heated, cutting water is usually supplied to the semiconductor substrate 7 while the semiconductor substrate 7 is cut.

[0051] The wafer ring 9 generally has a thickness of about 1.0 mm or more and 1.5 mm or less.

[0052] [4A] Next, energy is applied to the adhesive layer 2 of the adhesive tape 100 for processing, thereby reducing the adhesiveness of the adhesive layer 2 to the semiconductor substrate 7 (energy application step). This causes peeling to occur between the adhesive layer 2 and the semiconductor substrate 7.

[0053] The method of applying energy to the adhesive layer 2 is not particularly limited, but examples include a method of irradiating the adhesive layer 2 with energy rays and a method of heating the adhesive layer 2, and among these, it is preferable to use a method of irradiating the adhesive layer 2 with energy rays from the substrate 4 side of the processing adhesive tape 100.

[0054] This method does not require the semiconductor chip 20 to undergo unnecessary thermal history, and energy can be applied to the adhesive layer 2 relatively easily and efficiently, so it is preferably used as a method for applying energy.

[0055] Examples of energy rays include ultraviolet rays, particle rays such as electron beams and ion beams, and combinations of two or more of these energy rays. Among these, ultraviolet rays are particularly preferred. Ultraviolet rays can efficiently reduce the adhesiveness of the adhesive layer 2 to the semiconductor substrate 7.

[0056] In addition, the application of energy to the adhesive layer 2 can be carried out prior to the next step [5A] (expanding step), as in this step [4A], or can be carried out after the expanding step, which is carried out prior to the pick-up step, as shown in the next step [5A].

[0057] [5A] Next, the processing adhesive tape 100 is radially stretched using an expanding device (not shown) to open the individual semiconductor substrates 7 (semiconductor chips 20) at regular intervals (expanding process; see Figure 2(d)). Thereafter, the semiconductor chips 20 are pushed up using a needle or the like, and in this state, they are picked up by suction using a vacuum collet or air tweezers or the like (pickup process; see Figure 2(e)).

[0058] In this main step [5A], the adhesive tape of the present invention is used as the processing adhesive tape 100. That is, in this step [5A], when picking up the semiconductor chip 20 as a component, the processing adhesive tape 100 used satisfies the following conditions: a test piece made of the adhesive layer 2 and measuring 0.8 mm thick x 6 mm wide x 20 mm long before applying energy to the adhesive layer 2; the test piece is stretched in the longitudinal direction at 25°C with a chuck distance of 10 mm and a pulling rate of 10 mm / min until the stretching ratio reaches 30%; and the stretched state is then maintained for 1 minute, and the measured stress relaxation ratio is 30.0% or more and 65.0% or less.

[0059] In this way, a processing adhesive tape 100 is used that has an adhesive layer 2 in which the stress relaxation rate of the test piece is 30.0% or more and 65.0% or less. Therefore, after energy is applied to the adhesive layer 2, when picking up the semiconductor chip 20 in this step [5A], pickup errors can be accurately suppressed or prevented, and the semiconductor chip 20 can be picked up with excellent precision, but a detailed explanation of this will be given later.

[0060] [6A] Next, an adhesive tape 200 for transporting semiconductor elements (hereinafter sometimes simply referred to as "adhesive tape for transport 200") is prepared, which is composed of a laminate having a base material 204 and an adhesive layer 202 laminated on the upper surface of the base material 204 (see Figure 6). After fixing a wafer ring 9 to the outer periphery of this adhesive tape for transport 200, it is placed on a table (not shown) as shown in Figure 3(a). Thereafter, the side of the semiconductor chip 20 on which no circuit is formed is placed on the adhesive layer 202 and lightly pressed, thereby laminating (affixing) the semiconductor chip 20 to the adhesive tape for transport 200 (affixing process).

[0061] By repeatedly attaching the semiconductor chips 20 to this adhesive tape 200 for transport multiple times, the multiple semiconductor chips 20 obtained by dividing the semiconductor substrate 7 are rearranged on the adhesive tape 200 for transport.

[0062] Then, while maintaining this state, the semiconductor chip 20 is transported to a different line or factory located in a different location where the next process [7A] and subsequent processes are performed. Also, before and after the transport, the semiconductor chip 20 may be stored while maintaining this state.

[0063] When the semiconductor chip 20 is transported to a different location or stored, a protective adhesive tape may be attached to the wafer ring 9 fixed to the transport adhesive tape 200 on the opposite side of the transport adhesive tape 200, so that the rearranged semiconductor chip 20 can be stored in an airtight space defined by the transport adhesive tape 200, the wafer ring 9, and the protective adhesive tape.

[0064] [7A] Next, energy is applied to the adhesive layer 202 of the adhesive tape for transfer 200, thereby reducing the adhesiveness of the adhesive layer 202 to the semiconductor chip 20 (energy application step). This causes the adhesive layer 202 and the semiconductor chip 20 to peel off from each other.

[0065] As a method for applying energy to the adhesive layer 202, the same methods as those mentioned for applying energy to the adhesive layer 2 of the adhesive tape for processing 100 in the step [4A] can be used.

[0066] [8A] Next, the semiconductor chip 20 on the transfer adhesive tape 200 is pushed up using a needle or the like, and in this state, as shown in Figure 3(b), it is picked up by suction using a vacuum collet or air tweezers (pickup process).

[0067] In this main step [8A], the adhesive tape of the present invention is used as the adhesive transfer tape 200. That is, in this step [8A], when picking up the semiconductor chip 20 as a component, the adhesive transfer tape 200 is one that satisfies the following conditions: a test piece made of the adhesive layer 202 measuring 0.8 mm thick x 6 mm wide x 20 mm long before applying energy to the adhesive layer 202; this test piece is stretched in the longitudinal direction at 25°C with a chuck distance of 10 mm and a pulling rate of 10 mm / min until the stretching rate reaches 30%; and then, this stretched state is maintained for 1 minute, and the measured stress relaxation rate is 30.0% or more and 65.0% or less.

[0068] In this way, a transfer adhesive tape 200 is used that has an adhesive layer 202 in which the stress relaxation rate of the test piece is 30.0% or more and 65.0% or less. Therefore, after energy is applied to the adhesive layer 202, when picking up the semiconductor chip 20 in this step [8A], it is possible to accurately suppress or prevent pickup errors from occurring, and to pick up the semiconductor chip 20 with excellent precision, although a detailed explanation of this will be given later.

[0069] [9A] Next, the picked-up semiconductor chip 20 is transferred from the vacuum collet or air tweezers to a mounting probe or the like and turned upside down, and then, as shown in Figure 4(a), the terminals 21 of this semiconductor chip 20 and the terminals 41 of the interposer 30 are placed opposite each other via the solder bumps 85 provided on the terminals 41, and the semiconductor chip (semiconductor element) 20 is placed on the interposer (substrate) 30 with the surface of the semiconductor chip 20 that was in contact with the processing adhesive tape 100 facing up.

[0070] [10A] Next, as shown in FIG. 4(b), the interposer 30 and the semiconductor chip 20 are brought close to each other while the solder bumps 85 interposed between the terminals 21 and 41 are heated.

[0071] As a result, the molten solder bump 85 comes into contact with both the terminal 21 and the terminal 41, and by cooling in this state, a connection portion 81 is formed, and as a result, the terminal 21 and the terminal 41 are electrically connected via the connection portion 81 (mounting process; see Figure 4(c)).

[0072] [11A] Next, an underfill material (sealing material) made of various resin materials is filled into the gap formed between the semiconductor chip 20 and the interposer 30, and then the underfill material is hardened to form a sealing layer 80 made of the hardened underfill material (sealing layer forming process; see Figure 4(d)).

[0073] [12A] Next, a molded portion 17 is formed on the upper side of the interposer 30 so as to cover the semiconductor chip 20 and the interposer 30, thereby sealing the semiconductor chip 20 between the interposer 30 and the molded portion 17, and a bump 70 is formed so as to protrude from the underside of the interposer 30, electrically connected to a portion of the terminal 41 through a via provided in the interposer 30 (see Figure 4(e)).

[0074] Here, sealing with the molded portion 17 is performed, for example, by preparing a molding die having an internal space corresponding to the shape of the molded portion 17 to be formed, and filling the internal space with a powdered semiconductor encapsulating material so as to cover the semiconductor chip 20 and interposer 30 arranged in the internal space. Then, in this state, the semiconductor encapsulating material is heated to harden it, resulting in a hardened product of the semiconductor encapsulating material.

[0075] The semiconductor device manufacturing method having the steps described above produces a semiconductor device 10. More specifically, after performing the steps [1A] to [12A], the steps [8A] to [11A] are repeatedly performed, whereby a plurality of semiconductor devices 10 can be manufactured in a batch from one semiconductor substrate 7.

[0076] Furthermore, the adhesive tape of the present invention is applied to the adhesive tape 100 for processing semiconductor substrates and the adhesive tape 200 for transporting semiconductor elements, which are used in the manufacturing method of such a semiconductor device 10, thereby enabling the pickup of semiconductor chips 20 in the steps [5A] and [8A] to be carried out with excellent precision. Below, we will explain the adhesive tape of the present invention that is applied to the adhesive tape 100 for processing semiconductor substrates and the adhesive tape 200 for transporting semiconductor elements.

[0077] <Adhesive tape of the present invention> The adhesive tape of the present invention is composed of a laminate including a sheet-like substrate containing a resin material and an adhesive layer laminated on the upper surface (one side) of the substrate, and is used to temporarily fix at least one of a semiconductor substrate 7 (substrate) and a semiconductor chip 20 (component). As described above, the adhesive layer contains an adhesive base resin and a curable resin that hardens when energy is applied, and the adhesive strength of the adhesive layer decreases when energy is applied to the adhesive layer to harden it. A test piece consisting of the adhesive layer and measuring 0.8 mm thick x 6 mm wide x 20 mm long is prepared, and before the energy is applied, the test piece is stretched in the longitudinal direction at 25°C, with a chuck distance of 10 mm and a tensile speed of 10 mm / min, until an elongation ratio of 30% is reached. The stress relaxation ratio measured when the stretched state is maintained for 1 minute satisfies a value of 30.0% or more and 65.0% or less.

[0078] Here, the pick-up of the semiconductor chip 20 from the processing adhesive tape 100 in step [5A], and the pick-up of the semiconductor chip 20 from the transport adhesive tape 200 in step [8A] are each performed by, for example, suction using a vacuum collet or air tweezers. However, as explained in the background art section above, the pick-up of the semiconductor chip 20 cannot be performed with high precision, which has been a problem in that pick-up errors occur.

[0079] As a result of thorough investigation into this problem, the inventor has found that the occurrence of pickup errors of the semiconductor chip 20 is caused by chip shift, in which the semiconductor chip 20 is displaced from its designed (assumed) position on the processing adhesive tape 100 and the transport adhesive tape 200.

[0080] It has also been found that chip shift occurs in the processing adhesive tape 100 during the expanding step of radially expanding the processing adhesive tape 100, which is carried out prior to the pick-up step of the semiconductor chip 20 in the step [5A], and that chip shift occurs in the transfer adhesive tape 200 during the transport and storage of the semiconductor chip 20 prior to the pick-up step of the semiconductor chip 20 in the step [8A]. That is, it has been found that chip shift of the semiconductor chip 20 occurs in each adhesive tape 100, 200 due to the physical action of radially expanding the processing adhesive tape 100 and the temporal action of transporting and storing the transfer adhesive tape 200.

[0081] Further investigation by the inventors has led to the discovery that the chip shift of the semiconductor chip 20, which is caused by the physical action of radially stretching the processing adhesive tape 100 and the temporal action of transporting and storing the transport adhesive tape 200, is related to the magnitude of the stress relaxation rate measured after stretching the adhesive layers 2, 202 before energy is applied. Specifically, the magnitude of this stress relaxation rate is measured by preparing a test piece consisting of the adhesive layers 2, 202 measuring 0.8 mm in thickness, 6 mm in width, and 20 mm in length, stretching this test piece in the longitudinal direction at 25°C, a chuck distance of 10 mm, and a tensile speed of 10 mm / min before energy is applied, and then maintaining this stretched state for 1 minute, so that the stress relaxation rate measured satisfies a value of 30.0% or more and 65.0% or less. This finding has led to the completion of the present invention.

[0082] The substrate and adhesive layer of the adhesive tape of the present invention will be described in detail below. <Base material> The substrate is primarily made of a resin material and has a sheet shape, and functions to support an adhesive layer provided on the substrate. Furthermore, when the adhesive tape of the present invention is applied to the processing adhesive tape 100, it is intended to realize the expansion of the processing adhesive tape 100 in the planar direction in the step [5A]. Furthermore, when the singulated semiconductor chips 20 are picked up in the step [5A] in a state where they are pushed up by needles or the like, it is intended to realize the pushing up by the needles or the like while preventing breakage of the substrate and the adhesive tape. Furthermore, when the adhesive tape of the present invention is applied to the transfer adhesive tape 200, it is intended to realize the pushing up by the needles or the like while preventing breakage of the substrate and the adhesive tape when the rearranged semiconductor chips 20 are picked up in the step [8A] in a state where they are pushed up by needles or the like.

[0083] Such resin materials are not particularly limited, and examples thereof include thermoplastic resins such as polyolefin resins, polyvinyl chloride resins, polystyrene resins, polyethylene terephthalate, polyethylene naphthalate, polybutylene terephthalate, polybutylene naphthalate, polyester resins (ester polymers) such as polyester thermoplastic elastomers, polyurethanes, polyimides, polyamides, polyether ketones such as polyether ether ketones, polyether sulfones, fluororesins, silicone resins, cellulose resins, acrylic resins, polyvinyl isoprene, and polycarbonates (carbonate polymers), as well as mixtures of these thermoplastic resins.

[0084] A substrate mainly made of these resin materials exhibits sufficient strength to support the adhesive layer, and therefore these resin materials are preferably used as the main material for the substrate.

[0085] In particular, it is preferable to use polyolefin resins, polyvinyl chloride resins, polystyrene resins, or mixtures thereof as the resin material, since these resins are easily available and relatively inexpensive, and substrates composed primarily of these resins exhibit the above-mentioned functions remarkably, and therefore are particularly preferably used as the resin material.

[0086] Such olefin-based resins are not particularly limited, but examples thereof include polyethylene-based resins such as linear low-density polyethylene, low-density polyethylene, and very low-density polyethylene; ethylene-vinyl acetate copolymer (EVA), ethylene-methyl methacrylate copolymer (EMMA), and ethylene-methacrylate copolymer (EMAA); and ethylene copolymers such as ionomers such as ethylene-based ionomers crosslinked with zinc ions, sodium ions, or potassium ions; and these can be used alone or in combination of two or more.

[0087] Polyvinyl chloride resins are polymers having multiple repeating units of the group -CH-CHCl-. Specific examples include homopolymers of vinyl chloride, copolymers of vinyl chloride with a copolymerizable vinyl monomer (polymerizable monomer), and post-chlorinated vinyl chloride polymers. While one or a combination of two or more of these can be used, homopolymers are generally used.

[0088] Examples of copolymers of vinyl chloride with copolymerizable vinyl monomers include vinyl chloride-vinyl acetate copolymer, vinyl chloride-ethylene copolymer, and vinyl chloride-acrylic copolymer.

[0089] Furthermore, the polystyrene resin is not particularly limited, but examples thereof include polystyrene, poly(α-methylstyrene), polychlorostyrene, poly(m-propylstyrene), high impact polystyrene (HIPS), acrylonitrile-butadiene-styrene copolymer (ABS), acrylonitrile-styrene copolymer (AS), styrene-methacrylic acid copolymer, styrene-methacrylic acid alkyl ester copolymer, styrene-methacrylic acid glycidyl ester copolymer, styrene-acrylic acid copolymer, styrene-acrylic acid alkyl ester copolymer, styrene-maleic acid copolymer, styrene-fumaric acid copolymer, as well as styrene-butadiene copolymer, styrene-isoprene copolymer, and other styrene-based thermoplastic elastomers, and these may be used alone or in combination of two or more.

[0090] The substrate preferably contains a conductive material having electrical conductivity, which allows the conductive material to function as an antistatic agent, thereby effectively suppressing or preventing the generation of static electricity on the semiconductor chip 20 during pick-up in step [5A] or step [8A].

[0091] Thus, when the substrate contains a conductive material, the surface resistivity of the substrate on the surface opposite to the adhesive layer is 1.0 × 10 13 (Ω / □) or less, and is preferably set to 1.0×10 11 It is more preferable that the resistance is set to (Ω / □) or less, which makes it possible to more accurately suppress or prevent the generation of static electricity on the semiconductor chip 20 when picking it up in the step [5A] or the step [8A].

[0092] The conductive material is not particularly limited as long as it is conductive, but examples thereof include surfactants, permanently antistatic polymers (IDPs), metal materials, metal oxide materials, and carbon-based materials, and one or more of these may be used in combination.

[0093] Among these surfactants, examples include anionic surfactants, cationic surfactants, nonionic surfactants, and amphoteric surfactants.

[0094] As the permanently antistatic polymer (IDP), any IDP such as polyether and polyolefin block polymer series, polyesteramide series, polyesteramide, polyetheresteramide, polyurethane series, etc. can be used.

[0095] Examples of metal materials include gold, silver, copper or silver-coated copper, and nickel, and powders of these metals are preferably used.

[0096] Examples of metal oxide materials include indium tin oxide (ITO), indium oxide (IO), antimony tin oxide (ATO), indium zinc oxide (IZO), tin oxide (SnO2), and zinc oxide (ZnO), and powders of these metal oxides are preferably used.

[0097] Further, examples of carbon-based materials include carbon black, carbon nanotubes such as single-walled carbon nanotubes and multi-walled carbon nanotubes, carbon nanofibers, CN nanotubes, CN nanofibers, BCN nanotubes, BCN nanofibers, and graphene.

[0098] Among these, a permanently antistatic polymer (IDP) is preferable as the conductive material. Since the resistivity of a permanently antistatic polymer (IDP) has a small temperature dependency, even if the substrate is heated when picking up the semiconductor chip 20 in step [5A] or step [8A], the change in the surface resistance value can be reduced.

[0099] When a polymer material such as a conductive polymer or a permanently antistatic polymer (IDP) is used as the conductive material, the surface resistivity of the other surface of the substrate can be adjusted by adjusting the degree of orientation in the substrate. That is, the surface resistivity of the other surface of the substrate can be adjusted by appropriately adjusting the MD or TD stretch ratio when forming the substrate.

[0100] Furthermore, when preventing static electricity from occurring in the semiconductor chip 20 without incorporating a conductive material into the base material, an antistatic layer containing a conductive material may be formed on the surface opposite the adhesive layer, thereby achieving the same effect as when the base material contains a conductive material.

[0101] Furthermore, the base material may contain a softener such as mineral oil, a filler such as calcium carbonate, silica, talc, mica, or clay, an antioxidant, a light stabilizer, a lubricant, a dispersant, a neutralizing agent, a colorant, or the like.

[0102] Furthermore, when the substrate contains a constituent material other than the resin material as the main material, the content of the resin material in the substrate is preferably 50% by weight to 95% by weight, more preferably 65% ​​by weight to 90% by weight. By setting the content of the resin material within this range, the substrate can reliably perform the functions described above.

[0103] The average thickness of the base material is not particularly limited, but is preferably 30 μm to 160 μm, more preferably 80 μm to 120 μm, for example. When the average thickness of the base material is within this range, the semiconductor chip 20, which is a component fixed via the adhesive layer, can be reliably supported.

[0104] Furthermore, it is preferable that the substrate has exposed on its surface a functional group, such as a hydroxyl group or an amino group, which is reactive with the constituent material contained in the adhesive layer.

[0105] The substrate may also be formed as a laminate (multilayer body) in which a plurality of layers made of different resin materials are laminated.

[0106] <Adhesive layer> When the adhesive tape of the present invention is applied to the processing adhesive tape 100, the adhesive layer adheres to and supports the semiconductor substrate 7 when dicing the semiconductor substrate 7 in the step [3A], and has adhesiveness to the extent that the semiconductor chips 20 obtained by dicing the semiconductor substrate 7 can be picked up in the step [5A] by applying energy to the adhesive layer 202 to harden the adhesive layer 202 in the step [4A]. When the adhesive tape of the present invention is applied to the transport adhesive tape 200, the adhesive layer adheres to and supports the semiconductor substrate 7 during the transport or storage of the semiconductor chips 20 prior to the step [8A], and has adhesiveness to the extent that the semiconductor chips 20 repositioned on the transport adhesive tape 200 can be picked up in the step [8A] by applying energy to the adhesive layer 202 to harden the adhesive layer 202 in the step [7A].

[0107] Such an adhesive layer is made of a resin composition containing, as main materials, (1) a base resin having adhesive properties and (2) a curable resin that hardens the adhesive layer.

[0108] In the present invention, before applying energy to the adhesive layer, a test piece consisting of an adhesive layer measuring 0.8 mm thick x 6 mm wide x 20 mm long is prepared, and this test piece is stretched in the longitudinal direction at 25°C, with a chuck distance of 10 mm and a tensile speed of 10 mm / min, until the stretching ratio reaches 30%.The type and content of each component (constituent material) contained in the resin composition constituting the adhesive layer are set so as to satisfy the stress relaxation ratio measured when this stretched state is then held for 1 minute, being 30.0% or more and 65.0% or less.

[0109] Each component contained in this resin composition will be explained below in turn. (1) Base resin The base resin has adhesiveness and is contained in the resin composition in order to impart adhesiveness to the semiconductor substrate 7 to the adhesive layer.

[0110] Examples of such base resins include known adhesive layer components such as acrylic resins (adhesives), silicone resins (adhesives), polyester resins (adhesives), polyvinyl acetate resins (adhesives), polyvinyl ether resins (adhesives), styrene elastomer resins (adhesives), polyisoprene resins (adhesives), polyisobutylene resins (adhesives), and urethane resins (adhesives). Among these, acrylic resins are preferred. By using an acrylic resin as the base resin, the tack strength (T1) of the adhesive layer at 25°C and the peel strength (A1) of the adhesive tape of the present invention can be relatively easily adjusted within the above-mentioned ranges. Furthermore, acrylic resins are preferred as base resins because of their excellent heat resistance and their relatively easy and inexpensive availability. The term "acrylic resin" refers to a polymer (homopolymer or copolymer) whose main monomer component is (meth)acrylic acid ester.

[0111] The (meth)acrylic acid ester is not particularly limited, but examples thereof include methyl (meth)acrylate, ethyl (meth)acrylate, propyl (meth)acrylate, isopropyl (meth)acrylate, butyl (meth)acrylate, isobutyl (meth)acrylate, s-butyl (meth)acrylate, t-butyl (meth)acrylate, pentyl (meth)acrylate, hexyl (meth)acrylate, heptyl (meth)acrylate, octyl (meth)acrylate, isooctyl (meth)acrylate, 2-ethylhexyl (meth)acrylate, nonyl (meth)acrylate, isononyl (meth)acrylate, and decyl (meth)acrylate. Examples of suitable acrylates include alkyl (meth)acrylates such as methyl (meth)acrylate, isodecyl (meth)acrylate, undecyl (meth)acrylate, dodecyl (meth)acrylate, tridecyl (meth)acrylate, tetradecyl (meth)acrylate, pentadecyl (meth)acrylate, hexadecyl (meth)acrylate, heptadecyl (meth)acrylate, and octadecyl (meth)acrylate; cycloalkyl (meth)acrylates such as cyclohexyl (meth)acrylate; and aryl (meth)acrylates such as phenyl (meth)acrylate. These acrylates may be used alone or in combination. Among these, alkyl (meth)acrylates such as methyl (meth)acrylate, ethyl (meth)acrylate, butyl (meth)acrylate, 2-ethylhexyl (meth)acrylate, and octyl (meth)acrylate are preferred. Alkyl (meth)acrylates are particularly heat-resistant and can be obtained relatively easily and inexpensively. Furthermore, by including a (meth)acrylic acid alkyl ester as the base resin, the magnitude of the stress relaxation rate based on the test piece composed of the adhesive layer can be set relatively easily within the above range.

[0112] In this specification, the term "(meth)acrylic acid ester" is used to include both acrylic acid ester and methacrylic acid ester.

[0113] The acrylic resin used may contain a copolymerizable monomer as a monomer component constituting the polymer, if necessary, for the purpose of improving properties such as cohesive strength and heat resistance.

[0114] Such copolymerizable monomers are not particularly limited, and examples thereof include hydroxyl group-containing monomers such as 2-hydroxyethyl (meth)acrylate, 2-hydroxypropyl (meth)acrylate, 4-hydroxybutyl (meth)acrylate, and 6-hydroxyhexyl (meth)acrylate; epoxy group-containing monomers such as glycidyl (meth)acrylate; carboxyl group-containing monomers such as (meth)acrylic acid, itaconic acid, maleic acid, fumaric acid, crotonic acid, and isocrotonic acid; acid anhydride group-containing monomers such as maleic anhydride and itaconic anhydride; amide monomers such as (meth)acrylamide, N,N-dimethyl(meth)acrylamide, N-butyl(meth)acrylamide, N-methylol(meth)acrylamide, N-methylolpropane(meth)acrylamide, N-methoxymethyl(meth)acrylamide, and N-butoxymethyl(meth)acrylamide; amino group-containing monomers such as aminoethyl (meth)acrylate, N,N-dimethylaminoethyl (meth)acrylate, and t-butylaminoethyl (meth)acrylate; Examples of such monomers include cyano group-containing monomers such as (meth)acrylonitrile, olefin-based monomers such as ethylene, propylene, isoprene, butadiene, and isobutylene, styrene-based monomers such as styrene, α-methylstyrene, and vinyltoluene, vinyl ester-based monomers such as vinyl acetate and vinyl propionate, vinyl ether-based monomers such as methyl vinyl ether and ethyl vinyl ether, halogen atom-containing monomers such as vinyl chloride and vinylidene chloride, alkoxy group-containing monomers such as methoxyethyl (meth)acrylate and ethoxyethyl (meth)acrylate, and monomers having a nitrogen atom-containing ring such as N-vinyl-2-pyrrolidone, N-methylvinylpyrrolidone, N-vinylpyridine, N-vinylpiperidone, N-vinylpyrimidine, N-vinylpiperazine, N-vinylpyrazine, N-vinylpyrrole, N-vinylimidazole, N-vinyloxazole, N-vinylmorpholine, N-vinylcaprolactam, and N-(meth)acryloylmorpholine. These monomers may be used alone or in combination of two or more.

[0115] The content of these copolymerizable monomers is preferably 40% by weight or less, and more preferably 10% by weight or less, based on the total monomer components constituting the acrylic resin.

[0116] The copolymerizable monomer may be contained at the terminal of the main chain of the polymer constituting the acrylic resin, or may be contained in the main chain, or may be contained both at the terminal of the main chain and in the main chain.

[0117] Furthermore, the copolymerizable monomer may contain a polyfunctional monomer for the purpose of crosslinking between polymers.

[0118] Examples of polyfunctional monomers include 1,6-hexanediol (meth)acrylate, (poly)ethylene glycol di(meth)acrylate, (poly)propylene glycol di(meth)acrylate, neopentyl glycol di(meth)acrylate, pentaerythritol di(meth)acrylate, trimethylolpropane tri(meth)acrylate, pentaerythritol tri(meth)acrylate, dipentaerythritol hexa(meth)acrylate, glycerin di(meth)acrylate, epoxy (meth)acrylate, polyester (meth)acrylate, urethane (meth)acrylate, divinylbenzene, butyl di(meth)acrylate, and hexyl di(meth)acrylate, and these can be used alone or in combination of two or more.

[0119] Furthermore, ethylene-vinyl acetate copolymers and vinyl acetate polymers can also be used as copolymerizable monomer components.

[0120] Such an acrylic resin (polymer) can be produced by polymerizing a single monomer component or a mixture of two or more monomer components. The polymerization of these monomer components can be carried out using a polymerization method such as solution polymerization, emulsion polymerization, bulk polymerization, or suspension polymerization.

[0121] Furthermore, the acrylic resin preferably contains a small amount of low-molecular-weight substances, so as not to leave any acrylic resin on the semiconductor chip 20 when the semiconductor chip 20 is picked up from the adhesive layer. In this case, the weight-average molecular weight of the acrylic resin is preferably set to 300,000 to 5,000,000, more preferably 500,000 to 5,000,000, and even more preferably 800,000 to 3,000,000. Note that, depending on the type of monomer component, if the weight-average molecular weight of the acrylic resin is less than the lower limit, the contamination prevention properties for the semiconductor chip 20 may be reduced, and adhesive residue may be left behind when the semiconductor chip 20 is picked up.

[0122] Furthermore, the acrylic resin (base resin) used preferably has a glass transition point of −70° C. or higher and −50° C. or lower, more preferably −65° C. or higher and −55° C. or lower. By using an acrylic resin having a glass transition point within this range as the base resin, the magnitude of the stress relaxation rate based on the test piece composed of the adhesive layer can be set within this range relatively easily.

[0123] The acrylic resin preferably has a functional group (reactive functional group) that is reactive with the crosslinking agent, such as a hydroxyl group or a carboxyl group, which allows the crosslinking agent to be linked to the acrylic resin, which is a polymer component, thereby effectively suppressing or preventing the crosslinking agent from leaking out of the adhesive layer.

[0124] (2) Curing resin The curable resin has a curing property such that it is cured by irradiation with energy rays, for example. As a result of this curing, the base resin is incorporated into the crosslinked structure of the curable resin, and as a result, the adhesive strength of the adhesive layer decreases.

[0125] As such a curable resin, for example, a low molecular weight compound having at least two polymerizable carbon-carbon double bonds as functional groups in the molecule, which are capable of three-dimensional crosslinking by irradiation with energy rays such as ultraviolet rays or electron beams, is used. Specific examples include trimethylolpropane tri(meth)acrylate, pentaerythritol tri(meth)acrylate, pentaerythritol tetra(meth)acrylate, tetramethylolmethane tetra(meth)acrylate, tetraethylene glycol di(meth)acrylate, 1,6-hexanediol di(meth)acrylate, neopentyl glycol di(meth)acrylate, dipentaerythritol hexa(meth)acrylate, dipentaerythritol monohydroxypenta(meth)acrylate, and the like. acrylate, 1,4-butylene glycol di(meth)acrylate, polyethylene glycol di(meth)acrylate, esters of (meth)acrylic acid with polyhydric alcohols such as glycerin di(meth)acrylate, ester acrylate oligomers, cyanurate compounds having a carbon-carbon double bond-containing group such as 2-propenyl-di-3-butenyl cyanurate, tris(2-acryloxyethyl)isocyanurate, tris(2-methacryloxyethyl)isocyanurate, 2-hydroxyethyl Examples of suitable compounds include isocyanurate compounds having a carbon-carbon double bond-containing group, such as bis(2-acryloxyethyl)isocyanurate, bis(2-acryloxyethyl)2-[(5-acryloxyhexyl)oxy]ethyl isocyanurate, tris(1,3-diacryloxy-2-propyl-oxycarbonylamino-n-hexyl)isocyanurate, tris(1-acryloxyethyl-3-methacryloxy-2-propyl-oxycarbonylamino-n-hexyl)isocyanurate, and tris(4-acryloxy-n-butyl)isocyanurate; commercially available oligoester acrylates; aromatic and aliphatic urethane acrylates; and bisphenol A-based epoxy acrylates. These compounds may be used alone or in combination. Among these, at least one of esters of (meth)acrylic acid and polyhydric alcohols, urethane acrylates, and bisphenol A-based epoxy acrylates is preferred.This allows the curable resin to be more reliably cured by applying energy, i.e., by irradiating it with energy rays. Also, the magnitude of the stress relaxation rate based on the test piece formed of the adhesive layer can be set relatively easily within the above range.

[0126] Furthermore, although the curable resin is not particularly limited, it is preferable that two or more curable resins with different weight-average molecular weights are mixed. By using such a curable resin, the degree of crosslinking of the resin due to energy ray irradiation can be easily controlled. Furthermore, as such a curable resin, for example, a mixture of a first curable resin and a second curable resin having a weight-average molecular weight larger than that of the first curable resin may be used.

[0127] When the curable resin is a mixture of a first curable resin and a second curable resin, the weight-average molecular weight of the first curable resin is preferably about 100 to 1,000, and more preferably about 200 to 500. The weight-average molecular weight of the second curable resin is preferably about 1,000 to 30,000, more preferably about 1,000 to 10,000, and even more preferably about 2,000 to 5,000. The number of functional groups in the first curable resin is preferably 1 to 5, and the number of functional groups in the second curable resin is preferably 6 or more. By satisfying this relationship, the above-mentioned effects can be more significantly exhibited.

[0128] The curable resin is preferably blended in an amount of 30 to 200 parts by weight, more preferably 50 to 140 parts by weight, per 100 parts by weight of the base resin, which allows both the curable resin and the base resin to reliably exhibit the functions that are exhibited by adding the curable resin and the base resin to the resin composition.

[0129] In addition, when a double bond-introduced acrylic resin is used as the acrylic resin described above, that is, when one having a carbon-carbon double bond in a side chain, in the main chain, or at the end of the main chain is used, the addition of this curable resin to the resin composition may be omitted. This is because, when the acrylic resin is a double bond-introduced acrylic resin, the adhesive layer is cured by irradiation with energy rays due to the function of the carbon-carbon double bond contained in the double bond-introduced acrylic resin, and as a result, the adhesive strength of the adhesive layer is reduced.

[0130] (3) Photopolymerization initiator Furthermore, the adhesive layer loses its adhesiveness to the semiconductor substrate 7 when irradiated with energy rays. When ultraviolet rays or the like are used as the energy rays, it is preferable that the resin composition constituting the adhesive layer contains a photopolymerization initiator to facilitate the initiation of polymerization of the curable resin.

[0131] Examples of the photopolymerization initiator include 2,2-dimethoxy-1,2-diphenylethan-1-one, 1-[4-(2-hydroxyethoxy)-phenyl]-2-hydroxy-2-methyl-1-propan-1-one, 2-hydroxy-1-{4-[4-(2-hydroxy-2-methyl-propionyl)-benzyl]phenyl}-2-methyl-propan-1-one, benzyl diphenyl sulfide, tetramethylthiuram monosulfide, 4-(2-hydroxyethoxy)phenyl(2-hydroxy-2-propyl) ketone, α-hydroxy-α,α'- Dimethylacetophenone, 2-methyl-2-hydroxypropiophenone, 1-hydroxycyclohexyl phenyl ketone, Michler's ketone, acetophenone, methoxyacetophenone, 2,2-dimethoxy-2-phenylacetophenone, 2,2-diethoxyacetophenone, 2-methyl-1-[4-(methylthio)-phenyl]-2-morpholinopropane-1, benzoin methyl ether, benzoin ethyl ether, benzoin propyl ether, benzoin isopropyl ether, benzoin isobutyl ether, benzyl, benzoin, Dibenzyl, α-hydroxycyclohexyl phenyl ketone, benzil dimethyl ketal, 2-hydroxymethylphenylpropane, 2-naphthalenesulfonyl chloride, 1-phenone-1,1-propanedione-2-(o-ethoxycarbonyl)oxime, benzophenone, benzoylbenzoic acid, 4,4'-dimethylaminobenzophenone, 4,4'-diethylaminobenzophenone, 4,4'-dichlorobenzophenone, 3,3'-dimethyl-4-methoxybenzophenone, o-acryloxybenzophenone, p-acryloxybenzophenone Benzophenone-4-carboxylic acid esters of acrylates such as benzophenone, o-methacryloxybenzophenone, p-methacryloxybenzophenone, p-(meth)acryloxyethoxybenzophenone, 1,4-butanediol mono(meth)acrylate, 1,2-ethanediol mono(meth)acrylate, 1,8-octanediol mono(meth)acrylate, thioxanthone, 2-chlorothioxanthone, 2-methylthioxanthone, 2,4-dimethylthioxanthone, isopropylthioxanthone, 2,4-dichlorothioxanthone, 2,Examples include 4-diethylthioxanthone, 2,4-diisopropylthioxanthone, azobisisobutyronitrile, β-chloroanthraquinone, camphorquinone, halogenated ketones, acylphosphinoxides, acylphosphonates, polyvinylbenzophenone, chlorothioxanthone, dodecylthioxanthone, dimethylthioxanthone, diethylthioxanthone, 2-ethylanthraquinone, t-butylanthraquinone, and 2,4,5-triarylimidazole dimers, and these can be used alone or in combination of two or more.

[0132] The photopolymerization initiator is preferably blended in an amount of 0.1 to 50 parts by weight, and more preferably 0.5 to 10 parts by weight, per 100 parts by weight of the base resin. By adjusting the blending amount of the photopolymerization initiator as described above, the photopolymerization initiator can reliably exhibit the function exhibited by adding the photopolymerization initiator to the resin composition.

[0133] (4) Crosslinking agent Furthermore, the resin composition constituting the adhesive layer may contain a crosslinking agent. By containing the crosslinking agent, the adhesive layer can be adjusted to have an appropriate hardness. Furthermore, the magnitude of the stress relaxation rate based on the test piece composed of the adhesive layer can be set relatively easily within the above range.

[0134] The crosslinking agent is not particularly limited, but examples thereof include isocyanate-based crosslinking agents, epoxy-based crosslinking agents, urea resin-based crosslinking agents, methylol-based crosslinking agents, chelate-based crosslinking agents, aziridine-based crosslinking agents, melamine-based crosslinking agents, polyvalent metal chelate-based crosslinking agents, acid anhydride-based crosslinking agents, polyamine-based crosslinking agents, and carboxyl group-containing polymer-based crosslinking agents. Among these, isocyanate-based crosslinking agents are preferred. By using an isocyanate-based crosslinking agent, the magnitude of the stress relaxation rate can be more easily set within the above range.

[0135] The isocyanate-based crosslinking agent is not particularly limited, but examples thereof include polyisocyanate compounds of polyvalent isocyanates, trimers of polyisocyanate compounds, trimers of isocyanate-terminated compounds obtained by reacting a polyisocyanate compound with a polyol compound, and blocked polyisocyanate compounds in which isocyanate-terminated urethane prepolymers are blocked with phenol, oximes, or the like.

[0136] Examples of polyisocyanates include 2,4-tolylene diisocyanate, 2,6-tolylene diisocyanate, 1,3-xylylene diisocyanate, 1,4-xylylene diisocyanate, diphenylmethane-4,4'-diisocyanate, diphenylmethane-2,4'-diisocyanate, 3-methyldiphenylmethane diisocyanate, hexamethylene diisocyanate, isophorone diisocyanate, dicyclohexylmethane-4,4'-diisocyanate, dicyclohexylmethane-2,4'-diisocyanate, 4,4'-diphenylether diisocyanate, 4,4'-[2,2-bis(4-phenoxyphenyl)propane]diisocyanate, and 2,2,4-trimethyl-hexamethylene diisocyanate. These may be used alone or in combination of two or more. Among these, at least one polyvalent isocyanate selected from the group consisting of 2,4-tolylene diisocyanate, diphenylmethane-4,4'-diisocyanate, and hexamethylene diisocyanate is preferred.

[0137] The crosslinking agent is preferably blended in an amount of 0.01 to 30 parts by weight, and more preferably 0.1 to 20 parts by weight, per 100 parts by weight of the base resin. By adjusting the blending amount of the crosslinking agent as described above, the crosslinking agent can reliably exhibit the function exhibited by adding the crosslinking agent to the resin composition.

[0138] (5) Plasticizers It is preferable that a plasticizer be included in the adhesive layer, i.e., the resin composition, because the plasticizer improves the flexibility of the adhesive layer 2, whose adhesive strength decreases when energy is applied, and as a result, the magnitude of the stress relaxation rate based on the test specimen made of the adhesive layer can be relatively easily set within the above range.

[0139] The plasticizer is not particularly limited, but examples thereof include phthalate ester plasticizers such as DOP (dioctyl phthalate), DBP (dibutyl phthalate), DIBP (diisobutyl phthalate), and DHP (diheptyl phthalate), aliphatic dibasic acid ester plasticizers such as DOA (di-2-ethylhexyl adipate), DIDA (diisodecyl adipate), and DOS (di-2-ethylhexyl sebacate), aromatic carboxylic acid ester plasticizers such as ethylene glycol benzoates, trimellitic acid ester plasticizers such as TOTM (trioctyl trimellitate), and adipate ester plasticizers, and these may be used alone or in combination of two or more.

[0140] The content of the plasticizer in the adhesive layer, i.e., the resin composition, is not particularly limited, but is preferably 0.1 to 5.0 parts by weight, and more preferably 0.5 to 2.0 parts by weight, per 100 parts by weight of the base resin. This ensures improved flexibility of the adhesive layer. Therefore, the magnitude of the stress relaxation rate based on the test piece composed of the adhesive layer can be set relatively easily within the above range.

[0141] (6) Conductive materials (antistatic agents) Furthermore, the resin composition constituting the adhesive layer preferably contains a conductive material, which functions as an antistatic agent and effectively suppresses or prevents static electricity from being generated on the semiconductor chip 20 during the pick-up step [8A].

[0142] The conductive material is not particularly limited as long as it has conductivity, but the same conductive materials as those described above as being contained in the base material can be used.

[0143] When a conductive material is contained in either the base material or the adhesive layer, it is preferable to contain the conductive material in the base material, which makes it possible to more accurately suppress or prevent the generation of static electricity on the semiconductor chip 20 without having to reliably attach the conductive material to the semiconductor chip 20.

[0144] (7) Other ingredients Furthermore, the resin composition constituting the adhesive layer may contain, in addition to the above-mentioned components (1) to (6), at least one of a tackifier, an antioxidant, an adhesion adjuster, a filler, a colorant, a flame retardant, a softener, an antioxidant, a plasticizer, a surfactant, etc.

[0145] Among these, the tackifier is not particularly limited, but examples thereof include rosin resins, terpene resins, coumarone resins, phenolic resins, aliphatic petroleum resins, aromatic petroleum resins, and aliphatic-aromatic copolymer petroleum resins, and one or more of these may be used in combination.

[0146] By appropriately selecting the types and contents of the components (1) to (7) contained in the adhesive layer, with components (1) and (2) being essential components, as described above, when the adhesive tape of the present invention is applied to the processing adhesive tape 100, the adhesive layer 2 can adhere to and support the semiconductor substrate 7 when dicing the semiconductor substrate 7 in the step [3A], and by applying energy to the adhesive layer 2 to harden the adhesive layer 2 in the step [4A], the semiconductor chips 20 obtained by dicing the semiconductor substrate 7 can be made to have adhesiveness to the extent that they can be picked up in the step [5A]. When the adhesive tape of the present invention is applied to the transfer adhesive tape 200, the adhesive layer 2 can adhere to and support the semiconductor chips 20 when transporting and storing the semiconductor chips 20 prior to the step [7A], and by applying energy to the adhesive layer 2 to harden the adhesive layer 2 in the step [7A], the semiconductor chips 20 can be made to have adhesiveness to the extent that they can be picked up in the step [8A]. The magnitude of the stress relaxation rate based on the test piece formed of the adhesive layer can be set within the range.

[0147] As described above, before applying energy to the adhesive layer, a test piece consisting of the adhesive layer and measuring 0.8 mm thick x 6 mm wide x 20 mm long is prepared, and this test piece is stretched in the longitudinal direction at 25°C with a chuck distance of 10 mm and a tensile speed of 10 mm / min until the stretching ratio reaches 30%.The adhesive layer having the above-mentioned configuration is then measured in the longitudinal direction at 25°C with a chuck distance of 10 mm and a stretching rate of 10 mm / min, and the stretched state is then held for 1 minute.The stress relaxation ratio measured is sufficient as long as it satisfies 30.0% or more and 65.0% or less, preferably 30.0% or more and 60.0% or less, and more preferably 35.0% or more and 58.0% or less.

[0148] In the present invention, the stress relaxation rate of the adhesive layer before application of energy is measured by conducting a tensile test on a test piece of the adhesive layer measuring 0.8 mm thick x 6 mm wide x 20 mm long in an atmosphere of 25°C with a chuck distance of 10 mm and a tensile speed of 10 mm / min, measuring the stress (S1) when the elongation rate in the longitudinal direction reaches 30%, and then measuring the stress (S2) after 1 minute while maintaining the elongation rate at 30%.Then, using the obtained stress (S1) and stress (S2), the stress relaxation rate is calculated according to the following formula (1).

[0149] Stress relaxation rate = (S1-S2) / S1×100 (%) … (1)

[0150] Furthermore, by setting the magnitude of the stress relaxation rate in the adhesive layer before application of energy within the above range, when the adhesive tape of the present invention is applied to the processing adhesive tape 100, it is possible to more accurately suppress or prevent the occurrence of chip shift, in which the semiconductor chip 20 deviates from its designed (assumed) position, during the expanding step of radially expanding the processing adhesive tape 100, which is carried out prior to the pick-up step of the semiconductor chip 20 in the step [5A], and when the adhesive tape of the present invention is applied to the transport adhesive tape 200, it is possible to more accurately suppress or prevent the occurrence of chip shift, in which the semiconductor chip 20 deviates from its designed (assumed) position, during the transport and storage of the semiconductor chip 20 prior to the pick-up step of the semiconductor chip 20 in the step [8A]. Therefore, the pick-up of the semiconductor chip 20 in the steps [5A] and [8A] can be carried out with excellent precision.

[0151] Furthermore, in this embodiment, the upper surface of the semiconductor substrate 7 is uneven due to the presence of the circuit. That is, the upper surface of the semiconductor substrate 7 is composed of an uneven surface. In this case, by setting the magnitude of the stress relaxation rate within the above range, when the semiconductor substrate 7 is laminated on the processing adhesive tape 100 in step [2A] with the upper surface of the semiconductor substrate 7 facing the adhesive layer 2, the adhesive layer 2, which has been made to conform to the unevenness, can be appropriately suppressed or prevented from returning to its original flat shape over time. In other words, by laminating the semiconductor substrate 7 on the processing adhesive tape 100 in step [2A] with the upper surface of the semiconductor substrate 7 facing the adhesive layer 2, the adhesive layer 2 can maintain excellent conformance to the unevenness of the upper surface (uneven surface) of the semiconductor substrate 7 for a long period of time. This allows the processing adhesive tape 100 to be held without shifting from the adhesive layer 2, i.e., the processing adhesive tape 100. Therefore, from this point of view as well, the semiconductor chip 20 can be picked up with excellent precision in the step [5A].

[0152] In step [2A], the degree of conformability of the adhesive layer 2 to the irregularities on the upper surface (uneven surface) of the semiconductor substrate 7 is preferably set as follows: That is, a silicon wafer having a plurality of protrusions (convex portions) on its surface, each 8 μm high, 50 μm wide, and 30 μm pitch, arranged in a grid pattern, is prepared. The silicon wafer is placed on a stage with the protrusions facing up. Then, with the stage heated to 25°C, the processing adhesive tape 100 is applied to the surface of the silicon wafer by pressing a roller having a diameter of 35 mm and a width of 400 mm against the surface at a pressure of 0.5 MPa. After leaving the tape for 1 minute, the conformability (%) of the adhesive layer 2 to the protrusions is preferably 70% or more, and more preferably 80% to 95%. When the conformability (%) is equal to or greater than the lower limit, it can be said that the adhesive layer 2 can conform to the irregularities on the upper surface (surface) of the semiconductor substrate 7 with excellent conformability over a long period of time. Therefore, the semiconductor chips 20 can be picked up with high accuracy in the step [5A]. If the tracking rate is below the lower limit, the semiconductor chips 20 may be misaligned, resulting in a decrease in the pickup rate of the semiconductor chips 20 in the step [5A]. Furthermore, when the semiconductor substrate 7 is singulated in the step [3A], cutting water may come into contact with the surfaces (uneven surfaces) of the semiconductor chips 20 obtained by singulation, which may result in contamination of the surfaces. If the tracking rate exceeds the upper limit, the semiconductor chips 20 may be firmly fixed to the adhesive layer 2, resulting in a decrease in the pickup rate of the semiconductor chips 20 in the step [5A].

[0153] Furthermore, the stress measured when the test piece before application of energy is stretched to a lengthwise extension rate of 30% and held for 1 minute, i.e., the stress (S2) after 1 minute while holding the extension rate at 30%, is preferably 3.0 kPa or more and 50.0 kPa or less, and more preferably 5.0 kPa or more and 20.0 kPa or less. In this way, in the adhesive layer 2 before application of energy, which has relatively excellent flexibility and in which the stress (S2) is set within the above range, by setting the stress relaxation rate within the above range, the pickup of the semiconductor chip 20 in the steps [5A] and [8A] can be performed with greater accuracy.

[0154] Furthermore, after applying energy to the adhesive layer, a test piece consisting of the adhesive layer measuring 0.8 mm thick x 6 mm wide x 20 mm long is prepared, and this test piece is stretched in the longitudinal direction at 25°C under conditions of a chuck distance of 10 mm and a tensile speed of 10 mm / min until the stretching ratio reaches 30%, and then this stretched state is held for 1 minute, and the stress relaxation ratio measured is preferably 50.0% or more and 85.0% or less, and more preferably 70.0% or more and 82.0% or less.

[0155] The stress relaxation rate in the adhesive layer after application of energy was measured using a test piece consisting of an adhesive layer measuring 0.8 mm thick x 6 mm wide x 20 mm long, with an ultraviolet irradiance of 55 W / cm. 2 , UV irradiation amount: 1000mj / cm 2 After applying energy by irradiating ultraviolet light under the conditions above, a tensile test is carried out on this test piece in an atmosphere of 25°C, with a chuck distance of 10 mm and a tensile speed of 10 mm / min, and the stress (S3) is measured when the elongation in the longitudinal direction reaches 30%, and then the stress (S4) is measured after 1 minute while maintaining the elongation at 30%.Then, using the obtained stress (S3) and stress (S4), the following formula (2) is used to calculate the stress.

[0156] Stress relaxation rate = (S3-S4) / S3×100 (%) … (2)

[0157] Furthermore, by setting the magnitude of the stress relaxation rate in the adhesive layer after application of energy within the above range, even when picking up the semiconductor chip 20 in the step [5A] after a long time has passed, it is possible to accurately suppress or prevent the conformance of the adhesive layer 2 to the unevenness of the upper surface (uneven surface) of the semiconductor substrate 7 from becoming unintentionally too high, i.e., the adhesive layer 2 from conforming to the unevenness more than necessary. Therefore, picking up the semiconductor chip 20 in the step [5A] can be performed with excellent precision.

[0158] Furthermore, the stress measured when the test piece after application of this energy is stretched to a lengthwise extension rate of 30% and held for 1 minute, i.e., the stress (S4) after 1 minute while holding the extension rate at 30%, is preferably 50.0 kPa or more and 800.0 kPa or less, and more preferably 100.0 kPa or more and 250.0 kPa or less. In this way, in the adhesive layer 2 after application of energy, which has relatively excellent rigidity and in which the stress (S4) is set within the above range, by setting the stress relaxation rate within the above range, the pickup of the semiconductor chip 20 in the step [5A] can be performed with greater accuracy.

[0159] Furthermore, the degree of pick-up of the semiconductor chip 20 as a component in steps [5A] and [8A] is, for example, when a silicon chip measuring 4 mm long x 4 mm wide x 200 μm thick is fixed to the adhesive tape of the present invention, stored at 25°C for 7 days, and then the silicon chip is raised 600 μm and picked up from the adhesive tape, the success rate of the silicon chip pick-up is preferably 95% or more, and more preferably 100%. This indicates that the semiconductor chip 20 is picked up with excellent accuracy. The success rate of the pick-up is calculated by picking up 50 silicon chips, counting the number of successfully picked-up silicon chips, and calculating the ratio of the number of successfully picked-up silicon chips.

[0160] The average thickness of the adhesive layer is not particularly limited, but is preferably 5 μm or more and 50 μm or less, and more preferably 10 μm or more and 30 μm or less. By setting the average thickness of the adhesive layer within this range, the adhesive layer can reliably exhibit the aforementioned function. That is, the effect obtained by setting the magnitude of the stress relaxation rate based on the test piece composed of the adhesive layer within the above range can be reliably exhibited.

[0161] The adhesive layer may be formed as a laminate (multilayer body) in which a plurality of layers made of different resin compositions are laminated.

[0162] In the pressure-sensitive adhesive tape of the present invention, which has a structure in which a pressure-sensitive adhesive layer is laminated on a substrate, when the pressure-sensitive adhesive tape of the present invention is viewed in plan view, bubbles formed at the interface between the substrate and the pressure-sensitive adhesive layer have an area of ​​100 μm 2 The number of the above is 15.0 pieces / mm 2 It is preferable that the number of particles is 0.01 particles / mm or less. 2 More than 7.0 pieces / mm 2 It is more preferable that the number is 0.1 or less per mm.2 More than 2.0 pieces / mm 2 It is more preferable that the area is 100 μm or less by controlling the number of bubbles formed at the interface between the substrate and the adhesive layer. 2 By setting the numbers of the above items as described above, it is possible to more accurately suppress or prevent adhesive residue from being left on the semiconductor chip 20 when the semiconductor chip 20 is picked up and the adhesive tapes 100, 200 are peeled off from the semiconductor chip 20 in steps [5A] and [8A].

[0163] The adhesive tape of the present invention can be applied to the manufacture of a flip-chip ball grid array (FCBGA) type semiconductor device 10 shown in FIG. 1 , as well as to the manufacture of memories and logic elements such as small outline packages (SOPs), small outline J-lead packages (SOJs), thin small outline packages (TSOPs), thin quad flat packages (TQFPs), tape carrier packages (TCPs), ball grid arrays (BGAs), chip size packages (CSPs), matrix array package ball grid arrays (MAPBGAs), and chip-stacked chip size packages, and to the manufacture of image sensors such as contact image sensors (CISs).

[0164] Furthermore, in the present embodiment, the semiconductor chip 20 obtained by cutting a semiconductor substrate 7 (semiconductor wafer) attached to the adhesive tape of the present invention in the thickness direction is picked up as a component, and then repositioned (transferred) to a different adhesive tape of the present invention for transportation or storage, and then the semiconductor chip 20 is picked up again. However, the present invention is not limited to such a case, and can also be applied to a case where an encapsulated semiconductor assembly obtained by cutting a semiconductor assembly in which multiple semiconductor elements are encapsulated by sealing portions in the thickness direction as a substrate is picked up as a component, or to a case where various substrates such as a glass substrate, a ceramic substrate, a resin material substrate, and a metal material substrate are used instead of the semiconductor substrate 7 (semiconductor wafer). Note that when the adhesive tape of the present invention is used to pick up a component obtained by cutting a semiconductor assembly as a substrate in the thickness direction, the semiconductor elements (semiconductor chips) included in the encapsulated semiconductor assembly have uneven surfaces due to the provision of circuits. By applying the adhesive tape of the present invention to the encapsulated semiconductor assembly so that the uneven surface is bonded to the adhesive layer of the adhesive tape of the present invention, the effects obtained by using the adhesive tape of the present invention can be more significantly exhibited.

[0165] Although the pressure-sensitive adhesive tape of the present invention has been described above, the present invention is not limited thereto.

[0166] For example, any component capable of exerting the same function may be added to each layer of the adhesive tape of the present invention, or the substrate may be composed of a single layer as described in the above embodiment, or may be composed of multiple layers, and for example, the substrate may be provided with an antistatic layer on the surface opposite to the adhesive layer of the above-mentioned substrate.

[0167] Furthermore, the configuration of each layer of the pressure-sensitive adhesive tape of the present invention can be replaced with any other layer that can exert the same function, or any other layer can be added. [Example]

[0168] Next, specific examples of the present invention will be described. However, the present invention is not limited to the descriptions in these examples.

[0169] 1. Raw material preparation First, the raw materials used in the production of the pressure-sensitive adhesive tapes of each Example and Comparative Example are shown below.

[0170] (Polyolefin resin 1) As polyolefin resin 1, low-density polyethylene (LDPE, manufactured by Sumitomo Chemical Co., Ltd., "Sumikasen F200-0", specific gravity: 0.92 g / cm 3 ) was prepared.

[0171] (Antistatic Agent 1) As antistatic agent 1, a polyether-based antistatic agent (manufactured by Sanyo Chemical Industries, Ltd., "Pelectron PVL") was prepared.

[0172] (Base resin 1-2) As base resins 1 and 2, acrylic copolymers were prepared by mixing at least two of butyl acrylate, butyl methacrylate, 2-ethylhexyl acrylate, acrylic acid, 2-hydroxyethyl acrylate, N,N-dimethylacrylamide, and vinyl acetate, and then solution polymerizing the mixture in a toluene solvent using a conventional method.

[0173] The glass transition points and weight average molecular weights of base resins (acrylic copolymers) 1 and 2 were as shown below.

[0174] Base resin 1 (glass transition temperature: -37°C, weight average molecular weight: 600,000) Base resin 2 (glass transition temperature: -45°C, weight average molecular weight: 500,000)

[0175] (curable resin 1) As the curable resin 1, dipentaerythritol hexaacrylate (manufactured by Daicel Allnex Corporation, product number: DPHA), which is an esterification product of (meth)acrylic acid and polyhydric alcohol, was prepared.

[0176] (Curable resin 2) As the curable resin 2, urethane acrylate (manufactured by Miwon Specialty Chemical Co., Ltd., product number: SC2152) was prepared.

[0177] (Curable resin 3) As the curable resin 3, bis-A type epoxy acrylate (manufactured by Nippon Kayaku Co., Ltd., product number: R-130) was prepared.

[0178] (Crosslinker 1) As a crosslinking agent 1, polyisocyanate (manufactured by Tosoh Corporation, product number: Coronate L) was prepared.

[0179] (Photopolymerization initiator 1) As a photopolymerization initiator 1, benzyl dimethyl ketal (manufactured by Tokyo Chemical Industry Co., Ltd.) was prepared.

[0180] (Plasticizer 1) As plasticizer 1, a polyester plasticizer (manufactured by DIC Corporation, product number: W-230H) was prepared.

[0181] 2. Preparation of Adhesive Tape [Example 1] A resin composition containing polyolefin resin 1 (80.0% by weight) and antistatic agent 1 (20.0% by weight) was extruded using an extruder to prepare a substrate 4 having a thickness of 140.0 μm.

[0182] Next, a liquid material containing a resin composition was prepared by blending base resin 1 (100.0 parts by weight), curable resin 1 (44.0 parts by weight), crosslinker 1 (9.0 parts by weight), and photopolymerization initiator 1 (6.0 parts by weight). This liquid material was bar-coated onto substrate 4 so that the thickness of adhesive layer 2 after drying would be 20.0 μm, and then dried at 80° C. for 1 minute to form adhesive layer 2 on the upper surface (one side) of substrate 4, thereby obtaining the adhesive tape of Example 1.

[0183] [Examples 2 to 4, Comparative Examples 1 to 3] The adhesive tapes of Examples 2 to 4 and Comparative Examples 1 to 3 were produced in the same manner as in Example 1, except that the constituent materials contained in the resin composition used to form the base material 4 and the constituent materials contained in the resin composition used to form the adhesive layer 2 were those shown in Table 1, and the content of each constituent material was changed as shown in Table 1 to form the base material 4 and adhesive layer 2 with the thickness shown in Table 1.

[0184] 3. Evaluation The resulting pressure-sensitive adhesive tapes of each of the Examples and Comparative Examples were evaluated by the following methods. 3-1. Tensile test of adhesive layer (before energy application) For each adhesive tape of each Example and Comparative Example, a test piece of the adhesive layer measuring 0.8 mm thick x 6 mm wide x 20 mm long was prepared. Before applying energy to the test piece, a tensile test was performed on the test piece using a tensile testing machine (manufactured by A&D Co., Ltd., "Tensilon RTC-1250") at a chuck distance of 10 mm and a pulling speed of 10 mm / min in an atmosphere of 25°C to measure the stress (S1) when the longitudinal stretch reached 30%. Thereafter, the stress (S2) was measured after 1 minute while maintaining the stretch at 30%.

[0185] Then, using the obtained stress (S1) and stress (S2), the stress relaxation rate of the test piece was calculated according to the following formula (1).

[0186] Stress relaxation rate = (S1-S2) / S1×100 (%) … (1)

[0187] 3-2. Tensile test of adhesive layer (after energy application) For each adhesive tape of each Example and Comparative Example, a test piece of the adhesive layer having a thickness of 0.8 mm, a width of 6 mm, and a length of 20 mm was prepared, and the test piece was subjected to ultraviolet irradiance of 55 W / cm. 2 , UV irradiation amount: 1000mj / cm 2 After applying energy by ultraviolet irradiation under the conditions above, a tensile test was performed on the test piece using a tensile testing machine (A&D Corporation, "Tensilon RTC-1250") at an atmosphere of 25°C, with a chuck distance of 10 mm and a tensile speed of 10 mm / min, to measure the stress (S3) when the elongation in the longitudinal direction reached 30%. Thereafter, the stress (S4) was measured after 1 minute while maintaining the elongation at 30%.

[0188] Then, using the obtained stress (S3) and stress (S4), the stress relaxation rate of the test piece was calculated according to the following formula (2).

[0189] Stress relaxation rate = (S3-S4) / S3×100 (%) … (2)

[0190] 3-3.Evaluation of conformity to uneven surfaces A silicon wafer (manufactured by SUMCO Corporation) was prepared, which had on its surface a plurality of protrusions (convex portions) with a height of 8 μm, a width of 50 μm, and a pitch of 30 μm, arranged in a grid pattern. The silicon wafer was placed on a stage with the protrusions facing up, and the adhesive tapes of each Example and Comparative Example were applied to the surface of the silicon wafer by pressing a roller with a diameter of 35 mm and a width of 400 mm at a pressure of 0.5 MPa with the stage heated to 25°C. The adhesive tape was then left to stand for 1 minute, after which the conformity (%) of the adhesive layer to the protrusions was determined and evaluated according to the following criteria. The conformity of the adhesive layer was calculated by dividing the depth of the recesses formed in the adhesive tape by the height of the protrusions.

[0191] (Evaluation of the adhesive layer's followability) The rate (%) of adhesion of the adhesive layer to the protrusions on the surface of the silicon wafer is ◎: 80% to 95% 〇: Between 70% and 80% △: 50% or more but less than 70% ×: Less than 50%

[0192] 3-4. Evaluation of adhesive residue on silicon chips <1> A silicon wafer (manufactured by SUMCO, 625 μm thick) made of silicon was prepared as a silicon substrate. Then, the adhesive tape of each example and comparative example was fixed to the silicon substrate with the adhesive layer facing the silicon substrate. Then, using a 100 μm thick blade, the silicon substrate was cut in the thickness direction to half the thickness of the base material 4 at a rotation speed of 30,000 rpm and a processing speed of 60 mm / s while supplying cutting water to the silicon substrate, thereby obtaining multiple silicon chips measuring 6 mm long x 6 mm wide.

[0193] <2> Next, this silicon chip was pushed up using a needle with the needle push-up amount set to 600 [μm], and then the silicon chip was picked up by suction with a vacuum collet.

[0194] The above process <1> ~ <2> By going through this process, picking up of 50 silicon chips by suction was repeatedly carried out for each adhesive tape of each Example and Comparative Example.

[0195] Then, for each silicon chip obtained from the adhesive tape of each Example and Comparative Example, the presence or absence of contamination due to adhesion of cutting water on the front (back) surface of the picked-up silicon chip was confirmed. This confirmation of the presence or absence of contamination was carried out on 50 silicon chips for each adhesive tape of each Example and Comparative Example, and they were evaluated according to the following criteria.

[0196] (Evaluation of adhesive layer adhesion rate) The number of silicon chips found to have surface contamination was ◎: 0 pieces 〇: More than 0 and less than 5 △: More than 5 and less than 10 ×: More than 10

[0197] 3-5. Evaluation of silicon chip pick-up properties <1> A silicon wafer (manufactured by SUMCO, 625 μm thick) made of silicon was prepared as a silicon substrate. Then, the adhesive tape of each example and comparative example was fixed to the ground surface of the silicon substrate, with the adhesive layer 2 facing the silicon substrate. Then, using a 100 μm thick blade, the silicon substrate was cut in the thickness direction until it reached the middle of the base material 4, resulting in multiple silicon chips measuring 6 mm long x 6 mm wide. The resulting chips were then stored in an atmosphere at 25°C for 7 days.

[0198] <2> Next, in an atmosphere of 25°C, the silicon chip was pushed up using a needle with the needle push-up amount set to 600 [μm], and then the silicon chip was picked up from the adhesive tape by suction with a vacuum collet.

[0199] The above process <1> ~ <2> By going through this process, picking up of 50 silicon chips by suction was repeatedly carried out for each adhesive tape of each Example and Comparative Example.

[0200] Then, for the adhesive tapes of each example and each comparative example, the number of silicon chips that were successfully picked up out of 50 silicon chips that were attempted to be picked up by suction was counted, and the ratio of the counted numbers of silicon chips was calculated to calculate the success rate of silicon chip pick-up, which was then evaluated according to the following criteria.

[0201] (Evaluation of adhesive layer adhesion rate) The success rate of picking up silicon chips for 50 silicon chips is ◎: 100% 〇: Less than 100% 95% or more △: Less than 95% 90% or more ×: Less than 90%

[0202] [Table 1]

[0203] As shown in Table 1, the adhesive tapes of each embodiment satisfied the stress relaxation rate of 30.0% or more and 65.0% or less before energy was applied to the adhesive layer, which effectively suppressed the occurrence of chip shift in the adhesive tape, and as a result, it was possible to pick up silicon chips with excellent accuracy.

[0204] In contrast, in the adhesive tapes of each comparative example, the stress relaxation rate before applying energy to the adhesive layer could not be set within the range of 30.0% or more and 65.0% or less, which caused chip shift in the adhesive tape, and as a result, it was not possible to pick up the silicon chip with excellent accuracy. [Explanation of symbols]

[0205] 2 Adhesive layer 4 Base material 7. Semiconductor substrate 9 Wafer ring 10 Semiconductor devices 17 Mold section 20 Semiconductor chips 21 terminals 30 Interposer 41 terminals 70 Bump 80 Sealing layer 81 Connection 85 Solder bumps 100 Adhesive tape for semiconductor substrate processing (adhesive tape for processing) 121 Outer periphery 122 Center 200 Adhesive tape for transporting semiconductor elements (adhesive tape for transport) 202 Adhesive layer 204 Base material

Claims

1. An adhesive tape comprising a substrate and an adhesive layer laminated on one surface of the substrate, the adhesive tape being used for temporarily fixing at least one of a substrate and a component, the adhesive layer contains a base resin having adhesiveness and a curable resin that is cured by the application of energy, and the adhesive strength of the adhesive layer is reduced by applying energy to the adhesive layer to cure the adhesive layer; a pressure-sensitive adhesive tape, characterized in that a test piece made of the pressure-sensitive adhesive layer and measuring 0.8 mm thick x 6 mm wide x 20 mm long is prepared, and before the energy is applied, the test piece is stretched in the longitudinal direction under conditions of a chuck distance of 10 mm and a tensile speed of 10 mm / min at 25°C until the stretching ratio reaches 30%, and then the stretched state is maintained for 1 minute, and the measured stress relaxation ratio is 38.1% to 57.6%.

2. 2. The pressure-sensitive adhesive tape according to claim 1, wherein the stress measured on the test piece when the state is maintained for 1 minute is 3.0 kPa or more and 50.0 kPa or less.

3. 3. The pressure-sensitive adhesive tape according to claim 1, wherein the stress relaxation rate measured after the energy is applied to the test piece is 50.0% or more and 85.0% or less.

4. 4. The pressure-sensitive adhesive tape according to claim 1, wherein the stress measured when the test piece is maintained in the state for 1 minute after the energy is applied to the test piece is 50.0 kPa or more and 800.0 kPa or less.

5. The adhesive tape according to claim 1 , wherein the adhesive layer has a thickness of 5 μm or more and 30 μm or less.

6. 6. The pressure-sensitive adhesive tape according to claim 1, wherein the curable resin is at least one of an ester of (meth)acrylic acid and a polyhydric alcohol, a urethane acrylate, and a bisphenol A-based epoxy acrylate.

7. 7. The adhesive tape according to claim 1, wherein the base resin is an acrylic resin.

8. The adhesive tape according to claim 1 , wherein the adhesive layer further contains a crosslinking agent, and the crosslinking agent is an isocyanate-based crosslinking agent.

9. 9. The adhesive tape according to claim 1, wherein the adhesive tape is used when a substrate is fixed on the adhesive layer, the adhesive layer is cut from the substrate to reach partway in the thickness direction of the base material to separate the substrate into individual components, and the adhesive tape is then stretched in the planar direction while the components are pushed up from the base material side and pulled out from the opposite side of the base material, thereby detaching the components from the adhesive layer.

10. 10. The adhesive tape according to claim 1, wherein the adhesive tape is used to detach a component obtained by cutting a substrate in the thickness direction from the adhesive layer by bonding the component to a surface of the adhesive layer opposite the base material, and then to detach the component from the adhesive layer after transporting or storing the component in a state where the component is temporarily fixed.

11. The adhesive tape according to any one of claims 1 to 7, which satisfies the following requirement A: Requirement A: A silicon chip measuring 4 mm long x 4 mm wide x 200 μm thick is fixed to the adhesive tape, and then stored at 25°C for 7 days. When the silicon chip is then picked up from the adhesive tape with the silicon chip raised 600 μm, the success rate of picking up the silicon chip must be 95% or higher.

Citation Information

Patent Citations

  • Adhesive sheet for sticking wafer

    JP1993235150A

  • Adhesive sheet for processing semiconductor wafer and utilization method therefor

    JP2009245989A

  • Dicing tape, dicing die-bonding film, and method of manufacturing semiconductor device

    JP2019016633A

  • Adhesive sheet

    WO2018181510A1

  • Method for delaminating adhesive sheet

    WO2018181511A1