Semiconductor device manufacturing method

Abstract

To provide a manufacturing method of a semiconductor device that can improve the adhesion between a conductive plate and a resin and prevent peeling.SOLUTION: A manufacturing method of a semiconductor device includes a first step of forming a plurality of holes 9 on the front surface of a conductive plate 3 by irradiating the conductive plate 3 with laser light, a second step of mounting a semiconductor element 1 on the front surface of the conductive plate 3, and a third step of encapsulating the semiconductor element 1 and at least the front surface of the conductive plate 3 inside a resin 7. In the first step, laser light is focused such that a focal point is inside the conductive plate 3.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] The present invention relates to a method for manufacturing a semiconductor device. [Background technology]

[0002] In recent years, power semiconductor modules, primarily IGBTs (Insulated Gate Bipolar Transistors), have become widely used in power conversion equipment. A power semiconductor module is a power semiconductor device that incorporates one or more power semiconductor chips to form part or all of a conversion connection, and has a structure in which the power semiconductor chips are electrically insulated from the base plate or cooling surface.

[0003] Fig. 12 is a cross-sectional view showing the configuration of a conventional power semiconductor module. As shown in Fig. 12, power semiconductor module 150 includes power semiconductor chip 101, insulating substrate 102, conductive plate 103, heat sink 104, metal terminal 105, wire 106, and molding resin 107 that covers (molds) these.

[0004] The power semiconductor chip 101 is a power semiconductor chip such as an IGBT or a diode, and is bonded to a conductive plate 103 with a bonding material 108 such as solder. A laminated substrate is formed by providing a conductive plate 103 made of copper or the like on the front surface of an insulating substrate 102 such as a ceramic substrate, and a heat sink 104 made of copper or the like on the back surface. The laminated substrate is bonded to a cooler. Wires 106 electrically connect the power semiconductor chip 101 to metal terminals 105 that output signals to the outside. Although not shown, a single semiconductor device may have a plurality of these components mounted thereon. Epoxy resin or the like is generally used for the molded resin 107.

[0005] In the molded resin type power semiconductor module 150 of FIG. 12, the adhesion between the metal terminals 105 and the conductive plate 103 and the epoxy resin that is the molded resin 107 is not necessarily good, and therefore, peeling may occur due to shrinkage of the epoxy resin (molded resin 107) immediately after molding.

[0006] Even if peeling due to shrinkage of mold resin 107 is avoided immediately after molding, peeling may occur due to the difference in thermal expansion coefficient between mold resin 107 and the copper material if there is a temperature change in the environment in which power semiconductor chip 101 is used. In power semiconductor module 150 with a large current capacity, the width of the lead frame, which is metal terminal 105, becomes wider, and peeling becomes even more noticeable.

[0007] To prevent this peeling, a conventional power semiconductor module 150 is provided with an anchor layer 120 made of stripe-shaped recesses formed in the conductive plate 103 by laser light irradiation (see, for example, Patent Document 1 below). FIG. 13 is a plan view showing the arrangement of the recesses in the anchor layer of a conventional power semiconductor module. FIG. 14 is a cross-sectional view showing the configuration of the recesses in the anchor layer of a conventional power semiconductor module. FIG. 14 is a cross-section taken along the X-X' portion of FIG. 13. As shown in FIGS. 13 and 14, four stripe-shaped (linear) recesses 121 are arranged in the anchor layer 120 so as to surround the power semiconductor chip 101. The side walls of the recesses 121 formed by laser light irradiation are uneven, which increases the frictional force between the mold resin 107 and the recesses 121, thereby enhancing the anchor effect and preventing peeling. [Prior art documents] [Patent documents]

[0008] [Patent Document 1] International Publication No. 2014 / 098004 Summary of the Invention [Problem to be solved by the invention]

[0009] 13 and 14, however, the adhesion may not be sufficient. Furthermore, the anchor layer 120 is provided only around the power semiconductor chip 101 of the conductive plate 103, and in the conductive plate 103 without the anchor layer 120, the adhesion with the mold resin 107 is not improved, and there is a risk that the conductive plate 103 and the mold resin 107 may peel off at this location.

[0010] SUMMARY OF THE INVENTION In order to solve the above-mentioned problems of the prior art, it is an object of the present invention to provide a method for manufacturing a semiconductor device that can improve the adhesion between the conductive plate and the resin to prevent peeling. [Means for solving the problem]

[0011] In order to solve the above-mentioned problems and achieve the object of the present invention, a method for manufacturing a semiconductor device according to the present invention has the following features: First, a first step is performed in which a plurality of holes are formed in the front surface of a conductive plate by irradiating the conductive plate with laser light; Next, a second step is performed in which a semiconductor element is mounted on the front surface of the conductive plate; Next, a third step is performed in which the semiconductor element and at least the front surface of the conductive plate are encapsulated in resin. Each step is carried out in this order. In the first step, the laser light is irradiated so that the focal point is located inside the conductive plate, at a depth of 300 μm to 900 μm from the front surface of the conductive plate.

[0013] In order to solve the above-mentioned problems and achieve the object of the present invention, a method for manufacturing a semiconductor device according to the present invention has the following features: First, a first step is performed in which a plurality of holes are formed in the front surface of a conductive plate by irradiating the conductive plate with laser light; Next, a second step is performed in which a semiconductor element is mounted on the front surface of the conductive plate; Next, a third step is performed in which the semiconductor element and at least the front surface of the conductive plate are encapsulated in resin. Each step is carried out in this order. In the first step, the laser light is irradiated at an angle of 7° to 23° from a line perpendicular to the front surface of the conductive plate, and the holes are inclined in the direction in which the resin is injected.

[0014] According to the above-described invention, the conductive plate has a plurality of dot-shaped holes formed by irradiating the conductive plate with laser light. This improves the adhesion between the conductive plate and the molding resin. This prevents the conductive plate from peeling off from the molding resin, improving the reliability of the power semiconductor module. [Effects of the Invention]

[0015] The method for manufacturing a semiconductor device according to the present invention has the effect of increasing the adhesion between the conductive plate and the resin, thereby preventing peeling. [Brief explanation of the drawings]

[0016] [Figure 1] 1 is a cross-sectional view showing a configuration of a power semiconductor module according to an embodiment; [Figure 2] 4 is a cross-sectional view showing dot-shaped holes in a conductive plate of the power semiconductor module according to the embodiment; FIG. [Figure 3A] 1 is a cross-sectional view (part 1) illustrating the shape of dot-shaped holes in a conductive plate of a power semiconductor module according to an embodiment. [Figure 3B] 10 is a cross-sectional view (part 2) illustrating the shape of dot-shaped holes in a conductive plate of a power semiconductor module according to an embodiment. FIG. [Figure 3C] 10 is a cross-sectional view (part 3) illustrating the shape of dot-shaped holes in a conductive plate of a power semiconductor module according to an embodiment. FIG. [Figure 3D] 1 is a photograph (part 1) showing the shape of dot-shaped holes in a conductive plate of a power semiconductor module according to an embodiment. [Figure 3E] 10 is a photograph (part 2) showing the shape of dot-shaped holes in a conductive plate of a power semiconductor module according to an embodiment. [Figure 4A] 1 is a cross-sectional view (part 1) illustrating the shape of openings of dot-shaped holes in a conductive plate of a power semiconductor module according to an embodiment. [Figure 4B]10 is a cross-sectional view (part 2) illustrating the shape of openings of dot-shaped holes in a conductive plate of a power semiconductor module according to an embodiment. FIG. [Figure 5] 10 is a cross-sectional view showing the dimensions of the bulging shape of the dot-shaped holes of the conductive plate of the power semiconductor module according to the embodiment. FIG. [Figure 6] 10 is a table showing dimensions and adhesion of the bulging shape of the dot-shaped holes of the conductive plate of the power semiconductor module according to the embodiment. [Figure 7] 4 is a cross-sectional view showing dimensions of a V-shaped dot-shaped hole in a conductive plate of the power semiconductor module according to the embodiment. FIG. [Figure 8] 10 is a table showing dimensions and adhesion of V-shaped dot-shaped holes in a conductive plate of a power semiconductor module according to an embodiment. [Figure 9] 4 is a cross-sectional view showing the inclination angle of dot-shaped holes in a conductive plate of the power semiconductor module according to the embodiment; FIG. [Figure 10] 4 is a cross-sectional view showing protrusions of dot-shaped holes in a conductive plate of the power semiconductor module according to the embodiment; FIG. [Figure 11] FIG. 1 is a perspective view showing a pudding test of a power semiconductor module according to an embodiment. [Figure 12] FIG. 1 is a cross-sectional view showing the configuration of a conventional power semiconductor module. [Figure 13] FIG. 10 is a plan view showing the arrangement of recesses in the anchor layer of a conventional power semiconductor module. [Figure 14] FIG. 10 is a cross-sectional view showing the configuration of a recess in an anchor layer of a conventional power semiconductor module. DETAILED DESCRIPTION OF THE INVENTION

[0017] A preferred embodiment of the method for manufacturing a semiconductor device according to the present invention will be described in detail below with reference to the accompanying drawings, in which: Fig. 1 is a cross-sectional view showing the configuration of a power semiconductor module according to the embodiment;

[0018] (Embodiment) As shown in Fig. 1, in a power semiconductor module 50, a conductive plate 3 made of copper or the like is disposed on one surface, or the front surface, of an insulating substrate 2, and a heat sink 4 made of copper or the like is disposed on the other surface, or the back surface, to form a laminated substrate. A plurality of power semiconductor chips 1 are mounted on the front surface of the conductive plate 3 of the laminated substrate via a bonding material 8 such as solder to form a laminated assembly. Metal terminals 5 that extract signals to the outside are bonded to the conductive plate 3 with the bonding material 8. Furthermore, wires 6 that electrically connect the power semiconductor chip 1 and the metal terminals 5 are provided on the front surface of the power semiconductor chip 1. At least the surfaces of these components are covered with a molded resin 7.

[0019] The power semiconductor chip (semiconductor element) 1 is made of materials such as silicon (Si), silicon carbide (SiC), and gallium nitride (GaN). The power semiconductor chip 1 includes switching elements such as an IGBT and a power MOSFET (Metal Oxide Semiconductor Field Effect Transistor). Such a power semiconductor chip 1 has, for example, a drain electrode (or collector electrode) as a main electrode on the back surface, and a gate electrode and a source electrode (or emitter electrode) as main electrodes on the front surface.

[0020] The power semiconductor chip 1 also includes diodes such as SBD (Schottky Barrier Diode) and FWD (Free Wheeling Diode) as necessary. Such a power semiconductor chip 1 has a cathode electrode as a main electrode on the back surface and an anode electrode as a main electrode on the front surface. The electrode on the back surface of the power semiconductor chip 1 is bonded to the front surface of a predetermined conductive plate 3 with a bonding material 8.

[0021] The laminated substrate includes an insulating substrate 2, a heat sink 4 formed on the back surface of the insulating substrate 2, and a conductive plate 3 formed on the front surface of the insulating substrate 2. The conductive plate 3 is processed into a predetermined shape (pattern) by etching or the like to connect the power semiconductor chip 1, metal terminals 5, etc. The insulating substrate 2 is made of a highly thermally conductive ceramic such as aluminum oxide, aluminum nitride, or silicon nitride. The thickness of the insulating substrate 2 is preferably 200 μm to 700 μm from the viewpoint of dielectric strength. The heat sink 4 is made of a metal with excellent thermal conductivity, such as copper (Cu), aluminum (Al), iron (Fe), silver (Ag), or an alloy containing at least one of these. The conductive plate 3 is made of a metal with excellent conductivity, such as copper, aluminum, or an alloy containing at least one of these, and has a thickness of, for example, 400 μm to 1000 μm. If the conductive plate 3 is too thin, it will be difficult to form dot-shaped holes by laser processing, as described below. The surface of these metals may be coated with a nickel (Ni) plating film or an electroless nickel (Ni-P (phosphorus)) plating film. Plating reduces oxidation of copper and prevents a decrease in adhesion between the conductive plate 3 and the molded resin 7.

[0022] Examples of laminated substrates having such a configuration include DCB (Direct Copper Bonding) substrates and AMB (Active Metal Blazed) substrates. The laminated substrate can conduct heat generated in the power semiconductor chip 1 to the outside of the semiconductor device via the conductive plate 3, insulating substrate 2, and heat sink 4. The laminated substrate may also be a metal-based substrate. The metal-based substrate is configured by stacking an insulating layer made of resin on a heat sink 4 made of a metal such as aluminum or copper, and then stacking the conductive plate 3 on top of that. The conductive plate 3 has a plurality of dot-shaped holes formed on its surface by laser light to improve adhesion with the molded resin 7. The conductive plate 3 will be described in detail later.

[0023] The conductive plate 3 is sealed with molded resin 7. Silicone resin or the like may be used as a sealing material if a case is provided. However, when molded resin 7 functions as a housing, thermosetting resin, epoxy resin, phenolic resin, polyimide resin, polyamide resin, polyamideimide resin, or maleimide resin may be used. It may also contain an adhesion promoter. Furthermore, molded resin 7 may contain inorganic fillers, such as microfillers or nanofillers made of inorganic particles such as silica, alumina, boron nitride, or aluminum nitride, to increase the linear expansion coefficient or provide thermal conductivity. Thermal stress caused by power cycle tests or heat cycle tests may reduce the adhesion between molded resin 7 and conductive plate 3. This mainly occurs when the material of molded resin 7 is highly rigid. In particular, molded resins containing fillers have a Young's modulus of 3000 N / mm. 2 ~30,000N / mm 2 and the thermal expansion coefficient is 3000 x 10 -6 / K~25000×10 -6 / K. Therefore, by forming the molding resin 7 on the conductive plate having dot-shaped holes formed by the laser beam of the present invention, it is possible to particularly improve the adhesion. Preferably, the Young's modulus is 5000 N / mm 2 ~20000N / mm 2 and the thermal expansion coefficient is 3000 x 10 -6 / K~25000×10 -6 This is effective for the molding resin 7 of / K.

[0024] Furthermore, if the filler is too large, it will not be able to enter the dot-shaped holes, resulting in reduced adhesion, so it is preferable that more fillers with diameters smaller than the diameter of the dot-shaped holes are included than fillers with diameters larger than the diameter of the dot-shaped holes. Specifically, the average filler diameter is preferably 20 μm to 60 μm. It is more preferable that 10% to 20% of fillers have diameters of 5 μm to 10 μm. The shape of the filler may be either spherical filler or crushed filler, and it is most preferable that 50% to 70% of fillers have an average particle size of about 10 μm and a diameter of 2.5 μm to 10 μm.

[0025] The bonding material 8 is used to bond components of the power semiconductor module 50 together and is made of, for example, solder. Examples of suitable solder include tin-silver (Sn-Ag), tin-antimony (Sn-Sb), and tin-copper (Sn-Cu) solders. While the power semiconductor chip 1 and the conductive plate 3 are electrically connected using wires 6 in FIG. 1 , the power semiconductor chip 1 and the conductive plate 3 can also be electrically connected using a lead frame. In this case, to improve adhesion between the lead frame and the molded resin 7, the lead frame may also be provided with a plurality of laser-formed dot-shaped holes, similar to the conductive plate 3. Furthermore, a printed circuit board other than the lead frame may also be provided with a plurality of laser-formed dot-shaped holes. In this case, it is preferable to provide a conductive plate of a predetermined thickness.

[0026] One end of a wire 6 is bonded to the top surface of the power semiconductor chip 1 (the surface opposite to the surface in contact with the conductive plate 3) as wiring for electrical connection. The other end of the wire 6 is bonded to the metal terminal 5 (or the conductive plate 3 to which the metal terminal 5 is fixed) or to another power semiconductor chip 1. In FIG. 1, the power semiconductor chip 1 and the conductive plate 3 are connected using the wire 6, but they may also be connected using a lead frame.

[0027] The power semiconductor module of the embodiment is manufactured as follows. In the manufacturing method, first, a laminated substrate is prepared, in which a conductive plate 3 is provided on the front surface of an insulating substrate 2 and a heat sink 4 is provided on the back surface. Next, a laser beam is irradiated onto the front surface of the conductive plate 3 to form a plurality of dot-shaped holes. The control parameters of the laser and the laser beam at this time will be described later.

[0028] Next, the power semiconductor chip 1 is mounted on the front surface of the conductive plate 3 provided on the laminated substrate. Specifically, the bonding material 8 and the power semiconductor chip 1 are stacked and bonded on the conductive plate 3, and the bonding material 8 and the metal terminal 5 are stacked and bonded on the conductive plate 3, thereby assembling a laminated assembly consisting of the power semiconductor chip 1, the laminated substrate, and the heat sink 4. The bonding material 8 may be a solder material or a bonding material using fine metal particles. The solder material that melts to form the solder bonding layer may be a solder material containing tin (Sn) as the main component and silver (Ag) and / or antimony (Sb) and / or copper (Cu). In addition to these components, it is preferable to use a solder material that contains one or more components selected from nickel (Ni), germanium (Ge), silicon (Si), vanadium (V), phosphorus (P), bismuth (Bi), gold (Au), lead (Pb), aluminum (Al), and carbon (C). Solder materials known as lead-free solders, which contain 500 ppm or less of Pb and have Sn as the main component, come in a variety of compositions, including binary and ternary eutectic materials such as Sn-Ag, Sn-Ag-Cu, Sn-Sb, and Sn-Sb-Ag.Solder materials can be used as sheet-shaped preform materials (sheet solder), or in powder form and mixed with flux to form cream solder.

[0029] When a solder material is used as the bonding material 8, it is preferable that dot-shaped holes are not formed by the laser in the area (bonding region) of the conductive plate 3 where the power semiconductor chip 1 is bonded. The solder material does not have good wettability in the area of ​​the conductive plate 3 where the holes formed by the laser are arranged. This causes voids to form in the bonding area, reducing the bonding strength and increasing the thermal resistance. Therefore, it is preferable that the dot-shaped holes are formed by the laser in an area other than the bonding area.

[0030] Next, the laminate of the power semiconductor chip 1, the metal terminal 5, the conductive plate 3, and the bonding material 8 is heated to melt the bonding material 8 and electrically connect the power semiconductor chip 1, the metal terminal 5, and the conductive plate 3. Next, the power semiconductor chip 1 and the metal terminal 5 are electrically connected by the wire 6.

[0031] Next, a power semiconductor circuit component such as a laminated substrate on which the power semiconductor chip 1 is mounted is placed in a resin molding die, and a molding resin 7 made of a hard resin such as epoxy is filled in. The molding resin 7 may be formed by transfer molding or injection molding. This completes the power semiconductor module 50 according to the embodiment shown in FIG. 1. Alternatively, a case may be placed on the cooler, and a power semiconductor circuit component such as a laminated substrate on which the power semiconductor chip 1 is mounted is placed inside the case, and the case may be filled with a sealing material. In this case, the cooler and the sealing material are in contact with each other. Therefore, dot-shaped holes may be formed by the laser of the present invention on the surface of the cooler that is in contact with the sealing material. The cooler includes a metal cooling plate.

[0032] The conductive plate 3 will be described in detail below. FIG. 2 is a cross-sectional view showing dot-shaped holes in a conductive plate of a power semiconductor module according to an embodiment. As shown in FIG. 2, the conductive plate 3 according to the embodiment has a plurality of dot-shaped holes 9 provided around the area where the power semiconductor chip 1 is bonded. The dot-shaped holes 9 have a substantially circular or elliptical planar shape. The pitch p of the dot-shaped holes 9 is preferably 150 μm to 500 μm. This will be described in detail later. The pitch p is the distance between the center of a dot-shaped hole 9 and the center of an adjacent dot-shaped hole 9.

[0033] A preferred pitch p of the dot-shaped holes 9 will be described below. A preferred pitch p is 100 μm to 1000 μm, more preferably 150 μm to 500 μm. Alternatively, if the diameter of the dot-shaped holes 9 is D, the pitch p is D+20 μm to D+1000 μm, more preferably D+50 μm to D+500 μm. If the pitch p is too narrow, the walls between the holes 9 will be thin, resulting in insufficient strength and reduced adhesion, while if the pitch p is too wide, the anchor effect will not be sufficient. Note that D varies depending on the shape of the holes 9, but in the case of the shapes shown in FIGS. 3A and 3C described below, D is the widest diameter W.

[0034] Although holes can be formed in the conductive plate 3 by etching or pressing, the holes of the present invention cannot be formed by these methods. Therefore, in this embodiment, the dot-shaped holes 9 are formed by irradiating laser light. The laser is a type of solid-state laser, and it is preferable to use a fiber laser, in which the light-amplifying medium and resonator are made of fiber. Fiber lasers have a much smaller focal diameter than YAG (Yttrium Aluminum Garnet) lasers or CO2 (carbon dioxide) lasers, making it possible to create thin holes by applying heat to copper or aluminum with a fine, pinpoint impact, melting the material. The laser is irradiated intermittently as a pulse wave. The dot-shaped holes refer to holes whose planar shape is approximately circular or elliptical, and which are spaced apart rather than continuous.

[0035] For example, a single-mode fiber laser FEC1000S manufactured by Furukawa Electric Co., Ltd. can be used as the fiber laser. In order to form the dot-shaped holes 9 into a predetermined shape, the fiber laser is set to have an oscillation wavelength of 1.070 μm, a power of 800 W to 1200 W, an irradiation time of 0.005 seconds to 0.04 seconds, an energy of 4 J to 40 J, a spot diameter of 30 μm to 60 μm, and an energy density of 0.0014 J / μm. 2 ~0.014J / μm 2 The control parameters are preferably set as follows: The fiber laser has an oscillation wavelength of 1.070 μm, a power of 900 W to 1000 W, an irradiation time of 0.008 seconds to 0.02 seconds, an energy of 7.2 J to 20 J, a spot diameter of 45 μm to 55 μm, and an energy density of 0.003 J / μm. 2 ~0.013J / μm 2 It is more preferable to use the following control parameters.

[0036] It is preferable that one hole be formed with one pulse. Although the same location may be irradiated with multiple pulse waves, this is because molten material may accumulate in the hole or the hole shape may vary. While parameters for controlling the hole shape include oscillation wavelength, power, irradiation time, energy, and spot diameter, the most effective parameter for shape control is the energy density, which is the laser energy per unit area. If the energy density is lower than the above range, the molten material may form raised areas around the hole opening, and the hole depth may not be uniform. Furthermore, if the energy density is too high, melting and evaporation may become unstable, resulting in greater variation in the hole shape.

[0037] Metals such as copper, aluminum, or alloys containing at least one of these are also preferred as processing materials for forming hole shapes. With specific laser control parameters, it is easy to form a specific shape with little variation in shape. Furthermore, nickel (Ni) plating films or electroless nickel (Ni-P (phosphorus)) plating films may be formed on the surfaces of these metals (base materials). An oxide film forms on the surface of the metal, but the thickness and quality of the film vary depending on the environment. On the other hand, forming a plating film with a specific thickness makes it difficult for an oxide film to form, making it more preferable for achieving a uniform hole shape. To form holes with a uniform shape, the thickness of the plating film is preferably 1 μm to 15 μm. However, if the plating film is too thick, the hole shape may vary significantly. Therefore, to achieve a more uniform shape, a thickness of 1.5 μm to 4 μm is preferred. Because the base material and plating film have different melting points, if the plating film is too thick, the hole shape will vary significantly.

[0038] Furthermore, dot-shaped holes 9 are formed by irradiating the same location with a laser beam tilted by 7° to 23°, and irradiating the same location once or twice, preferably once. The laser beam is irradiated at an angle because if the laser beam is irradiated perpendicular to the conductive plate 3 without tilting it, the holes formed would be too narrow for the molded resin 7 to enter the holes. Even if the molded resin 7 does enter the holes, the molded resin 7 itself inside the holes would be small and thin, and would not have sufficient strength, especially when subjected to shearing force.

[0039] In this case, the laser beam may be focused in any of the following ways: inner focus (underfocus), where the focal point is inside the conductive plate 3; outer focus (overfocus), where the focal point is above the surface of the conductive plate 3; and just focus, where the focal point is on the surface of the conductive plate 3; however, inner focus is most preferable. In the case of inner focus, the focal point is preferably located at a depth of approximately 300 μm to 900 μm from the surface of the conductive plate 3, and more preferably 500 μm to 800 μm. In this case, the spot diameter of the laser beam on the surface of the conductive plate 3 is 30 μm to 60 μm as described above. Using inner focus for focusing reduces variation in the shape of the dot-shaped holes 9. Furthermore, shifting the focal point from the surface of the conductive plate 3 slightly worsens the energy convergence, making it more likely that jagged edges will form on the side surfaces of the dot-shaped holes 9, thereby improving adhesion between the conductive plate 3 and the mold resin 7 (see FIG. 10).

[0040] Furthermore, it is preferable that the laser light has a pulse frequency (pulse interval) of 1000 Hz and the feed speed of the conductive plate 3 is about 100 mm / s to form the dot-shaped holes 9. Alternatively, the pulse frequency (pulse interval) may be 500 Hz and the feed speed of the conductive plate 3 may be about 50 mm / s. The pitch of the dot-shaped holes 9 is determined by these parameters, and as shown in FIG. 2, the dot-shaped holes 9 are regularly formed in the vertical and horizontal directions at a pitch p of about 100 μm.

[0041] By providing dot-shaped holes 9 on the surface of the conductive plate 3, the contact area between the mold resin 7 and the conductive plate 3 is increased, and the mold resin 7 in the holes 9 acts as an anchor, improving adhesion between the mold resin 7 and the conductive plate 3. Furthermore, since the holes 9 are provided so as to surround the periphery of the power semiconductor chip 1, the solder used as the bonding material 9 can be prevented from spreading. Furthermore, because solder does not adhere well to mold resin 7, such as epoxy resin, it is preferable that the solder be present only at the joint between the power semiconductor chip 1 and the conductive plate 3, minimizing the area where the solder comes into contact with the mold resin 7. Specifically, the area where multiple dot-shaped holes are provided has poor solder wettability, making it difficult for the solder to wet and spread beyond the dot-shaped hole areas other than the joint area. This minimizes the contact area between the solder and the mold resin 7. This prevents peeling between the conductive plate 3 and the mold resin 7, improving the reliability of the power semiconductor module.

[0042] Next, preferred cross-sectional shapes of the dot-shaped holes 9 will be described. FIGS. 3A to 3C are cross-sectional views showing the shapes of the dot-shaped holes in the conductive plate of the power semiconductor module according to the embodiment. FIGS. 3D and 3E are photographs showing the shapes of the dot-shaped holes in the conductive plate of the power semiconductor module according to the embodiment. FIG. 3D is a photograph of the shape of FIG. 3A, and FIG. 3E is a photograph of the shape of FIG. 3B.

[0043] 3A and 3C show a bulging shape, i.e., a shape (cross-sectional shape) in which the width of the interior of the dot-shaped holes 9 is wider than the width of the openings. FIG. 3A shows a case in which the depth H of the dot-shaped holes 9 is greater than the width W of the dot-shaped holes 9 (H>W), while FIG. 3C shows a case in which the width W of the dot-shaped holes 9 is equal to or greater than the depth H of the dot-shaped holes 9 (W≧H), resulting in a chunky shape. FIG. 3B shows a V-shaped cross-sectional shape in which the width of the dot-shaped holes 9 narrows from the surface toward the interior. Furthermore, as shown in FIG. 3A, the dot-shaped holes 9 may have a constriction near the openings. Note that this constriction has a diameter D2 that is smaller than the diameter D1 of the openings, as shown in FIG. 5. In cross-section, the constriction is located between the openings and the largest inner diameter. Adjusting the laser control parameters allows the dot-shaped holes 9 to have a bulging or V-shaped shape.

[0044] When adhesion was tested using a pudding test (details of which are provided below), adhesion was improved for all hole shapes compared to when no dot-shaped holes 9 were provided. Among these, FIG. 3B showed the best adhesion, followed by FIG. 3A and FIG. 3C. More specifically, in FIG. 3A, adhesion was improved by 75% or more compared to when no dot-shaped holes 9 were provided. In FIG. 3B, adhesion was improved by 100% or more compared to when no dot-shaped holes 9 were provided. In FIG. 3C, adhesion was improved by 50% or more compared to when no dot-shaped holes 9 were provided. When W≧H in FIG. 3C, the mold resin 7 had difficulty entering the dot-shaped holes 9, so the improvement in adhesion was lower than in FIGS. 3A and 3B.

[0045] 4A and 4B are cross-sectional views showing the shapes of the openings of the dot-shaped holes in the conductive plate of the power semiconductor module according to the embodiment. In FIG. 4A, the openings of the dot-shaped holes 9 are flat and have no raised portions. The raised portions refer to the portions of the openings of the dot-shaped holes 9 that are higher than the front surface of the conductive plate 3. More specifically, the height h1 of the raised portions of the openings of the dot-shaped holes 9 from the conductive plate 3 is less than 10 μm. In FIG. 4B, the openings of the dot-shaped holes 9 have raised portions. More specifically, the height h of the raised portions of the openings of the dot-shaped holes 9 from the conductive plate 3 is 10 μm or more. Note that if the height of the flat portion outside the raised portion is h2, h can also be expressed as h1 - h2.

[0046] When the adhesion was tested using a pudding test (details below), the adhesion was improved by more than 75% compared to when the dot-shaped holes 9 were not provided in Figure 4A, and by about 40% compared to when the dot-shaped holes 9 were not provided in Figure 4B, but the adhesion was lower compared to when the openings were flat. This is because the raised parts are formed when metal melted by the heat of the laser light resolidifies, so they have low adhesion to the conductive plate 3 and are prone to peeling. Here, the case of the bulging shape in Figure 3A is shown, but the same applies to the V-shaped shape in Figure 3B. In other words, if the height h of the raised parts is 10 μm or more, the adhesion is not sufficiently improved.

[0047] 5 is a schematic diagram of a dot-shaped hole 9 with a bulging shape, i.e., a shape in which the width of the interior is wider than the width of the opening of the dot-shaped hole 9 and there is a constriction near the opening, and is a cross-sectional view showing the dimensions of the bulging shape of the dot-shaped hole of the conductive plate of the power semiconductor module according to the embodiment. In FIG. 5, D1 is the diameter of the opening of the dot-shaped hole 9, D2 is the diameter of the narrowest part of the dot-shaped hole 9, and D3 is the diameter of the widest part of the dot-shaped hole 9. Furthermore, L is the depth of the dot-shaped hole 9.

[0048] FIG. 6 is a table showing the dimensions and adhesion of the dot-shaped holes of the conductive plate of the power semiconductor module according to the embodiment in a bulging shape. In FIG. 6, the case where the adhesion is improved by 75% or more compared to the case where the dot-shaped holes 9 are not provided is marked as ◎. As shown in FIG. 6, the diameter D1 is preferably 80 μm to 120 μm, and more preferably 90 μm to 110 μm. Also, the diameter D2 is preferably 30 μm to 70 μm, and more preferably 40 μm to 60 μm. Also, the diameter D3 is preferably 80 μm to 120 μm, and more preferably 90 μm to 110 μm. Also, the depth L is preferably 100 μm to 300 μm, and more preferably 150 μm to 250 μm.

[0049] In particular, when there is a constriction in the shape of the dot-shaped hole 9, that is, when D2 < D1 and D2 < D3, D2 / L is preferably within the range of 30 / 300 to 70 / 100, that is, 0.1 to 0.7.

[0050] FIG. 7 is a cross-sectional view showing the dimensions of the dot-shaped holes of the conductive plate of the power semiconductor module according to the embodiment in a V-shaped form. In FIG. 7, D is the diameter of the opening of the dot-shaped hole 9, and L is the depth of the dot-shaped hole 9.

[0051] FIG. 8 is a table showing the dimensions and adhesion of the dot-shaped holes of the conductive plate of the power semiconductor module according to the embodiment in a V-shaped form. In FIG. 8, the case where the adhesion is improved by 100% or more compared to the case where the dot-shaped holes 9 are not provided is marked as ◎. As shown in FIG. 8, the diameter D is preferably 40 μm to 80 μm, and more preferably 50 μm to 70 μm. Also, the depth L is preferably 100 μm to 300 μm, and more preferably 150 μm to 250 μm.

[0052] The shape of the dot-shaped holes 9 is preferably vertically long, that is, D < L. For this reason, D / L is preferably in the range of 40 / 300 to 80 / 100, that is, 0.13 to 0.8, and more preferably in the range of 50 / 250 to 70 / 150, that is, 0.2 to 0.47. As described above, there is also a preferable range for improving the adhesion in the shape and dimensions of the dot-shaped holes 9.

[0053] FIG. 9 is a cross-sectional view showing the inclination angle of the dot-shaped holes of the conductive plate of the power semiconductor module according to the embodiment. When the dot-shaped holes 9 are formed in a direction perpendicular to the surface of the conductive plate 3, the adhesion to the mold resin 7 is not sufficient. For this reason, the dot-shaped holes 9 are preferably inclined with respect to the perpendicular direction with the central axis of the dot-shaped holes 9. The central axis of the dot-shaped holes 9 is the axis connecting the center of the opening and the center of the bottom of the dot-shaped holes 9. That is, the central axis of the dot-shaped holes 9 has an angle θ with the line perpendicular to the surface of the conductive plate 3. This inclination angle θ is preferably about 7° to 23°. Further, the direction of inclination of the dot-shaped holes 9 is preferably inclined in the direction in which the mold resin 7 is injected. This is because the mold resin 7 can easily enter the dot-shaped holes 9.

[0054] Such dot-shaped holes 9 having an inclination angle θ can be formed by setting the incident angle of the laser beam to the inclination angle θ. Here, the case of the bulging shape in FIG. 3A is shown, but the case of the V-shaped in FIG. 3B is the same.

[0055] FIG. 10 is a cross-sectional view showing protrusions of dot-shaped holes of a conductive plate of a power semiconductor module according to an embodiment. FIG. 10 is an enlarged view of a region S in FIG. 3B. In the embodiment, the dot-shaped holes 9 preferably have a plurality of protrusions B on their side surfaces. Here, the dot-shaped holes 9 are formed by irradiating with laser light. With laser light irradiation, a metal (e.g., copper) melts and scatters, and then the remaining metal solidifies, forming a plurality of protrusions B. These protrusions B increase the surface roughness, strengthen the anchor effect, and further improve adhesion. When the dot-shaped holes 9 are formed by etching or pressing, these protrusions B are not formed. Therefore, in the embodiment, the dot-shaped holes 9 are formed by irradiating with laser light. The height of the protrusions B is preferably 2 μm to 10 μm.

[0056] The case where the dot-shaped holes 9 of the present invention are formed is compared with the case where parallel linear grooves with a groove width of 100 μm and groove spacing of 100 μm are formed. The linear grooves were formed by irradiating a pulsed laser so that the holes were continuously connected to form a groove. However, they may also be formed by scanning while continuously irradiating the laser. It was found that the linear grooves did not sufficiently improve adhesion. Specifically, the adhesion was only improved by about 30% compared to the case where the dot-shaped holes 9 were not formed. This is an adhesion strength that would cause peeling in a power semiconductor module. An improvement of at least 40% or more is preferable, and 50% or more is more preferable. This result was similar for both the case where the cross-sectional shape was bulged and the case where the cross-sectional shape was V-shaped. It is believed that the linear grooves did not exhibit a sufficient anchoring effect in the direction parallel to the line direction, resulting in poor adhesion. In the case of linear grooves, the adhesion differs between directions parallel and perpendicular to the line direction, so the arrangement and direction of the linear grooves must be individually designed depending on the chip pattern and shape of the module.Even if these measures are taken, there will still be areas with poor adhesion, which is not desirable.

[0057] Fig. 11 is a perspective view showing a pudding test of a power semiconductor module according to an embodiment. The pudding test is a test in which a resin molded into a pudding mold is bonded to a plate, and the resin is pressed with a constant force in a lateral direction, for example, in the direction of arrow T in Fig. 11, and the force (adhesion force) applied until the resin is removed is measured, which indicates the adhesion between the molded resin and the conductive plate. The adhesion is also indicated by the adhesion force and the adhesion force per unit area. The greater the measured force, the better the adhesion.

[0058] In this embodiment, a copper conductive plate 3 measuring 11 mm in both length and width and 1.87 mm thick was used as the plate, and the test was conducted using a molded resin 7 with a lower diameter of 3.57 mm, an upper diameter of 3 mm, and a height of 4 mm as the resin. The conductive plate 3 was bonded to a silicon nitride insulating substrate 2 with a thickness of 0.32 mm, and a heat sink 4 identical to the conductive plate 3 was used on the back surface of the insulating substrate 2. The molded resin was an epoxy resin, and the filler was silica.

[0059] The force required to remove the resin in the pudding test when the conductive plate does not have dot-shaped holes 9 is set to 100. In this case, when parallel linear grooves are provided in the conductive plate, the force required to remove the resin in the pudding test is 135. Furthermore, when the conductive plate 3 of the embodiment has dot-shaped holes 9 with bulging centers, the force required to remove the resin in the pudding test is 175 or more. In other words, the adhesion is improved by 75% or more. Furthermore, when the conductive plate 3 of the embodiment has V-shaped dot-shaped holes 9, the force required to remove the resin in the pudding test is 200 or more. In other words, the adhesion is improved by 100% or more.

[0060] As described above, according to the semiconductor device manufacturing method of the embodiment, the conductive plate has a plurality of dot-shaped holes formed by irradiating it with laser light. This improves adhesion between the conductive plate and the molding resin. This prevents peeling between the conductive plate and the molding resin, improving the reliability of the power semiconductor module. Note that although epoxy resin was used in the embodiment, similar results were obtained with other resins (such as polyimide resin).

[0061] The present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the spirit of the present invention. For example, the present invention can be applied to a semiconductor device in which a laminated assembly is combined with a case and the case is filled with resin. In this case, too, the adhesion between the resin and the conductive plate can be improved. [Industrial Applicability]

[0062] As described above, the method for manufacturing a semiconductor device according to the present invention is useful for power semiconductor devices used in power conversion devices such as inverters, power supply devices for various industrial machines, and igniters for automobiles. [Explanation of symbols]

[0063] 1, 101 Power semiconductor chip 2, 102 insulating substrate 3, 103 Conductive plate 4, 104 Heat sink 5, 105 metal terminal 6, 106 wire 7, 107 Molding resin 8, 108 Bonding material 9 Dot-shaped holes 50, 150 Power Semiconductor Module 120 Anchor Layer 121 recess

Claims

1. a first step of forming a plurality of holes on a front surface of a conductive plate by irradiating the conductive plate with a laser beam; a second step of mounting a semiconductor element on the front surface of the conductive plate; a third step of encapsulating the semiconductor element and at least the front surface of the conductive plate in a resin; The steps are carried out in this order. In the first step, the laser light is irradiated so that the focus is inside the conductive plate, The method for manufacturing a semiconductor device is characterized in that the focal point is located at a depth of 300 μm to 900 μm from the front surface of the conductive plate.

2. a first step of forming a plurality of holes on a front surface of a conductive plate by irradiating the conductive plate with a laser beam; a second step of mounting a semiconductor element on the front surface of the conductive plate; a third step of encapsulating the semiconductor element and at least the front surface of the conductive plate in a resin; The steps are carried out in this order. In the first step, the laser light is irradiated at an angle of 7° to 23° from a line perpendicular to the front surface of the conductive plate, The method for manufacturing a semiconductor device, wherein the plurality of holes are inclined in a direction in which the resin is injected.

Images