nitride semiconductor devices

Abstract

To provide a nitride semiconductor device including a polarized superjunction that is low in peak of an electric field strength and also suppressed in leakage current.SOLUTION: Provided is a nitride semiconductor device including a polarized superjunction provided between a gate electrode and a drain electrode. The polarized superjunction includes: a first nitride semiconductor layer; a second nitride semiconductor layer provided on the first nitride semiconductor layer and having a band gap wider than that of the first nitride semiconductor layer; a third nitride semiconductor layer provided on part of the top surface of the second nitride semiconductor layer and having a band gap narrower than that of the second nitride semiconductor layer; and a fourth nitride semiconductor layer provided on part of the top surface of the second nitride semiconductor layer, disposed closer to a drain electrode side than the third nitride semiconductor layer, away from the third nitride semiconductor layer, and having a band gap narrower than that of the second nitride semiconductor layer, the fourth nitride semiconductor layer having a floating potential.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The technology disclosed in this specification relates to a nitride semiconductor device. [Background technology]

[0002] Patent Documents 1 and 2 disclose nitride semiconductor devices with polarization super junctions. The polarization super junction is provided between a gate electrode and a drain electrode and has a structure in which a first nitride semiconductor layer, a second nitride semiconductor layer, and a third nitride semiconductor layer are stacked. The first nitride semiconductor layer is formed of undoped GaN. The second nitride semiconductor layer is formed of undoped AlGaN. The third nitride semiconductor layer is formed of undoped GaN. The polarization super junction is polarized in a stacking direction perpendicular to the direction connecting the gate electrode and the drain electrode. In such a polarization super junction, the electric field strength between the gate electrode and the drain electrode is uniform. For this reason, nitride semiconductor devices with polarization super junctions are said to have high breakdown voltage characteristics. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2016-146369 [Patent Document 2] Japanese Patent Publication No. 2020-198331 Summary of the Invention [Problem to be solved by the invention]

[0004] In nitride semiconductor devices with polarization super junctions, a technology is needed to reduce the peak electric field strength at the polarization super junctions in order to suppress the collapse phenomenon. Furthermore, in nitride semiconductor devices with polarization super junctions, a technology is also needed to suppress leakage current. This specification provides a nitride semiconductor device with a polarization super junction that has a low peak electric field strength and suppressed leakage current. [Means for solving the problem]

[0005] This specification discloses a nitride semiconductor device including a polarization super junction provided between a gate electrode and a drain electrode. The polarization super junction can include a first nitride semiconductor layer, a second nitride semiconductor layer, a third nitride semiconductor layer, and a fourth nitride semiconductor layer. The second nitride semiconductor layer is provided on the first nitride semiconductor layer and has a bandgap wider than that of the first nitride semiconductor layer. The third nitride semiconductor layer is provided on a portion of the second nitride semiconductor layer and has a bandgap narrower than that of the second nitride semiconductor layer. The fourth nitride semiconductor layer is provided on a portion of the second nitride semiconductor layer, is spaced from the third nitride semiconductor layer and is closer to the drain electrode than the third nitride semiconductor layer, and has a bandgap narrower than that of the second nitride semiconductor layer. The fourth nitride semiconductor layer is floating in potential. In this nitride semiconductor device, the electric field intensity peaks at two locations: the end of the third nitride semiconductor layer on the drain electrode side and the end of the fourth nitride semiconductor layer on the drain electrode side. Since the electric field intensity peaks are dispersed, the electric field intensity peaks are reduced. Furthermore, in this nitride semiconductor device, when the device is turned off, two-dimensional hole gas remains in the fourth nitride semiconductor layer, which has a floating potential. Therefore, two-dimensional electron gas near the junction surface between the first nitride semiconductor layer and the second nitride semiconductor layer is attracted, suppressing leakage current caused by the two-dimensional electron gas bypassing the polarization super junction and flowing below the polarization super junction. In this way, the nitride semiconductor device can be provided with a polarization super junction with a low electric field intensity peak and reduced leakage current.

[0006] The third nitride semiconductor layer may be longer than the fourth nitride semiconductor layer when measured in the direction connecting the gate electrode and the drain electrode. In this nitride semiconductor device, a wide area is secured between the gate electrode and the drain electrode where the first nitride semiconductor layer, the second nitride semiconductor layer, and the third nitride semiconductor layer are stacked, thereby enabling high breakdown voltage characteristics. Furthermore, in this nitride semiconductor device, the fourth nitride semiconductor layer is provided, so that the peak of the electric field strength is low and leakage current is suppressed, as described above. [Brief explanation of the drawings]

[0007] [Figure 1] 1 is a schematic cross-sectional view of a main part of a nitride semiconductor device according to an embodiment of the present invention. [Figure 2] 1 is a schematic cross-sectional view of a main part of a nitride semiconductor device of Comparative Example 1. FIG. [Figure 3] 1 is a schematic cross-sectional view of a main part of a nitride semiconductor device of Comparative Example 2. FIG. [Figure 4] 1A to 1C are schematic cross-sectional views of essential parts in a process for manufacturing the nitride semiconductor device of the present embodiment. [Figure 5] 1A to 1C are schematic cross-sectional views of essential parts in a process for manufacturing the nitride semiconductor device of the present embodiment. [Figure 6] 1A to 1C are schematic cross-sectional views of essential parts in a process for manufacturing the nitride semiconductor device of the present embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0008] 1, nitride semiconductor device 1 includes substrate 11, buffer layer 12, first nitride semiconductor layer 13, second nitride semiconductor layer 14, third nitride semiconductor layer 15, fourth nitride semiconductor layer 16, p-type nitride semiconductor regions 17 and 18, drain electrode 22, source electrode 24, and gate electrode 26. The first nitride semiconductor layer 13, second nitride semiconductor layer 14, third nitride semiconductor layer 15, and fourth nitride semiconductor layer 16, which are present between gate electrode 26 and drain electrode 22, form a polarization super junction 30.

[0009] A material on which a nitride semiconductor-based semiconductor material can grow crystals is used for the substrate 11. The substrate 11 is not particularly limited, but may be, for example, gallium nitride, sapphire, or silicon.

[0010] The buffer layer 12 is laminated on the substrate 11 and is in contact with the upper surface of the substrate 11. The buffer layer 12 is not particularly limited, but may be, for example, undoped gallium nitride (GaN). Alternatively, the buffer layer 12 may contain aluminum gallium nitride below the undoped gallium nitride.

[0011] First nitride semiconductor layer 13 is stacked on buffer layer 12 and is in contact with the upper surface of buffer layer 12. First nitride semiconductor layer 13 is not particularly limited, but may be, for example, undoped gallium nitride.

[0012] The second nitride semiconductor layer 14 is stacked on the first nitride semiconductor layer 13 and is in contact with the upper surface of the first nitride semiconductor layer 13. The second nitride semiconductor layer 14 is not particularly limited, but may be, for example, undoped aluminum gallium nitride. The band gap of the second nitride semiconductor layer 14 is wider than the band gap of the first nitride semiconductor layer 13.

[0013] The third nitride semiconductor layer 15 is stacked on a portion of the upper surface of the second nitride semiconductor layer 14 and is in contact with the upper surface of the second nitride semiconductor layer 14. The third nitride semiconductor layer 15 has a portion located below the gate electrode 26 and a portion located between the gate electrode 26 and the drain electrode 22. The portion of the third nitride semiconductor layer 15 located between the gate electrode 26 and the drain electrode 22 constitutes a part of the polarization super junction 30. The third nitride semiconductor layer 15 is not particularly limited, but may be, for example, undoped gallium nitride. The band gap of the third nitride semiconductor layer 15 is narrower than the band gap of the second nitride semiconductor layer 14.

[0014] The fourth nitride semiconductor layer 16 is stacked on a portion of the upper surface of the second nitride semiconductor layer 14 and is in contact with the upper surface of the second nitride semiconductor layer 14. The fourth nitride semiconductor layer 16 is disposed away from the third nitride semiconductor layer 15 and closer to the drain electrode 22 than the third nitride semiconductor layer 15. The fourth nitride semiconductor layer 16 is also disposed away from the drain electrode 22. Therefore, the potential of the fourth nitride semiconductor layer 16 is floating. The fourth nitride semiconductor layer 16 constitutes a part of the polarization super junction 30. The fourth nitride semiconductor layer 16 is not particularly limited, and may be, for example, undoped gallium nitride. The band gap of the fourth nitride semiconductor layer 16 is narrower than the band gap of the second nitride semiconductor layer 14.

[0015] The p-type nitride semiconductor regions 17, 18 are provided between the third nitride semiconductor layer 15 and the gate electrode 26. The p-type nitride semiconductor regions 17, 18 include a low-concentration p-type nitride semiconductor region 17 and a high-concentration p-type nitride semiconductor region 18. The low-concentration p-type nitride semiconductor region 17 is provided between the third nitride semiconductor layer 15 and the high-concentration p-type nitride semiconductor region 18, and the high-concentration p-type nitride semiconductor region 18 is provided between the low-concentration p-type nitride semiconductor region 17 and the gate electrode 26. The low-concentration p-type nitride semiconductor region 17 and the high-concentration p-type nitride semiconductor region 18 are not particularly limited, and may be, for example, gallium nitride doped with magnesium or zinc as a p-type impurity (acceptor). The impurity concentration of the high-concentration p-type nitride semiconductor region 18 is higher than the impurity concentration of the low-concentration p-type nitride semiconductor region 17. Therefore, the high-concentration p-type nitride semiconductor region 18 can be in contact with the gate electrode 26 with low contact resistance.

[0016] The drain electrode 22 and the source electrode 24 are each provided on the second nitride semiconductor layer 14 and are in contact with the surface of the second nitride semiconductor layer 14. The drain electrode 22 and the source electrode 24 are disposed in opposing positions with the gate electrode 26 interposed therebetween. Each of the drain electrode 22 and the source electrode 24 is not particularly limited, and may be, for example, a laminated electrode of polysilicon or titanium and aluminum.

[0017] The gate electrode 26 is provided on the p-type nitride semiconductor regions 17, 18 and is in contact with the upper surfaces of the p-type nitride semiconductor regions 17, 18. The gate electrode 26 is not particularly limited, but may be, for example, a polysilicon electrode or a laminated electrode of nickel, gold, titanium, and aluminum.

[0018] Next, the operation of the nitride semiconductor device 1 will be described. The nitride semiconductor device 1 is used, for example, with a positive potential applied to the drain electrode 22 and a ground potential applied to the source electrode 24. In the nitride semiconductor device 1, two-dimensional electron gas (2DEG) is generated on the first nitride semiconductor layer 13 side of the junction between the first nitride semiconductor layer 13 and the second nitride semiconductor layer 14. This two-dimensional electron gas serves as a current path between the drain electrode 22 and the source electrode 24. When a negative potential is applied to the gate electrode 26, a depletion layer expands downward from the p-type nitride semiconductor regions 17, 18, depleting the two-dimensional electron gas below the p-type nitride semiconductor regions 17, 18. As a result, the current path flowing between the drain electrode 22 and the source electrode 24 is interrupted below the gate electrode 26, and the nitride semiconductor device 1 is turned off.

[0019] In the nitride semiconductor device 1, a two-dimensional electron gas is generated on the first nitride semiconductor layer 13 side of the junction surface between the first nitride semiconductor layer 13 and the second nitride semiconductor layer 14, a two-dimensional hole gas (2DHG) is generated on the third nitride semiconductor layer 15 side of the junction surface between the second nitride semiconductor layer 14 and the third nitride semiconductor layer 15, and a two-dimensional hole gas is generated on the fourth nitride semiconductor layer 16 side of the junction surface between the second nitride semiconductor layer 14 and the fourth nitride semiconductor layer 16. In the second nitride semiconductor layer 14, positive fixed charges are generated on the first nitride semiconductor layer 13 side, and negative fixed charges are generated on the third nitride semiconductor layer 15 and fourth nitride semiconductor layer 16 sides, resulting in polarization in the thickness direction. When the nitride semiconductor device 1 is turned off, electrons in the two-dimensional electron gas in the first nitride semiconductor layer 13 are discharged to the drain electrode 22, and holes in the two-dimensional hole gas in the third nitride semiconductor layer 15 are discharged to the gate electrode 26 via the p-type nitride semiconductor regions 17 and 18, depleting the portion of the polarization super junction 30 where the first nitride semiconductor layer 13, the second nitride semiconductor layer 14, and the third nitride semiconductor layer 15 are stacked. In the portion of the polarization super junction 30 of the nitride semiconductor device 1 where the first nitride semiconductor layer 13, the second nitride semiconductor layer 14, and the third nitride semiconductor layer 15 are stacked, the electric field strength between the gate electrode 26 and the drain electrode 22 is made uniform. The nitride semiconductor device 1 can have high breakdown voltage characteristics.

[0020] When a ground potential is applied to the gate electrode 26, the depletion layer that had been spreading downward from the p-type nitride semiconductor regions 17, 18 shrinks, and the drain electrode 22 and the source electrode 24 are electrically connected via the two-dimensional electron gas layer, thereby establishing electrical continuity between the drain electrode 22 and the source electrode 24, and the nitride semiconductor device 1 is turned on.

[0021] To facilitate understanding of the features of the nitride semiconductor device 1 of this embodiment, reference will be made to a nitride semiconductor device 2 of Comparative Example 1 shown in Fig. 2 and a nitride semiconductor device 3 of Comparative Example 2 shown in Fig. 3. Note that in the nitride semiconductor devices 2 and 3 of Comparative Examples, components common to those of the nitride semiconductor device 1 in Fig. 1 are denoted by the same reference numerals.

[0022] The nitride semiconductor device 2 of Comparative Example 1 shown in Figure 2 is an example in which a structure corresponding to the fourth nitride semiconductor layer 16 (see Figure 1) is not provided, and corresponds to the nitride semiconductor device described in Patent Document 1 listed in the Background of the Invention. The nitride semiconductor device 3 of Comparative Example 2 shown in Figure 3 is an example in which a thin nitride semiconductor layer 116 provided in place of the fourth nitride semiconductor layer 16 is electrically connected to the drain electrode 22 via a p-type nitride semiconductor region 117, and corresponds to the nitride semiconductor device described in Patent Document 2 listed in the Background of the Invention.

[0023] In the nitride semiconductor device 1 of this embodiment shown in FIG. 1, when the device is turned off, the electric field intensity peaks at two locations: the end of the third nitride semiconductor layer 15 on the drain electrode 22 side and the end of the fourth nitride semiconductor layer 16 on the drain electrode 22 side. Since the electric field intensity peaks are dispersed, the electric field intensity peaks are lowered. In the nitride semiconductor device 2 of Comparative Example 1 shown in FIG. 2, the electric field intensity peak is only at the end of the third nitride semiconductor layer 15 on the drain electrode 22 side, and the electric field intensity peak is high. As such, in the nitride semiconductor device 1 of this embodiment, the electric field intensity peak is low, and therefore the collapse phenomenon can be suppressed.

[0024] In the nitride semiconductor device 1 of this embodiment, when the device is turned off, two-dimensional hole gas remains in the fourth nitride semiconductor layer 16, which has a floating potential. This attracts two-dimensional electron gas near the junction between the first nitride semiconductor layer 13 and the second nitride semiconductor layer 14, suppressing leakage current that would otherwise bypass the polarization super junction 30 and flow through the buffer layer 12 and substrate 11 below the polarization super junction 30. The nitride semiconductor device 2 of Comparative Example 1 shown in FIG. 2 does not include the fourth nitride semiconductor layer 16, which has a floating potential. Therefore, a large leakage current (see arrows in the figure) flows through the buffer layer 12 and substrate 11 below the polarization super junction 30. In the nitride semiconductor device 3 shown in FIG. 3, a large leakage current (see arrows in the figure) flows between the gate electrode 26 and the drain electrode 22 via two-dimensional hole gas generated in the third nitride semiconductor layer 15 and the thin nitride semiconductor layer 116. In this way, the nitride semiconductor device 1 of this embodiment shown in FIG. 1 can have the characteristic of low leakage current when turned off.

[0025] In the nitride semiconductor device 1 of this embodiment, when measured in the direction connecting the gate electrode 26 and the drain electrode 22, the length 15L of the third nitride semiconductor layer 15 located at the polarization super junction 30 is greater than the length 16L of the fourth nitride semiconductor layer 16. Because the length 15L of the third nitride semiconductor layer 15 is greater, most of the polarization super junction 30 is depleted when the nitride semiconductor device 1 is turned off. This allows the nitride semiconductor device 1 to have high breakdown voltage characteristics.

[0026] The gap length GL between the third nitride semiconductor layer 15 and the fourth nitride semiconductor layer 16 may be 0.1 μm to 2.0 μm when measured in the direction connecting the gate electrode 26 and the drain electrode 22. The length 16L of the fourth nitride semiconductor layer 16 may be 0.1 μm to 1.0 μm. When set within such a numerical range, the polarization super-junction 30 of the nitride semiconductor device 1 can effectively exhibit the characteristics of a low peak electric field intensity and suppressed leakage current, as described above.

[0027] Next, a method for manufacturing the nitride semiconductor device 1 will be described. First, as shown in Fig. 4, a buffer layer 12, a first nitride semiconductor layer 13, a second nitride semiconductor layer 14, a non-doped nitride semiconductor layer 102, a low-concentration p-type nitride semiconductor layer 104, and a high-concentration p-type nitride semiconductor layer 106 are sequentially formed on a substrate 11 by, for example, metalorganic chemical vapor deposition (MOCVD), to form a laminated substrate 10. To make the buffer layer 12 insulating, carbon, iron, or the like may be contained in the buffer layer 12.

[0028] 5, a dry etching technique using a chlorine-based gas is used to remove parts of the low-concentration p-type nitride semiconductor layer 104 and the high-concentration p-type nitride semiconductor layer 106, thereby exposing the non-doped nitride semiconductor layer 102. This process forms a low-concentration p-type nitride semiconductor region 17 and a high-concentration p-type nitride semiconductor region 18.

[0029] 6, a dry etching technique using a chlorine-based gas is used to remove a portion of the non-doped nitride semiconductor layer 102 to expose the second nitride semiconductor layer 14. Through this process, a third nitride semiconductor layer 15 and a fourth nitride semiconductor layer 16 are formed.

[0030] Next, the gate electrode 26 is formed and processed, an interlayer insulating film is formed, contact holes are formed in the interlayer insulating film, and then the drain electrode 22 and the source electrode 24 are formed and processed, thereby completing the nitride semiconductor device 1 shown in Figure 1.

[0031] Although specific examples of the present invention have been described in detail above, these are merely examples and do not limit the scope of the claims. The technology described in the claims includes various modifications and variations of the specific examples exemplified above. Furthermore, the technical elements described in this specification or drawings exhibit technical utility alone or in various combinations, and are not limited to the combinations described in the claims at the time of filing. Furthermore, the technology exemplified in this specification or drawings can achieve multiple objectives simultaneously, and achieving one of these objectives itself has technical utility. [Explanation of symbols]

[0032] 1: nitride semiconductor device, 11: substrate, 12: buffer layer, 13: first nitride semiconductor layer, 14: second nitride semiconductor layer, 15: third nitride semiconductor layer, 16: fourth nitride semiconductor layer, 17: low-concentration p-type nitride semiconductor region, 18: high-concentration p-type nitride semiconductor region, 22: drain electrode, 24: source electrode, 26: gate electrode, 30: polarization super junction

Claims

1. A nitride semiconductor device including a polarization super junction provided between a gate electrode and a drain electrode, The polarization super junction is a first nitride semiconductor layer; a second nitride semiconductor layer provided on the first nitride semiconductor layer and having a band gap wider than that of the first nitride semiconductor layer; a third nitride semiconductor layer provided on a portion of an upper surface of the second nitride semiconductor layer and having a band gap narrower than the band gap of the second nitride semiconductor layer; a fourth nitride semiconductor layer provided on a part of the upper surface of the second nitride semiconductor layer, disposed apart from the third nitride semiconductor layer and closer to the drain electrode than the third nitride semiconductor layer, and having a band gap narrower than the band gap of the second nitride semiconductor layer; the fourth nitride semiconductor layer is at a floating potential; the third nitride semiconductor layer has a portion located below the gate electrode and a portion located between the gate electrode and the drain electrode, a portion of the third nitride semiconductor layer located between the gate electrode and the drain electrode forming a part of the polarization super junction;

2. The nitride semiconductor device according to claim 1 , wherein said third nitride semiconductor layer is longer than said fourth nitride semiconductor layer when measured in a direction connecting said gate electrode and said drain electrode.

3. the first nitride semiconductor layer is undoped gallium nitride; the second nitride semiconductor layer is undoped aluminum gallium nitride; the third nitride semiconductor layer is undoped gallium nitride; The nitride semiconductor device according to claim 1 , wherein the fourth nitride semiconductor layer is made of undoped gallium nitride.

4. A nitride semiconductor device including a polarization super junction provided between a gate electrode and a drain electrode, The polarization super junction is a first nitride semiconductor layer; a second nitride semiconductor layer provided on the first nitride semiconductor layer and having a band gap wider than that of the first nitride semiconductor layer; a third nitride semiconductor layer provided on a portion of an upper surface of the second nitride semiconductor layer and having a band gap narrower than the band gap of the second nitride semiconductor layer; a fourth nitride semiconductor layer provided on a part of the upper surface of the second nitride semiconductor layer, disposed apart from the third nitride semiconductor layer and closer to the drain electrode than the third nitride semiconductor layer, and having a band gap narrower than the band gap of the second nitride semiconductor layer; the fourth nitride semiconductor layer is at a floating potential; the first nitride semiconductor layer is undoped gallium nitride; the second nitride semiconductor layer is undoped aluminum gallium nitride; the third nitride semiconductor layer is undoped gallium nitride; The nitride semiconductor device, wherein the fourth nitride semiconductor layer is undoped gallium nitride.

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