Semiconductor element, semiconductor device, and method of manufacturing semiconductor element

Abstract

The present invention measures the strength of adhesion for a connection unit adhered to a semiconductor element. The semiconductor element has a semiconductor substrate and an adhesive pad. Disposed adjacent to this semiconductor substrate is a wiring region that has an element formed therein and has wiring that transmits the element signals. The adhesive pad is disposed in the wiring region adjacent to a semiconductor substrate-removed region which is a region from which the semiconductor substrate has been removed, said adhesive pad being connected to the wiring and having the connection unit for connecting to the outside adhered thereto. This semiconductor substrate-removed region includes a region for measuring the adhesion strength between the adhesive pad and the connection unit.

Description

[Technical Field]

[0001] The present disclosure relates to a semiconductor device, a semiconductor device, and a method for manufacturing a semiconductor device. [Background technology]

[0002] Some semiconductor devices are connected to external circuits by wire bonding. Wire bonding is a connection method in which a bonding wire is bonded to a pad located in a wiring region formed on the surface side of a semiconductor substrate that constitutes the semiconductor device. The bonding wire is bonded by heating and pressing a metal bonding wire to the pad. The bonding wire is bonded from the side opposite to the surface that contacts the semiconductor substrate.

[0003] In response to this, a semiconductor device has been proposed in which an opening is formed in a semiconductor substrate near the pad to expose the pad, and a bonding wire is attached to the pad from the back side of the semiconductor substrate through the opening. For example, in a back-illuminated imaging device that captures light irradiated onto the back side of the semiconductor substrate, a lens layer in which lenses for focusing incident light are formed and a planarization film that planarizes the underlying surface of the lens layer are disposed on the back side of the semiconductor substrate. The opening in the semiconductor substrate must be formed after removing the lens layer and planarization film. Wire bonding pads are disposed at the edge of the semiconductor substrate to shorten the length of the bonding wires. Furthermore, scribe lines, which are areas that a dicing blade contacts to separate the semiconductor substrate from the wafer, are disposed around the periphery of the wafer-shaped semiconductor substrate. As semiconductor devices become smaller, wire bonding pads are disposed close to the scribe lines. The scribe lines are linear grooves formed in the semiconductor substrate after the lens layer and planarization film have been removed.

[0004] A semiconductor device has been proposed in which the lens layer and planarization film are simultaneously removed from the region where wire bonding is performed and the region where a scribe line is formed (see, for example, Patent Document 1). In this semiconductor device, an opening for wire bonding and a groove for the scribe line are separately formed in the semiconductor substrate adjacent to the opening where the lens layer and planarization film have been removed. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Japanese Patent Application Laid-Open No. 2016-131179 Summary of the Invention [Problem to be solved by the invention]

[0006] To ensure the reliability of wire bonding connections, it is necessary to measure and manage the adhesive strength between the pad and the bonding wire. This adhesive strength can be measured by a shear strength test, in which the bonding wire bonded to the pad is broken to measure its strength. This shear strength test is performed by pressing the adhesive portion of the bonding wire in a direction parallel to the surface of the semiconductor substrate with a measuring tool. However, in the above-mentioned conventional technology, the adhesive portion of the bonding wire is located in an opening in the semiconductor substrate, which prevents the pressing with the measuring tool and makes it impossible to measure the adhesive strength.

[0007] Therefore, the present disclosure proposes a semiconductor element, a semiconductor device, and a method for manufacturing a semiconductor element, which measure the adhesive strength of a bonding wire bonded from the back surface side of a semiconductor substrate. [Means for solving the problem]

[0008] A semiconductor device according to the present disclosure includes a semiconductor substrate and bonding pads. The semiconductor substrate has an element formed thereon and a wiring region adjacent thereto, the wiring region having wiring for transmitting signals from the element. The bonding pads are disposed in the wiring region adjacent to a semiconductor substrate removal region, which is a region from which the semiconductor substrate has been removed, and are connected to the wiring and to which connecting portions for connection to the outside are attached. The semiconductor substrate removal region includes a region for measuring the adhesive strength of the bonding pads and the connecting portions.

[0009] The present disclosure also provides a semiconductor device having a semiconductor substrate, bond pads, and a processing circuit. The semiconductor substrate has elements formed thereon and a wiring region having wiring for transmitting signals from the elements disposed adjacent thereto. The bond pads are disposed in the wiring region adjacent to a semiconductor substrate removal region, which is a region from which the semiconductor substrate has been removed, and are connected to the wiring, and a connection portion for connecting to an external device is attached thereto. The processing circuit processes the transmitted signals. The semiconductor substrate removal region includes a region for measuring the adhesive strength of the bond pads and the connection portion.

[0010] In addition, the method for manufacturing a semiconductor element according to the present disclosure includes the steps of: arranging a wiring region on a semiconductor substrate on which an element is formed, the wiring region including wiring for transmitting signals of the element and adhesive pads connected to the wiring and having connection portions for connecting to the outside attached thereto; and removing the semiconductor substrate in a region near the adhesive pads, wherein the step of removing the semiconductor substrate removes the region including a region for measuring the adhesive strength of the adhesive pads and the connection portions. [Brief explanation of the drawings]

[0011] [Figure 1] FIG. 1 is a diagram illustrating an example of the configuration of an imaging element according to an embodiment of the present disclosure. [Figure 2] FIG. 1 is a plan view illustrating a configuration example of an imaging element according to an embodiment of the present disclosure. [Figure 3] 1 is a cross-sectional view showing an example of the configuration of an imaging element according to a first embodiment of the present disclosure. [Figure 4]FIG. 10 illustrates an example of a shear strength test according to an embodiment of the present disclosure. [Figure 5A] 3A to 3C are diagrams illustrating an example of a method for manufacturing an imaging element according to the first embodiment of the present disclosure. [Figure 5B] 3A to 3C are diagrams illustrating an example of a method for manufacturing an imaging element according to the first embodiment of the present disclosure. [Figure 5C] 3A to 3C are diagrams illustrating an example of a method for manufacturing an imaging element according to the first embodiment of the present disclosure. [Figure 5D] 3A to 3C are diagrams illustrating an example of a method for manufacturing an imaging element according to the first embodiment of the present disclosure. [Figure 5E] 3A to 3C are diagrams illustrating an example of a method for manufacturing an imaging element according to the first embodiment of the present disclosure. [Figure 5F] 3A to 3C are diagrams illustrating an example of a method for manufacturing an imaging element according to the first embodiment of the present disclosure. [Figure 6A] FIG. 10 is a diagram illustrating another exemplary configuration of an imaging element according to an embodiment of the present disclosure. [Figure 6B] FIG. 10 is a diagram illustrating another exemplary configuration of an imaging element according to an embodiment of the present disclosure. [Figure 6C] FIG. 10 is a diagram illustrating another exemplary configuration of an imaging element according to an embodiment of the present disclosure. [Figure 7] FIG. 10 is a cross-sectional view showing an example of the configuration of an imaging element according to a second embodiment of the present disclosure. [Figure 8A] 6A to 6C are diagrams illustrating an example of a method for manufacturing an imaging element according to a second embodiment of the present disclosure. [Figure 8B] 6A to 6C are diagrams illustrating an example of a method for manufacturing an imaging element according to a second embodiment of the present disclosure. [Figure 8C] 6A to 6C are diagrams illustrating an example of a method for manufacturing an imaging element according to a second embodiment of the present disclosure. [Figure 8D] 6A to 6C are diagrams illustrating an example of a method for manufacturing an imaging element according to a second embodiment of the present disclosure. [Figure 8E] 6A to 6C are diagrams illustrating an example of a method for manufacturing an imaging element according to a second embodiment of the present disclosure. [Figure 8F] 6A to 6C are diagrams illustrating an example of a method for manufacturing an imaging element according to a second embodiment of the present disclosure. [Figure 8G]6A to 6C are diagrams illustrating an example of a method for manufacturing an imaging element according to a second embodiment of the present disclosure. [Figure 8H] 6A to 6C are diagrams illustrating an example of a method for manufacturing an imaging element according to a second embodiment of the present disclosure. [Figure 9] FIG. 10 is a cross-sectional view showing an example of the configuration of an imaging element according to a third embodiment of the present disclosure. [Figure 10] FIG. 10 is a cross-sectional view showing an example of the configuration of an imaging element according to a fourth embodiment of the present disclosure. [Figure 11] FIG. 10 is a cross-sectional view showing another configuration example of an imaging element according to a fourth embodiment of the present disclosure. [Figure 12] FIG. 10 is a cross-sectional view showing another configuration example of an imaging element according to a fourth embodiment of the present disclosure. [Figure 13] FIG. 1 is a diagram illustrating an example of the configuration of an imaging device to which the technology according to the present disclosure can be applied. DETAILED DESCRIPTION OF THE INVENTION

[0012] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings. The description will be made in the following order. In the following embodiments, the same components are designated by the same reference numerals, and redundant description will be omitted. 1. First embodiment 2. Second embodiment 3. Third embodiment 4. Fourth Embodiment 5. Configuration of the imaging device

[0013] (1. First embodiment) [Image sensor configuration] FIG. 1 is a diagram illustrating an example configuration of an image sensor according to an embodiment of the present disclosure. The figure is a block diagram illustrating an example configuration of an image sensor 1. A semiconductor device according to an embodiment of the present disclosure will be described using this image sensor 1 as an example. The image sensor 1 is a semiconductor device that generates image data of a subject. The image sensor 1 includes a pixel array unit 10, a vertical drive unit 20, and a column signal processing unit 30.

[0014] The pixel array unit 10 is configured by arranging a plurality of pixels 100. The pixel array unit 10 in the figure represents an example in which the plurality of pixels 100 are arranged in a two-dimensional matrix. Here, the pixel 100 includes a photoelectric conversion unit that performs photoelectric conversion of incident light and generates an image signal of a subject based on the incident light. For example, a photodiode can be used for this photoelectric conversion unit. Signal lines 21 and 31 are wired to each pixel 100. The pixel 100 generates an image signal under the control of a control signal transmitted by the signal line 21 and outputs the generated image signal via the signal line 31. The signal line 21 is arranged in each row of the two-dimensional matrix and is wired in common to the plurality of pixels 100 arranged in one row. The signal line 31 is arranged in each column of the two-dimensional matrix and is wired in common to the plurality of pixels 100 arranged in one column.

[0015] The vertical driving unit 20 generates control signals for the above-mentioned pixels 100. The vertical driving unit 20 in the figure can generate a control signal for each row of the two-dimensional matrix of the pixel array unit 10 and output it via a signal line 21.

[0016] The column signal processing unit 30 processes image signals generated by the pixels 100. The column signal processing unit 30 in the figure simultaneously processes image signals from multiple pixels 100 arranged in one row of the pixel array unit 10. This processing can include, for example, analog-to-digital conversion, which converts analog image signals generated by the pixels 100 into digital image signals, and correlated double sampling (CDS), which removes offset errors in the image signals. The processed image signals are output to a circuit or the like external to the image sensor 1. Note that the image sensor 1 in the figure is an example of a semiconductor element as defined in the claims.

[0017] [Plane configuration of the image sensor] FIG. 2 is a plan view showing an example configuration of an image sensor according to an embodiment of the present disclosure. This figure is a plan view showing an example configuration of the image sensor 1, and is a diagram showing an example configuration of the back surface side of the image sensor 1. The image sensor 1 includes a semiconductor substrate 110 and a wiring region 120. The wiring region 120 is disposed on the front surface side of the semiconductor substrate 110. Note that the back surface side of the image sensor 1 in this figure corresponds to the back surface side of the semiconductor substrate 110. The pixel array section 10 described in FIG. 1 is formed in the center of the back surface side of the semiconductor substrate 110. Portions of the semiconductor substrate 110 near the left and right ends in this figure are removed to form regions where the wiring region 120 is exposed. These regions are referred to as semiconductor substrate removal regions 190. The semiconductor substrate removal regions 190 in this figure represent an example formed along the left and right side surfaces of the image sensor 1.

[0018] Bonding pads 125 are arranged in semiconductor substrate removal region 190. Bonding pads 125 are electrodes to which bonding wires are bonded by wire bonding. As will be described later, bonding pads 125 are embedded in wiring region 120 and are exposed on the semiconductor substrate removal region 190 side through openings 171 formed in wiring region 120.

[0019] [Cross-sectional structure of the image sensor] 3 is a cross-sectional view showing an example configuration of an image sensor according to the first embodiment of the present disclosure. The figure is a cross-sectional view showing the example configuration of an image sensor 1. The image sensor 1 in the figure includes a semiconductor substrate 110, a wiring region 120, insulating films 141 and 153, a color filter 142, an on-chip lens 151, and a support substrate 160. Note that bonding wires 90 are also shown in the figure.

[0020] The semiconductor substrate 110 is a substrate on which semiconductor elements are formed. Specifically, a diffusion region of the semiconductor element is formed in the semiconductor substrate 110. This semiconductor substrate 110 can be made of, for example, silicon (Si). The semiconductor element is disposed in a well region formed in the semiconductor substrate 110. For convenience, it is assumed that the semiconductor substrate 110 in the figure is formed in a p-type well region. By forming an n-type or p-type semiconductor region in this p-type well region, a semiconductor element can be formed.

[0021] In the figure, a photoelectric conversion unit 101 and a charge transfer unit 102 are shown as examples. The photoelectric conversion unit 101 is disposed in each pixel 100 described in FIG. 1 and is an element that performs photoelectric conversion of incident light. The photoelectric conversion unit 101 is configured by an n-type semiconductor region 111 (white rectangular region) disposed on a semiconductor substrate 110 in the figure. Specifically, the photoelectric conversion unit 101 corresponds to a photodiode configured by a pn junction at the interface between the n-type semiconductor region 111 and a surrounding p-type well region.

[0022] The charge transfer unit 102 is an element that transfers the charges generated by the photoelectric conversion unit 101. The charge transfer unit 102 is composed of a MOS transistor having a gate 112. The gate 112 is configured in a shape in which a pillar-shaped buried gate that is deep enough to reach the n-type semiconductor region 111 from the surface of the semiconductor substrate 110 is joined to a gate electrode that is arranged on the surface side of the semiconductor substrate 110. The charge transfer unit 102 is a vertical MOS transistor that transfers the charges generated by the photoelectric conversion unit 101 in the thickness direction of the semiconductor substrate 110. The charges transferred by the charge transfer unit 102 are transferred to a floating diffusion region (not shown) that is arranged near the surface of the semiconductor substrate 110. Thereafter, an image signal is generated by a pixel circuit (not shown) based on the transferred charges.

[0023] The photoelectric conversion unit 101 and the charge transfer unit 102 are arranged for each pixel 100.

[0024] As will be described later, a semiconductor substrate removal region 190 is disposed at an end of the imaging element 1. A penetrating insulating portion 119 can be disposed on the surface of the semiconductor substrate 110 adjacent to this semiconductor substrate removal region 190. This penetrating insulating portion 119 is composed of an insulator shaped to penetrate the semiconductor substrate 110. By disposing the penetrating insulating portion 119, it is possible to insulate the side surface of the semiconductor substrate 110 adjacent to the semiconductor substrate removal region 190. The penetrating insulating portion 119 can be formed by filling a trench formed along the wall surface of the semiconductor substrate 110 and penetrating the semiconductor substrate 110 with an insulating material such as SiO2. Note that the penetrating insulating portion 119 can also be disposed on the side surface of the semiconductor substrate 110 other than the surface adjacent to the semiconductor substrate removal region 190.

[0025] The wiring region 120 is a region having wiring arranged adjacent to the surface side of the semiconductor substrate 110 and transmitting element signals. The wiring region 120 includes wiring 122 and an insulating layer 121. The wiring 122 transmits element signals. The wiring 122 can be made of a metal such as copper (Cu) or tungsten (W). The insulating layer 121 insulates the wiring 122. The insulating layer 121 can be made of silicon oxide (SiO2). The wiring 122 and the insulating layer 121 can be configured in multiple layers. The wiring 122 arranged on different layers can be connected to each other by via plugs 123. The wiring 122 can be connected to the elements (semiconductor regions) of the semiconductor substrate 110 by contact plugs 124. The via plugs 123 and the contact plugs 124 can be made of pillar-shaped metal or the like.

[0026] The wiring region 120 further includes a bonding pad 125. The bonding pad 125 is an electrode to which the bonding wire 90 is bonded. The bonding pad 125 may be made of, for example, aluminum (Al). An opening 171 is formed in the insulating layer 121 adjacent to the bonding pad 125. The bonding wire 90 is bonded through the opening 171.

[0027] The insulating film 141 is a film disposed on the back surface side of the semiconductor substrate 110 to insulate the semiconductor substrate 110. This insulating film 141 can be made of, for example, SiO2.

[0028] The color filter 142 is an optical filter that is disposed for each pixel 100 and transmits light of a predetermined wavelength among the light incident on the pixel 100. The color filter 142 may be a color filter 142 that transmits red light, green light, or blue light. In this case, the color filter 142 that corresponds to any of red light, green light, or blue light is disposed for the pixel 100.

[0029] The on-chip lens 151 is a lens that is disposed for each pixel 100 and focuses incident light onto the photoelectric conversion unit 101. The on-chip lens 151 can be made of an organic material such as acrylic resin or an inorganic material such as silicon nitride (SiN). The members that constitute the on-chip lens 151 are disposed so as to extend to an area outside the pixel array unit 10. This area acts as a protective film 152 that protects the back side of the semiconductor substrate 110.

[0030] The insulating film 153 is a film that is disposed on the surfaces of the on-chip lenses 151 and the protective film 152 and protects the pixel array section 10. The insulating film 153 can be made of, for example, SiO 2 .

[0031] The support substrate 160 is a substrate that is disposed adjacent to the wiring region 120 and supports the imaging element 1.

[0032] The semiconductor substrate 110 at the edge of the image sensor 1 and the insulating film 141 and protective film 152 arranged on the back surface side of the semiconductor substrate 110 are removed, leaving a shape in which the back surface side of the wiring region 120 is exposed. This region from which the semiconductor substrate 110 is removed is referred to as a semiconductor substrate removed region 190. Bonding pads 125 and openings 171 are arranged in the wiring region 120 adjacent to the semiconductor substrate removed region 190, and wire bonding is performed from the back surface side of the semiconductor substrate 110 through the openings 171.

[0033] The bonding wire 90 can be made of a metal wire such as gold (Au). Wire bonding can be performed by the following procedure. First, the bonding wire 90 is passed through a tool called a capillary, and the tip of the bonding wire 90 is made spherical by discharge heating. Next, the capillary is used to heat and pressure-weld the tip of the bonding wire 90 to the bonding pad 125. This causes the tip of the bonding wire 90 to be bonded (fused) to the bonding pad 125. At this time, the spherical tip of the bonding wire 90 forms an adhesive part 91. The other end of the bonding wire 90 is bonded to a pad arranged on an external circuit, allowing electrical connection by wire bonding. The bonding wire 90 is an example of a connecting part as defined in the claims.

[0034] The semiconductor substrate removal region 190 is a region for performing wire bonding and for measuring the adhesive strength between the bonding wire 90 and the adhesive pad 125. This adhesive strength can be measured by breaking the adhesive portion 91 from the surface of the adhesive pad 125. That is, the adhesive strength of the bonding wire 90 can be measured by measuring the load required to break the adhesive portion 91. Such a test for measuring adhesive strength is called a shear strength test. As shown in the figure, the semiconductor substrate removal region 190 is a region including regions 191 and 192. Region 191 is the region between the adhesive portion 91 and the semiconductor substrate 110. Region 192 is the region opposite region 191 relative to adhesive portion 91.

[0035] It should be noted that the configuration of the imaging element 1 is not limited to this example. For example, the penetrating insulating portion 119 may be omitted. Also, the insulating film 153 may be omitted.

[0036] [Shear strength test] FIG. 4 is a diagram illustrating an example of a shear strength test according to an embodiment of the present disclosure. This figure illustrates an example of measuring the adhesive strength of a bonding wire 90 using a shear strength test. For convenience, the image sensor 1 in this figure is depicted in a simplified form. The shear strength test can be performed by the following procedure. First, a test tool 500 is placed next to the adhesive portion 91, i.e., in region 191. Next, the test tool 500 is moved in the direction of the arrow to abut against the adhesive portion 91 and press and shear the adhesive portion 91. The adhesive strength can be measured by measuring the load applied during this shearing. The dotted line in this figure represents the broken adhesive portion 91. Thus, region 191 is the region where the test tool 500 is placed to press and shear the bonding wire 90 to measure the adhesive strength, and region 192 is the region through which the pressed adhesive portion 91 moves. The image sensor 1 of the present disclosure has a semiconductor substrate removal region 190 including regions 191 and 192, allowing for precise measurement of the adhesive strength of the bonding wire 90.

[0037] In semiconductor elements of the prior art, an opening of approximately the same shape as the opening 171 is formed in the semiconductor substrate 110, and the bonding wire 90 is attached to the opening. However, in the imaging element 1, it is necessary to increase the size of the semiconductor substrate 110 in the thickness direction. This is because photoelectric conversion is performed on long-wavelength light, such as red light, which reaches deep into the semiconductor substrate 110. As a result, the opening in the semiconductor substrate becomes deeper, and the bonding portion 91 of the bonding wire 90 becomes hidden by the semiconductor substrate 110. This interferes with shear strength testing. In the semiconductor element of the present disclosure, the semiconductor substrate removal region 190 is provided, thereby enabling precise shear strength testing as described above.

[0038] [Method of manufacturing image sensor] 5A to 5F are diagrams illustrating an example of a manufacturing method of an image sensor according to the first embodiment of the present disclosure. Figures 5A to 5F are diagrams illustrating an example of a manufacturing process of an image sensor 1. First, a well region, an n-type semiconductor region 111, and the like are formed in a semiconductor substrate 110, and a wiring region 120 is formed on the front side of the semiconductor substrate 110. Next, a support substrate 160 is bonded to the wiring region 120, and the rear side of the semiconductor substrate 110 is ground to thin it. Next, an insulating film 141, a color filter 142, an on-chip lens 151, a protective film 152, and an insulating film 153 are arranged in this order on the rear side of the ground semiconductor substrate 110 to form a pixel array section 10 (Figure 5A).

[0039] Next, a resist 401 is placed adjacent to the insulating film 153. An opening 402 is formed in this resist 401 in a region where the semiconductor substrate 110 is to be removed to form the semiconductor substrate removal region 190. This opening 402 can be formed by photolithography (FIG. 5B).

[0040] Next, the insulating film 153, the protective film 152, and the insulating film 141 adjacent to the opening 402 are removed by dry etching (FIG. 5C).

[0041] Next, the edge of the semiconductor substrate 110 is removed to form a semiconductor substrate removal region 190. This can be done by etching the edge of the semiconductor substrate 110 using a resist 401. Dry etching can also be used for this etching. In this case, dry etching is performed under etching conditions different from those in FIG. 5C (FIG. 5D).

[0042] Next, the resist 401 is removed, and a resist 403 is placed. In this resist 403, an opening 404 is formed in the region where the opening 171 of the wiring region 120 is to be formed (FIG. 5E).

[0043] Next, the insulating layer 121 in the wiring region 120 is etched using the resist 403 to form an opening 171 (FIG. 5F).

[0044] Thereafter, the resist 403 is removed, and the wafer on which the imaging elements 1 are formed is diced to separate the imaging elements 1. Next, die bonding is performed to bond the separated imaging elements 1 onto a substrate such as a semiconductor package. Next, wire bonding is performed to bond bonding wires 90 to the bonding pads 125. The imaging element 1 can be manufactured through the above steps.

[0045] [Other configurations of image sensors] 6A to 6C are diagrams illustrating other configuration examples of an image sensor according to an embodiment of the present disclosure. Similar to FIG. 2, FIG. 6A to 6C are plan views illustrating configuration examples of an image sensor 1. The image sensor 1 in FIG. 6A to 6C differs from the image sensor 1 in FIG. 2 in the shape of a semiconductor substrate removal region 190.

[0046] The image sensor 1 in FIG. 6A illustrates an example in which the semiconductor substrate removal region 190 is arranged along the alignment direction of the bonding pads 125. When performing a shear strength test, as shown in FIG. 4, a test fixture 500 can be placed between the bonded portion 91 of the bonding wire 90 and the semiconductor substrate 110. In this case, if the horizontal and vertical directions of the paper in FIG. 6 are the x-axis and y-axis, respectively, the bonded portion 91 is pressed in the x-axis direction to measure the bond strength. It is also possible to measure shear strength by placing the test fixture 500 above or below the bonded portion 91 of the bonding wire 90 in the y-axis direction. In this case, by moving the test fixture 500 in the y-axis direction from the end of the image sensor 1, shear strength tests of multiple bonding wires 90 can be performed sequentially. In this case, the area for performing the shear strength test within the semiconductor substrate removal region 190 corresponds to the area between the bonding wires 90.

[0047] The imaging element 1 in FIG. 6B shows an example in which a semiconductor substrate removal region 190 is arranged for each bonding pad 125. The semiconductor substrate removal region 190 is also formed at the edge of the imaging element 1. Such a shaped semiconductor substrate removal region 190 can be shared with adjacent imaging elements 1 in a wafer-like imaging element 1 before being singulated. That is, the semiconductor substrate removal region 190 in FIG. 6B can be formed by commonly removing the semiconductor substrate 110 at the edge of adjacent imaging elements 1 and then dicing. The semiconductor substrate removal region 190 of the imaging element 1 in FIG. 2 can be formed in a similar manner.

[0048] The image sensor 1 in FIG. 6C illustrates an example of semiconductor substrate removal regions 190 that are arranged for each bonding pad 125 and that are arranged in regions excluding the edges of the image sensor 1.

[0049] In this way, in the imaging device 1 according to the first embodiment of the present disclosure, the adhesive strength of the bonding wires 90 can be measured by removing the semiconductor substrate near the adhesive pads 125.

[0050] (2. Second Embodiment) In the image sensor 1 of the first embodiment described above, the side surface of the semiconductor substrate 110 adjacent to the semiconductor substrate removal region 190 is insulated by the penetrating insulating portion 119. In contrast, the image sensor 1 of the second embodiment of the present disclosure differs from the first embodiment described above in that insulation is performed by the insulating film 153.

[0051] [Cross-sectional structure of the image sensor] 7 is a cross-sectional view showing an example of the configuration of an image sensor according to a second embodiment of the present disclosure. Similar to FIG. 3, this figure is a cross-sectional view showing an example of the configuration of an image sensor 1. The image sensor 1 in this figure differs from the image sensor 1 in FIG. 3 in that the penetrating insulating portion 119 of the semiconductor substrate 110 is omitted, and an insulating film 153 is disposed on the surfaces of the semiconductor substrate 110 and the wiring region 120 adjacent to the semiconductor substrate removal region 190.

[0052] The insulating film 153 in the figure is configured in a shape that extends to the end of the image sensor 1 in the semiconductor substrate removal region 190, and is configured in a shape that covers the side surface of the semiconductor substrate 110. This insulating film 153 can insulate the side surface of the semiconductor substrate 110 that is adjacent to the semiconductor substrate removal region 190.

[0053] [Method of manufacturing image sensor] 8A to 8H are diagrams illustrating an example of a manufacturing method of an image sensor according to a second embodiment of the present disclosure. Similar to FIGS. 5A to 5F, FIGS. 8A to 8H are diagrams illustrating an example of a manufacturing process of the image sensor 1.

[0054] According to the process described in FIG. 5A, the pixel array section 10 except for the insulating film 153 is formed (FIG. 8A).

[0055] Next, a resist 401 having an opening 402 is placed (FIG. 8B), and the protective film 152 and the insulating film 141 are removed by etching (FIG. 8C). Next, the edge of the semiconductor substrate 110 is removed to form a semiconductor substrate removal region 190 (FIG. 8D). Next, the resist 401 is removed (FIG. 8E).

[0056] Next, an insulating film is placed on the back surface of the image sensor 1 to form the insulating film 153 (FIG. 8F). This can be done by depositing a film of SiO2 or the like using CVD (Chemical Vapor Deposition) or the like.

[0057] Next, a resist 403 having an opening 404 is placed (FIG. 8G), and the insulating layer 121 in the wiring region 120 is etched to form an opening 171 (FIG. 8H). Thereafter, the resist 403 is removed. The imaging element 1 can be manufactured by the above steps. The above steps are an example of a method for manufacturing a semiconductor element as described in the claims.

[0058] 8E, the insulating film described in Fig. 8F may be formed in the state where the resist 401 is disposed. In this case, the insulating film 153 is formed on the side surface of the semiconductor substrate 110 adjacent to the semiconductor substrate removal region 190 and on the surface of the wiring region 120.

[0059] Other than this, the configuration of the image sensor 1 is the same as the configuration of the image sensor 1 in the first embodiment of the present disclosure, and therefore a description thereof will be omitted.

[0060] In this way, the imaging element 1 according to the second embodiment of the present disclosure insulates the side surface of the semiconductor substrate 110 adjacent to the semiconductor substrate removal region 190 by the insulating film 153. The penetrating insulating portion 119 can be omitted, and the configuration of the imaging element 1 can be simplified.

[0061] (3. Third Embodiment) In the image sensor 1 of the first embodiment described above, the semiconductor substrate 110 is removed in the region where wire bonding is performed, exposing the end of the wiring region 120. In contrast, the image sensor 1 of the third embodiment of the present disclosure differs from the first embodiment described above in that a guard ring is disposed in the wiring region 120 at the end.

[0062] [Cross-sectional structure of the image sensor] 9 is a cross-sectional view showing an example of the configuration of an image sensor according to a third embodiment of the present disclosure. Similar to FIG. 3, this figure is a cross-sectional view showing an example of the configuration of an image sensor 1. The image sensor 1 in this figure differs from the image sensor 1 in FIG. 3 in that it includes a guard ring 126 at the end of the wiring region 120.

[0063] The guard ring 126 is disposed near the edge of the wiring region 120 to protect the wiring region 120. This guard ring 126 can be configured in a ring shape that follows the outer periphery of the image sensor 1. As described above, the image sensor 1 is separated into individual pieces by dicing. During this dicing, cracks and chips may occur in the wiring region 120. The guard ring 126 prevents the cracks from spreading and prevents damage to the image sensor 1. The guard ring 126 can be configured from a metal member. Specifically, the guard ring 126 can be configured from wires 122 and via plugs 123 that are alternately stacked as shown in the same figure.

[0064] Furthermore, the wiring 122 and via plugs 123, which are metal members constituting the guard ring 126, can be configured to be buried in the surface of the wiring region 120 adjacent to the semiconductor substrate removal region 190. That is, the wiring 122 and via plugs 123 constituting the guard ring 126 can be configured to be not exposed on the surface of the wiring region 120 adjacent to the semiconductor substrate removal region 190. In the guard ring 126 shown in the figure, an insulating layer 121 is disposed in region 127, which is the region between the surface of the wiring region 120 adjacent to the semiconductor substrate removal region 190. As described above, the semiconductor substrate removal region 190 is formed by etching the semiconductor substrate 110. If the wiring 122 and other components of the guard ring 126 are configured to be exposed in the wiring region 120 in the region where the semiconductor substrate 110 is etched, they may be etched simultaneously with the semiconductor substrate 110. In this case, the guard ring 126 will be damaged. By shaping the wiring 122 and via plug 123 that constitute the guard ring 126 so that they are embedded in the insulating layer 221 on the surface of the wiring region 120 that is adjacent to the semiconductor substrate removed region 190, it is possible to prevent damage to the guard ring 126. The guard ring 126 is an example of a wiring region protection portion as defined in the claims.

[0065] Other than this, the configuration of the image sensor 1 is the same as the configuration of the image sensor 1 in the first embodiment of the present disclosure, and therefore a description thereof will be omitted.

[0066] In this way, the imaging device 1 according to the third embodiment of the present disclosure can prevent damage during dicing by arranging the guard rings 126 at the ends of the wiring region 120.

[0067] (4. Fourth Embodiment) The image sensor 1 of the first embodiment described above uses a semiconductor substrate 110. In contrast, the image sensor 1 of the fourth embodiment of the present disclosure differs from the first embodiment described above in that it is configured by stacking multiple semiconductor substrates.

[0068] [Cross-sectional structure of the image sensor] 10 is a cross-sectional view showing an example of the configuration of an image sensor according to a fourth embodiment of the present disclosure. Similar to FIG. 3, this figure is a cross-sectional view showing an example of the configuration of an image sensor 1. The image sensor 1 in this figure differs from the image sensor 1 in FIG. 3 in that it further includes a semiconductor substrate 210 and that bonding pads for wire bonding are arranged in the wiring region of the semiconductor substrate 210.

[0069] The semiconductor substrate 110 in the figure is laminated by bonding the semiconductor substrate 210 and the wiring region together. In the semiconductor substrate 110 in the figure, a pad 128 is arranged on the surface of the wiring region 120. This pad 128 is an electrode that is bonded to a pad in the opposing wiring region when they are bonded together and transmits an electrical signal. The pad 128 can be made of copper (Cu).

[0070] The semiconductor substrate 210 is a semiconductor substrate on which elements are formed similarly to the semiconductor substrate 110. For example, elements of a pixel circuit that generates an image signal based on charges generated by the photoelectric conversion unit 101 arranged on the semiconductor substrate 110 and transferred by the charge transfer unit 102 can be arranged on this semiconductor substrate 210. A penetrating insulation part 219 having a configuration similar to that of the penetrating insulation part 119 can be arranged on the semiconductor substrate 210. Furthermore, wiring regions (wiring region 220a and wiring region 220b) are arranged on both sides of the semiconductor substrate 210.

[0071] The wiring region 220a is a wiring region that is bonded to the wiring region 120 of the semiconductor substrate 110. This wiring region 220a includes a pad 228a in addition to wiring 222a and an insulating layer 221a. The pad 228a is a pad that is bonded to the above-mentioned pad 128. The semiconductor substrates 110 and 210 can be bonded together by aligning the pads 128 and 228a and then applying heat and pressure to bond the insulating layer 121 of the wiring region 120 and the insulating layer 221a of the wiring region 220a. At this time, the pad 128 and the pad 228a are also bonded and electrically connected.

[0072] The wiring region 220b is a wiring region to which the support substrate 160 is bonded. This wiring region 220b includes wiring 222b and an insulating layer 221b. Furthermore, bonding pads 225 are arranged in the wiring region 220b. These bonding pads 225 are pads to which bonding wires 90 are bonded. An opening 271 is formed in the insulating layer 221b near the bonding pads 225. Wire bonding can be performed through this opening 271.

[0073] The semiconductor substrate removal region 190 in the figure is a region where the semiconductor substrate 110 and the semiconductor substrate 210 have been removed. Specifically, the semiconductor substrate removal region 190 in the figure is a region where the insulating film 153, the protective film 152, the insulating film 141, the semiconductor substrate 110, the wiring region 120, the wiring region 220a, and the semiconductor substrate 210 have been removed. By arranging this semiconductor substrate removal region 190, wire bonding can be performed and the adhesive strength of the bonding wire 90 can be measured. Note that the semiconductor substrate 1 10 is an example of the second semiconductor substrate described in the claims.

[0074] [Other configurations of image sensors] Fig. 11 is a cross-sectional view showing another example configuration of an image sensor according to the fourth embodiment of the present disclosure. Similar to Fig. 10, Fig. 11 is a cross-sectional view showing an example configuration of an image sensor 1. The image sensor 1 in Fig. 11 differs from the image sensor 1 in Fig. 10 in that it includes a semiconductor substrate 310 instead of the support substrate 160.

[0075] The semiconductor substrate 210 in the figure is laminated by bonding the wiring regions together with the semiconductor substrate 310. In the semiconductor substrate 210 in the figure, a pad 228b is arranged on the surface of the wiring region 220b.

[0076] The semiconductor substrate 310 is a semiconductor substrate on which elements are formed, similar to the semiconductor substrate 110. For example, elements of the vertical drive unit 20 and the column signal processing unit 30 described in Fig. 1 can be arranged on this semiconductor substrate 310. A wiring region 320 is arranged on the semiconductor substrate 310.

[0077] The wiring region 320 includes wiring 322 and an insulating layer 321. Furthermore, a pad 328 is arranged in the wiring region 320. This wiring region 320 is a wiring region that is bonded to the wiring region 220b of the semiconductor substrate 210. When bonded together, the pad 228b and the pad 328 are adhered and electrically connected.

[0078] 12 is a cross-sectional view showing another example of the configuration of an image sensor according to the fourth embodiment of the present disclosure. Similar to FIG. 11, this figure is a cross-sectional view showing the example of the configuration of the image sensor 1. The image sensor 1 in this figure differs from the image sensor 1 in FIG. 11 in that it includes a semiconductor substrate 310 that is smaller than the semiconductor substrate 210 and a support substrate 160.

[0079] The semiconductor substrate 310 in the figure is a semiconductor substrate configured to be smaller in size than the semiconductor substrate 210. This semiconductor substrate 310 is an individualized semiconductor substrate and is bonded to the front side of the wafer-shaped imaging element 1. This type of mounting form is called COW (Chip on Wafer). The semiconductor substrate 310 bonded to the semiconductor substrate 210 is sealed with a sealing material 380 and a support substrate 160.

[0080] 3, the semiconductor substrate removal region 190 in the figure can be a region where the insulating film 153, the protective film 152, the insulating film 141, and the semiconductor substrate 110 have been removed. An opening 272 is formed near the bonding pad 225. This opening 272 is configured to have a shape that penetrates the wiring region 120, the wiring region 220a, and the semiconductor substrate 210. Wire bonding can be performed to the bonding pad 225 through this opening 272.

[0081] A penetrating insulating portion 218 is disposed around the opening 272 of the semiconductor substrate 210. This penetrating insulating portion 218 can be configured in a shape that surrounds the opening 272. By disposing the penetrating insulating portion 218, the surface of the semiconductor substrate 210 that contacts the opening 272 can be insulated.

[0082] Other than this, the configuration of the image sensor 1 is the same as the configuration of the image sensor 1 in the first embodiment of the present disclosure, and therefore a description thereof will be omitted.

[0083] In this way, the imaging element 1 of the fourth embodiment of the present disclosure can measure the adhesive strength of wire bonding and bonding wire 90 by arranging semiconductor substrate removal area 190 when three or more semiconductor substrates are stacked.

[0084] (5. Configuration of imaging device) The technology according to the present disclosure can be applied to various products, for example, an imaging device such as a camera.

[0085] 13 is a diagram showing an example configuration of an imaging device to which the technology according to the present disclosure can be applied. The imaging device 1000 in the figure includes an imaging element 1001, a control unit 1002, an image processing unit 1003, a display unit 1004, a recording unit 1005, and a photographing lens 1006.

[0086] The photographing lens 1006 is a lens that collects light from a subject, and forms an image of the subject on the light receiving surface of the image sensor 1001.

[0087] The image sensor 1001 is a device that captures an image of a subject. A plurality of pixels, each having a photoelectric conversion unit that performs photoelectric conversion of light from the subject, are arranged on the light receiving surface of the image sensor 1001. These pixels each generate an image signal based on the electric charge generated by the photoelectric conversion. The image sensor 1001 converts the image signals generated by the pixels into digital image signals and outputs them to the image processing unit 1003. Note that one screen's worth of image signals is called a frame. The image sensor 1001 can also output image signals in frame units.

[0088] The control unit 1002 controls the image sensor 1001 and the image processing unit 1003. The control unit 1002 can be configured by an electronic circuit using, for example, a microcomputer.

[0089] The image processing unit 1003 processes the image signal from the image sensor 1001. Examples of image signal processing in the image processing unit 1003 include demosaic processing for generating image signals of colors that are missing when generating a color image, and noise reduction processing for removing noise from the image signal. The image processing unit 1003 can be configured, for example, by an electronic circuit using a microcomputer or the like.

[0090] The display unit 1004 displays an image based on the image signal processed by the image processing unit 1003. The display unit 1004 can be configured, for example, by a liquid crystal monitor.

[0091] The recording unit 1005 records images (frames) based on the image signals processed by the image processing unit 1003. The recording unit 1005 can be configured, for example, by a hard disk or a semiconductor memory.

[0092] The imaging device to which the present disclosure can be applied has been described above. The present technology can be applied to the imaging element 1001 among the above-mentioned components. Specifically, the imaging element 1 described in FIG. 1 can be applied to the imaging element 1001. Note that the image processing unit 1003 is an example of a processing circuit as claimed. The imaging device 1000 is an example of a semiconductor device as claimed.

[0093] The configuration of the second embodiment of the present disclosure can be applied to other embodiments. Specifically, the insulating film 153 of Fig. 7 can be applied to the third and fourth embodiments of the present disclosure.

[0094] The configuration of the third embodiment of the present disclosure can be applied to the other embodiments, specifically, the guard ring 126 of Fig. 9 can be applied to the second and fourth embodiments of the present disclosure.

[0095] (effect) The semiconductor element (image sensor 1) has a semiconductor substrate 110 and bonding pads 125. The semiconductor substrate 110 has elements formed thereon and a wiring region 120 having wiring 122 for transmitting signals from the elements disposed adjacent thereto. The bonding pads 125 are disposed in the wiring region 120 adjacent to a semiconductor substrate removal region 190, which is a region where the semiconductor substrate 110 has been removed, and are connected to the wiring 122, and a connection portion (bonding wire 90) for connecting to the outside is bonded to the bonding pads 125. The semiconductor substrate removal region 190 includes a region for measuring the adhesive strength between the bonding pads 125 and the connection portion (bonding wire 90). This allows the adhesive strength between the bonding pads 125 and the connection portion (bonding wire 90) to be measured.

[0096] The semiconductor substrate removal area 190 may also include an area for placing a test tool 500 that pushes and shears the connection portion (bonding wire 90) to measure the adhesive strength. This allows the adhesive strength to be measured using the test tool 500.

[0097] The semiconductor substrate removal area 190 may also include an area where the connection portion (bonding wire 90) moves when pressed for measuring the adhesive strength, thereby shearing the connection portion (bonding wire 90) for measuring the adhesive strength.

[0098] Furthermore, the semiconductor device may further include a penetrating insulating portion 119 that is arranged in the vicinity of the semiconductor substrate removal region 190 and is made of an insulating material and has a shape that penetrates the semiconductor substrate 110. This makes it possible to insulate the side surface of the semiconductor substrate 110.

[0099] The semiconductor substrate 110 may further include an insulating film 153 disposed on a surface of the semiconductor substrate 110 adjacent to the semiconductor substrate removal region 190. This allows the side surface of the semiconductor substrate 110 to be insulated.

[0100] The semiconductor substrate removal region 190 may be a region where an edge portion of the semiconductor substrate 110 has been removed. This allows the semiconductor substrate removal region 190 to be formed in common between the image pickup elements 1 arranged adjacently on the wafer in the manufacturing process.

[0101] Furthermore, the wiring region 120 may further include a wiring region protection section (guard ring 126) disposed along the edge of the wiring region 120. This makes it possible to protect the edge of the wiring region 120.

[0102] The wiring region protection portion (guard ring 126) may be made of a metal member embedded in a surface of the wiring region 120 adjacent to the semiconductor substrate removed region 190. This allows the end of the wiring region 120 to be protected by the metal member.

[0103] Furthermore, the wiring area 120 may have a plurality of bonding pads 125 arranged therein, and the semiconductor substrate removal area 190 may be an area between adjacent bonding pads 125. This allows the movement direction of the test fixture 500 to be limited to one direction when measuring the adhesive strength.

[0104] The bonding pads may also be arranged in the wiring region 220b of a second semiconductor substrate (semiconductor substrate 210) stacked on the semiconductor substrate 110. This makes it possible to measure the adhesive strength of the bonding pads 225 and the connection portions (bonding wires 90) of a semiconductor element formed by stacking multiple semiconductor substrates. This has the following effect.

[0105] Also, the second semiconductor substrate (semiconductor substrate 210) may further have an opening 272 formed therein for bonding the connection portion (bonding wire 90) to the bonding pad 225. This allows the connection portion (bonding wire 90) to be bonded via the opening 272.

[0106] The semiconductor device may further include a penetrating insulating portion 218 that is arranged near the opening 272 of the second semiconductor substrate (semiconductor substrate 210) and is made of an insulator that has a shape that penetrates the second semiconductor substrate (semiconductor substrate 210). This makes it possible to insulate the wall surface of the opening 272 of the second semiconductor substrate (semiconductor substrate 210).

[0107] The element may also be a photoelectric conversion unit that performs photoelectric conversion of incident light. This makes it possible to measure the adhesive strength between the bonding pad 125 of the imaging element 1 that performs photoelectric conversion of incident light and the connection unit (bonding wire 90).

[0108] The semiconductor device (imaging device 1000) also includes a semiconductor substrate 110, bond pads 125, and a processing circuit (image processing unit 1003). The semiconductor substrate 110 has elements formed thereon and a wiring region 120 having wires 122 for transmitting signals from the elements disposed adjacent thereto. The bond pads 125 are disposed in the wiring region 120 adjacent to a semiconductor substrate removal region 190, which is a region from which the semiconductor substrate 110 has been removed, and are connected to the wires 122. A connection portion (bonding wire 90) for connecting to an external device is bonded to the bond pads 125. The processing circuit (image processing unit 1003) processes the transmitted signal. The semiconductor substrate removal region 190 includes a region for measuring the adhesive strength between the bond pads 125 and the connection portion (bonding wire 90). This allows the adhesive strength between the bond pads 125 and the connection portion (bonding wire 90) to be measured.

[0109] Furthermore, a method for manufacturing a semiconductor element (image sensor 1) includes the steps of: arranging, on a semiconductor substrate 110 on which an element is formed, a wiring region 120 including wiring 122 for transmitting signals from the element and bonding pads 125 connected to the wiring 122 and to which connection portions (bonding wires 90) for connection to the outside are bonded; and removing the semiconductor substrate 110 from a region near the bonding pads 125, wherein the step of removing the semiconductor substrate 110 removes the region including a region for measuring the adhesive strength between the adhesive pads 125 and the connection portions (bonding wires 90). This allows the adhesive strength between the adhesive pads 125 and the connection portions (bonding wires 90) to be measured.

[0110] The effects described in this specification are merely examples and are not limiting, and other effects may also be present.

[0111] The present technology can also be configured as follows. (1) a semiconductor substrate on which elements are formed and on which wiring regions having wiring for transmitting signals of the elements are arranged adjacent to each other; an adhesive pad disposed in the wiring region adjacent to the semiconductor substrate removal region, which is the region where the semiconductor substrate has been removed, and connected to the wiring, and to which a connection portion for connection with the outside is attached; and The semiconductor substrate removal area includes an area for measuring the adhesive strength of the adhesive pads and the connecting portions. Semiconductor element. (2) The semiconductor element according to (1), wherein the semiconductor substrate removal area includes an area for placing an instrument that pushes and shears the connection portion to measure the adhesive strength. (3) The semiconductor element according to (1), wherein the semiconductor substrate removal area includes an area where the connection portion moves when pressed to measure the adhesive strength. (4) The semiconductor element according to any one of (1) to (3), further comprising a penetrating insulating portion arranged in the vicinity of the semiconductor substrate removal region and made of an insulating material having a shape penetrating the semiconductor substrate. (5) The semiconductor element according to any one of (1) to (4), further comprising an insulating film disposed on a surface of the semiconductor substrate adjacent to the semiconductor substrate removal region. (6) The semiconductor element according to any one of (1) to (5), wherein the semiconductor substrate removal region is a region where an edge of the semiconductor substrate is removed. (7) The semiconductor element according to (6) above, further comprising a wiring region protection portion disposed along an edge of the wiring region. (8) The semiconductor element according to (7), wherein the wiring region protection portion is made of a metal member embedded in a surface of the wiring region adjacent to the semiconductor substrate removal region. (9) The wiring region has a plurality of the bonding pads arranged therein, The semiconductor substrate removal area is the area between adjacent bond pads. The semiconductor element according to any one of (1) to (5) above. (10) The semiconductor element according to any one of (1) to (9), wherein the bonding pad is disposed in a wiring region of a second semiconductor substrate that is stacked on the semiconductor substrate. (11) The semiconductor element according to (10), further comprising an opening formed in the second semiconductor substrate for bonding the connection portion to the bonding pad. (12) The semiconductor element according to (11), further comprising a penetrating insulating portion arranged in the vicinity of the opening of the second semiconductor substrate and made of an insulator having a shape penetrating the second semiconductor substrate. (13) The semiconductor element according to any one of (1) to (12), wherein the element is a photoelectric conversion unit that performs photoelectric conversion of incident light. (14) a semiconductor substrate on which elements are formed and on which wiring regions having wiring for transmitting signals of the elements are arranged adjacent to each other; an adhesive pad disposed in the wiring region adjacent to the semiconductor substrate removal region, which is the region where the semiconductor substrate has been removed, and connected to the wiring, and to which a connection portion for connection to an external device is attached; a processing circuit for processing the transmitted signal; and The semiconductor substrate removal area includes an area for measuring the adhesive strength of the adhesive pads and the connecting portions. Semiconductor device. (15) a step of arranging a wiring region on a semiconductor substrate on which elements are formed, the wiring region including wiring for transmitting signals of the elements and bonding pads connected to the wiring and to which connection portions for connecting to the outside are bonded; removing the semiconductor substrate in an area adjacent the bond pad; Including, The step of removing the semiconductor substrate includes removing the area including the area for measuring the adhesive strength of the adhesive pads and the connecting portions. A method for manufacturing semiconductor devices. [Explanation of symbols]

[0112] 1, 1001 image sensor 10 Pixel array section 30 Column signal processing section 90 Bonding Wire 91 Adhesive part 100 pixels 110, 210, 310 Semiconductor substrate 119, 218, 219 Penetrating insulation 120, 220a, 220b, 320 wiring area 121, 221, 221a, 221b, 321 insulating layer 122, 222a, 222b, 322 wiring 123 Via Plug 124 Contact plug 125, 225 adhesive pads 126 Guard Ring 152 Protective film 153 Insulating Film 160 Support substrate 171, 271, 272 openings 190 Semiconductor substrate removal area 191, 192 area 500 Test Equipment 1000 Imaging Device

Claims

1. a semiconductor substrate on which elements are formed; a wiring region disposed adjacent to the semiconductor substrate and having wiring and an insulating layer for transmitting signals of the element; a plurality of bonding pads disposed in the wiring area and connected to the wiring, and to which connection portions for connection with an external device are bonded; a semiconductor substrate removal region formed by an opening that is disposed for each of the plurality of bonding pads, penetrates the semiconductor substrate, includes a region whose bottom is adjacent to the bonding pad, and is shaped to contact an edge of the semiconductor substrate; and The semiconductor substrate removal area includes an area for measuring the adhesive strength of the adhesive pads and the connecting portions. Semiconductor element.

2. The semiconductor element according to claim 1 , wherein the semiconductor substrate removal area includes an area where an instrument for pressing and shearing the connection portion to measure the adhesive strength is placed.

3. The semiconductor device according to claim 1 , wherein the semiconductor substrate removal area includes an area where the connection portion moves when pressed for measuring the adhesive strength.

4. 2. The semiconductor element according to claim 1, further comprising a penetrating insulating portion disposed in the vicinity of the semiconductor substrate removal region and made of an insulating material having a shape penetrating the semiconductor substrate.

5. The semiconductor device according to claim 1 , further comprising an insulating film disposed on a surface of the semiconductor substrate adjacent to the semiconductor substrate removal region.

6. 2. The semiconductor device according to claim 1, further comprising a wiring region protection portion formed of a metal member embedded in the wiring region and disposed along an edge of the wiring region.

7. A semiconductor element as described in claim 1, wherein the multiple semiconductor substrate removal regions are configured in a shape having three side walls.

8. The semiconductor device according to claim 1 , further comprising a second semiconductor substrate laminated on the semiconductor substrate.

9. The semiconductor element according to claim 1 , wherein the element is a photoelectric conversion portion that performs photoelectric conversion of incident light.

10. a semiconductor substrate on which elements are formed; a wiring region disposed adjacent to the semiconductor substrate and having wiring and an insulating layer for transmitting signals of the element; a plurality of bonding pads disposed in the wiring area and connected to the wiring, and to which connection portions for connection with an external device are bonded; a semiconductor substrate removal region formed by an opening that is disposed for each of the plurality of bonding pads, penetrates the semiconductor substrate, includes a region whose bottom is adjacent to the bonding pad, and is shaped to contact an edge of the semiconductor substrate; a processing circuit for processing the transmitted signal; and The semiconductor substrate removal area includes an area for measuring the adhesive strength of the adhesive pads and the connecting portions. Semiconductor device.

11. a step of adjacently arranging a wiring region on a semiconductor substrate on which elements are formed, the wiring region including wiring for transmitting signals of the elements, an insulating layer, and a plurality of bonding pads connected to the wiring and to which connection portions for connecting to an external device are bonded; forming openings in the semiconductor substrate, the openings being arranged for each of the plurality of bonding pads, penetrating the semiconductor substrate, the openings including a region having a bottom adjacent to the bonding pad and a region for measuring adhesive strength between the bonding pad and the connecting portion, and a shape that contacts an edge of the semiconductor substrate; A method for manufacturing a semiconductor device, comprising:

Images