Semiconductor device manufacturing method

Abstract

To provide a manufacturing method that stabilizes the electrical connection between an electrode pad and a through-hole electrode and improves the yield rate of semiconductor devices.SOLUTION: A method for manufacturing a semiconductor device includes forming a first through-hole penetrating from a first surface to a second surface of a semiconductor substrate, forming a second insulating film on the first surface of the semiconductor substrate and a side surface of the first through-hole, placing a resist on the surface of the second insulating film over the edge of the first surface on the side surface of the first through-hole from the first surface of the semiconductor substrate, wet etching the second insulating film by using the resist as a mask, covering the first surface of the semiconductor substrate and the side surface of the first through hole with an organic insulating film, and forming the second conductive film on the surface of the organic insulating film.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] The present invention relates to a method for manufacturing a semiconductor device. [Background technology]

[0002] Patent Document 1 discloses a method for manufacturing a semiconductor device including a silicon substrate having a through-hole penetrating from one main surface to another main surface opposite the one main surface, a CVD oxide film provided on the side surface of the through-hole, an organic insulating film provided on the CVD oxide film, an Al film exposed at the bottom of the through-hole, and a silicon through electrode provided on the organic insulating film and connected to the Al film. The Al film is used as a device pad for connecting the semiconductor device. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2018-113466 Summary of the Invention [Problem to be solved by the invention]

[0004] However, in the semiconductor device manufacturing method described in Patent Document 1, the CVD oxide film formed on the side surface of the through hole tends to become thinner toward the bottom of the through hole. This tendency becomes more pronounced as the aspect ratio of the through hole increases. Furthermore, the Bosch method is used to form through holes with large aspect ratios. When through holes are formed using the Bosch method, scallops are formed on the side surface of the through hole, which tends to result in uneven thickness of the CVD oxide film formed on the side surface of the through hole. As a result, the CVD oxide film formed on the side surface of the through hole tends to have weaker adhesion to the side surface of the through hole toward the bottom of the through hole. Because the CVD oxide film formed on the side surface near the bottom of the through hole has weaker adhesion to the side surface of the through hole, there is a risk that the CVD oxide film will peel off during the semiconductor device manufacturing process and adhere to the Al film exposed at the bottom of the through hole. When the CVD oxide film falls off the Al film, the electrical connection between the Al film and the silicon through-electrode becomes unstable, resulting in a problem of reduced yield of the semiconductor device. [Means for solving the problem]

[0005] A method for manufacturing a semiconductor device includes: arranging a first insulating film and a first conductive film in this order on a second surface of a semiconductor substrate having a first surface and a second surface; forming a first through hole penetrating from the first surface to the second surface of the semiconductor substrate, and exposing the first insulating film arranged on the second surface from the first through hole; forming a second insulating film on the first surface of the semiconductor substrate and on a side surface of the first through hole; arranging a resist on a surface of the second insulating film from the first surface of the semiconductor substrate to an end of the side surface of the first through hole on the first surface side; wet-etching the first insulating film and the second insulating film using a mask of the insulating film to form a second through-hole in the first insulating film that is continuous with the first through-hole; covering the first surface of the semiconductor substrate, the side surface of the first through-hole, the side surface of the second through-hole, and a surface of the first conductive film exposed from the second through-hole with an organic insulating film; forming an opening in the organic insulating film that exposes the first conductive film; and forming a second conductive film on the surface of the organic insulating film and on the surface of the first conductive film exposed from the opening formed in the organic insulating film. [Brief explanation of the drawings]

[0006] [Figure 1] FIG. 1 is a cross-sectional view of a semiconductor device according to a first embodiment. [Figure 2] 3 is a flowchart showing an example of a method for manufacturing a semiconductor device according to the first embodiment. [Figure 3] 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device. [Figure 4] 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device. [Figure 5] FIG. 5 is an enlarged cross-sectional view of part D in FIG. 4. [Figure 6] 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device. [Figure 7] FIG. 7 is an enlarged cross-sectional view of part E in FIG. 6. [Figure 8] 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device. [Figure 9] 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device. [Figure 10] 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device. [Figure 11] 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device. [Figure 12] 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device. [Figure 13] FIG. 13 is an enlarged cross-sectional view of part G in FIG. 12. [Figure 14] FIG. 10 is a cross-sectional view of a semiconductor device according to a second embodiment. [Figure 15] FIG. 10 is a cross-sectional view of a semiconductor device according to a third embodiment. [Figure 16] FIG. 10 is a cross-sectional view of a semiconductor device according to a fourth embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0007] 1. Embodiment 1 A semiconductor device 1 according to the first embodiment will be described with reference to FIG. As shown in FIG. 1, the semiconductor device 1 includes a semiconductor substrate 2, a first insulating film 4, a first conductive film 6, a second insulating film 8, an organic insulating film 10, and a second conductive film 12.

[0008] The semiconductor substrate 2 has an upper surface 2A as a first surface and a lower surface 2B as a second surface that is opposite to the upper surface 2A. In this embodiment, the semiconductor substrate 2 is made of silicon. Note that the material constituting the semiconductor substrate 2 is not limited to silicon; for example, the semiconductor substrate 2 may be made of germanium, gallium nitride, or the like.

[0009] The semiconductor substrate 2 also has a first through hole 21 that penetrates from the upper surface 2A to the lower surface 2B. The first through hole 21 has a first opening 211 that opens to the upper surface 2A of the semiconductor substrate 2, a second opening 212 that opens to the lower surface 2B of the semiconductor substrate 2, and a side surface 213 that connects the first opening 211 and the second opening 212. In this embodiment, the side surface 213 is formed parallel to the thickness direction of the semiconductor substrate 2. The thickness direction of the semiconductor substrate 2 is the direction from the upper surface 2A toward the lower surface 2B of the semiconductor substrate 2.

[0010] The semiconductor substrate 2 also has a circuit (not shown) including active elements such as transistors. In this embodiment, this circuit is provided on the lower surface 2B of the semiconductor substrate 2.

[0011] The first insulating film 4 is disposed on the lower surface 2B of the semiconductor substrate 2. The first insulating film 4 covers a circuit (not shown) provided on the lower surface 2B of the semiconductor substrate 2. In this embodiment, the first insulating film 4 is made of silicon oxide. Note that the material constituting the first insulating film 4 is not limited to silicon oxide. For example, the first insulating film 4 may be made of silicon nitride or the like.

[0012] The first insulating film 4 also has a second through-hole 41 that penetrates from the upper surface of the first insulating film 4 to the lower surface of the first insulating film 4. The second through hole 41 is provided at a position communicating with the first through hole 21 of the semiconductor substrate 2. In detail, the second through hole 41 is located below the first through hole 21 and is provided continuous with the first through hole 21.

[0013] The first conductive film 6 is disposed on the lower surface of the first insulating film 4. That is, the first conductive film 6 is disposed on the lower surface 2B of the semiconductor substrate 2 via the first insulating film 4. In other words, the semiconductor substrate 2, the first insulating film 4, and the first conductive film 6 are disposed in this order.

[0014] Specifically, the first conductive film 6 is disposed below the second through hole 41 of the first insulating film 4. The first conductive film 6 covers the second opening 212 of the first through hole 21 of the semiconductor substrate 2 via the second through hole 41.

[0015] The first conductive film 6 is electrically connected, via wiring (not shown), to a circuit (not shown) provided on the lower surface 2B of the semiconductor substrate 2. The first conductive film 6 is used as an electrode pad for connecting the circuit to the outside of the semiconductor device 1.

[0016] In this embodiment, the first conductive film 6 is made of aluminum. However, the material that makes up the first conductive film 6 is not limited to aluminum. For example, the first conductive film 6 may be made of copper or the like.

[0017] The second insulating film 8 is disposed across from the upper surface 2A of the semiconductor substrate 2 to the end of the side surface 213 of the first through hole 21 on the upper surface 2A side. In other words, the second insulating film 8 is disposed so as to cover the shoulder portion 25 of the first through hole 21. The shoulder portion 25 is a corner where the upper surface 2A of the semiconductor substrate 2 and the side surface 213 of the first through hole 21 intersect.

[0018] In this embodiment, the second insulating film 8 is made of silicon oxide. Note that the material making up the second insulating film 8 is not limited to silicon oxide. For example, the second insulating film 8 may be made of silicon nitride or the like.

[0019] The organic insulating film 10 is disposed continuously on the upper surface 2A of the semiconductor substrate 2, the side surface 213 of the first through hole 21, the side surface 413 of the second through hole 41, and the upper surface 6A of the first conductive film 6, which is the surface of the first conductive film 6. A second insulating film 8 is disposed between the organic insulating film 10 and the upper surface 2A of the semiconductor substrate 2, and between the organic insulating film 10 and the end of the side surface 213 of the first through hole 21 on the upper surface 2A side.

[0020] The organic insulating film 10 has an opening 101 on the surface that is connected to the upper surface 6A of the first conductive film 6.

[0021] The organic insulating film 10 also has a surface 111. The surface 111 of the organic insulating film 10 is the surface on which a second conductive film 12 (described later) is disposed, and is the surface opposite to the surfaces facing the upper surface 2A of the semiconductor substrate 2, the side surface 213 of the first through-hole 21, and the side surface 413 of the second through-hole 41. The surface 111 of the organic insulating film 10 has a first surface 112, a second surface 113, and a third surface 114. The first surface 112 and the second surface 113 are the surface 111 of the organic insulating film 10 inside the first through-hole 21. The third surface 114 is the surface 111 of the organic insulating film 10 outside the first through-hole 21. The first surface 112 is a region of the surface 111 of the organic insulating film 10 that extends from the opening 101 in the organic insulating film 10 toward the upper surface 2A of the semiconductor substrate 2. The second surface 113 is a region of the surface 111 of the organic insulating film 10 that is located above the first surface 112 and extends from the first opening 211 of the first through-hole 21 toward the lower surface 2B of the semiconductor substrate 2. The third surface 114 is a region of the surface 111 of the organic insulating film 10 that is located on the upper surface 2A of the semiconductor substrate 2. The third surface 114 is connected to an end of the second surface 113 on the first opening 211 side. The end of the second surface 113 on the lower surface 2B side of the semiconductor substrate 2 is connected to an end of the first surface 112 on the upper surface 2A side of the semiconductor substrate 2. The end of the first surface 112 on the opening 101 side is connected to an upper surface 6A of the first conductive film 6.

[0022] In this embodiment, the first surface 112 and the second surface 113 of the organic insulating film 10 are continuously connected. The first surface 112 and the second surface 113 of the organic insulating film 10 have a tapered shape that gradually narrows from the upper surface 2A toward the lower surface 2B of the semiconductor substrate 2. In other words, the surface 111 of the organic insulating film 10 inside the first through-hole 21, i.e., the first surface 112 and the second surface 113 of the organic insulating film 10, have a tapered shape that gradually narrows from the upper surface 2A toward the lower surface 2B of the semiconductor substrate 2.

[0023] The surface 111 of the organic insulating film 10 may further have an intermediate surface (not shown) between the first surface 112 and the second surface 113 inside the first through-hole 21. In other words, the first surface 112 and the second surface 113 may be connected via an intermediate surface disposed between the first surface 112 and the second surface 113. The intermediate surface does not have to be tapered. For example, the intermediate surface may be parallel to the thickness direction of the semiconductor substrate 2.

[0024] In this embodiment, the organic insulating film 10 is made of an epoxy resin. However, the resin material that makes up the organic insulating film 10 is not limited to epoxy resin. For example, the organic insulating film 10 may be made of a polyimide resin, an acrylic resin, or the like.

[0025] The second conductive film 12 is disposed on the surface 111 of the organic insulating film 10 and on the upper surface 6A of the first conductive film 6. The second conductive film 12 and the first conductive film 6 are electrically connected to each other on the upper surface 6A of the first conductive film 6.

[0026] In detail, the second conductive film 12 is disposed inside the first through-hole 21 so as to cover the first surface 112 and the second surface 113 of the organic insulating film 10 and the upper surface 6A of the first conductive film 6 exposed through the opening 101 in the organic insulating film 10. Covering the first surface 112 and the second surface 113 of the organic insulating film 10 and the upper surface 6A of the first conductive film 6 with the second conductive film 12 forms a recess 121 surrounded by the second conductive film 12 inside the first through-hole 21. The recess 121 has an opening on the side of the upper surface 2A of the semiconductor substrate 2. The second conductive film 12 is disposed outside the first through-hole 21 so as to cover the third surface 114 of the organic insulating film 10. In this manner, the second conductive film 12 functions as a through electrode 100 that penetrates the semiconductor substrate 2.

[0027] In this embodiment, the second conductive film 12 is a metal film having a barrier layer (not shown) and a metal layer (not shown) laminated on the barrier layer. The barrier layer is made of an alloy of titanium and tungsten. The metal layer is made of copper. Note that the materials constituting the second conductive film 12 are not limited to the above-mentioned materials. For example, the barrier layer may be made of an alloy of titanium and nickel, and the metal layer may be made of aluminum. The barrier layer may also be omitted.

[0028] In this embodiment, the semiconductor device 1 also has a third insulating film 14. The third insulating film 14 is disposed on the lower surface of the first insulating film 4 with the first conductive film 6 interposed therebetween. In this embodiment, the third insulating film 14 is made of silicon oxide. Note that the material constituting the third insulating film 14 is not limited to silicon oxide. For example, the third insulating film 14 may be made of silicon nitride or the like.

[0029] So far, the semiconductor device 1 has been described. Next, a method for manufacturing the semiconductor device 1 according to this embodiment will be described with reference to Figures 2 to 13. Each step shown in Figures 2 to 13 is performed by, for example, a manufacturing device (not shown).

[0030] As shown in FIG. 2, the manufacturing method of the semiconductor device 1 includes step S1 of arranging a first insulating film 4 and a first conductive film 6 on a semiconductor substrate 2, step S2 of forming a first through hole 21 in the semiconductor substrate 2, step S3 of forming a second insulating film 8 on the semiconductor substrate 2, step S4 of arranging a resist 53 on the surface of the second insulating film 8, step S5 of wet-etching the first insulating film 4 and the second insulating film 8, step S6 of covering the semiconductor substrate 2 and the first conductive film 6 with an organic insulating film 10, step S7 of forming an opening 101 in the organic insulating film 10, and step S8 of forming a second conductive film 12 on the surface 111 of the organic insulating film 10 and the surface of the first conductive film 6.

[0031] Step S1 is a step of arranging a first insulating film 4 and a first conductive film 6 on a semiconductor substrate 2. In detail, step S1 is a step of arranging the first insulating film 4 and the first conductive film 6 in this order on a lower surface 2B of a semiconductor substrate 2 having an upper surface 2A and a lower surface 2B.

[0032] 3, in step S1, a first insulating film 4 and a first conductive film 6 are disposed in this order on the lower surface 2B of the semiconductor substrate 2. In detail, a circuit (not shown) is provided on the lower surface 2B of the semiconductor substrate 2, and the first insulating film 4 is disposed on the lower surface 2B so as to cover this circuit. Then, the first conductive film 6 is disposed on the lower surface 2B of the semiconductor substrate 2 with the first insulating film 4 interposed therebetween.

[0033] In this embodiment, the third insulating film 14 is disposed on the lower surface of the first insulating film 4 with the first conductive film 6 interposed therebetween.

[0034] As described above, in this embodiment, the semiconductor substrate 2 is made of silicon, the first insulating film 4 and the third insulating film 14 are made of silicon oxide, and the first conductive film 6 is made of aluminum.

[0035] Step S2 is a step of forming a first through hole 21 in the semiconductor substrate 2. More specifically, this is a step of forming the first through hole 21 that penetrates from the upper surface 2A to the lower surface 2B of the semiconductor substrate 2, and exposing the first insulating film 4 arranged on the lower surface 2B from the first through hole 21.

[0036] 4, in step S2, a first through-hole 21 is formed in the semiconductor substrate 2, penetrating from the upper surface 2A to the lower surface 2B thereof. The first through-hole 21 is formed in the semiconductor substrate 2 using well-known photolithography and etching techniques.

[0037] In this embodiment, first, a silicon oxide film 51 having an opening corresponding to the first through hole 21 is formed on the upper surface 2A of the semiconductor substrate 2. The semiconductor substrate 2 is etched using this silicon oxide film 51 as a mask, thereby forming the first through hole 21. Note that the mask used to form the first through hole 21 is not limited to the silicon oxide film 51. The mask used to form the first through hole 21 may be, for example, a resist having an opening corresponding to the first through hole 21.

[0038] In this embodiment, the first through holes 21 are formed by dry etching the semiconductor substrate 2. More specifically, the first through holes 21 are formed using the Bosch method. The Bosch method alternates between an etching step in which etching is performed using an etching gas and a deposition step in which a protective film is formed on the side surface 213 of the first through hole 21. This allows the Bosch method to perform etching with a high aspect ratio.

[0039] 5, scallops 23 are formed on side surface 213 of first through hole 21 formed using the Bosch method, due to isotropic etching in the etching process, the number of times the etching process is performed. Scallops 23 are recesses that are recessed toward the outside of first through hole 21 along a plane that intersects with the thickness direction of semiconductor substrate 2. As a result, the surface shape of the side surface 213 of the first through hole 21 has an uneven shape with a plurality of scallops 23 formed continuously.

[0040] By forming the first through-holes 21 that penetrate from the upper surface 2A to the lower surface 2B of the semiconductor substrate 2, the first insulating film 4 disposed on the lower surface 2B of the semiconductor substrate 2 is exposed from the first through-holes 21.

[0041] For ease of explanation, in Figures 4 and 5, a silicon oxide film 51 is shown as a mask for forming the first through hole 21, but in step S2, the silicon oxide film 51 is removed after the first through hole 21 is formed.

[0042] Step S3 is a step of forming the second insulating film 8 on the semiconductor substrate 2. More specifically, this is a step of forming the second insulating film 8 on the upper surface 2A of the semiconductor substrate 2 and the side surface 213 of the first through hole 21.

[0043] 6, in step S3, the second insulating film 8 is formed on the upper surface 2A of the semiconductor substrate 2 and the side surface 213 of the first through hole 21. In step S3, the second insulating film 8 is also formed on the upper surface of the first insulating film 4 exposed from the first through hole 21 through the second opening 212 of the first through hole 21.

[0044] In this embodiment, the second insulating film 8 is formed by using a CVD (Chemical Vapor Deposition) method. However, the method for forming the second insulating film 8 is not limited to the CVD method. For example, the second insulating film 8 may be formed by using a sputtering method.

[0045] As described above, in this embodiment, the second insulating film 8 is made of silicon oxide.

[0046] 7, second insulating film 8 formed on side surface 213 of first through hole 21 is formed to follow the surface shape of side surface 213. As a result, recesses 81 corresponding to scallops 23 formed on side surface 213 are formed in second insulating film 8, and the surface shape of second insulating film 8 has an uneven shape in which a plurality of recesses 81 corresponding to the plurality of scallops 23 are continuously formed.

[0047] Step S4 is a step of arranging resist 53 on the surface of second insulating film 8. More specifically, this is a step of arranging resist 53 on the surface of second insulating film 8, from the upper surface 2A of semiconductor substrate 2 to the end of side surface 213 of first through hole 21 on the upper surface 2A side of semiconductor substrate 2. The surface of second insulating film 8 is the surface opposite to the surfaces facing upper surface 2A of semiconductor substrate 2 and side surface 213 of first through hole 21, respectively.

[0048] In step S4, first, a resist 53 is applied to the surface of the second insulating film 8, and then the resist 53 applied to the surface of the second insulating film 8 is patterned.

[0049] 8, resist 53 is applied to the surface of second insulating film 8. In detail, resist 53 is applied to the surface of each of second insulating film 8 formed on upper surface 2A of semiconductor substrate 2 and second insulating film 8 formed on side surface 213 of first through hole 21, which is disposed at the end of second insulating film 8 on the upper surface 2A side of semiconductor substrate 2. First opening 211 of first through hole 21 is blocked with resist 53. In this embodiment, resist 53 is applied to second insulating film 8 using a spin coating method.

[0050] Next, the resist 53 applied to the second insulating film 8 is patterned. The resist 53 is patterned using a well-known photolithography technique. More specifically, of the resist 53 formed to block the first opening 211 of the first through-hole 21, a region 55 located at the center of the first through-hole 21 as viewed in the thickness direction of the semiconductor substrate 2 is removed. As a result, the resist 53 becomes as shown in FIG. 9.

[0051] 9, resist 53 is disposed on the surface of second insulating film 8 formed on upper surface 2A of semiconductor substrate 2 and on the surface of second insulating film 8 formed on side surface 213 of first through hole 21, the surface of second insulating film 8 disposed at an end portion on the upper surface 2A side of semiconductor substrate 2. That is, resist 53 is disposed on the surface of second insulating film 8 from upper surface 2A of semiconductor substrate 2 to the end portion on the upper surface 2A side of side surface 213 of first through hole 21 of semiconductor substrate 2. In other words, resist 53 is disposed so as to cover shoulder portion 25 of first through hole 21.

[0052] Step S5 is a step of wet-etching the first insulating film 4 and the second insulating film 8. More specifically, this is a step of wet-etching the first insulating film 4 and the second insulating film 8 using the resist 53 as a mask, thereby forming second through-holes 41 in the first insulating film 4 that are continuous with the first through-holes 21.

[0053] 10 , in step S5, first, the second insulating film 8 is wet-etched using the resist 53 as a mask. As a result, the second insulating film 8 arranged inside the first through hole 21 other than the end on the upper surface 2A side of the semiconductor substrate 2 is removed. Here, the second insulating film 8 arranged inside the first through hole 21 other than the end on the upper surface 2A side of the semiconductor substrate 2 refers to the second insulating film 8 formed on the side surface 213 of the first through hole 21 and arranged on the lower surface 2B side of the semiconductor substrate 2, and the second insulating film 8 formed on the upper surface of the first insulating film 4 through the second opening 212 of the first through hole 21.

[0054] By removing the second insulating film 8 formed on the upper surface of the first insulating film 4, the first insulating film 4 is exposed from the first through hole 21. In this embodiment, the first insulating film 4 and the second insulating film 8 are made of silicon oxide. Therefore, in step S5, the first insulating film 4 exposed from the first through hole 21 is also etched together with the second insulating film 8 formed on the upper surface of the first insulating film 4. In this manner, in step S5, the first insulating film 4 and the second insulating film 8 are etched together, and a second through hole 41 continuous with the first through hole 21 is formed in the first insulating film 4. By forming the second through hole 41, the upper surface 6A of the first conductive film 6 is exposed to the first through hole 21 via the second through hole 41.

[0055] In step S5, of the second insulating film 8 formed on the side surface 213 of the first through hole 21, the second insulating film 8 arranged on the lower surface 2B side of the semiconductor substrate 2 is removed, but the second insulating film 8 arranged on the end portion on the upper surface 2A side of the semiconductor substrate 2 is not removed. As a result, the second insulating film 8 is arranged from the upper surface 2A of the semiconductor substrate 2 to the end portion of the side surface 213 of the first through hole 21 on the upper surface 2A side of the semiconductor substrate 2.

[0056] Here, for example, if the second insulating film 8 formed on the side surface 213 of the first through hole 21, which is located on the lower surface 2B side of the semiconductor substrate 2, is not removed, the yield of the semiconductor device 1 may decrease, as in the conventional technology. The reason is that the second insulating film 8 arranged on the side surface 213 of the first through hole 21 on the side of the lower surface 2B of the semiconductor substrate 2 is likely to fall off from the side surface 213 during the manufacturing process of the semiconductor device 1. If the second insulating film 8 that has fallen off from the side surface 213 adheres to the upper surface 6A of the first conductive film 6 exposed in the first through hole 21, the electrical connection between the first conductive film 6 and the second conductive film 12 formed in step S8, which will be described later, becomes unstable, and the yield of the semiconductor device 1 decreases. However, in this embodiment, as described above, of the second insulating film 8 formed on the side surface 213 of the first through hole 21, the second insulating film 8 arranged on the lower surface 2B side of the semiconductor substrate 2 is removed, thereby reducing the falling off of the second insulating film 8 from the side surface 213 of the first through hole 21. This stabilizes the electrical connection between the first conductive film 6 and the second conductive film 12, improving the yield of the semiconductor device 1.

[0057] In this embodiment, the first insulating film 4 and the second insulating film 8 are etched by wet etching. Compared to dry etching, which processes the semiconductor substrate 2 one by one, wet etching allows batch processing of multiple semiconductor substrates 2 at once, thereby enabling the semiconductor device 1 to be manufactured more efficiently.

[0058] In this embodiment, the side surface 413 of the first insulating film 4 is over-etched in a direction along the lower surface 2B of the semiconductor substrate 2. As a result, the opening width 41D of the second through hole 41 formed in the first insulating film 4 is larger than the opening width 21D of the first through hole 21 on the lower surface 2B side.

[0059] In addition, in this embodiment, the second insulating film 8 arranged at the end of the side surface 213 of the first through hole 21 on the upper surface 2A side of the semiconductor substrate 2 is over-etched at its end surface 83 in a direction along the side surface 213 toward the upper surface 2A.

[0060] In this way, in step S5, the first insulating film 4 and the second insulating film 8 are each over-etched. By setting the etching conditions for the wet etching so that the first insulating film 4 and the second insulating film 8 are each over-etched, it is possible to reliably remove the second insulating film 8 arranged on the side surface 213 of the first through-hole 21 on the lower surface 2B side of the semiconductor substrate 2. This further improves the yield of the semiconductor device 1.

[0061] Although the resist 53 is shown in FIG. 10 for the sake of convenience, the resist 53 is removed in step S5 after the first insulating film 4 and the second insulating film 8 are etched.

[0062] Step S6 is a step of covering the semiconductor substrate 2 and the first conductive film 6 with the organic insulating film 10. In detail, step S6 is a step of covering the upper surface 2A of the semiconductor substrate 2, the side surface 213 of the first through hole 21, the side surface 413 of the second through hole 41, and the upper surface 6A of the first conductive film 6 exposed from the second through hole 41 with the organic insulating film 10.

[0063] 11 , the upper surface 2A of the semiconductor substrate 2, the side surface 213 of the first through hole 21, the side surface 413 of the second through hole 41, and the upper surface 6A of the first conductive film 6 exposed from the second through hole 41 are covered with the organic insulating film 10. In detail, the upper surface 2A of the semiconductor substrate 2 and the end portions of the side surface 213 of the first through hole 21 on the upper surface 2A side of the semiconductor substrate 2 are covered with the organic insulating film 10 via the second insulating film 8.

[0064] In step S6, the organic insulating film 10 is formed by applying a coating material containing a resin material that forms the organic insulating film 10 to the surface to be coated. The surface to be coated is the upper surface 2A of the semiconductor substrate 2, the side surface 213 of the first through hole 21, the side surface 413 of the second through hole 41, and the upper surface 6A of the first conductive film 6 exposed from the second through hole 41. In detail, in step S6, first, a pre-wet treatment is performed on the surface to be coated, and then a coating material containing a resin material that forms the organic insulating film 10 is applied to the surface to be coated.

[0065] Prewetting is a process in which the surface to be coated is wetted with a solvent for the paint before applying the paint containing the resin material that forms the organic insulating film 10. Prewetting improves the wettability of the surface to the paint containing the resin material that forms the organic insulating film 10. In this embodiment, the prewetting process is performed by first irradiating the surface to be coated with ultraviolet light to activate the surface, and then applying propylene glycol monomethyl ether acetate as a solvent to the surface to be coated.

[0066] After the pre-wetting process is completed, a coating material containing a resin material for forming the organic insulating film 10 is applied to the surface to be coated. In this embodiment, the coating material containing the resin material for forming the organic insulating film 10 is applied by spin coating to the upper surface 2A of the semiconductor substrate 2, the side surface 213 of the first through hole 21, the side surface 413 of the second through hole 41, and the upper surface 6A of the first conductive film 6 exposed from the second through hole 41.

[0067] In this embodiment, the resin material forming the organic insulating film 10 is a positive photosensitive resin. However, the resin material forming the organic insulating film 10 is not limited to a positive photosensitive resin. For example, a negative photosensitive resin may also be used.

[0068] As described above, in this embodiment, the organic insulating film 10 is made of epoxy resin.

[0069] 11 , in step S6, the organic insulating film 10 is formed so as to completely fill the second through-hole 41 and also fill the underside 2B of the semiconductor substrate 2 in the first through-hole 21 located above the second through-hole 41. The organic insulating film 10 forms a recess 103 inside the first through-hole 21 that is recessed toward the underside 2B of the semiconductor substrate 2. The recess 103 has a side surface 105 and a bottom surface 106. The side surface 105 has a tapered shape that gradually narrows toward the underside 2B of the semiconductor substrate 2. The bottom surface 106 has a meniscus shape that is recessed toward the underside 2B of the semiconductor substrate 2.

[0070] Step S7 is a step of forming an opening 101 in the organic insulating film 10 to expose the first conductive film 6.

[0071] As shown in FIG. 12, an opening 101 is formed in the organic insulating film 10, and the upper surface 6A of the first conductive film 6 is exposed through the opening 101.

[0072] In this embodiment, as described above, the organic insulating film 10 is formed of a positive photosensitive resin. First, a portion of the organic insulating film 10 corresponding to the opening 101 is exposed to light from the upper surface 2A side of the semiconductor substrate 2 using a mask (not shown). Next, the exposed organic insulating film 10 is developed. As a result, the portion of the organic insulating film 10 corresponding to the opening 101 is removed, and the opening 101 is formed in the organic insulating film 10.

[0073] Furthermore, by exposing and developing the organic insulating film 10 formed from a positive photosensitive resin from the upper surface 2A side of the semiconductor substrate 2, the surface 111 of the organic insulating film 10 inside the first through hole 21, i.e., the first surface 112 and the second surface 113 of the organic insulating film 10, are formed into a tapered shape that gradually narrows from the upper surface 2A toward the lower surface 2B of the semiconductor substrate 2.

[0074] In this embodiment, an exposure region 57, which is formed when the portion corresponding to the opening 101 is exposed using a mask (not shown), is located inside the outer edge of the second opening 212 of the first through hole 21. Therefore, the organic insulating film 10 located between the outer edge of the exposure region 57 and the outer edge of the second opening 212 of the first through hole 21 is not exposed. In other words, the organic insulating film 10 located between the outer edge of the exposure region 57 and the outer edge of the second opening 212 of the first through hole 21 is not removed in step S7. A surface 111 of the organic insulating film 10 located between the outer edge of the exposure region 57 and the outer edge of the second opening 212 of the first through hole 21 mainly corresponds to the side surface 105 of the recess 103 shown in FIG. 11 . Therefore, the surface 111 of the organic insulating film 10 located between the outer edge of the exposure region 57 and the outer edge of the second opening 212 of the first through hole 21 is formed in a tapered shape that gradually narrows toward the lower surface 2B of the semiconductor substrate 2.

[0075] Furthermore, in the exposed region 57, light irradiated onto the organic insulating film 10 from the upper surface 2A of the semiconductor substrate 2 is attenuated as it moves toward the lower surface 2B of the semiconductor substrate 2. Furthermore, the light irradiated onto the organic insulating film 10 from the upper surface 2A of the semiconductor substrate 2 is diffracted by the meniscus shape of the bottom surface 106 of the recess 103 shown in Fig. 11. Because such attenuation and diffraction of light occurs in the exposed region 57, when the exposed organic insulating film 10 is developed, the surface 111 of the organic insulating film 10 in the exposed region 57 is likely to be formed into a tapered shape that gradually narrows toward the lower surface 2B of the semiconductor substrate 2.

[0076] Furthermore, in the organic insulating film 10 after development, the surface 111 of the organic insulating film 10 located between the outer edge of the exposed region 57 and the outer edge of the second opening 212 of the first through hole 21 is continuously connected to the surface 111 of the organic insulating film 10 in the exposed region 57.

[0077] In this way, the surface 111 of the organic insulating film 10 inside the first through hole 21, i.e., the first surface 112 and the second surface 113 of the organic insulating film 10, are formed into a tapered shape that gradually narrows from the upper surface 2A toward the lower surface 2B of the semiconductor substrate 2.

[0078] That is, in step S7, the first surface 112 and the second surface 113 of the organic insulating film 10 are formed together with the opening 101. The first surface 112 and the second surface 113 of the organic insulating film 10 are continuously connected. Furthermore, the first surface 112 and the second surface 113 of the organic insulating film 10 have a tapered shape that gradually narrows from the upper surface 2A toward the lower surface 2B of the semiconductor substrate 2.

[0079] In this embodiment, the first surface 112 of the organic insulating film 10 is formed in the exposure region 57. However, a relay surface (not shown) may be formed in the exposure region 57 together with the first surface 112. As described above, the relay surface is disposed between the first surface 112 and the second surface 113. By appropriately adjusting the exposure conditions in the exposure region 57 and the shape of the bottom surface 106 of the recess 103 shown in FIG. 11 , the relay surface can be formed parallel to the thickness direction of the semiconductor substrate 2, for example.

[0080] 13 , a plurality of scallops 23 are formed on the side surface 213 of the first through hole 21, and a plurality of recesses 81 corresponding to the scallops 23 formed on the side surface 213 are formed in the second insulating film 8 formed on the side surface 213 of the first through hole 21. The scallops 23 and the recesses 81 are filled with the organic insulating film 10 disposed on the side surface 213 of the first through hole 21. As a result, the second surface 113 of the organic insulating film 10 disposed on the side surface 213 of the first through hole 21 becomes a smooth surface. Although not shown in FIG. 13 , the first surface 112 of the organic insulating film 10 also becomes a smooth surface, similar to the second surface 113. Therefore, in step S8, which will be described later, the second conductive film 12 can be stably formed on the first surface 112 and the second surface 113 of the organic insulating film 10.

[0081] Step S8 is a step of forming a second conductive film 12 on the surface 111 of the organic insulating film 10 and the upper surface 6A, which is the surface of the first conductive film 6. In detail, this is a step of forming the second conductive film 12 on the first surface 112, the second surface 113, and the third surface 114 of the organic insulating film 10, and on the upper surface 6A of the first conductive film 6 exposed from the opening 101 formed in the organic insulating film 10.

[0082] In this embodiment, the second conductive film 12 is formed by sputtering. However, the method for forming the second conductive film 12 is not limited to sputtering. For example, the second conductive film 12 may be formed by vapor deposition.

[0083] As described above, in this embodiment, the second conductive film 12 is a metal film including a barrier layer (not shown) and a metal layer (not shown) stacked on the barrier layer. The barrier layer is made of an alloy of titanium and tungsten. The metal layer is made of copper.

[0084] In step S8, a second conductive film 12 is formed on the first surface 112, the second surface 113, and the third surface 114 of the organic insulating film 10 and on the upper surface 6A of the first conductive film 6, thereby manufacturing the semiconductor device 1 shown in FIG. In this manner, the semiconductor device 1 is manufactured through the above-described steps S1 to S8.

[0085] As described above, if the second insulating film 8 that has fallen off from the side surface 213 of the first through hole 21 adheres to the upper surface 6A of the first conductive film 6, the electrical connection between the second conductive film 12 formed in step S8 and the first conductive film 6 may become unstable, which may reduce the yield of the semiconductor device 1. However, in this embodiment, by performing step S5 to reduce the falling off of the second insulating film 8 from the side surface 213 of the first through hole 21, the electrical connection between the second conductive film 12 formed in step S8 and the first conductive film 6 is stabilized, and the yield of the semiconductor device 1 is improved.

[0086] Here, for example, in order to reduce the falling off of the second insulating film 8 from the side surface 213 of the first through hole 21, it is possible to omit step S3 and thereby not form the second insulating film 8, or to remove all of the second insulating film 8 arranged on the side surface 213 of the first through hole 21 in step S5. However, if the second insulating film 8 is not formed or if all of the second insulating film 8 arranged on the side surface 213 of the first through hole 21 is removed, there is a risk that the insulation between the semiconductor substrate 2 and the second conductive film 12 cannot be ensured at the shoulder portion 25 shown in FIG. The reason is that the thickness of the organic insulating film 10 tends to be thin at the shoulder portion 25. In other words, if the second insulating film 8 is not formed, or if the second insulating film 8 arranged on the side surface 213 of the first through hole 21 is completely removed, electrical insulation between the semiconductor substrate 2 and the second conductive film 12 at the shoulder portion 25 is achieved only by the organic insulating film 10. However, because the thickness of the organic insulating film 10 tends to be thin at the shoulder portion 25, there is a risk that the insulation between the semiconductor substrate 2 and the second conductive film 12 cannot be ensured. On the other hand, in this embodiment, as described above, the second insulating film 8 is disposed so as to cover the shoulder portion 25 of the first through hole 21. That is, the shoulder portion 25 is covered by the second insulating film 8 and the organic insulating film 10. Therefore, even if the thickness of the organic insulating film 10 is reduced at the shoulder portion 25, the insulation between the semiconductor substrate 2 and the second conductive film 12 can be ensured.

[0087] 12 , in this embodiment, the surface 111 of the organic insulating film 10 inside the first through-hole 21, i.e., the first surface 112 and the second surface 113 of the organic insulating film 10, have a tapered shape that gradually narrows from the upper surface 2A toward the lower surface 2B of the semiconductor substrate 2. Therefore, when the second conductive film 12 is formed by a sputtering method or the like in step S8, the second conductive film 12 can be stably formed on the first surface 112 and the second surface 113 of the organic insulating film 10.

[0088] Furthermore, in this embodiment, the first surface 112 connected to the upper surface 6A of the first conductive film 6 has a tapered shape, so that electrical connection between the second conductive film 12 formed on the first surface 112 and the second conductive film 12 formed on the upper surface 6A of the first conductive film 6 can be reliably achieved.

[0089] Furthermore, in this embodiment, the second surface 113 connected to the third surface 114 has a tapered shape, so that the electrical connection between the second conductive film 12 formed on the third surface 114 and the second conductive film 12 formed on the second surface 113 can be reliably achieved.

[0090] 13, the second surface 113 of the organic insulating film 10 is a smooth surface. Similarly to the second surface 113, the first surface 112 is also a smooth surface. Therefore, in step S8, the second conductive film 12 can be stably formed on the first surface 112 and the second surface 113 of the organic insulating film 10.

[0091] As described above, according to this embodiment, the following effects can be obtained. The method for manufacturing the semiconductor device 1 includes: arranging a first insulating film 4 and a first conductive film 6 in this order on a lower surface 2B of a semiconductor substrate 2 having an upper surface 2A as a first surface and a lower surface 2B as a second surface; forming a first through hole 21 penetrating from the upper surface 2A to the lower surface 2B of the semiconductor substrate 2 and exposing the first insulating film 4 arranged on the lower surface 2B from the first through hole 21; forming a second insulating film 8 on the upper surface 2A of the semiconductor substrate 2 and a side surface 213 of the first through hole 21; arranging a resist 53 on a surface of the second insulating film 8 from the upper surface 2A of the semiconductor substrate 2 to an end of the side surface 213 of the first through hole 21 on the upper surface 2A side of the semiconductor substrate 2; The method includes wet-etching the first insulating film 4 and the second insulating film 8 using a resist 53 as a mask to form a second through hole 41 in the first insulating film 4 that is continuous with the first through hole 21; covering the upper surface 2A of the semiconductor substrate 2, the side surface 213 of the first through hole 21, the side surface 413 of the second through hole 41, and the upper surface 6A, which is the surface of the first conductive film 6 exposed from the second through hole 41, with an organic insulating film 10; forming an opening 101 in the organic insulating film 10 that exposes the first conductive film 6; and forming a second conductive film 12 on the surface 111 of the organic insulating film 10 and on the upper surface 6A of the first conductive film 6 exposed from the opening 101 formed in the organic insulating film 10. This reduces the likelihood of the second insulating film 8 falling off from the side surface 213 of the first through hole 21 during the manufacturing process of the semiconductor device 1. This stabilizes the electrical connection between the first conductive film 6 and the second conductive film 12, improving the yield of the semiconductor device 1.

[0092] 2. Embodiment 2 Next, a method for manufacturing the semiconductor device 1a according to the second embodiment will be described with reference to Fig. 14. The method for manufacturing the semiconductor device 1a is the same as that of the first embodiment, except that in step S7 in the first embodiment, a fourth surface 115 is formed as a relay surface between the first surface 112 and the second surface 113, together with the first surface 112 of the organic insulating film 10. The same components as those in the first embodiment are denoted by the same reference numerals, and the description thereof will be omitted.

[0093] 14, the semiconductor device 1a has an organic insulating film 10. A surface 111 of the organic insulating film 10 has a first surface 112, a second surface 113, a third surface 114, and a fourth surface 115. The fourth surface 115 is disposed between the first surface 112 and the second surface 113. The first surface 112 and the second surface 113 are connected via the fourth surface 115.

[0094] In this embodiment, the fourth surface 115 is formed parallel to the thickness direction of the semiconductor substrate 2, ignoring manufacturing variations. Note that, although the fourth surface 115 is formed parallel to the thickness direction of the semiconductor substrate 2 in this embodiment, the fourth surface 115 does not have to be parallel to the thickness direction of the semiconductor substrate 2. For example, the fourth surface 115 may have a tapered shape. Furthermore, for example, the fourth surface 115 may have an inverse tapered shape that gradually widens from the upper surface 2A toward the lower surface 2B of the semiconductor substrate 2, as long as the second conductive film 12 is formed on the first surface 112 and the fourth surface 115 of the organic insulating film 10 in step S8.

[0095] The method for manufacturing the semiconductor device 1a includes steps S1 to S8 shown in FIG. Specifically, in step S7 of the method for manufacturing the semiconductor device 1a, the first surface 112 of the organic insulating film 10 and the fourth surface 115 serving as a relay surface are formed between the first surface 112 and the second surface 113.

[0096] In order to form fourth surface 115 into a desired shape in step S7, for example, the shape of bottom surface 106 of recess 103 shown in FIG. 11 may be adjusted in step S6, or the exposure conditions of exposure region 57 shown in FIG. 12 may be adjusted in step S7. The exposure conditions of exposure region 57 can be adjusted by using, for example, a gradation mask. A gradation mask is a mask that has a two-dimensional distribution of light transmittance.

[0097] As described above, according to this embodiment, the same effects as those of the first embodiment can be obtained.

[0098] 3. Embodiment 3 Next, a method for manufacturing a semiconductor device 1b according to embodiment 3 will be described with reference to Fig. 15. The method for manufacturing the semiconductor device 1b is the same as that of embodiment 1, except that it includes a step of filling the recess 121 surrounded by the second conductive film 12 with a metal material 123. That is, the method for manufacturing the semiconductor device 1b further includes a step of filling the recess 121 surrounded by the second conductive film 12 with a metal material 123 in addition to steps S1 to S8 in embodiment 1. The same components as those in the first embodiment are denoted by the same reference numerals, and the description thereof will be omitted.

[0099] 15, a recess 121 surrounded by a second conductive film 12 is formed in the semiconductor device 1b. The recess 121 is then filled with a metal material 123. As a result, inside the first through hole 21, the second conductive film 12 and the metal material 123 filled in the recess 121 function as a through electrode 100b.

[0100] In this embodiment, the metal material 123 is copper. However, the metal material 123 is not limited to copper. The metal material 123 is not particularly limited as long as it is a metal having electrical conductivity.

[0101] 2, the method for manufacturing the semiconductor device 1b further includes a step of filling the recess 121 surrounded by the second conductive film 12 with a metal material 123. In the following description, the step of filling the recess 121 with the metal material 123 may be referred to as a "metal filling step."

[0102] The metal embedding step is performed after step S8.

[0103] In the metal filling step, the recess 121 surrounded by the second conductive film 12 is filled with a metal material 123. In this embodiment, in the metal filling step, a conductive paste containing a metal material 123 is printed from the upper surface 2A side of the semiconductor substrate 2. As a result, the recesses 121 are filled with the metal material 123. Note that the method for filling the recesses 121 with the metal material 123 is not limited to the printing method of printing a conductive paste. For example, the recesses 121 may be filled with the metal material 123 by using a plating method.

[0104] In this embodiment, by filling the recess 121 with the metal material 123, the second conductive film 12 and the metal material 123 filled in the recess 121 function as the through electrode 100b inside the first through hole 21. If the coverage of the second conductive film 12 formed in step S8 is low, the electrical connection of the second conductive film 12 may become unstable, but by reinforcing the coverage of the second conductive film 12 with the metal material 123, the reliability of the through electrode 100b is improved.

[0105] As described above, according to this embodiment, in addition to the effects of the first embodiment, the following effects can be obtained. According to the present embodiment, the recess 121 surrounded by the second conductive film 12 inside the first through hole 21 is filled with a metal material 123, so that the second conductive film 12 and the metal material 123 filled in the recess 121 can function as the through electrode 100b. This improves the reliability of the electrical connection in the through electrode 100b.

[0106] 4. Embodiment 4 Next, a method for manufacturing a semiconductor device 1c according to embodiment 4 will be described with reference to Fig. 16. The method for manufacturing the semiconductor device 1c is similar to that of embodiment 1, except that it includes a step of arranging a third conductive film 16 on the surface of the second conductive film 12. That is, the method for manufacturing the semiconductor device 1c further includes a step of arranging the third conductive film 16 on the surface of the second conductive film 12 in addition to steps S1 to S8 in embodiment 1. The same components as those in the first embodiment are denoted by the same reference numerals, and the description thereof will be omitted.

[0107] As shown in FIG. 16, the semiconductor device 1c includes a third conductive film 16. The third conductive film 16 is disposed on the surface of the second conductive film 12. The surface of the second conductive film 12 is the surface of the second conductive film 12 opposite to the surfaces facing the surface 111 of the organic insulating film 10 and the upper surface 6A of the first conductive film 6. Inside the first through-hole 21, the second conductive film 12 and the third conductive film 16 disposed on the surface of the second conductive film 12 function as a through-electrode 100c.

[0108] In this embodiment, the third conductive film 16 is made of copper. However, the material that makes up the third conductive film 16 is not limited to copper. The material that makes up the third conductive film 16 may be, for example, nickel or aluminum.

[0109] 2, the method for manufacturing the semiconductor device 1c further includes a step of arranging a third conductive film 16 on the surface of the second conductive film 12. In the following description, the step of arranging the third conductive film 16 on the surface of the second conductive film 12 may be referred to as a "third conductive film arranging step."

[0110] The third conductive film disposing step is performed after step S8.

[0111] In the third conductive film disposing step, a third conductive film 16 is disposed on the surface of the second conductive film 12. In this embodiment, in the third conductive film disposing step, the third conductive film 16 is formed by plating. Note that the method for forming the third conductive film 16 is not limited to plating. For example, the third conductive film 16 may be formed by sputtering.

[0112] In this embodiment, by disposing the third conductive film 16 on the surface of the second conductive film 12, the second conductive film 12 and the third conductive film 16 disposed on the surface of the second conductive film 12 function as the through electrode 100c inside the first through hole 21. If the coverage of the second conductive film 12 formed in step S8 is low, the electrical connection of the second conductive film 12 may become unstable, but by reinforcing the coverage of the second conductive film 12 with the third conductive film 16, the reliability of the through electrode 100c is improved.

[0113] As described above, according to this embodiment, in addition to the effects of the first embodiment, the following effects can be obtained. According to this embodiment, by disposing the third conductive film 16 on the surface of the second conductive film 12 inside the first through hole 21, the second conductive film 12 and the third conductive film 16 can function as the through electrode 100c, thereby improving the reliability of the electrical connection in the through electrode 100c.

[0114] The method for manufacturing a semiconductor device of the present invention has been described above based on the embodiments. However, the present invention is not limited to this, and the configuration of each part can be replaced with any configuration having a similar function. Furthermore, other arbitrary components may be added to the present invention. Furthermore, each embodiment may be combined as appropriate. [Explanation of symbols]

[0115] 1 to 1c...semiconductor device, 2...semiconductor substrate, 2A...upper surface (first surface) of semiconductor substrate, 2B...lower surface (second surface) of semiconductor substrate, 4...first insulating film, 6...first conductive film, 6A...upper surface (front surface) of first conductive film, 8...second insulating film, 10...organic insulating film, 12...second conductive film, 14...third insulating film, 21...first through hole, 25...shoulder of first through hole, 41...second through hole, 53...resist, 101...opening in organic insulating film, 111...surface of organic insulating film, 112...first surface of organic insulating film, 113...second surface of organic insulating film, 114...third surface of organic insulating film, 115...fourth surface of organic insulating film, 213...side surface of first through hole, 413...side surface of second through hole, S1 to S8...processes.

Claims

1. a semiconductor substrate having a first surface and a second surface, and a first insulating film and a first conductive film disposed in this order on the second surface; forming a first through-hole penetrating from the first surface to the second surface of the semiconductor substrate, and exposing the first insulating film disposed on the second surface from the first through-hole; forming a second insulating film on the first surface of the semiconductor substrate and on a side surface of the first through hole; disposing a resist on a surface of the second insulating film from the first surface of the semiconductor substrate to an end of the side surface of the first through hole on the first surface side; wet-etching the first insulating film and the second insulating film using the resist as a mask to form a second through-hole in the first insulating film, the second through-hole being continuous with the first through-hole; covering the first surface of the semiconductor substrate, the side surface of the first through hole, the side surface of the second through hole, and the surface of the first conductive film exposed from the second through hole with an organic insulating film; forming an opening in the organic insulating film to expose the first conductive film; forming a second conductive film on a surface of the organic insulating film and on the surface of the first conductive film exposed through the opening formed in the organic insulating film; A method for manufacturing a semiconductor device.

2. forming the opening exposing the first conductive film in the organic insulating film includes forming the surface of the organic insulating film inside the first through hole into a tapered shape that gradually narrows from the first surface toward the second surface, The method for manufacturing a semiconductor device according to claim 1 .

3. the organic insulating film is formed of a positive photosensitive resin, forming the opening in the organic insulating film to expose the first conductive film includes exposing and developing a portion of the organic insulating film corresponding to the opening from the first surface side of the semiconductor substrate to form the opening; The method for manufacturing a semiconductor device according to claim 1 .

4. filling a recess surrounded by the second conductive film with a metal material; 4. The method for manufacturing a semiconductor device according to claim 1.

5. disposing a third conductive film on a surface of the second conductive film; 4. The method for manufacturing a semiconductor device according to claim 1.

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