Switch device, electronic device, and vehicle

Abstract

To provide a switch device capable of suppressing an occurrence of a latch-up when an inductive load is disconnected, while ensuring driving at a time of voltage reduction.SOLUTION: A switch device (100) includes: a switching element (SW1); a control line that reaches a control end of the switch element from a third terminal (IN); a first circuit block (B1) that is configured to drive the switch element in accordance with a control signal supplied to the third terminal; at least one second circuit block (B2_1 to B2_4), each connected to each branch power supply line branched from the control line; a first resistor (R1) disposed between the third terminal and the first circuit block; and at least one second resistor (R2_1 to R2_4), each disposed on the corresponding branch power supply line. The first circuit block and the at least one second circuit block each include at least one P-channel MOSFET, and the branch power supply lines are branched from the control line between the third terminal and the first resistor.SELECTED DRAWING: Figure 4

Description

[Technical Field]

[0001] The invention disclosed in this specification relates to a switch device, an electronic device, and a vehicle. [Background technology]

[0002] A switching device such as an in-vehicle IPD (intelligent power device) is connected to, for example, an inductive load (see, for example, Patent Document 1).

[0003] 1 is a diagram showing an example of a connection between a solenoid, which is a type of inductive load, an automotive low-side switch IC, which is a type of switch device, and a DC power supply. The automotive low-side switch IC1 has an input terminal IN, a ground terminal GND, and an output terminal OUT.

[0004] The input terminal IN is connected to the positive electrode of the DC power supply 2. The ground terminal GND and the negative electrode of the DC power supply 2 are connected to the ground potential. The output terminal OUT is connected to a first terminal of the solenoid 3. A second terminal of the solenoid 3 is connected to an application terminal to which the output voltage Vbat of the battery mounted on the vehicle is applied.

[0005] If the automotive low-side switch IC1 is configured to include a P-channel MOSFET (Metal Oxide Semiconductor Field Effect Transistor), latch-up may occur if the solenoid 3 is disconnected, more specifically, if the electrical connection between the solenoid 3 and the application terminal to which the battery output voltage Vbat is applied is interrupted. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] JP 2020-96316 A (paragraph 0019) Summary of the Invention [Problem to be solved by the invention]

[0007] Here, the mechanism by which the latch-up occurs will be described with reference to the cross-sectional view of a P-channel MOSFET shown in FIG.

[0008] 2 is built into an in-vehicle low-side switch IC1. The P-channel MOSFET is formed on an N-type semiconductor substrate 10. A drain electrode 11 is formed on the back surface of the N-type semiconductor substrate 10, and an N-type epitaxial growth layer 12 is formed on the front surface of the N-type semiconductor substrate 10.

[0009] A P-type well 13 is formed in the N-type epitaxial growth layer 12. An N-type region 14 is formed in the P-type well 13, and a high-concentration P-type region 15 that serves as a gate, a high-concentration P-type region 16 that serves as a source, and a high-concentration N-type region 17 that serves as a back gate are further formed in the N-type region 14.

[0010] A parasitic diode D1 is formed by the P-type well 13 and the N-type epitaxial growth layer 12. A parasitic NPN transistor Tr1 is formed by the N-type region 14, the P-type well 13, and the N-type epitaxial growth layer 12. A parasitic PNP transistor Tr2 is formed by the high-concentration P-type region 16, the N-type region 14, and the P-type well 13.

[0011] When the solenoid 3 is disconnected, the potential of the drain electrode 11 swings negative, turning on the parasitic diode D1. When the parasitic diode D1 is turned on, the parasitic NPN transistor Tr1 is turned on, and a collector current I1 of the parasitic NPN transistor Tr1 flows.

[0012] When the base-emitter voltage of the parasitic PNP transistor Tr2 becomes equal to or greater than the forward voltage due to the flow of the collector current I1, the parasitic PNP transistor Tr2 turns on and an emitter current I2 of the parasitic PNP transistor Tr2 flows.

[0013] When the parasitic NPN transistor Tr1 turns on and a collector current I1 flows, a current also flows in the base of the parasitic PNP transistor Tr2. When the parasitic PNP transistor Tr2 turns on and an emitter current I2 flows, a current also flows in the base of the parasitic NPN transistor Tr1. In other words, the parasitic NPN transistor Tr1 and the parasitic PNP transistor Tr2 form a thyristor through which a current continues to flow, and this thyristor causes latch-up.

[0014] Therefore, by providing a current limiting resistor 4 between the DC power supply 2 and the input terminal IN as shown in FIG. 3, the above-mentioned parasitic thyristor is eliminated, making it possible to prevent latch-up from occurring.

[0015] However, the provision of the resistor 4 causes a drop in the voltage applied to the input terminal IN, which causes a problem in that the automotive low-side switch IC1 does not operate when the voltage drops (when the output voltage of the DC power supply 2 drops).

[0016] The switch device disclosed in this specification includes a first terminal, a second terminal, a third terminal, a switch element provided between the first and second terminals, a control line from the third terminal to a control end of the switch element, a first circuit block provided on the control line and configured to drive the switch element in response to a control signal supplied to the third terminal, at least one second circuit block connected to each of branch power supply lines branching from the control line, a first resistor provided between the third terminal and the first circuit block, and at least one second resistor provided on each of the branch power supply lines. Each block of the first circuit block and at least one of the second circuit blocks includes at least one P-channel MOSFET. The branch power supply lines branch off from the control line between the third terminal and the first resistor.

[0017] The electronic device disclosed in this specification includes a switch device having the above-described configuration and an inductive load connected to the switch device.

[0018] The vehicle disclosed in this specification is equipped with the electronic device having the above-described configuration. [Effects of the Invention]

[0019] The motor drive circuit, motor system, and electrical equipment disclosed in this specification can ensure drive during reduced voltage while suppressing the occurrence of latch-up when an inductive load is broken. [Brief explanation of the drawings]

[0020] [Figure 1] FIG. 1 is a diagram showing an example of connections between a solenoid, a low-side switch IC, and a DC power supply. [Figure 2] FIG. 2 is a cross-sectional view of a P-channel MOSFET. [Figure 3] FIG. 3 shows an example of a connection between a solenoid, a low-side switch IC, and a DC power supply that has latch-up prevention measures in place. [Figure 4] FIG. 4 is a diagram illustrating a configuration of a switch device according to the embodiment. [Figure 5] FIG. 5 is a diagram showing an example of the relationship between the area of ​​a P-type well and the resistance value of a resistor. [Figure 6] FIG. 6 is a diagram illustrating an example of a schematic layout of the switch device according to the embodiment. [Figure 7] FIG. 7 is an external view showing an example of the configuration of a vehicle. DETAILED DESCRIPTION OF THE INVENTION

[0021] In this specification, MOSFET refers to a field-effect transistor having a gate structure consisting of at least three layers: a layer made of a conductor or a semiconductor such as polysilicon with a low resistance, an insulating layer, and a P-type, N-type, or intrinsic semiconductor layer. In other words, the gate structure of a MOSFET is not limited to a three-layer structure of a metal, an oxide, and a semiconductor.

[0022] FIG. 4 is a diagram showing the configuration of a switch device 100 according to an embodiment (hereinafter abbreviated as switch device 100).

[0023] The switch device 100 is an in-vehicle low-side switch IC and includes an input terminal IN, an output terminal OUT, a ground terminal GND, and a status terminal ST.

[0024] The input terminal IN is connected to the positive electrode of the DC power supply 2, for example, as shown in FIG. 4. The ground terminal GND and the negative electrode of the DC power supply 2 are connected to the ground potential, for example, as shown in FIG. 4. The output terminal OUT is connected to a first terminal of the solenoid 3, for example, as shown in FIG. 4. A second terminal of the solenoid 3 is connected to an application terminal to which the output voltage Vbat of the battery mounted on the vehicle is applied. The status terminal ST is connected to an ECU (Electronic Control Unit) 200, for example, as shown in FIG. 4.

[0025] The switch device 100 includes switch elements SW1 and SW2, an active clamp AC1, a gate control circuit block B1, an undervoltage protection circuit block B2_1, a temperature protection circuit block B2_2, an overcurrent protection circuit block B2_3, a status signal control circuit block B2_4, resistors R1 and R2_1 to R2_4, a control line LN1, and branch power supply lines LN2_1 to LN2_4.

[0026] The switch elements SW1 and SW2 are each an N-channel MOSFET. The drain of the switch element SW1 is connected to the output terminal OUT. The drain of the switch element SW2 is connected to the status terminal ST. The sources of the switch elements SW1 and SW2 are connected to the ground terminal GND. For example, the switch element SW1 may be an N-channel MOSFET with a structure in which current flows between the source and drain in the thickness direction (vertical direction) of the semiconductor substrate, i.e., a vertical structure. For example, the switch element SW1 may be a DMOSFET (Double-Diffused MOSFET). For example, the switch element SW2 may be an N-channel MOSFET with a structure in which current flows between the source and drain in a direction (horizontal direction) parallel to the surface of the semiconductor substrate, i.e., a horizontal structure. For example, the switch element SW2 may be an N-channel MOSFET fabricated by a CMOS (Complementary MOS) process.

[0027] Due to a malfunction or noise, the voltage applied to the output terminal OUT may become negative (<ground potential). For this reason, an active clamp AC1 is provided to absorb energy. The active clamp AC1 is provided between the gate and drain of the switch element SW1. The active clamp AC1 includes a Zener diode and a diode. The cathode of the Zener diode is connected to the drain of the switch element SW1. The anode of the Zener diode is connected to the anode of the diode. The cathode of the diode is connected to the gate of the switch element SW1.

[0028] The control line LN1 is a line that connects the input terminal IN and the gate of the switch element SW1.

[0029] The gate control circuit block B1 is provided on the control line LN1 and is configured to drive the switch element SW1 in response to a control signal supplied to an input terminal IN.

[0030] When the input voltage VIN is supplied from the DC power supply 2 to the input terminal IN, that is, when the control signal supplied to the input terminal IN is at a high level, the gate control circuit block B1 is in an operating state, and the gate control signal supplied from the gate control circuit block B1 to the gate of the switch element SW1 becomes a high level, turning on the switch element SW1.

[0031] On the other hand, when the input voltage VIN is not supplied to the input terminal IN from the DC power supply 2, that is, when the control signal supplied to the input terminal IN is at a low level, the gate control circuit block B1 is in an inactive state, and the gate control signal supplied from the gate control circuit block B1 to the gate of the switch element SW1 is at a low level, turning the switch element SW1 off.

[0032] The under-voltage protection circuit block B2_1 is connected to a branch power supply line LN2_1 branched from the control line LN1. The under-voltage protection circuit block B2_1 monitors whether or not an under-voltage abnormality occurs in the input voltage VIN, and transmits the monitoring result to the status signal control circuit block B2_4. When the input voltage VIN is supplied from the DC power supply 2 to the input terminal IN, the under-voltage protection circuit block B2_1 is in an operating state. On the other hand, when the input voltage VIN is not supplied from the DC power supply 2 to the input terminal IN, the under-voltage protection circuit block B2_1 is in an inoperable state.

[0033] The thermal protection circuit block B2_2 is connected to a branch power supply line LN2_2 branched from the control line LN1. The thermal protection circuit block B2_2 includes a temperature sensor that detects abnormal heat generation in the switch device 100, monitors whether abnormal heat generation is occurring in the switch device 100, and transmits the monitoring result to the status signal control circuit block B2_4. When an input voltage VIN is supplied from the DC power supply 2 to the input terminal IN, the thermal protection circuit block B2_2 is in an operating state. On the other hand, when the input voltage VIN is not supplied from the DC power supply 2 to the input terminal IN, the thermal protection circuit block B2_2 is in an inoperable state.

[0034] The overcurrent protection circuit block B2_3 is connected to a branch power supply line LN2_3 branched from the control line LN1. The overcurrent protection circuit block B2_3 monitors whether an overcurrent abnormality occurs in the current flowing through the output terminal OUT and transmits the monitoring result to the status signal control circuit block B2_4. When an input voltage VIN is supplied from the DC power supply 2 to the input terminal IN, the overcurrent protection circuit block B2_3 is in an operating state. On the other hand, when the input voltage VIN is not supplied from the DC power supply 2 to the input terminal IN, the overcurrent protection circuit block B2_3 is in a non-operating state.

[0035] The status signal control circuit block B2_4 is connected to a branch power supply line LN2_4 branched from the control line LN1.

[0036] When at least one of the undervoltage protection circuit block B2_1, the temperature protection circuit block B2_2, and the overcurrent protection circuit block B2_3 detects an abnormality, the status signal control circuit block B2_4 outputs a high-level gate control signal to the gate of the switch element SW2, for example, and sets the status signal output from the status terminal ST to a low level.

[0037] On the other hand, when none of the undervoltage protection circuit block B2_1, the temperature protection circuit block B2_2, and the overcurrent protection circuit block B2_3 detects an abnormality, the status signal control circuit block B2_4 outputs a low-level gate control signal to the gate of the switch element SW2, for example, and sets the status signal output from the status terminal ST to a high level. Note that a pull-up resistor is connected to the status terminal ST.

[0038] The ground application terminals of the undervoltage protection circuit block B2_1, the temperature protection circuit block B2_2, the overcurrent protection circuit block B2_3, and the status signal control circuit block B2_4 are connected to the ground terminal GND.

[0039] The resistor R1 is provided between the input terminal IN and the gate control circuit block B1. The resistor R2_1 is provided on the branch power supply line LN2_1. The resistor R2_2 is provided on the branch power supply line LN2_2. The resistor R2_3 is provided on the branch power supply line LN2_3. The resistor R2_4 is provided on the branch power supply line LN2_4.

[0040] The branch power supply lines LN2_1 to LN2_4 branch off from the control line LN1 between the input terminal IN and the resistor R1.

[0041] Each of the gate control circuit block B1, the undervoltage protection circuit block B2_1, the temperature protection circuit block B2_2, the overcurrent protection circuit block B2_3, and the status signal control circuit block B2_4 includes at least one P-channel MOSFET. The P-channel MOSFET may have a lateral structure, in which current flows between the source and drain in a direction parallel to the surface of a semiconductor substrate (lateral direction). The P-channel MOSFET may be fabricated by a complementary metal-oxide semiconductor (CMOS) process. The sources of the P-channel MOSFETs are indirectly connected to a terminal IN. The drains of the P-channel MOSFETs are directly or indirectly connected to a terminal OUT. The P-wells (see FIG. 2) of the P-channel MOSFETs are connected to a terminal GND.

[0042] The switch device 100 configured as described above includes resistors R1 and R2_1 to R2_4 that limit the current flowing through each of the gate control circuit block B1, the undervoltage protection circuit block B2_1, the temperature protection circuit block B2_2, the overcurrent protection circuit block B2_3, and the status signal control circuit block B2_4. Therefore, by appropriately setting the resistance values ​​of the resistors R1 and R2_1 to R2_4, the gate control circuit block B1, the undervoltage protection circuit block B2_1, the temperature protection circuit block B2_2, the overcurrent protection circuit block B2_3, and the status signal control circuit block B2_4 can be driven during reduced voltage while preventing latch-up from occurring when the solenoid 3 is broken. As a result, the entire switch device 100 can be driven during reduced voltage while preventing latch-up from occurring when the solenoid 3 is broken.

[0043] 5 is a diagram showing an example of the relationship between the area of ​​a P-type well and the resistance value of a resistor. The relationship between the area of ​​a P-type well and the resistance value of a resistor (the minimum resistance value that can prevent latch-up) varies depending on the process. The area of ​​the P-type well refers to the total area of ​​the P-type wells in which the P-channel MOSFETs of each block, namely, the gate control circuit block B1, the undervoltage protection circuit block B2_1, the temperature protection circuit block B2_2, the overcurrent protection circuit block B2_3, and the status signal control circuit block B2_4, are arranged. The area of ​​the P-type well refers to the area viewed from the thickness direction of the N-type semiconductor substrate 10 (see FIG. 2).

[0044] 5 is the minimum resistance value that can prevent latch-up from occurring. For example, if the total area of ​​the P-type wells in which the P-channel MOSFETs of the gate control circuit block B1 are arranged is 2000 μm 2 In this case, if the resistance value of the resistor R1 is 1.18 kΩ or more, latch-up of the gate control circuit block B1 can be prevented.

[0045] Therefore, it is desirable that the resistance values ​​of the resistors R1 and R2_1 to R2_4 correspond to the total area of ​​the P-type wells in which the P-channel MOSFETs are arranged in the gate control circuit block B1, the undervoltage protection circuit block B2_1, the temperature protection circuit block B2_2, the overcurrent protection circuit block B2_3, and the status signal control circuit block B2_4. More specifically, it is desirable that the resistance values ​​be larger as the total area of ​​the P-type wells in which the P-channel MOSFETs are arranged is larger. This makes it possible to prevent the resistance values ​​of the resistors R1 and R2_1 to R2_4 from becoming unnecessarily large.

[0046] Note that, if the current consumption in the circuit block is small, the drive during reduced power can be ensured even if the above-mentioned resistance value is large. Therefore, if the above-mentioned resistance value is set taking into consideration the current consumption in the circuit block, the resistance value does not need to be set according to the total area of ​​the P-type well in which the P-channel MOSFET is disposed. For example, as long as the drive during reduced power can be ensured in each of the gate control circuit block B1, the undervoltage protection circuit block B2_1, the temperature protection circuit block B2_2, the overcurrent protection circuit block B2_3, and the status signal control circuit block B2_4 during the respective blocks, the resistance values ​​of the resistors R1 and R2_1 to R2_4 may be the same.

[0047] Fig. 6 is a diagram showing an example of a schematic layout of the switch device 100. Fig. 6 shows the layout as viewed from the thickness direction of the N-type semiconductor substrate 10 (see Fig. 2).

[0048] The switch element SW1 is a power element and therefore has a larger area than the gate control circuit block B1, the undervoltage protection circuit block B2_1, the temperature protection circuit block B2_2, the overcurrent protection circuit block B2_3, and the status signal control circuit block B2_4.

[0049] The gate control circuit block B1 and the resistor R1 are arranged adjacent to each other, meaning that no other circuit elements are arranged between them. This arrangement makes it possible to suppress the routing of the control line LN1.

[0050] The undervoltage protection circuit block B2_1 and the resistor R2_1 are arranged adjacent to each other. That is, no other circuit elements are arranged between the undervoltage protection circuit block B2_1 and the resistor R2_1. This arrangement can suppress the routing of the branch power line LN2_1.

[0051] The thermal protection circuit block B2_2 and the resistor R2_2 are arranged adjacent to each other. That is, no other circuit elements are arranged between the thermal protection circuit block B2_2 and the resistor R2_2. This arrangement can reduce the routing of the branch power line LN2_2.

[0052] The overcurrent protection circuit block B2_3 and the resistor R2_3 are arranged adjacent to each other. That is, no other circuit elements are arranged between the overcurrent protection circuit block B2_3 and the resistor R2_3. This arrangement can suppress the routing of the branch power line LN2_3.

[0053] The status signal control circuit block B2_4 and the resistor R2_4 are arranged adjacent to each other. That is, no other circuit elements are arranged between the status signal control circuit block B2_4 and the resistor R2_4. This arrangement can suppress the routing of the branch power line LN2_4.

[0054] The gate control circuit block B1, the undervoltage protection circuit block B2_1, the temperature protection circuit block B2_2, the overcurrent protection circuit block B2_3, the status signal control circuit block B2_4, and the switch element SW1 are aligned along a first direction DIR1. The gate control circuit block B1 and the resistor R1 are aligned along a second direction DIR2 that is perpendicular to the first direction DIR1. The undervoltage protection circuit block B2_1 and the resistor R2_1 are aligned along the second direction DIR2. The temperature protection circuit block B2_2 and the resistor R2_2 are aligned along the second direction DIR2. The overcurrent protection circuit block B2_3 and the resistor R2_3 are aligned along the second direction DIR2. The status signal control circuit block B2_4 and the resistor R2_4 are aligned along the second direction DIR2. This arrangement prevents the switch device 100 from becoming too long in only one of the first direction DIR1 or the second direction DIR2.

[0055] Fig. 7 is an external view showing an example of the configuration of a vehicle. The vehicle X shown in Fig. 7 is equipped with a battery (not shown) and various electronic devices X11 to X18 that operate by receiving power supply from the battery. Note that the installation positions of the electronic devices X11 to X18 in this figure may differ from the actual positions for convenience of illustration.

[0056] The electronic device X11 is an engine control unit that performs engine-related controls (injection control, electronic throttle control, idling control, oxygen sensor heater control, auto-cruise control, etc.).

[0057] The electronic device X12 is a lamp control unit that controls the turning on and off of HID (high intensity discharged lamp) and DRL (daytime running lamp).

[0058] The electronic device X13 is a transmission control unit that controls transmission-related functions.

[0059] The electronic device X14 is a body control unit that performs control related to the movement of the vehicle X (ABS [anti-lock brake system] control, EPS [electric power steering] control, electronic suspension control, etc.).

[0060] The electronic device X15 is a security control unit that controls the operation of door locks, burglar alarms, and other devices.

[0061] The electronic device X16 is an electronic device that is installed in the vehicle X at the time of shipment from the factory as a standard equipment or a manufacturer option, such as a wiper, an electric door mirror, a power window, a damper (shock absorber), an electric sunroof, and an electric seat.

[0062] The electronic device X17 is an electronic device that is optionally installed in the vehicle X as a user option, such as an in-vehicle A / V (audio / visual) device, a car navigation system, and an ETC (electronic toll collection system).

[0063] The electronic device X18 is an electronic device equipped with a high-voltage motor, such as an in-vehicle blower, oil pump, water pump, or battery cooling fan.

[0064] The above-described switch device 100 and solenoid 3 can be incorporated into any of the electronic devices X11 to X18.

[0065] In addition to the above-described embodiments, various modifications can be made to the configuration of the present invention without departing from the spirit of the invention. The above-described embodiments are illustrative in all respects and should be considered not to be limiting. The technical scope of the present invention is defined by the claims, not by the description of the above-described embodiments, and should be understood to include all modifications that fall within the meaning and scope of the claims.

[0066] For example, in the above-described embodiment, the switch device is an in-vehicle low-side switch IC, but the switch device does not have to be for an in-vehicle use. Also, the switch device may be a high-side switch that connects / disconnects between the application terminal of the power supply voltage and the load, instead of a low-side switch that connects / disconnects between the ground potential and the load.

[0067] The switch device (100) described above comprises a first terminal (OUT), a second terminal (GND), a third terminal (IN), a switch element (SW1) provided between the first terminal and the second terminal, a control line (LN1) extending from the third terminal to a control end of the switch element, a first circuit block (B1) provided on the control line and configured to drive the switch element in response to a control signal supplied to the third terminal, at least one second circuit block (B2_1 to B2_4) connected to each of branch power supply lines (LN2_1 to LN2_4) branching from the control line, a first resistor (R1) provided between the third terminal and the first circuit block, and at least one second resistor (R2_1 to R2_4) provided on each of the branch power supply lines, each of the first circuit block and at least one of the second circuit blocks comprising at least one P-channel MOSFET, and the branch power supply lines branch off from the control line between the third terminal and the first resistor (first configuration).

[0068] The switch device having the first configuration described above includes a first resistor and at least one second resistor, and by appropriately setting the resistance values ​​of the first resistor and the at least one second resistor, it is possible to ensure drive during reduced power in each of the first circuit block and the at least one second circuit block, while suppressing latch-up when an inductive load connected to the switch device is disconnected. As a result, it is possible to ensure drive during reduced power in the entire switch device, while suppressing latch-up when an inductive load connected to the switch device is disconnected.

[0069] In the switch device having the above first configuration, the second circuit block may be configured as a status monitoring circuit configured to monitor the status of the switch device (second configuration).

[0070] The switch device having the second configuration can suppress the occurrence of latch-up in the state monitoring circuit, thereby improving the reliability of the switch device.

[0071] In the switch device having the above-mentioned first or second configuration, the resistance values ​​of the first resistor and the second resistor may be configured (third configuration) to be resistance values ​​corresponding to the total area of ​​P-type wells in which at least one of the P-channel MOSFETs is arranged in each of the first circuit block and at least one of the second circuit blocks.

[0072] The switch device having the third configuration can prevent the resistance values ​​of the first resistor and the second resistor from becoming unnecessarily large.

[0073] The motor drive circuit having the third configuration may be configured such that the resistance value increases as the total sum increases (fourth configuration).

[0074] The switch device having the fourth configuration can more reliably prevent the resistance values ​​of the first resistor and the second resistor from becoming unnecessarily large.

[0075] The motor drive circuit having any one of the first to fourth configurations may have a configuration (fifth configuration) in which a parasitic NPN transistor is formed between the back gate of the P-channel MOSFET and the first terminal.

[0076] The motor drive circuit having any one of the first to fifth configurations may have a configuration (sixth configuration) in which a parasitic PNP transistor 2 is formed between the source of the P-channel MOSFET and the second terminal.

[0077] The switch device having any one of the first to sixth configurations may have a configuration (seventh configuration) in which the first circuit block and the first resistor are disposed adjacent to each other.

[0078] The switch device having the seventh configuration can reduce the routing of control lines.

[0079] In the switch device having any of the first to seventh configurations, at least one second circuit block and at least one second resistor corresponding to each of the at least one second circuit block may be arranged adjacent to each other (eighth configuration).

[0080] The switch device having the eighth configuration can suppress the routing of branch power supply lines.

[0081] In the switch device having the eighth configuration, the first circuit block, at least one of the second circuit blocks, and the switch element may be arranged along a first direction, the first circuit block and the first resistor are arranged along a second direction perpendicular to the first direction, and at least one of the second circuit blocks and at least one of the second resistors corresponding to each of the at least one second circuit block are arranged along the second direction (ninth configuration).

[0082] The switch device having the ninth configuration can prevent the switch device from becoming too long in only one of the first direction or the second direction.

[0083] The electronic devices (X11 to X18) described above have a configuration (tenth configuration) including a switch device having any one of the first to ninth configurations and an inductive load (3) connected to the switch device.

[0084] The electronic device having the tenth configuration can suppress the occurrence of latch-up when an inductive load is broken, while ensuring drive during reduced voltage in a switch device provided in the electronic device.

[0085] The vehicle (X) described above has a configuration (eleventh configuration) that includes the electronic device of the tenth configuration.

[0086] The vehicle having the eleventh configuration can suppress the occurrence of latch-up when an inductive load is broken, while ensuring drive during reduced voltage in the switch device provided on the vehicle. [Explanation of symbols]

[0087] 1. Automotive low-side switch IC 2 DC power supply 3 solenoids 4. Resistance 10 N-type semiconductor substrate 11 Drain electrode 12 N-type epitaxial growth layer 13 P-type well 14 N-type region 15, 16 Highly concentrated P-type region 17 Highly concentrated N-type region 100 Switch device according to an embodiment 200 ECU AC1 Active Clamp B1 Gate control circuit block B2_1 Undervoltage protection circuit block B2_2 Thermal protection circuit block B2_3 Overcurrent protection circuit block B2_4 Status signal control circuit block IN input terminal GND Ground terminal LN1 control line LN2_1~LN2_4 Branch power lines OUT output terminal R1, R2_1~R2_4 resistance ST Status terminal SW1, SW2 switch elements X vehicle X11~X18 Electronic equipment

Claims

1. A first terminal; A second terminal; A third terminal; a switch element provided between the first terminal and the second terminal; a control line extending from the third terminal to a control end of the switch element; a first circuit block provided on the control line and configured to drive the switch element in response to a control signal supplied to the third terminal; at least one second circuit block connected to each of the branch power supply lines branching from the control line, configured to receive the control signal via the branch power supply lines and use the control signal as a power supply; a first resistor provided between the third terminal and the first circuit block; at least one second resistor provided in each of the branch power supply lines; Equipped with each of the first circuit block and at least one of the second circuit blocks includes at least one P-channel MOSFET having a source indirectly connected to the third terminal via the first resistor or the second resistor and a drain directly or indirectly connected to the first terminal; the branch power supply line branches off from the control line between the third terminal and the first resistor; At least one of the second circuit blocks and at least one of the second resistors corresponding to each of the at least one second circuit block are disposed adjacent to each other, the first circuit block, the at least one second circuit block, and the switch element are arranged along a first direction; the first circuit block and the first resistor are arranged along a second direction perpendicular to the first direction; A switch device in which at least one of the second circuit blocks and at least one of the second resistors corresponding to each of the at least one second circuit block are arranged along the second direction.

2. The switch device according to claim 1 , wherein the second circuit block is a status monitoring circuit configured to monitor a status of the switch device.

3. 3. The switch device according to claim 1, wherein the resistance values ​​of the first resistor and the second resistor correspond to a sum of areas of P-type wells in which at least one of the P-channel MOSFETs is disposed in each of the first circuit block and at least one of the second circuit blocks.

4. The switch device according to claim 3 , wherein the resistance value increases as the total sum increases.

5. 5. The switch device according to claim 1, wherein a parasitic NPN transistor is formed between a back gate of the P-channel MOSFET and the first terminal.

6. 6. The switch device according to claim 1, wherein a parasitic PNP transistor is formed between the source of the P-channel MOSFET and the second terminal.

7. 7. The switch device according to claim 1, wherein the first circuit block and the first resistor are disposed adjacent to each other.

8. An electronic device comprising: the switch device according to any one of claims 1 to 7; and an inductive load connected to the switch device.

9. A vehicle comprising the electronic device according to claim 8.

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