Plasma processing method and plasma processing apparatus

Abstract

To reduce an energy of an ion radiated to an inner wall of a chamber main body while suppressing deterioration of an etching rate of a substrate.SOLUTION: A plasma processing method includes: a step of supplying a high frequency from a high frequency power supply; and a step of applying a DC voltage having a negative polarity in a lower electrode from one or more DC power supplies. In the step of applying the DC voltage, the DC voltage is periodically applied to the lower electrode, and in a frequency defining each period when the DC voltage is applied to the lower electrode is set to be less than 1 MHz, and a ratio of the period that the DC voltage is applied to the lower electrode voltage in each period is adjusted.SELECTED DRAWING: Figure 4

Description

[Technical Field]

[0001] The present disclosure relates to a plasma processing method and a plasma processing apparatus. [Background technology]

[0002] Plasma processing apparatuses are used in the manufacture of electronic devices. Plasma processing apparatuses generally include a chamber body, a stage, and a radio-frequency power supply. The chamber body provides its internal space as a chamber. The chamber body is grounded. The stage is provided within the chamber and is configured to support a substrate placed thereon. The stage includes a lower electrode. The radio-frequency power supply supplies radio-frequency waves to excite the gas within the chamber. In this plasma processing apparatus, ions are accelerated by the potential difference between the lower electrode and the plasma potential, and the accelerated ions are irradiated onto the substrate.

[0003] In plasma processing apparatuses, a potential difference also occurs between the chamber body and the plasma. When the potential difference between the chamber body and the plasma is large, the energy of ions irradiating the inner wall of the chamber body increases, causing particles to be emitted from the chamber body. The particles emitted from the chamber body contaminate the substrate placed on the stage. To prevent the generation of such particles, Patent Document 1 proposes a technology that uses an adjustment mechanism to adjust the ground capacitance of the chamber. The adjustment mechanism described in Patent Document 1 is configured to adjust the area ratio of the anode and cathode facing the chamber, i.e., the A / C ratio.

[0004] Furthermore, in plasma processing apparatuses, there is a technique for supplying a bias DC voltage to the lower electrode in order to increase the etching rate of the substrate by increasing the energy of ions irradiated onto the substrate. For example, Patent Document 2 discloses a technique for periodically applying a DC voltage having a negative polarity as a bias DC voltage to the lower electrode. The technique in Patent Document 2 describes increasing the energy of ions irradiated onto the substrate by adjusting the duty ratio of the DC voltage to 50% or more while setting the frequency of the DC voltage to, for example, 1 MHz or more. Here, the duty ratio is the proportion of the period during which the DC voltage is applied to the lower electrode within each period during which the DC voltage is applied to the lower electrode. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Japanese Patent Application Laid-Open No. 2011-228694 [Patent Document 2] Patent No. 4714166 Summary of the Invention [Problem to be solved by the invention]

[0006] The present disclosure provides a technique that can suppress a decrease in the etching rate of a substrate and reduce the energy of ions irradiated onto the inner wall of a chamber body. [Means for solving the problem]

[0007] A plasma processing method according to one aspect of the present disclosure is a plasma processing method performed in a plasma processing apparatus, the plasma processing apparatus comprising: a chamber body providing a chamber; a stage provided within the chamber body, including a lower electrode, and supporting a substrate; a high-frequency power supply supplying high-frequency waves to generate plasma of a gas supplied to the chamber; and one or more DC power supplies generating a DC voltage having a negative polarity that is applied to the lower electrode, the plasma processing method comprising: a step of supplying high-frequency waves from the high-frequency power supply; and a step of applying a DC voltage having a negative polarity to the lower electrode from the one or more DC power supplies, wherein in the step of applying the DC voltage, the DC voltage is applied to the lower electrode periodically, and the frequency defining each period during which the DC voltage is applied to the lower electrode is set to less than 1 MHz, and the proportion of the period during which the DC voltage is applied to the lower electrode within each period is adjusted. [Effects of the Invention]

[0008] According to the present disclosure, it is possible to suppress a decrease in the etching rate of the substrate and to reduce the energy of the ions irradiated onto the inner wall of the chamber body. [Brief explanation of the drawings]

[0009] [Figure 1] FIG. 1 is a diagram schematically illustrating a plasma processing apparatus according to an embodiment. [Figure 2] FIG. 2 is a diagram showing an embodiment of a power supply system and a control system of the plasma processing apparatus shown in FIG. [Figure 3] FIG. 3 is a diagram showing the circuit configuration of the DC power supply, the switching unit, the high-frequency filter, and the matching box shown in FIG. [Figure 4] FIG. 4 is a timing chart relating to a plasma processing method according to an embodiment that is performed using the plasma processing apparatus shown in FIG. [Figure 5] FIG. 5 is a timing chart showing the plasma potential. [Figure 6A]FIG. 6A shows a simulation result illustrating an example of the relationship between the DC frequency and the energy of ions irradiated onto the substrate. [Figure 6B] FIG. 6B is a simulation result showing an example of the relationship between the DC frequency and the energy of ions irradiated onto the substrate. [Figure 6C] FIG. 6C shows a simulation result illustrating an example of the relationship between the DC frequency and the energy of ions irradiated onto the substrate. [Figure 6D] FIG. 6D shows a simulation result illustrating an example of the relationship between the DC frequency and the energy of ions irradiated onto the substrate. [Figure 7A] FIG. 7A shows a simulation result illustrating an example of the relationship between the DC frequency and the energy of ions irradiated onto the inner wall of the chamber body. [Figure 7B] FIG. 7B is a simulation result showing an example of the relationship between the DC frequency and the energy of ions irradiated onto the inner wall of the chamber body. [Figure 7C] FIG. 7C shows a simulation result illustrating an example of the relationship between the DC frequency and the energy of ions irradiated onto the inner wall of the chamber body. [Figure 7D] FIG. 7D is a simulation result showing an example of the relationship between the DC frequency and the energy of ions irradiated onto the inner wall of the chamber body. [Figure 8] FIGS. 8(a) and 8(b) are timing charts relating to a plasma processing method according to another embodiment. [Figure 9] FIG. 9 is a diagram showing a power supply system and a control system of a plasma processing apparatus according to another embodiment. [Figure 10] FIG. 10 is a diagram showing a power supply system and a control system of a plasma processing apparatus according to still another embodiment. [Figure 11] FIG. 11 is a timing chart relating to a plasma processing method according to an embodiment that is performed using the plasma processing apparatus shown in FIG. [Figure 12]FIG. 12 is a timing chart relating to a plasma processing method according to another embodiment, which is carried out using the plasma processing apparatus shown in FIG. [Figure 13] FIG. 13 is a diagram showing a power supply system and a control system of a plasma processing apparatus according to another embodiment. [Figure 14] FIG. 14 is a diagram showing a power supply system and a control system of a plasma processing apparatus according to still another embodiment. [Figure 15] FIG. 15 is a circuit diagram showing an example of a waveform adjuster. [Figure 16] Figure 16(a) is a graph showing the relationship between the duty ratio and the etching amount of the silicon oxide film of the sample attached to the chamber-side surface of the top plate, as determined in the first evaluation experiment, and Figure 16(b) is a graph showing the relationship between the duty ratio and the etching amount of the silicon oxide film of the sample attached to the side wall of the chamber body, as determined in the first evaluation experiment. [Figure 17] FIG. 17 is a graph showing the relationship between the duty ratio and the etching amount of the silicon oxide film of the sample placed on the electrostatic chuck, which was obtained in the first evaluation experiment. [Figure 18] (a) of Figure 18 is a graph showing the etching amount of the silicon oxide film of the sample attached to the chamber-side surface of the top plate, obtained in each of the second evaluation experiment and the comparative experiment, and (b) of Figure 18 is a graph showing the etching amount of the silicon oxide film of the sample attached to the side wall of the chamber body, obtained in each of the second evaluation experiment and the comparative experiment. [Figure 19A] FIG. 19A shows a simulation result illustrating an example of the relationship between the duty ratio and the energy of ions irradiated onto a substrate. [Figure 19B] FIG. 19B shows a simulation result illustrating an example of the relationship between the duty ratio and the energy of ions irradiated onto the substrate. [Figure 19C] FIG. 19C shows a simulation result illustrating an example of the relationship between the duty ratio and the energy of ions irradiated onto the substrate. [Figure 19D]FIG. 19D shows a simulation result illustrating an example of the relationship between the duty ratio and the energy of ions irradiated onto the substrate. [Figure 19E] FIG. 19E shows a simulation result illustrating an example of the relationship between the duty ratio and the energy of ions irradiated onto the substrate. [Figure 20A] FIG. 20A shows a simulation result illustrating an example of the relationship between the duty ratio and the energy of ions irradiated onto the inner wall of the chamber body. [Figure 20B] FIG. 20B shows a simulation result illustrating an example of the relationship between the duty ratio and the energy of ions irradiated onto the inner wall of the chamber body. [Figure 20C] FIG. 20C shows a simulation result illustrating an example of the relationship between the duty ratio and the energy of ions irradiated onto the inner wall of the chamber body. [Figure 20D] FIG. 20D shows a simulation result illustrating an example of the relationship between the duty ratio and the energy of ions irradiated onto the inner wall of the chamber body. [Figure 20E] FIG. 20E shows a simulation result illustrating an example of the relationship between the duty ratio and the energy of ions irradiated onto the inner wall of the chamber body. DETAILED DESCRIPTION OF THE INVENTION

[0010] Various embodiments will be described in detail below with reference to the drawings, in which the same or equivalent parts are designated by the same reference numerals.

[0011] Plasma processing apparatuses are used in the manufacture of electronic devices. Plasma processing apparatuses generally include a chamber body, a stage, and a radio-frequency power supply. The chamber body provides its internal space as a chamber. The chamber body is grounded. The stage is provided within the chamber and is configured to support a substrate placed thereon. The stage includes a lower electrode. The radio-frequency power supply supplies radio-frequency waves to excite the gas within the chamber. In this plasma processing apparatus, ions are accelerated by the potential difference between the lower electrode and the plasma potential, and the accelerated ions are irradiated onto the substrate.

[0012] In plasma processing apparatuses, a potential difference also occurs between the chamber body and the plasma. When the potential difference between the chamber body and the plasma is large, the energy of ions irradiating the inner wall of the chamber body increases, causing particles to be emitted from the chamber body. The particles emitted from the chamber body contaminate the substrate placed on the stage. To prevent the generation of such particles, Patent Document 1 proposes a technology that uses an adjustment mechanism to adjust the ground capacitance of the chamber. The adjustment mechanism described in Patent Document 1 is configured to adjust the area ratio of the anode and cathode facing the chamber, i.e., the A / C ratio.

[0013] Furthermore, in plasma processing apparatuses, there is a technique for supplying a bias DC voltage to the lower electrode in order to increase the etching rate of the substrate by increasing the energy of ions irradiated onto the substrate. For example, Patent Document 2 discloses a technique for periodically applying a DC voltage having a negative polarity as a bias DC voltage to the lower electrode. The technique in Patent Document 2 describes increasing the energy of ions irradiated onto the substrate by adjusting the duty ratio of the DC voltage to 50% or more while setting the frequency of the DC voltage to, for example, 1 MHz or more. Here, the duty ratio is the proportion of the period during which the DC voltage is applied to the lower electrode within each period during which the DC voltage is applied.

[0014] In plasma processing apparatuses that periodically apply a DC voltage to the lower electrode, the movement of ions in the plasma decreases during periods when the DC voltage application is stopped, which can lead to an increase in the plasma potential. As the plasma potential increases, the potential difference between the plasma and the chamber body increases, resulting in an increase in the energy of ions irradiating the inner wall of the chamber body. Furthermore, when the frequency of the DC voltage is set to, for example, 1 MHz or higher, the energy of ions irradiating the inner wall of the chamber body as well as the energy of ions irradiating the substrate tends to increase. The higher the energy of ions irradiating the inner wall of the chamber body, the greater the amount of particles released from the chamber body, potentially accelerating substrate contamination. Given this background, it is desirable to suppress a decrease in the substrate etching rate while simultaneously reducing the energy of ions irradiating the inner wall of the chamber body.

[0015] Fig. 1 is a diagram schematically illustrating a plasma processing apparatus according to an embodiment. Fig. 2 is a diagram illustrating an embodiment of a power supply system and a control system of the plasma processing apparatus shown in Fig. 1. The plasma processing apparatus 10 shown in Fig. 1 is a capacitively coupled plasma processing apparatus.

[0016] The plasma processing apparatus 10 includes a chamber body 12. The chamber body 12 has a substantially cylindrical shape. The chamber body 12 provides its internal space as a chamber 12c. The chamber body 12 is made of, for example, aluminum. The chamber body 12 is connected to ground potential. A plasma-resistant film is formed on the inner wall surface of the chamber body 12, i.e., the wall surface defining the chamber 12c. This film may be a film formed by anodization or a ceramic film such as a film formed from yttrium oxide. A passage 12p is formed in the sidewall of the chamber body 12. When a substrate W is loaded into or unloaded from the chamber 12c, the substrate W passes through the passage 12p. A gate valve 12g is provided along the sidewall of the chamber body 12 to open and close the passage 12p.

[0017] Within the chamber 12c, a support 15 extends upward from the bottom of the chamber body 12. The support 15 has a generally cylindrical shape and is made of an insulating material such as ceramic. A stage 16 is mounted on the support 15. The stage 16 is supported by the support 15. The stage 16 is configured to support the substrate W within the chamber 12c. The stage 16 includes a lower electrode 18 and an electrostatic chuck 20. In one embodiment, the stage 16 further includes an electrode plate 21. The electrode plate 21 is made of a conductive material such as aluminum and has a generally disc shape. The lower electrode 18 is provided on the electrode plate 21. The lower electrode 18 is made of a conductive material such as aluminum and has a generally disc shape. The lower electrode 18 is electrically connected to the electrode plate 21.

[0018] A flow path 18f is provided within the lower electrode 18. The flow path 18f is a flow path for a heat exchange medium. As the heat exchange medium, a liquid refrigerant or a refrigerant (e.g., chlorofluorocarbon) that cools the lower electrode 18 by vaporizing is used. The heat exchange medium is supplied to the flow path 18f via a pipe 23a from a chiller unit provided outside the chamber body 12. The heat exchange medium supplied to the flow path 18f is returned to the chiller unit via a pipe 23b. That is, the heat exchange medium is supplied to the flow path 18f so as to circulate between the flow path 18f and the chiller unit.

[0019] The electrostatic chuck 20 is disposed on the lower electrode 18. The electrostatic chuck 20 has a main body made of an insulator and a film-like electrode disposed within the main body. A DC power supply is electrically connected to the electrode of the electrostatic chuck 20. When a voltage is applied from the DC power supply to the electrode of the electrostatic chuck 20, an electrostatic attractive force is generated between the electrostatic chuck 20 and the substrate W placed on the electrostatic chuck 20. The generated electrostatic attractive force attracts the substrate W to the electrostatic chuck 20, whereby the substrate W is held by the electrostatic chuck 20. A focus ring FR is disposed on the peripheral region of the electrostatic chuck 20. The focus ring FR has a substantially annular plate shape and is formed of, for example, silicon. The focus ring FR is disposed so as to surround the edge of the substrate W.

[0020] The plasma processing apparatus 10 is provided with a gas supply line 25. The gas supply line 25 supplies a heat transfer gas, for example, He gas, from a gas supply mechanism to between the upper surface of the electrostatic chuck 20 and the rear surface (lower surface) of the substrate W.

[0021] A cylindrical portion 28 extends upward from the bottom of the chamber body 12. The cylindrical portion 28 extends along the outer periphery of the support portion 15. The cylindrical portion 28 is made of a conductive material and has a substantially cylindrical shape. The cylindrical portion 28 is connected to a ground potential. An insulating portion 29 is provided on the cylindrical portion 28. The insulating portion 29 has insulating properties and is made of, for example, quartz or ceramic. The insulating portion 29 extends along the outer periphery of the stage 16.

[0022] The plasma processing apparatus 10 further includes an upper electrode 30. The upper electrode 30 is provided above the stage 16. The upper electrode 30 closes the upper opening of the chamber body 12 together with a member 32. The member 32 has insulating properties. The upper electrode 30 is supported on the upper part of the chamber body 12 via this member 32. When a first high-frequency power supply 61 (described later) is electrically connected to the lower electrode 18, the upper electrode 30 is connected to ground potential.

[0023] The upper electrode 30 includes a top plate 34 and a support 36. The lower surface of the top plate 34 defines the chamber 12c. The top plate 34 is provided with a plurality of gas discharge holes 34a. Each of the plurality of gas discharge holes 34a penetrates the top plate 34 in the thickness direction (vertical direction). The top plate 34 is made of, for example, but is not limited to, silicon. Alternatively, the top plate 34 may have a structure in which a plasma-resistant film is provided on the surface of an aluminum base material. This film may be a film formed by anodizing, or a ceramic film such as a film formed from yttrium oxide.

[0024] The support 36 is a component that detachably supports the top plate 34. The support 36 can be made of a conductive material such as aluminum. A gas diffusion chamber 36a is provided inside the support 36. A plurality of gas holes 36b extend downward from the gas diffusion chamber 36a. The plurality of gas holes 36b are respectively connected to the plurality of gas discharge holes 34a. The support 36 is formed with a gas inlet 36c that introduces gas into the gas diffusion chamber 36a, and a gas supply pipe 38 is connected to the gas inlet 36c.

[0025] A gas source group 40 is connected to the gas supply pipe 38 via a valve group 42 and a flow rate controller group 44. The gas source group 40 includes a plurality of gas sources. The valve group 42 includes a plurality of valves, and the flow rate controller group 44 includes a plurality of flow rate controllers. Each of the plurality of flow rate controllers in the flow rate controller group 44 is a mass flow controller or a pressure-controlled flow rate controller. The plurality of gas sources in the gas source group 40 are connected to the gas supply pipe 38 via a corresponding valve in the valve group 42 and a corresponding flow rate controller in the flow rate controller group 44. The plasma processing apparatus 10 can supply gases from one or more selected gas sources in the gas source group 40 to the chamber 12c at individually adjusted flow rates.

[0026] A baffle plate 48 is provided between the cylindrical portion 28 and the side wall of the chamber body 12. The baffle plate 48 can be made, for example, by coating an aluminum base material with a ceramic such as yttrium oxide. A large number of through-holes are formed in the baffle plate 48. Below the baffle plate 48, an exhaust pipe 52 is connected to the bottom of the chamber body 12. An exhaust device 50 is connected to the exhaust pipe 52. The exhaust device 50 has a pressure controller such as an automatic pressure control valve and a vacuum pump such as a turbomolecular pump, and is able to reduce the pressure in the chamber 12c.

[0027] As shown in FIGS. 1 and 2, the plasma processing apparatus 10 further includes a first high-frequency power supply 61. The first high-frequency power supply 61 generates a first high-frequency power for exciting the gas in the chamber 12c to generate plasma. The first high-frequency power has a frequency in the range of 27 to 100 MHz, for example, a frequency of 60 MHz. The first high-frequency power supply 61 is connected to the lower electrode 18 via a first matching circuit 65 of a matching box 64 and the electrode plate 21. The first matching circuit 65 is a circuit for matching the output impedance of the first high-frequency power supply 61 with the impedance on the load side (the lower electrode 18 side). The first high-frequency power supply 61 does not necessarily have to be electrically connected to the lower electrode 18, and may be connected to the upper electrode 30 via the first matching circuit 65.

[0028] The plasma processing apparatus 10 further includes a second high-frequency power supply 62. The second high-frequency power supply 62 is a power supply that generates a second high-frequency bias power supply for attracting ions to the substrate W. The frequency of the second high-frequency power supply is lower than the frequency of the first high-frequency power supply. The frequency of the second high-frequency power supply is within a range of 400 kHz to 13.56 MHz, and is, for example, 400 kHz. The second high-frequency power supply 62 is connected to the lower electrode 18 via a second matching circuit 66 of the matching box 64 and the electrode plate 21. The second matching circuit 66 is a circuit for matching the output impedance of the second high-frequency power supply 62 with the impedance on the load side (the lower electrode 18 side).

[0029] The plasma processing apparatus 10 further includes a DC power supply 70 and a switching unit 72. The DC power supply 70 is a power supply that generates a negative DC voltage. The negative DC voltage is used as a bias voltage for attracting ions to the substrate W placed on the stage 16. The DC power supply 70 is connected to the switching unit 72. The switching unit 72 is electrically connected to the lower electrode 18 via a high-frequency filter 74. In the plasma processing apparatus 10, either the DC voltage generated by the DC power supply 70 or the second high-frequency wave generated by the second high-frequency power supply 62 is selectively supplied to the lower electrode 18.

[0030] The plasma processing apparatus 10 further includes a controller PC. The controller PC is configured to control the switching unit 72. The controller PC may be further configured to control one or both of the first high frequency power supply 61 and the second high frequency power supply 62.

[0031] In one embodiment, the plasma processing apparatus 10 may further include a main controller MC. The main controller MC is a computer equipped with a processor, a storage device, an input device, a display device, etc., and controls each part of the plasma processing apparatus 10. Specifically, the main controller MC executes a control program stored in the storage device and controls each part of the plasma processing apparatus 10 based on recipe data stored in the storage device. Through such control, the plasma processing apparatus 10 executes a process specified by the recipe data.

[0032] 2 and 3 will be referred to below. Fig. 3 is a diagram showing the circuit configuration of the DC power supply, switching unit, high-frequency filter, and matching box shown in Fig. 2. The DC power supply 70 is a variable DC power supply, and generates a negative DC voltage to be applied to the lower electrode 18.

[0033] The switching unit 72 is configured to stop application of the DC voltage from the DC power supply 70 to the lower electrode 18. In one embodiment, the switching unit 72 includes field-effect transistors (FETs) 72a, 72b, a capacitor 72c, and a resistor 72d. The FET 72a is, for example, an N-channel MOS FET. The FET 72b is, for example, a P-channel MOS FET. The source of the FET 72a is connected to the negative terminal of the DC power supply 70. One end of the capacitor 72c is connected to the negative terminal of the DC power supply 70 and the source of the FET 72a. The other end of the capacitor 72c is connected to the source of the FET 72b. The source of the FET 72b is connected to ground. The gates of the FET 72a and the FET 72b are connected to each other. A pulse control signal from the controller PC is supplied to a node NA connected between the gates of the FET 72a and the FET 72b. The drain of the FET 72a is connected to the drain of the FET 72b. A node NB connected to the drain of the FET 72a and the drain of the FET 72b is connected to a high frequency filter 74 via a resistive element 72d.

[0034] The high-frequency filter 74 is a filter that reduces or blocks high frequencies. In one embodiment, the high-frequency filter 74 has an inductor 74a and a capacitor 74b. One end of the inductor 74a is connected to the resistive element 72d. One end of the inductor 74a is connected to one end of the capacitor 74b. The other end of the capacitor 74b is connected to ground. The other end of the inductor 74a is connected to the matching device 64.

[0035] The matching box 64 includes a first matching circuit 65 and a second matching circuit 66. In one embodiment, the first matching circuit 65 includes a variable capacitor 65a and a variable capacitor 65b, and the second matching circuit 66 includes a variable capacitor 66a and a variable capacitor 66b. One end of the variable capacitor 65a is connected to the other end of the inductor 74a. The other end of the variable capacitor 65a is connected to the first high-frequency power supply 61 and one end of the variable capacitor 65b. The other end of the variable capacitor 65b is connected to ground. One end of the variable capacitor 66a is connected to the other end of the inductor 74a. The other end of the variable capacitor 66a is connected to the second high-frequency power supply 62 and one end of the variable capacitor 66b. The other end of the variable capacitor 66b is connected to ground. One end of the variable capacitor 65a and one end of the variable capacitor 66a are connected to a terminal 64a of the matching box 64. The terminal 64a of the matching box 64 is connected to the lower electrode 18 via the electrode plate 21.

[0036] Control by the main control unit MC and the controller PC will be described below. In the following description, reference will be made to FIGS. 2 and 4. FIG. 4 is a timing chart relating to a plasma processing method according to one embodiment, which is performed using the plasma processing apparatus shown in FIG. 1. In FIG. 4, the horizontal axis represents time. In FIG. 4, the vertical axis represents the first high-frequency power, the DC voltage applied to the lower electrode 18 from the DC power supply 70, and the control signal output by the controller PC. In FIG. 4, a high level of the first high-frequency power indicates that the first high-frequency power is being supplied to generate plasma, and a low level of the first high-frequency power indicates that the supply of the first high-frequency power is stopped. Also, in FIG. 4, a low level of the DC voltage indicates that a negative DC voltage is being applied from the DC power supply 70 to the lower electrode 18, and a DC voltage of 0 V indicates that no DC voltage is being applied from the DC power supply 70 to the lower electrode 18.

[0037] The main controller MC specifies the power and frequency of the first high frequency to the first high frequency power supply 61. In one embodiment, the main controller MC also specifies the timing to start and end the supply of the first high frequency to the first high frequency power supply 61. During the period in which the first high frequency is supplied by the first high frequency power supply 61, plasma is generated from the gas in the chamber. That is, during this period, step S1 is performed in which a high frequency is supplied from the high frequency power supply to generate plasma. In the example of FIG. 4, the first high frequency is continuously supplied during execution of the plasma processing method of one embodiment.

[0038] The main control unit MC specifies to the controller PC a frequency (hereinafter referred to as the "DC frequency") that defines each period during which the negative DC voltage from the DC power supply 70 is applied to the lower electrode 18, and a duty ratio. The duty ratio is the proportion of the period ("T1" in FIG. 4) during which the negative DC voltage from the DC power supply 70 is applied to the lower electrode 18 within each period ("PDC" in FIG. 4). The DC frequency is set to less than 1 MHz. For example, the DC frequency is set within the range of 50 to 800 kHz. The duty ratio is adjusted with the DC frequency set to less than 1 MHz. For example, the duty ratio is adjusted to 50% or less, more preferably 35% or less.

[0039] The controller PC generates a control signal according to a DC frequency and a duty cycle specified by the main control unit MC. The control signal generated by the controller PC may be a pulse signal. In one example, as shown in FIG. 4, the control signal generated by the controller PC has a high level in a period T1 and a low level in a period T2. The period T2 is a period within one cycle PDC excluding the period T1. Alternatively, the control signal generated by the controller PC may have a low level in the period T1 and a high level in the period T2.

[0040] In one embodiment, a control signal generated by the controller PC is provided to a node NA of the switching unit 72. When the control signal is provided, the switching unit 72 connects the DC power supply 70 to the node NB so that a negative DC voltage from the DC power supply 70 is applied to the lower electrode 18 during a period T1. On the other hand, the switching unit 72 disconnects the DC power supply 70 from the node NB during a period T2 so that the negative DC voltage from the DC power supply 70 is not applied to the lower electrode 18. As a result, as shown in FIG. 4 , a negative DC voltage from the DC power supply 70 is applied to the lower electrode 18 during a period T1, and application of the negative DC voltage from the DC power supply 70 to the lower electrode 18 is stopped during a period T2. That is, in the plasma processing method of one embodiment, a step S2 is performed in which a negative DC voltage from the DC power supply 70 is periodically applied to the lower electrode 18.

[0041] Here, the relationship between the duty ratio and the plasma potential will be described with reference to FIGS. 5(a) and 5(b). FIGS. 5(a) and 5(b) are timing charts showing the plasma potential. During period T1, a negative DC voltage from the DC power supply 70 is applied to the lower electrode 18, causing positive ions in the plasma to move toward the substrate W. Therefore, as shown in FIGS. 5(a) and 5(b), the plasma potential is low during period T1. Meanwhile, during period T2, the application of the negative DC voltage from the DC power supply 70 to the lower electrode 18 is stopped, causing less movement of positive ions, and mainly electrons in the plasma to move. Therefore, the plasma potential is high during period T2.

[0042] The duty ratio in the timing chart shown in Figure 5(a) is smaller than that in the timing chart shown in Figure 5(b). If the conditions for plasma generation are the same, the total number of positive ions and the total number of electrons in the plasma do not depend on the duty ratio. That is, the ratio of area A1 to area A2 shown in Figure 5(a) is the same as the ratio of area A1 to area A2 shown in Figure 5(b). Therefore, the smaller the duty ratio, the smaller the plasma potential PV during period T2.

[0043] The etching rate of the substrate W has little dependency on the duty ratio, i.e., the proportion of the period T1 during which the negative DC voltage is applied to the lower electrode 18 within each period PDC. On the other hand, when the duty ratio is adjusted to a relatively small value, particularly when the duty ratio is adjusted to 50% or less, the plasma potential becomes small, and the etching rate of the chamber body 12 drops significantly.

[0044] Next, with reference to FIGS. 6A to 6D and 7A to 7D, the relationship between the DC frequency, the energy of ions irradiated onto the substrate W, and the energy of ions irradiated onto the inner wall of the chamber body 12 will be described. FIGS. 6A to 6D are simulation results showing an example of the relationship between the DC frequency and the energy of ions irradiated onto the substrate W. FIGS. 7A to 7D are simulation results showing an example of the relationship between the DC frequency and the energy of ions irradiated onto the inner wall of the chamber body 12. FIGS. 6A to 6D are simulation results obtained by simulating the energy distribution (IED) of ions irradiated onto the substrate W when the DC frequency is set to 200 kHz, 400 kHz, 800 kHz, and 1.6 MHz, respectively. FIGS. 7A to 7D are simulation results obtained by simulating the energy distribution (IED) of ions irradiated onto the inner wall of the chamber body 12 when the DC frequency is set to 200 kHz, 400 kHz, 800 kHz, and 1.6 MHz, respectively. Other simulation conditions used were a duty ratio of the negative DC voltage applied to the lower electrode 18 of 40%, a voltage value of the negative DC voltage applied to the lower electrode 18 of -450 V, a pressure in the chamber 12c of 30 mTorr (4.00 Pa), a processing gas supplied to the chamber 12c of Ar gas, and a first high frequency of 100 MHz, 500 W continuous wave.

[0045] 6A to 6C, when the DC frequency is 800 kHz or less, a low-energy peak and a high-energy peak appear in the energy distribution of ions irradiated onto the substrate W. Also, as shown in FIGS. 7A to 7C, when the DC frequency is 800 kHz or less, a low-energy peak and a high-energy peak appear in the energy distribution of ions irradiated onto the inner wall of the chamber body 12. That is, when the DC frequency is 800 kHz or less, ions follow the DC voltage periodically applied to the lower electrode 18.

[0046] On the other hand, as shown in Fig. 6D, when the DC frequency is 1.6 MHz, no low-energy peak or high-energy peak appears in the energy distribution of ions irradiated onto the substrate W. Also, as shown in Fig. 7D, when the DC frequency is 1.6 MHz, no low-energy peak or high-energy peak appears in the energy distribution of ions irradiated onto the inner wall of the chamber body 12. In other words, when the DC frequency is 1.6 MHz, ions do not follow the DC voltage periodically applied to the lower electrode 18.

[0047] The inventors of the present application have conducted extensive research based on the simulation results of Figures 6A to 6D and Figures 7A to 7D, and as a result have confirmed the following phenomenon. When the DC frequency is set to less than 1 MHz, preferably in the range of 50 to 800 kHz, the ions follow the DC voltage periodically applied to the lower electrode 18. The etching rate of the substrate W has little dependence on the duty ratio of the DC voltage when ions follow the DC voltage periodically applied to the lower electrode 18. On the other hand, when the duty ratio is adjusted to a relatively small value, particularly when the duty ratio is adjusted to 50% or less, the plasma potential becomes small, as described with reference to FIG. 5(a), and therefore the etching rate of the chamber body 12 drops significantly. When the DC frequency is set to 1 MHz or higher, the ions no longer follow the DC voltage periodically applied to the lower electrode 18. When ions no longer respond to the DC voltage periodically applied to the lower electrode 18, the energy of the ions irradiating the substrate and the inner wall of the chamber body 12 tend to increase.

[0048] Therefore, in one embodiment of the plasma processing apparatus 10, when a DC voltage is periodically applied to the lower electrode 18, the duty ratio is adjusted to 50% or less with the DC frequency set to less than 1 MHz. This makes it possible to suppress a decrease in the etching rate of the substrate W and to reduce the energy of the ions irradiated onto the inner wall of the chamber body 12. As a result, the generation of particles from the chamber body 12 is suppressed. Note that when the duty ratio is 35% or less, it is possible to further reduce the energy of the ions irradiated onto the inner wall of the chamber body 12.

[0049] Another embodiment will be described below. FIGS. 8A and 8B are timing charts related to a plasma processing method according to another embodiment. In each of FIGS. 8A and 8B, the horizontal axis represents time. In each of FIGS. 8A and 8B, the vertical axis represents the first high-frequency power and the DC voltage applied to the lower electrode 18 from the DC power supply 70. In each of FIGS. 8A and 8B, a high level of the first high-frequency power indicates that the first high-frequency power is being supplied to generate plasma. In each of FIGS. 8A and 8B, a low level of the first high-frequency power indicates that the supply of the first high-frequency power is stopped. In each of FIGS. 8A and 8B, a low level of the DC voltage indicates that a negative DC voltage is being applied to the lower electrode 18 from the DC power supply 70. In addition, in each of FIGS. 8(a) and 8(b), the DC voltage being 0 V indicates that no DC voltage is being applied from the DC power supply 70 to the lower electrode 18.

[0050] 8(a), a negative DC voltage is periodically applied to the lower electrode 18 from the DC power supply 70, and a first radio frequency wave is periodically supplied to generate plasma. In the embodiment shown in FIG. 8(a), the application of the negative DC voltage from the DC power supply 70 to the lower electrode 18 and the supply of the first radio frequency wave are synchronized. That is, the first radio frequency wave is supplied during a period T1 when the DC voltage from the DC power supply 70 is applied to the lower electrode 18, and the supply of the first radio frequency wave is stopped during a period T2 when the application of the DC voltage from the DC power supply 70 to the lower electrode 18 is stopped.

[0051] 8(b), a negative DC voltage is periodically applied to the lower electrode 18 from the DC power supply 70, and a first radio frequency wave is periodically supplied to generate plasma. In the embodiment shown in FIG. 8(b), the phase of the supply of the first radio frequency wave is inverted relative to the phase of the negative DC voltage applied from the DC power supply 70 to the lower electrode 18. That is, the supply of the first radio frequency wave is stopped during a period T1 when the DC voltage from the DC power supply 70 is applied to the lower electrode 18, and the first radio frequency wave is supplied during a period T2 when the application of the DC voltage from the DC power supply 70 to the lower electrode 18 is stopped.

[0052] In the embodiment shown in Figure 8(a) and the embodiment shown in Figure 8(b), the above-mentioned control signal from the controller PC is provided to the first high frequency power supply 61. The first high frequency power supply 61 starts supplying the first high frequency power at the timing of the rising (or falling) of the control signal from the controller PC, and stops supplying the first high frequency power at the timing of the falling (or rising) of the control signal from the controller PC. In the embodiment shown in Figure 8(a) and the embodiment shown in Figure 8(b), the generation of unintended high frequencies due to intermodulation distortion can be suppressed.

[0053] Hereinafter, several plasma processing apparatuses according to other embodiments will be described. FIG. 9 is a diagram showing a power supply system and a control system of a plasma processing apparatus according to another embodiment. As shown in FIG. 9, a plasma processing apparatus 10A according to another embodiment differs from the plasma processing apparatus 10 in that a first high-frequency power supply 61 includes a controller PC. That is, in the plasma processing apparatus 10A, the controller PC is part of the first high-frequency power supply 61. On the other hand, in the plasma processing apparatus 10, the controller PC is separate from the first high-frequency power supply 61 and the second high-frequency power supply 62. In the plasma processing apparatus 10A, since the controller PC is part of the first high-frequency power supply 61, the above-mentioned control signal (pulse signal) from the controller PC is not transmitted to the first high-frequency power supply 61.

[0054] FIG. 10 is a diagram showing a power supply system and a control system of a plasma processing apparatus according to yet another embodiment. The plasma processing apparatus 10B shown in FIG. 10 includes a plurality of DC power supplies 701 and 702 and a plurality of switching units 721 and 722. Each of the DC power supplies 701 and 702 is a power supply similar to the DC power supply 70 and is configured to generate a negative DC voltage to be applied to the lower electrode 18. Each of the switching units 721 and 722 has a configuration similar to the switching unit 72. The DC power supply 701 is connected to the switching unit 721. Like the switching unit 72, the switching unit 721 is configured to stop the application of the DC voltage from the DC power supply 701 to the lower electrode 18. The DC power supply 702 is connected to the switching unit 722. Like the switching unit 72, the switching unit 722 is configured to stop the application of the DC voltage from the DC power supply 702 to the lower electrode 18.

[0055] FIG. 11 is a timing chart related to a plasma processing method according to one embodiment, which is performed using the plasma processing apparatus shown in FIG. 10 . In FIG. 11 , the horizontal axis represents time. In FIG. 11 , the vertical axis represents the combined DC voltage, the DC voltage of the DC power supply 701, and the DC voltage of the DC power supply 702. The DC voltage of the DC power supply 701 represents the DC voltage applied from the DC power supply 701 to the lower electrode 18, and the DC voltage of the DC power supply 702 represents the DC voltage applied from the DC power supply 702 to the lower electrode 18. The combined DC voltage is applied to the lower electrode 18 during each period PDC. As shown in FIG. 11 , in the plasma processing apparatus 10B, the DC voltage applied to the lower electrode 18 during each period PDC is formed by multiple DC voltages output in sequence from the multiple DC power supplies 701 and 702. That is, in plasma processing apparatus 10B, the DC voltage applied to lower electrode 18 in each period PDC is generated by temporally combining multiple DC voltages output in sequence from multiple DC power supplies 701 and 702. According to this plasma processing apparatus 10B, the load on each of multiple DC power supplies 701 and 702 is reduced.

[0056] 11 , the controller PC supplies a first control signal to the switching unit 721. The first control signal has a high level (or a low level) during a period when the DC voltage from the DC power supply 701 is applied to the lower electrode 18, and a low level (or a high level) during a period when the DC voltage from the DC power supply 701 is not applied to the lower electrode 18. The controller PC also supplies a second control signal to the switching unit 722. The second control signal has a high level (or a low level) during a period when the DC voltage from the DC power supply 702 is applied to the lower electrode 18, and a low level (or a high level) during a period when the DC voltage from the DC power supply 702 is not applied to the lower electrode 18. That is, control signals (pulse signals) having different phases are supplied to the multiple switching units 721 and 722 connected to the multiple DC power supplies, respectively.

[0057] FIG. 12 is a timing chart related to a plasma processing method of another embodiment executed using the plasma processing apparatus shown in FIG. 10. In FIG. 12, the horizontal axis represents time. In FIG. 12, the vertical axis represents the combined DC voltage, the DC voltage of the DC power supply 701, and the DC voltage of the DC power supply 702. The DC voltage of the DC power supply 701 represents the DC voltage applied from the DC power supply 701 to the lower electrode 18, and the DC voltage of the DC power supply 702 represents the DC voltage applied from the DC power supply 702 to the lower electrode 18. The combined DC voltage is applied to the lower electrode 18 in each period. As shown in FIG. 12, in the plasma processing apparatus 10B, the DC voltage applied to the lower electrode 18 in adjacent periods PDC1 and PDC2 is formed by multiple DC voltages output in sequence from the multiple DC power supplies 701 and 702 and shifted in phase by 90 degrees. That is, in the plasma processing apparatus 10B, the DC voltage applied to the lower electrode 18 in adjacent periods PDC1 and PDC2 is generated by temporally combining multiple DC voltages that are output in sequence from the multiple DC power supplies 701 and 702 and that are shifted in phase by 90 degrees. The frequency of the DC voltage generated by temporally combining multiple DC voltages that are output in sequence from the multiple DC power supplies 701 and 702 and that are shifted in phase by 90 degrees is twice the frequency of the DC voltages output from each of the multiple DC power supplies 701 and 702.

[0058] 12, the controller PC supplies a third control signal to the switching unit 721. The third control signal has a high level (or a low level) during a period when the DC voltage from the DC power supply 701 is applied to the lower electrode 18, and a low level (or a high level) during a period when the DC voltage from the DC power supply 701 is not applied to the lower electrode 18. The controller PC also supplies a fourth control signal to the switching unit 722. The fourth control signal has a high level (or a low level) during a period when the DC voltage from the DC power supply 702 is applied to the lower electrode 18, and a low level (or a high level) during a period when the DC voltage from the DC power supply 702 is not applied to the lower electrode 18. The phase of the fourth control signal is shifted by 90 degrees from the phase of the third control signal. That is, control signals (pulse signals) with a phase difference of 90 degrees are supplied to the switching units 721, 722 connected to the DC power supplies 701, 702, respectively. The frequencies of the third control signal and the fourth control signal are half the frequency of the DC voltage generated by temporally combining the DC voltages output sequentially from the DC power supplies 701, 702 and with a phase difference of 90 degrees. According to the plasma processing apparatus 10B, the frequency of the control signal (pulse signal) supplied to each of the switching units 721, 722 connected to the DC power supplies 701, 702 can be reduced. As a result, according to the plasma processing apparatus 10B, heat generation accompanying the control of each of the switching units 721, 722 can be suppressed.

[0059] 13 is a diagram showing a power supply system and a control system of a plasma processing apparatus according to another embodiment. As shown in FIG. 13, a plasma processing apparatus 10C according to another embodiment differs from the plasma processing apparatus 10B in that a DC power supply 702 is omitted. In the plasma processing apparatus 10C, a DC power supply 701 is connected to a switching unit 721 and a switching unit 722.

[0060] FIG. 14 is a diagram showing a power supply system and a control system of a plasma processing apparatus according to yet another embodiment. The plasma processing apparatus 10D shown in FIG. 14 differs from the plasma processing apparatus 10 in that it further includes a waveform adjuster 76. The waveform adjuster 76 is connected between the switching unit 72 and the high-frequency filter 74. The waveform adjuster 76 adjusts the waveform of the DC power output from the DC power supply 70 via the switching unit 72, i.e., the DC voltage that alternates between negative polarity and 0 V. Specifically, the waveform adjuster 76 adjusts the waveform of the DC voltage applied to the lower electrode 18 so that the waveform has a substantially triangular shape. The waveform adjuster 76 is, for example, an integrating circuit.

[0061] FIG. 15 is a circuit diagram showing an example of a waveform adjuster 76. The waveform adjuster 76 shown in FIG. 15 is configured as an integrating circuit and includes a resistor 76a and a capacitor 76b. One end of the resistor 76a is connected to the resistor 72d of the switching unit 72, and the other end of the resistor 76a is connected to the high-frequency filter 74. One end of the capacitor 76b is connected to the other end of the resistor 76a. The other end of the capacitor 76b is connected to ground. In the waveform adjuster 76 shown in FIG. 15, a delay occurs in the rise and fall of the DC voltage output from the switching unit 72 depending on a time constant determined by the resistance value of the resistor 76a and the capacitance value of the capacitor 76b. Therefore, the waveform adjuster 76 shown in FIG. 15 makes it possible to apply a voltage having a pseudo-triangular waveform to the lower electrode 18. A plasma processing apparatus 10D equipped with such a waveform adjuster 76 makes it possible to adjust the energy of ions irradiated onto the inner wall of the chamber body 12.

[0062] Although various embodiments have been described above, various modifications are possible without being limited to the above-described embodiments. For example, the plasma processing apparatus of the various embodiments described above may not have the second high-frequency power supply 62. That is, the plasma processing apparatus of the various embodiments described above may have a single high-frequency power supply.

[0063] Furthermore, in the various embodiments described above, the application and stop of the negative polarity DC voltage from the DC power supply to the lower electrode 18 is switched by a switching unit, but if the DC power supply itself is configured to switch between outputting the negative polarity DC voltage and stopping the output, the switching unit is not necessary.

[0064] Furthermore, in the various embodiments described above, the frequency that defines each period of the DC voltage applied to the lower electrode 18, i.e., the DC frequency, is set to a constant value less than 1 MHz, but the DC frequency may be reduced over time. This makes it possible to prevent the linearity of ions from decreasing within the holes or grooves even when the holes or grooves formed by etching the substrate with plasma become deeper, thereby preventing deterioration of the etching characteristics.

[0065] Furthermore, the characteristic configurations of the various embodiments described above can be used in any combination. Furthermore, while the plasma processing apparatuses according to the various embodiments described above are capacitively coupled plasma processing apparatuses, the plasma processing apparatuses in modified embodiments may be inductively coupled plasma processing apparatuses.

[0066] Note that when the duty ratio is high, the energy of the ions irradiated onto the chamber body 12 increases. Therefore, by setting the duty ratio to a high value, for example, a value greater than 50%, it becomes possible to clean the inner wall of the chamber body 12.

[0067] An evaluation experiment conducted on a plasma processing method using the plasma processing apparatus 10 will now be described.

[0068] (First evaluation experiment) In the first evaluation experiment, samples having silicon oxide films were attached to the chamber 12c-side surface of the top plate 34 of the plasma processing apparatus 10 and to the sidewall of the chamber body 12, and the sample having the silicon oxide film was placed on the electrostatic chuck 20. In the first evaluation experiment, plasma processing was performed under the following conditions: In the first evaluation experiment, the duty ratio of the negative DC voltage periodically applied to the lower electrode 18 was used as a variable parameter.

[0069] <Plasma treatment conditions in the first evaluation experiment> Pressure in chamber 12c: 20 mTorr (2.66 Pa) The flow rate of the gas supplied to the chamber 12c C4F8 gas: 24sccm O2 gas: 16sccm Ar gas: 150 sccm First high frequency: 100MHz, 500W continuous wave Negative DC voltage to the bottom electrode 18 Voltage value: -3000V Frequency (DC frequency): 200kHz Processing time: 60 seconds

[0070] In the first evaluation experiment, the etching amount (thickness reduction amount) of the silicon oxide film of a sample attached to the chamber 12c-facing surface of the top plate 34 was measured. In the first evaluation experiment, the etching amount (thickness reduction amount) of the silicon oxide film of a sample attached to the sidewall of the chamber body 12 was measured. In the first evaluation experiment, the etching amount (thickness reduction amount) of the silicon oxide film of a sample placed on the electrostatic chuck 20 was measured. (a) of FIG. 16 is a graph showing the relationship between the duty ratio and the etching amount of the silicon oxide film of a sample attached to the chamber 12c-facing surface of the top plate 34, as determined in the first evaluation experiment. (b) of FIG. 16 is a graph showing the relationship between the duty ratio and the etching amount of the silicon oxide film of a sample attached to the sidewall of the chamber body 12, as determined in the first evaluation experiment. (c) of FIG. 17 is a graph showing the relationship between the duty ratio and the etching amount of the silicon oxide film of a sample placed on the electrostatic chuck 20, as determined in the first evaluation experiment.

[0071] As shown in FIG. 17 , the etching amount of the silicon oxide film of the sample placed on the electrostatic chuck 20 had little dependence on the duty ratio. Furthermore, as shown in FIGS. 16( a) and 16(b), when the duty ratio was 35% or less, the etching amount of the silicon oxide film of the sample attached to the chamber 12c-facing surface of the top plate 34 was significantly small. Furthermore, as shown in FIGS. 16( a) and 16(b), when the duty ratio was 35% or less, the etching amount of the silicon oxide film of the sample attached to the side wall of the chamber body 12 was significantly small. Therefore, the first evaluation experiment confirmed that the etching rate of the substrate has little dependence on the duty ratio, which is the period during which a negative DC voltage is applied to the lower electrode 18 within each period PDC. Furthermore, when the duty ratio was small, particularly when the duty ratio was 35% or less, the etching rate of the chamber body 12 significantly decreased, i.e., the energy of ions irradiated onto the inner wall of the chamber body 12 was reduced. It is estimated from the graphs of FIGS. 16(a) and 16(b) that if the duty ratio is 50% or less, the energy of the ions irradiated onto the inner wall of the chamber body 12 will be significantly small.

[0072] (Second evaluation experiment) In the second evaluation experiment, a sample having a silicon oxide film was attached to the chamber 12c side surface of the top plate 34 of the plasma processing apparatus 10 and to the side wall of the chamber body 12, and the sample having a silicon oxide film was placed on the electrostatic chuck 20. Then, in the second evaluation experiment, plasma processing was performed under the following conditions.

[0073] <Plasma treatment conditions in the second evaluation experiment> Pressure in chamber 12c: 20 mTorr (2.66 Pa) The flow rate of the gas supplied to the chamber 12c C4F8 gas: 24sccm O2 gas: 16sccm Ar gas: 150 sccm First high frequency: 100MHz, 500W continuous wave Negative DC voltage to the bottom electrode 18 Voltage value: -3000V Frequency (DC frequency): 200kHz Duty ratio: 35% Processing time: 60 seconds

[0074] In the comparative experiment, a sample having a silicon oxide film was attached to the chamber 12c-side surface of the top plate 34 of the plasma processing apparatus 10 and to the sidewall of the chamber body 12, and the sample having a silicon oxide film was placed on the electrostatic chuck 20. In the comparative experiment, a plasma process was performed under the following conditions. The second high frequency conditions in the comparative experiment were set so that the etching amount (amount of film thickness reduction) of the silicon oxide film of the sample placed on the electrostatic chuck 20 was approximately the same between the plasma process in the second evaluation experiment and the plasma process in the comparative experiment.

[0075] <Plasma treatment conditions in comparative experiments> Pressure in chamber 12c: 20 mTorr (2.66 Pa) The flow rate of the gas supplied to the chamber 12c C4F8 gas: 24sccm O2 gas: 16sccm Ar gas: 150 sccm First high frequency: 100MHz, 500W continuous wave Second high frequency: 400kHz, 2500W continuous wave Processing time: 60 seconds

[0076] In each of the second evaluation experiment and the comparative experiment, the etching amount (thickness reduction) of the silicon oxide film of a sample attached to the chamber 12c-side surface of the top plate 34 was measured. Also, in each of the second evaluation experiment and the comparative experiment, the etching amount (thickness reduction) of the silicon oxide film of a sample attached to the sidewall of the chamber body 12 was measured. Figure 18(a) is a graph showing the etching amount of the silicon oxide film of the sample attached to the chamber 12c-side surface of the top plate 34, as determined in each of the second evaluation experiment and the comparative experiment. Figure 18(b) is a graph showing the etching amount of the silicon oxide film of the sample attached to the sidewall of the chamber body 12, as determined in each of the second evaluation experiment and the comparative experiment. In the graph of Figure 18(a), the horizontal axis represents the radial distance from the center of the chamber 12c to the measurement position in the sample attached to the chamber 12c-side surface of the top plate 34. 18(a), the vertical axis represents the etching amount of the silicon oxide film of the sample attached to the chamber 12c-side surface of the top plate 34. In the graph of FIG. 18(b), the horizontal axis represents the vertical distance from the chamber 12c-side surface of the top plate 34 to the measurement position in the sample attached to the sidewall of the chamber 12c. In the graph of FIG. 18(b), the vertical axis represents the etching amount of the silicon oxide film of the sample attached to the sidewall of the chamber body 12.

[0077] 18(a) and 18(b), the etching amount of the silicon oxide film of the sample attached to the chamber 12c-side surface of the top plate 34 was smaller in the second evaluation experiment using a negative DC voltage than in the comparative experiment using the second high frequency. Also, as shown in FIGS. 18(a) and 18(b), the etching amount of the silicon oxide film of the sample attached to the side wall of the chamber body 12 was significantly smaller in the second evaluation experiment using a negative DC voltage than in the comparative experiment using the second high frequency. Therefore, the following effect was confirmed by periodically applying a negative DC voltage to the lower electrode 18. That is, it was confirmed that it is possible to significantly reduce the energy of ions irradiating the wall surfaces of the chamber body 12 and the upper electrode 30 while suppressing a decrease in the energy of ions irradiating the substrate on the electrostatic chuck 20.

[0078] An evaluation simulation performed on a plasma processing method using the plasma processing apparatus 10 will now be described.

[0079] (Evaluation simulation) In the evaluation simulation, the energy distribution (IED) of ions irradiated onto the substrate W and the energy distribution (IED) of ions irradiated onto the inner wall of the chamber body 12 were simulated under the conditions shown below. In the evaluation simulation, the DC frequency was set to 200 kHz, which is less than 1 MHz, and the duty ratio of the negative DC voltage periodically applied to the lower electrode 18 was used as a variable parameter.

[0080] <Conditions for evaluation simulation> Pressure in chamber 12c: 30 mTorr (4.00 Pa) Processing gas supplied to the chamber 12c: Ar gas First high frequency: 100MHz, 500W continuous wave Negative DC voltage to the bottom electrode 18 Voltage: -450V Frequency (DC frequency): 200kHz

[0081] 19A to 19E are simulation results showing an example of the relationship between the duty ratio and the energy of ions irradiated onto the substrate W. FIGS. 20A to 20E are simulation results showing an example of the relationship between the duty ratio and the energy of ions irradiated onto the inner wall of the chamber body 12.

[0082] As shown in FIGS. 19A to 19E, the maximum energy of ions irradiated onto the substrate W was maintained at approximately 270 eV, within the predetermined allowable range, regardless of the change in the duty ratio. Furthermore, as shown in FIGS. 20A to 20E, when the duty ratio was 50% or less, the maximum energy of ions irradiated onto the inner wall of the chamber body 12 was reduced to approximately 60 eV, within the predetermined allowable range. Therefore, the evaluation simulation confirmed that when the DC frequency was set to 200 kHz, which is less than 1 MHz, the etching rate of the substrate W had relatively little dependence on the duty ratio of the DC voltage. Furthermore, when the duty ratio was adjusted to 50% or less with the DC frequency set to 200 kHz, which is less than 1 MHz, the energy of ions irradiated onto the inner wall of the chamber body 12 was reduced to within the predetermined allowable range.

[0083] Furthermore, the following supplementary notes are disclosed regarding the above-described embodiment. (Appendix 1) A plasma processing method performed in a plasma processing apparatus, comprising: The plasma processing apparatus includes: a chamber body providing a chamber; a stage provided within the chamber body and including a lower electrode and supporting a substrate; a high frequency power supply that supplies high frequency waves to generate plasma of the gas supplied to the chamber; one or more DC power sources that generate a DC voltage having a negative polarity that is applied to the lower electrode; Equipped with The plasma processing method includes: supplying a high frequency from the high frequency power supply; applying a DC voltage having a negative polarity to the lower electrode from the one or more DC power sources; Including, a frequency defining each period during which the DC voltage is applied to the lower electrode is set to less than 1 MHz, and a proportion of the period during which the DC voltage is applied to the lower electrode within each period is adjusted. (Appendix 2) 2. The plasma processing method according to claim 1, wherein in the step of applying the DC voltage, the energy of the ions irradiated onto the inner wall of the chamber body is reduced by adjusting the ratio. (Appendix 3) 3. The plasma processing method according to claim 1, wherein the ratio is adjusted to 50% or less. (Appendix 4) the plasma processing apparatus includes a plurality of DC power supplies as the one or more DC power supplies; 4. The plasma processing method according to claim 1, wherein the DC voltage applied to the lower electrode in each of the periods is formed by a plurality of DC voltages output in sequence from the plurality of DC power sources. (Appendix 5) 5. The plasma processing method according to claim 1, wherein the high frequency is supplied during a period in which the DC voltage is applied, and the supply of the high frequency is stopped during a period in which the application of the DC voltage is stopped. (Appendix 6) 5. The plasma processing method according to claim 1, wherein the supply of the high frequency power is stopped during a period in which the DC voltage is applied, and the high frequency power is supplied during a period in which the application of the DC voltage is stopped. (Appendix 7) 7. The plasma processing method according to any one of claims 1 to 6, wherein the high frequency has a frequency within a range of 27 to 100 MHz. (Appendix 8) a chamber body providing a chamber; a stage provided within the chamber body and including a lower electrode and supporting a substrate; a high frequency power source that supplies high frequency waves to excite the gas supplied to the chamber; one or more DC power sources that generate a DC voltage having a negative polarity that is applied to the lower electrode; a switching unit configured to stop application of the DC voltage to the lower electrode; a controller configured to control the switching unit; Equipped with the controller periodically applies a negative DC voltage from the one or more DC power sources to the lower electrode, and controls the switching unit to adjust the proportion of the period during which the DC voltage is applied to the lower electrode within each period, with a frequency that defines each period during which the DC voltage is applied being set to less than 1 MHz. (Appendix 9) 9. The plasma processing apparatus according to claim 8, wherein the controller controls the switching unit to reduce energy of ions irradiated onto the inner wall of the chamber body by adjusting the ratio. (Appendix 10) 10. The plasma processing apparatus according to claim 8, wherein the controller controls the switching unit to adjust the ratio to 50% or less. (Appendix 11) The one or more DC power sources include a plurality of DC power sources, 11. The plasma processing apparatus according to any one of claims 8 to 10, wherein the controller controls the switching unit so that the DC voltage applied to the lower electrode in each period is formed from a plurality of DC voltages output in sequence from the plurality of DC power sources. (Appendix 12) 12. The plasma processing apparatus according to any one of claims 9 to 11, wherein the controller controls the high frequency power supply so that the high frequency is supplied during a period in which the DC voltage is applied and the supply of the high frequency is stopped during a period in which the application of the DC voltage is stopped. (Appendix 13) 12. The plasma processing apparatus according to any one of claims 9 to 11, wherein the controller controls the high frequency power supply so that the supply of the high frequency is stopped during a period in which the DC voltage is applied, and the high frequency is supplied during a period in which the application of the DC voltage is stopped. (Appendix 14) 14. The plasma processing apparatus according to any one of claims 8 to 13, wherein the high frequency has a frequency in the range of 27 to 100 MHz. [Explanation of symbols]

[0084] 10, 10A to 10D Plasma treatment device 12 Chamber body 12c Chamber 16 stages 18 Lower electrode 61 First high frequency power source 70, 701, 702 DC power supply 72, 721, 722 Switching Unit PC Controller MC main control section

Claims

1. a chamber; a stage provided in the chamber and having an electrode for holding a substrate and a bias electrode different from the electrode for holding the substrate; a radio frequency power source configured to output radio frequency power to excite gas within the chamber; one or more DC power supplies configured to output a DC voltage; a switching unit connected between the one or more DC power sources and the bias electrode, and configured to be able to switch between connection and disconnection between the one or more DC power sources and the bias electrode; a controller configured to control the switching unit to periodically apply the DC voltage to the bias electrode at a frequency of less than 1 MHz and a duty ratio of 50% or less; A plasma processing apparatus comprising:

2. A plasma processing apparatus as described in claim 1, wherein the frequency is within the range of 50 to 800 kHz.

3. A plasma processing apparatus as described in claim 2, wherein the duty ratio is 35% or less.

4. A plasma processing apparatus as described in claim 3, wherein the DC voltage has negative polarity.

5. A plasma processing apparatus as described in claim 1, wherein the controller controls the high-frequency power supply to output the high-frequency power periodically.

6. A plasma processing apparatus as described in claim 5, wherein the controller is configured to control the high-frequency power supply and the switching unit to alternately repeat a first period in which the high-frequency power is output while the DC voltage is not applied to the bias electrode and a second period in which the DC voltage is applied to the bias electrode while the high-frequency power is not output.

7. A plasma processing apparatus described in any one of claims 1 to 6, wherein the switching unit includes at least one field effect transistor.

8. The at least one field effect transistor includes a first field effect transistor and a second field effect transistor; a source of the first field effect transistor connected to the one or more DC power sources; the source of the second field effect transistor is connected to a ground potential; a gate of the first field effect transistor connected to a gate of the second field effect transistor; the controller is connected to a node between the gate of the first field effect transistor and the gate of the second field effect transistor; the drain of the first field effect transistor is connected to the drain of the second field effect transistor; 8. The plasma processing apparatus of claim 7, wherein the bias electrode is connected to a node between the drain of the first field effect transistor and the drain of the second field effect transistor.

9. A plasma processing chamber; a stage disposed within the plasma processing chamber; an electrode provided within the stage; A DC power supply; a switching unit connected between the DC power source and the electrode, the switching unit including at least one field effect transistor; a controller configured to control the switching unit to periodically apply a DC voltage from the DC power source to the electrodes at a frequency of less than 1 MHz; A plasma processing apparatus comprising:

10. The plasma processing apparatus of claim 9, wherein the at least one field effect transistor includes a first field effect transistor and a second field effect transistor.

11. The method of claim 10, wherein the source of the first field effect transistor is connected to the DC power supply; the source of the second field effect transistor is connected to a ground potential; a gate of the first field effect transistor connected to a gate of the second field effect transistor; the drain of the first field effect transistor is connected to the drain of the second field effect transistor; the controller is connected to a node between the gate of the first field effect transistor and the gate of the second field effect transistor; The plasma processing apparatus of claim 10 , wherein the electrode is connected to a node between the drain of the first field effect transistor and the drain of the second field effect transistor.

12. A plasma processing apparatus described in any one of claims 9 to 11, wherein the frequency is in the range of 50 to 800 kHz.

13. The plasma processing apparatus of claim 12, wherein the DC voltage has negative polarity.

14. A chamber; a stage provided within the chamber; an electrode provided within the stage; a high frequency power source configured to periodically output high frequency power to generate plasma from the gas in the chamber; a DC voltage generator configured to periodically apply a DC voltage to the electrodes at a frequency of less than 1 MHz; a controller configured to control the high frequency power supply and the DC voltage generator to alternately repeat a first period during which the high frequency power is output while the DC voltage is not applied to the electrode and a second period during which the DC voltage is applied to the electrode while the high frequency power is not output; and A plasma processing apparatus comprising:

15. The plasma processing apparatus of claim 14, wherein the frequency is in the range of 50 to 800 kHz.

16. The plasma processing apparatus of claim 15, wherein the DC voltage has negative polarity.

17. A plasma processing apparatus described in any one of claims 14 to 16, wherein the high-frequency power has a frequency in the range of 27 to 100 MHz.

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