Optical-electrical hybrid board and method for manufacturing the same

Abstract

An opto-electric hybrid mounting substrate (10) is provided with: a substrate (12) including a first surface (13) and a second surface (14); and a rewiring layer (30) that is positioned on a first surface (13) of the substrate (12) and includes at least one conductive layer and at least one insulating layer. The substrate (12) contains glass, an organic material, or a ceramic. The at least one insulating layer includes a lower insulating layer (41), a central insulating layer (42) positioned on the lower insulating layer (41) in the thickness direction of the opto-electric hybrid mounting substrate (10), and an upper insulating layer (45) covering the central insulating layer (42). The refractive index of the central insulating layer (42) is higher than the refractive index of the lower insulating layer (41) and the refractive index of the upper insulating layer (45).

Description

[Technical Field]

[0001] TECHNICAL FIELD Embodiments of the present disclosure relate to an opto-electrical hybrid board and a method for manufacturing an opto-electrical hybrid board. [Background technology]

[0002] With the spread of new services such as cloud computing, communication traffic continues to increase. In data centers, there is a demand for increased capacity and reduced power consumption of network switch devices.

[0003] Co-packaged optics (CPO) has been proposed, which is a package in which part of the electrical wiring in a device is replaced with an optical waveguide. In this application, a substrate for realizing CPO is called an opto-electrical hybrid substrate.

[0004] Patent Document 1 discloses an opto-electric hybrid board including an optical waveguide formed on a base insulating layer made of polyimide, and an optical element. The optical waveguide includes an undercladding layer, a core layer, and an overcladding layer. A mirror is formed on the core layer. An optical signal propagates through the core layer along the longitudinal direction of the opto-electric hybrid board, and is then reflected by the mirror. The optical signal reflected by the mirror propagates in the thickness direction of the opto-electric hybrid board, enters the optical element, and is converted into an electrical signal by the optical element. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Japanese Patent Publication No. 2021-107919 Summary of the Invention [Problem to be solved by the invention]

[0006] When an optical waveguide is formed on a resin such as polyimide, the warping or surface roughness of the resin increases the transmission loss of light. Furthermore, when a mirror is formed, the cost of the optical-electrical hybrid board increases.

[0007] An object of the embodiments of the present disclosure is to provide an opto-electrical hybrid board and a method for manufacturing an opto-electrical hybrid board that can effectively solve such problems. [Means for solving the problem]

[0008] The embodiments of the present disclosure relate to the following [1] to

[25] . [1] An optical / electrical hybrid board, a substrate including a first surface and a second surface opposite the first surface; a redistribution layer located on the first surface of the substrate, the redistribution layer including at least one conductive layer and at least one insulating layer; the substrate comprises glass, an organic material, or a ceramic; the at least one insulating layer includes a lower insulating layer, a central insulating layer located on the lower insulating layer in a thickness direction of the optical-electrical hybrid substrate, and an upper insulating layer covering the central insulating layer; The optical-electrical hybrid board, wherein the refractive index of the central insulating layer is higher than the refractive index of the lower insulating layer and the refractive index of the upper insulating layer.

[0009] [2] In the optical-electrical hybrid substrate described in [1], the substrate may include a plurality of through holes penetrating from the first surface to the second surface, and the optical-electrical hybrid substrate may have a plurality of through electrodes located in the through holes.

[0010] [3] The opto-electrical hybrid board according to [1] may include a plurality of pads located on the second surface of the board, and a plurality of bumps in contact with the plurality of pads, respectively.

[0011] [4] In the optical-electrical hybrid substrate described in any one of [1] to [3], the central insulating layer may include a first portion that overlaps the upper insulating layer in the thickness direction and a second portion that does not overlap the upper insulating layer in the thickness direction, and the first portion may be arranged so as not to overlap the conductive layer in the thickness direction.

[0012] [5] In the optical-electrical hybrid substrate described in [4], the second portion may have a length of 1.0 mm or more and 10.0 mm or less in the planar direction of the first surface and may include an optical connection portion that is continuous with the first portion, and the optical connection portion may be arranged so as not to overlap the conductive layer in the thickness direction.

[0013] [6] The optical-electrical hybrid board according to [5] may include an optical adhesive located on the optical connection portion in the thickness direction.

[0014] [7] In the optical-electrical hybrid board described in [6], the optical adhesive may have a thickness of 0.001 μm or more and 100 μm or less.

[0015] [8] In the optical-electrical hybrid substrate described in any one of [4] to [7], the second portion may include a support portion independent of the first portion, and the support portion may be positioned so as not to overlap the conductive layer in the thickness direction.

[0016] [9] The optical-electrical hybrid board according to [8] may include an optical adhesive located on the support portion in the thickness direction.

[0017]

[10] In the optical-electrical hybrid board described in [9], the optical adhesive may have a thickness of 0.001 μm or more and 100 μm or less.

[0018]

[11] In the optical-electrical hybrid board according to any one of [1] to

[10] , the lower insulating layer, the central insulating layer, and the upper insulating layer may contain polysiloxane.

[0019]

[12] In the optical-electrical hybrid board according to any one of [1] to

[10] , the lower insulating layer, the central insulating layer, and the upper insulating layer may contain an epoxy resin.

[0020]

[13] In the optical-electrical hybrid board according to

[11] or

[12] , the lower insulating layer, the central insulating layer, and the upper insulating layer may contain a plurality of particles made of an inorganic material.

[0021]

[14] In the opto-electrical hybrid board according to any one of [1] to

[13] , the first surface of the board may have an arithmetic mean roughness of 0.3 nm or more and 1000 nm or less.

[0022]

[15] In the optical-electrical hybrid substrate described in any one of [1] to

[14] , the at least one conductive layer may include a plurality of first conductive layers that do not overlap the lower insulating layer, the central insulating layer, and the upper insulating layer in the thickness direction.

[0023]

[16] In the optical-electrical hybrid substrate described in

[15] , the redistribution layer may include a surface insulating layer located on the first surface of the substrate, and the first conductive layer may be located on the surface insulating layer in the thickness direction.

[0024]

[17] In the opto-electrical hybrid board described in [2], the central insulating layer may be arranged so as not to overlap the through hole and the through electrode in the thickness direction of the opto-electrical hybrid board.

[0025]

[18] The optical-electrical hybrid substrate described in any one of [1] to

[17] may have a guide layer having a groove formed therein, the groove having a width of 100 μm or more and 10.0 mm or less, and the guide layer may include the lower insulating layer, the central insulating layer, or the upper insulating layer.

[0026]

[19] The optical-electrical hybrid board according to

[18] may include an optical connector including a pin disposed in the groove.

[0027]

[20] The opto-electrical hybrid board according to any one of [6], [7], [9], and

[10] may include an optical IC including an optical waveguide in contact with the optical adhesive.

[0028]

[21] The optical-electrical hybrid board according to

[20] may include an electrical IC including a terminal electrically connected to the conductive layer.

[0029]

[22] The optical-electrical hybrid board described in any one of [1] to

[21] may comprise a BGA substrate including a substrate including a BGA first surface facing the second surface and a BGA second surface located opposite the BGA first surface, a plurality of pads located on the BGA second surface, and a plurality of bumps contacting each of the plurality of pads.

[0030]

[23] A method for manufacturing an optical / electrical hybrid board, comprising: providing a substrate including a first surface and a second surface opposite the first surface; a rewiring layer forming step of forming a rewiring layer including at least one conductive layer and at least one insulating layer on the first surface of the substrate, the substrate comprises glass, an organic material, or a ceramic; the at least one insulating layer includes a lower insulating layer, a central insulating layer located on the lower insulating layer in a thickness direction of the optical-electrical hybrid substrate, and an upper insulating layer covering the central insulating layer; the redistribution layer forming step includes a wet coating step for forming the lower insulating layer, the central insulating layer, and the upper insulating layer; A method for manufacturing an optical-electrical hybrid board, wherein the refractive index of the central insulating layer is higher than the refractive index of the lower insulating layer and the refractive index of the upper insulating layer.

[0031]

[24] In the method for manufacturing an opto-electrical hybrid board according to

[23] , the lower insulating layer, the central insulating layer and the upper insulating layer may contain polysiloxane or epoxy resin.

[0032]

[25] In the method for manufacturing an opto-electrical hybrid substrate according to

[23] or

[24] , the first surface of the substrate may have an arithmetic mean roughness of 0.3 nm or more and 1000 nm or less. [Effects of the Invention]

[0033] The embodiments of the present disclosure can provide an optical-electrical hybrid board including an optical waveguide with reduced transmission loss at low cost. [Brief explanation of the drawings]

[0034] [Figure 1] 1 is a cross-sectional view showing an optical-electrical hybrid board according to an embodiment; [Figure 2] 1 is a plan view showing an optical-electrical hybrid board according to an embodiment; [Figure 3A] 10 is a cross-sectional view showing an example of a through electrode and a rewiring layer around the through electrode; FIG. [Figure 3B] FIG. 2 is a cross-sectional view showing the opto-electric hybrid board before an electrical IC is mounted thereon. [Figure 4A] FIG. 2 is a cross-sectional view showing an example of an optical waveguide, a coupler, and a stopper. [Figure 4B] FIG. 2 is a cross-sectional view showing an opto-electric hybrid board before an optical IC is mounted. [Figure 5] FIG. 2 is a cross-sectional view showing an example of an optical waveguide. [Figure 6A] FIG. 2 is a cross-sectional view showing an example of an optical connector and a guide layer. [Figure 6B] FIG. 2 is a cross-sectional view showing an example of a guide layer. [Figure 7] 10A to 10C are cross-sectional views showing a step of forming a through hole in a substrate. [Figure 8] 10A to 10C are cross-sectional views showing a step of forming a through electrode in the through hole. [Figure 9] 10A to 10C are cross-sectional views showing a step of forming a filling portion in a through hole. [Figure 10] FIG. 4 is a cross-sectional view showing a step of forming a surface insulating layer on the first surface of the substrate. [Figure 11] 10A to 10C are cross-sectional views showing a step of forming an opening in the surface insulating layer. [Figure 12] FIG. 4 is a cross-sectional view showing a step of forming a first conductive layer. [Figure 13] 10A to 10C are cross-sectional views showing a step of forming a lower insulating layer. [Figure 14] 10A to 10C are cross-sectional views showing a step of removing a part of the lower insulating layer. [Figure 15] 10A to 10C are cross-sectional views showing a step of forming a central insulating layer. [Figure 16] 10A to 10C are cross-sectional views showing a step of forming an upper insulating layer. [Figure 17] 10A to 10C are cross-sectional views showing a process of forming an optical adhesive and bumps. [Figure 18A] FIG. 10 is a cross-sectional view showing an opto-electric hybrid board according to a first modified example. [Figure 18B] FIG. 10 is a cross-sectional view showing an opto-electric hybrid board according to a first modified example. [Figure 19] FIG. 10 is a cross-sectional view showing an opto-electric hybrid board according to a second modified example. [Figure 20] FIG. 4 is a cross-sectional view showing an example of an intermediate portion. [Figure 21] FIG. 4 is a cross-sectional view showing an example of an intermediate portion. [Figure 22] FIG. 10 is a plan view showing a central insulating layer according to a third modified example. [Figure 23] 23 is a cross-sectional view showing the central insulating layer cut along line XXIII in FIG. 22. [Figure 24] 23 is a cross-sectional view showing the central insulating layer cut along line XXIV in FIG. 22. FIG. [Figure 25] 23 is a cross-sectional view showing the central insulating layer cut along line XXV in FIG. 22. [Figure 26A] FIG. 10 is a cross-sectional view showing an opto-electric hybrid board according to a fourth modified example. [Figure 26B] FIG. 10 is a cross-sectional view showing an opto-electric hybrid board according to a fourth modified example. [Figure 26C]FIG. 10 is a cross-sectional view showing an opto-electric hybrid board according to a fourth modified example. [Figure 26D] FIG. 10 is a cross-sectional view showing an opto-electric hybrid board according to a fourth modified example. [Figure 27] 1A and 1B are diagrams illustrating examples of products on which an opto-electric hybrid board is mounted. [Figure 28] FIG. 1 is a diagram showing an indenter used in a nanoindentation test. [Figure 29] FIG. 10 is a cross-sectional view showing an indenter being pressed into an object. [Figure 30] FIG. 10 is a cross-sectional view of the object after the indenter has been removed. [Figure 31] 10 is a graph showing the relationship between indentation depth and load. [Figure 32] 2 is a cross-sectional view showing an optical waveguide of the opto-electric hybrid board according to the first embodiment. FIG. [Figure 33] FIG. 2 is a diagram illustrating a method for evaluating the optical waveguide of Example 1. [Figure 34] 4 is a graph showing the evaluation results of the optical waveguide of Example 1. [Figure 35] FIG. 10 is a diagram showing the evaluation results of the optical waveguide of Example 2. [Figure 36] FIG. 10 is a diagram showing the evaluation results of the optical waveguide of Example 3. [Figure 37] FIG. 10 is a diagram showing the evaluation results of the optical waveguide of Example 4. DETAILED DESCRIPTION OF THE INVENTION

[0035] The configuration of an opto-electrical hybrid substrate and a manufacturing method thereof will be described in detail with reference to the drawings. The following embodiments are examples of embodiments of the present disclosure, and the present disclosure is not limited to these embodiments. In this specification, terms such as "substrate," "base material," "sheet," and "film" are not distinguished from one another solely based on differences in name. For example, the concept of "substrate" includes components that may be called sheets or films. "Surface" refers to a surface that coincides with the planar direction of the target plate-like component when viewed holistically and comprehensively. The normal direction used with respect to a plate-like component refers to the normal direction to the component's surface. As used in this specification, terms such as "parallel" and "orthogonal," as well as length and angle values, that specify shape, geometric conditions, and their degrees, are interpreted without being bound by strict meanings but include a range within which similar functions can be expected.

[0036] In this specification, when multiple upper limit candidates and multiple lower limit candidate values ​​are listed for a certain parameter, the numerical range of the parameter may be constructed by combining any one upper limit candidate with any one lower limit candidate. For example, consider a description that reads, "Parameter B is, for example, A1 or more, or may be A2 or more, or may be A3 or more. Parameter B is, for example, A4 or less, or may be A5 or less, or may be A6 or less." In this case, the numerical range of parameter B may be A1 or more and A4 or less, A1 or more and A5 or less, A1 or more and A6 or less, A2 or more and A4 or less, A2 or more and A5 or less, A2 or more and A6 or less, A3 or more and A4 or less, A3 or more and A5 or less, or A3 or more and A6 or less.

[0037] In this specification, physical properties such as refractive index and dielectric loss tangent are measured in an environment of a temperature of 23±2° C. and a relative humidity of 50±5%, unless otherwise specified.

[0038] In the drawings referred to in this embodiment, the same parts or parts having similar functions are denoted by the same or similar reference numerals, and repeated explanations thereof may be omitted. Furthermore, the dimensional ratios of the drawings may differ from the actual ratios for the convenience of explanation, and some components may be omitted from the drawings.

[0039] An embodiment of the present disclosure will be described. Fig. 1 is a cross-sectional view showing an example of an opto-electric hybrid substrate 10. Fig. 2 is a plan view showing an example of the opto-electric hybrid substrate 10. For convenience of explanation, the number of components of the opto-electric hybrid substrate 10 in Fig. 1 is reduced compared to Fig. 2.

[0040] The opto-electrical hybrid substrate 10 includes a substrate 12, a through electrode 20, and a redistribution layer 30. An electrical IC 60 and an optical IC 70 may be mounted on the opto-electrical hybrid substrate 10. An optical connector 80 may be mounted on the opto-electrical hybrid substrate 10. An optical fiber ribbon 85 may be connected to the optical connector 80. The opto-electrical hybrid substrate 10 may include an optical adhesive 50.

[0041] The electrical IC 60 and the optical IC 70 may include semiconductor elements, such as transistors made of a semiconductor such as silicon. Examples of the semiconductor elements include a CPU, a GPU, an ASIC, an FPGA, a sensor, and a memory.

[0042] (substrate) The substrate 12 includes a first surface 13 and a second surface 14 located on the opposite side of the first surface 13. The substrate 12 further includes a plurality of through holes 15 that penetrate from the first surface 13 to the second surface 14. The through electrodes 20 are located in the through holes 15.

[0043] The substrate 12 includes an insulating material. For example, the substrate 12 includes an inorganic material with high rigidity, such as glass. By increasing the rigidity of the substrate 12, deformation such as warping of the substrate 12 can be suppressed.

[0044] An example of the glass used for the substrate 12 is alkali-free glass. The alkali-free glass is glass that does not contain alkali components such as sodium or potassium. The alkali-free glass contains, for example, boric acid instead of an alkali component. The alkali-free glass also contains, for example, an alkaline earth metal oxide such as calcium oxide or barium oxide.

[0045] The insulating material constituting the substrate 12 may be an organic material or ceramics. Examples of organic materials include phenolic resin, epoxy resin, polyimide resin, and fluororesin. The aforementioned organic resin materials may be used by impregnating paper, glass cloth, woven glass cloth, nonwoven glass cloth, etc. Examples of ceramics include aluminum nitride (alumina), aluminum oxide (sapphire), silicon oxide (quartz), and composite ceramics thereof.

[0046] The thickness T0 of the substrate 12 is, for example, 100 μm or more, and may be 300 μm or more, or 500 μm or more. The thickness T0 of the substrate 12 is, for example, 2000 μm or less, and may be 1500 μm or less, or 1000 μm or less. The thickness direction of the substrate 12 determines the thickness direction of the opto-electrical hybrid substrate 10. In the following description, the thickness direction of the opto-electrical hybrid substrate 10 is also referred to as the third direction D3.

[0047] Unless otherwise specified, the dimensions of the components of the opto-electric hybrid board 10, such as the thickness T0 of the board 12, are calculated based on a cross-sectional image of the opto-electric hybrid board 10 taken by a scanning electron microscope.

[0048] The substrate 12 preferably has a predetermined elastic modulus. The elastic modulus of the substrate 12 is, for example, 500 MPa or more, and may be 1.0 GPa or more, or 5.0 GPa or more. The elastic modulus of the substrate 12 is, for example, 500 GPa or less, and may be 100 GPa or less, or 20 GPa or less. By making the substrate 12 have a predetermined elastic modulus, it is possible to prevent changes in optical properties due to residual stress in the central insulating layer that guides light, and it is also possible to suppress warping of the substrate 12 itself, thereby improving reliability during mounting and easing process margins.

[0049] The elastic modulus of the substrate 12 is calculated by a nanoindentation test. 28 is a diagram showing an indenter 111 used in a nanoindentation test. The indenter 111 includes a pyramidal surface with an apex angle of 115°.

[0050] In a nanoindentation test, an indenter 111 attached to a transducer is pressed into the surface of an object placed on a stage while applying a load with the transducer. When measuring the Young's modulus of the substrate 12, the indenter 111 is pressed into a cross section of the substrate 12 that is parallel to the third direction D3.

[0051] FIG. 29 is a cross-sectional view showing a state in which an indenter 111 is being pressed into an object 115. The surface of the object 115 in the state in which the indenter 111 is pressed is also referred to as a deformed surface 116. Thereafter, the indenter 111 is removed from the object 115 by moving the indenter 111 in the direction opposite to the pressing direction. FIG. 30 is a cross-sectional view showing the object 115 after the indenter 111 has been removed. The surface of the object 115 after the indenter 111 has been removed is also referred to as a restored surface 117. In FIG. 30, the deformed surface 116 is indicated by a dotted line.

[0052] 31 is a graph showing the relationship between the indentation depth h of the indenter 111 and the load P of the indenter 111. The load P increases along a quadratic curve A as the indentation depth h of the indenter 111 increases. The curve A represents both the elastic deformation and the plastic deformation of the object 115. When the indentation is completed, the indentation depth h of the indenter 111 reaches a maximum value h max The load P is also at its maximum value P max This becomes:

[0053] After the indenter 111 has been pressed down, the indenter 111 is moved in the direction opposite to the pressing direction. As a result, as shown in FIG. 31, the load P decreases along a quadratic curve B that is steeper than the curve A. Furthermore, due to elastic recovery caused by the unloading of the indenter 111, the surface of the object 115 is deformed from the deformed surface 116 to the restored surface 117. f represents the depth of the recess formed in the restoration surface 117.

[0054] In nanoindentation tests, the reduced elastic modulus of the indentation contact, E r is calculated by the following formula: E r =π 1 / 2 / 2CA p 1 / 2 (1) In formula (1), C is the maximum value of the load P max The slope of the tangent to curve B at is dP / dh. p is the projected area where the indenter 111 and the object 115 are in contact.

[0055] A in formula (1) p can be calculated by the following formula: A p =23.96×{h max -ε(h max -h C )} (2) In equation (2), ε is a correction factor due to the geometric shape of the indenter 1. When the indenter 111 is a diamond Vickers indenter, ε is 0.75. C is the maximum load P maxThis is the intersection point of the tangent to curve B at the point and the horizontal axis of Figure 31.

[0056] Reduced Elasticity E r Based on this, the indentation elastic modulus E of the object 115 IT is calculated by the following formula: E IT ={1-(V S ) 2} / [(1 / E r )-{1-(V i ) 2} / E i ] (3) In formula (3), V S is the Poisson's ratio of the object 115. V i is the Poisson's ratio of the indenter 111. E i is the elastic modulus of the indenter 111.

[0057] The substrate 12 preferably has a predetermined coefficient of thermal expansion. The coefficient of thermal expansion of the substrate 12 is, for example, 1.0 ppm / °C or more, optionally 2.0 ppm / °C or more, or 5.0 ppm / °C or more. The coefficient of thermal expansion of the substrate 12 is, for example, 50.0 ppm / °C or less, optionally 20.0 ppm / °C or less, or optionally 10.0 ppm / °C or less. By making the substrate 12 have a predetermined coefficient of thermal expansion, it is possible to prevent changes in optical properties due to residual stress in the central insulating layer that guides light, and it is also possible to suppress warping of the substrate 12 itself, thereby improving reliability during mounting and easing process margins.

[0058] The thermal expansion coefficient of the substrate 12 is calculated based on the thermal expansion that occurs in the substrate 12 as the temperature changes from 20°C to 250°C. The thermal expansion that occurs in the substrate 12 is measured using a cantilever attached to a cross section of the substrate 12 that is parallel to the third direction D3. Specifically, a probe attached to the tip of the cantilever is used to measure the displacement of the substrate 12 due to the thermal expansion. The probe is attached to an atomic force microscope. The measurement conditions are as follows: Atomic force microscope: Bruker Japan AFM - IR device "Dimension IconIR" Tip diameter: 10nm to 30nm Analysis depth: 30nm Temperature range: 20℃~250℃

[0059] The first surface 13 of the substrate 12 is preferably smooth. A smooth first surface 13 can contribute to reducing the transmission loss of the optical waveguide 46, which will be described later. The arithmetic mean roughness Ra of the first surface 13 is, for example, 1000 nm or less, and may be 500 nm or less, 200 nm or less, 100 nm or less, 50 nm or less, 20 nm or less, 10 nm or less, 7 nm or less, 5 nm or less, or 3 nm or less. When the arithmetic mean roughness Ra of the first surface 13 is 1000 nm or less, deviation of the pitch of the plurality of optical waveguides 46, which will be described later, from the pitch of the plurality of optical fibers 86 of the optical fiber ribbon 85, which will be described later, is suppressed. The arithmetic mean roughness Ra is, for example, 0.3 nm or more, or may be 0.5 nm or more, or 1.0 nm or more. The arithmetic mean roughness Ra is measured in accordance with JIS B0601:2013.

[0060] The arithmetic mean roughness Ra is measured using an atomic force microscope in an inspection area located at the center of the object in a plan view. The inspection area is a square area with a side length of 1 μm. The inspection area has an outline including a pair of first sides and a pair of second sides perpendicular to the first sides. Surface measurements are performed along multiple inspection lines at 0.25 nm intervals. The multiple inspection lines extend in the direction of the first sides. The multiple inspection lines are arranged at 0.25 nm intervals in the direction of the second sides.

[0061] 2, the surface direction of the first surface 13 of the substrate 12 includes a first direction D1 and a second direction D2 intersecting the first direction D1. The second direction D2 may be a direction perpendicular to the first direction D1. The substrate 12 may include a side extending in the first direction D1 and a side extending in the second direction D2. The optical connector 80 may be fixed to the side of the substrate 12 extending in the second direction D2.

[0062] (Through electrode) 3 is a cross-sectional view showing an example of the through electrode 20. The through electrode 20 may be located partially in the through hole 15. "Partially" means that the entire space of the through hole 15 is not occupied by the through electrode 20.

[0063] The through electrode 20 includes at least a main body portion 22. The main body portion 22 extends along the wall surface 16 of the through hole 15 from the first surface 13 to the second surface 14. The through electrode 20 may include a first layer 23 located on the first surface 13. The first layer 23 is connected to an end of the main body portion 22 at the first surface 13. The through electrode 20 may include a second layer 24 located on the second surface 14. The second layer 24 is connected to an end of the main body portion 22 at the second surface 14.

[0064] The through electrode 20 includes a conductive material, such as a metal such as copper, gold, silver, platinum, rhodium, tin, aluminum, nickel, titanium, chromium, or zinc, or an alloy using any of these metals.

[0065] 3, the main body portion 22 may be partially located in the through hole 15. For example, the main body portion 22 may have a hollow shape extending in the third direction D3 along the wall surface 16. In this case, the opto-electrical hybrid substrate 10 may include a filling portion 25 located inside the main body portion 22 in the through hole 15. "Inside" refers to a direction approaching the center of the through hole 15 in a plan view.

[0066] The filling portion 25 includes an insulating material. The filling portion 25 may include an insulating organic material. Examples of the organic material include polyimide, epoxy resin, acrylic resin, and polyphenyl ether. The filling portion 25 may include an insulating material containing silicon, such as polysiloxane.

[0067] The dimension of through hole 15 in the planar direction of first surface 13 is, for example, 20 μm or more, or may be 30 μm or more, or 40 μm or more. The dimension of through hole 15 in the planar direction of first surface 13 is, for example, 150 μm or less, or may be 100 μm or less, or may be 60 μm or less. The dimension of through hole 15 is determined in the direction in which the dimension is greatest.

[0068] (Rewiring layer) The redistribution layer 30 is located on the first surface 13 of the substrate 12. The redistribution layer 30 includes at least one conductive layer and at least one insulating layer. The redistribution layer 30 may include multiple conductive layers stacked in the third direction D3. The redistribution layer 30 may include multiple insulating layers stacked in the third direction D3. The conductive layer may form a wiring, a pad, or the like. The conductive layer may be electrically connected to the through electrode 20.

[0069] As shown in FIG. 1 , the redistribution layer 30 may include a first conductive layer 31, a surface insulating layer 47, a lower insulating layer 41, a central insulating layer 42, and an upper insulating layer 45. In other words, the multiple insulating layers may include the surface insulating layer 47, the lower insulating layer 41, the central insulating layer 42, and the upper insulating layer 45 stacked in the third direction D3 as shown in FIG. 1 . The multiple insulating layers do not have to be stacked over the entire area. For example, the surface insulating layer 47 may include a portion overlapping the lower insulating layer 41 and a portion not overlapping the lower insulating layer 41. For example, the lower insulating layer 41 may include a portion overlapping the central insulating layer 42 and a portion not overlapping the central insulating layer 42.

[0070] The surface insulating layer 47 is located on the first surface 13 of the substrate 12. The surface insulating layer 47 may cover the first layer 23 of the through electrode 20. The first conductive layer 31 may be located on the surface insulating layer 47. The first conductive layer 31 may be located in an opening of the surface insulating layer 47 and may include a portion that is connected to the through electrode 20.

[0071] The conductive layer will now be described. Fig. 3A shows the redistribution layer 30 around the through electrode 20. The first conductive layer 31 is a conductive layer for transmitting a potential or an electrical signal between two electrical elements. In other words, the first conductive layer 31 is not an electrically floating conductive layer.

[0072] Although not shown, the multiple conductive layers of the redistribution layer 30 may include at least one dummy conductive layer. A dummy conductive layer is a conductive layer that is connected to only one electrical element or is not connected to any electrical element. The dummy conductive layer does not play a role in transmitting an electric potential or an electrical signal between two electrical elements.

[0073] The first conductive layer 31 may include a first pad 33. The first pad 33 is electrically connected to a terminal 61 of the electrical IC 60. The first pad 33 may be electrically connected to the through electrode 20. A bump 55 may be located between the first pad 33 and the terminal 61. The bump 55 may include, for example, solder.

[0074] 3B is a cross-sectional view showing an example of the opto-electrical hybrid substrate 10 before the electrical IC 60 is mounted. The first pad 33 includes a lower surface and an upper surface that is not covered by the insulating layer. The "lower surface" refers to the surface facing the substrate 12 in the third direction D3. The "lower surface" of a layer located on the first surface 13 side, such as the first conductive layer 31, faces the first surface 13 of the substrate 12 in the third direction D3. The lower surface of the first pad 33 may be in contact with the surface insulating layer 47. The "upper surface" refers to the surface located opposite the lower surface in the third direction D3.

[0075] 1, the first conductive layer 31 may include a second pad 34. The second pad 34 is electrically connected to a terminal 71 of the optical IC 70. The second pad 34 may be electrically connected to the through electrode 20. A bump 55 may be located between the second pad 34 and the terminal 71.

[0076] 1, the first conductive layer 31 may include a connection wiring 32. The connection wiring 32 extends along the surface direction of the first surface 13 from the first pad 33 to the second pad 34, as shown in FIG.

[0077] The conductive layers such as the first conductive layer 31 include a conductive material such as a metal such as copper, gold, silver, platinum, rhodium, tin, aluminum, nickel, titanium, chromium, or zinc, or an alloy using any of these metals.

[0078] The thickness of a conductive layer for transmitting an electric potential or an electric signal between two electric elements, such as first conductive layer 31, is, for example, 0.5 μm or more, optionally 2.0 μm or more, optionally 4.0 μm or more, or optionally 6.0 μm or more. The thickness of the conductive layer is, for example, 12.0 μm or less, optionally 10.0 μm or less, or optionally 8.0 μm or less.

[0079] The insulating layers will now be described. The lower insulating layer 41 may be located on the surface insulating layer 47. The central insulating layer 42 is located on the lower insulating layer 41 in the third direction D3. The upper insulating layer 45 covers the central insulating layer 42. "The upper insulating layer 45 covers the central insulating layer 42" means that the upper insulating layer 45 is in contact with an upper surface 421 and a side surface 423 of the central insulating layer 42, as shown in FIG. 5. The central insulating layer 42 includes an upper surface 421, a lower surface 422, and a side surface 423. The lower surface 422 is a surface facing the first surface 13. The upper surface 421 is a surface located opposite the lower surface 422 in the third direction D3. The side surface 423 is located between the upper surface 421 and the lower surface 422. The side surface 423 may extend parallel to the extension direction of the central insulating layer 42 in a plan view.

[0080] The lower insulating layer 41, the central insulating layer 42, and the upper insulating layer 45 are configured so that total reflection of light occurs at the interface between the central insulating layer 42 and the lower insulating layer 41 or the upper insulating layer 45. For example, the refractive index of the central insulating layer 42 is higher than the refractive index of the lower insulating layer 41 and the refractive index of the upper insulating layer 45. An optical signal is propagated in the central insulating layer 42 while being totally reflected at the interface. The lower insulating layer 41, the central insulating layer 42, and the upper insulating layer 45 can form an optical waveguide 46 through which light is transmitted.

[0081] The ratio (n2-n1) / n2 of the difference between the refractive index n2 of the central insulating layer 42 and the refractive index n1 of the lower insulating layer 41 to the refractive index n2 of the central insulating layer 42 is, for example, 0.3% or more, or may be 0.5% or more, or 0.8% or more. The ratio is, for example, 2.0% or less, or may be 1.5% or less, or may be 1.0% or less. The numerical range of the ratio (n2-n3) / n2 of the difference between the refractive index n2 of the central insulating layer 42 and the refractive index n3 of the upper insulating layer 45 to the refractive index n2 of the central insulating layer 42 may be the same as the numerical range of the ratio (n2-n1) / n2 described above.

[0082] The wavelength of light used in the optical IC 70 is, for example, light in the 850 nm band, 1310 nm band, or 1550 nm band. The above-mentioned refractive index is defined for the wavelength of light used in the optical IC 70. For example, when light in the 850 nm band is used, the above-mentioned numerical range of the refractive index is defined for light of a wavelength of 850 nm.

[0083] The refractive indices of the lower insulating layer 41, the central insulating layer 42, and the upper insulating layer 45 are measured by a spectroscopic ellipsometer under the following measurement conditions. Spectroscopic ellipsometer: SE-1000 manufactured by Semilab Japan The fitting calculation model is selected appropriately depending on the material, but examples include the Cauchy model or Gaussian model.

[0084] As described above, the lower insulating layer 41 and the upper insulating layer 45 serve to confine light to the central insulating layer 42. The lower insulating layer 41 and the upper insulating layer 45 function like the cladding of an optical fiber, and the central insulating layer 42 functions like the core of an optical fiber. The lower insulating layer 41 is also referred to as the first insulating layer, and the upper insulating layer 45 is also referred to as the second insulating layer. The central insulating layer 42 is located between the first insulating layer and the second insulating layer in the third direction D3.

[0085] 4A is a cross-sectional view showing an example of an optical waveguide 46. The optical waveguide 46 includes the above-mentioned lower insulating layer 41, central insulating layer 42, and upper insulating layer 45. As shown in FIG. 2, the optical waveguide 46 extends from the optical IC 70 to the optical connector 80 in a plan view.

[0086] 1 and 4A, the optical IC 70 includes a photoelectric conversion unit 73. The photoelectric conversion unit 73 may convert an electrical signal transmitted from the electrical IC 60 to the optical IC 70 into an optical signal. The optical signal converted by the photoelectric conversion unit 73 is transmitted to the optical connector 80 via the optical waveguide 46. The photoelectric conversion unit 73 may convert an optical signal transmitted from the optical connector 80 to the optical IC 70 into an electrical signal. The electrical signal converted by the photoelectric conversion unit 73 is transmitted to the electrical IC 60 via the connection wiring 32.

[0087] The lower insulating layer 41 has a thickness T1. The central insulating layer 42 has a thickness T2. The upper insulating layer 45 has a thickness T3. The thickness T2 may be smaller than the thicknesses T1 and T3.

[0088] The thickness T2 is, for example, 1.0 μm or more, optionally 3.0 μm or more, or 5.0 μm or more. The thickness T2 is, for example, 15.0 μm or less, optionally 12.0 μm or less, or optionally 10.0 μm or less.

[0089] The thickness T1 is, for example, 10.0 μm or more, optionally 15.0 μm or more, or optionally 20.0 μm or more. The thickness T1 is, for example, 50.0 μm or less, optionally 40.0 μm or less, or optionally 30.0 μm or less.

[0090] The ratio of the thickness T1 to the thickness T2, T1 / T2, is, for example, 1.2 or more, or may be 1.5 or more, or may be 2.0 or more. The ratio T1 / T2 is, for example, 5.0 or less, or may be 4.0 or less, or may be 3.0 or less.

[0091] The numerical range of thickness T3 may be the same as the numerical range of thickness T1 described above. The numerical range of ratio T3 / T2 may be the same as the numerical range of ratio T1 / T2 described above. Thickness T3 is the distance in third direction D3 from the lower surface of upper insulating layer 45, which is in contact with upper surface 421 of central insulating layer 42, to the upper surface of upper insulating layer 45.

[0092] The lower insulating layer 41, the central insulating layer 42, and the upper insulating layer 45 have insulating properties and contain a material suitable for transmitting light (hereinafter also referred to as an optical transmission material). The optical transmission material contains, for example, a base material having a low dielectric loss tangent. The dielectric loss tangent of the base material at a frequency of 1 kHz is, for example, 10.0×10 -5 is less than or equal to 5.0 x 10 -5 The dielectric loss tangent of the base material at a frequency of 1 GHz may be, for example, 1.0×10 -5 is less than or equal to 2.0 x 10 -5 The main agent may be, for example, polysiloxane, epoxy resin, polynorbornene, fluororesin, silicone resin, phenolic resin, etc. The main agent may contain two or more types of materials.

[0093] The optically transmitting material may include a plurality of particles. The plurality of particles are dispersed in a base material. The refractive index of the optically transmitting material varies depending on parameters such as particle size, concentration, and composition. The particle parameters may be adjusted individually for each of the lower insulating layer 41, the central insulating layer 42, and the upper insulating layer 45. For example, the particle parameters may be adjusted so that the ratio of the difference in refractive index between the central insulating layer 42 and the lower insulating layer 41 to the refractive index of the central insulating layer 42 is set to a target value.

[0094] The particles may contain an inorganic material. The inorganic material may be an oxide, sulfide, or nitride of one or more metals selected from the group consisting of Be, Al, Si, Ti, V, Fe, Cu, Zn, Y, Zr, Nb, Mo, In, Sn, Sb, Ta, W, Pb, Bi, and Ce. Metal oxides are particularly preferred. Examples of metal oxides include Al2O3, ZnO, TiO2, ZrO2, Fe2O3, Sb2O3, BeO, ZnO, SnO2, CeO2, SiO2, WO3, ZnSb2O6, BaTiO3, SrTiO3, SrSnO3, etc.

[0095] Particles of two or more types of inorganic materials may be used, for example, particles made of a first inorganic material and particles made of a second inorganic material.

[0096] A single particle may contain two or more types of inorganic materials. For example, a single particle may contain TiO2 and ZrO2. For example, a single particle may contain TiO2, ZrO2, and SnO2. For example, a single particle may contain ZrO2 and SnO2.

[0097] The average particle size is, for example, 2 nm or more, and may be 5 nm or more, or 10 nm or more. The average particle size is, for example, 50 nm or less, 30 nm or less, or 20 nm or less. The average size is the average value of the dimensions of 100 particles in a planar view. If the particle shape in a planar view is circular, the particle size is the particle diameter. If the particle shape in a planar view is not circular, the particle size is the particle's equivalent circle diameter.

[0098] The central insulating layer 42 may include a first portion 43 and a second portion 44. The first portion 43 is a portion of the central insulating layer 42 that overlaps with the upper insulating layer 45 in the third direction D3. The second portion 44 is a portion of the central insulating layer 42 that does not overlap with the upper insulating layer 45 in the third direction D3.

[0099] The first portion 43 of the central insulating layer 42 constitutes the optical waveguide 46. Preferably, the first portion 43 is arranged so as not to overlap the conductive layer of the redistribution layer 30 in the third direction D3. For example, the first portion 43 is preferably arranged so as not to overlap a conductive layer, such as the first conductive layer 31, for transmitting a potential or an electrical signal between two electrical elements in the third direction D3. The surface of the insulating layer that overlaps the conductive layer in the third direction D3 may have undulations, roughness, etc. due to the thickness of the conductive layer. Since the first portion 43 does not overlap the conductive layer, the flatness of the upper and lower surfaces of the first portion 43 is improved. Therefore, the transmission loss of light in the optical waveguide 46 is reduced.

[0100] Although not shown, the first portion 43 may overlap a thin conductive layer of the redistribution layer 30 in the third direction D3. The thin conductive layer may be, for example, the dummy conductive layer described above. As described above, the dummy conductive layer is a conductive layer that does not play a role in transmitting an electric potential or an electric signal between two electrical elements. The dummy conductive layer may have a thickness smaller than that of the first conductive layer 31. Because the thickness of the dummy conductive layer is small, the flatness of the upper and lower surfaces of the first portion 43 overlapping the dummy conductive layer in the third direction D3 is maintained. The thickness of the dummy conductive layer is, for example, 1000 nm or less.

[0101] The first portion 43 may be arranged so as not to overlap the through hole 15 and the through electrode 20 in the third direction D3. When the first portion 43 does not overlap the through hole 15 and the through electrode 20, the flatness of the upper and lower surfaces of the first portion 43 is improved.

[0102] 5 is a cross-sectional view showing the optical waveguide 46 cut along line VV in FIG. 2. A plurality of first portions 43 may be arranged along the second direction D2. The number of first portions 43 may correspond to the number of optical fibers 86 of the optical fiber ribbon 85 connected to the optical connector 80.

[0103] 5, the symbol W1 represents the width of the first portions 43 in the direction in which the multiple first portions 43 are arranged. The width W1 is, for example, 1.0 μm or more, and may be 3.0 μm or more, or 5.0 μm or more. The width W1 is, for example, 200 μm or less, and may be 100 μm or less, or 50 μm or less.

[0104] 4A , the second portion 44 of the central insulating layer 42 may include an optical connection portion 441. The optical connection portion 441 is a portion of the second portion 44 that is continuous with the first portion 43. Light is continuously propagated from the first portion 43 of the optical waveguide 46 to the optical connection portion 441. When the optical IC 70 is mounted on the opto-electrical hybrid substrate 10, the optical connection portion 441 overlaps with the optical waveguide 72 of the optical IC 70 in the third direction D3.

[0105] The optical connection portion 441 includes a portion extending parallel to the optical waveguide 72 of the optical IC 70. For example, the top surface of the optical connection portion 441 extends parallel to the surface direction of the first surface 13. Light propagating through the optical connection portion 441 seeps out toward the optical waveguide 72, whereby an optical signal is transmitted from the optical connection portion 441 to the optical waveguide 72. The optical signal transmitted to the optical waveguide 72 is converted into an electrical signal by the photoelectric conversion unit 73. The electrical signal may be transmitted from the optical IC 70 to the electrical IC 60 via the above-mentioned connection wiring 32 or the like.

[0106] Preferably, the optical connection portion 441 is arranged so as not to overlap a conductive layer of the redistribution layer 30 in the third direction D3. For example, the optical connection portion 441 is preferably arranged so as not to overlap a conductive layer for transmitting an electric potential or an electric signal between two electric elements, such as the first conductive layer 31, in the third direction D3. Since the optical connection portion 441 does not overlap a conductive layer, the flatness of the upper and lower surfaces of the optical connection portion 441 is improved. Therefore, the optical transmission loss between the optical connection portion 441 and the optical waveguide 72 of the optical IC 70 is reduced.

[0107] Although not shown, the optical connection portion 441 may overlap a thin conductive layer of the redistribution layer 30 in the third direction D3. The thin conductive layer is, for example, the above-mentioned dummy conductive layer. Because the thickness of the dummy conductive layer is small, the flatness of the upper and lower surfaces of the optical connection portion 441 that overlap the dummy conductive layer in the third direction D3 is maintained.

[0108] The optical connection portion 441 may be arranged so as not to overlap the through hole 15 and the through electrode 20 in the third direction D3. Since the optical connection portion 441 does not overlap the through hole 15 and the through electrode 20, the flatness of the upper and lower surfaces of the optical connection portion 441 is improved.

[0109] 4A, the symbol L1 represents the length of the optical connection portion 441 extending parallel to the optical waveguide 72. The length L1 is, for example, 1.0 mm or more, and may be 2.0 mm or more, or 3.0 mm or more. The length L1 is, for example, 10.0 mm or less, and may be 7.0 mm or less, or 5.0 mm or less.

[0110] 4B is a cross-sectional view showing an example of the opto-electrical hybrid substrate 10 before mounting the optical IC 70. In the state shown in FIG. 4B, the length L1 of the optical connection portion 441 is the length of the portion of the second portion 44 that is continuous with the first portion 43 and does not overlap the upper insulating layer 45 in the third direction D3.

[0111] As shown in FIG. 4A , the opto-electrical hybrid substrate 10 may include an optical adhesive 50 located between the optical connecting portion 441 and the optical waveguide 72 of the optical IC 70 in the third direction D3. The optical adhesive 50 contacts the upper surface of the optical connecting portion 441 and the lower surface of the optical waveguide 72 of the optical IC 70. The optical adhesive 50 is optically transparent. For example, the optical adhesive 50 has optical transparency suitable for the wavelength of light used in the optical IC 70. The wavelength of light used in the optical IC 70 may be, for example, in the 850 nm band, 1310 nm band, or 1550 nm band. The optical connecting portion 441 and the optical adhesive 50 can form a coupler 53 that transmits light between the redistribution layer 30 and the optical IC 70.

[0112] The optical transmittance of the optical adhesive 50 may be determined based on the loss of light propagating through the optical adhesive 50. The optical adhesive 50 has low loss for at least one of the wavelengths described above. The loss of the optical adhesive 50 per unit thickness may be, for example, 1.00 dB / cm or less, 0.70 dB / cm or less, 0.50 dB / cm or less, or 0.30 dB / cm or less. The loss of the optical adhesive 50 per unit thickness may be 0.05 dB / cm or more, or 0.10 dB / cm or more. The loss of the optical adhesive 50 is measured using a test pattern of a single-mode waveguide formed with the optical adhesive 50. The test pattern includes the optical connection portion 441 of the present application, a silicon waveguide, and the optical adhesive 50 positioned between the optical connection portion 441 and the silicon waveguide. Multiple test patterns with different thicknesses of the optical adhesive 50 are prepared. The loss of the entire waveguide is evaluated for each of the multiple test patterns using a specific wavelength of light. Based on the dependence of the loss on the thickness of the optical adhesive 50, the loss of the optical adhesive 50 per unit thickness is calculated.

[0113] The optical transmittance of the optical adhesive 50 may be defined by its transmittance. The optical adhesive 50 has high transmittance for at least one of the above-mentioned wavelengths. The transmittance of the optical adhesive 50 per unit thickness may be, for example, 79% / cm or more, 85% / cm or more, 90% / cm or more, or even 95% / cm or more. The transmittance of the optical adhesive 50 per unit thickness may be 100% / cm or less, or 99% / cm or less. The transmittance of the optical adhesive 50 is measured using a film made of the optical adhesive 50. The transmittance of the film is measured by measuring the transmittance of plastic using an NIR spectrophotometer integrating sphere attachment.

[0114] The optical adhesive 50 may have either a loss or a transmittance that satisfies the above-mentioned ranges. Of course, the optical adhesive 50 may have both a loss and a transmittance that satisfy the above-mentioned ranges.

[0115] The material constituting the optical adhesive 50 is, for example, an acrylic resin, an epoxy resin, etc. Examples of the acrylic resin include a modified methacrylate resin, a modified acrylate resin, an epoxy methacrylate resin, a fluorinated acrylate resin, etc. An example of the epoxy resin is a fluorinated epoxy resin, etc.

[0116] The thickness of the optical adhesive 50 is, for example, 0.001 μm or more, 0.1 μm or more, 0.3 μm or more, or 0.5 μm or more. The thickness of the optical adhesive 50 is, for example, 100 μm or less, 30 μm or less, 10 μm or less, 3.0 μm or less, 2.0 μm or less, or 1.5 μm or less. If the thickness of the optical adhesive 50 is greater than 100 μm, the accuracy of the thickness of the optical adhesive 50 may decrease. This is because the greater the thickness of the optical adhesive 50, the more likely the optical adhesive 50 is to contain insufficiently cured portions. By setting the thickness of the optical adhesive 50 to 100 μm or less, the accuracy of the thickness of the optical adhesive 50 can be improved. The thickness of the optical adhesive 50 corresponds to the distance in the third direction D3 between the central insulating layer 42 and the optical waveguide 72.

[0117] Before the optical IC 70 and the like are mounted on the optical adhesive 50, the thickness of the optical adhesive 50 is measured by using ellipsometry after the optical adhesive 50 is applied. This measurement is a non-destructive test. After the optical IC 70 and the like are mounted on the optical adhesive 50, the thickness of the optical adhesive 50 is calculated by length measurement using a cross-sectional SEM. This measurement is a destructive test.

[0118] The optical adhesive 50 may be formed by wet coating a liquid containing the material of the optical adhesive 50 and a solvent onto the second portion 44. Examples of wet coating include imprinting, nanoimprinting, bar coating, die coating, spin coating, dip coating, inkjet coating, and nozzle coating. The shape of the optical adhesive 50 may be realized by a photolithography method.

[0119] 4A and 4B, the second portion 44 of the central insulating layer 42 may include a support portion 442. The support portion 442 is a portion of the second portion 44 that does not overlap with the optical waveguide 72 of the optical IC 70 in the third direction D3 but supports the optical IC 70. "The support portion 442 supports the optical IC 70" means that the upper surface of the support portion 442 is in direct or indirect contact with the lower surface of the optical IC 70. "Directly" means that the upper surface of the support portion 442 is in contact with the lower surface of the optical IC 70. "Indirectly" means that a layer disposed on the upper surface of the support portion 442 is in contact with the lower surface of the optical IC 70.

[0120] The support portion 442 may be independent from the first portion 43. That is, the support portion 442 may not be connected to the portion of the central insulating layer 42 that overlaps the upper insulating layer 45 in the third direction D3.

[0121] 4B, the support portion 442 has a length L2 in a direction parallel to the optical waveguide 72. The length L2 is, for example, 1.0 mm or more, may be 2.0 mm or more, or may be 3.0 mm or more. The length L2 is, for example, 10.0 mm or less, may be 7.0 mm or less, or may be 5.0 mm or less.

[0122] 4A , the opto-electric hybrid substrate 10 may include an optical adhesive 50 located between the support portion 442 and the optical IC 70 in the third direction D3. The optical adhesive 50 contacts the upper surface of the support portion 442 and the lower surface of the optical IC 70. The support portion 442 and the optical adhesive 50 can form a stopper 54 that determines the position of the lower surface of the optical IC 70.

[0123] Like the above-described coupler 53, the stopper 54 includes a central insulating layer 42 and an optical adhesive 50. The dimension of the stopper 54 in the third direction D3 is the same as the dimension of the coupler 53 in the third direction D3. The stopper 54 contacts the bottom surface of the optical IC 70 at the same position as the coupler 53 in the third direction D3. By disposing the stopper 54 between the first surface 13 and the optical IC 70, the parallelism of the bottom surface of the optical IC 70 with respect to the first surface 13 is improved.

[0124] 2, the opto-electrical hybrid substrate 10 may include a plurality of stoppers 54 distributed in the planar direction of the first surface 13. The plurality of stoppers 54 may be aligned along two directions along the planar direction of the first surface 13. For example, the plurality of stoppers 54 may be aligned along a first direction D1 and a second direction D2 as shown in FIG.

[0125] Preferably, the support portion 442 is arranged so as not to overlap a conductive layer of the redistribution layer 30 in the third direction D3. For example, the support portion 442 is preferably arranged so as not to overlap a conductive layer for transmitting a potential or an electrical signal between two electrical elements, such as the first conductive layer 31, in the third direction D3. Since the support portion 442 does not overlap a conductive layer, the flatness of the upper and lower surfaces of the support portion 442 is improved. Therefore, the parallelism of the lower surface of the optical IC 70 with respect to the first surface 13 is further improved.

[0126] Although not shown, the support portion 442 may overlap a thin conductive layer of the redistribution layer 30 in the third direction D3. The thin conductive layer is, for example, the above-mentioned dummy conductive layer. Because the thickness of the dummy conductive layer is small, the flatness of the upper and lower surfaces of the support portion 442 overlapping the dummy conductive layer in the third direction D3 is maintained.

[0127] The support portion 442 may be arranged so as not to overlap the through hole 15 and the through electrode 20 in the third direction D3. When the support portion 442 does not overlap the through hole 15 and the through electrode 20, the flatness of the upper and lower surfaces of the support portion 442 is improved.

[0128] The distance Ds (see FIG. 1) in a plan view between the central insulating layer 42, such as the first portion 43, the optical connecting portion 441, and the supporting portion 442, and the conductive layer of the redistribution layer 30 is, for example, 1.0 mm or more, or may be 2.0 mm or more, or may be 3.0 mm or more. When the distance Ds is a predetermined value or more, undulations caused by the conductive layer are suppressed from occurring in the central insulating layer 42.

[0129] The upper and lower surfaces of the lower insulating layer 41, the central insulating layer 42, and the upper insulating layer 45 are preferably smooth. As will be described later, when the lower insulating layer 41, the central insulating layer 42, and the upper insulating layer 45 are formed by wet coating, the smoothness of the first surface 13 is also reflected in the upper and lower surfaces of the lower insulating layer 41, the central insulating layer 42, and the upper insulating layer 45. The arithmetic mean roughness Ra of the upper and lower surfaces of the lower insulating layer 41, the central insulating layer 42, and the upper insulating layer 45 is, for example, 1000 nm or less, or may be 500 nm or less, 200 nm or less, 100 nm or less, 50 nm or less, 20 nm or less, 10 nm or less, 7 nm or less, 5 nm or less, or 3 nm or less.

[0130] The surface insulating layer 47 will now be described. The surface insulating layer 47 is made of an insulating material. The material of the surface insulating layer 47 may be the optical transmission material described above. Alternatively, the material of the surface insulating layer 47 may be an organic material such as polyimide, epoxy resin, acrylic resin, polyphenyl ether, etc. Preferably, the surface insulating layer 47 is made of an optical transmission material, similar to the lower insulating layer 41, the central insulating layer 42, and the upper insulating layer 45.

[0131] The thickness of the surface insulating layer 47 is, for example, 10.0 μm or more, optionally 15.0 μm or more, or 20.0 μm or more. The thickness of the surface insulating layer 47 is, for example, 50.0 μm or less, optionally 40.0 μm or less, or optionally 30.0 μm or less.

[0132] 6A is a cross-sectional view showing the optical connector 80 taken along line VI-VI in FIG. 2. The optical connector 80 may include at least one pin 81. The optical connector 80 may include two or more pins 81. The pin 81 is a member for determining the position of the optical connector 80 relative to the substrate 12.

[0133] 6A, the opto-electric hybrid substrate 10 may include guide layers 48 that guide the pins 81. For example, the opto-electric hybrid substrate 10 may include guide layers 48 that sandwich the pins 81 in the planar direction of the first surface 13. In the example shown in FIG. 6A, each pin 81 is sandwiched between two guide layers 48 in the second direction D2. The guide layers 48 can determine the position of the pins 81 in the second direction D2.

[0134] The guide layer 48 may include a lower insulating layer 41, a central insulating layer 42, or an upper insulating layer 45. In the example shown in FIG. 6A , the guide layer 48 includes a lower insulating layer 41, a central insulating layer 42, and an upper insulating layer 45. As described above, the lower insulating layer 41, the central insulating layer 42, and the upper insulating layer 45 constitute the optical waveguide 46. The lower insulating layer 41 of the optical waveguide 46 and the lower insulating layer 41 of the guide layer 48 are processed in the same process. The same is true for the central insulating layer 42 and the upper insulating layer 45. That is, the central insulating layer 42 of the optical waveguide 46 and the central insulating layer 42 of the guide layer 48 are processed in the same process. Furthermore, the upper insulating layer 45 of the optical waveguide 46 and the upper insulating layer 45 of the guide layer 48 are processed in the same process. By using the lower insulating layer 41, the central insulating layer 42, or the upper insulating layer 45 to form the guide layer 48, the accuracy of the relative position of the pins 81 with respect to the optical waveguides 46 is improved. Therefore, the accuracy of the relative position of the optical fibers 86 of the optical fiber ribbon 85 with respect to the optical waveguides 46 is improved.

[0135] The guide layer 48 has a thickness T6. The thickness T6 is determined so that the guide layer 48 can control the movement of the pin 81. The thickness T6 is, for example, 50 μm or more, or may be 70 μm or more, or may be 100 μm or more. The thickness T6 is, for example, 300 μm or less, or may be 200 μm or less, or may be 150 μm or less.

[0136] FIG. 6B is a cross-sectional view showing an example of the optical-electrical hybrid board 10 before the optical connector 80 is mounted. A groove 481 is formed in the guide layer 48, and the pin 81 is disposed in the groove 481. The groove 481 has a width W2. The width W2 is the dimension of the groove 481 in a direction perpendicular to the direction in which the pin 81 extends. The width W2 is, for example, 100 μm or more, may be 200 μm or more, or may be 500 μm or more. The width W2 is, for example, 10.0 mm or less, may be 5.0 mm or less, may be 2.0 mm or less, or may be 1.0 mm or less.

[0137] (Manufacturing method of optical-electrical hybrid board) A method for manufacturing the opto-electric hybrid board 10 will now be described.

[0138] A substrate 12 containing glass is prepared. The first surface 13 of the substrate 12 preferably has a small arithmetic mean roughness Ra.

[0139] Next, as shown in FIG. 7, a step of forming through holes 15 in substrate 12 is performed. For example, a resist layer is provided on at least one of first surface 13 or second surface 14. Next, openings are provided in the resist layer at positions corresponding to the through holes 15. Next, substrate 12 is processed through the openings in the resist layer. As a result, through holes 15 are formed in substrate 12, penetrating from first surface 13 to second surface 14. The processing method may be a dry etching method such as reactive ion etching or deep reactive ion etching, or may be a wet etching method. Through holes 15 may be formed in substrate 12 by irradiating substrate 12 with a laser.

[0140] Next, as shown in FIG. 8 , a through electrode process is performed to form through electrodes 20 in the through holes 15. The through electrode process may include a seed layer formation process and a plating layer formation process. In the seed layer formation process, a seed layer is formed on the first surface 13, the second surface 14, and the wall surfaces 16 of the through holes 15 by a sputtering method or the like. In the plating layer formation process, a plating layer is formed on the seed layer by electrolytic plating. In the plating layer formation process, portions of the seed layer that do not correspond to the through electrodes 20 may be covered with a resist layer or the like. The portions of the seed layer that are covered with the resist layer or the like may be removed after the plating layer formation process.

[0141] 9, a filling step may be performed to form a filling portion 25 in the through hole 15. For example, a film including a resin layer that constitutes the filling portion 25 may be attached to at least one of the first surface 13 and the second surface 14. The resin layer of the film is filled into the through hole 15, thereby forming the filling portion 25.

[0142] Subsequently, a redistribution layer forming step is performed to form a redistribution layer 30 on the first surface 13 of the substrate 12. The redistribution layer forming step may include a surface insulating layer forming step to form a surface insulating layer 47 on the first surface 13, as shown in FIG.

[0143] Surface insulating layer 47 may be made of the same resin as that of filling portion 25. In this case, surface insulating layer 47 may be formed simultaneously with filling portion 25 by a layer of the resin of the film used in the above-mentioned filling step.

[0144] The surface insulating layer 47 may be made of a material different from the resin of the filling portion 25. For example, the surface insulating layer forming step may include a surface wet coating step of applying a liquid containing a material that forms the surface insulating layer 47 onto the first surface 13.

[0145] 11, a step of forming an opening 471 in the surface insulating layer 47 may be performed. If the surface insulating layer 47 is photosensitive, the opening 471 may be formed by exposing and developing the surface insulating layer 47.

[0146] 12 , a step of forming a first conductive layer 31 on the surface insulating layer 47 may be performed. The first conductive layer 31 may be formed in an opening 471 in the surface insulating layer 47. The first conductive layer 31 in the opening 471 may be connected to the through electrode 20.

[0147] 13, a step of forming lower insulating layer 41 is carried out. For example, a first wet coating step may be carried out in which a liquid containing a material that will form lower insulating layer 41 is applied. In this case, the smoothness of first surface 13 of substrate 12 is reflected on the upper and lower surfaces of lower insulating layer 41. As a result, lower insulating layer 41 including upper and lower surfaces with a small arithmetic mean roughness Ra is obtained.

[0148] 14, a first processing step may be performed to process the lower insulating layer 41. If the lower insulating layer 41 is photosensitive, the lower insulating layer 41 may be processed by exposing and developing the lower insulating layer 41. As shown in FIG. 14, the first processing step may be performed so that the lower insulating layer 41 overlapping a conductive layer such as the first conductive layer 31 in the third direction D3 is removed.

[0149] 15, a step of forming a central insulating layer 42 on the lower insulating layer 41 is performed. For example, a second wet coating step of applying a liquid containing a material that forms the central insulating layer 42 may be performed. Then, a second processing step of processing the central insulating layer 42 may be performed. If the central insulating layer 42 is photosensitive, the central insulating layer 42 may be processed by exposing and developing the central insulating layer 42.

[0150] 16, a step of forming an upper insulating layer 45 on the central insulating layer 42 is performed. For example, a third wet coating step of applying a liquid containing a material that forms the upper insulating layer 45 may be performed. Then, a third processing step of processing the upper insulating layer 45 may be performed. If the upper insulating layer 45 is photosensitive, the upper insulating layer 45 may be processed by exposing and developing the upper insulating layer 45.

[0151] In this manner, the opto-electric hybrid substrate 10 including the substrate 12, the through electrodes 20, and the rewiring layer 30 is manufactured.

[0152] Subsequently, a step of mounting the electrical IC 60 and the optical IC 70 on the rewiring layer 30 may be performed. For example, as shown in FIG. 17 , bumps 55 may be provided on portions of the first conductive layer 31 that function as pads. For example, an optical adhesive 50 may be provided on portions of the central insulating layer 42 that function as couplers 53 and stoppers 54. In the step of mounting the optical IC 70, the position of the optical IC 70 in the third direction D3 is determined by the couplers 53 and stoppers 54.

[0153] 1 is obtained by mounting the electrical IC 60 and the optical IC 70 on the redistribution layer 30. As described above, the central insulating layer 42 and a portion of the optical adhesive 50 may function as a stopper 54 for determining the position of the optical IC 70 in the third direction D3.

[0154] The optoelectronic hybrid substrate 10 of this embodiment includes a substrate 12 containing glass and a redistribution layer 30 located on the substrate 12. The redistribution layer 30 includes a lower insulating layer 41, a central insulating layer 42, and an upper insulating layer 45 that constitute an optical waveguide 46. According to this embodiment, since the substrate 12 contains glass, warping of the substrate 12 is suppressed. Furthermore, the flatness of the first surface 13 of the substrate 12 is improved. The flatness of each insulating layer that constitutes the optical waveguide 46 is also improved, thereby reducing optical transmission loss.

[0155] The optical signal propagating through the optical waveguide 46 is transmitted to the optical IC 70 by the coupler 53 including the central insulating layer 42 and the optical adhesive 50. Compared to when the optical signal is transmitted to the optical IC 70 using a mirror, the cost of the opto-electrical hybrid board 10 is reduced.

[0156] The above-described embodiment can be modified in various ways. Modifications will be described below with reference to the drawings as necessary. In the following description and the drawings used in the following description, parts that can be configured similarly to the above-described embodiment will be designated by the same reference numerals as those used for corresponding parts in the above-described embodiment. Duplicate descriptions will be omitted. Furthermore, if it is clear that the effects obtained in the above-described embodiment can also be obtained in the modified examples, the description of those effects may be omitted.

[0157] (First Modification) In the above-described embodiment, an example has been shown in which the through holes 15 are formed in the substrate 12, and the through electrodes 20 are formed in the through holes 15. As shown in FIG. 18A , the opto-electric hybrid substrate 10 does not necessarily have to include the through holes 15 and the through electrodes 20.

[0158] The substrate 12 may be a BGA substrate. For example, as shown in Fig. 18B, the opto-electric hybrid substrate 10 may include a plurality of pads 92 located on the second surface 14 of the substrate 12 and a plurality of bumps 93 in contact with the plurality of pads 92, respectively.

[0159] Substrate 12 that does not include through holes 15 and through electrodes 20 may be a multilayer wiring substrate. For example, as shown in FIG. 18B , substrate 12 may include multilayer wiring 17 located between first surface 13 and second surface 14.

[0160] (Second Modification) In the above-described embodiment, an example was shown in which the extension direction of the central insulating layer 42 constituting the core layer of the optical waveguide extends parallel to the planar direction of the first surface 13 of the substrate 12. In this modified example, an example will be described in which the extension direction of the central insulating layer 42 changes. For example, an example will be shown in which the central insulating layer 42 extends at least partially in a direction intersecting the planar direction of the first surface 13.

[0161] 19 is a cross-sectional view showing an opto-electrical hybrid substrate 10 according to a second modified example. In this modified example, the direction in which a portion of the central insulating layer 42 extends includes a component of the third direction D3. The third direction D3 is a direction perpendicular to the surface direction of the first surface 13.

[0162] The central insulating layer 42 may include a first straight portion 424, a second straight portion 425, and an intermediate portion 426. The first straight portion 424 is, for example, a portion of the central insulating layer 42 that extends parallel to the optical waveguide 72 of the optical IC 70. The second straight portion 425 is, for example, a portion of the central insulating layer 42 that extends parallel to the optical fiber 86 of the optical connector 80. The intermediate portion 426 is a portion of the central insulating layer 42 located between the first straight portion 424 and the second straight portion 425. The intermediate portion 426 extends in a direction different from the direction in which the first straight portion 424 extends. Furthermore, the intermediate portion 426 extends in a direction different from the direction in which the second straight portion 425 extends.

[0163] 20 is a cross-sectional view showing an example of the intermediate portion 426. The intermediate portion 426 may include a first corner 4261, a second corner 4262, and a straight portion 4263. The first corner 4261 is connected to the first straight portion 424. The second corner 4262 is connected to the second straight portion 425. The straight portion 4263 is located between the first corner 4261 and the second corner 4262. The straight portion 4263 extends linearly in a direction different from the direction in which the first straight portion 424 extends. Furthermore, the straight portion 4263 extends linearly in a direction different from the direction in which the second straight portion 425 extends. At the first corner 4261 and the second corner 4262, the central insulating layer 42 may be bent.

[0164] The first angle θ1 represents the angle formed between the straight line portion 4263 and the first straight line portion 424. The second angle θ2 represents the angle formed between the straight line portion 4263 and the second straight line portion 425. The first angle θ1 and the second angle θ2 may be the same. For example, the absolute value of the difference between the first angle θ1 and the second angle θ2 may be 5° or less. The absolute value of the difference between the first angle θ1 and the second angle θ2 may be 3° or less, 2° or less, or 1° or less.

[0165] The first angle θ1 and the second angle θ2 are, for example, 35° or more, or may be 40° or more, or 43° or more. The first angle θ1 and the second angle θ2 are, for example, 55° or less, or may be 50° or less, or may be 47° or less. The first angle θ1 and the second angle θ2 may be 45°.

[0166] The symbol Dt represents the distance between the first straight portion 424 and the second straight portion 425 in a direction perpendicular to the direction in which the first straight portion 424 extends. In the example shown in Fig. 20, the distance Dt is the distance between the first straight portion 424 and the second straight portion 425 in the third direction D3. The distance Dt is, for example, 100 µm or more, or may be 200 µm or more, or may be 300 µm or more. The distance Dt is, for example, 1000 µm or less, or may be 700 µm or less, or may be 500 µm or less.

[0167] 21 is a cross-sectional view showing another example of the intermediate portion 426. The first corner 4261 and the second corner 4262 may be curved. The first corner 4261 may have a first radius of curvature R1. The second corner 4262 may have a second radius of curvature R2. The first radius of curvature R1 and the second radius of curvature R2 are, for example, 5 μm or more, 10 μm or more, 20 μm or more, or 50 μm or more. The first radius of curvature R1 and the second radius of curvature R2 are, for example, 200 μm or less, 150 μm or less, or 100 μm or less.

[0168] 21, the first corner 4261 is curved, which allows the angle formed between the first linear portion 424 and the linear portion 4263 to be larger. For example, the angle formed between the first linear portion 424 and the linear portion 4263 may be 90°. In the example shown in FIG. 21, the linear portion 4263 extends parallel to the third direction D3.

[0169] (Third Modification) 22 is a plan view showing the central insulating layer 42 according to the third modified example. The central insulating layer 42 may include a first core 42A and a second core 42B. The first core 42A includes a first straight portion 424, a second straight portion 425, and an intermediate portion 426, as in the second modified example. The second core 42B also includes a first straight portion 424, a second straight portion 425, and an intermediate portion 426, as in the second modified example. One first core 42A and one second core 42B may form an input / output pair 42S. For example, the first core 42A may propagate light traveling from the optical IC 70 to the optical connector 80, and the second core 42B may propagate light traveling from the optical connector 80 to the optical IC 70. The central insulating layer 42 may include multiple input / output pairs 42S.

[0170] 23 is a cross-sectional view showing the central insulating layer 42 cut along line XXIII in FIG. 22. The direction in which the intermediate portion 426 of the first core 42A extends may be different from the direction in which the intermediate portion 426 of the second core 42B extends. For example, the direction in which the intermediate portion 426 of the first core 42A extends may not include a component of the third direction D3, but the direction in which the intermediate portion 426 of the second core 42B extends may include a component of the third direction D3. For example, the first straight portion 424, the second straight portion 425, and the intermediate portion 426 of the first core 42A and the first straight portion 424 of the second core 42B may be located on the same plane. For example, the intermediate portion 426 of the second core 42B may be located on a plane farther from the first surface 13 than the plane on which the first straight portion 424, the second straight portion 425 and the intermediate portion 426 of the first core 42A and the first straight portion 424 of the second core 42B are located.

[0171] The configurations of the lower insulating layer 41 and the upper insulating layer 45 in contact with the first core 42A and the configurations of the lower insulating layer 41 and the upper insulating layer 45 in contact with the second core 42B are not particularly limited. For example, the upper insulating layer 45 in contact with the middle portion 426 of the first core 42A may constitute the lower insulating layer 41 in contact with the second straight portion 425 of the second core 42B.

[0172] Fig. 24 is a cross-sectional view showing the central insulating layer 42 cut along line XXIV in Fig. 22. Fig. 25 is a cross-sectional view showing the central insulating layer 42 cut along line XXV in Fig. 22. As shown in Fig. 24, the first straight portion 424 of the first core 42A and the first straight portion 424 of the second core 42B may be aligned in the second direction D2. As shown in Fig. 25, the second straight portion 425 of the first core 42A and the second straight portion 425 of the second core 42B may be aligned in the third direction D3.

[0173] (Fourth Modification) FIG. 26A is a cross-sectional view showing an opto-electrical hybrid substrate 10 according to a fourth modification. The opto-electrical hybrid substrate 10 may include a BGA substrate 90. The BGA substrate 90 may include a substrate 91 including a BGA first surface 911 and a BGA second surface 912. The BGA first surface 911 faces the second surface 14 of the opto-electrical hybrid substrate 10 in the third direction D3. The BGA second surface 912 is located on the opposite side of the BGA first surface 911 in the third direction D3. The BGA substrate 90 may include a plurality of pads 92, a plurality of through electrodes 95, a plurality of bumps 93, and the like, which are electrically connected to the through electrodes 20. Each of the plurality of through electrodes 95 penetrates the substrate 91 from the BGA first surface 911 to the BGA second surface 912. Each of the plurality of pads 92 is located on the BGA second surface 912 of the substrate 91. Each of the plurality of bumps 93 is in contact with a pad 92.

[0174] 26A, the surface insulating layer 47 may include a plurality of insulating layers stacked in the third direction D3. A first conductive layer 31 may be provided on each insulating layer.

[0175] 26B, the substrate 91 of the BGA substrate 90 may be a multilayer wiring substrate. For example, as shown in FIG. 26B, the substrate 91 may include multilayer wiring 94 located between a BGA first surface 911 and a BGA second surface 912.

[0176] When the opto-electrical hybrid substrate 10 includes a BGA substrate 90, the configuration of the substrate 12 is not particularly limited. For example, as shown in Fig. 26C, the substrate 12 may be a multilayer wiring substrate including multilayer wiring 17. The substrate 12 may also be a through electrode substrate including through electrodes.

[0177] As shown in FIG. 26D, the substrate 12 may constitute a BGA substrate 90.

[0178] 27 is a diagram showing an example of a product on which the opto-electrical hybrid board 10 is mounted. The opto-electrical hybrid board 10 can be used in a variety of products. For example, it is mounted in a notebook personal computer 110, a tablet terminal 120, a mobile phone 130, a smartphone 140, a digital video camera 150, a digital camera 160, a digital clock 170, a server 180, etc. Products on which the opto-electrical hybrid board 10 is mounted may be used in generating AI, data centers, etc.

[0179] Example 1 The optoelectronic hybrid substrate 10 of the above-described embodiment was fabricated. FIG. 32 is a cross-sectional view showing an optical waveguide 46 of the optoelectronic hybrid substrate 10 of Example 1. The optical waveguide 46 includes a lower insulating layer 41, a central insulating layer 42, and an upper insulating layer 45. The cross section of the central insulating layer 42 has a trapezoidal shape. The thickness T2 of the central insulating layer 42 was 9 μm. The length W11 of the lower base of the central insulating layer 42 was 15 μm. The length W12 of the upper base of the central insulating layer 42 was 7 μm. The refractive index of the lower insulating layer 41 and the upper insulating layer 45 was 1.541 for light with a wavelength of 1.31 μm. The refractive index of the central insulating layer 42 was 1.557 for light with a wavelength of 1.31 μm. In this case, the ratio (n2-n1) / n2 of the difference between the refractive index n2 of the central insulating layer 42 and the refractive index n1 of the lower insulating layer 41 to the refractive index n2 of the central insulating layer 42 is 1.028%.

[0180] The waveguide loss of the optical waveguide 46 was evaluated. FIG. 33 is a diagram showing a method for evaluating the optical waveguide 46 of Example 1. Light having a wavelength of 1.31 μm emitted from the light source 101 is introduced into a first end of the central insulating layer 42 of the optical waveguide 46 of the opto-electric hybrid substrate 10 via a first fiber 102. The first fiber 102 is a single-mode fiber including a tip that is cut perpendicular to its longitudinal direction. A polarization controller was used to adjust the tip of the first fiber 102 so that light in TE mode was emitted from the tip.

[0181] After propagating through the central insulating layer 42, the light emitted from the second end of the central insulating layer 42 of the optical waveguide 46 is introduced into the power meter 104 via the second fiber 103. The second fiber 103 is a single-mode fiber that includes a tip that is cut perpendicular to its longitudinal direction.

[0182] Based on the measurement of the optical power using the power meter 104, the optical waveguide loss caused by the central insulating layer 42 of the optical waveguide 46 is calculated. FIG. 34 is a graph showing the evaluation results of the optical waveguide 46 of Example 1. The vertical axis of the graph in FIG. 34 represents the optical waveguide loss. The horizontal axis of the graph in FIG. 34 represents the length of the central insulating layer 42 of the optical waveguide 46.

[0183] Five samples of the optical waveguide 46 were prepared for each length of the central insulating layer 42 of one type of optical waveguide 46, and the optical waveguide loss was evaluated. The average value of the optical waveguide loss calculated from the five samples is the value of the optical waveguide loss shown in the graph of FIG.

[0184] It can be seen that the optical waveguide loss increases according to the length of the central insulating layer 42 of the optical waveguide 46. By approximating the relationship between the length of the central insulating layer 42 and the optical waveguide loss with a straight line, the relational expression "y = 0.2x + 3.9" was obtained. x is the horizontal axis and y is the vertical axis. From this relational expression, it can be seen that the transmission loss of the central insulating layer 42 is 0.2 dB / cm.

[0185] Example 2 An optical simulation was performed on the optical waveguide 46 when the cross section of the central insulating layer 42 was square. The length of one side of the square was 8 μm. The optical simulation was performed based on the finite difference time domain method. The wavelength of the light was set to 1.3 μm. The results of the optical simulation are shown in FIG. 35.

[0186] Example 3 Except that the cross-sectional shape of the optical waveguide 46 was a square with a side length of 10 μm, an optical simulation was carried out on the optical waveguide 46 in the same manner as in Example 2. The results of the optical simulation are shown in FIG.

[0187] Example 4 Except that the cross-sectional shape of the optical waveguide 46 was a square with a side length of 12 μm, an optical simulation was carried out on the optical waveguide 46 in the same manner as in Example 2. The results of the optical simulation are shown in FIG. [Explanation of symbols]

[0188] 10 Optical / electrical hybrid board 12 PCB 13 Page 1 14 Side 2 15 through holes 16 Wall 17 Multilayer wiring 20 Through electrode 22 Main body 23 1st layer 24 2nd layer 25 Filling section 30 Redistribution layer 31 First conductive layer 32 Connection wiring 33 First Pad 34 Second Pad 41 Lower insulating layer 42 Central insulating layer 42A 1st Core 42B Second Core 42S Input / Output Pair 424 1st straight section 425 2nd straight section 426 Middle Section 4261 First corner 4262 2nd corner 4263 Straight section 43 Part 1 44 Part 2 441 Optical connection part 442 Support part 45 Upper insulating layer 46 Optical waveguide 47 Surface insulating layer 471 Aperture 48 Guide Layer 481 Groove 50 Optical Adhesives 53 Coupler 54 Stopper 55 Bump 60 Electrical IC 61 terminals 70 Optical IC 71 terminals 72 Optical waveguide 73 Photoelectric conversion unit 80 Optical Connector 81 pins 85 Optical Fiber Ribbon 86 Optical Fiber 90 BGA board 91 Circuit Board 911 BGA 1st page 912 BGA 2nd side 92 pads 93 Bump 94 Multilayer wiring 95 Through electrode 101 Light source 102 First Fiber 103 Second Fiber 104 Power Meter

Claims

1. An optical / electrical hybrid board, a substrate including a first surface and a second surface opposite the first surface; a redistribution layer located on the first surface of the substrate, the redistribution layer including at least one conductive layer and at least one insulating layer; the substrate comprises glass, an organic material, or a ceramic; the at least one insulating layer includes a lower insulating layer, a central insulating layer located on the lower insulating layer in a thickness direction of the optical-electrical hybrid substrate, and an upper insulating layer covering the central insulating layer; the refractive index of the central insulating layer is higher than the refractive index of the lower insulating layer and the refractive index of the upper insulating layer; the central insulating layer includes a first portion overlapping the upper insulating layer in the thickness direction and a second portion not overlapping the upper insulating layer in the thickness direction; the second portion includes an optical connection portion continuous with the first portion and a support portion independent from the first portion; the support portion overlaps the lower insulating layer in the thickness direction and is not connected to the first portion; the optical-electrical hybrid board includes a first optical adhesive located on the optical connection portion in the thickness direction, and a second optical adhesive located on the support portion in the thickness direction; The optical-electrical hybrid board, wherein the second optical adhesive is not connected to the first optical adhesive.

2. the substrate includes a plurality of through holes extending from the first surface to the second surface; The optical-electrical hybrid board according to claim 1 , further comprising a plurality of through electrodes located in the through holes.

3. The optical-electrical hybrid board according to claim 1 , comprising: a plurality of pads located on the second surface of the board; and a plurality of bumps in contact with the plurality of pads, respectively.

4. An optical / electrical hybrid board, a substrate including a first surface and a second surface opposite the first surface; a redistribution layer located on the first surface of the substrate, the redistribution layer including at least one conductive layer and at least one insulating layer; the substrate comprises glass, an organic material, or a ceramic; the at least one insulating layer includes a lower insulating layer, a central insulating layer located on the lower insulating layer in a thickness direction of the optical-electrical hybrid substrate, and an upper insulating layer covering the central insulating layer; the refractive index of the central insulating layer is higher than the refractive index of the lower insulating layer and the refractive index of the upper insulating layer; the central insulating layer includes a first portion overlapping the upper insulating layer in the thickness direction and a second portion not overlapping the upper insulating layer in the thickness direction; the second portion includes an optical connection portion continuous with the first portion and a support portion independent from the first portion; The support portion overlaps the lower insulating layer in the thickness direction and is not connected to the first portion.

5. The optical connection portion of the second portion overlaps, in the thickness direction, an optical waveguide of an optical IC mounted on the opto-electrical hybrid board, The optical-electrical hybrid board according to claim 4 , wherein the supporting portion of the second portion does not overlap the optical waveguide of the optical IC in the thickness direction.

6. 6. The optical-electrical hybrid board according to claim 1, wherein the first portion is disposed so as not to overlap the conductive layer in the thickness direction.

7. the optical connection portion has a length of 1.0 mm or more and 10.0 mm or less in a planar direction of the first surface, The optical-electrical hybrid board according to claim 6 , wherein the optical connection portion is disposed so as not to overlap the conductive layer in the thickness direction.

8. 4. The optical-electrical hybrid board according to claim 1, wherein the optical adhesive contains an acrylic resin or an epoxy resin.

9. 4. The optical-electrical hybrid board according to claim 1, wherein the first optical adhesive has a thickness of 0.001 μm or more and 100 μm or less.

10. 6. The optical-electrical hybrid board according to claim 1, wherein the supporting portion is disposed so as not to overlap the conductive layer in the thickness direction.

11. 4. The optical-electrical hybrid board according to claim 1, wherein the second optical adhesive has a thickness of 0.001 μm or more and 100 μm or less.

12. 6. The optical-electrical hybrid board according to claim 1, wherein the lower insulating layer, the central insulating layer, and the upper insulating layer contain polysiloxane.

13. 6. The optical-electrical hybrid board according to claim 1, wherein the lower insulating layer, the central insulating layer, and the upper insulating layer contain an epoxy resin.

14. The optical-electrical hybrid board according to claim 10 , wherein the lower insulating layer, the central insulating layer, and the upper insulating layer contain a plurality of particles made of an inorganic material.

15. 6. The optical-electrical hybrid board according to claim 1, wherein the first surface of the substrate has an arithmetic mean roughness of 0.3 nm or more and 1000 nm or less.

16. The optical-electrical hybrid substrate according to any one of claims 1 to 5, wherein the at least one conductive layer includes a plurality of first conductive layers that do not overlap the lower insulating layer, the central insulating layer, and the upper insulating layer in the thickness direction.

17. the redistribution layer includes a surface insulating layer located on the first surface of the substrate; The optical-electrical hybrid board according to claim 16 , wherein the first conductive layer is located on the surface insulating layer in the thickness direction.

18. The optical-electrical hybrid board according to claim 2 , wherein the central insulating layer is disposed so as not to overlap the through holes and the through electrodes in a thickness direction of the optical-electrical hybrid board.

19. the optical-electrical hybrid substrate includes a guide layer having a groove formed therein, the groove having a width of 100 μm or more and 10.0 mm or less; 6. The optical-electrical hybrid board according to claim 1, wherein the guide layer includes the lower insulating layer, the central insulating layer, or the upper insulating layer.

20. The optical-electrical hybrid board according to claim 19 , comprising an optical connector including a pin disposed in the groove.

21. 4. The optical-electrical hybrid board according to claim 1, further comprising an optical IC including an optical waveguide in contact with the optical adhesive.

22. The optical connection portion of the second portion overlaps the optical waveguide of the optical IC in the thickness direction, The optical-electrical hybrid board according to claim 21 , wherein the supporting portion of the second portion does not overlap the optical waveguide of the optical IC in the thickness direction.

23. The optical-electrical hybrid board according to claim 21 , comprising an electrical IC including terminals electrically connected to the conductive layer.

24. 6. The optical-electrical hybrid board according to claim 1, comprising a BGA substrate including: a substrate including a BGA first surface facing the second surface and a BGA second surface located on the opposite side of the BGA first surface; a plurality of pads located on the BGA second surface; and a plurality of bumps contacting each of the plurality of pads.

25. A method for manufacturing an optical / electrical hybrid board, providing a substrate including a first surface and a second surface opposite the first surface; a rewiring layer forming step of forming a rewiring layer including at least one conductive layer and at least one insulating layer on the first surface of the substrate, the substrate comprises glass, an organic material, or a ceramic; the at least one insulating layer includes a lower insulating layer, a central insulating layer located on the lower insulating layer in a thickness direction of the optical-electrical hybrid substrate, and an upper insulating layer covering the central insulating layer; the redistribution layer forming step includes a wet coating step for forming the lower insulating layer, the central insulating layer, and the upper insulating layer; the refractive index of the central insulating layer is higher than the refractive index of the lower insulating layer and the refractive index of the upper insulating layer; the central insulating layer includes a first portion overlapping the upper insulating layer in the thickness direction and a second portion not overlapping the upper insulating layer in the thickness direction; the second portion includes an optical connection portion continuous with the first portion and a support portion independent from the first portion; the support portion overlaps the lower insulating layer in the thickness direction and is not connected to the first portion; The manufacturing method includes a step of forming an optical adhesive on the optical connection portion and the support portion by wet coating; The method for manufacturing an optical-electrical hybrid board, wherein the optical adhesive on the support portion is not connected to the optical adhesive on the optical connection portion.

26. A method for manufacturing an optical-electrical hybrid substrate, comprising: providing a substrate including a first surface and a second surface opposite the first surface; a rewiring layer forming step of forming a rewiring layer including at least one conductive layer and at least one insulating layer on the first surface of the substrate, the substrate comprises glass, an organic material, or a ceramic; the at least one insulating layer includes a lower insulating layer, a central insulating layer located on the lower insulating layer in a thickness direction of the optical-electrical hybrid substrate, and an upper insulating layer covering the central insulating layer; the redistribution layer forming step includes a wet coating step for forming the lower insulating layer, the central insulating layer, and the upper insulating layer; the refractive index of the central insulating layer is higher than the refractive index of the lower insulating layer and the refractive index of the upper insulating layer; the central insulating layer includes a first portion overlapping the upper insulating layer in the thickness direction and a second portion not overlapping the upper insulating layer in the thickness direction; the second portion includes an optical connection portion continuous with the first portion and a support portion independent from the first portion; A method for manufacturing an optical-electrical hybrid board, wherein the support portion overlaps the lower insulating layer in the thickness direction and is not connected to the first portion.

27. 27. The method for manufacturing an optical-electrical hybrid board according to claim 25, wherein the lower insulating layer, the central insulating layer, and the upper insulating layer contain polysiloxane or epoxy resin.

28. 27. The method for manufacturing an opto-electrical hybrid substrate according to claim 25, wherein the first surface of the substrate has an arithmetic mean roughness of 0.3 nm or more and 1000 nm or less.

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