Computer, memory control method, and memory control program

Abstract

To provide a calculator that automatically sets a degree of priority for swap spaces of a plurality of auxiliary storage devices when using the plurality of auxiliary storage devices.SOLUTION: A calculator can be connected with a plurality of auxiliary storage devices that can have swap spaces. The calculator includes a processor and a main storage device. The processor searches for the auxiliary storage device connected to the calculator. If the plurality of auxiliary storage devices are found as a result of the search, the processor measures a write speed of each of the auxiliary storage devices. Further, the processor sets a degree of priority to preferentially utilize a swap space of an auxiliary storage device having a higher write speed. The processor activates the swap space in accordance with the degree of priority.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] An embodiment of the present invention relates to a computer, a memory control method, and a memory control program. [Background technology]

[0002] Generally, computers with a CPU and main memory use auxiliary memory to store the OS and programs. When multiple programs are used simultaneously, the capacity of the main memory can become insufficient. One way to deal with this is to allocate swap space in the auxiliary memory and temporarily save the contents of the main memory that are not currently being used to the swap space in the auxiliary memory. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Publication No. 3-40150 Summary of the Invention [Problem to be solved by the invention]

[0004] The problem to be solved by the present invention is to provide a computer, a memory control method, and a memory control program that automatically set the priority of swap areas of multiple auxiliary storage devices when multiple auxiliary storage devices are used. [Means for solving the problem]

[0005] The computer of the embodiment is a computer to which multiple auxiliary storage devices that can have swap areas can be connected. The computer has a processor and a main storage device. The processor searches for auxiliary storage devices connected to the computer. If the search finds multiple auxiliary storage devices, the processor measures the write speed of each auxiliary storage device. The processor then sets priorities so that the auxiliary storage devices with the fastest write speeds are given priority for use as swap areas. The processor activates the swap areas according to the priorities.

[0006] A memory control method according to an embodiment is a memory control method for a computer to which multiple auxiliary storage devices, each capable of having a swap area, can be connected. The memory control method first searches for auxiliary storage devices connected to the computer. If multiple auxiliary storage devices are found as a result of the search, the memory control method measures the write speed of each auxiliary storage device. Next, the memory control method sets priorities so that the swap area is preferentially used in the order of auxiliary storage devices with the fastest write speeds. The memory control method activates the swap area according to the priorities.

[0007] A memory control program according to an embodiment causes a processor of a computer to which multiple auxiliary storage devices, each capable of having a swap area, can be connected to search for auxiliary storage devices connected to the computer. If the search finds multiple auxiliary storage devices, the memory control program causes the processor to measure the write speed of each auxiliary storage device. The memory control program causes the processor to set priorities so that the auxiliary storage device with the fastest write speed is given priority for use of the swap area. The memory control program causes the processor to activate the swap area according to the priorities. [Brief explanation of the drawings]

[0008] [Figure 1] FIG. 2 is a hardware configuration diagram of a computer according to an embodiment. [Figure 2] FIG. 2 is a software configuration diagram of a memory control program of a computer according to an embodiment. [Figure 3]10 is a flowchart illustrating memory control executed by a computer according to an embodiment. [Figure 4] 5A to 5C are diagrams illustrating examples of the contents of various setting files according to an embodiment. [Figure 5] FIG. 10 is a diagram illustrating an example of the contents of a swap integration criteria table according to the embodiment. [Figure 6] FIG. 10 is a diagram illustrating an example of the contents of a benchmark result file according to an embodiment. [Figure 7] FIG. 10 is a diagram showing the contents of an example of a swap area in an / etc / fstab file according to an embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0009] [composition] (Hardware configuration) First, the hardware configuration of a computer 100 according to an embodiment will be described with reference to Fig. 1. Fig. 1 is a diagram showing the hardware configuration of the computer 100 according to an embodiment. The computer 100 is, for example, a computer. The computer may be a personal computer, a server computer, or the like.

[0010] Here, the computer 100 will be described as being connected to a plurality of auxiliary storage devices, or in other words, as including a plurality of auxiliary storage devices.

[0011] 1, the computer 100 includes a CPU 101, a system bus 102, a RAM 103, a SATA hard disk drive (HDD) 104, a SATA hard disk drive (HDD) 105, a USB hard disk drive (HDD) 106, an NVMe solid state drive (HDD) 107, an Ethernet (registered trademark) interface (I / F) 108, a display 109, and a keyboard 110. In addition to these, the computer 100 may include other peripheral devices.

[0012] The CPU 101, RAM 103, SATA hard disk drive 104, SATA hard disk drive 105, USB hard disk drive 106, NVMe solid state drive 107, Ethernet interface 108, display 109, and keyboard 110 are electrically connected to each other via a system bus 102, and exchange data and commands via the system bus 102.

[0013] The CPU 101 is a processor, and is hardware that executes programs and processes data. The CPU 101 sequentially executes a series of instructions (programs) stored in the RAM 103. As a result, the CPU 101, for example, reads data from the RAM 103, processes the data, and writes the processed data to the RAM 103.

[0014] The RAM 103 is a main memory that temporarily stores programs and data, and temporarily stores the programs and data required for the processing currently being executed by the CPU 101.

[0015] The CPU 101 executes a program to control the RAM 103, the SATA hard disk drive 104, the SATA hard disk drive 105, the USB hard disk drive 106, the NVMe solid state drive 107, the Ethernet interface 108, the display 109, and the keyboard 110.

[0016] The display 109 is an output device that outputs data and presents various information to the user.

[0017] The keyboard 110 is an input device that receives commands and data through user operations.

[0018] The Ethernet interface 108 is an interface for connecting to a network or other computers. For example, the computer 100 can be connected to a network or other computers via the Ethernet interface 108.

[0019] The SATA hard disk drives 104 and 105, the USB hard disk drive 106, and the NVMe solid state drive 107 are all auxiliary storage devices that persistently store data. The SATA hard disk drives 104 and 105 are hard disk drives that conform to the SATA connection standard. The USB hard disk drive 106 is a hard disk drive that conforms to the USB connection standard. The NVMe solid state drive 107 is a solid state drive that conforms to the NVMe connection standard. The SATA hard disk drives 104 and 105, the USB hard disk drive 106, and the NVMe solid state drive 107 are all block devices.

[0020] The SATA hard disk drives 104 and 105, the USB hard disk drive 106, and the NVMe solid state drive 107 are all auxiliary storage devices that can have swap areas. That is, the SATA hard disk drives 104 and 105, the USB hard disk drive 106, and the NVMe solid state drive 107 can all provide a virtual memory area that stores part of the data currently stored in the RAM 103 when the RAM 103 runs out of space.

[0021] The computer 100 of this embodiment runs on the Linux (registered trademark) OS. The SATA hard disk drive 104 is the primary drive and stores the Linux OS. When the computer 100 is powered on, the CPU 101 loads the Linux OS from the SATA hard disk drive 104 into the RAM 103 and executes it, thereby operating the computer 100.

[0022] The SATA hard disk drive 104 also stores a memory control program for the computer 100. After the Linux OS starts up, the CPU 101 reads the memory control program from the SATA hard disk drive 104 into the RAM 103 and executes it. The memory control program optimizes the swap areas of the SATA hard disk drives 104 and 105, the USB hard disk drive 106, and the NVMe solid state drive 107.

[0023] (Software configuration) Next, the software configuration of the memory control program stored in the SATA hard disk drive 104 will be described with reference to Fig. 2. Fig. 2 is a diagram showing a schematic diagram of the software configuration of the memory control program stored in the SATA hard disk drive 104.

[0024] The memory control program stored in the SATA hard disk drive 104 includes commands and data files.

[0025] The commands include an fdisk command 201 , a mount command 202 , a df command 203 , a dd command 204 , and a swapon command 205 .

[0026] The data files include various setting files 206 , an / etc / fstab file 207 , a swap integration criteria table 208 , and a benchmark result file 209 .

[0027] [Operation] Next, memory control in the computer 100 will be described with reference to Figures 3 to 7. Figure 3 is a flowchart showing memory control in the computer 100. Memory control is performed by the CPU 101 executing a memory control program stored in the RAM 103.

[0028] Fig. 4 is a diagram showing an example of the contents of the various setting files 206. Fig. 5 is a diagram showing an example of the contents of the swap integration criteria table 208. Fig. 6 is a diagram showing an example of the contents of the benchmark result file 209. Fig. 7 is a diagram showing an example of the contents related to the swap area of ​​the / etc / fstab file 207.

[0029] In step S101, the CPU 101 uses the fdisk command to search for an auxiliary storage device from the system bus 102. In other words, the CPU 101 searches for an auxiliary storage device among the peripheral devices connected to the system bus 102.

[0030] In this embodiment, the search in step S101 specifically finds a SATA hard disk drive 104, a SATA hard disk drive 105, a USB hard disk drive 106, and an NVMe solid state drive 107.

[0031] In step S102, CPU 101 mounts each of the found auxiliary storage devices using the mount command. Next, CPU 101 checks the capacity and free space of each auxiliary storage device using the df command. Next, CPU 101 records the capacity and free space of each auxiliary storage device in benchmark result file 209.

[0032] In this embodiment, specifically, the CPU 101 mounts the SATA hard disk drive 104, the SATA hard disk drive 105, the USB hard disk drive 106, and the NVMe solid state drive 107 found in step S101.

[0033] Next, the CPU 101 checks the capacity and free space of each of the SATA hard disk drive 104, the SATA hard disk drive 105, the USB hard disk drive 106, and the NVMe solid state drive 107, and records the results in the benchmark result file 209.

[0034] 6 shows an example of the contents of the benchmark result file 209. The benchmark result file 209 has fields for swap space, write speed, integrated ID, integrated speed, priority, free space, and maximum size. The values ​​of write speed and integrated speed are expressed in units of MiB / s. The benchmark result file 209 also has a field for capacity, but the field for capacity is not shown in FIG. 6.

[0035] The swap area has items / mnt1 / swapfile, / mnt2 / swapfile, / mnt3 / swapfile, and / mnt4 / swapfile, which represent the swap areas of the SATA hard disk drive 104, the SATA hard disk drive 105, the USB hard disk drive 106, and the NVMe solid state drive 107, respectively.

[0036] / mnt1 / swapfile, / mnt2 / swapfile, / mnt3 / swapfile, and / mnt4 / swapfile are set based on the various setting files 206 in Fig. 2. The various setting files 206 have setting names and setting values. The setting names include a swap size upper limit percentage value, a performance estimation correction value, a swap file name, and a swap file path.

[0037] The swap file path / mnt* represents / mnt1, / mnt2, / mnt3, and / mnt4, which represent the swap file paths of the SATA hard disk drive 104, the SATA hard disk drive 105, the USB hard disk drive 106, and the NVMe solid state drive 107, respectively.

[0038] The CPU 101 records the free space of the SATA hard disk drive 104, the SATA hard disk drive 105, the USB hard disk drive 106, and the NVMe solid state drive 107 in the benchmark result file 209.

[0039] In the example benchmark result file 209 of Figure 6, the free space on the SATA hard disk drive 104 is 125 GB, the free space on the SATA hard disk drive 105 is 100 GB, the free space on the USB hard disk drive 106 is 30 GB, and the free space on the NVMe solid state drive 107 is 120 GB.

[0040] Furthermore, the CPU 101 multiplies the free space by the swap size upper limit percentage value in the various setting files 206 to calculate the maximum size, and records the calculated maximum size in the benchmark result file 209 .

[0041] 6 shows the final results of the memory control process. After step S102, the values ​​of the items for each swap area, except for the free space and maximum size items, namely, the write speed, integrated ID, and priority items, are all null (e.g., 0).

[0042] In the benchmark result file 209 of Figure 6, the maximum sizes of the swap areas ( / mnt1 / swapfile and / mnt2 / swapfile) of the SATA hard disk drive 104 and the SATA hard disk drive 105 are both 90 GB, the maximum size of the swap area ( / mnt3 / swapfile) of the USB hard disk drive 106 is 27 GB, and the maximum size of the swap area ( / mnt4 / swapfile) of the NVMe solid state drive 107 is 108 GB.

[0043] The values ​​for the SATA hard disk drive 105, USB hard disk drive 106, and NVMe solid state drive 107 match the value obtained by multiplying each free space by the swap size upper limit percentage value. In contrast, the value for the SATA hard disk drive 104 differs from the value obtained by multiplying the free space by the swap size upper limit percentage value. This is because, as will be described later, the swap areas of the SATA hard disk drive 104 and the SATA hard disk drive 105 are integrated. As a result of this integration, the maximum size of the larger swap area ( / mnt1 / swapfile) of the SATA hard disk drive 104 is adjusted to the maximum size of the smaller swap area ( / mnt2 / swapfile) of the SATA hard disk drive 105. In addition, the maximum size of the swap area ( / mnt1 / swapfile) of the SATA hard disk drive 104 in the benchmark result file 209 at this point is 112.5 GB.

[0044] In step S103, the CPU 101 creates a temporary swap file (swapfile) for each auxiliary storage device using the dd command within the range of the swap size upper limit ratio value in the various setting files 206 in FIG. 2, and measures the writing speed.

[0045] Specifically, in this embodiment, the CPU 101 creates a temporary swap file (swapfile) for each of the SATA hard disk drive 104, the SATA hard disk drive 105, the USB hard disk drive 106, and the NVMe solid state drive 107. The temporary swap files (swapfile) for the SATA hard disk drive 104, the SATA hard disk drive 105, the USB hard disk drive 106, and the NVMe solid state drive 107 correspond to / mnt1 / swapfile, / mnt2 / swapfile, / mnt3 / swapfile, and / mnt4 / swapfile in the swap area of ​​the benchmark result file 209 in FIG. 6, respectively.

[0046] Next, the CPU 101 measures the write speed of the temporary swap file (swapfile) of each of the SATA hard disk drive 104, the SATA hard disk drive 105, the USB hard disk drive 106, and the NVMe solid state drive 107.

[0047] In step S104, the CPU 101 records the measured write speed for each auxiliary storage device in the benchmark result file 209.

[0048] In an embodiment, as shown in FIG. 6, the write speed of the SATA hard disk drive 104 is 180 (MiB / s), the write speed of the SATA hard disk drive 105 is 196 (MiB / s), the write speed of the USB hard disk drive 106 is 80 (MiB / s), and the write speed of the NVMe solid state drive 107 is 1500 (MiB / s).

[0049] In step S105, the CPU 101 integrates the swap areas in accordance with the criteria in the swap integration criteria table 208 of FIG. 5, and overwrites the swap file (swapfile) with the maximum size of the integrated swap areas.

[0050] The swap consolidation criteria table 208 has items for device transfer speed, allowable performance difference, and integrated upper limit speed. The device transfer speed item further has items for lower limit and upper limit. The swap consolidation criteria table 208 also has items for criterion 1, criterion 2, criterion 3, and criterion 4 for each of the items for device transfer speed, allowable performance difference, and integrated upper limit speed. Each of the items for criterion 1, criterion 2, criterion 3, and criterion 4 has a value for each of the items for device transfer speed, allowable performance difference, and integrated upper limit speed.

[0051] The values ​​in Criteria 1 to 4 are all numerical values ​​indicating speed. The units for the values ​​in Criteria 1 to 4 are all MiB / s. The upper limit of the device transfer speed shall be less than that value.

[0052] Criterion 1, criterion 2, criterion 3, and criterion 4 in the swap consolidation criteria table 208 represent the criteria for the SATA hard disk drive 104, the SATA hard disk drive 105, the USB hard disk drive 106, and the NVMe solid state drive 107, respectively.

[0053] The CPU 101 consolidates swap areas in accordance with the criteria in the swap consolidation criteria table 208 in Fig. 5. Consolidating swap areas means that the swap areas of multiple auxiliary storage devices that are within the range of the allowable performance difference in the swap consolidation criteria table 208 are combined into a single swap area to which pages are allocated in a round-robin manner, and are treated as a single consolidated auxiliary storage device. The allowable performance difference means the difference in write speed that allows each auxiliary storage device to consolidate its swap area with another auxiliary storage device.

[0054] In the embodiment, as described above, the write speed of the SATA hard disk drive 104 is 180 (MiB / s), the write speed of the SATA hard disk drive 105 is 196 (MiB / s), the write speed of the USB hard disk drive 106 is 80 (MiB / s), and the write speed of the NVMe solid state drive 107 is 1500 (MiB / s).

[0055] As shown in the swap consolidation criteria table 208 of Figure 5, the allowable performance difference for the SATA hard disk drive 104 is 10 (MiB / s), the allowable performance difference for the SATA hard disk drive 105 is 20 (MiB / s), the allowable performance difference for the USB hard disk drive 106 is 50 (MiB / s), and the allowable performance difference for the NVMe solid state drive 107 is 100 (MiB / s).

[0056] From these figures, it is possible to integrate the swap area of ​​the SATA hard disk drive 104 with the swap area of ​​the SATA hard disk drive 105. On the other hand, the swap area of ​​the USB hard disk drive 106 cannot be integrated with the swap area of ​​any of the auxiliary storage devices, the SATA hard disk drive 104, the SATA hard disk drive 105, and the NVMe solid state drive 107. Similarly, the swap area of ​​the NVMe solid state drive 107 cannot be integrated with the swap area of ​​any of the auxiliary storage devices, the SATA hard disk drive 104, the SATA hard disk drive 105, and the USB hard disk drive 106.

[0057] In this embodiment, CPU 101 integrates the swap area of ​​SATA hard disk drive 104 and the swap area of ​​SATA hard disk drive 105. That is, CPU 101 combines the swap area ( / mnt1 / swapfile) of SATA hard disk drive 104 and the swap area ( / mnt2 / swapfile) of SATA hard disk drive 105 into a single swap area that allocates pages in a round-robin manner. In other words, CPU 101 treats SATA hard disk drive 104 and SATA hard disk drive 105 as a single integrated auxiliary storage device.

[0058] As a result of the integration, CPU 101 records 1 in the integration ID field of benchmark result file 209 for both the swap area of ​​SATA hard disk drive 104 ( / mnt1 / swapfile) and the swap area of ​​SATA hard disk drive 105 ( / mnt2 / swapfile), records 2 for the swap area of ​​USB hard disk drive 106 ( / mnt3 / swapfile), and records 3 for the swap area of ​​NVMe solid state drive 107 ( / mnt4 / swapfile).

[0059] After integration, the CPU 101 treats the SATA hard disk drive 104, the SATA hard disk drive 105, the USB hard disk drive 106, and the NVMe solid state drive 107 as individual auxiliary storage devices based on the integrated ID. That is, the CPU 101 treats the SATA hard disk drive 104 and the SATA hard disk drive 105 as one auxiliary storage device, the USB hard disk drive 106 as one auxiliary storage device, and the NVMe solid state drive 107 as one auxiliary storage device.

[0060] The CPU 101 also checks the free space in the multiple auxiliary storage devices that will combine the swap areas, and aligns the maximum size of the swap areas that can be obtained from the free space in those multiple auxiliary storage devices. Specifically, it aligns the maximum size of the swap area in the other auxiliary storage devices to the maximum size of the swap area in the smallest auxiliary storage device. This is to align the sizes of the swap areas among the multiple swap areas that will be combined into one swap area to which pages are allocated using the round-robin method. This contributes to good page allocation using the round-robin method.

[0061] In the example of the benchmark result file 209 in Fig. 6, the free space on the SATA hard disk drive 104 is 125 GB, and the free space on the SATA hard disk drive 105 is 100 GB. The maximum size of the swap area is the free space multiplied by the swap size upper limit percentage value in the various setting file 206 in Fig. 4. Therefore, the maximum size of the swap area ( / mnt1 / swapfile) on the SATA hard disk drive 104 is 112.5 GB, and the maximum size of the swap area ( / mnt2 / swapfile) on the SATA hard disk drive 105 is 90 GB.

[0062] As described above, when processing step S102, the CPU 101 records 112.5 GB as the maximum size of the swap area ( / mnt1 / swapfile) of the SATA hard disk drive 104 in the benchmark result file 209.

[0063] In order to align the SATA hard disk drive 104 and the SATA hard disk drive 105, in this step S105, the CPU 101 overwrites the maximum size of 112.5 GB of the swap area ( / mnt1 / swapfile) of the larger SATA hard disk drive 104 with the maximum size of 90 GB of the swap area ( / mnt2 / swapfile) of the smaller SATA hard disk drive 105.

[0064] In step S106, CPU 101 calculates the integrated write speed for each auxiliary storage device after the swap areas have been integrated, and records the calculated speed in benchmark result file 209. For multiple auxiliary storage devices that integrate swap areas, the integrated write speed is calculated by adding up the write speeds of those multiple auxiliary storage devices and multiplying the result by the performance estimation correction value in various setting file 206 in Fig. 4. For a single auxiliary storage device that does not integrate swap areas, the integrated write speed is the write speed value of that auxiliary storage device itself.

[0065] 6, the combined write speed of both the SATA hard disk drive 104 and the SATA hard disk drive 105 is 300.8 (MiB / s). This value is obtained by adding the write speeds of the SATA hard disk drive 104 and the SATA hard disk drive 105 together and multiplying the result by 0.9, which is the swap size upper limit percentage value.

[0066] On the other hand, the aggregate write speeds of the USB hard disk drive 106 and the NVMe solid state drive 107 are 80 (MiB / s) and 1500 (MiB / s), respectively. The aggregate write speeds of the USB hard disk drive 106 and the NVMe solid state drive 107 are both equal to their respective write speeds.

[0067] In step S107, CPU 101 assigns higher priority to the swap areas in order of the speed of integration of writes. That is, CPU 101 assigns higher priority to the auxiliary storage devices with the fastest integration speed of writes among the multiple auxiliary storage devices identified based on the integration ID so that the swap areas are preferentially used, and records the priority in benchmark result file 209.

[0068] 6, the CPU 101 records 90 in the priority field of the benchmark result file 209 for both the SATA hard disk drive 104 and the SATA hard disk drive 105 that integrate the swap area, records 80 for the USB hard disk drive 106, and records 100 for the NVMe solid state drive 107. Here, the larger the value, the higher the priority.

[0069] In step S108, the / etc / fstab file is updated based on the benchmark result file 209 after the processing of step S107. Fig. 7 is a diagram showing the contents related to the swap area of ​​an example of the updated / etc / fstab file 207. The / etc / fstab file 207 in Fig. 7 contains the following:<file system> For each of <option>As a result, defaults,pri, which indicates the priority, is written.

[0070] From Figure 7, it can be seen that the priority of the swap area ( / mnt1 / swapfile) of the SATA hard disk drive 104 and the priority of the swap area ( / mnt2 / swapfile) of the SATA hard disk drive 105 are both 90 (pri=90), the priority of the swap area ( / mnt3 / swapfile) of the USB hard disk drive 106 is 80 (pri=80), and the priority of the swap area ( / mnt4 / swapfile) of the NVMe solid state drive 107 is 1000 (pri=100).

[0071] In step S109, the CPU 101 restarts Linux. When restarting Linux, the CPU 101 uses the swapon command 205 to allocate swap areas for each of the SATA hard disk drive 104, the SATA hard disk drive 105, the USB hard disk drive 106, and the NVMe solid state drive 107, based on the / etc / fstab file 207 updated in step S108.

[0072] After Linux is restarted, if the capacity of RAM 103 is insufficient, CPU 101 activates the swap areas of SATA hard disk drive 104, SATA hard disk drive 105, USB hard disk drive 106, and NVMe solid state drive 107 based on the priorities of / etc / fstab file 207.

[0073] In the embodiment, in steps S105 to S107, the swap area of ​​the SATA hard disk drive 104 and the swap area of ​​the SATA hard disk drive 105 are integrated, and a priority is set based on the integrated write speed; however, the process of integrating the swap area of ​​the SATA hard disk drive 104 and the swap area of ​​the SATA hard disk drive 105 may be omitted, and the priority may simply be set based on the write speed of the SATA hard disk drive 104, the SATA hard disk drive 105, the USB hard disk drive 106, and the NVMe solid state drive 107.

[0074] [effect] When using multiple auxiliary storage devices with different write speeds to the swap areas, the computer 100 of the embodiment automatically sets the priority of the swap areas of the multiple auxiliary storage devices. This allows even a user who has no knowledge of how to set the priority of the swap areas to efficiently use the system bus 102. Therefore, when using the swap area when the capacity of the RAM 103 is insufficient, the time required for swapping can be shortened, and the calculation process can be completed quickly.

[0075] That is, according to the embodiment, a computer, a memory control method, and a memory control program are provided that, when a plurality of auxiliary storage devices are used, automatically set the priority of the swap areas of the plurality of auxiliary storage devices.

[0076] Although several embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be embodied in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their modifications are included within the scope and spirit of the invention, and are also included in the scope of the invention and its equivalents as defined in the claims. [Explanation of symbols]

[0077] 100...computer, 101...CPU, 102...system bus, 103...RAM, 104...SATA hard disk drive, 105...SATA hard disk drive, 106...USB hard disk drive, 107...NVMe solid state drive, 108...Ethernet interface, 109...display, 110...keyboard, 201...fdisk command, 202...mount command, 203...df command, 204...dd command, 205...swapon command, 206...seed configuration file, 207...etc / fstab file, 208...swap integration criteria table, 209...benchmark result file.< / option>

Claims

1. A computer to which a plurality of auxiliary storage devices each having a swap area can be connected, a processor; a main memory device; The processor: Searching the auxiliary storage device connected to the computer; If a plurality of auxiliary storage devices are found as a result of the search, the write speed of each auxiliary storage device is measured; Set the priority so that the swap space is used preferentially from the auxiliary storage device with the fast writing speed. Activate swap areas according to priority, calculator.

2. When there are at least two auxiliary storage devices whose difference in write speed is within a set value range and there is at least one other auxiliary storage device, the processor combines the swap areas of the at least two auxiliary storage devices into one swap area to which pages are allocated in a round-robin manner, treats the at least two auxiliary storage devices as one integrated auxiliary storage device, calculates the write speed of the integrated auxiliary storage device, and sets a high priority so that the swap area of ​​the auxiliary storage device with the faster write speed is used preferentially from among the multiple auxiliary storage devices including the integrated auxiliary storage device as one auxiliary storage device.

2. The computer of claim 1.

3. checking the free space of the at least two auxiliary storage devices, and aligning the sizes of the swap areas obtainable from the free space of the at least two auxiliary storage devices; 3. The computer of claim 2.

4. A memory control method for a computer to which a plurality of auxiliary storage devices each having a swap area can be connected, comprising: Searching the auxiliary storage device connected to the computer; If a plurality of auxiliary storage devices are found as a result of the search, the write speed of each auxiliary storage device is measured; Set the priority so that the swap space is used preferentially from the auxiliary storage device with the fast writing speed. Activate swap areas according to priority, Memory control method.

5. A processor of a computer to which a plurality of auxiliary storage devices each having a swap area can be connected, Searching the auxiliary storage device connected to the computer; If a plurality of auxiliary storage devices are found as a result of the search, the write speed of each auxiliary storage device is measured; Set the priority so that the swap space is used preferentially from the auxiliary storage device with the fastest write speed, Activate swap areas according to priority, Memory control program.

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