Tunable notch filter including a matching network.

Abstract

The filter circuit includes a matching network having a resistive element and a capacitive element, and a transformer within the matching network, the transformer having a primary side and a secondary side and having at least one interwinding capacitance coupled from an input on the primary side to a non-inverting output on the secondary side.

Description

[Technical Field]

[0001] Related Applications This application claims priority to and the benefit of U.S. Provisional Patent Application No. 63 / 052,884, entitled "MATCHING NETWORK WITH TUNABLE NOTCH FILTER," filed July 16, 2020, which is incorporated by reference in its entirety as if fully set forth below and for all applicable purposes.

[0002] The present disclosure relates generally to electronic devices, and more particularly to radio frequency (RF) transmitters and receivers. [Background technology]

[0003] Wireless communication devices and technologies are becoming more prevalent as communication devices operate at millimeter wave (mmW) frequencies. Wireless communication devices generally transmit and / or receive communication signals.

[0004] Transmitters in mmW communication systems typically use one or more amplifier stages and one or more mixers to upconvert signals for transmission. For example, in an upconversion path, an intermediate frequency (IF) signal may be upconverted by a mixer to a radio frequency (RF) signal for transmission, and in a downconversion path, a radio frequency (RF) signal may be downconverted by a mixer to an intermediate frequency (IF) signal for reception. Signal upconversion and downconversion can result in spurious stones at the mixer output. Such spurious stones (sometimes called spurs) can occur at the local oscillator (LO) frequency and at harmonic frequencies of the LO signal, such as twice the LO (2LO) frequency, and can have signal energy that can appear close enough to the communication signal in the communication signal band to adversely affect the communication signal. Summary of the Invention [Means for solving the problem]

[0005] Various implementations of the systems, methods, and devices within the scope of the appended claims each have several aspects, no single aspect of which is solely responsible for the desirable attributes described herein. Without limiting the scope of the appended claims, some prominent features will be described herein.

[0006] The details of one or more implementations of the subject matter described herein are set forth in the accompanying drawings and the description below. Other features, aspects, and advantages will become apparent from the description, drawings, and claims. It should be noted that the relative dimensions of the following figures may not be drawn to scale.

[0007] One aspect of the present disclosure provides a filter circuit that includes a matching network having a resistive element and a capacitive element, and a transformer in the matching network having a primary side and a secondary side, with at least one interwinding capacitance coupled from an input on the primary side to a non-inverting output on the secondary side.

[0008] Another aspect of the present disclosure provides a method for generating a notch filter response using a matching network including a tunable notch filter, the method including transmitting a signal through a transformer, the transformer having an interwinding capacitance across an input on a primary side of the transformer and a non-inverting output on a secondary side of the transformer, and adjusting a value of the interwinding capacitance to determine the notch filter response.

[0009] Another aspect of the present disclosure provides a device including means for transmitting a signal through a transformer, the transformer having an interwinding capacitance across an input on a primary side of the transformer and a non-inverting output on a secondary side of the transformer, and means for adjusting a value of the interwinding capacitance to determine a notch filter response.

[0010] In the figures, like reference numbers refer to like parts throughout the various figures unless otherwise indicated. In the case of a reference number accompanied by a letter designation such as "102a" or "102b," the letter designation may distinguish between two like parts or elements present in the same figure. The letter designation of a reference number may be omitted when the reference number is intended to encompass all parts having the same reference number in all figures. [Brief explanation of the drawings]

[0011] [Figure 1] FIG. 1 illustrates a wireless device in communication with a wireless communication system. [Figure 2A] FIG. 1 is a block diagram illustrating a wireless device in which example techniques of the present disclosure may be implemented. [Figure 2B] FIG. 1 is a block diagram illustrating a wireless device in which example techniques of the present disclosure may be implemented. [Figure 2C] FIG. 2C is a block diagram illustrating one embodiment of some of the components of FIG. 2B in more detail. [Figure 3A] FIG. 1 is a block diagram of at least a portion of an example transmit chain in which an example embodiment of a matching network including a tunable notch filter may be implemented. [Figure 3B] FIG. 1 is a block diagram of at least a portion of an example transmit chain in which an example embodiment of a matching network including a tunable notch filter may be implemented. [Figure 3C] FIG. 2 is a block diagram of at least a portion of an example transmit chain in which example embodiments of a matching network including a tunable notch filter may be implemented. [Figure 3D] FIG. 1 illustrates a communication frame structure with 120 KHz subcarrier spacing. [Figure 4] 1 is a graph of a portion of the communications spectrum. [Figure 5] FIG. 1 illustrates an exemplary embodiment of a matching network including a single-ended tunable notch filter. [Figure 6]FIG. 1 illustrates an exemplary embodiment of a matching network including a differential tunable notch filter. [Figure 7] FIG. 1 illustrates an exemplary embodiment of a matching network including a differential tunable notch filter. [Figure 8] FIG. 10 illustrates an exemplary filter response according to an exemplary embodiment of the present disclosure. [Figure 9] FIG. 10 illustrates an exemplary filter response according to an exemplary embodiment of the present disclosure. [Figure 10] FIG. 10 illustrates an exemplary filter response according to an exemplary embodiment of the present disclosure. [Figure 11] FIG. 10 illustrates an exemplary filter response according to an exemplary embodiment of the present disclosure. [Figure 12] FIG. 1 illustrates an exemplary embodiment of a matching network according to an exemplary embodiment of the present disclosure. [Figure 13] FIG. 1 illustrates an exemplary on-chip transformer. [Figure 14] FIG. 1 illustrates an exemplary on-chip transformer according to an exemplary embodiment of the present disclosure. [Figure 15] FIG. 1 illustrates an exemplary on-chip transformer according to an exemplary embodiment of the present disclosure. [Figure 16] FIG. 1 illustrates an exemplary on-chip transformer according to an exemplary embodiment of the present disclosure. [Figure 17] FIG. 1 illustrates an exemplary on-chip transformer according to an exemplary embodiment of the present disclosure. [Figure 18] FIG. 1 illustrates an example schematic diagram of an adjustable capacitance circuit used with an on-chip transformer in accordance with an example embodiment of the present disclosure. [Figure 19] FIG. 1 illustrates an example schematic diagram of an adjustable capacitance circuit used with an on-chip transformer in accordance with an example embodiment of the present disclosure. [Figure 20] FIG. 1 illustrates an exemplary on-chip transformer according to an exemplary embodiment of the present disclosure. [Figure 21]5 is a flowchart illustrating an example of a method operation for generating a notch filter response according to an exemplary embodiment of the present disclosure. [Figure 22] FIG. 1 is a functional block diagram of an apparatus for generating a notch filter response according to an exemplary embodiment of the present disclosure. DETAILED DESCRIPTION OF THE INVENTION

[0012] The word "exemplary" is used herein to mean "serving as an example, instance, or illustration." Any aspect described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other aspects.

[0013] Modern wireless communication devices operating at millimeter wave (mmW) frequencies over multiple communication bands must meet several radio frequency (RF) energy emissions standards. The requirements for emissions at local oscillator (LO) and 2LO frequencies in mmW 5G communication systems are stringent, typically around -36 dBc for user equipment (UE) and -46 dBc for customer premises equipment (CPE).

[0014] Some mmW communication systems and devices use a type of transmit and receive architecture called heterodyne or superheterodyne. Superheterodyne architectures use an intermediate frequency (IF) local oscillator (LO) signal to first upconvert the transmit signal from baseband to an intermediate frequency (IF), and then upconvert from the IF to a radio frequency (RF) for transmission. Similarly, receive signals are first downconverted from RF to an IF, and then downconverted from the IF to baseband for information recovery.

[0015] The IF and LO mixer frequencies are selected so that spurious tones fall outside the frequency range of the mmW signal path. Exemplary bands for mmW communication systems include the 24 GHz to 30 GHz band, the 37 GHz to 43.5 GHz band (which may encompass the 37 GHz to 40 GHz band and the 39 GHz to 43.5 GHz band), and the 48 GHz band, where 48 GHz may be in the range of 47.2 GHz to 48.2 GHz. For example, to minimize the LO frequency tuning range and prevent very high IF frequencies, the 48 GHz communication band may use a 34 GHz LO frequency, which is outside the 37 GHz to 43.5 GHz band. Similarly, the LO frequency for the 37 GHz to 43.5 GHz band may be 26 GHz, with the LO frequency being 52 GHz, close to the 48 GHz band.

[0016] One way to minimize the adverse effects of spurious emissions from the LO on the communications signal is to design narrow-band amplifier stages, which, however, require separate paths for each sub-band, resulting in a large chip area.

[0017] Exemplary embodiments of matching networks including tunable notch filter responses, which may be implemented as compact, low-loss matching networks including the tunable notch filters disclosed herein, can be used to remove spurious (LO) signal energy that may appear near the communications band of interest.

[0018] Exemplary embodiments of a matching network with a tunable notch filter response may be implemented in a transceiver in either or both of the transmit or receive chains.

[0019] Exemplary embodiments of matching networks with tunable notch filter responses may be implemented in multiple locations in either or both of the transmit or receive chains.

[0020] Exemplary embodiments of matching networks with tunable notch filter responses may be implemented in single-ended or differential signaling architectures.

[0021] 1 illustrates a wireless device 110 communicating with a wireless communication system 120. The wireless communication system 120 may be a Long Term Evolution (LTE) system, a Code Division Multiple Access (CDMA) system, a Global System for Mobile Communications (GSM) system, a Wireless Local Area Network (WLAN) system, a 5G system, or some other wireless system. The CDMA system may implement Wideband CDMA (WCDMA), CDMA 1X, Evolution-Data Optimized (EVDO), Time Division Synchronous CDMA (TD-SCDMA), or some other version of CDMA. For simplicity of explanation, FIG. 1 illustrates the wireless communication system 120 including two base stations 130 and 132 and one system controller 140. In general, a wireless communication system may include any number of base stations and any set of network entities.

[0022] The wireless device 110 may also be referred to as a user equipment (UE), a mobile station, a terminal, an access terminal, a subscriber unit, a station, etc. The wireless device 110 may be a mobile phone, a smartphone, a tablet, a wireless modem, a personal digital assistant (PDA), a handheld device, a laptop computer, a smartbook, a netbook, a tablet, a cordless phone, a medical device, an automobile, a device configured to connect to one or more other devices (e.g., through the Internet of Things), a wireless local loop (WLL) station, a Bluetooth device, etc. The wireless device 110 may communicate with the wireless communication system 120. The wireless device 110 may also receive signals from broadcast stations (e.g., broadcast station 134), signals from satellites (e.g., satellites 150 in one or more global navigation satellite systems (GNSS)), etc. The wireless device 110 may support one or more radio technologies for wireless communication, such as LTE, WCDMA, CDMA 1X, EVDO, TD-SCDMA, GSM, 802.11, 5G, etc.

[0023] Wireless device 110 may support carrier aggregation, e.g., as described in one or more LTE or 5G standards. In some embodiments, for example, a single data stream is transmitted over multiple carriers using carrier aggregation rather than using a separate carrier for each data stream. Wireless device 110 may be capable of operating in various communication bands, including those used by LTE, WiFi, 5G, or other communication bands, spanning a wide range of frequencies.

[0024] Generally, carrier aggregation (CA) may be classified into two types: intraband CA and interband CA. Intraband CA refers to operation on multiple carriers within the same band. Interband CA refers to operation on multiple carriers in different bands.

[0025] 2A is a block diagram illustrating a wireless device 200 in which example techniques of this disclosure may be implemented. Wireless device 200 may be, for example, an embodiment of wireless device 110 shown in FIG.

[0026] FIG. 2A illustrates an example of a transceiver 220 having a transmitter 230 and a receiver 250. In general, signal conditioning within the transmitter 230 and receiver 250 may be performed by one or more stages, such as amplifiers, filters, upconverters, downconverters, etc. These circuit blocks may be arranged differently than the configuration shown in FIG. 2A. Additionally, other circuit blocks not shown in FIG. 2A may also be used to condition signals in the transmitter 230 and receiver 250. Unless otherwise noted, any signal in FIG. 2A or any other diagram may be a single-ended signal or a differential signal. Some circuit blocks in FIG. 2A may be omitted.

[0027] 2A , wireless device 200 generally includes a transceiver 220 and a data processor 210. Data processor 210 may include a processor 296 operatively coupled to memory 298. Memory 298 may be configured to store data and program code as exemplary software 299 and may generally comprise analog and / or digital processing elements. Processor 296 and memory 298 may cooperate to control, configure, program, or in some cases fully or partially control some or all of the operation of embodiments of matching networks, including tunable notch filters, described herein.

[0028] The transceiver 220 includes a transmitter 230 and a receiver 250 that support bidirectional communication. In general, the wireless device 200 may include any number of transmitters and / or receivers for any number of communication systems and frequency bands. In some embodiments, only a transmitter or only a receiver may be implemented. All or a portion of the transceiver 220 may be implemented on one or more analog integrated circuits (ICs), RF ICs (RFICs), mixed-signal ICs, etc.

[0029] The transmitter or receiver may be implemented using a superheterodyne architecture or a direct-conversion architecture. In a superheterodyne architecture, a signal is frequency converted between radio frequency (RF) and baseband in multiple stages, e.g., in the case of a receiver, from RF to intermediate frequency (IF) in one stage and then from IF to baseband in another stage. In a direct-conversion architecture, a signal is frequency converted between RF and baseband in one stage. The superheterodyne architecture and the direct-conversion architecture may use different circuit blocks and / or have different requirements. In the example shown in FIG. 2A, the transmitter 230 and the receiver 250 are implemented using a direct-conversion architecture.

[0030] In the transmit path, data processor 210 processes data to be transmitted and provides in-phase (I) and quadrature (Q) analog output signals to transmitter 230. In an exemplary embodiment, data processor 210 includes digital-to-analog converters (DACs) 214a and 214b for converting digital signals generated by data processor 210 into I and Q analog output signals, e.g., I and Q output currents, for further processing. In other embodiments, DACs 214a and 214b are included in transceiver 220, and data processor 210 provides data (e.g., for I and Q) to transceiver 220 digitally.

[0031] Within transmitter 230, lowpass filters 232a and 232b filter the I and Q analog transmit signals, respectively, to remove unwanted images caused by previous digital-to-analog conversion. Amplifiers (Amp) 234a and 234b amplify the signals from lowpass filters 232a and 232b, respectively, and provide I and Q baseband signals. Upconverter 240 upconverts the I and Q baseband signals (e.g., using mixers 241a and 241b) with I and Q transmit (TX) local oscillator (LO) signals from transmit (TX) LO signal generator 290 and provides the upconverted signals. Filter 242 filters the upconverted signals to remove unwanted images caused by frequency upconversion as well as noise in the receive frequency band. Power amplifier (PA) 244 amplifies the signal from filter 242 to obtain the desired output power level and provides the transmit RF signal. The transmit RF signal may be routed through a duplexer or switch 246 and transmitted via an antenna 248. While the examples described herein utilize I and Q signals, those skilled in the art will understand that elements of the transceiver may be configured to utilize polar modulation.

[0032] In the receive path, antenna 248 receives a communication signal and provides a received RF signal. The received RF signal may be routed through duplexer or switch 246 and provided to low-noise amplifier (LNA) 252. Duplexer 246 is designed to operate with a specific RX-TX duplexer frequency separation so that the RX signal is isolated from the TX signal. The received RF signal is amplified by LNA 252 and filtered by filter 254 to obtain the desired RF input signal. Downconversion mixers 261a and 261b in downconverter 260 mix the output of filter 254 with I and Q receive (RX) LO signals (i.e., LO_I and LO_Q) from RX LO signal generator 280 to generate I and Q baseband signals. The I and Q baseband signals are amplified by amplifiers 262a and 262b and further filtered by low pass filters 264a and 264b to obtain I and Q analog input signals, which are provided to data processor 210. In the illustrated exemplary embodiment, data processor 210 includes analog-to-digital converters (ADCs) 216a and 216b for converting the analog input signals to digital signals that are further processed by data processor 210. In some embodiments, ADCs 216a and 216b are included in transceiver 220 and provide data digitally to data processor 210.

[0033] 2A , TX LO signal generator 290 generates I and Q TX LO signals used for frequency upconversion, while RX LO signal generator 280 generates I and Q RX LO signals used for frequency downconversion. Each LO signal is a periodic signal having a particular fundamental frequency. Phase-locked loop (PLL) 292 receives timing information from data processor 210 and generates control signals used to adjust the frequency and / or phase of the TX LO signal from LO signal generator 290. Similarly, PLL 282 receives timing information from data processor 210 and generates control signals used to adjust the frequency and / or phase of the RX LO signal from LO signal generator 280.

[0034] Wireless device 200 may support CA and may (i) receive multiple downlink signals transmitted by one or more cells on multiple downlink carriers at different frequencies and / or (ii) transmit multiple uplink signals on multiple uplink carriers to one or more cells. However, those skilled in the art will understand that aspects described herein may be implemented in systems, devices, and / or architectures that do not support carrier aggregation.

[0035] 2A with respect to functionality, the configuration shown in FIG. 2A may or may not represent the physical device configuration in some implementations. For example, as described above, transceiver 220 may be implemented in various integrated circuits (ICs), RF ICs (RFICs), mixed-signal ICs, etc. In some embodiments, transceiver 220 is implemented on a substrate or board, such as a printed circuit board (PCB) having various modules. For example, power amplifier 244, filter 242, and duplexer 246 may be implemented in separate modules or as individual components, while the remaining elements shown in transceiver 220 may be implemented in a single transceiver chip.

[0036] Power amplifier 244 may comprise one or more stages including, for example, a driver stage, a power amplifier stage, or other components that can be configured to amplify communication signals over one or more frequencies, in one or more frequency bands, and at one or more power levels. Depending on various factors, power amplifier 244 can be configured to operate using one or more driver stages, one or more power amplifier stages, one or more impedance matching networks, and can be configured to achieve linearity, efficiency, or a combination of linearity and efficiency.

[0037] Exemplary embodiments of matching networks including tunable notch filters described herein may be implemented in one or more locations within power amplifier 244 and / or filter 242. Exemplary embodiments of matching networks including tunable notch filters described herein may also be implemented within filter 254 and / or LNA 252 in receiver 250, or as part of filter 254 and / or LNA 252, and / or in other locations or components within transceiver 220.

[0038] In an exemplary embodiment in a superheterodyne architecture, filter 242, PA 244, LNA 252, and filter 254 may be implemented separately from other components in transmitter 230 and receiver 250, for example, on a millimeter-wave integrated circuit. An exemplary superheterodyne architecture is shown in FIG. 2B.

[0039] 2B is a block diagram illustrating a wireless device in which the exemplary techniques of the present disclosure may be implemented. Some components of the wireless device 200a in FIG. 2B, which may be indicated by the same reference numerals, may be configured similarly to the components in the wireless device 200 shown in FIG. 2A, and descriptions of items having the same reference numerals in FIG. 2B will not be repeated.

[0040] Wireless device 200a is an example of a heterodyne (superheterodyne) architecture, in which upconverter 240 and downconverter 260 are configured to process communication signals between baseband and intermediate frequency (IF). For example, upconverter 240 may be configured to provide an IF signal to upconverter 275. In an exemplary embodiment, upconverter 275 may include a summing function 278 and an upconversion mixer 276. Summing function 278 combines the I and Q outputs of upconverter 240 and provides a non-quadrature signal to mixer 276. The non-quadrature signal may be a single-ended signal or a differential signal. Mixer 276 is configured to receive the IF signal from upconverter 240 and a TX RF LO signal from TX RF LO signal generator 277, and is configured to provide an upconverted RF signal to phase shift circuit 281. Although PLL 292 is shown in FIG. 2B as being shared by signal generators 290, 277, a respective PLL for each signal generator may be implemented.

[0041] In an exemplary embodiment, the components in phase shift circuit 281 may include one or more adjustable or variable phased array elements, receive one or more control signals from data processor 210 via connection 294, and operate the adjustable or variable phased array elements based on the received control signals.

[0042] In the exemplary embodiment, the phase shift circuit 281 comprises a phase shifter 283 and a phased array element 287. Although three phase shifters 283 and three phased array elements 287 are shown for ease of illustration, the phase shift circuit 281 may comprise more or fewer phase shifters 283 and phased array elements 287.

[0043] Each phase shifter 283 receives an RF transmit signal from the upconverter 275, changes the phase by a certain amount, and provides the RF signal to a respective phased array element 287. Each phased array element 287 may comprise transmit and receive circuitry including one or more filters, matching networks, amplifiers, driver amplifiers, and power amplifiers. In some embodiments, the phase shifter 283 may be incorporated within each phased array element 287.

[0044] The output of the phase shift circuit 281 is provided to the antenna array 248. In an exemplary embodiment, the antenna array 248 generally comprises a number of antennas corresponding to the number of phase shifters 283 and phased array elements 287, whereby, for example, each antenna element is coupled to a respective phased array element 287. In an exemplary embodiment, the phase shift circuit 281 and the antenna array 248 are referred to as a phased array.

[0045] In the receive direction, the output of phase shift circuit 281 is provided to downconverter 285. In an exemplary embodiment, downconverter 285 may include I / Q generation function 291 and downconversion mixer 286. In an exemplary embodiment, mixer 286 downconverts the received RF signal provided by phase shift circuit 281 to an IF signal according to an RX RF LO signal provided by RX RF LO signal generator 279. I / O generation function 291 receives the IF signal from mixer 286 and generates I and Q signals for downconverter 260, which downconverts the IF signal to baseband as described above. Although PLL 282 is shown in FIG. 2B as being shared by signal generators 280, 279, a respective PLL for each signal generator may be implemented.

[0046] In some embodiments, the upconverter 275, the downconverter 285, and the phase shift circuit 281 are implemented on a common IC. In some embodiments, the summing function 278 and the I / Q generation function 291 are implemented separately from the mixers 276 and 286, such that the mixers 276, 286 and the phase shift circuit 281 are implemented on a common IC, but the summing function 278 and the I / Q generation function 291 are not implemented on the common IC (e.g., the summing function 278 and the I / Q generation function 291 are implemented on a separate IC coupled to the IC having the mixers 276, 286). In some embodiments, the LO signal generators 277, 279 are included on a common IC. In some embodiments in which the phase shift circuits 276, 286, 277, 278, 279, and / or 291 are implemented on a common IC, the common IC and the antenna array 248 are included in a module, and the module may be coupled to other components of the transceiver 220 via a connector. In some embodiments, the phase shift circuit 281, e.g., the chip on which the phase shift circuit 281 is implemented, is coupled by an interconnect to the antenna array 248. For example, the components of the antenna array 248 may be implemented on a substrate and coupled to an integrated circuit that implements the phase shift circuit 281 via a flexible printed circuit.

[0047] In some embodiments, both the architecture shown in FIG. 2A and the architecture shown in FIG. 2B may be implemented in the same device. For example, wireless device 110 or 200 may be configured to communicate using signals having frequencies below approximately 10 GHz using the architecture shown in FIG. 2A and to communicate using signals having frequencies above approximately 10 GHz using the architecture shown in FIG. 2B. In a device implementing both architectures, one or more components in FIGS. 2A and 2B that are identically numbered are shared between the two architectures. For example, both signals downconverted directly from RF to baseband and signals downconverted from RF to baseband via an IF stage may be filtered by the same baseband filter 264. In other embodiments, a first version of filter 264 is included in the portion of the device that implements the architecture of FIG. 2A, and a second version of filter 264 is included in the portion of the device that implements the architecture of FIG. 2B. While certain exemplary frequencies are described herein, other implementations are possible. For example, signals having frequencies above approximately 10 GHz (e.g., having mmW frequencies) may be transmitted and / or received using a direct-conversion architecture. In such an embodiment, for example, a phased array may be implemented in a direct conversion architecture.

[0048] FIG. 2C is a block diagram 297 illustrating one embodiment of some of the components of FIG. 2B in more detail. In an exemplary embodiment, the upconversion mixer 276 provides an RF transmit signal to the phase shift circuit 281, and the downconversion mixer 286 receives an RF receive signal from the phase shift circuit 281. In an exemplary embodiment, the phase shift circuit 281 comprises an RF variable gain amplifier 284, a splitter / combiner 288, a phase shifter 283, and a phased array element 287. In an exemplary embodiment, the phase shift circuit 281 may be implemented on a millimeter-wave integrated circuit (mmWIC). In some such embodiments, the upconverter 275 and / or the downconverter 285 (or only the mixers 276, 286) are also implemented on the mmWIC. In an exemplary embodiment, the RF VGA 284 may comprise a TX VGA 293 and a RX VGA 295. In some embodiments, the TX VGA 293 and the RX VGA 295 may be implemented independently. In other implementations, VGA 284 is bidirectional. In an exemplary embodiment, splitter / combiner 288 may be an example of a power distribution network and a power combining network. In some embodiments, splitter / combiner 288 may be implemented as a single component or as separate signal splitters and combiners. Phase shifters 283 are coupled to respective phased array elements 287. In the exemplary embodiment shown in FIG. 2C , phase shifters 283 and phased array elements 287 are configured to process both transmit and receive signals, although in other embodiments, separate phase shifters 283 and / or phased array elements 287 may be configured to process transmit and receive signals separately. Each respective phased array element 287 is coupled to a respective antenna element in antenna array 248. In an exemplary embodiment, phase shifters 283 and phased array elements 287 receive control signals from data processor 210 via connection 294.2C comprises a 1x4 array having four phase shifters 283-1, 283-2, 283-3, and 283-n, four phased array elements 287-1, 287-2, 287-3, and 287-n, and four antennas 248-1, 248-2, 248-3, and 248-n. However, the 1x4 phased array is shown merely as an example, and other configurations such as 1x2, 1x6, 1x8, 2x3, 2x4, or other configurations are possible.

[0049] FIG. 3A is a block diagram of at least a portion of an example transmit chain 300 in which an example embodiment of a matching network including a tunable notch filter may be implemented. For simplicity, aspects of the tunable notch filter are omitted from the diagram of FIG. 3A, but these aspects are described below with respect to subsequent figures. In an example embodiment, the transmit chain 300 may be implemented in an mmW communications device implementing a superheterodyne (Superheterodyne) architecture, in which a transmitted communications signal is converted from a baseband information signal to an intermediate frequency signal and then upconverted from the intermediate frequency signal to a radio frequency signal. Similarly, a received communications signal is downconverted from an RF signal to an IF signal and then further downconverted from the IF signal to a baseband information signal. However, those skilled in the art will understand that an embodiment of a matching network including a tunable notch filter may alternatively or additionally be implemented in a direct-conversion architecture. In some embodiments, an LO for communications in the 20 GHz or 30 GHz range is implemented, and the 2LO may be located near or overlapping the frequency of a communications signal in the 50 GHz or 60 GHz range. Thus, while the following description includes a SuperHet architecture (and references an IF communications signal), those skilled in the art will understand that embodiments are not limited thereto (and, for example, direct conversion and baseband communications signals may additionally or alternatively be implemented). The exemplary transmit chain 300 is shown for illustrative purposes only and may comprise a portion of a transmit chain in an mmW communications device.

[0050] In an exemplary embodiment, transmit chain 300 may include a mixer 302 configured to receive an intermediate frequency (IF) communication signal via differential connection 304 and a local oscillator (LO) signal via differential connection 306. In an exemplary embodiment, mixer 302 may be an embodiment of mixer 276 of FIG. 2B.

[0051] In an exemplary embodiment, the transmit chain 300 may include one or more power amplifier stages, with three exemplary power amplifier stages 320, 322, and 324 shown in FIG. 3A by way of example only. The three amplifier stages 320, 322, and 324 may be configured to provide the same or different levels of signal amplification. In an exemplary embodiment, the first amplifier stage 320 and the second amplifier stage 322 may be referred to as driver stages, and the third amplifier stage 324 may be referred to as a power amplifier. More or fewer amplifier stages may be included in the transmit chain depending on the application.

[0052] In an exemplary embodiment, transmit chain 300 may include one or more matching networks 310, 312, 314, and 316. Matching networks 310, 312, 314, and 316 may be configured to transfer an RF signal from one component to another, such as from mixer 302 to amplifier stage 320, from amplifier stage to amplifier stage, or from amplifier stage to a load such as an antenna, a phase shifter, etc. Each of matching networks 310, 312, 314, and 316 may include one or more passive and / or active components, such as transistors, resistors, capacitances, inductances (not shown in FIG. 3A ), and respective transformers 311, 313, 315, and 317. For example, transformer 311 may include a primary side 332 and a secondary side 333. Similarly, transformer 313 may have a primary side 334 and a secondary side 335, transformer 315 may have a primary side 336 and a secondary side 337, and transformer 317 may have a primary side 338 and a secondary side 339.

[0053] In an exemplary embodiment, each transformer 311, 313, 315, and 317 may be configured in what is referred to as a "negative magnetic coupling" or a "positive magnetic coupling." Using what is referred to as dot notation to denote coupling, when current is "into" a dotted terminal of a coil, the reference polarity of the voltage induced in the other coil is positive at that dotted terminal. When current is "out" of a coil's dotted terminal, the reference polarity of the voltage induced in the other coil is negative at that dotted terminal. In a transformer, there is a mutual inductance L between the primary inductance L1 and the secondary inductance L2. M The coupling strength of a transformer is proportional to the ratio of mutual inductance to self-inductance. Lm / sqrt(L1 * L2). If L1=L2=L, then k=L m / L. This ratio is a measure of the coupling strength and is the coupling factor or coefficient k for a pair of synchronously tuned shunt inductively coupled resonators. M Or called k.

[0054] Although shown in FIG. 3A as being coupled in a configuration that provides positive magnetic coupling, one or more of transformers 311, 313, 315, and 317 may be coupled in a configuration that provides negative magnetic coupling.

[0055] Although shown as a differential architecture in FIG. 3A, the transmit chain 300 may also be configured in a single-ended architecture.

[0056] In the exemplary embodiment, the output of amplifier stage 324 is shown connected to antenna 342 through matching network 316. However, in other embodiments, the output of power amplifier 324 may be coupled to other elements, such as a phase shifter, another amplifier, etc. Similarly, while the input of amplifier stage 320 is shown connected to mixer 302 through matching network 310, one or more components (such as a phase shifter) may be coupled between amplifier stage 320 and mixer 302. Furthermore, while three amplifier stages and four matching networks are shown in FIG. 3A , embodiments may include more or fewer amplifier stages and matching networks.

[0057] In the exemplary embodiment, matching networks 310, 312, 314, and 316 and amplifier stages 320, 322, and 324 may comprise a transmit path 330, and one or more transmit paths 330 may be implemented in a phased array architecture. Transmit path 330 may include fewer or more amplifier stages and / or fewer or more matching networks in other embodiments. Transmit path 330 may be included within one of phased array elements 287.

[0058] 3B is a block diagram of at least a portion of an example transmit chain 350 in which an example embodiment of a matching network including a tunable notch filter may be implemented. The transmit chain 350 is an example of a phased array antenna architecture in which multiple transmit paths 330-1, 330-2 through 330-n may be coupled to a mixer 302. In the example embodiment, the number of transmit paths 330 is implementation dependent, and three transmit paths 330-1, 330-2, and 330-n are shown for ease of illustration.

[0059] In an exemplary embodiment, the input of each transmit path 330 is coupled to a respective phase shifter 331, i.e., transmit path 330-1 is coupled to phase shifter 331-1, transmit path 330-2 is coupled to phase shifter 331-2, and transmit path 330-n is coupled to phase shifter 331-n. In an exemplary embodiment, each phase shifter 331 is coupled to a respective variable gain amplifier 352, i.e., phase shifter 331-1 is coupled to VGA 352-1, phase shifter 331-2 is coupled to VGA 352-2, and phase shifter 331-n is coupled to VGA 352-n. VGA 352 receives the RF signal from mixer 302. In such an embodiment, the output of each of transmit paths 330 is coupled to a respective antenna element 344 in array of antenna elements 348. For example, transmit path 330-1 is coupled to antenna element 344-1, transmit path 330-2 is coupled to antenna element 344-2, transmit path 330-n is coupled to antenna element 344-n, etc. In other embodiments, rather than all transmit paths 330 being coupled to mixer 302, each transmit path 330 may be coupled to a respective mixer, thereby introducing a phase shift, for example, by modulating the LO signal provided to the respective mixer, rather than introducing a phase shift in the signal path as shown in FIG.

[0060] 3C is a block diagram 360 of at least a portion of an example transmit path in which an example embodiment of a matching network including a tunable notch filter may be implemented. The example transmit path 330 is coupled to a phase shifter 331. An RF signal is provided to a VGA 352 through an optional matching network 362. An output of the VGA 352 may also be provided to a matching network 364, the output of which may be coupled to the phase shifter 331. In an example embodiment, matching networks 362 and 364 may be similar to matching networks 310, 312, 314, and 316 described above.

[0061] In exemplary embodiments, one or more of matching networks 362, 364, 310, 312, 314, and 316 may be configured to provide a range of filter responses that may include a notch-tuned response. Exemplary embodiments of matching networks including tunable notch filters described herein may be configured to produce selectable notch filter responses on the low frequency side of passband 366 and / or on the high frequency side of passband 366. In some embodiments, matching networks 362, 364, 310, 312, 314, and 316 may be configured to produce a wideband response or a passband response.

[0062] In an exemplary embodiment, configuring one or more of matching networks 362, 364, 310, 312, 314, and 316 to generate a tunable notch response enables transmit path 330 to transmit alternating low-bandwidth and high-bandwidth signals in respective communication periods, such as different communication slots, frames, etc. For example, it may be desirable to have the ability to transmit normal communication (sometimes called mission mode) transmit (TX) signals, which may be narrow-bandwidth signals, using a narrow channel bandwidth, and, by way of example only, to transmit different types of signals, such as frequency-modulated continuous wave (FMCW) radar signals, which may be wide-bandwidth signals, using a wide channel bandwidth. An example of an FMCW signal may be a radar signal used to determine a user's proximity to a communication device. Furthermore, configuring one or more of matching networks 362, 364, 310, 312, 314, and 316 to generate a tunable notch response enables a chip or IC implementing the transmit path to be used in a variety of devices having different transmission requirements.

[0063] 3D illustrates a 5G communication frame structure 370 having 120 KHz subcarrier spacing. The frame structure 370 illustrates a 120 KHz subcarrier spacing (SCS) and one radio frame 371 having 10 subframes 372, which equals 80 slots and a duration of 10 milliseconds (ms). Each subframe 372 may include eight slots 374 and may be 1 ms in duration. Each slot 374 may include 14 communication symbols 376, each having a duration of 0.125 ms (125 μs), with each symbol being approximately 9 microseconds (μs). Other subcarrier spacings result in other communication symbol lengths. In an exemplary embodiment, each slot 374 may be selectively configured for a different transmission channel bandwidth. For example, a first slot 374-1 may be configured in a first uplink mode (UL mode 1), and a second slot 374-2 may be configured in a second uplink mode (UL mode 2). In a 5G communication frame structure 370 with 120 KHz subcarrier spacing, there are eight slots, although the number of slots in a subframe may vary based on the subcarrier spacing. In an exemplary embodiment, a first uplink mode, UL Mode 1, may be configured to transmit normal communication signals, in which case communication slot 374-1 is transmitted when the transmit path 330 is configured for narrow bandwidth signals to meet emission standards. In an exemplary embodiment, a second uplink mode, UL Mode 2, may be configured to transmit FMCW signals, such as radar signals, in which case communication slot 374-2 is transmitted when the transmit path 330 is configured for wide channel bandwidth. Although two uplink modes are shown in FIG. 3D as an example, other numbers of uplink modes are possible.

[0064] 3C , in an exemplary embodiment, one or more of matching networks 362, 364, 310, 312, 314, and 316 may be selectively configured to provide transmit path 330 with a channel bandwidth that can accommodate signals with different bandwidth requirements, such as wide and narrow bandwidths, and / or signals of different frequencies. In an exemplary embodiment, the transmit path bandwidth and / or frequency selection is adjustable or variable on a slot-by-slot basis. One or more of matching networks 362, 364, 310, 312, 314, and 316 may be selectively configured to generate a notch-tuned response over a first set of frequencies such that adjustment of the channel response is effective on one side or the other of a passband. For example, the notch tuning response of one of matching networks 362, 364, 310, 312, 314, and 316 may be selectively configured to tune the channel response at a low frequency side of the passband, and the notch tuning response of another of matching networks 362, 364, 310, 312, 314, and 316 may be selectively configured to tune the channel response at a high frequency side of the passband. In an exemplary embodiment, matching network 310 in FIG. 3C may be configured to tune the channel response at a low frequency side of passband 366 (the sloping lines on the left side of the passband represent various frequencies to which the notch response may be tuned), and matching network 312 in FIG. 3C may be configured to tune the channel response at a high frequency side of passband 366 (the sloping lines on the right side of the passband represent various frequencies to which the notch response may be tuned). In an exemplary embodiment, the tunable range of the response of transmit path 330 may be illustrated using channel response 368. By selectively adjusting one or more of the matching networks 362, 364, 310, 312, 314, and 316, various channel responses of the transmit path 330 may be enhanced to allow for the transmission of a wide variety of signals having different bandwidths and / or frequencies. Some matching networks may be set to have the same notch frequency to deepen the notch at that frequency.Some matching networks may be set to have slightly different notch frequencies to broaden the range of frequencies rejected around the passband. It should be appreciated that in some embodiments (e.g., those described below), the notch response of one or more matching networks (e.g., any of matching networks 362, 364, 310, 312, 314, and 316) may be nulled. Furthermore, one or more of matching networks 362, 364, 310, 312, 314, and 316 may be configured to have a notch response that is not tunable or has no notch response.

[0065] 4 is a graph 400 of a portion of a communications spectrum. Graph 400 includes a horizontal axis 402 that indicates increasing frequency to the right and a vertical axis 404 that indicates increasing signal energy upward. In an exemplary embodiment, vertical axis 404 is labeled "HB," which corresponds to "high band" energy, although exemplary embodiments of the notch filters described herein may be implemented in other communications bands.

[0066] Graph 400 also shows a communications band 410 that spans from about 37 GHz to about 43.5 GHz, and a communications band 420 that spans from about 47.2 GHz to about 48.2 GHz. Communications band 410 is also referred to interchangeably as the 37-43.5 GHz band, and communications band 420 is also referred to interchangeably as the 48 GHz band.

[0067] In an exemplary embodiment, various frequency plans for various communications bands may be implemented. An example local oscillator frequency for the 48 GHz passband 420 may be located at approximately 34 GHz and is designated using reference numeral 422. An example local oscillator frequency for the 37-43.5 GHz passband 410 may be located at approximately 26 GHz and is designated using reference numeral 426. However, a second harmonic of 26 GHz may appear at 52 GHz and is designated using reference numeral 412. In an exemplary embodiment, the 34 GHz LO signal 422 may cause interference to communications signals in the 37-43.5 GHz communications band and / or the 52 GHz 2LO signal 412 may cause interference to communications signals in the 48 GHz communications band. As described herein, exemplary embodiments of matching networks including tunable notch filters may be used to generate notch filter responses to minimize the adverse effects of a 34 GHz LO signal 422 on the 37-43.5 GHz communications band 410 without degrading communications signals in the 48 GHz communications band 420, and to generate notch filter responses to minimize the adverse effects of a 52 GHz 2LO signal 412 on the 48 GHz communications band 420 without degrading communications signals in the 37-43.5 GHz communications band 410. Exemplary embodiments of matching networks including tunable notch filters may be configured to generate multiple notch filter responses over a frequency range.

[0068] FIG. 5 illustrates an exemplary embodiment of a matching network including a single-ended tunable notch filter. The exemplary embodiment of the matching network including a tunable notch filter shown in FIG. 5 may be referred to as matching network 500. In the exemplary embodiment, matching network 500 is a single-ended implementation, where an input voltage signal Vin and an input current Iin represented by current source 501 are provided via node 502 and node 503. In the example shown in FIG. 5, node 502 is provided with a positive voltage (IN+), and node 503 is system ground (0V). Node 502 may also be referred to as an input node. Matching network 500 also includes resistor 506, capacitor 508, transformer 510, capacitor 514, and resistor 516. The output of matching network 500 is provided via nodes 518 and 519, where node 518 provides a voltage (OUT+) and node 519 is system ground (0V). Node 518 may also be referred to as the output node and may be considered the non-inverting output of transformer 510 .

[0069] In the exemplary embodiment, transformer 510 includes a primary side 511 and a secondary side 512. Primary side 511 and secondary side 512 are represented by inductances having an inductance L. In the exemplary embodiment, resistor 506 may be referred to as an input resistor, and capacitor 508 may be referred to as an input capacitor. In the exemplary embodiment, capacitor 514 may be referred to as an output capacitor, and resistor 516 may be referred to as an output resistor. Although primary side 511 and secondary side 512 are both represented with an inductance L, primary side 511 and secondary side 512 may have different sizes and / or shapes and / or different inductances. Similarly, input and output capacitors are represented by capacitance C, and the input and output capacitors may have different capacitances. Furthermore, input and output resistors are represented by resistance R, and the input and output resistors may have different resistances.

[0070] In an exemplary embodiment, capacitance 520 may be coupled through a transformer 510. In an exemplary embodiment, transformer 510 is configured such that its coupling coefficient k is greater than 0. That is, transformer 510 is considered to have positive magnetic coupling. Capacitance 520 may be an explicit capacitor coupled through a transformer or selectively coupled through a transformer, a fixed value capacitor, or an adjustable capacitance as shown in FIG. 5. In the single-ended embodiment shown in FIG. 5, the end of primary side 511 opposite capacitance 520 is coupled to system ground, and the end of secondary side 512 opposite capacitance 520 is coupled to system ground. These ends may be further connected.

[0071] The adjustable capacitance 520 is sometimes referred to as an interwinding capacitance because it is coupled between the primary 511 and secondary 512 of the transformer 510. In an exemplary embodiment, the adjustable capacitance 520 (C C ), along with inductance L of transformer 510 and capacitance C of capacitors 508 and 514, create a notch filter response between input node 502 and output node 518 without adding additional inductance around transformer 510. In other words, adjustable capacitance 520 and primary side 511 and secondary side 512 of transformer 510 may be used to create a notch filter response without other inductance. Adding adjustable capacitance 520 across transformer 510 allows the inductance of primary side 511 and secondary side 512 to be equal to or smaller than a transformer without adjustable capacitance 520, while creating an equal bandpass response and creating the notch filter response described herein.

[0072] In an exemplary embodiment, connecting an adjustable capacitance 520 across the transformer primary 511 and secondary 512, i.e., between the input at node 502 of the transformer and the non-inverting output at node 518 of the transformer (i.e., connecting in_plus (IN+) to out_plus (OUT+) and connecting in_minus (IN0) in this single-ended example to out_minus (OUT0) in this single-ended example), can cause a transmission zero to appear through the matching network 500. An ideal transmission zero is a frequency at which the transfer function of a linear two-port network has zero transmission when the poles and zeros are in ideal locations. A notch filter response is achieved when a signal cannot flow from the input to the output. This is achieved by creating a zero in the transfer function. In an implementation, the effect of the transmission zero depends on the electrical characteristics (e.g., Q) of the circuit and the locations of the poles and zeros, and the matching network 500 may exhibit a non-ideal zero transmission.

[0073] In an exemplary embodiment, coupling an adjustable capacitance 520 from the positive input of primary side 511 to the non-inverting output of secondary side 512 produces a notch filter response at output node 518 .

[0074] In an exemplary embodiment, coupling an adjustable capacitance 520 from the positive input of the primary 511 to the non-inverting output of the secondary 512 forms a micro-transformer-based matching network that includes a tunable notch filter and has low insertion loss at mmW frequencies.

[0075] FIG. 6 is a diagram illustrating an exemplary embodiment of a matching network including a differential tunable notch filter. The exemplary embodiment of the matching network including a tunable notch filter shown in FIG. 6 is referred to as matching network 600. In the exemplary embodiment, matching network 600 is a differential implementation, where an input voltage signal Vin and an input current Iin, represented by current source 601, are provided via nodes 602 and 603. In the example shown in FIG. 6, node 602 is provided with a positive voltage (IN+), and node 603 is provided with a negative voltage (IN−) of the differential input signal. Nodes 602 and 603 may also be referred to as input nodes. The matching network also includes resistor 606, capacitor 608, transformer 610, capacitor 614, and resistor 616. The output of matching network 600 is provided via nodes 618 and 619, where node 618 provides a positive voltage (OUT+) and node 619 provides a negative voltage (OUT−) of the differential output signal. Nodes 618 and 619 may also be referred to as output nodes. Node 618 may also be referred to as the non-inverting output of transformer 610.

[0076] In the exemplary embodiment, transformer 610 comprises a primary side 611 and a secondary side 612. Primary side 611 and secondary side 612 are represented by an inductance having an inductance L. In the exemplary embodiment, resistor 606 may be referred to as an input resistor, and capacitor 608 may be referred to as an input capacitor. In the exemplary embodiment, capacitor 614 may be referred to as an output capacitor, and resistor 616 may be referred to as an output resistor.

[0077] In an exemplary embodiment, capacitance 620 and capacitance 630 may be coupled through a transformer 610. In an exemplary embodiment, transformer 610 is configured such that its coupling coefficient k is greater than 0. That is, transformer 610 is considered to have positive magnetic coupling. Capacitance 620 and capacitance 630 may be explicit capacitors coupled through a transformer or selectively coupled through a transformer, may be fixed-value capacitors, or may be adjustable capacitances as shown in FIG. 6. Capacitances 620 and 630 may be interchangeably referred to as adjustable capacitances, inter-winding capacitances, and / or inter-winding adjustable capacitances.

[0078] Adjustable capacitance 620 and adjustable capacitance 630 are sometimes referred to as interwinding capacitances because they are coupled between primary 611 and secondary 612 of transformer 610. In the exemplary embodiment, adjustable capacitance 620 and adjustable capacitance 630, along with inductance L provided by transformer 610 and the capacitance of capacitors 608 and 614, create a notch filter response between input nodes 602 and 603 and output nodes 618 and 619, as explained above, without adding additional inductance around transformer 610. In the differential application shown in FIG. 6 and elsewhere, to create the same frequency response as the single-ended example shown in FIG. 5, the value of adjustable capacitance 620 is 2C C and the value of the adjustable capacitance 630 is 2C C may be.

[0079] In an exemplary embodiment, as described herein, a transmission zero can appear through matching network 600 by connecting adjustable capacitance 620 via transformer primary 611 and secondary 612, i.e., between the input of transformer at node 602 and the non-inverting output of transformer at node 618 (i.e., connecting in_plus (IN+) to out_plus (OUT+)), and connecting adjustable capacitance 630 via transformer primary 611 and secondary 612, i.e., between the input of transformer 610 at node 603 and the non-inverting output of transformer 610 at node 619 (i.e., connecting in_minus (IN-) to out_minus (OUT-)).

[0080] In an exemplary embodiment, coupling an adjustable capacitance 620 from the positive input of the primary side 611 to the non-inverting output of the secondary side 612 and coupling an adjustable capacitance 630 from the negative input of the primary side 611 to the non-inverting output of the secondary side 612 produces a notch filter response at output nodes 618 and 619.

[0081] In an exemplary embodiment, coupling an adjustable capacitance 620 from the positive input of the primary 611 to the non-inverting output of the secondary 612 and coupling an adjustable capacitance 630 from the negative input of the primary 611 to the non-inverting output of the secondary 612 forms a micro-transformer-based matching network that includes a tunable notch filter and has low insertion loss at mmW frequencies.

[0082] FIG. 7 is a diagram illustrating an exemplary embodiment of a matching network including a differential tunable notch filter. The exemplary embodiment of the matching network including a tunable notch filter shown in FIG. 7 is referred to as matching network 700. In the exemplary embodiment, matching network 700 is a differential implementation, where an input voltage signal Vin and an input current Iin, represented by current source 701, are provided via nodes 702 and 703. In the example shown in FIG. 7, node 702 is provided with a positive voltage (IN+), and node 703 is provided with a negative voltage (IN−) of the differential input signal. Nodes 702 and 703 may also be referred to as input nodes. The matching network also includes resistor 706, capacitor 708, transformer 710, capacitor 714, and resistor 716. The output of matching network 700 is provided via nodes 718 and 719, where node 718 provides a negative voltage (OUT−) and node 719 provides a positive voltage (OUT+) of the differential output signal. Nodes 718 and 719 are sometimes referred to as output nodes. Because transformer 710 is an inverting transformer, the output polarity of transformer 710 is inverted relative to the output polarity of transformer 610 in FIG.

[0083] In the exemplary embodiment, transformer 710 comprises a primary side 711 and a secondary side 712. Primary side 711 and secondary side 712 are represented by an inductance having an inductance L. In the exemplary embodiment, resistor 706 may be referred to as an input resistor, and capacitor 708 may be referred to as an input capacitor. In the exemplary embodiment, capacitor 714 may be referred to as an output capacitor, and resistor 716 may be referred to as an output resistor.

[0084] In an exemplary embodiment, capacitance 720 and capacitance 730 may be coupled through a transformer 710. In an exemplary embodiment, transformer 710 is configured such that its coupling coefficient k is less than or close to zero. That is, transformer 710 is considered to have negative magnetic coupling. Capacitance 720 and capacitance 730 may be explicit capacitors coupled through transformer 710 or selectively coupled through transformer 710, may be fixed value capacitors, or may be adjustable capacitances as shown in FIG. 7.

[0085] Adjustable capacitance 720 and adjustable capacitance 730 are referred to as interwinding capacitances because they are coupled between primary 711 and secondary 712 of transformer 710. In the exemplary embodiment, adjustable capacitance 720 and adjustable capacitance 730, along with inductance L and capacitances 708 and 714 of transformer 710, create a notch filter response between input nodes 702 and 703 and output nodes 718 and 719, as described above, without adding additional inductance around transformer 710.

[0086] In an exemplary embodiment, as described herein, a transmission zero can appear through matching network 700 by connecting an adjustable capacitor 720 via transformer primary 711 and secondary 712, i.e., between the input of the transformer at node 702 and the non-inverting output of the transformer at node 719 (i.e., connecting in_plus (IN+) to out_plus (OUT+)), and connecting an adjustable capacitor 730 via transformer primary 711 and secondary 712, i.e., between the input of transformer 710 at node 703 and the non-inverting output of transformer 710 at node 718 (i.e., connecting in_minus (IN-) to out_minus (OUT-)).

[0087] In an exemplary embodiment with negative magnetic coupling as shown in FIG. 7, where the transformer couples adjustable capacitance 720 from the positive input of primary side 711 to the non-inverting output of secondary side 712 and adjustable capacitance 730 from the negative input of primary side 711 to the non-inverting output of secondary side 712, a notch filter response is produced at output nodes 718 and 719.

[0088] In an exemplary embodiment, coupling an adjustable capacitance 720 from the positive input of the primary 711 to the non-inverting output of the secondary 712 and coupling an adjustable capacitance 730 from the negative input of the primary 711 to the non-inverting output of the secondary 712 forms a micro-transformer-based matching network that includes a tunable notch filter and has low insertion loss at mmW frequencies.

[0089] To effectively generate a notch filter response using a transformer with negative magnetic coupling, such as transformer 710, additional conductive traces may be used to couple adjustable capacitance 720 from the positive input of primary side 711 to the non-inverting output of secondary side 712, and adjustable capacitance 730 from the negative input of primary side 711 to the non-inverting output of secondary side 712.

[0090] The values ​​of some of the elements in Figures 6 and 7 are included in these figures for example purposes only. Those skilled in the art will understand that these values ​​are only examples and that elements may be implemented with values ​​other than those shown in Figures 6 and 7. Furthermore, multiple elements may be represented by the same letter (e.g., C, L, C). C ), however, multiple elements represented by the same letter may or may not all have the same value.

[0091] 8 is a diagram 800 illustrating an example filter response according to an example embodiment of the present disclosure. Diagram 800 includes a graph 801 having a horizontal axis 802 indicating frequency in GHz increasing to the right and a vertical axis 804 indicating signal energy or power in dB increasing upward.

[0092] In the exemplary embodiment, trace 808 corresponds to the frequency response of matching network 807 in which transformer 809 is implemented with a negative coupling coefficient and no interwinding capacitance. In the exemplary embodiment, matching network 807 has resistor R with a value of 1 kOhm, capacitor C with a value of 50 femtoFarads (fF), inductance L with a value of 733 picoHenries (pH), and a coupling coefficient k of 0.2, which results in the response shown by trace 808.

[0093] In the exemplary embodiment, trace 810 corresponds to the frequency response of matching network 650 (which has similar components but different values ​​as matching network 600 of FIG. 6 ) in which transformer 660 is implemented with a positive coupling coefficient and interwinding capacitances 670 and 680 are coupled through primary 661 and secondary 662 of transformer 660. Details of matching network 650, which is similar to matching network 600 of FIG. 6 , will not be repeated. However, in the exemplary matching network 650 shown in FIG. 8 , resistor R has a value of 1 kOhm, capacitor C has a value of 50 femtoFarads (fF), inductance L has a value of 640 picoHenries (pH), and interwinding capacitance C C The value of is 12 fF and the coupling coefficient k is 0.37, which results in the response shown by trace 810.

[0094] As shown by graph 801, at a frequency of 33.20 GHz (m7), which may be the 2LO frequency for the communications band, the filter performance of matching network 650 (trace 810) is improved by 8.1 dB relative to matching network 807 (trace 808). In this manner, a notch response can be created above the frequency band of interest (out-of-band) (e.g., the communications band spanning approximately 24 GHz (m4) to 30 GHz (m5)) to improve signal rejection at 33.20 GHz in this example.

[0095] 9 is a diagram 900 illustrating an example filter response according to an example embodiment of the present disclosure. Diagram 900 includes a graph 901 having a horizontal axis 902 indicating frequency in GHz increasing to the right and a vertical axis 904 indicating signal energy or power in dB increasing upward.

[0096] In the exemplary embodiment, trace 908 corresponds to the frequency response of matching network 907 in which transformer 909 is implemented with a negative coupling coefficient and no interwinding capacitance. In the exemplary embodiment, matching network 907 has resistor R with a value of 1 kOhm, capacitor C with a value of 50 femtoFarads (fF), inductance L with a value of 733 picoHenries (pH), and a coupling coefficient k of 0.2, which results in the response shown by trace 908.

[0097] In the exemplary embodiment, trace 910 corresponds to the frequency response of matching network 650 (similar to matching network 650 in FIG. 8 ) in which transformer 660 is implemented with a positive coupling coefficient and interwinding capacitances 670 and 680 are coupled through primary side 661 and secondary side 662 of transformer 660. The details of matching network 650 are similar to matching network 600 in FIG. 6 and will not be repeated. The response of matching network 650 is similar to that shown in FIG. 8 and is reproduced in FIG. 9 for illustrative purposes (shown by trace 910).

[0098] In the exemplary embodiment, trace 912 corresponds to the frequency response of matching network 655 (having similar components but different values ​​as matching network 650 of FIGS. 8 and 9 ) in which transformer 665 is implemented with a positive coupling coefficient and interwinding capacitances 675 and 685 are coupled through primary 667 and secondary 668 of transformer 665. Details of matching network 655, which is similar to matching network 650, will not be repeated. However, in the exemplary matching network 655 shown in FIG. 9 , resistor R has a value of 1 kOhm, capacitor C has a value of 50 femtoFarads (fF), inductance L has a value of 482 picoHenries (pH), and interwinding capacitance CC The value of is 37 fF and the coupling coefficient k is 0.25, which results in the response shown by trace 912.

[0099] As shown by graph 901, at a frequency of 33.20 GHz (m7), which may be the 2LO frequency for the communications band, the filter performance (signal rejection) of matching network 650 (trace 910) is improved by 8.1 dB relative to matching network 907 (trace 908). Additionally, at a frequency of 21.50 GHz (m6), which may be the LO frequency for the communications band, the filter performance (signal rejection) of matching network 655 (trace 912) is improved by 13.8 dB relative to matching network 907 (trace 908). In this manner, a notch response can be created above and / or below the frequency band of interest (e.g., approximately 24 GHz (m4) to 30 GHz (m5)) to improve signal rejection at one or more frequencies.

[0100] 10 is a diagram 1000 illustrating an example filter response according to an example embodiment of the present disclosure. Diagram 1000 includes a graph 1001 having a horizontal axis 1002 indicating frequency in GHz increasing to the right and a vertical axis 1004 indicating signal energy or power in dB increasing upward.

[0101] Graph 1001 shows the interwinding capacitance C in the range of approximately 10 fF to approximately 20 fF. C 10 shows a series of traces 1062, 1063, 1064, 1065, 1066, and 1067 illustrating exemplary filter responses corresponding to values ​​of

[0102] For example, matching network 1050 (having similar components to matching network 650 of FIG. 8 but with different values) may comprise a transformer 1010 implemented with a positive coupling coefficient and may include interwinding adjustable capacitances 1020 and 1030 coupled through the primary 1011 and secondary 1012 of transformer 1010. Details of matching network 1050, which are similar to matching network 600 of FIG. 6, will not be repeated. In the exemplary matching network 1050 shown in FIG. 10, the value of resistor R is 1 kOhm, the value of capacitor C is 50 femtoFarads (fF), the value of inductance L is 640 picoHenries (pH), and the interwinding capacitance C C The value of C may range, for example, from about 10 fF to about 20 fF, and the coupling coefficient k is 0.37, which results in the response shown by traces 1062, 1063, 1064, 1065, 1066, and 1067. For example, trace 1067 shows that C C 3C )。 Trace 1050 may be implemented using a capacitor bank, a tunable transistor device, or other techniques. In an exemplary embodiment, matching network 1050 may be implemented to generate a selectable notch response at the high frequency side of passband 366 (FIG. 3C ).

[0103] 11 is a diagram 1100 illustrating an example filter response according to an example embodiment of the present disclosure. Diagram 1100 includes a graph 1101 having a horizontal axis 1102 indicating frequency in GHz increasing to the right and a vertical axis 1104 indicating signal energy or power in dB increasing upward.

[0104] Graph 1101 shows the interwinding capacitance C in the range of approximately 25 fF to approximately 35 fF. C11 shows a series of traces 1162, 1163, 1164, 1165, 1166, and 1167 illustrating exemplary filter responses corresponding to values ​​of .times. ...

[0105] For example, matching network 1150 (having similar components to matching network 650 of FIG. 8 but with different values) may comprise a transformer 1110 implemented with a positive coupling coefficient and may include interwinding capacitances 1120 and 1130 coupled through a primary 1111 and a secondary 1112 of transformer 1110. Details of matching network 1150, which is similar to matching network 600 of FIG. 6, will not be repeated. In the example matching network 1150 shown in FIG. 11, the value of resistor R is 1 kOhm, the value of capacitor C is 50 femtoFarads (fF), the value of inductance L is 482 picoHenries (pH), and the interwinding capacitance C C The value of may range, for example, from about 25 fF to about 35 fF, with a coupling coefficient k of 0.37, which results in the response shown by traces 1162, 1163, 1164, 1165, 1166, and 1167. For example, trace 1167 shows a C C Trace 1162 shows the notch response when C is 25fF. C 3C shows a notch response when .lambda. is 35 fF. The capacitance of the inter-winding adjustable capacitances 1120 and 1130 may be controlled by a signal from the data processor 210 of FIG. 2A or 2B. The inter-winding adjustable capacitances 1120 and 1130 may be implemented using a capacitor bank, adjustable transistor devices, or other techniques. In an exemplary embodiment, the matching network 1150 may be implemented to generate a selectable notch response on the low-frequency side of the passband 366 (FIG. 3C).

[0106] FIG. 12 is a diagram 1200 illustrating an example embodiment of a matching network in accordance with an example embodiment of the present disclosure.

[0107] For example, matching network 1250 (having similar components to matching network 600 of FIG. 6 and matching network 650 of FIG. 8 but with different values) may comprise a transformer 1210 implemented with a positive coupling coefficient and may include interwinding capacitances 1220 and 1230 coupled through primary side 1211 and secondary side 1212 of transformer 1210. Details of matching network 1250, similar to matching network 600 of FIG. 6, will not be repeated. The exemplary matching network 1250 shown in FIG. 12 illustrates a single-ended-to-differential embodiment of matching network 600 of FIG. 6. In the exemplary embodiment shown in FIG. 12, input node 1203 (IN−) is coupled to system ground, thereby providing a single-ended, low-impedance path to ground for both common and differential modes. The capacitances of interwinding adjustable capacitances 1220 and 1230 may be controlled by signals from data processor 210 of FIG. 2A or 2B. The inter-winding adjustable capacitances 1220 and 1230 may be implemented using capacitor banks, adjustable transistor devices, or other technologies.

[0108] Also shown is another exemplary embodiment of matching network 1270. Matching network 1270 is a differential matching network, and the output side of the differential matching network includes capacitors 1274a and 1274b, each having a value 2C, and resistors 1276a and 1276b, each having a resistance R / 2. The center node between capacitors 1274a and 1274b and the center node between resistors 1276a and 1276b are coupled to system ground, so that the output side maintains a load impedance in differential mode, especially when a differential amplifier (not shown) is used as the load.

[0109] The capacitances of the inter-winding adjustable capacitances 1280 and 1290 may be controlled by signals from the data processor 210 of Figure 2A or 2B. The inter-winding adjustable capacitances 1280 and 1290 may be implemented using capacitor banks, adjustable transistor devices, or other techniques. The inter-winding capacitances 1280 and 1290 may be coupled through the primary 1261 and secondary 1262 of a transformer 1260, which may be implemented with a positive coupling coefficient.

[0110] The values ​​of some of the elements in Figures 12A and 12B are included in these figures for example purposes only. Those skilled in the art will understand that these values ​​are merely examples and that elements may be implemented with values ​​other than those shown in Figures 12A and 12B. Furthermore, multiple elements may be represented by the same letter (e.g., C, L, C). C ), however, multiple elements represented by the same letter may or may not all have the same value.

[0111] 13 is a diagram 1300 illustrating an example on-chip implementation of a transformer 1310. The transformer 1310 includes a primary side 1311 and a secondary side 1312 and is an example of an inverting transformer with a coupling coefficient k less than 0 (k<0).

[0112] 14 is a diagram 1400 illustrating an example on-chip implementation of a transformer 1410 according to an exemplary embodiment of the present disclosure. The transformer 1410 includes a primary side 1411 and a secondary side 1412 and is an example of a non-inverting transformer with a coupling coefficient k greater than 0 (k>0).

[0113] In the exemplary embodiment, the transformer 1410 is an example of a differential implementation, with the transformer primary side 1411 having an input node 1402 (IN+) and an input node 1403 (IN-), and the secondary side 1412 having an output node 1418 (OUT+) and an output node 1419 (OUT-).

[0114] The example transformer 1410 also includes explicit inter-winding adjustable capacitances 1420 and 1430. The transformer 1410 may be implemented in accordance with example embodiments of matching networks described herein.

[0115] In an exemplary embodiment, inter-winding adjustable capacitance 1420 may be coupled between the input (IN+) at node 1402 of transformer 1410 and the non-inverting output (OUT+) at node 1418 (i.e., in_plus (IN+) is connected to out_plus (OUT+)), and inter-winding adjustable capacitance 1430 may be coupled between the input (IN-) at node 1403 of transformer 1410 and the inverting output (OUT-) at node 1419 (i.e., in_minus (IN-) is connected to out_minus (OUT-)).

[0116] 15 is a diagram 1500 illustrating an example on-chip implementation of a transformer 1510 according to an exemplary embodiment of the present disclosure. The transformer 1510 includes a primary side 1511 and a secondary side 1512 and is an example of a non-inverting transformer with a coupling coefficient k greater than 0 (k>0).

[0117] Transformer 1510 is similar to transformer 1410 of FIG. 14, but transformer 1510 also includes segments 1582 and 1584 configured to provide an output of transformer 1510 to one side and an opposite side of an input of transformer 1510.

[0118] In the exemplary embodiment, the transformer 1510 is an example of a differential implementation, with the transformer primary side 1511 having an input node 1502 (IN+) and an input node 1503 (IN-), and the secondary side 1512 having an output node 1518 (OUT+) and an output node 1519 (OUT-).

[0119] The example transformer 1510 also includes explicit inter-winding adjustable capacitances 1520 and 1530. The transformer 1510 may be implemented in accordance with example embodiments of matching networks described herein.

[0120] In an exemplary embodiment, an inter-winding adjustable capacitance 1520 may be coupled between the input (IN+) at node 1502 of the transformer 1510 and the non-inverting output (OUT+) at node 1518 (i.e., in_plus (IN+) is connected to out_plus (OUT+)), and an inter-winding adjustable capacitance 1530 may be coupled between the input (IN-) at node 1503 of the transformer 1510 and the inverting output (OUT-) at node 1519 (i.e., in_minus (IN-) is connected to out_minus (OUT-)).

[0121] 16 is a diagram 1600 illustrating an example on-chip implementation of a transformer 1610 according to an exemplary embodiment of the present disclosure. The transformer 1610 includes a primary side 1611 and a secondary side 1612 and is an example of an inverting transformer with a coupling coefficient k less than 0 (k<0).

[0122] In the exemplary embodiment, the transformer 1610 is an example of a differential implementation, with the transformer primary side 1611 having an input node 1602 (IN+) and an input node 1603 (IN-), and the secondary side 1612 having an output node 1618 (OUT+) and an output node 1619 (OUT-).

[0123] The example transformer 1610 also includes explicit inter-winding adjustable capacitances 1620 and 1630. The transformer 1610 may be implemented in accordance with example embodiments of matching networks described herein.

[0124] In an exemplary embodiment, because transformer 1610 is an inverting transformer, inter-winding adjustable capacitance 1620 may be coupled between the input (IN−) at node 1603 and the inverting output (OUT−) at node 1619 of transformer 1610 (i.e., in_minus (IN−) is connected to out_minus (OUT−)), and inter-winding adjustable capacitance 1630 may be coupled between the input (IN+) at node 1602 and the non-inverting output (OUT+) at node 1618 of transformer 1610 (i.e., in_plus (IN+) is connected to out_plus (OUT+)). In this manner, inter-winding adjustable capacitances 1620 and 1630 can be implemented using an inverting transformer and still produce the desired notch filter response as described herein.

[0125] To effectively generate a notch filter response using a transformer with negative magnetic coupling, such as transformer 1610, additional conductive traces may be used to couple adjustable capacitance 1620 from the negative input of primary side 1611 to the inverting output of secondary side 1612, and adjustable capacitance 1630 from the positive input of primary side 1611 to the non-inverting output of secondary side 1612.

[0126] 17 is a diagram 1700 illustrating an exemplary on-chip implementation of a transformer according to an exemplary embodiment of the present disclosure. The transformer 1710 is implemented as a multi-turn transformer configured to have negative magnetic coupling (k<0).

[0127] By utilizing multi-turn inductances such as primary 1711 and secondary 1712, the connection between Vin+ / Vo+ and Vin− / Vo− can be realized without affecting the transformer design. For example, transformer 1710 may be constructed using any advanced nanometer-scale CMOS (complementary metal-oxide semiconductor) technology and may operate at millimeter-wave frequencies, for example, 24 GHz or higher. Using multi-turn inductors such as the inductors on primary 1711 and secondary 1712 may reduce the amount of chip area, and such a configuration may allow for adequate isolation from other nearby electromagnetic structures.

[0128] In the exemplary embodiment, transformer 1710 shows a primary side 1711 and a secondary side 1712, and also shows an inter-winding adjustable capacitance 1720 coupling a positive input 1702 of primary side 1711 to a positive output 1718 of secondary side 1712 and an inter-winding adjustable capacitance 1730 coupling a negative input 1703 of primary side 1711 to a negative output 1719 of secondary side 1712.

[0129] The bottom of drawing 1700 shows a schematic representation of a transformer 1710, with the positive signal path shown using a solid line and the negative signal path shown using a dotted line. In an exemplary embodiment, coupling the input and output of the transformer results in parasitic inductance and capacitance. In the implementation shown in FIG. 17 , the routing of the transformer inductance may be used to reduce or minimize parasitic inductance by coupling inter-winding adjustable capacitance 1720 to the positive signal path of the primary side 1711 and secondary side 1712, and inter-winding adjustable capacitance 1730 to the negative signal path of the primary side 1711 and secondary side 1712, as shown, thereby eliminating additional parasitic capacitance. In this manner, inter-winding adjustable capacitance 1720 and inter-winding adjustable capacitance 1730 may be included without additional connections that may introduce additional parasitics. In some aspects, the first input of the first winding is coupled to the first output of the second winding when a first point on the first winding, which is closer to the first input of the first winding than the second input of the first winding when measured along the path of the first winding, is coupled to a second point on the second winding, which is closer to the first output of the second winding than the second output of the second winding when measured along the path of the second winding.

[0130] 18 is a diagram 1800 illustrating an example schematic of an adjustable capacitance circuit for use with an on-chip transformer according to an example embodiment of the present disclosure. In the example embodiment, a PMOS switch 1822 and a single capacitor 1824 are used to adjust the desired capacitance 2C C Similarly, a PMOS switch 1823 and a single capacitor 1825 may be used to generate the desired capacitance 2CC Interwinding capacitance 1830 may be created by generating a capacitance 2C when PMOS switch 1822 and PMOS switch 1823 are “on.” Multiple instances of interwinding capacitance 1820 and interwinding capacitance 1830 may be implemented to create a range of capacitance values. The parasitic capacitances of PMOS switch 1822 and PMOS switch 1823 may be absorbed into the filter termination and respective interwinding capacitances 1820 and 1830, such that PMOS switch 1822 and PMOS switch 1823 may be considered ideal, at least to first order. When each of PMOS switch 1822 and PMOS switch 1823 is “on,” the interwinding capacitance 2C C is enabled. When each of PMOS switch 1822 and PMOS switch 1823 is "off," the interwinding capacitance has substantially no effect on the circuit and the notch substantially disappears from the frequency response. In an exemplary embodiment, PMOS switch 1822 and PMOS switch 1823 may be controlled by an enable (EN) signal, which may be provided by data processor 210 of FIG. 2A or 2B.

[0131] 19 is a diagram 1900 illustrating an example schematic of an adjustable capacitance circuit for use with an on-chip transformer according to an example embodiment of the present disclosure. In the example embodiment, an NMOS switch 1922, a first capacitor 1924, and a second capacitor 1926 are used to adjust the desired capacitance 2C C Similarly, an NMOS switch 1923, a first capacitor 1925, and a second capacitor 1927 may be used to generate a desired capacitance 2C CInterwinding capacitance 1930 may be generated by generating a capacitance 2Cc. Multiple instances of interwinding capacitance 1920 and interwinding capacitance 1930 may be implemented to generate a range of capacitance values. In an exemplary embodiment, NMOS switch 1922 and NMOS switch 1923 may be controlled by an enable (EN) signal, which may be provided by data processor 210 of FIG. 2A or 2B. In an exemplary embodiment, the drain and source of each of NMOS switch 1922 and NMOS switch 1923 may be biased by an enable bar (EN_bar) signal (the complement of EN), which may also be provided by data processor 210 of FIG. 2A or 2B. When NMOS switches 1922 and 1923 are “on,” interwinding capacitances 1920 and 1930, each having a capacitance value of 2Cc, are enabled. When NMOS switches 1922 and 1923 are "off," the interwinding capacitance plays no substantial role and the notch substantially disappears from the frequency response.

[0132] The capacitors 1820, 1830, 1920, 1930 shown in Figures 18 and 19 may be configured to be adjustable or variable in any number of different configurations. In the configurations shown, any number of instances may be implemented. In some embodiments, a single instance is implemented. In other embodiments, more instances than are shown are implemented. Such capacitors may be configured to achieve coarse tuning, fine tuning, or in some embodiments may be fixed or may only be able to be switched on or off.

[0133] 20 is a diagram 2000 illustrating an example on-chip transformer according to an example embodiment of the present disclosure. The transformer 2010 is implemented as a multi-turn transformer configured to have positive magnetic coupling (k>0).

[0134] By utilizing multi-turn inductances such as primary 2011 and secondary 2012, the connection between Vin+ / Vo+ and Vin− / Vo− can be realized without affecting the transformer design. For example, transformer 2010 may be constructed using any advanced nanometer-scale CMOS (complementary metal-oxide semiconductor) technology and may operate at millimeter-wave frequencies, for example, 24 GHz or greater. Using multi-turn inductors such as the inductors on primary 2011 and secondary 2012 may reduce the amount of chip area, and such a configuration may allow for adequate isolation from other nearby electromagnetic structures.

[0135] In the exemplary embodiment, transformer 2010 shows a primary side 2011 and a secondary side 2012, and also shows an inter-winding adjustable capacitance 2020 coupling a positive input 2002 of primary side 2011 to a positive output 2018 of secondary side 2012 and an inter-winding adjustable capacitance 2030 coupling a negative input 2003 of primary side 2011 to a negative output 2019 of secondary side 2012.

[0136] 21 is a flowchart 2100 illustrating an example of the operation of a method for generating a notch filter response using a matching network that includes a tunable notch filter. The blocks in method 2100 may be performed in the order shown or out of the order shown, and in some embodiments may be performed at least partially in parallel.

[0137] In block 2102, a signal is transmitted through a transformer having interwinding capacitance across its primary and secondary sides. In an exemplary single-ended embodiment, interwinding adjustable capacitance 520 may be coupled between an input of primary side 511 and a non-inverting output of secondary side 512 of transformer 510. In an exemplary differential embodiment, interwinding adjustable capacitances 620 and 630 may be coupled through the positive and negative inputs of primary side 611 and corresponding non-inverting and inverting outputs of secondary side 612 of transformer 610. In an exemplary embodiment, interwinding adjustable capacitance 520 may be selectively coupled between the input of primary side 511 and the non-inverting output of secondary side 512 of transformer 510, or interwinding adjustable capacitances 620 and 630 may be selectively coupled through the positive and negative inputs of primary side 611 and corresponding non-inverting and inverting outputs of secondary side 612 of transformer 610.

[0138] At block 2104, the value of the interwinding capacitance may be adjusted to determine the notch filter response. In an exemplary embodiment, the capacitance value of interwinding adjustable capacitance 520 or the capacitance values ​​of interwinding adjustable capacitances 620 and 630 may be adjusted to produce a notch filter response at a desired frequency. For example, such adjustment may be made by selectively coupling one or more (explicit) capacitances between the primary and secondary sides of the transformer.

[0139] 22 is a functional block diagram of an apparatus 2200 for generating a notch filter response. The apparatus 2200 comprises a means 2202 for communicating a signal through a transformer having interwinding capacitance. In some embodiments, the means 2202 for communicating a signal through a transformer having interwinding capacitance can be configured to perform one or more of the functions described in operational block 2102 of method 2100 ( FIG. 21 ). In an exemplary embodiment, the means 2202 for communicating a signal through a transformer having interwinding capacitance may include an interwinding adjustable capacitance 520 between an input of a primary side 511 and a non-inverting output of a secondary side 512 of a transformer 510, or interwinding adjustable capacitances 620 and 630 via respective positive and negative inputs of a primary side 611 and non-inverting and inverting outputs of a secondary side 612 of a transformer 610.

[0140] Apparatus 2200 also comprises means 2204 for determining a notch filter response. In some embodiments, means 2204 for determining a notch filter response can be configured to perform one or more of the functions described in operational block 2104 of method 2100 ( FIG. 21 ). In an exemplary embodiment, means 2204 for determining a notch filter response may comprise one or more elements configured to adjust the capacitance value of inter-winding adjustable capacitance 520 or the capacitance values ​​of inter-winding adjustable capacitances 620 and 630 to determine a notch filter response at a desired frequency. For example, means for determining may include elements such as data processor 210 of FIG. 2A or 2B and / or switches or portions of adjustable capacitance under the control of data processor 210.

[0141] Exemplary embodiments are described in the following numbered clauses.

[0142] 1. A filter circuit comprising:

[0143] a matching network having resistive and capacitive elements;

[0144] a transformer in a matching network, the transformer having a primary side and a secondary side, the transformer having at least one interwinding capacitance coupled from an input on the primary side to a non-inverting output on the secondary side.

[0145] 2. A filter circuit as described in clause 1, wherein the filter circuit produces a notch response outside the transmit band using inductance provided solely by the inductance of the transformer.

[0146] 3. A filter circuit as described in any one of clauses 1 to 2, wherein the filter circuit is single-ended.

[0147] 4. A filter circuit as described in any one of clauses 1 to 3, wherein at least one interwinding capacitance has an adjustable capacitance configured to tune the frequency response of the filter circuit.

[0148] 5. A filter circuit as described in any one of clauses 1 to 4, wherein the greater the capacitance of the at least one interwinding capacitance, the lower the notch frequency of the filter circuit.

[0149] 6. A filter circuit according to any one of clauses 1 to 5, wherein the filter circuit is differential and the transformer includes an additional interwinding capacitance coupled between a negative input node (input-) on the primary side and a corresponding negative output node (inverting output) on the secondary side.

[0150] 7. A filter circuit as described in any one of clauses 1 to 6, wherein the notch response occurs at millimeter wave (mmW) frequencies.

[0151] 8. A filter circuit as described in any one of clauses 1 to 7, wherein the filter circuit produces an adjustable notch response at one of the low and high frequency sides of the transmit band.

[0152] 9. The filter circuit of clause 8, wherein the adjustable notch response is selectable to determine the channel response of a transmit path constituting a transmit path for transmitting a narrow bandwidth signal and a wide bandwidth signal in different communication slots in the same communication subframe.

[0153] 10. A filter circuit as described in any one of clauses 2 to 9, wherein the filter circuit comprises multiple matching networks coupled in series to achieve multiple notch responses.

[0154] 11. The filter circuit of any one of clauses 10, wherein the multiple matching networks are implemented between different amplifiers coupled in series with each other and coupled in series to the multiple matching networks.

[0155] 12. A filter circuit as described in any one of clauses 1 to 11, wherein the filter circuit is coupled between a phase shifter and an antenna in a phased array.

[0156] 13. A method for forming a notch filter response using a matching network including a tunable notch filter, comprising:

[0157] transmitting a signal through a transformer having an interwinding capacitance across an input on a primary side of the transformer and a non-inverting output on a secondary side of the transformer;

[0158] and adjusting the value of the interwinding capacitance to determine the notch filter response.

[0159] 14. The method of clause 13, wherein the filter uses interwinding capacitance and inductance of a transformer to create a notch response outside the transmit band.

[0160] 15. The method of any one of clauses 13 to 14, wherein the filter is single-ended.

[0161] 16. The method of any one of clauses 13 to 15, further comprising the step of implementing the interwinding capacitance using an adjustable capacitance configured to tune the frequency response of the filter.

[0162] 17. The method of any one of clauses 13 to 16, wherein the greater the interwinding capacitance, the lower the notch frequency.

[0163] 18. The method of any one of clauses 13 to 17, wherein the notch filter response occurs at millimeter wave (mmW) frequencies.

[0164] 19. The method of any one of clauses 13 to 18, further comprising generating an adjustable notch response at one of the low and high frequency sides of the passband.

[0165] 20. The method of clause 19, further comprising selecting an adjustable notch response to determine the channel response of a transmission path constituting the transmission path for transmitting a narrow bandwidth signal and a wide bandwidth signal in different communication slots in the same communication subframe.

[0166] twenty one.

[0167] means for transmitting a signal through the transformer having an interwinding capacitance across an input on the primary side of the transformer and a non-inverting output on the secondary side of the transformer;

[0168] and means for adjusting the value of the interwinding capacitance to determine the notch filter response.

[0169] 22. The device of clause 21, further comprising means for generating a notch response outside the transmission band using inductance provided solely by interwinding capacitance and transformer inductance.

[0170] 23. A device according to any one of clauses 21 to 22, further comprising means for realising the interwinding capacitance using an adjustable capacitance configured to tune the frequency response of the filter.

[0171] 24. A device as claimed in any one of clauses 21 to 23, wherein the greater the interwinding capacitance, the lower the notch frequency.

[0172] 25. A device according to any one of clauses 21 to 24, further comprising means for generating an adjustable notch response at one of the low and high frequency sides of the passband.

[0173] 26. The device of any one of clauses 21 to 25, further comprising means for configuring transmission paths for transmitting narrow bandwidth signals and wide bandwidth signals in different communication slots in the same communication subframe.

[0174] The circuit architectures described herein may be implemented on one or more ICs, analog ICs, RFICs, mixed-signal ICs, ASICs, printed circuit boards (PCBs), electronic devices, etc. The circuit architectures described herein may also be fabricated using various IC process technologies, such as complementary metal-oxide semiconductor (CMOS), N-channel MOS (NMOS), P-channel MOS (PMOS), bipolar junction transistor (BJT), bipolar CMOS (BiCMOS), silicon germanium (SiGe), gallium arsenide (GaAs), heterojunction bipolar transistor (HBT), high electron mobility transistor (HEMT), silicon-on-insulator (SOI), etc.

[0175] An apparatus implementing the circuits described herein may be a standalone device or may be part of a larger device, which may be (i) a standalone IC, (ii) a set of one or more ICs that may include memory ICs for storing data and / or instructions, (iii) an RFIC such as an RF receiver (RFR) or an RF transmitter / receiver (RTR), (iv) an ASIC such as a mobile station modem (MSM), (v) a module that may be embedded within another device, (vi) a receiver, mobile phone, wireless device, handset, or mobile unit, (vii), etc.

[0176] As used herein, terms such as “component,” “database,” “module,” and “system” refer to a computer-related entity: hardware, firmware, a combination of hardware and software, software, or software in execution. For example, a component may be, but is not limited to, a process running on a processor, a processor, an object, an executable, a thread of execution, a program, and / or a computer. By way of example, both an application running on a computing device and the computing device may be a component. One or more components may reside within a process and / or thread of execution, and components may be localized on one computer and / or distributed between two or more computers. Furthermore, these components may execute from various computer-readable media having various data structures stored therein. Components may communicate with local and / or remote processes, such as by pursuance of signals carrying one or more data packets (e.g., data from one component interacting with another component in a local system, a distributed system, and / or across a network such as the Internet with other systems via signals).

[0177] While selected embodiments have been illustrated and described in detail, it will be understood that various substitutions and modifications can be made in the embodiments without departing from the spirit and scope of the invention as defined by the following claims. [Explanation of symbols]

[0178] 110 Wireless Devices 120 Wireless Communication Devices 130 base station 132 Base Station 134 Broadcasting Stations 140 System Controller 150 satellites 200 Wireless Devices 210 Data Processor 214a, 214b digital-to-analog converter 220 Transceiver 230 Transmitter 232a, 232b low-pass filters 240 Upconverter 241a, 241b mixer 242 filters 244 Power Amplifier 246 Duplexer 248 Antenna 250 receiver 252 Low Noise Amplifier 254 filters 260 Down Converter 261a, 261b Downconversion mixers 264a, 264b low-pass filters 275 upconverter 276 Upconversion Mixer 277 TX RF LO Signal Generator 278 Addition Function 279 RX RF LO Signal Generator 280 RX LO Signal Generator 281 Phase Shift Circuit 282 PLL 286 Downconversion Mixer 283 Phase Shifter 284 Variable Gain Amplifier 285 Down Converter 286 Phased Array Elements 287 Phased Array Elements 288 Splitter / Combiner 290 TX LO Signal Generator 291 I / Q generation function 292 Phase Locked Loop 293TX VGA 294 connections 295RX VGA 296 processors 297 Block Diagram 298 memory 299 Software 300 Send Chain 302 Mixer 304 differential connection 306 Differential Connection 310, 312, 314, 316 Matching network 320, 322, 324 Power amplifier stage 330 Transmission Route 331 Phase Shifter 332 Primary side 333 Secondary side 334 Primary side 335 Secondary side 336 Primary side 337 Secondary side 338 Primary side 339 Secondary side 342 Antenna 344 Antenna Elements 348 Array 350 Transmission Chain 352 Variable Gain Amplifier 360 Block Diagram 362 Matching Network 364 Matching Network 366 passband 368 Channel Response 370 frame structure 371 radio frames 372 subframe 374 Slots 376 Slots 400 graphs 402 horizontal axis 404 Vertical axis 410 communication bandwidth 412 52GHz 2LQ signal 420 communication bandwidth 422 34GHz LO signal 500 Matching Network 502 nodes 503 nodes 506 resistor 508 Capacitor 510 Transformer 511 Primary side 512 Secondary side 514 Capacitor 516 resistor 518 nodes 520 capacity 600 Matching Network 602 nodes 603 nodes 606 resistor 608 Capacitor 610 Transformer 611 Primary side 612 Secondary side 614 Capacitor 616 resistor 618 nodes 619 nodes 620 capacity 630 capacity 650 Matching Network 655 Matching Network 660 Transformer 661 Primary side 662 Secondary side 665 Transformer 667 Primary side 668 Secondary side 670 capacity 675 capacity 680 capacity 685 capacity 700 Matching Network 701 Current source 702 nodes 703 nodes 706 resistor 708 Capacitor 710 Transformer 711 Primary side 712 Secondary side 714 Capacitor 716 resistor 718 nodes 719 nodes 720 adjustable capacity 730 capacity 800 Figures 801 graphs 802 horizontal axis 804 vertical axis 807 Matching Network 808 Trace 809 Transformer 900 Figures 901 graph 902 horizontal axis 904 Vertical axis 907 Matching Network 908 Trace 909 Transformer 910 Trace 912 Trace 1000 Figures 1002 horizontal axis 1004 Vertical axis 1011 Primary side 1012 Secondary side 1020 adjustable capacity 1030 adjustable capacity 1050 Matching Network 1105 Matching Network 1062, 1063, 1064, 1065, 1066, 1067 Trace 1100 Figures 1102 horizontal axis 1104 Vertical axis 1111 Primary side 1112 Secondary side 1120 Interwinding capacitance 1130 Interwinding capacitance 1150 Matching Network 1162, 1163, 1164, 1165, 1166, 1167 Trace 1200 Figures 1203 Input Node 1210 Transformer 1211 Primary side 1212 Secondary side 1220 Interwinding capacitance 1230 Interwinding capacitance 1250 Matching Network 1260 Transformer 1261 Primary side 1262 Secondary side 1270 Matching Network 1274a, 1274b capacity 1276a, 1276b resistor 1280 Interwinding adjustable capacitance 1290 Interwinding adjustable capacitance 1300 Figures 1310 Transformer 1311 Primary side 1312 Secondary side 1400 Figures 1402 nodes 1403 Input Node 1410 Transformer 1411 Primary side 1412 Secondary side 1419 nodes 1420 Interwinding adjustable capacitance 1430 Interwinding adjustable capacitance 1500 Figures 1502 nodes 1503 Input Nodes 1510 Transformer 1511 Primary side 1512 Secondary side 1518 nodes 1519 nodes 1520 Interwinding adjustable capacitance 1530 Interwinding adjustable capacitance 1582 segments 1584 segments 1600 Figures 1602 Input Node 1603 Input Node 1610 Transformer 1611 Primary side 1612 Secondary side 1618 Output Nodes 1619 Output Node 1620 Interwinding adjustable capacitance 1630 Interwinding adjustable capacitance 1700 Figures 1702 positive input 1710 Transformer 1711 Primary side 1712 Secondary side 1718 positive output 1719 Negative Output 1720 Interwinding adjustable capacitance 1730 Interwinding adjustable capacitance 1800 Figures 1820 Interwinding capacitance 1822 PMOS switch 1823 PMOS switch 1824 capacitor 1825 capacitor 1830 Interwinding capacitance 1900 Figure 1920 Interwinding capacitance 1922 NMOS switch 1923 NMOS switch 1924 First Capacitor 1925 First Capacitor 1926 Second Capacitor 1927 Second Capacitor 1930 Interwinding capacitance 2000 Figure 2010 Transformer 2011 Primary Side 2012 Secondary side 2018 Positive Output 2029 negative output 2020 Transformer 2030 Interwinding adjustable capacitance 2100 Flowchart 2200 equipment 2202 means 2204 means

Claims

1. a matching network having resistive and capacitive elements; a transformer in the matching network, the transformer having a primary side and a secondary side, the transformer having at least one interwinding capacitance coupled from an input of the primary side to a non-inverting output of the secondary side; the at least one interwinding capacitance having an adjustable capacitance configured to tune a frequency response of the filter circuit; The larger the capacitance of the at least one interwinding capacitance, the lower the notch frequency of the filter circuit. Filter circuit.

2. A matching network having a resistive element and a capacitive element; a transformer in the matching network, the transformer having a primary side and a secondary side, the transformer having at least one interwinding capacitance coupled from an input of the primary side to a non-inverting output of the secondary side; the at least one interwinding capacitance having an adjustable capacitance configured to tune a frequency response of the filter circuit; the filter circuit generates an adjustable notch response at one of a lower frequency side and an upper frequency side of a transmit band; the adjustable notch response is selectable to determine a channel response of the transmission paths constituting transmission paths for transmitting narrow bandwidth signals and wide bandwidth signals in different communication slots of the same communication subframe; Filter circuit.

3. 3. A filter circuit as claimed in claim 1 or 2, wherein the filter circuit generates a notch response outside a transmission band using inductance provided solely by the inductance of the transformer.

4. 3. The filter circuit of claim 1, wherein the filter circuit is single-ended.

5. 3. The filter circuit of claim 1, wherein the filter circuit is differential and the transformer includes an additional interwinding capacitance coupled between a negative input node (input) of the primary side and a corresponding negative output node (inverting output) of the secondary side.

6. 4. The filter circuit of claim 3, wherein the notch response occurs at millimeter-wave (mmW) frequencies.

7. the filter circuit comprises a plurality of matching networks coupled in series to achieve a plurality of notch responses; 4. The filter circuit of claim 3, wherein the plurality of matching networks are implemented between different amplifiers coupled in series with each other and coupled in series to the plurality of matching networks.

8. 3. The filter circuit of claim 1, wherein the filter circuit is coupled between a phase shifter and an antenna in a phased array.

9. 1. A method for generating a frequency response of a filter circuit, the frequency response including a notch filter response, using a matching network including a tunable notch filter of the filter circuit, the method comprising: transmitting a signal through a transformer having an interwinding capacitance across an input on a primary side of the transformer and a non-inverting output on a secondary side of the transformer; adjusting the value of the interwinding capacitance to determine a notch filter response to tune the frequency response of the filter circuit; and implementing the interwinding capacitance using an adjustable capacitance configured to tune the frequency response of the filter; The larger the capacitance of the inter-winding capacitance, the lower the notch frequency. method.

10. A method for generating a frequency response of a filter circuit including a notch filter response using a matching network including a tunable notch filter of the filter circuit, the method comprising: transmitting a signal through a transformer having an interwinding capacitance across an input on a primary side of the transformer and a non-inverting output on a secondary side of the transformer; adjusting the value of the interwinding capacitance to determine a notch filter response to tune the frequency response of the filter circuit; generating a tunable notch response at one of a lower frequency side and an upper frequency side of a passband; selecting the adjustable notch responses to determine channel responses of the transmission paths constituting transmission paths for transmitting narrow bandwidth signals and wide bandwidth signals in different communication slots of the same communication subframe; A method comprising:

11. 11. The method of claim 9 or 10, wherein a filter uses the interwinding capacitance and inductance of the transformer to create a notch response outside a transmission band.

12. 11. The method of claim 9 or 10, wherein the filter is single-ended.

13. The method of claim 11 , wherein the notch filter response occurs at millimeter wave (mmV) frequencies.

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