Power Amplifier Circuit

Abstract

A power amplifier circuit comprising a first carrier amplifier that includes a differential amplifier circuit which has a first transistor and a second transistor, and a first peak amplifier that is formed on the same semiconductor substrate as the first carrier amplifier, wherein: the emitter or source of the first transistor is electrically connected to the emitter or source of the second transistor; the emitter or source of the first transistor is electrically connected to a ground electrode via a first bump; and the emitter or source of the second transistor is electrically connected to the ground electrode via a second bump differing from the first bump.

Description

[Technical Field]

[0001] The present disclosure relates to a power amplifier circuit. [Background technology]

[0002] A Doherty amplifier is a highly efficient power amplifier. A Doherty amplifier generally has a carrier amplifier, which operates regardless of the power level of an input signal, connected in parallel with a peak amplifier, which is turned off when the power level of the input signal is low and turned on when the power level of the input signal is high. When the power level of the input signal is high, the carrier amplifier operates while maintaining saturation at the saturated output power level (see, for example, Patent Document 1). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2011-35754 Summary of the Invention [Problem to be solved by the invention]

[0004] In the Doherty amplifier described in Patent Document 1, the carrier amplifier and the peak amplifier each form a differential amplifier circuit. Each of the carrier amplifier and the peak amplifier includes two NMOS transistors. The sources of the two NMOS transistors are connected together and electrically connected to a ground electrode through vias, bumps, or the like. Here, the carrier amplifier's differential operation may become insufficient due to, for example, variations in transistor characteristics or the surrounding environment. In this case, a high-frequency current flows to the ground electrode through the vias or bumps to which the sources of the two NMOS transistors are connected. When a high-frequency current flows through the vias or bumps of the carrier amplifier, a magnetic field proportional to the inductance of the vias or bumps is generated. This magnetic field generates an induced electromotive force in the vias or bumps electrically connecting the peak amplifier to the ground electrode. As a result, the peak amplifier in the Doherty amplifier described in Patent Document 1 may not operate properly.

[0005] Therefore, an object of the present disclosure is to provide a power amplifier circuit that reduces the influence of a magnetic field generated by one amplifier in a Doherty amplifier on the other amplifier. [Means for solving the problem]

[0006] A power amplifier circuit according to one aspect of the present invention includes a first carrier amplifier including a differential amplifier circuit having a first transistor and a second transistor, and a first peak amplifier formed on the same semiconductor substrate as the first carrier amplifier, wherein the emitter or source of the first transistor is electrically connected to the emitter or source of the second transistor, the emitter or source of the first transistor is electrically connected to a ground electrode through a first bump, and the emitter or source of the second transistor is electrically connected to the ground electrode through a second bump different from the first bump. [Effects of the Invention]

[0007] According to the present disclosure, it is possible to provide a power amplifier circuit that reduces the influence of a magnetic field generated by one amplifier in a Doherty amplifier on the other amplifier. [Brief explanation of the drawings]

[0008] [Figure 1] 1 is a configuration diagram showing an example of the configuration of a power amplifier circuit according to a first embodiment. [Figure 2] FIG. 2 is a diagram showing an example of an XZ cross section including an emitter of an output amplifier. [Figure 3] FIG. 10 is a diagram showing another example of an XZ cross section including the emitter of the output amplifier. [Figure 4] FIG. 2 is a diagram showing an example of an XY cross section including an emitter of an output amplifier. [Figure 5] FIG. 10 is a diagram showing another example of an XY cross section including the emitter of the output amplifier. [Figure 6] FIG. 10 is a configuration diagram showing an example of the configuration of a power amplifier circuit according to a second embodiment. [Figure 7] FIG. 10 is a diagram showing an example of an XZ cross section including an emitter of an output amplifier according to a second embodiment. [Figure 8] FIG. 10 is a diagram showing an example of an XY cross section including an emitter of an output amplifier according to a second embodiment. [Figure 9] 10 is a diagram showing another example of an XY cross section including an emitter of the output amplifier according to the second embodiment. FIG. [Figure 10] FIG. 10 is a diagram illustrating an example of the configuration of a power amplifier circuit according to another embodiment. [Figure 11] FIG. 10 is a configuration diagram showing another example of the configuration of a power amplifier circuit according to another embodiment. [Figure 12] FIG. 10 is a configuration diagram showing another example of the configuration of a power amplifier circuit according to another embodiment. [Figure 13] FIG. 10 is a diagram showing an example of an XZ cross section including an emitter of an output amplifier according to a comparative example. [Figure 14] FIG. 10 is a diagram showing another example of an XZ cross section including an emitter of an output amplifier according to a comparative example. DETAILED DESCRIPTION OF THE INVENTION

[0009] ===Structure of the power amplifier circuit 1000 according to the first embodiment=== The power amplifier circuit 1000 is mounted on, for example, a mobile phone and is used to amplify the power of a signal to be transmitted to a base station. The power amplifier circuit 1000 can amplify the power of signals conforming to communication standards such as 2G (second-generation mobile communication system), 3G (third-generation mobile communication system), 4G (fourth-generation mobile communication system), 5G (fifth-generation mobile communication system), LTE (Long Term Evolution)-FDD (Frequency Division Duplex), LTE-TDD (Time Division Duplex), LTE-Advanced, LTE-Advanced Pro, and 6G (sixth-generation mobile communication system). Note that the communication standards of the signals amplified by the power amplifier circuit 1000 are not limited to these. The power amplifier circuit 1000 amplifies an input signal RFin and outputs an output signal RFout. The input signal is a radio frequency (RF) signal, and the frequency of the input signal is, for example, several GHz to several tens of GHz.

[0010] The power amplifier circuit 1000 according to the first embodiment includes a Doherty amplifier. The power amplifier circuit 1000 has a configuration for suppressing a magnetic field generated by a high-frequency signal on the carrier amplifier side of the Doherty amplifier. This configuration suppresses the influence of an induced electromotive force generated on the peak amplifier side of the Doherty amplifier by the magnetic field, thereby stabilizing the operation of the Doherty amplifier.

[0011] The configuration of a power amplifier circuit 1000 according to the first embodiment will be described with reference to Fig. 1. Fig. 1 is a diagram showing an example of the configuration of the power amplifier circuit 1000 according to the first embodiment. As shown in Fig. 1, the power amplifier circuit 1000 is a Doherty amplifier including, for example, a divider 1100, a carrier circuit 1200, a peak circuit 1300, and a combiner 1400.

[0012] The divider 1100 divides the input signal RFin into multiple signals. The divider 1100 is, for example, a 90-degree hybrid circuit. That is, the divider divides the input signal RFin into a signal RF1 that is output to a carrier amplifier and a signal RF2 that has a phase difference of approximately 90 degrees from the signal RF1 and is output to a peak amplifier. The divider is not limited to a 90-degree hybrid circuit, and may be, for example, a combination of a distributed constant circuit such as a balun or a coupled-line 3 dB coupler, or a Wilkinson divider or a Webb divider, and a phase shifter that delays the phase of the input signal RFin by approximately 90 degrees. Here, the term "approximately 90 degrees" includes, for example, a range of 45 degrees to 135 degrees.

[0013] The carrier circuit 1200 amplifies the input signal RF1 and outputs the amplified signal, for example. The carrier circuit 1200 is biased to class A, class AB, or class B, for example. That is, the carrier circuit 1200 amplifies the input signal RF1 and outputs the amplified signal regardless of the power level of the input signal, such as a small instantaneous input power.

[0014] As shown in FIG. 1, the carrier circuit 1200 includes, for example, a signal converter 1210, a buffer amplifier 1220, a driver amplifier 1230, an output amplifier 1240, a matching circuit 1250, and a matching circuit 126. 0 1, the carrier circuit 1200 includes the buffer amplifier 1220, the driver amplifier 1230, and the output amplifier 1240, but is not limited to this. For example, the carrier circuit 1200 may be configured with only the output amplifier 1240, or may be configured without including the buffer amplifier 1220.

[0015] The signal converter 1210, for example, outputs an input signal as two signals of approximately opposite phases. The signal converter 1210 is configured to include, for example, a balun. For convenience, it is assumed below that the signal converter 1210 receives a signal RF1 as input and outputs a signal RF11 and a signal RF12 that is approximately opposite in phase to the signal RF11. In the present invention, "approximately opposite in phase" is defined as having a phase difference of 135° to 225° with respect to one of the signals.

[0016] The buffer amplifier 1220, the driver amplifier 1230, and the output amplifier 1240 are configured to include, for example, transistors biased by bias circuits. The transistors are not particularly limited, but may be, for example, heterojunction bipolar transistors (HBTs). a The transistor may be a bipolar transistor such as a heterojunction bipolar transistor (HBT), or a field-effect transistor such as a metal-oxide-semiconductor field-effect transistor (MOSFET). For convenience, the following description will be given assuming that the transistor is a heterojunction bipolar transistor. Note that when the transistor is a field-effect transistor, the emitter can be substituted for the source in the following description.

[0017] The buffer amplifier 1220 includes a transistor 1221 having a base to which the signal RF11 is input, and a transistor 1222 having a base to which a signal RF12 having a phase that is approximately opposite to that of the signal RF11 is input.

[0018] Driver amplifier 1230 includes a transistor 1231 to the base of which is input a signal obtained by amplifying signal RF11 in buffer amplifier 1220, and a transistor 1232 to the base of which is input a signal having a phase approximately opposite to that of the amplified signal.

[0019] The output amplifier 1240 includes a transistor 1241, the base of which receives the signal amplified by the driver amplifier 1230, and a transistor 1242, the base of which receives a signal that is approximately in reverse phase to the amplified signal. That is, the buffer amplifier 1220, the driver amplifier 1230, and the output amplifier 1240 each form a differential amplifier circuit.

[0020] Matching circuit 1250 and matching circuit 1260 are circuits that perform impedance matching between buffer amplifier 1220 and driver amplifier 1230. Hereinafter, only the configuration of matching circuit 1250 will be described, and the configuration of matching circuit 1260 will be omitted as it is similar to that of matching circuit 1250. Matching circuit 1250 includes, for example, a first transformer 1251, a first capacitor 1252, and a second capacitor 1253. First transformer 1251 is, for example, a winding transformer including input winding 1251a and output winding 1251b, and propagates a signal input to input winding 1251a to output winding 1251b. Specifically, in first transformer 1251, an amplified signal output from buffer amplifier 1220 is input to input winding 1251a and output from output winding 1251b. The first transformer 1251 can match impedance by adjusting the winding ratio of the input winding 1251a and the output winding 1251b. This allows impedance matching on the semiconductor substrate 1500 without forming an output matching circuit outside the semiconductor substrate 1500. Therefore, the power amplifier circuit 1000 can reduce its circuit size. A power supply voltage is supplied to the input winding 1251a, for example, at its midpoint g1. Since two amplified signals of opposite phases are supplied to the midpoint g1, the midpoint g1 serves as a virtual ground point. This allows noise caused by the power supply circuit to be suppressed. In other words, the power amplifier circuit 1000 does not need to include a choke coil or bypass capacitor for the power supply, thereby reducing the circuit size. The first capacitor 1252 is connected in parallel with the input winding 1251a, for example. The second capacitor 1253 is connected in parallel with the output winding 1251b, for example. The first capacitor 1252 and the second capacitor 1253 are provided, for example, to suppress the influence of the parasitic inductance of the first transformer 1251 in impedance matching of the first transformer 1251. Note that the first capacitor 1252 can be replaced by a capacitance parasitic on the carrier circuit 1200, and therefore does not necessarily have to be provided.

[0021] The peak circuit 1300 amplifies the signal RF2 input through the divider 1100 and outputs the amplified signal. The peak circuit 1300 is biased to, for example, class C. The peak circuit 1300 has an amplifying effect in a range where the voltage level of the signal RF2 is equal to or higher than a predetermined power level. The peak circuit 1300 may also be biased to class A, class AB, or class B depending on the conditions of use.

[0022] 1, the peak circuit 1300 is, for example, a differential amplifier circuit and includes a signal converter 1310, a buffer amplifier 1320, a driver amplifier 1330, an output amplifier 1340, a matching circuit 1350, and a matching circuit 1360. Note that, although the peak circuit 1300 includes the buffer amplifier 1320, the driver amplifier 1330, and the output amplifier 1340 in FIG. 1, this is not limiting. For example, the peak circuit 1300 may be configured with only the output amplifier 1340, or may be configured without including the buffer amplifier 1320. The configurations of the signal converter 1310, the buffer amplifier 1320, the driver amplifier 1330, the output amplifier 1340, the matching circuit 1350, and the matching circuit 1360 are similar to those of the signal converter 1210, the buffer amplifier 1220, the driver amplifier 1230, the output amplifier 1240, the matching circuit 1250, and the matching circuit 1260, for example, and therefore will not be described here.

[0023] The combiner 1400 combines, for example, the signal RF11 output from the carrier circuit 1200 and the amplified signal RF21 output from the peak circuit 1300, and outputs the output signal RFout.

[0024] <<Configuration of output amplifiers 1240 and 1340>> Next, the detailed configurations of the output amplifier 1240 of the carrier circuit 1200 and the output amplifier 1340 of the peak circuit 1300 will be described with reference to FIGS. 2 and 3. FIG. 2 is a diagram showing an example of an XZ cross section including the emitters 1241a, 1242a, 1341a, and 1342a of the output amplifiers 1240 and 1340. FIG. 3 is a diagram showing another example of an XZ cross section including the emitters 1241a, 1242a, 1341a, and 1342a of the output amplifiers 1240 and 1340. In FIGS. 2 and 3, for example, the X axis is an axis along one direction of the main surface of the semiconductor substrate 1500, the Y axis is an axis along another direction perpendicular to the X axis of the main surface of the semiconductor substrate 1500, and the Z axis is an axis along a direction perpendicular to the X axis and the Y axis.

[0025] 2, the output amplifiers 1240 and 1340 are formed on the same semiconductor substrate 1500. An emitter 1241a of a transistor 1241 of the output amplifier 1240 is electrically connected to a ground electrode 1700, for example, through a bump 1610. An emitter 1242a of a transistor 1242 is electrically connected to the ground electrode 1700, for example, through a bump 1620. The emitter 1241a is electrically connected to the emitter 1242a through a conductive member 1510. An emitter 1341a of a transistor 1341 of the output amplifier 1340 is electrically connected to the ground electrode 1700, for example, through a bump 1630.

[0026] The emitter 1342a of the transistor 1342 is electrically connected to the ground electrode 1700 through, for example, a bump 1640. The emitter 1341a is electrically connected to the emitter 1342a through the conductive member 1520. Note that, although the emitters 1241a, 1242a, 1341a, and 1342a have been described above as being electrically connected to the ground electrode 1700 through bumps 1610, 1620, 1630, and 1640, this is not limiting. As shown in FIG. 3 , the emitters 1241a, 1242a, 1341a, and 1342a may be electrically connected to the ground electrode 1700 through vias 1650, 1660, 1670, and 1680. Note that the bumps and vias are formed of, for example, copper, aluminum, gold, or a carbon-based material (e.g., a graphite sheet).

[0027] Here, referring to FIGS. 13 and 14 , the configuration of the output amplifiers of power amplifier circuits 4000 and 5000 according to the comparative example will be described, and the effectiveness of the power amplifier circuit 1000 according to the first embodiment relative to the power amplifier circuits 4000 and 5000 will be described. FIG. 13 is a diagram showing an example of an XZ cross section including emitters 4241a, 4242a, 4341a, and 4342a of output amplifiers 4240 and 4340 according to the comparative example. FIG. 14 is a diagram showing another example of an XZ cross section including emitters 5241a, 5242a, 5341a, and 5342a of output amplifiers 5240 and 5340. Note that, of the configurations shown in FIGS. 13 and 14 , descriptions of the configurations similar to those of the output amplifiers 1240 and 1340 shown in FIGS. 2 and 3 will be omitted below. Note that the X-axis, Y-axis, and Z-axis in FIGS. 13 and 14 are the same as the X-axis, Y-axis, and Z-axis in FIGS. 2 and 3.

[0028] As shown in FIG. 13 , in the power amplifier circuit 4000, a conductive member 4510 electrically connecting the emitter 4241a and the emitter 4242a is electrically connected to the ground electrode 4700 through a bump 4610. Furthermore, a conductive member 4520 electrically connecting the emitter 4341a and the emitter 4342a is electrically connected to the ground electrode 4700 through a bump 4620. In the power amplifier circuit 4000, if the high-frequency current flowing through the transistor 4241 and the high-frequency current flowing through the transistor 4242 do not cancel each other out, the high-frequency current flows through the bump 4610. A magnetic field is generated around the bump 4610 due to the high-frequency current flowing through the bump 4610. An induced electromotive force is generated in the bump 4620 due to the magnetic field generated in the bump 4610. This causes fluctuations in the operation of the peak circuit, resulting in unstable operation of the power amplifier circuit 4000.

[0029] Furthermore, the magnetic field generated in bump 4620 acts on a bump (not shown) of the driver amplifier of the peak circuit. The magnetic field generates an induced electromotive force in the bump of the driver amplifier. Here, the high-frequency current flowing through the driver amplifier is, for example, several tenths of the high-frequency current flowing through the output amplifier. That is, when the current generated in the transistor of the driver amplifier by the induced electromotive force generated by the magnetic field is amplified by the driver amplifier, a large current is output from the output amplifier of the peak circuit. This significantly destabilizes the operation of power amplifier circuit 4000 as a Doherty amplifier. Specifically, in power amplifier circuit 4000, for example, the differential characteristic (same amplitude but opposite phase) of the peak circuit deteriorates, or the gain or phase of the output amplifier or driver amplifier of the peak circuit fluctuates, preventing the output of the peak circuit from being efficiently combined with the output of the carrier circuit, resulting in unstable operation as a Doherty amplifier. Furthermore, the magnetic field generated in the bump 4620 may cause a bump (not shown) of a signal converter corresponding to the signal converter 1210 in FIG. 1, a bump (not shown) of a distributor corresponding to the distributor 1100, and a high ZhouAn induced electromotive force is generated in other bumps connected to the semiconductor substrate to which bump 4620 is connected, such as a bump (not shown) for inputting a wave signal and a bump (not shown) for supplying DC power, which makes the output of the peak circuit unstable and the operation of the Doherty amplifier unstable.

[0030] 2, in the power amplifier circuit 1000 according to the first embodiment, the emitter 1241a is electrically connected to the emitter 1242a through the conductive member 1510. The emitter 1241a is electrically connected to the ground electrode 1700 through the bump 1610, and the emitter 1242a is electrically connected to the ground electrode 1700 through the bump 1620. That is, the bump 1610 is electrically connected to the bump 1620 in parallel. This makes the combined inductance of the bump 1610 and the bump 1620 smaller than the inductance of the bump 4610 of the power amplifier circuit 4000. Therefore, the magnetic field generated around the bump 1610 and the bump 1620 of the output amplifier 1240 of the power amplifier circuit 1000 is smaller than the magnetic field generated around the bump 4610 of the power amplifier circuit 4000. That is, in the power amplifier circuit 1000, it is possible to reduce the induced electromotive force generated in the output amplifier 1340 and the driver amplifier 1330 of the peak circuit 1300 due to the influence of the magnetic field generated in the output amplifier 1240. As a result, the power amplifier circuit 1000 operates more stably as a Doherty amplifier than the power amplifier circuit 4000.

[0031] 14, in the power amplifier circuit 5000, the emitter 5241a and the emitter 5242a are not connected by a conductive member. In the power amplifier circuit 5000, the emitter 5241a is electrically connected to the ground electrode 5700 through a bump 5610, and the emitter 5242a is electrically connected to the ground electrode 5700 through a bump 5620. In the power amplifier circuit 5000, the high current flowing in the transistor 5241 ZhouThe wave current and the high-frequency current flowing in transistor 5242 do not cancel each other out, and a large high-frequency current flows through bump 5610 and bump 5620. As a result, a difference occurs between the magnitude of the induced electromotive force generated in bump 5630 of the peak circuit and the magnitude of the induced electromotive force generated in bump 5640, depending on the distance between bump 5630 and bump 5640 and between bump 5610 and bump 5620, respectively. This causes fluctuations in the operation of the peak circuit, making the operation of power amplifier circuit 5000 unstable.

[0032] 2, in the power amplifier circuit 1000 according to the first embodiment, the emitter 1241a is electrically connected to the emitter 1242a through the conductive member 1510. As a result, in the power amplifier circuit 1000, the high-frequency current flowing through the transistor 1241 and the high-frequency current flowing through the transistor 1242 cancel each other out, and the high-frequency current flowing through the bumps 1610 and 1620 is significantly smaller than the high-frequency current flowing through the bumps 5610 and 5620 of the power amplifier circuit 5000. Also, in the power amplifier circuit 1000, the emitter 1341a is electrically connected to the emitter 1342a through the conductive member 1520. As a result, in the power amplifier circuit 1000, an induced electromotive force is generated in the bumps 1630 and 1640 by a magnetic flux passing between the bumps 1630 and 1640. Here, in the power amplifier circuit 1000, the bumps 1630 and 1640 are connected via the ground electrode 1700 and the conductive member 1520, so the induced electromotive forces generated in the bumps 1630 and 1640 are in opposite directions. Therefore, the induced electromotive forces generated in the bumps 1630 and 1640 cancel each other out. Therefore, the power amplifier circuit 1000 5 It operates more stably as a Doherty amplifier than the 000.

[0033] Next, with reference to FIGS. 4 and 5, modified examples of the connection relationship between the output amplifier 1240 of the carrier circuit 1200, the output amplifier 1340 of the peak circuit 1300, and the ground electrode 1700 will be described. Note that FIGS. 4 and 5 are plan views showing an example of the positional relationship between each bump and each emitter. FIG. 4 is a diagram showing an example of an XY cross section including the emitters 1241a, 1242a, 1341a, and 1342a of the output amplifiers 1240 and 1340. FIG. 5 is a diagram showing another example of an XY cross section including the emitters 1241a, 1242a, 1341a, and 1342a of the output amplifiers 1240 and 1340. Note that the X-axis, Y-axis, and Z-axis in FIGS. 4 and 5 are the same as the X-axis, Y-axis, and Z-axis in FIGS. 2 and 3.

[0034] 2, in the power amplifier circuit 1000, the emitter 1241a of the output amplifier 1240 is electrically connected to the ground electrode 1700 through the bump 1610, and the emitter 1242a is electrically connected to the ground electrode 1700 through the bump 1620. However, the power amplifier circuit 1000 is not limited to this. For example, in the power amplifier circuit 1000, the emitters 1241a and 1242a of the output amplifier 1240 may each be electrically connected to the ground electrode 1700 through a plurality of bumps that are electrically arranged in parallel.

[0035] Specifically, as shown in FIG. 4, in the power amplifier circuit 1000, the emitter 1241a of the output amplifier 1240 may be electrically connected to the ground electrode 1700 via, for example, bumps 1611 and 1612. The emitter 1242a may be electrically connected to the ground electrode 1700 via, for example, bumps 1621 and 1622. This reduces the inductance compared to when the emitter 1241a and the emitter 1242a are each connected to the ground electrode 1700 via a single bump. Furthermore, increasing the number of bumps electrically arranged in parallel in this manner distributes stress generated in the semiconductor substrate 1500, thereby improving the physical stability of the power amplifier circuit 1000. In the power amplifier circuit 1000, the output amplifier 1340 may or may not have the same configuration as the output amplifier 1240.

[0036] 5, in the power amplifier circuit 1000, the conductive member 1510 electrically connecting the emitter 1241a and the emitter 1242a of the output amplifier 1240 may be electrically connected to the ground electrode 1700 via, for example, a bump 1613. This reduces inductance compared to when the emitter 1241a and the emitter 1242a are each connected to the ground electrode 1700 via a single bump. Increasing the number of bumps electrically connected in parallel in this manner can disperse stress generated in the semiconductor substrate 1500, thereby improving the physical stability of the power amplifier circuit 1000. Furthermore, for example, the bumps 1611, 1612, and 1613 may be arranged to form an oval shape when viewed in an XY cross section. This allows the semiconductor substrate 1500 and the ground electrode 1700 to be connected over a larger area in the power amplifier circuit 1000, thereby improving heat dissipation performance.

[0037] ===Method for Manufacturing the Power Amplifier Circuit 1000 According to the First Embodiment=== Next, a method for manufacturing the power amplifier circuit 1000 will be described with reference to Fig. 2. For convenience, the following description will be given by taking only the output amplifiers 1240 and 1340 as an example. First, an oxide film is formed on the semiconductor substrate 1500 by sputtering or the like. Resist is applied to the oxide film to form patterns corresponding to the desired wiring and electrodes. Then, unnecessary resist is removed using a developer. The oxide film is etched away from the portions that will become the desired wiring and electrodes (e.g., emitters 1241a, 1242a, 1341a, 1342a, etc.). The remaining resist is removed to create a lithography. Impurities are diffused into the lithography to form transistors (transistors 1241, 1242, 1341, 1342, etc.) on the semiconductor substrate 1500. Next, bumps 1610, 1620, 1630, and 1640 are formed on the emitters 1241a, 1242a, 1341a, and 1342a of the semiconductor substrate 1500. The semiconductor substrate 1500 is then turned face-down toward the ground electrode 1700, and reflow heating is performed to connect the bumps to the ground electrode.

[0038] Power Amplifier Circuit 2000 According to the Second Embodiment The configuration of a power amplifier circuit 2000 according to the second embodiment will be described with reference to FIGS. 6 to 9. FIG. 6 is a diagram showing an example of the configuration of the power amplifier circuit 2000 according to the second embodiment. FIG. 7 is a diagram showing an example of an XZ cross section including the emitters 2241a, 2242a, 2341a, and 2342a of the output amplifiers 2240 and 2340 according to the second embodiment. FIG. 8 is a diagram showing an example of an XY cross section including the emitters 2241a, 2242a, 2341a, and 2342a of the output amplifiers 2240 and 2340 according to the second embodiment. FIG. 9 is a diagram showing another example of an XY cross section including the emitters 2241a, 2242a, 2341a, and 2342a of the output amplifiers 2240 and 2340 according to the second embodiment. For convenience, only differences from the power amplifier circuit 1000 according to the first embodiment will be described below.

[0039] As shown in FIGS. 6 and 7 , in the power amplifier circuit 2000, for example, the emitter 2242a of the output amplifier 2240 and the emitter 2341a of the output amplifier 2340 are electrically connected via the conductive member 2530. This allows a high-frequency current, generated when the differential operation in the output amplifier 2240 becomes incomplete, to flow to the ground electrode 2700 through the bumps 2610, 2620, 2630, and 2640. That is, the power amplifier circuit 2000 can reduce the inductance of the bumps compared to the power amplifier circuit 1000. This reduces the magnetic field generated by the bumps of the output amplifier 2240 and the output amplifier 2340 compared to the power amplifier circuit 1000, thereby reducing the induced electromotive force generated in the bumps electrically connecting, for example, the driver amplifier 2230 or the driver amplifier 2330 to the ground electrode. This allows the power amplifier circuit 2000 to operate stably as a Doherty amplifier. The conductive member 2530 may be, for example, an inductor or a resistive element. This allows the power amplifier circuit 2000 to achieve isolation between the output amplifier 2240 and the output amplifier 2340, thereby stabilizing operation as a Doherty amplifier.

[0040] 8, in the power amplifier circuit 2000, the emitter 2241a of the output amplifier 2240 may be electrically connected to the ground electrode 2700 through, for example, bumps 2611 and 2612. The emitter 2242a may be electrically connected to the ground electrode 2700 through, for example, bumps 2621 and 2622. 2 700. This can reduce the inductance of the bumps while ensuring isolation between the output amplifier 2240 and the output amplifier 2340. Furthermore, by increasing the number of bumps provided electrically in parallel, stress generated in the semiconductor substrate 2500 can be dispersed, thereby improving the physical stability of the power amplifier circuit 2000.

[0041] 9, in the power amplifier circuit 2000, the conductive member 2510 that electrically connects the emitter 2241a and the emitter 2242a of the output amplifier 2240 may be electrically connected to the ground electrode 2700 via a bump 2613, for example. This reduces the inductance of the bumps while ensuring isolation between output amplifier 2240 and output amplifier 2340. Also, for example, bumps 2611, 2612, and 2613 may be provided so as to form an oval shape when viewed in an XY cross section. This allows stress generated in semiconductor substrate 2500 to be dispersed, thereby improving the physical stability of power amplifier circuit 2000.

[0042] Power Amplifier Circuit 3000 According to Other Embodiments The configuration of a power amplifier circuit 3000 according to another embodiment will be described with reference to FIGS. 10 to 12. FIG. 10 is a diagram illustrating an example of the configuration of a power amplifier circuit 3000 according to another embodiment. FIGS. 11 and 12 are diagrams illustrating other examples of the configuration of a power amplifier circuit 3000 according to another embodiment. For convenience, only differences from the power amplifier circuit 1000 according to the first embodiment will be described below. In the above, the power amplifier circuit 1000 according to the first embodiment has been described as having, for example, buffer amplifiers 1220 and 1320, driver amplifiers 1230 and 1330, and output amplifiers 1240 and 1340 forming a differential amplifier circuit, but this is not limiting. In the power amplifier circuit 1000, for example, at least one of the output amplifier 1240 of the carrier circuit 1200 and the output amplifier 1340 of the peak circuit 1300 may form a differential amplifier circuit.

[0043] Specifically, as an example, the configuration of a power amplifier circuit 3000 according to another embodiment will be described with reference to FIGS. 10 and 11. As shown in FIG. 10, the power amplifier circuit 3000 may include, for example, a matching circuit 3100, a buffer amplifier 3200, a matching circuit 3300, a divider 3400, a carrier circuit 3500, a peak circuit 3600, and a combiner 3700. The carrier circuit 3500 may include a matching circuit 3510, a single-ended driver amplifier 3520, a signal converter 3530, and an output amplifier 3540 that is a differential amplifier circuit. The peak circuit 3600 may include a matching circuit 3610, a single-ended driver amplifier 3620, a signal converter 3630, and an output amplifier 3640 that is a differential amplifier circuit. 11, a modified example of power amplifier circuit 3000 may include a divider 3400, a carrier circuit 3500, and a peak circuit 3600. Carrier circuit 3500 may include a driver amplifier 3520, a signal converter 3530, and an output amplifier 3540 that is a differential amplifier circuit. Peak circuit 3600 may include a driver amplifier 3620 and an output amplifier 3640 that are not differential amplifier circuits. In power amplifier circuit 3000 shown in FIGS. 10 and 11, in output amplifier 3540 of carrier circuit 3500, the emitter of transistor 3541 and the emitter of transistor 3542 are electrically connected by a conductive member, and each emitter is electrically connected to a ground electrode via at least one bump. This makes it possible to reduce the induced electromotive force generated in the output amplifier 3640 and driver amplifier 3620 of the peak circuit 3600 due to the influence of the magnetic field generated in the output amplifier 3540 in the power amplifier circuit 3000. This allows the power amplifier circuit 3000 to operate stably as a Doherty amplifier.

[0044] 12, the power amplifier circuit 3000 may include a divider 3400, a carrier circuit 3500, and a peak circuit 3600. The carrier circuit 3500 may include a single-ended driver amplifier 3520 and a single-ended output amplifier 3540. The peak circuit 3600 may include a single-ended driver amplifier 3620 and an output amplifier 3640 that is a differential amplifier circuit. In the power amplifier circuit 3000 shown in FIG. 12, the output amplifier 3640 of the peak circuit 3600 is electrically connected between the emitter of the transistor 3641 (see FIG. 10) and the emitter of the transistor 3642 (see FIG. 10) by a conductive member, and each emitter is electrically connected to a ground electrode via at least one bump. This makes it possible to reduce the induced electromotive force generated in the driver amplifier 3520 of the carrier circuit 3500 due to the influence of the magnetic field generated in the output amplifier 3640 in the power amplifier circuit 3000. Therefore, the power amplifier circuit 3000 operates stably as a Doherty amplifier.

[0045] ===Summary=== The power amplifier circuit 1000 includes an output amplifier 1240 (first carrier amplifier) ​​including a differential amplifier circuit having a transistor 1241 (first transistor) and a transistor 1242 (second transistor), and an output amplifier 1340 (first peak amplifier) ​​formed on the same semiconductor substrate 1500 as the output amplifier 1240 (first carrier amplifier), wherein the emitter or source of the transistor 1241 (first transistor) is electrically connected to the emitter or source of the transistor 1242 (second transistor), the emitter or source of the transistor 1241 (first transistor) is electrically connected to the ground electrode 1700 through a bump 1610 (first bump), and the emitter or source of the transistor 1242 (second transistor) is electrically connected to the ground electrode 1700 through a bump 1620 (second bump) different from the bump 1610 (first bump). As a result, the inductance of the bumps (here, bumps 1610 and 1620) can be made smaller in power amplifier circuit 1000 than in power amplifier circuit 4000, and the induced electromotive force generated in output amplifier 1340 of peak circuit 1300 due to the influence of the magnetic field generated in output amplifier 1240 can be made smaller. Therefore, the power amplifier circuit 1000 operates stably as a Doherty amplifier.

[0046] Furthermore, the output amplifier 1340 (first peak amplifier) ​​of the power amplifier circuit 1000 includes a differential amplifier circuit having a transistor 1341 (third transistor) and a transistor 1342 (fourth transistor), and the emitter or source of the transistor 1341 (third transistor) is electrically connected to the emitter or source of the transistor 1342 (fourth transistor). As a result, in the power amplifier circuit 1000, the high-frequency current flowing through the bump of the peak circuit 1300 can be made smaller compared to the power amplifier circuit 5000, and the operation of the output amplifier 1340 of the peak circuit 1300 is stabilized. Therefore, the power amplifier circuit 1000 operates stably as a Doherty amplifier.

[0047] Furthermore, the emitter or source of transistor 1341 (third transistor) of power amplifier circuit 1000 is electrically connected to ground electrode 1700 through bump 1630 (third bump), and the emitter or source of transistor 1342 (fourth transistor) is electrically connected to ground electrode 1700 through bump 1640 (fourth bump). This allows the inductance of the bumps (bumps 1630 and 1640 in this case) to be smaller in power amplifier circuit 1000 than in power amplifier circuit 4000, thereby reducing the induced electromotive force generated in output amplifier 1340 of peak circuit 1300 due to the influence of the magnetic field generated in output amplifier 1240 of carrier circuit 1200. Therefore, the power amplifier circuit 1000 operates stably as a Doherty amplifier.

[0048] Furthermore, in the power amplifier circuit 2000, the emitter or source of the transistor 2241 (first transistor) or the transistor 2242 (second transistor) in the output amplifier 2240 (first carrier amplifier) ​​is electrically connected to the emitter or source of the transistor 2341 (third transistor) in the output amplifier 2340 (first peak amplifier) ​​through the conductive member 2530. As a result, the power amplifier circuit 2000 can reduce the inductance of the bump compared to the power amplifier circuit 1000, and therefore the induced electromotive force generated in the bump electrically connecting the driver amplifier 2230 of the carrier circuit 2200 or the driver amplifier 2330 of the peak circuit 2300 to the ground electrode is reduced. Therefore, the power amplifier circuit 2000 operates stably as a Doherty amplifier.

[0049] Furthermore, the bump 1610 (first bump) of the power amplifier circuit 1000 includes a plurality of bumps (here, bumps 1611 and 1612 in FIG. 4 or bumps 1611 and 1613 in FIG. 5) electrically connected in parallel as shown in FIGS. 4 and 5. This allows the inductance to be further reduced compared to when the emitter 1241a is connected to the ground electrode 1700 through a single bump. Furthermore, by increasing the number of bumps electrically connected in parallel in this way, stress generated in the semiconductor substrate 1500 can be dispersed, thereby improving the physical stability of the power amplifier circuit 1000.

[0050] 4 and 5, the bump 1620 (second bump) of the power amplifier circuit 1000 includes a plurality of bumps (here, bumps 1621 and 1622 in FIG. 4 or bumps 1612 and 1613 in FIG. 5) electrically connected in parallel. This allows the inductance to be further reduced compared to when the emitter 1242a is connected to the ground electrode 1700 via a single bump each. Furthermore, by increasing the number of bumps electrically connected in parallel in this way, stress generated in the semiconductor substrate 1500 can be dispersed, thereby improving the physical stability of the power amplifier circuit 1000.

[0051] 4 and 5, the bump 1630 (third bump) of the power amplifier circuit 1000 includes a plurality of bumps (here, bumps 1631 and 1632 in FIG. 4 or bumps 1621 and 1623 in FIG. 5) electrically connected in parallel. This allows the inductance to be further reduced compared to when the emitter 1341a is connected to the ground electrode 1700 through a single bump. Furthermore, by increasing the number of bumps electrically connected in parallel in this way, stress generated in the semiconductor substrate 1500 can be dispersed, thereby improving the physical stability of the power amplifier circuit 1000.

[0052] 4 and 5, the bump 1640 (fourth bump) of the power amplifier circuit 1000 includes a plurality of bumps (here, bumps 1641 and 1642 in FIG. 4 or bumps 1622 and 1623 in FIG. 5) electrically connected in parallel. This allows the inductance to be further reduced compared to when the emitter 1342a is connected to the ground electrode 1700 through a single bump. Furthermore, by increasing the number of bumps electrically connected in parallel in this way, stress generated in the semiconductor substrate 1500 can be dispersed, thereby improving the physical stability of the power amplifier circuit 1000.

[0053] Furthermore, the conductive member 2530 of the power amplifier circuit 2000 is an inductor or a resistive element. This allows the power amplifier circuit 2000 to achieve isolation between the output amplifier 2240 and the output amplifier 2340, thereby stabilizing operation as a Doherty amplifier.

[0054] The power amplifier circuit 1000 further includes a driver amplifier 1230 (second carrier amplifier) ​​connected in series to the output amplifier 1240 (first carrier amplifier) ​​on the input side of the output amplifier 1240 (first carrier amplifier), and a driver amplifier 1330 (second peak amplifier) ​​connected in series to the output amplifier 1340 (first peak amplifier) ​​on the input side of the output amplifier 1340 (first peak amplifier). This allows the power amplifier circuit 1000 to reduce the induced electromotive force generated in the output amplifier 1340 and the driver amplifier 1330 of the peak circuit 1300 due to the influence of the magnetic field generated by the output amplifier 1240. Therefore, the power amplifier circuit 1000 operates stably as a Doherty amplifier.

[0055] Furthermore, the collector or drain of the output amplifier 1240 (first carrier amplifier) ​​and the collector or drain of the output amplifier 1340 (first peak amplifier) ​​of the power amplifier circuit 1000 are electrically connected to the combining unit. This provides a structure that reduces the inductance of the bump between the output amplifier 1240, which has the largest high-frequency current in the carrier circuit 1200, and the ground electrode 1700, thereby reducing the induced electromotive force generated in the peak circuit 1300. Therefore, the power amplifier circuit 1000 operates stably as a Doherty amplifier.

[0056] Furthermore, the driver amplifier 1330 (second peak amplifier) ​​of the power amplifier circuit 1000 is formed on the same semiconductor substrate 1500 as the output amplifier 1240 (first carrier amplifier). This allows the power amplifier circuit 1000 to reduce the induced electromotive force generated in the bump that electrically connects the driver amplifier 1230 of the carrier circuit 1200 or the driver amplifier 1330 of the peak circuit 1300 to the ground electrode. This allows the power amplifier circuit 1000 to operate stably as a Doherty amplifier.

[0057] The power amplifier circuit 3000 also includes an output amplifier 3540 (third carrier amplifier), a driver amplifier 3520 (fourth carrier amplifier) ​​connected in series with the output amplifier 3540 (third carrier amplifier) ​​on the input side of the output amplifier 3540 (third carrier amplifier), an output amplifier 3640 (third peak amplifier) ​​including a differential amplifier circuit having a transistor (for example, the transistor 1341 in FIG. 1) (sixth transistor) and a transistor different from the transistor (for example, the transistor 1342 in FIG. 1) (seventh transistor), and a driver amplifier 3520 (fourth carrier amplifier) ​​connected in series with the output amplifier 3640 (third peak amplifier) ​​on the input side of the output amplifier 3640 (third carrier amplifier). The power amplifier circuit 3000 includes a driver amplifier 3620 (fourth peak amplifier) ​​connected to the driver amplifier 3520. The emitter or source of the transistor (e.g., the transistor 1341 in FIG. 1) (sixth transistor) is electrically connected to a ground electrode (e.g., the ground electrode 1700 in FIG. 2) through a bump (e.g., the bump 1630 in FIG. 2) (fifth bump). The emitter or source of the transistor (e.g., the transistor 1342 in FIG. 1) (seventh transistor) is electrically connected to the ground electrode (e.g., the ground electrode 1700 in FIG. 2) through a bump (e.g., the bump 1640 in FIG. 2) (sixth bump) different from the bump (e.g., the bump 1630 in FIG. 2) (fifth bump). This reduces the induced electromotive force generated in the driver amplifier 3520 of the carrier circuit 3500 due to the influence of the magnetic field generated by the output amplifier 3640. Therefore, the power amplifier circuit 3000 operates stably as a Doherty amplifier.

[0058] The power amplifier circuit 1000 also includes an output amplifier 1240 (first carrier amplifier) ​​including a differential amplifier circuit having a transistor 1241 (first transistor) and a transistor 1242 (second transistor), and an output amplifier 1340 (first peak amplifier) ​​formed on the same semiconductor substrate 1500 as the output amplifier 1240 (first carrier amplifier). The emitter or source of the transistor 1241 (first transistor) is connected to the transistor 1242 (second transistor). 2 (No. 2The emitter or source of transistor 1241 (first transistor) is electrically connected to the ground electrode 1700 through via 1650 (first via), and the emitter or source of transistor 1242 (second transistor) is electrically connected to the ground electrode through via 1660 (second via) different from via 1650 (first via). As a result, in the power amplifier circuit 1000, the inductance of the via (here, via 1650 shown in FIG. 3) can be made smaller than in the power amplifier circuit 4000, and therefore the induced electromotive force generated in the output amplifier 1340 of the peak circuit 1300 due to the influence of the magnetic field generated in the output amplifier 1240 can be made smaller. Therefore, the power amplifier circuit 1000 operates stably as a Doherty amplifier.

[0059] The above-described embodiments are intended to facilitate understanding of the present disclosure and are not intended to limit the present disclosure. The present disclosure may be modified or improved without departing from its spirit, and equivalents thereof are also included in the present disclosure. In other words, designs modified by a person skilled in the art as appropriate are also included within the scope of the present disclosure as long as they comprise the features of the present disclosure. The elements and their arrangements included in the embodiments are not limited to those exemplified and can be modified as appropriate. [Explanation of symbols]

[0060] 1000, 2000, 3000...power amplifier circuit, 1240, 1340...output amplifier, 1230, 1330...driver amplifier, 1500...semiconductor substrate, 1700...ground electrode.

Claims

1. a first carrier amplifier including a differential amplifier circuit having a first transistor that amplifies a first signal and a second transistor that amplifies a second signal that is opposite in phase to the first signal; a first peak amplifier formed on the same semiconductor substrate as the first carrier amplifier; Equipped with the emitter or source of the first transistor is electrically connected to the emitter or source of the second transistor through a first conductive member provided on the semiconductor substrate; the emitter or the source of the first transistor is electrically connected to a ground electrode through a first bump; the emitter or the source of the second transistor is electrically connected to a ground electrode through a second bump different from the first bump; Power amplifier circuit.

2. the first peak amplifier includes a differential amplifier circuit having a third transistor and a fourth transistor; the emitter or source of the third transistor is electrically connected to the emitter or source of the fourth transistor; 2. The power amplifier circuit according to claim 1.

3. the emitter or the source of the third transistor is electrically connected to a ground electrode through a third bump; the emitter or the source of the fourth transistor is electrically connected to a ground electrode through a fourth bump different from the third bump; 3. The power amplifier circuit according to claim 2.

4. an emitter or a source of the first transistor or the second transistor in the first carrier amplifier is electrically connected to an emitter or a source of the third transistor of the first peak amplifier through a second conductive member provided on the semiconductor substrate; 4. The power amplifier circuit according to claim 3.

5. the first bumps include a plurality of bumps electrically connected in parallel; The power amplifier circuit according to any one of claims 1 to 4.

6. the second bumps include a plurality of bumps electrically connected in parallel; The power amplifier circuit according to any one of claims 1 to 5.

7. the third bumps include a plurality of bumps electrically connected in parallel; 4. The power amplifier circuit according to claim 3.

8. the fourth bumps include a plurality of bumps electrically connected in parallel; 8. The power amplifier circuit according to claim 3 or 7.

9. the first conductive member is an inductor or a resistor; 5. The power amplifier circuit according to claim 4.

10. a second carrier amplifier connected in series to the first carrier amplifier on the input side of the first carrier amplifier; a second peak amplifier connected in series with the first peak amplifier on the input side of the first peak amplifier; The power amplifier circuit according to claim 1 , further comprising:

11. a collector or a drain of the first carrier amplifier and a collector or a drain of the first peak amplifier are electrically connected to a combining unit; 11. The power amplifier circuit according to claim 10.

12. the second peak amplifier is formed on the semiconductor substrate; 12. The power amplifier circuit according to claim 10 or 11.

13. a third carrier amplifier; a fourth carrier amplifier connected in series with the third carrier amplifier on the input side of the third carrier amplifier; a third peak amplifier including a differential amplifier circuit having a sixth transistor that amplifies a third signal and a seventh transistor that amplifies a fourth signal that is opposite in phase to the third signal, the third peak amplifier being formed on the same semiconductor substrate as the third carrier amplifier; a fourth peak amplifier connected in series with the third peak amplifier on the input side of the third peak amplifier; Equipped with the emitter or the source of the sixth transistor is electrically connected to the emitter or the source of the seventh transistor through a third conductive member provided on the semiconductor substrate; the emitter or the source of the sixth transistor is electrically connected to the ground electrode through a fifth bump; the emitter or the source of the seventh transistor is electrically connected to a ground electrode through a sixth bump different from the fifth bump; Power amplifier circuit.

14. a first carrier amplifier including a differential amplifier circuit having a first transistor that amplifies a first signal and a second transistor that amplifies a second signal that is opposite in phase to the first signal; a first peak amplifier formed on the same principal surface of a semiconductor substrate as the first carrier amplifier; Equipped with the emitter or the source of the first transistor is electrically connected to the emitter or the source of the second transistor through a fourth conductive member provided on the main surface; the emitter or the source of the first transistor is electrically connected to a ground electrode through a first via; the emitter or the source of the second transistor is electrically connected to a ground electrode through a second via different from the first via; Power amplifier circuit.

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