Semiconductor device and method for manufacturing the same

Abstract

To provide a semiconductor device which can reduce a contact resistance, and provide a manufacturing method of the semiconductor device.SOLUTION: A semiconductor device contains: a substrate; an electronic traveling layer provided above the substrate; an electron supply layer provided above the electronic traveling layer; a gate electrode, a source electrode, and a drain electrode, provided above the electron supply layer; a plurality of first projection parts that are extended to a lower side of an upper surface of the electronic traveling layer while passing through an inner part of the electron supply layer from a lower end of the source electrode, and are formed of an electrode material of the source electrode; and a plurality of second projection parts that are extended to the lower side of the upper surface of the electronic traveling layer while passing through the inner part of the electron supply layer from the lower end of the drain electrode, and are formed of the electrode material of the drain electrode. A first volume ratio of the plurality of first projection parts in a first region where the plurality of first projection parts are provided is 60% or less, and a second volume ratio of the plurality of second projection parts in a second region where the plurality of second projection parts are provided is 60% or less.SELECTED DRAWING: Figure 2A

Description

[Technical Field]

[0001] The present disclosure relates to a semiconductor device and a method for manufacturing a semiconductor device. [Background technology]

[0002] Conventionally, there has been a nitride semiconductor device comprising a nitride semiconductor layer and an ohmic electrode in contact with a side surface of the nitride semiconductor layer, the side surface being a nonpolar surface. The nitride semiconductor layer has a surface with irregularities, and the side surface is a side surface of a recess. The recesses are arranged in a checkerboard or stripe pattern on the surface of the nitride semiconductor layer (see, for example, Patent Document 1). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2008-227014 Summary of the Invention [Problem to be solved by the invention]

[0004] However, there is no disclosure regarding the volume ratio of the ohmic electrode in the region where the recess is formed in the conventional nitride semiconductor device, which affects the contact resistance between the source and drain electrodes and the semiconductor layer.

[0005] Therefore, an object of the present invention is to provide a semiconductor device capable of reducing contact resistance and a method for manufacturing the semiconductor device. [Means for solving the problem]

[0006] A semiconductor device according to an embodiment of the present disclosure includes a substrate, an electron transit layer provided above the substrate, an electron supply layer provided above the electron transit layer, a gate electrode, a source electrode, and a drain electrode provided above the electron supply layer, and a plurality of first protrusions formed of an electrode material of the source electrode, the first protrusions extending from a lower end of the source electrode through the electron supply layer to a position below an upper surface of the electron transit layer, and a plurality of second protrusions formed of an electrode material of the drain electrode, the second protrusions extending from a lower end of the drain electrode through the electron supply layer to a position below the upper surface of the electron transit layer, and a plurality of first protrusions, the first protrusions in a first region where the first protrusions are provided are 60% or less, and a second protrusions in a second region where the second protrusions are provided are 60% or less in volume. [Effects of the Invention]

[0007] It is possible to provide a semiconductor device capable of reducing contact resistance and a method for manufacturing the semiconductor device. [Brief explanation of the drawings]

[0008] [Figure 1A] 1 is a diagram showing a cross-sectional structure of a semiconductor device 100 according to a first embodiment. [Figure 1B] 1 is a diagram showing a cross-sectional structure of a semiconductor device 100 according to a first embodiment. [Figure 2A] 2 is an enlarged perspective view showing a part of the interior of the semiconductor device 100. FIG. [Figure 2B] 1 is a diagram showing a cross-sectional structure of a portion of a semiconductor device 100. FIG. [Figure 3A] 10 is a diagram showing an offset amount X1 of an end of a protrusion 160S relative to a source electrode 150S of a semiconductor device 100. FIG. [Figure 3B] FIG. 10 is a diagram showing the relationship between the offset amount X1 and the contact resistance Rc. [Figure 4] 10 is a diagram showing the relationship between the volume ratio of the protrusion 160S in the region 160SA and the contact resistance Rc. FIG. [Figure 5A] 10 is a diagram showing a position H in the height direction of the bottom surface of a protrusion 160S. FIG. [Figure 5B] FIG. 10 is a diagram showing the relationship between the position H and the contact resistance Rc. [Figure 6A] 10 is a diagram showing the width Wm and spacing Ws of the protrusion 160S. FIG. [Figure 6B] FIG. 10 is a diagram showing the relationship between the density of protrusions 160S and the contact resistance Rc. [Figure 7A] 2A to 2C are diagrams illustrating a method for manufacturing the semiconductor device 100. [Figure 7B] 2A to 2C are diagrams illustrating a method for manufacturing the semiconductor device 100. [Figure 7C] 2A to 2C are diagrams illustrating a method for manufacturing the semiconductor device 100. [Figure 7D] 2A to 2C are diagrams illustrating a method for manufacturing the semiconductor device 100. [Figure 7E] 2A to 2C are diagrams illustrating a method for manufacturing the semiconductor device 100. [Figure 7F] 2A to 2C are diagrams illustrating a method for manufacturing the semiconductor device 100. [Figure 7G] 2A to 2C are diagrams illustrating a method for manufacturing the semiconductor device 100. [Figure 7H] 2A to 2C are diagrams illustrating a method for manufacturing the semiconductor device 100. [Figure 7I] 2A to 2C are diagrams illustrating a method for manufacturing the semiconductor device 100. [Figure 8A] FIG. 10 is a diagram showing a cross-sectional structure of a semiconductor device 100A according to a second embodiment. [Figure 8B] FIG. 10 is a diagram showing a cross-sectional structure of a semiconductor device 100A according to a second embodiment. [Figure 8C] FIG. 2 is a diagram showing a cross-sectional structure of a part of the semiconductor device 100A. [Figure 8D] 10A to 10D are diagrams illustrating a method for manufacturing the semiconductor device 100A of the second embodiment. [Figure 8E] 10A to 10D are diagrams illustrating a method for manufacturing the semiconductor device 100A of the second embodiment. [Figure 8F] 10A to 10D are diagrams illustrating a method for manufacturing the semiconductor device 100A of the second embodiment. [Figure 8G] 10A to 10D are diagrams illustrating a method for manufacturing the semiconductor device 100A of the second embodiment. [Figure 9A] FIG. 10 is a diagram showing a cross-sectional structure of a semiconductor device 100B according to a third embodiment. [Figure 9B] FIG. 10 is a diagram showing a cross-sectional structure of a semiconductor device 100B according to a third embodiment. [Figure 10A] FIG. 10 is a diagram showing a cross-sectional structure of a semiconductor device 100C according to a fourth embodiment. [Figure 10B] FIG. 2 is a diagram showing a cross-sectional structure of a part of the semiconductor device 100C. [Figure 10C] 10A to 10C are diagrams illustrating a method for manufacturing a semiconductor device 100C according to a fourth embodiment. [Figure 10D] 10A to 10C are diagrams illustrating a method for manufacturing a semiconductor device 100C according to a fourth embodiment. [Figure 10E] 10A to 10C are diagrams illustrating a method for manufacturing a semiconductor device 100C according to a fourth embodiment. [Figure 10F] 10A to 10C are diagrams illustrating a method for manufacturing a semiconductor device 100C according to a fourth embodiment. [Figure 10G] 10A to 10C are diagrams illustrating a method for manufacturing a semiconductor device 100C according to a fourth embodiment. [Figure 10H] 10A to 10C are diagrams illustrating a method for manufacturing a semiconductor device 100C according to a fourth embodiment. [Figure 10I] 10A to 10C are diagrams illustrating a method for manufacturing a semiconductor device 100C according to a fourth embodiment. [Figure 11A] FIG. 10 is a diagram showing a cross-sectional structure of a semiconductor device 100D according to a fifth embodiment. [Figure 11B] FIG. 2 is a diagram showing a cross-sectional structure of a part of a semiconductor device 100D. [Figure 11C] FIG. 2 is a diagram showing a cross-sectional structure of a part of a semiconductor device 100D. DETAILED DESCRIPTION OF THE INVENTION

[0009] Hereinafter, embodiments of the semiconductor device and the method for manufacturing the semiconductor device according to the present disclosure will be described. In the following, components having substantially the same functional configurations will be denoted by the same reference numerals, and redundant explanations may be omitted.

[0010] <Embodiment 1> 1A and 1B are diagrams showing the cross-sectional structure of the semiconductor device 100 of the first embodiment. FIG. 2A is an enlarged perspective view showing a portion of the interior of the semiconductor device 100. FIG. 2B is a diagram showing the cross-sectional structure of a portion of the semiconductor device 100. FIG. 1A is a cross-section parallel to the XZ plane of the entire semiconductor device 100, corresponding to the cross-section taken along the line AA in FIG. 2A. FIG. 1B is a cross-section parallel to the XZ plane of the entire semiconductor device 100, corresponding to the cross-section taken along the line BB in FIG. 2A. Since FIG. 2A shows a portion of the interior of the semiconductor device 100, it includes a cross-section parallel to the YZ plane on the -X direction side and a cross-section parallel to the XZ plane on the -Y direction side, but hatching is omitted to make the structure easier to see. FIG. 2B is a cross-sectional view showing a portion of the width of the semiconductor device 100 in the Y direction, enlarged from FIG. 2A. Hatching is added to FIG. 2B.

[0011] In the following, the XYZ coordinate system is defined and explained. The direction parallel to the X axis (X direction), the direction parallel to the Y axis (Y direction), and the direction parallel to the Z axis (Z direction) are perpendicular to each other. The X direction is an example of a first direction, and the Y direction is an example of a second direction. Also, for the sake of convenience in the following explanation, the -Z direction side may be referred to as the lower side or bottom, and the +Z direction side as the upper side or top, but this does not represent a universal relationship between top and bottom. A planar view refers to a view from an XY plane. In the following, the length, width, thickness, etc. of each part may be exaggerated to make the configuration easier to understand.

[0012] <Configuration of semiconductor device 100> The semiconductor device 100 includes a substrate 110, an initial layer 111, an electron transit layer 120, a spacer layer 130, an electron supply layer 140, a gate electrode 150G, a source electrode 150S, a drain electrode 150D, protrusions 160S and 160D, and a passivation film 170. The protrusions 160S and 160D are examples of first and second protrusions, respectively.

[0013] The semiconductor device 100 is a GaN-based high electron mobility transistor (HEMT) in which the electron transit layer 120 is made of gallium nitride (i-GaN) that is not intentionally doped with impurities, and the electron supply layer 140 is made of aluminum gallium nitride (AlGaN) or the like. Note that the electron supply layer 140 is not limited to AlGaN, and details will be described later.

[0014] <Configuration of the substrate 110> The substrate 110 may be made of, for example, silicon carbide (SiC), silicon (Si), sapphire, gallium nitride (GaN), aluminum nitride (AlN), diamond, or the like.

[0015] <Configuration of initial layer 111> The initial layer 111 is provided on the upper surface of the substrate 110. The initial layer 111 is made of a nitride semiconductor, such as AlN, GaN, AlGaN, or a laminate structure thereof. The initial layer 111 is a nitride semiconductor layer that may be treated as a buffer layer, a strain relaxation layer, or a defect reduction layer.

[0016] <Configuration of the electron transit layer 120> The electron transit layer 120 is provided on the upper surface of the initial layer 111 and is, for example, a nitride semiconductor layer made of i-GaN. The electron transit layer 120 is a layer in which a channel is formed. A two-dimensional electron gas (2DEG) 120A is generated near the interface between the electron transit layer 120 and the spacer layer 130 due to the action of piezoelectric polarization or spontaneous polarization in the i-GaN. The position of the 2DEG 120A is indicated by a dashed line. The direction of current flow in the electron transit layer 120 is the −X direction.

[0017] <Configuration of Spacer Layer 130> The spacer layer 130 is provided on the upper surface of the electron transit layer 120 and is a nitride semiconductor layer made of, for example, AlN or AlGaN. The spacer layer 130 is provided to suppress deterioration of electron mobility due to alloy scattering in the electron transit layer 120 and enable a large current. The interface between the spacer layer 130 and the electron transit layer 120 is the interface between the channel and the spacer layer 130.

[0018] <Configuration of the electron supply layer 140> The electron supply layer 140 is provided on the upper surface of the spacer layer 130 and is a nitride semiconductor layer formed of, for example, aluminum gallium nitride (AlGaN), indium aluminum nitride (InAlN), indium aluminum gallium nitride (InAlGaN), aluminum nitride (AlN), or scandium aluminum nitride (ScAlN). The electron supply layer 140 and the electron transit layer 120 are disposed with the spacer layer 130 interposed therebetween, thereby forming a 2DEG 120A near the interface between the electron transit layer 120 and the spacer layer 130. The Al composition ratio of the electron supply layer 140 is preferably 45% or more in order to increase the electron concentration. When using an electron supply layer 140 with such a high Al composition ratio, it is preferable to provide the spacer layer 130.

[0019] <Configuration of gate electrode 150G> The gate electrode 150G is disposed on the passivation film 170 so as to be connected to the electron supply layer 140 through a through-hole that penetrates the passivation film 170. The gate electrode 150G is made of, for example, a laminated film of nickel (Ni) as a first layer and gold (Au) as a second layer laminated on the first layer. In the laminated film, for example, Ni has a thickness of 5 nm to 30 nm and Au has a thickness of 100 nm to 300 nm.

[0020] <Configuration of source electrode 150S> The source electrode 150S is provided on the upper surface of the electron supply layer 140 on the -X direction side of the gate electrode 150G. The source electrode 150S is made of, for example, a laminated film of titanium (Ti) as a first layer and Al as a second layer laminated on the first layer. In the laminated film, for example, Ti has a thickness of 2 nm to 50 nm and Al has a thickness of 100 nm to 300 nm.

[0021] <Configuration of drain electrode 150D> The drain electrode 150D is provided on the upper surface of the electron supply layer 140 on the +X direction side of the gate electrode 150G. Like the source electrode 150S, the drain electrode 150D is made of, for example, a laminated film of titanium (Ti) as a first layer and Al as a second layer laminated on the first layer. In the laminated film, for example, Ti has a thickness of 2 nm to 50 nm and Al has a thickness of 100 nm to 300 nm.

[0022] <Configuration of protrusion 160S and region 160SA> The protrusion 160S extends from the lower surface (lower end) of the source electrode 150S, through the electron supply layer 140 and the spacer layer 130, and below the upper surface of the electron transit layer 120, and is made of the electrode material of the source electrode 150S. The protrusion 160S is provided to improve ohmic contact with the source electrode 150S.

[0023] A plurality of protrusions 160S are provided. The protrusions 160S are thin plate-like protrusions that extend in the X direction connecting the source electrode 150S and the drain electrode 150D in a plan view and are arranged in the Y direction in a plan view. Each of the protrusions 160S is a thin plate-like protrusion that extends in the X direction and is parallel to the XZ plane. The protrusions 160S extending in the X direction mean that the longitudinal direction of the protrusions 160S is the X direction in a plan view. The protrusions 160S are thin wall portions that are arranged like fins protruding downward from the lower surface of the source electrode 150S. The protrusions 160S are formed as thin wall portions protruding downward from the lower surface of the source electrode 150S in order to increase the contact area with the electron supply layer 140, the spacer layer 130, and the electron transit layer 120 and thereby obtain good ohmic contact. As an example, the length of the protrusion 160S in the X direction is equal to the length of the protrusion 160D in the longitudinal direction.

[0024] 2A is a portion of the semiconductor device 100 above the lower surface of the electron transit layer 120, corresponding to part of the width of the source electrode 150S in the Y direction. That is, FIG. 2A shows some of the multiple protrusions 160S arranged in the Y direction. This configuration also applies to the protrusion 160D located below the drain electrode 150D.

[0025] Here, the region below the source electrode 150S where the multiple protrusions 160S are provided is referred to as a region 160SA. The region 160SA is an example of a first region. The region 160SA includes the multiple protrusions 160S and the nitride semiconductor layers of the electron transit layer 120, the spacer layer 130, and the electron supply layer 140 provided between the multiple protrusions 160S. As an example, the region 160SA has the same size as the source electrode 150S in a plan view and the same size as the protrusions 160S in an XZ plane view.

[0026] Note that, when the protrusion 160S at the end on the +Y direction side is offset in the -Y direction from the end of the source electrode 150S on the +Y direction side, the +Y direction end of the region 160SA may be the +Y direction side surface (side surface parallel to the XZ plane) of the protrusion 160S at the end on the +Y direction side. Similarly, when the protrusion 160S at the end on the -Y direction side is offset in the +Y direction from the end of the source electrode 150S on the -Y direction side, the -Y direction end of the region 160SA may be the -Y direction side surface (side surface parallel to the XZ plane) of the protrusion 160S at the end on the -Y direction side. Here, as an example, the description will be given assuming that the region 160SA has the same size as the source electrode 150S in a plan view.

[0027] Fig. 1A, which is a cross section taken along the line AA in Fig. 2A, is a cross section including the protrusion 160S, and Fig. 1B, which is a cross section taken along the line BB in Fig. 2A, is a cross section not including the protrusion 160S. For this reason, Fig. 1A shows the protrusion 160S and the region 160SA. In Fig. 1A, the region 160SA is slightly enlarged and shown outside the outline of the protrusion 160S, but the size of the region 160SA and the protrusion 160S is equal when viewed in the XZ plane. Fig. 1B also shows the region 160SA.

[0028] The plurality of protrusions 160S contact the 2DEG 120A because they extend below the upper surface of the electron transit layer 120. The 2DEG 120A is also formed in a portion of the electron transit layer 120 included in the region 160SA.

[0029] <Configuration of protrusion 160D and region 160DA> The protrusion 160D extends from the lower surface (lower end) of the drain electrode 150D, through the electron supply layer 140 and the spacer layer 130, and below the upper surface of the electron transit layer 120. The protrusion 160D is made of the electrode material of the drain electrode 150D. A plurality of protrusions 160D are provided, and the protrusions 160D are thin plate-like protrusions that extend in the X direction in a plan view and are arranged in the Y direction in a plan view. Each of the protrusions 160D is a thin plate-like protrusion that extends in the X direction and is parallel to the XZ plane. The protrusion 160D extending in the X direction means that the longitudinal direction of the protrusion 160D is the X direction in a plan view. The protrusions 160D are thin wall portions, similar to the protrusions 160S, and are arranged like fins that protrude downward from the lower surface of the drain electrode 150D. The protrusions 160D are formed as multiple thin walls protruding downward from the lower surface of the drain electrode 150D in order to obtain good ohmic contact by increasing the contact area with the electron supply layer 140, the spacer layer 130, and the electron transit layer 120. For example, the length of the protrusions 160D in the X direction is equal to the length of the protrusions 160S in the longitudinal direction.

[0030] Here, the region below the drain electrode 150D where the multiple protrusions 160D are provided is referred to as a region 160DA. The region 160DA is an example of a second region. The region 160DA includes the multiple protrusions 160D and the nitride semiconductor layers of the electron transit layer 120, the spacer layer 130, and the electron supply layer 140 provided between the multiple protrusions 160D. As an example, the region 160DA has the same size as the drain electrode 150D in a plan view and the same size as the protrusions 160D in an XZ plane view.

[0031] Note that, when the protrusion 160D at the end on the +Y direction side is offset in the -Y direction from the end of the drain electrode 150D on the +Y direction side, the end of the region 160DA in the +Y direction may be the +Y direction side surface (side surface parallel to the XZ plane) of the protrusion 160D at the end on the +Y direction side. Similarly, when the protrusion 160D at the end on the -Y direction side is offset in the +Y direction from the end of the drain electrode 150D on the -Y direction side, the end of the region 160DA in the -Y direction may be the -Y direction side surface (side surface parallel to the XZ plane) of the protrusion 160D at the end on the -Y direction side. Here, as an example, the description will be given assuming that the region 160DA has the same size as the drain electrode 150D in a planar view.

[0032] Fig. 1A, which is a cross section taken along the line AA in Fig. 2A, is a cross section including protrusion 160D, and Fig. 1B, which is a cross section taken along the line BB in Fig. 2A, is a cross section not including protrusion 160D. For this reason, Fig. 1A shows protrusion 160D and region 160DA. In Fig. 1A, region 160DA is shown slightly larger and outside the outline of protrusion 160D, but region 160DA and protrusion 160D are equal in size when viewed in the XZ plane. Fig. 1B also shows region 160DA.

[0033] The plurality of protrusions 160D contact the 2DEG 120A because they extend below the upper surface of the electron transit layer 120. The 2DEG 120A is also formed in a portion of the electron transit layer 120 included in the region 160DA.

[0034] In this semiconductor device 100, the protrusions 160S and 160D extend in the X direction and are arranged parallel to the direction in which current flows in the electron transit layer 120 (-X direction), and therefore do not disrupt the flow of current in the electron transit layer 120. Although details of the manufacturing method will be described later, when recesses are formed in the electron supply layer 140, the spacer layer 130, and the electron transit layer 120 to form the protrusions 160S and 160D, the portion of the electron transit layer 120 near the top surface is not disrupted in the X direction, which has the advantage that the region where 2DEG is obtained is not disrupted in the X direction. Note that the protrusions 160S and 160D only need to extend along the X direction and do not have to extend parallel to the X direction.

[0035] <Configuration of Passivation Film 170> The passivation film 170 is an insulating film and a protective film provided on a portion of the upper surface of the electron supply layer 140 that is not covered by the source electrode 150S and the drain electrode 150D. The passivation film 170 can be made of SiN or the like. The thickness of the passivation film 170 is between 2 nm and 100 nm, and is, for example, 50 nm.

[0036] <Offset amount of protrusions 160S and 160D> FIG. 3A is a diagram showing the offset amount X1 of the end of the protrusion 160S relative to the source electrode 150S of the semiconductor device 100. FIG. 3B is a diagram showing the relationship between the offset amount X1 and the contact resistance Rc. In FIG. 3B, the horizontal axis represents the offset amount X1 (μm), and the vertical axis represents the contact resistance Rc between the source electrode 150S and the electron transit layer 120. The contact resistance Rc is expressed as resistivity (Ω·mm). Note that FIG. 3B shows the results obtained from an experiment.

[0037] 3A, the offset amount X1 is the amount of offset of the +X direction end of the protrusion 160S relative to the +X direction end of the source electrode 150S, and is shown as a positive value when the +X direction end of the protrusion 160S is located closer to the -X direction than the +X direction end of the source electrode 150S as shown in Fig. 3A. In other words, when the +X direction end of the protrusion 160S is offset in the +X direction from the +X direction end of the source electrode 150S, the offset amount X1 is a negative value.

[0038] 3B, when the offset amount X1 is a negative value (X1<0), the protrusion 160S protrudes in the +X direction more than the end of the source electrode 150S in the +X direction, and is closer to the gate electrode 150G. In this case, it was found that the contact resistance Rc increases (deteriorates). This is because the extension of the protrusion 160S in the +X direction reduces the area of ​​the 2DEG 120A in a plan view in the region 160SA including the protrusion 160S, and the increased resistance is added to the contact resistance Rc.

[0039] In contrast, when the +X-direction end of the source electrode 150S and the +X-direction end of the protrusion 160S are positioned at the same X-direction position, or when the +X-direction end of the protrusion 160S is farther from the gate electrode 150G than the +X-direction end of the source electrode 150S (X1 ≥ 0), the contact resistance Rc decreases from X1 = 0 μm to approximately 0.1 μm. As X1 increases, the contact resistance Rc also increases, but good values ​​are obtained up to approximately 0.3 μm. When X1 exceeds 0.3 μm, the contact resistance Rc tends to increase further. This is due to the additional series resistance of the 2DEG 120A section, which increases by the distance X1. The contact resistance Rc falls below 0.4 Ω·mm, which is one indicator, when X1 is between 0 μm and 0.25 μm.

[0040] From the above, it is preferable that the +X-direction end of the source electrode 150S and the +X-direction end of the protrusion 160S are positioned at the same X-direction position, or that the +X-direction end of the protrusion 160S is farther from the gate electrode 150G than the +X-direction end of the source electrode 150S (X1≧0), and furthermore, it is preferable that the offset amount X1 is 0 μm or more and 0.25 μm or less.

[0041] Note that, although the offset amount X1 of the +X-direction end of the protrusion 160S relative to the +X-direction end of the source electrode 150S has been described here, the same applies to the offset amount of the -X-direction end of the protrusion 160D relative to the -X-direction end of the drain electrode 150D.

[0042] <Volume ratio of the protrusions 160S and 160D in the regions 160SA and 160DA> 4 is a diagram showing the relationship between the volume ratio of the protrusions 160S in the region 160SA and the contact resistance Rc. This relationship was obtained through an experiment. Here, the volume ratio of the metal material of the plurality of protrusions 160S in the region 160SA will be described, but the same applies to the volume ratio of the metal material of the plurality of protrusions 160D in the region 160DA.

[0043] In FIG. 4, the characteristics of the contact resistance Rc versus the volume ratio when the offset amount X1 is −0.12 μm are shown by a solid line, and the characteristics of the contact resistance Rc versus the volume ratio when the offset amount X1 is 0.08 μm are shown by a dashed line.

[0044] 4, when the volume ratio was increased from 47.5%, it was found that the contact resistance Rc increased as the volume ratio increased. This is thought to be because, as the volume ratio increased, the volume of the protrusions 160S increased, and the 2DEG 120A of the electron transit layer 120 located between the multiple protrusions 160S decreased.

[0045] In both cases where the offset amount X1 is -0.12 μm and 0.08 μm, the rate of increase in contact resistance Rc becomes even larger when the volume ratio is increased from 47.5% to exceed 60%, so it was found that it is preferable for the volume ratio of the multiple protrusions 160S in region 160SA to be 60% or less.

[0046] <Position of the bottom surface of the protrusions 160S and 160D and contact resistance Rc> Fig. 5A is a diagram showing the position H in the height direction of the bottom surface of protrusion 160S. Fig. 5B is a diagram showing the relationship between the position H and the contact resistance Rc. The relationship shown in Fig. 5B was obtained through an experiment. Here, the position of the bottom surface of protrusion 160S will be described, but the same applies to the position of the bottom surface of protrusion 160D.

[0047] Here, the height direction refers to the Z direction, and the bottom surface of the protrusion 160S is the lower surface of the protrusion 160S. Position H represents the height position (nm) of the bottom surface of the protrusion 160S from the top surface of the electron transit layer 120. Since the top surface of the electron transit layer 120 is the interface between the channel and the spacer layer 130, position H represents the height position of the bottom surface of the protrusion 160S from the interface between the channel and the spacer layer 130. When position H is 0 nm, the bottom surface of the protrusion 160S is at the same height as the interface between the channel and the spacer layer 130. Position H takes a positive value when the bottom surface of the protrusion 160S is higher (located in the +Z direction) than the interface between the channel and the spacer layer 130. Position H takes a negative value when the bottom surface of the protrusion 160S is lower (located in the -Z direction) than the interface between the channel and the spacer layer 130.

[0048] As shown in Figure 5B, when the position H was increased from -28 nm to 0 nm, the contact resistance Rc gradually decreased as the position H moved from -28 nm to -8 nm, and good values ​​of contact resistance Rc were obtained at positions above -20 nm. It was also found that the contact resistance Rc remained roughly constant from -8 nm to -3 nm, but increased rapidly when the position H was increased beyond -3 nm. In particular, the contact resistance Rc increased rapidly when the position H value exceeded 0 nm.

[0049] Thus, it was found that when the bottom surface of the protrusion 160S is below the upper surface of the electron transit layer 120 (the interface between the channel and the spacer layer 130), the contact resistance Rc is low, but when the bottom surface of the protrusion 160S is located above the interface between the channel and the spacer layer 130, the contact resistance Rc increases sharply.

[0050] From the above, it was found that the contact resistance Rc exhibits a favorable value when the position H is in the range of −20 nm to −3 nm. Here, if the position H of the bottom surface of the protrusion 160S is expressed as a position in the depth direction, with the depth from the top surface of the electron transit layer 120 being positive, then the position H being −20 nm to −3 nm means that the bottom surface of the protrusion 160S is located at a position in the depth direction 3 nm to 20 nm from the top surface of the electron transit layer 120.

[0051] <Density of protrusions 160S and 160D> Fig. 6A is a diagram showing the width Wm and spacing Ws of the protrusions 160S. Fig. 6B is a diagram showing the relationship between the density of the protrusions 160S and the contact resistance Rc. The relationship shown in Fig. 6B was obtained by simulation. Here, the relationship between the density of the protrusions 160S and the contact resistance Rc will be described, but the same applies to the relationship between the density of the protrusions 160D and the contact resistance Rc.

[0052] The width Wm is the width of the protrusion 160S in the Y direction. The interval Ws is the interval between adjacent protrusions 160S, and corresponds to the width in the Y direction of the nitride semiconductor layers (the electron transit layer 120, the spacer layer 130, and the electron supply layer 140) between the adjacent protrusions 160S.

[0053] The density D of the protrusions 160S is a density that indicates how many protrusions 160S are arranged per 1 μm in the Y direction in the region 160SA. -1 ) can be expressed by the following formula (1): The unit of density D is synonymous with particles / μm. D=(Wm+Ws) -1 (1)

[0054] The contact resistance Rc was calculated by changing the density D while setting the spacing Ws to 5.0 μm, 0.5 μm, and 0.2 μm, and the results shown in FIG. 6B were obtained. When the spacing Ws was fixed and the density D was changed, the width Wm was changed. At all spacing Ws, the contact resistance Rc tended to increase as the density D decreased. This is because the metal portion of the protrusion 160S decreased.

[0055] Here, from the viewpoint of obtaining a good contact resistance Rc, the lower limit of the density D is set to 0.2 μm -1 In addition, when forming the plurality of protrusions 160S arranged in the Y direction in the region 160SA, the upper limit of the density D was set to 5.0 μm -1 The density D was set to 5.0 μm. -1 If the thickness exceeds this value, it becomes difficult to form the plurality of protrusions 160S.

[0056] 6B also shows that by setting the spacing Ws to various values ​​such as 5.0 μm, 0.5 μm, and 0.2 μm, it is possible to obtain a density D at which the contact resistance Rc is equal to or less than a predetermined value (for example, 0.5 Ω mm). Therefore, the contact resistance Rc can be reduced by selecting the spacing Ws according to the density D.

[0057] From the above, the density D is 0.2 μm -1 That's 5.0μm -1 The following ranges have been found to be preferred:

[0058] <Method of Manufacturing the Semiconductor Device 100> 7A to 7I are diagrams illustrating a manufacturing method of the semiconductor device 100. FIGS. 7A, 7C, and 7H show cross sections parallel to the XZ plane during the manufacturing process of the semiconductor device 100. FIGS. 7B, 7D, 7E, 7F, 7G, and 7I show cross sections parallel to the YZ plane corresponding to a portion of the semiconductor device 100 shown in FIG. 2B, showing the cross-sectional structure of a portion of the semiconductor device 100 during the manufacturing process. FIGS. 7A and 7B show cross sections during the same manufacturing process, FIGS. 7C and 7D show cross sections during the same manufacturing process, and FIGS. 7H and 7I show cross sections during the same manufacturing process.

[0059] 7A and 7B, an initial layer 111, an electron transit layer 120, a spacer layer 130, and an electron supply layer 140 are epitaxially grown in this order by MOCVD (Metal Organic Chemical Vapor Deposition) on a substrate 110. By forming the electron supply layer 140 above the electron transit layer 120, a 2DEG 120A is generated directly below the interface between the electron transit layer 120 and the spacer layer 130.

[0060] Next, an inactive region is formed by an element isolation process (not shown) to define an active region. Specifically, a resist pattern having openings in the regions where the element isolation regions are to be formed is formed by photolithography. Next, the inactive region is formed by implanting argon (Ar) ions into the nitride semiconductor layer (electron transit layer 120, spacer layer 130, electron supply layer 140) in regions where the resist pattern is not formed. The inactive region may be formed by removing a portion of the nitride semiconductor layer in the regions where the resist pattern is not formed by dry etching such as RIE (Reactive Ion Etching) using a chlorine-based gas. After the element isolation region is formed, the resist pattern is removed using an organic solvent or the like.

[0061] Next, as shown in Figures 7C and 7D, the source electrode 150S, the drain electrode 150D, the protrusions 160S, and the protrusions 160D are formed. Specifically, as shown in Figures 7E to 7G, Figures 7E to 7G show the cross-sectional structure of a portion including three of the four protrusions 160S shown in Figure 7I.

[0062] As shown in FIG. 7E, a pattern of resist 10 having openings 11 in the portions where protrusions 160S and 160D are to be formed is formed by photolithography or EB (electron beam) lithography.

[0063] Next, as shown in FIG. 7F, the electron supply layer 140, the spacer layer 130, and the electron transit layer 120 are removed from the portions located directly below the openings 11 where the resist 10 is not present, thereby forming recesses 160H. Dry etching such as RIE using a chlorine-based gas is used for the removal. The etching depth when forming the recesses 160H is deeper than the interface between the channel and the spacer layer 130 (the upper surface of the electron transit layer 120), and the depth of the recesses 160H from the interface between the channel and the spacer layer 130 is preferably 3 nm or more and 20 nm or less. The resist 10 is then removed.

[0064] Here, the recess 160H extends in the X direction, similar to the protrusions 160S and 160D to be formed later, and thus has a longitudinal direction parallel to the X direction. Therefore, the portion of the electron transit layer 120 close to the top surface is not divided in the X direction, and the region where the 2DEG 120A is obtained is not divided in the X direction. For example, if the longitudinal direction were in the Y direction, the region where the 2DEG 120A is obtained would be divided in the X direction. Since the recess 160H has a longitudinal direction parallel to the X direction, the portion of the electron transit layer 120 close to the top surface is not divided in the X direction. Therefore, an increase in the sheet resistance Rsh of the electron transit layer 120 can be suppressed, and the current can be increased.

[0065] Next, a resist pattern having openings is formed on the upper surface of the electron supply layer 140 by photolithography, over the regions where the source electrode 150S and the drain electrode 150D are to be formed. Then, a metal is deposited by vacuum deposition. For example, the metal may be a laminated film with a first layer of 2 to 50 nm of Ti and a second layer of 100 to 300 nm of Al. At this time, the protrusions 160S and 160D are formed inside the recesses 160H for the protrusions 160S and 160D. After that, lift-off technology is used to remove the metal other than the source electrode 150S and the drain electrode 150D, resulting in the structure shown in FIG. 7G. The source electrode 150S, the drain electrode 150D, and the protrusions 160S and 160D are formed from the same electrode material.

[0066] Next, a heat treatment (alloying treatment) is performed in a nitrogen atmosphere at 500°C to 650°C to establish ohmic contact between the source electrode 150S and the protrusion 160S and the drain electrode 150D and the protrusion 160D. This forms the source electrode 150S, the drain electrode 150D, the protrusion 160S, and the protrusion 160D. Furthermore, surface damage to the nitride semiconductor layer can be minimized.

[0067] The protrusions 160S and 160D have a structure in which the metallic thin walls used in the source electrode 150S and the drain electrode 150D and the nitride semiconductor layers are alternately arranged in the Y direction, and the longitudinal direction (X direction) of the arranged nitride semiconductor layers and metallic thin walls in a plan view is the same as the direction of current flow (-X direction). As described with reference to FIG. 4, the volume ratio of the metal in the protrusions 160S and 160D in the regions 160SA and 160SD is preferably 60% or less in order to reduce the contact resistance Rc. As described with reference to FIGS. 3A and 3B, the regions 160SA and 160DA in which the protrusions 160S and 160D are respectively arranged are preferably farther from the gate electrode 150G than the source electrode 150S and the drain electrode 150D in order to reduce the contact resistance Rc. The offset X1 is preferably 0 μm or more and 0.25 μm or less, as described with reference to FIGS. 3A and 3B.

[0068] Next, as shown in FIG. 7H, an insulating film that will become the passivation film 170 is formed on the electron supply layer 140 by plasma CVD (chemical vapor deposition). A cross section parallel to the YZ plane including the source electrode 150S at this time is as shown in FIG. 7I. The insulating film can be formed of SiN or the like, and has a film thickness between 2 nm and 100 nm, for example, 50 nm. The insulating film may also be formed by ALD (atomic layer deposition) or sputtering. The insulating film may also be formed of an oxide, nitride, or oxynitride of Si, Al, hafnium (Hf), zirconium (Zr), tantalum (Ta), or the like, other than SiN, or a laminate film of these.

[0069] Next, the gate electrode 150G is formed, resulting in the cross-sectional structure shown in FIGS. 1A and 1B. Specifically, a resist pattern having an opening in the area where the gate electrode 150G is to be formed is formed, and metal is deposited by vacuum deposition. For example, a laminated film can be formed with a first layer of Ni having a thickness of 5 nm to 30 nm and a second layer of Au having a thickness of 100 nm to 300 nm. Then, the metal other than the gate electrode 150G is removed together with the resist by lift-off. Through the above steps, the semiconductor device 100 having the structure shown in FIGS. 1A, 1B, 2A, and 2B can be fabricated.

[0070] <Effects> As described above, in the semiconductor device 100, the protrusions 160S and 160D extend from the lower surfaces (lower ends) of the source electrode 150S and the drain electrode 150D, respectively, through the electron supply layer 140 and the spacer layer 130, and below the upper surface of the electron transit layer 120. The protrusions 160S and 160D are formed from the electrode material of the source electrode 150S and the drain electrode 150D. Therefore, the protrusions 160S and 160D are in contact with the 2DEG 120A formed inside the electron transit layer 120. Furthermore, the volume ratios of the multiple protrusions 160S and the multiple protrusions 160D in the regions 160SA and 160DA are both 60% or less. This allows the contact resistance Rc to be kept low.

[0071] Therefore, it is possible to provide a semiconductor device 100 capable of reducing the contact resistance Rc, and a manufacturing method for the semiconductor device 100. Furthermore, by setting the Al composition ratio in the electron supply layer 140 to 45% or more, it is possible to form the source electrode 150S and the drain electrode 150D with low contact resistance Rc at a relatively low temperature (<650°C) even in a structure including the spacer layer 130.

[0072] Furthermore, in order to achieve communication speeds of 100 Gbps in the next-generation communications technology, Beyond 5G (Fifth Generation) / 6G (Sixth Generation), the use of ultra-high frequency radio waves, such as those in the 100 GHz or 300 GHz bands, is being considered. These are frequency bands known as millimeter waves. The problem with using ultra-high frequency radio waves is that the communication distance is short. Specifically, this is due to the fact that ultra-high frequency radio waves are attenuated more in the atmosphere than radio waves used in 5G or earlier communication generations. However, there is a problem in that amplifiers with sufficient output power do not exist. For this reason, there is an urgent need to develop high-output amplifiers that operate in ultra-high frequency bands. The semiconductor device 100 can increase the current in the electron transit layer 120 by reducing the contact resistance, and therefore can be used as an amplifier such as a power amplifier that amplifies signals in the ultra-high frequency band.

[0073] Conventional techniques for achieving ohmic contact include recess ohmic technology, selective regrowth, and ion implantation. Recess ohmic technology is a technique for thinning (recessing) the electron supply layer, which acts as a barrier between the metal and the channel. While this technique has the advantage of requiring a relatively low heat treatment temperature of approximately 600°C, it is difficult to reduce the contact resistance Rc between the metal and the nitride semiconductor layer. Selective regrowth is a growth method for forming n-GaN using crystal growth technology, but requires a high-temperature process of approximately 800°C during crystal growth, which inevitably leads to high sheet resistance Rsh due to surface damage. Ion implantation is a method for forming n-GaN using ion implantation technology, but requires a high-temperature process of over 1000°C for impurity activation, which inevitably leads to high sheet resistance Rsh due to surface damage. Given these circumstances, two requirements for techniques for achieving ohmic contact are low resistance between the metal and the nitride semiconductor layer and a heat treatment temperature of 650°C or less. The semiconductor device 100 is very promising in that it satisfies these two requirements.

[0074] Furthermore, the multiple protrusions 160S are thin plate-like protrusions that extend along the X direction connecting the source electrode 150S and the drain electrode 150D in a plan view and are arranged in the Y direction intersecting the X direction in a plan view, while the multiple protrusions 160D are thin plate-like protrusions that extend along the X direction and are arranged in the Y direction. Therefore, the multiple protrusions 160S and 160D extend in the direction of current flow (-X direction) in the electron transit layer 120 and do not disrupt the flow of current in the electron transit layer 120. In the manufacturing process, when recesses 160H (see FIG. 7F ) are formed in the electron supply layer 140, the spacer layer 130, and the electron transit layer 120 to form the protrusions 160S and 160D, the portion of the electron transit layer 120 near the top surface is not disrupted in the X direction. This avoids disrupting the region where the 2DEG 120A is obtained in the X direction. Furthermore, even if the protrusions 160S are provided, it is possible to suppress an increase in the sheet resistance Rsh of the electron transit layer 120. Therefore, it is possible to provide a semiconductor device 100 that can increase the current in the electron transit layer 120.

[0075] Furthermore, the ends of the multiple protrusions 160S on the drain electrode 150D side in the X direction are offset in a direction away from the drain electrode 150D relative to the ends of the source electrode 150S on the drain electrode 150D side in the X direction. Similarly, the ends of the multiple protrusions 160D on the source electrode 150S side in the X direction are offset in a direction away from the source electrode 150S relative to the ends of the drain electrode 150D on the source electrode 150S side in the X direction. This makes it possible to reduce the contact resistance Rc between the source electrode 150S and the drain electrode 150D and the electron transit layer 120.

[0076] Furthermore, the offset amount X1 in the X direction of the multiple protrusions 160S and 160D is 0 μm or more and 0.25 μm or less. This makes it possible to more effectively reduce the contact resistance Rc between the source electrode 150S and the drain electrode 150D and the electron transit layer 120, and to provide the semiconductor device 100 and the method for manufacturing the semiconductor device that can more effectively reduce the contact resistance Rc.

[0077] The bottom surfaces of the multiple protrusions 160S and 160D are located at a depth of 3 nm to 20 nm from the top surface of the electron transit layer 120. This also makes it possible to more effectively reduce the contact resistance Rc between the source electrode 150S and the electron transit layer 120 and between the drain electrode 150D and the source electrode 150S and the drain electrode 150D and the electron transit layer 120, and thus makes it possible to provide a semiconductor device 100 and a method for manufacturing a semiconductor device that can more effectively reduce the contact resistance Rc.

[0078] Furthermore, since the electron transit layer 120 has the region 160SA and the 2DEG 120A inside the region 160SA, even if the protrusions 160S and 160D are formed to a depth position that reaches the inside of the electron transit layer 120, a channel can be generated by the 2DEG 120A inside the regions 160SA and 160DA, and it is possible to provide a semiconductor device 100 with good operating characteristics and a method for manufacturing a semiconductor device.

[0079] The density D of the protrusions 160S in the Y direction in the region 160SA and the density D of the protrusions 160D in the Y direction in the region 160DA are 0.2 μm -1 That's 5.0μm -1 Since the distance Ws is selected according to the density D, the contact resistance Rc can be reduced.

[0080] <Embodiment 2> Figures 8A and 8B are diagrams showing a cross-sectional structure of a semiconductor device 100A of embodiment 2. Figure 8C is a diagram showing a cross-sectional structure of a portion of the semiconductor device 100A. The cross sections shown in Figures 8A and 8B correspond to the cross sections shown in Figures 1A and 1B of embodiment 1, respectively, and the cross section shown in Figure 8C corresponds to the cross section shown in Figure 2B.

[0081] <Configuration of Semiconductor Device 100A> The semiconductor device 100A has a configuration in which a metal portion 165 is added to the inside of the spacer layer 130 and the electron supply layer 140 of the nitride semiconductor layer inside the regions 160SA and 160DA, compared to the semiconductor device 100 of embodiment 1. The following mainly describes the differences from the semiconductor device 100 of embodiment 1.

[0082] The metal portion 165 is a substantially cylindrical metal portion extending from the upper surface of the electron supply layer 140 to the interior of the spacer layer 130. Such metal portion 165 is formed by forming pits (holes) penetrating from the upper surface of the electron supply layer 140 in the regions 160SA and 160DA to the interior of the spacer layer 130, and then filling the pits with the metal material of the source electrode 150S and the drain electrode 150D by vapor deposition or the like. Note that FIGS. 8B and 8C show a state in which the metal portion 165 extends to the lower surface of the spacer layer 130. However, when forming the pits by wet etching, an etching solution may be selected that automatically stops etching inside the spacer layer 130. As a result, the lower end of the pit is located between the upper and lower surfaces of the spacer layer 130 (inside the spacer layer 130), and the lower end of the metal portion 165 is also located inside the spacer layer 130.

[0083] The metal portion 165 is provided inside the electron supply layer 140 and the spacer layer 130 in the regions 160SA and 160DA, and therefore does not exist in the cross section shown in Fig. 8A, but exists in the cross section of Fig. 8B, which does not include the protrusions 160S and 160D. The cross-sectional structure in the XZ plane is as shown in Fig. 8C.

[0084] In the nitride semiconductor layer in which the metal portion 165 is provided inside the regions 160SA and 160DA, the proportion of the metal portion 165 is adjusted so that the volume ratio of the elements constituting the nitride semiconductor layer is 80% or more. In other words, in the nitride semiconductor layer in which the metal portion 165 is provided inside the regions 160SA and 160DA, the proportion of the metal portion 165 is adjusted so that the volume ratio of the metal constituting the metal portion 165 is lower than 20%.

[0085] The metal portion 165 is provided to reduce the contact resistance Rc, but if the proportion of the metal portion 165 is too high, the resistance of the metal portion 165 will be added to the contact resistance Rc. The figure of 80% is a value obtained through experiments and simulations.

[0086] <Method of Manufacturing Semiconductor Device 100A> The method for manufacturing the semiconductor device 100A is the same as the method for manufacturing the semiconductor device 100 of Embodiment 1 up to the steps described in Embodiment 1 using Figures 7A and 7B, so the steps after the steps shown in Figures 7A and 7B will be described using Figures 8D to 8G. Figures 8D to 8G are views for explaining the method for manufacturing the semiconductor device 100A of Embodiment 2.

[0087] It is assumed that an initial layer 111, an electron transit layer 120, a spacer layer 130, and an electron supply layer 140 are formed on a substrate 110 (see FIGS. 7A and 7B), and that an element isolation process has also been completed.

[0088] 8D, pits 140P are formed. In the nitride semiconductor layer in which metal portions 165 are provided inside regions 160SA and 160DA, the number and size of pits 140P in which metal portions 165 are to be formed later may be adjusted so that the elements constituting the nitride semiconductor layer occupy 80% or more in volume ratio.

[0089] A protective film (e.g., SiN) having openings in the regions where the pits 140P are to be formed is formed within the regions where the regions 160SA and 160DA are to be formed, and the pits 140P are then formed by wet etching. Examples of the chemical solution that can be used include tetramethylammonium hydroxide (TMAH), potassium hydroxide, sodium hydroxide, sulfuric acid, hydrogen peroxide, or a mixture thereof. The solution temperature and stirring speed may be changed to enhance the etching power. In particular, by immersing the substrate in approximately 25 wt% TMAH heated to approximately 80°C, etching proceeds from crystal defects or the like, forming pits 140P with diameters of several nanometers to several tens of nanometers. It is also possible to automatically stop the etching in the depth direction at the spacer layer 130. The protective film is then removed. This allows the pits 140P to be formed in the regions where the regions 160SA and 160DA are to be formed, extending from the top surface of the electron supply layer 140 to the spacer layer 130.

[0090] Next, photolithography or EB lithography is used to form a pattern of resist 10A having openings 11 in the areas where the protrusions 160S and 160D will be formed. The electron supply layer 140, spacer layer 130, and electron transit layer 120 directly below the openings 11, where the resist 10A is not present, are then removed to obtain the structure shown in FIG. 8E. Dry etching such as RIE using a chlorine-based gas is used to remove the electron supply layer 140, spacer layer 130, and electron transit layer 120. The etching depth is preferably deeper than the interface between the channel and spacer layer 130, and more preferably, the depth from the interface between the channel and spacer layer 130 (the upper surface of the electron transit layer 120) is 3 nm or more and 20 nm or less. The resist 10A is then removed to obtain the state shown in FIG. 8F.

[0091] Next, a resist pattern with openings corresponding to the regions where the source electrode 150S and the drain electrode 150D will be formed is formed by photolithography, and a metal is deposited by vacuum deposition. For example, a laminated film with a first layer of 2-50 nm Ti and a second layer of 100-300 nm Al may be used as the metal. After that, lift-off is used to remove the metal other than the source electrode 150S and the drain electrode 150D along with the resist, resulting in the structure shown in FIG. 8G, in which the source electrode 150S, the protrusion 160S, and the metal portion 165 are formed inside the pit 140P. While FIG. 8G shows the portion where the source electrode 150S is located in the Y direction, the same applies to the portion where the drain electrode 150D is located.

[0092] Furthermore, ohmic contact is established between the source electrode 150S and the protrusion 160S, the drain electrode 150D and the protrusion 160D, and the metal portion 165 by performing a heat treatment (alloying treatment) at 500° C. to 650° C. in a nitrogen atmosphere.

[0093] Thereafter, the semiconductor device 100A of Embodiment 2 is completed by forming a gate electrode 150G and a passivation film 170 in the same manner as in the semiconductor device 100 of Embodiment 1. In the semiconductor device 100A, protrusions 160S and 160D are formed in the regions 160SA and 160DA, respectively, in the same manner as in the semiconductor device 100 of Embodiment 1, and a metal portion 165 is formed inside the spacer layer 130 and the electron supply layer 140 of the nitride semiconductor layer inside the regions 160SA and 160DA.

[0094] In the nitride semiconductor layer in which the metal portion 165 is provided inside the regions 160SA and 160DA, the proportion of the metal portion 165 is adjusted so that the elements constituting the nitride semiconductor layer occupy 80% or more in volume ratio.

[0095] Therefore, it is possible to provide the semiconductor device 100A and the manufacturing method of the semiconductor device 100A that can further reduce the contact resistance by the protrusions 160S and 160D and the metal part 165.

[0096] <Embodiment 3> 9A and 9B are diagrams showing the cross-sectional structure of a semiconductor device 100B of embodiment 3. The cross section shown in Fig. 9A corresponds to the cross section shown in Fig. 1A of embodiment 1, and the cross section shown in Fig. 9B corresponds to the cross section shown in Fig. 2B.

[0097] The semiconductor device 100B has a configuration in which a cap layer 180 is added between the upper surface of the electron supply layer 140 of the semiconductor device 100 of embodiment 1 and the gate electrode 150G, the source electrode 150S, and the drain electrode 150D. The following mainly describes the differences from the semiconductor device 100 of embodiment 1.

[0098] The cap layer 180 is provided at the interfaces between the electron supply layer 140 and the source electrode 150S and the drain electrode 150D, and is an example of a sheet resistance reducing layer that reduces the sheet resistance Rsh of the 2DEG 120A.

[0099] The cap layer 180 can be formed of, for example, GaN, and is, for example, a nitride semiconductor layer (GaN cap layer) that can be fabricated by MOCVD after the step of FIG. 7B in the manufacturing method of the semiconductor device 100 of Embodiment 1. Such a cap layer 180 is also provided in the region 160SA as shown in FIG. 9B . Similarly, it is also provided in the region 160DA. Adding the cap layer 180 to the nitride semiconductor layers in the regions 160SA and 160DA further increases the density of the 2DEG 120A, and can reduce the sheet resistance Rsh of the electron transit layer 120.

[0100] Therefore, according to embodiment 3, it is possible to provide a semiconductor device 100B that can reduce the contact resistance Rc by the protrusions 160S and 160D and can reduce the sheet resistance Rsh by the cap layer 180, and a method for manufacturing the semiconductor device 100B.

[0101] <Embodiment 4> Fig. 10A is a diagram showing a cross-sectional structure of a semiconductor device 100C of embodiment 4. Fig. 10B is a diagram showing a cross-sectional structure of a portion of the semiconductor device 100C. The cross section shown in Fig. 10A corresponds to the cross section shown in Fig. 1A of embodiment 1, and the cross section shown in Fig. 10B corresponds to the cross section shown in Fig. 2B.

[0102] <Configuration of semiconductor device 100C> The semiconductor device 100C has a configuration including a passivation film 170C instead of the passivation film 170 of the semiconductor device 100 of embodiment 1. The following mainly describes the differences from the semiconductor device 100 of embodiment 1.

[0103] The passivation film 170C is an example of a sheet resistance reducing layer that is provided at the interface between the electron supply layer 140 and the source electrode 150S and the drain electrode 150D, like the cap layer 180 of the semiconductor device 100B of embodiment 3, and reduces the sheet resistance Rsh of the 2DEG 120A.

[0104] <Method of Manufacturing Semiconductor Device 100C> 10C to 10J are diagrams illustrating a manufacturing method of the semiconductor device 100C of embodiment 4. The process of epitaxially growing the initial layer 111, the electron transit layer 120, the spacer layer 130, and the electron supply layer 140 in this order on the substrate 110 by MOCVD, and the element isolation process are the same as those in the manufacturing method of the semiconductor device 100 of embodiment 1, and therefore descriptions thereof will be omitted here.

[0105] Next, as shown in FIGS. 10C and 10D, an insulating film that will become the passivation film 170C is formed on the electron supply layer 140 by plasma CVD. The insulating film is made of SiN or the like and has a thickness of 2 nm to 100 nm, for example, 50 nm. The insulating film may also be formed by ALD or sputtering. The insulating film may also be made of oxides, nitrides, or oxynitrides of elements other than SiN, such as Si, Al, Hf, Zr, or Ta, or a laminate film of these. At this stage, a heat treatment may be performed at 650° C. or less to reduce the sheet resistance Rsh of the electron transit layer 120.

[0106] Next, as shown in Figures 10E and 10F, protrusions 160S and 160D, source electrode 150S, and drain electrode 150D are formed. Specific details will be described using Figures 10G to 10I. Figures 10G to 10I show the portions corresponding to the source electrode 150S and protrusion 160S, but the portions corresponding to the drain electrode 150D and protrusion 160S are similar, so only the portions corresponding to the source electrode 150S and protrusion 160S and the portions corresponding to the drain electrode 150D and protrusion 160S will be described.

[0107] As shown in FIG. 10G, a pattern of resist 10C having openings 11 in the portions where protrusions 160S and 160D are to be formed is formed by photolithography or EB lithography.

[0108] Next, the passivation film 170C is removed from the region directly below the opening 11 where the resist 10C is not present. For example, if the passivation film 170C is made of SiN, dry etching such as RIE using a fluorine-based gas is used. Next, the electron supply layer 140, the spacer layer 130, and the electron transit layer 120 are removed from the region where the resist 10C and the passivation film 170C are not present. Dry etching such as RIE using a chlorine-based gas is used for removal. The etching depth at this time is deeper than the interface between the channel and the spacer layer 130, and preferably the depth from the interface between the channel and the spacer layer 130 (the upper surface of the electron transit layer 120) is 3 nm or more and 20 nm or less. After that, the remaining resist 10C is removed, resulting in the state shown in FIG. 10H.

[0109] Next, a resist pattern having openings in the areas where the source electrode 150S and the drain electrode 150D will be formed is formed by photolithography, and a metal for forming the source electrode 150S and the drain electrode 150D is deposited by vacuum deposition. For example, a laminated film with a first layer of Ti 2 nm to 50 nm and a second layer of Al 100 nm to 300 nm can be used as the metal. After that, lift-off technology is used to remove the metal other than the source electrode 150S and the drain electrode 150D, resulting in the structure shown in FIG. 10I. While FIG. 10I shows the portion where the source electrode 150S is located in the Y direction, the same applies to the portion where the drain electrode 150D is located.

[0110] Furthermore, heat treatment (alloying treatment) is performed in a nitrogen atmosphere at 500° C. to 650° C. to establish ohmic contact between the source electrode 150S and the protrusion 160S and the drain electrode 150D and the protrusion 160D.

[0111] Thereafter, a resist pattern having an opening corresponding to the region where the gate electrode 150G is to be formed is formed on the passivation film 170C, and metal is deposited by vacuum deposition. For example, a laminated film can be formed in which the first layer is made of Ni with a thickness of 5 to 30 nm and the second layer is made of Au with a thickness of 100 to 300 nm. Then, the metal other than the gate electrode 150G is removed together with the resist by lift-off. Through these steps, the semiconductor device 100D of the fourth embodiment shown in FIG. 10A is completed.

[0112] In the semiconductor device 100C, a passivation film 170C is provided between the electron supply layer 140 and the source electrode 150S and the drain electrode 150D in the regions 160SA and 160DA, thereby further increasing the density of the 2DEG 120A and reducing the sheet resistance Rsh of the electron transit layer 120.

[0113] Therefore, according to embodiment 4, it is possible to provide a semiconductor device 100C and a method for manufacturing the semiconductor device 100C, in which the contact resistance Rc can be reduced by the protrusions 160S and 160D and the sheet resistance Rsh can be reduced by the passivation film 170C.

[0114] <Embodiment 5> FIG. 11A is a diagram showing a cross-sectional structure of a semiconductor device 100D of embodiment 5. FIGS. 11B and 11C are diagrams showing a cross-sectional structure of a portion of the semiconductor device 100D. The cross section shown in FIG. 11A corresponds to the cross section shown in FIG. 1A of embodiment 1, and the cross section shown in FIG. 11B corresponds to the cross section shown in FIG. 2B and includes a source electrode 150S. FIG. 11C shows a cross section including a drain electrode 150D corresponding to the cross section shown in FIG. 11B. The following mainly describes the differences from the semiconductor device 100 of embodiment 1.

[0115] As shown in Fig. 11A, the cross-sectional structure of the semiconductor device 100D as viewed in the XZ plane is similar to that of the semiconductor device 100 of embodiment 1 shown in Fig. 1A. Moreover, as shown in Fig. 11B, the cross section including the source electrode 150S as viewed in the YZ plane is also similar to that of the semiconductor device 100 of embodiment 1 shown in Fig. 2B.

[0116] 11C, in semiconductor device 100D, the Y-direction width of protrusion 160D is set wider than the Y-direction width of protrusion 160S shown in FIG. 11B. Because protrusions 160S and 160D have the same X-direction length, the volume ratio of protrusion 160D in region 160DA is greater than the volume ratio of protrusion 160S in region 160SA. As an example, the volume ratio of protrusion 160S in region 160SA is 50% or less, and the volume ratio of protrusion 160D in region 160DA is greater than 50% but not greater than 60%.

[0117] By setting such a volume ratio relationship, the contact resistance Rc of the source electrode 150S becomes lower than the contact resistance Rc of the drain electrode 150D because the protrusion 160S is smaller than the protrusion 160D, and the low resistance component of the 2DEG 120A becomes greater in the region 160SA than in the region 160DA.

[0118] By keeping the contact resistance Rc of the source electrode 150S low, the transconductance is improved, and the high-frequency amplification capability can be improved. Furthermore, by relatively increasing the contact resistance Rc of the drain electrode 150D, the voltage drop at the drain electrode 150D increases, making it possible to alleviate electric field concentration at the end of the gate electrode 150G on the drain electrode 150D side. This contributes to a high breakdown voltage and a low current collapse, leading to an improvement in the output power of the semiconductor device 100D. This is particularly useful when the semiconductor device 100D is used as a power amplifier.

[0119] The above describes the semiconductor device and the method for manufacturing the semiconductor device according to the exemplary embodiments of the present disclosure. However, the present invention is not limited to the specifically disclosed embodiments, and various modifications and changes are possible without departing from the scope of the claims. The following additional notes are provided regarding the above-described embodiments. (Appendix 1) A substrate; an electron transit layer provided above the substrate; an electron supply layer provided above the electron transit layer; a gate electrode, a source electrode, and a drain electrode provided above the electron supply layer; a plurality of first protrusions formed of the electrode material of the source electrode, the first protrusions extending from the lower end of the source electrode through the inside of the electron supply layer to a position below the upper surface of the electron transit layer; a plurality of second protrusions formed of an electrode material of the drain electrode, the second protrusions extending from a lower end of the drain electrode through the inside of the electron supply layer to a position below the upper surface of the electron transit layer; Including, A semiconductor device, wherein a first volume ratio of the plurality of first protrusions in a first region in which the plurality of first protrusions are provided is 60% or less, and a second volume ratio of the plurality of second protrusions in a second region in which the plurality of second protrusions are provided is 60% or less. (Appendix 2) the plurality of first protrusions are a plurality of thin plate-like protrusions that extend along a first direction connecting the source electrode and the drain electrode in a plan view and are arranged in a second direction that intersects with the first direction in a plan view, 2. The semiconductor device according to claim 1, wherein the second protrusions are thin plate-like protrusions that extend along the first direction and are arranged in the second direction. (Appendix 3) end portions of the plurality of first protrusions on the drain electrode side in the first direction are offset in a direction away from the drain electrode relative to an end portion of the source electrode on the drain electrode side in the first direction, A semiconductor device as described in Appendix 2, wherein the ends of the plurality of second protrusions on the source electrode side in the first direction are offset in a direction away from the source electrode than the end of the drain electrode on the source electrode side in the first direction. (Appendix 4) an offset amount of the plurality of first protrusions in the first direction is equal to or greater than 0 μm and equal to or less than 0.25 μm; 4. The semiconductor device according to claim 3, wherein an offset amount of the second protrusions in the first direction is not less than 0 μm and not more than 0.25 μm. (Appendix 5) the bottom surfaces of the plurality of first protrusions are located at a depth of 3 nm or more and 20 nm or less from the top surface of the electron transit layer, 5. The semiconductor device according to claim 2, wherein the bottom surfaces of the second protrusions are located at a depth of 3 nm to 20 nm from the top surface of the electron transit layer. (Appendix 6) The density of the plurality of first protrusions in the first region in the second direction and the density of the plurality of second protrusions in the second region in the second direction are 0.2 μm -1 That's 5.0μm -1 6. The semiconductor device according to any one of claims 2 to 5, wherein: (Appendix 7) 7. The semiconductor device according to claim 1, wherein a semiconductor layer within the first region or the second region of the electron supply layer or the electron transit layer has pits filled with metal, and the elements constituting the semiconductor layer account for 80% or more of the semiconductor layer. (Appendix 8) 7. The semiconductor device according to claim 1, wherein the first volume ratio is different from the second volume ratio. (Appendix 9) 9. The semiconductor device according to claim 8, wherein the first volume ratio is equal to or less than 50%, and the second volume ratio is greater than 50% and equal to or less than 60%. (Appendix 10) the first volume ratio is 50% or less, and the second volume ratio is greater than 50% and less than 60%; The first protrusion and the second protrusion have the same length in the first direction, 3. The semiconductor device according to claim 2, wherein the width of the second protrusion in the second direction is greater than the width of the first protrusion in the second direction. (Appendix 11) A substrate; forming an electron transit layer above the substrate; forming an electron supply layer above the electron transit layer; forming a plurality of first protrusions from an electrode material of the source electrode in a first planar region where a source electrode is to be formed above the electron supply layer, the first protrusions passing through the electron supply layer and extending to a position below an upper surface of the electron transit layer; forming a plurality of second protrusions from an electrode material of the drain electrode in a second planar region where a drain electrode is formed above the electron supply layer, the second protrusions passing through the electron supply layer and extending below the upper surface of the electron transit layer; forming a source electrode and a drain electrode connected to the plurality of first protrusions and the plurality of second protrusions, respectively, above the electron supply layer; forming a gate electrode above the electron supply layer; Including, A method for manufacturing a semiconductor device, wherein a first volume ratio of the plurality of first protrusions in a first region where the plurality of first protrusions are provided is 60% or less, and a second volume ratio of the plurality of second protrusions in a second region where the plurality of second protrusions are provided is 60% or less. [Explanation of symbols]

[0120] 100, 100A, 100B, 100C, 100D Semiconductor device 110 Substrate 111 Initial layer 120 Electron transit layer 120A 2DEG 130 spacer layer 140 Electron supply layer 140P Pit 150G gate electrode 150S Source Electrode 150D drain electrode 160S, 160D protrusion 160SA, 160DA area 165 Metal Part 170, 170C passivation film 180 cap layer

Claims

1. A substrate; an electron transit layer provided above the substrate; an electron supply layer provided above the electron transit layer; a gate electrode, a source electrode, and a drain electrode provided above the electron supply layer; a plurality of first protrusions formed of an electrode material of the source electrode, the first protrusions extending from a lower end of the source electrode through the inside of the electron supply layer to a position below an upper surface of the electron transit layer; a plurality of second protrusions formed of an electrode material of the drain electrode, the second protrusions extending from a lower end of the drain electrode through the inside of the electron supply layer to a position below the upper surface of the electron transit layer; Including, a first volume ratio of the plurality of first protrusions in a first region where the plurality of first protrusions are provided is 60% or less, and a second volume ratio of the plurality of second protrusions in a second region where the plurality of second protrusions are provided is 60% or less; the plurality of first protrusions are a plurality of thin plate-like protrusions that extend along a first direction connecting the source electrode and the drain electrode in a plan view and are arranged in a second direction that intersects the first direction in a plan view, the second protrusions are thin plate-like protrusions extending along the first direction and arranged in the second direction, end portions of the plurality of first protrusions on the drain electrode side in the first direction are offset in a direction away from the drain electrode with respect to an end portion of the source electrode on the drain electrode side in the first direction, end portions of the second protrusions on the source electrode side in the first direction are offset in a direction away from the source electrode with respect to an end portion of the drain electrode on the source electrode side in the first direction, an offset amount of the plurality of first protrusions in the first direction is equal to or greater than 0 μm and equal to or less than 0.25 μm; The semiconductor device, wherein the offset amount of the plurality of second protrusions in the first direction is not less than 0 μm and not more than 0.25 μm.

2. the bottom surfaces of the plurality of first protrusions are located at a depth of 3 nm or more and 20 nm or less from the top surface of the electron transit layer, 2 . The semiconductor device according to claim 1 , wherein the bottom surfaces of the second protrusions are located at a depth of 3 nm to 20 nm from the top surface of the electron transit layer.

3. The density of the plurality of first protrusions in the first region in the second direction and the density of the plurality of second protrusions in the second region in the second direction are 0.2 μm －１ That's 5.0 μm －１ 3. The semiconductor device according to claim 1, wherein:

4. 4. The semiconductor device according to claim 1, wherein a semiconductor layer within the first region or the second region of the electron supply layer or the electron transit layer has pits filled with metal, and elements constituting the semiconductor layer account for 80% or more of the semiconductor layer.

5. The semiconductor device according to claim 1 , wherein the first volume ratio is different from the second volume ratio.

6. 6. The semiconductor device according to claim 5, wherein said first volume ratio is equal to or less than 50%, and said second volume ratio is greater than 50% and equal to or less than 60%.

7. A substrate; forming an electron transit layer above the substrate; forming an electron supply layer above the electron transit layer; forming a plurality of first protrusions from an electrode material of the source electrode, the first protrusions passing through the electron supply layer and extending below an upper surface of the electron transit layer in a first planar region where a source electrode is to be formed above the electron supply layer; forming a plurality of second protrusions from an electrode material of the drain electrode in a second planar region where a drain electrode is to be formed above the electron supply layer, the second protrusions passing through the electron supply layer and extending to a position below the upper surface of the electron transit layer; forming a source electrode and a drain electrode connected to the plurality of first protrusions and the plurality of second protrusions, respectively, above the electron supply layer; forming a gate electrode above the electron supply layer; Including, a first volume ratio of the plurality of first protrusions in a first region where the plurality of first protrusions are provided is 60% or less, and a second volume ratio of the plurality of second protrusions in a second region where the plurality of second protrusions are provided is 60% or less; the plurality of first protrusions are a plurality of thin plate-like protrusions that extend along a first direction connecting the source electrode and the drain electrode in a plan view and are arranged in a second direction that intersects the first direction in a plan view, the second protrusions are thin plate-like protrusions extending along the first direction and arranged in the second direction, end portions of the plurality of first protrusions on the drain electrode side in the first direction are offset in a direction away from the drain electrode with respect to an end portion of the source electrode on the drain electrode side in the first direction, end portions of the second protrusions on the source electrode side in the first direction are offset in a direction away from the source electrode with respect to an end portion of the drain electrode on the source electrode side in the first direction, an offset amount of the plurality of first protrusions in the first direction is equal to or greater than 0 μm and equal to or less than 0.25 μm; The method for manufacturing a semiconductor device, wherein an offset amount of the plurality of second protrusions in the first direction is 0 μm or more and 0.25 μm or less.

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