semiconductor optical devices

Abstract

This semiconductor optical device comprises: a first cladding layer (102) that is formed on a substrate (101); a first conduction-type first semiconductor layer (103) that is formed on the first cladding layer (102); an active layer (104) that is formed on the first semiconductor layer (103); and an i-type or second conduction-type second semiconductor layer (105) that is formed on the active layer (104) in contact therewith. The semiconductor optical device also comprises plurality of third semiconductor layers (106-1, 106-2, 106-3, 106-N) of the second conduction-type that are formed on the second semiconductor layer (105).

Description

[Technical Field]

[0001] The present invention relates to semiconductor optical devices. [Background technology]

[0002] For example, there is an optical device with a thin-film structure in which a III-V semiconductor thin film with a thickness of approximately 200 to 400 nm is surrounded by an insulating material with a low refractive index such as SiO2 or air. As a structure that enables both the strong light confinement unique to optical devices with this thin-film structure and efficient current injection from the vertical direction, a vertical thin-film structure has been proposed in which a narrow (typically 400 nm or less) mesa for current injection is placed above the active layer of the thin-film structure (Patent Document 1).

[0003] In a typical thin film structure, semiconductors (e.g., InP) on the left and right sides of a buried active layer made of a multiple quantum well layer such as InGaAsP or InGaAlAs are doped n-type and p-type, respectively, and a lateral type in which carriers are injected from both of these is widely adopted (see Non-Patent Documents 1 to 3). On the other hand, according to the vertical injection type thin film structure of Patent Document 1, by making the current injection mesa (hereinafter referred to as the "first mesa") above the active layer narrow, for example, to about 400 nm or less, it is possible to prevent the optical mode in the cross section of the active layer from being absorbed by the first mesa, and while enabling current injection from the vertical direction, it is possible to obtain high optical confinement comparable to that of a lateral type. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] International Publication No. 2021 / 199137 [Non-patent literature]

[0005] [Non-Patent Document 1] S. Matsuo et al., "Directly modulated buried heterostructure DFB laser on SiO2 / Si substrate fabricated by regrowth of InP using bonded active layer", Optics Express, vol. 22, no. 10, pp. 12139-12147, 2014. [Non-patent document 2] S. Yamaoka et al., "Directly modulated membrane lasers with 108 GHz bandwidth on a high-thermal-conductivity silicon carbide substrate", Nature Photonics, vol. 15, pp. 28-35, 2021. [Non-patent document 3] E. KANNO et al., "Twin-mirror membrane distributed-reflector lasers using 20-μm-long active region on Si substrates", Optics Express, vol. 26, no. 2, pp. 1268-1277, 2018. Summary of the Invention [Problem to be solved by the invention]

[0006] In a thin-film structure, the thickness must be kept below a critical thickness, and if the cross-sectional area of ​​the active layer is to be increased, the length in the width direction must be increased. Increasing the cross-sectional area of ​​the active layer is important for increasing the power of active optical devices, such as increasing the output power of laser diodes (LDs), semiconductor optical amplifiers (SOAs), and increasing the maximum optical receive power of photodiodes (PDs).

[0007] However, in conventional vertical thin-film structures, the width of the p-type first mesa, which controls the device resistance, must be kept narrow, for example, 400 nm or less, as mentioned above, and the first mesa width cannot be expanded in line with the expansion of the active layer width. If the first mesa width were to be expanded beyond 400 nm, the optical mode would be significantly absorbed by the first mesa, compromising the strong optical confinement in the active layer, which is a feature of thin-film structures.

[0008] This means that in order to maintain strong optical confinement, the device resistance per active layer volume inevitably increases as the active layer width increases. For example, in the case of LDs and SOAs, the Joule heating limits the amount of current that can be injected, preventing higher output power. Furthermore, as the active layer width increases, the distance between the left and right edges of the active layer and the first mesa increases, which also leads to the problem of non-uniformity in carrier distribution. For example, in LDs and SOAs, holes cannot be supplied sufficiently to the edges of the active layer, resulting in non-uniform gain, and in PDs, photocarriers generated at the edges of the active layer cannot be quickly extracted.

[0009] These issues of device resistance and carrier non-uniformity are also common to lateral thin-film structures. In other words, even in lateral structures, the thickness of the p-type region is limited by the critical film thickness, making it difficult to reduce device resistance as the active layer width increases. Furthermore, because the n-type and p-type regions are formed at opposite poles separated by the active layer, increasing the active layer width leads to pronounced non-uniformities in the electron and hole distributions.

[0010] Therefore, in the conventional thin film structures, both vertical and horizontal, there is a problem in that it is difficult to increase the width of the active layer while maintaining a low device resistance per active layer volume and good uniformity of carrier distribution.

[0011] The present invention has been made to solve the above problems, and aims to expand the width of the active layer while satisfying strong optical confinement, low device resistance per active layer volume, good uniformity of current injection distribution throughout the active layer, and uniformity of optical mode distribution. [Means for solving the problem]

[0012] A semiconductor optical device according to the present invention includes a first cladding layer formed on a substrate, a first semiconductor layer of a first conductivity type formed on the first cladding layer, an active layer formed on the first semiconductor layer, a second semiconductor layer of an i-type or second conductivity type formed on and in contact with the active layer, a plurality of third semiconductor layers of the second conductivity type formed on the second semiconductor layer, a first electrode electrically connected to the first semiconductor layer, a second electrode electrically connected to the plurality of third semiconductor layers, and a second cladding layer formed between the first semiconductor layer and the second electrode. and a second cladding layer is filled between the third semiconductor layers. The plurality of third semiconductor layers are arranged in a direction perpendicular to the waveguide direction and parallel to the plane of the substrate. [Effects of the Invention]

[0013] As described above, according to the present invention, multiple third semiconductor layers for current injection are provided on the second semiconductor layer above the active layer, so that the width of the active layer can be expanded while satisfying strong optical confinement, low device resistance per active layer volume, good uniformity of current injection distribution throughout the active layer, and uniformity of optical mode distribution. [Brief explanation of the drawings]

[0014] [Figure 1] FIG. 1 is a diagram showing the configuration of a semiconductor optical device according to an embodiment of the present invention. [Figure 2] FIG. 2 is a diagram showing the configuration of another semiconductor optical device according to an embodiment of the present invention. [Figure 3] FIG. 3 is a block diagram showing a structure used to perform modal calculations on the characteristics of semiconductor optical devices. [Figure 4] FIG. 4 is a distribution diagram showing the intensity distribution of the fundamental mode calculated for various third semiconductor layer spacings G. [Figure 5] FIG. 5 is a characteristic diagram showing the relationship between the optical confinement factor of the active layer 104 and the gap G between adjacent third semiconductor layers. [Figure 6]FIG. 6 is a block diagram showing a structure used to perform modal calculations on the characteristics of semiconductor optical devices. [Figure 7] FIG. 7 is a distribution diagram showing the calculated intensity distribution of the TE00 mode (a) and the TE10 mode (b). [Figure 8A] FIG. 8A is a characteristic diagram showing the relationship between the optical confinement factor in the active layer 104 in the TE00 mode and the distance G between adjacent third semiconductor layers. [Figure 8B] FIG. 8B is a characteristic diagram showing the relationship between the optical confinement factor in the active layer 104 in the TE10 mode and the gap G between adjacent third semiconductor layers. DETAILED DESCRIPTION OF THE INVENTION

[0015] A semiconductor optical device according to an embodiment of the present invention will be described below with reference to Fig. 1. This semiconductor optical device includes a first cladding layer 102 formed on a substrate 101, a first semiconductor layer 103 of a first conductivity type formed on the first cladding layer 102, an active layer 104 formed on the first semiconductor layer 103, and a second semiconductor layer 105 of an i-type or second conductivity type formed on and in contact with the active layer 104. Light is generated in the active layer 104.

[0016] The active layer 104 extends (in the waveguide direction), for example, from the front to the back of the paper in Fig. 1. Fig. 1 shows a cross section of a plane perpendicular to the waveguide direction, and hereinafter, the plane perpendicular to the waveguide direction is referred to as the xy plane, the horizontal direction of the paper in Fig. 1 is referred to as the x direction, the vertical direction of the paper in Fig. 1 (the stacking direction of each layer) is referred to as the y direction, and the waveguide direction (optical axis direction) is referred to as the z direction. In this example, the active layer 104 and the second semiconductor layer 105 are formed to have the same area in a planar view, and the second semiconductor layer 105 overlaps the active layer 104 in a planar view.

[0017] The semiconductor optical device also includes a plurality of third semiconductor layers 106-1, 106-2, 106-3, and 106-N of a second conductivity type formed on the second semiconductor layer 105. The third semiconductor layers 106-1, 106-2, 106-3, and 106-N are configured for vertical current injection. Each of the third semiconductor layers 106-1, 106-2, 106-3, and 106-N has a mesa shape extending in the waveguide direction (z direction). The third semiconductor layers 106-1, 106-2, 106-3, and 106-N are arranged in a direction (x direction) perpendicular to the waveguide direction and parallel to the plane of the substrate 101. The third semiconductor layers 106-1, 106-2, 106-3, and 106-N can be disposed, for example, above a region where the active layer 104 is formed. Furthermore, the plurality of third semiconductor layers 106-1, 106-2, 106-3, and 106-N can also be extended outward from above the region where the active layer 104 is formed.

[0018] The semiconductor device also includes a first electrode 108 electrically connected to the first semiconductor layer 103, and a second electrode 109 electrically connected to the plurality of third semiconductor layers 106-1, 106-2, 106-3, and 106-N.

[0019] In this example, a plurality of contact layers 107-1, 107-2, 107-3, and 107-N are formed on the plurality of third semiconductor layers 106-1, 106-2, 106-3, and 106-N, respectively. A second electrode 109 is formed on the plurality of third semiconductor layers 106-1, 106-2, 106-3, and 106-N via the plurality of contact layers 107-1, 107-2, 107-3, and 107-N. A second cladding layer 110 is also formed between the first semiconductor layer 103 and the first electrode 108.

[0020] The substrate 101 may be made of, for example, silicon. The first cladding layer 102 may be made of, for example, an insulating material such as silicon oxide. The first semiconductor layer 103 may be made of, for example, n-type InP. In this case, the first conductivity type is n-type and the second conductivity type is p-type.

[0021] The active layer 104 may have a multiple quantum well structure consisting of well layers and barrier layers each made of different compositions of InGaAlAs, InGaAs, InGaAsP, etc. Alternatively, the active layer 104 may be made of a bulk compound semiconductor such as InGaAlAs, InGaAs, or InGaAsP.

[0022] The second semiconductor layer 105 can be made of, for example, p-type InP. Alternatively, the second semiconductor layer 105 can be made of a semiconductor having a refractive index between that of the third semiconductor layers 106-1, 106-2, 106-3, and 106-N and that of the active layer 104. By creating such a refractive index difference, a separate confined heterostructure (SCH) can be formed.

[0023] The plurality of third semiconductor layers 106-1, 106-2, 106-3, and 106-N may be made of, for example, p-type InP. The plurality of contact layers 107-1, 107-2, 107-3, and 107-N may be made of, for example, p-type InGaAs. The second cladding layer 110 may be made of, for example, silicon oxide. The second cladding layer 110 may also be made of a resin such as benzocyclobutene (BCB).

[0024] 2, the active layer 104 may have a fourth semiconductor layer 111 and a fifth semiconductor layer 112 formed on the first semiconductor layer 103 in contact with both side surfaces of the ridge pattern. The fourth semiconductor layer 111 and the fifth semiconductor layer 112 are non-conductive or low-conductive and may be made of, for example, i-type InP (i-InP). The fourth semiconductor layer 111 and the fifth semiconductor layer 112 may also be made of semi-insulating InP (SI-InP) that has been made highly resistive by doping with Fe or the like.

[0025] As in Patent Document 1, the thin film structure in which the active layer 104 is formed has a third semiconductor layer for hole current injection, but in this embodiment, the structure is characterized in that a plurality of third semiconductor layers 106-1, 106-2, 106-3, 106-N are provided at appropriate intervals. 1,i , the distance between the i-th third semiconductor layer and the (i+1)-th third semiconductor layer is G i-(i+1) The total number of third semiconductor layers is defined as N. The width of the active layer 104 is defined as W2. Based on this definition, in the configuration shown in FIG. 1, "W2 ≧ (W 1,1 +···+W 1,N )+(G 1-2 +···+G (N-1)-N )···(1)" is assumed to be true.

[0026] That is, all of the third semiconductor layers 106-1, 106-2, 106-3, and 106-N are disposed above the active layer 104. In order to efficiently inject hole current into the active layer 104, it is desirable that formula (1) be satisfied.

[0027] Regarding the specific range of each structural parameter, first, there is no particular limit for W2, and it can be set appropriately according to the desired optical power scale (i.e., the output power of LD or SOA or the received light power of PD, for example). Next, the width W of the third semiconductor layer 1,i The width of the third semiconductor layers is set to a value that prevents the fundamental mode of light generated in this structure from being significantly absorbed by the third semiconductor layers, typically about 400 nm or less. Within the range that satisfies this condition, the widths of the third semiconductor layers may be equal or different. However, when considering the symmetry of the current injection distribution in the x direction, the width of the third semiconductor layers may be set to a value that is equal to or different from the width of the third semiconductor layers. 1,i =W 1,(N-i+1) It is desirable that the following conditions be met.

[0028] In addition, the distance G between adjacent third semiconductor layers i,(i+1)The value of is set so as to satisfy the condition that the fundamental mode of light is not significantly absorbed by the multiple third semiconductor layers. This depends on the width of the third semiconductor layers, but is typically about 200 nm or more. As long as this condition is satisfied, the spacing between the layers may be equal or different. However, when considering the symmetry of the current injection distribution in the x direction, the "G i-(i+1) =G (N-i)-(N-i+1) It is desirable that the following conditions be met.

[0029] The total number N of third semiconductor layers may be set arbitrarily within a range that satisfies the above conditions, but it is desirable to make it as large as possible in order to reduce the device resistance per active layer volume as much as possible.

[0030] As shown in Figures 1 and 2, the regions between the third semiconductor layers 106-1, 106-2, 106-3, and 106-N are filled with a second cladding layer 110 made of an appropriate low-refractive index cladding material. A typical example is a polymer material with a refractive index of approximately 1.4-1.5, which is commonly used for optical applications in the communication wavelength bands (1310 nm band, 1550 nm band). Alternatively, a thin cladding material such as SiN can be formed on the surfaces of the third semiconductor layer, first semiconductor layer 103, fourth semiconductor layer 111, and fifth semiconductor layer 112 as a cladding material that also serves as a passivation for the semiconductor surface, and then a polymer material can be applied over this. This exposes the contact layers on each third semiconductor layer above the second cladding layer 110, allowing contact with all third semiconductor layers via a single second electrode 109.

[0031] The second semiconductor layer 105 can be an i-type or p-type etch stop layer, an InP layer, or a combination thereof (an upper etch stop layer and a lower InP layer). The etch stop layer can be, for example, an alloy material such as InGaAsP that has wet etching selectivity with InP. Various material systems can be used for the active layer 104 depending on the application. For example, in the case of LDs and SOAs, a multi-quantum well (MQW) with excellent gain characteristics can be used. In this case, typically, an InGaAlAs or InGaAsP system is used. On the other hand, if a wider gain spectrum is desired in an SOA or a large absorption coefficient is desired in a PD, a uniform bulk material can be used.

[0032] Items other than the above-mentioned features (for example, the thickness of each semiconductor layer, the height of the third semiconductor layer, the manufacturing method, etc.) are to be the same as those in Patent Document 1.

[0033] The characteristics of the semiconductor optical device according to the embodiment will be described below.

[0034] First, a high-power configuration in which the width of the active layer 104 is relatively wide will be described. As a specific example, a structure for which mode calculations were performed is shown in FIG. 3. This is an example in which the active layer 104 is exposed as shown in FIG. 1. The width of the active layer 104 is W2=2.0 μm, and the width of each of the multiple third semiconductor layers is all commonly set to W 1,i For simplicity, the arrangement interval G of the plurality of third semiconductor layers is set to 200 nm. i,(i+1) = G, which is a common value for all. Other structural parameters and materials used are as shown in the figure.

[0035] While Figure 3 shows an example in which three third semiconductor layers are used, calculations were performed for four cases, N = 1, 2, 3, and 4. N = 1 corresponds to the structure of Patent Document 1, and in this case, the parameter of the spacing between adjacent third semiconductor layers is meaningless. Furthermore, when N = 2, 3, and 4 and G = 0 nm, N third semiconductor layers are directly connected with no gaps, which is a structure in which only one third semiconductor layer with a width of N × W1 is formed. In other words, it corresponds to a configuration in which the width of the third semiconductor layer is significantly increased in the structure of Patent Document 1.

[0036] Figure 4 shows the intensity distribution of the fundamental mode calculated for various third semiconductor layer spacings G. When G = 0 nm, the mode is largely absorbed by the third semiconductor layer as the width of the third semiconductor layer increases. On the other hand, as G is widened, even though the total width N × W1 of each third semiconductor layer is the same, the absorption of the mode by the third semiconductor layer is significantly reduced, resulting in good optical confinement with most of the mode localized within the semiconductor thin film.

[0037] Figure 5 plots the optical confinement factor of the active layer 104 as a function of the spacing G between adjacent third semiconductor layers. When G is small, especially when the total width is large, such as when N=3 or 4, the optical confinement significantly decreases. On the other hand, by increasing G, the optical confinement significantly improves regardless of the number of third semiconductor layers N. As a specific example, if the optical confinement factor for N=1 is 100%, the optical confinement factor is 99.4% for N=2 and G=800 nm, 98.1% for N=3 and G=400 nm, and 96.9% for N=4 and G=300 nm. Therefore, an excellent optical confinement factor comparable to that for N=1 is obtained for all values ​​of N.

[0038] On the other hand, the resistance component r of the third semiconductor layer made of p-InP, which dominates the device resistance in this structure, p-InP As is well known, the refractive index (per unit length in the optical axis direction) is determined by the dimensions of the third semiconductor layer and is given by the following formula:

[0039]

number

[0040] In this equation, ρ p-InP is the resistivity of the region of the third semiconductor layer made of p-InP, and H1 is the height of the third semiconductor layer. In other words, the structure proposed by the present invention makes it possible to reduce the resistance of the multiple third semiconductor layers to 1 / N times that of the conventional structure (case N=1) while maintaining a high level of optical confinement. In the conventional structure, it is difficult to achieve both high optical confinement and low device resistance, but the present invention can be said to break this trade-off.

[0041] In addition, the present invention also has the effect of realizing uniform current injection throughout the active layer 104. That is, in the conventional structure, the third semiconductor layer, which serves as the hole injection source, is present only in the central portion of the active layer 104, so that holes are supplied intensively near the center of the active layer 104, making it difficult to obtain a large gain near the left and right ends, and in some cases resulting in localized light loss.

[0042] On the other hand, in the structure according to the present invention, as is clear from the arrangement of the multiple third semiconductor layers, the multiple third semiconductor layers each play a role in supplying holes to the active layer 104 in their vicinity, thereby supplying holes uniformly throughout the entire active layer 104. This feature has a desirable effect not only when injecting current in applications such as LDs and SOAs, but also when applying a reverse bias in applications such as PDs. That is, in PDs, it is important from the viewpoint of performance to quickly extract photocarriers generated by light absorption from the active layer 104, and in this structure, photocarriers (holes) generated in each part of the active layer 104 can be quickly extracted by the third semiconductor layers in their vicinity.

[0043] Furthermore, the present invention has the effect of distributing the optical mode uniformly throughout the active layer 104. That is, as can be seen in the example of Figure 4, in the conventional structure with N = 1, the single third semiconductor layer formed at the center of the active layer 104 confines the optical mode near the center of the active layer 104, and the optical intensity is significantly weaker near both ends of the active layer 104. This means that the light does not sense the presence of the active layer 104 near both ends, and these regions do not effectively function as the active layer 104 responsible for light emission and absorption. This hinders the goal of increasing power by widening the width of the active layer 104.

[0044] On the other hand, in the structure according to the present invention, as is evident in the mode distributions of, for example, N=2, G=800 nm, N=3, G=400 nm, and N=4, G=300 nm, by disposing the outermost (i=1, N) third semiconductor layers near both ends of the active layer 104, the optical mode spreads in the x direction as if being pulled by them, and overlaps with a wider range of the entire active layer 104. This allows a large portion of the entire active layer 104 to effectively contribute to light emission and light absorption, and high power can be successfully achieved by expanding the width of the active layer 104.

[0045] Next, we will explain the configuration for a transverse single mode, in which the width of the active layer 104 is relatively narrow. In the above explanation, the width of the active layer 104 is relatively wide, and the left and right sides of the mesa structure in which the active layer 104 is arranged are clad with a low refractive index material, resulting in a transverse multimode, and higher-order modes such as the TE10 mode and TE20 mode have strong optical confinement in the active layer 104.

[0046] This can cause a problem of multi-mode oscillation, especially when this structure is applied to an LD. Generally, in order to avoid this problem of lateral multi-mode oscillation in a thin film structure (including a conventional lateral injection structure and a vertical injection structure with a single third semiconductor layer), a structure in which the active layer 104 is embedded in the second semiconductor layer 105, the fourth semiconductor layer 111, and the fifth semiconductor layer 112 as shown in FIG. 2 is used, and the width W2 of the active layer 104 is made sufficiently narrow, and the width W3 of the fourth semiconductor layer 111 and the fifth semiconductor layer 112 on the left and right of the active layer 104 is made sufficiently narrow. side should be wide enough.

[0047] Typically, W2 is 800 nm or less, W side For example, the thickness is 1000 nm or more. By using such a structure, the optical confinement of higher-order modes in the active layer 104 is reduced, and good transverse single mode characteristics are obtained. According to the present invention, strong optical confinement of the fundamental mode and low device resistance per active layer volume can be obtained without impairing the good transverse single mode characteristics of the above-mentioned structure.

[0048] As a specific example, the structure for which the mode calculation was performed is shown in Figure 6. The materials used and the thickness of each layer are the same as those in Figure 3. The width of the active layer 104 and the widths of the fourth semiconductor layer 111 and the fifth semiconductor layer 112 on the left and right sides are W2 = 800 nm, W side The width of each of the plurality of third semiconductor layers was set to W = 1000 nm. 1,i =W1=200 nm, and for simplicity, the distance between adjacent third semiconductor layers is G i,(i+1) =G, and all were set to a common value G.

[0049] While Figure 6 shows a structure with N = 3 as an example, calculations were performed for four cases: N = 0, 1, 2, and 3. N = 0 corresponds to the lateral injection structure, and N = 1 corresponds to the vertical injection structure of Patent Document 1. The intensity distributions of the TE00 mode (fundamental mode) and TE10 mode obtained by calculation are shown in Figures 7(a) and 7(b). Figures 8A and 8B show plots of the optical confinement factors of the TE00 mode and TE10 mode in the active layer 104 for each case as a function of the spacing G between adjacent third semiconductor layers.

[0050] First, for the fundamental mode, it can be seen that the structure of the present invention (N=2, 3) achieves good optical confinement comparable to that of the conventional structure (N=0, 1). Next, for the TE10 mode, it can be seen that for N=0, 1, the mode spreads to the fourth semiconductor layer 111 and the fifth semiconductor layer 112, reducing overlap with the active layer 104. The optical confinement factor for N=0 (N=1) is 0.477 (0.476) for the TE00 mode and 0.205 (0.221) for the TE10 mode, indicating that the optical confinement of higher-order modes in the conventional structure is significantly smaller than that of the fundamental mode.

[0051] On the other hand, when N=2 and 3, it can be seen that the two intensity peaks characteristic of the TE10 mode are distributed as if they are attracted to the third semiconductor layer. As a result, as shown in Figure 8 B As shown in the plot of , in a structure in which the distance between adjacent third semiconductor layers is narrow and formula (1) is satisfied, the TE10 mode is relatively strongly localized in the active layer 104, whereas in a structure in which the distance between adjacent third semiconductor layers is wide and the condition of formula (1) is not satisfied, the localization of the TE10 mode in the active layer 104 is reduced.

[0052] This means that by intentionally locating the outer third semiconductor layer (for example, i=1, N) at a position outside the active layer 104, that is, by not satisfying the condition of formula (1), it is possible to reduce the optical confinement by drawing the intensity distribution of higher-order modes to a portion outside the active layer 104 while maintaining the high optical confinement of the fundamental mode. In fact, under the conditions of N=2, G=800 nm and N=3, G=300 nm shown in Figure 7, the optical confinement factors of the TE10 mode are 0.201 and 0.207, respectively, which are reduced to the same level as or lower than those for N=0, 1.

[0053] In this configuration, the third semiconductor layer is positioned outside the active layer 104, which reduces the efficiency of current injection into the active layer 104. Specifically, there is a concern that holes may be injected into the fourth semiconductor layer 111 and the fifth semiconductor layer 112 on the left and right sides of the active layer 104, and these regions may become parallel current leakage paths. However, this problem can be solved by forming the fourth semiconductor layer 111 and the fifth semiconductor layer 112 from a semi-insulating semiconductor, such as Fe-doped InP, to confine current to the active layer 104. In this case, holes injected from the outer third semiconductor layer flow through the second semiconductor layer 105 above the active layer 104, and are guided by the current confinement structure formed by the fourth semiconductor layer 111 and the fifth semiconductor layer 112, to the active layer 104 located at the center of the device.

[0054] Therefore, the present invention can be applied to cases where the width of the active layer 104 is similar to the typical size (specifically, about 800 nm or less) of conventional lateral injection thin-film structures, and in this case, strong optical confinement of the fundamental mode and low device resistance per active layer volume can be achieved while maintaining good lateral single-mode characteristics comparable to those of conventional structures. Thus, although a configuration with a relatively narrow active layer 104 width is not necessarily suitable for increasing the device power, the reduced device resistance increases the maximum amount of current that can be injected per unit active layer volume, which can result in benefits such as faster modulation speed in directly modulated LDs.

[0055] As described above, according to the present invention, multiple third semiconductor layers for current injection are provided on the second semiconductor layer above the active layer, so that it is possible to expand the width of the active layer while satisfying strong optical confinement, low device resistance per active layer volume, good uniformity of current injection distribution throughout the active layer, and uniformity of optical mode distribution.

[0056] According to the present invention, by arranging multiple subdivided third semiconductor layers, it is possible to achieve both strong optical confinement of the fundamental mode and low device resistance per active layer volume. Focusing on the new discovery that arranging multiple third semiconductor layers with narrow widths at appropriate intervals prevents the fundamental mode from being significantly absorbed by the third semiconductor layers, and by incorporating this into a specific device structure, it is possible to overcome the trade-off between optical confinement and device resistance in conventional structures.

[0057] This invention effectively utilizes the expansion of the fundamental mode shape due to the use of multiple third semiconductor layers. By focusing on the new discovery that when the outermost third semiconductor layers are placed near both ends of the active layer, the fundamental mode shape expands laterally as if attracted to them, this characteristic is utilized to distribute the fundamental mode throughout the entire volume of the active layer, making it possible to form a mode suitable for high power.

[0058] According to the present invention, good transverse single mode characteristics can be ensured by effectively utilizing the deformation of the higher-order mode shape caused by arranging the third semiconductor layer outside the active layer region. By focusing on the new discovery that deliberately arranging the third semiconductor layer outside the active layer region causes the intensity distribution of the TE10 mode to be biased toward the outside of the active layer, this characteristic can be utilized to significantly reduce the intensity of higher-order modes while maintaining high optical confinement of the fundamental mode.

[0059] It should be noted that the present invention is not limited to the above-described embodiments, and it is clear that many modifications and combinations can be made by a person having ordinary knowledge in the art within the technical concept of the present invention. [Explanation of symbols]

[0060] 101...substrate, 102...first cladding layer, 103...first semiconductor layer, 104...active layer, 105...second semiconductor layer, 106-1, 106-2, 106-3, 106-N...third semiconductor layer, 107-1, 107-2, 107-3, 107-N...contact layer, 108...first electrode, 109...second electrode, 110...second cladding layer, 111...fourth semiconductor layer, 112...fifth semiconductor layer.

Claims

1. a first cladding layer formed on a substrate; a first semiconductor layer of a first conductivity type formed on the first cladding layer; an active layer formed on the first semiconductor layer; a second semiconductor layer of an i-type or second conductivity type formed on and in contact with the active layer; a plurality of third semiconductor layers of a second conductivity type formed on the second semiconductor layer; a first electrode electrically connected to the first semiconductor layer; a second electrode electrically connected to the plurality of third semiconductor layers; a second clad layer formed between the first semiconductor layer and the second electrode; Equipped with the second cladding layer fills the regions between the plurality of third semiconductor layers; A semiconductor optical device, characterized in that the plurality of third semiconductor layers are arranged in a direction perpendicular to the waveguide direction and parallel to the plane of the substrate.

2. 2. The semiconductor optical device according to claim 1, a fourth semiconductor layer and a fifth semiconductor layer, each of which is non-conductive or low-conductive, formed on the first semiconductor layer and in contact with both side surfaces of the ridge pattern formed by the active layer;

3. 3. The semiconductor optical device according to claim 1, a plurality of contact layers formed on each of the plurality of third semiconductor layers; The semiconductor optical device, wherein the second electrode is formed on the third semiconductor layers via the contact layers.

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