Light-emitting device and method for manufacturing the same

Abstract

This light-emitting element comprises: a substrate that includes amorphous glass; a first buffer layer; a second buffer layer; a gallium nitride layer; a laminated body; and a negative electrode and a positive electrode. The first buffer layer is positioned over the substrate and includes aluminum and oxygen. The second buffer layer is positioned over the first buffer layer and includes aluminum and nitrogen. The gallium nitride layer is positioned over the second buffer layer. The laminated body is positioned over the gallium nitride layer and includes an n-type cladding layer, a p-type cladding layer, and a light-emitting layer between the n-type cladding layer and the p-type cladding layer. The negative electrode and the positive electrode are respectively positioned over the n-type cladding layer and the p-type cladding layer. Each of the n-type cladding layer, the p-type cladding layer, and the light-emitting layer includes elements of Group 13 and elements of Group 15.

Description

[Technical Field]

[0001] 1. Field of the Invention One embodiment of the present invention relates to a semiconductor element such as a light-emitting element or a transistor, and a method for manufacturing the same. For example, one embodiment of the present invention relates to a semiconductor element including a gallium nitride-based semiconductor, and a method for manufacturing the same. [Background technology]

[0002] Representative examples of semiconductor elements include light-emitting elements and transistors. In recent years, vigorous development has been underway on semiconductor elements containing nitrides of Group 13 elements, such as gallium nitride (GaN) and indium nitride (InN). Conventionally, such semiconductor elements have been fabricated using silicon substrates or sapphire substrates, but Patent Documents 1 to 3, for example, disclose that light-emitting elements and transistors having semiconductor layers containing nitrides of Group 13 elements can be formed on glass substrates. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Publication No. 2019-41113 [Patent Document 2] Japanese Patent Application Publication No. 2018-168029 [Patent Document 3] Japanese Patent Application Laid-Open No. 2000-124140 Summary of the Invention [Problem to be solved by the invention]

[0004] An object of one embodiment of the present invention is to provide a semiconductor element having a novel structure and a manufacturing method thereof. Alternatively, an object of one embodiment of the present invention is to provide a light-emitting element or transistor containing a Group 13 element and a Group 15 element in a semiconductor layer and a manufacturing method thereof. [Means for solving the problem]

[0005] One embodiment of the present invention is a light-emitting device. The light-emitting device includes a substrate including amorphous glass, a first buffer layer, a second buffer layer, a gallium nitride layer, a stack, a cathode, and an anode. The first buffer layer is located on the substrate and includes aluminum and oxygen. The second buffer layer is located on the first buffer layer and includes aluminum and nitrogen. The gallium nitride layer is located on the second buffer layer. The stack is located on the gallium nitride layer and includes an n-type cladding layer, a p-type cladding layer, and a light-emitting layer between the n-type cladding layer and the p-type cladding layer. The cathode and anode are located on the n-type cladding layer and the p-type cladding layer, respectively. The n-type cladding layer, the p-type cladding layer, and the light-emitting layer each include a Group 13 element and a Group 15 element.

[0006] One embodiment of the present invention is a method for manufacturing a light-emitting device, the method including: forming a first buffer layer on a substrate containing amorphous glass; forming a second buffer layer on the first buffer layer; forming a gallium nitride layer on the second buffer layer by sputtering; forming a stack on the gallium nitride layer by sputtering, the stack including an n-type cladding layer, a p-type cladding layer, and a light-emitting layer between the n-type cladding layer and the p-type cladding layer; and forming a cathode and an anode on the n-type cladding layer and the p-type cladding layer, respectively, where the n-type cladding layer, the p-type cladding layer, and the light-emitting layer each contain a Group 13 element and a Group 15 element.

[0007] One embodiment of the present invention is a display device including a plurality of the light-emitting elements.

[0008] One embodiment of the present invention is a transistor. The transistor includes a substrate including an amorphous glass, a first buffer layer, a second buffer layer, an active layer including a Group 13 element and a Group 15 element, a gate insulating film, a gate electrode, and first and second terminals. The first buffer layer is located on the substrate, and the second buffer layer is located on the first buffer layer. The active layer is located on the second buffer layer, and the gate insulating film is located on the active layer. The first and second terminals are located on the active layer and contact the active layer. The gate electrode is located on the active layer via the gate insulating film. [Brief explanation of the drawings]

[0009] [Figure 1A] 1 is a schematic end view of a light-emitting device according to an embodiment of the present invention; [Figure 1B] 1 is a schematic end view of a light-emitting device according to an embodiment of the present invention; [Figure 2] 3 is a graph showing the relationship between lattice constants of components included in a light-emitting device according to an embodiment of the present invention. [Figure 3A] 5A to 5C are schematic end views illustrating a method for manufacturing a light-emitting device according to an embodiment of the present invention. [Figure 3B] 5A to 5C are schematic end views illustrating a method for manufacturing a light-emitting device according to an embodiment of the present invention. [Figure 3C] 5A to 5C are schematic end views illustrating a method for manufacturing a light-emitting device according to an embodiment of the present invention. [Figure 4A] 5A to 5C are schematic end views illustrating a method for manufacturing a light-emitting device according to an embodiment of the present invention. [Figure 4B] 5A to 5C are schematic end views illustrating a method for manufacturing a light-emitting device according to an embodiment of the present invention. [Figure 4C] 5A to 5C are schematic end views illustrating a method for manufacturing a light-emitting device according to an embodiment of the present invention. [Figure 5A] 1 is a schematic end view of a transistor according to an embodiment of the present invention; [Figure 5B] 1 is a schematic end view of a transistor according to an embodiment of the present invention; DETAILED DESCRIPTION OF THE INVENTION

[0010] Hereinafter, various embodiments of the present invention will be described with reference to the drawings, etc. However, the present invention can be embodied in various forms without departing from the spirit of the present invention, and should not be construed as being limited to the description of the embodiments exemplified below.

[0011] In order to clarify the description, the drawings may show the width, thickness, shape, etc. of each part schematically compared to the actual embodiment, but these are merely examples and do not limit the interpretation of the present invention. In this specification and each drawing, elements having the same function as those described in the previous drawings may be given the same reference numerals, and duplicated explanations may be omitted. This reference numeral is used to collectively represent multiple identical or similar structures, and when these are individually represented, a hyphen and a natural number are added after the reference numeral.

[0012] In this specification and claims, when expressing an aspect of placing another structure on top of a certain structure, the term "on top" is used, unless otherwise specified, to include both a case in which another structure is placed directly on top of a certain structure so as to be in contact with the certain structure, and a case in which another structure is placed above a certain structure via yet another structure.

[0013] In this specification and claims, the expression "a structure exposed from another structure" means a state in which a part of a structure is not covered by another structure, and includes a state in which the part not covered by another structure is covered by yet another structure. The state expressed by this expression also includes a state in which a structure is not in contact with another structure.

[0014] First Embodiment In this embodiment, a light-emitting device, which is one embodiment of the present invention, will be described. This light-emitting device is an inorganic light-emitting diode (LED) having a semiconductor layer containing a Group 13 element and a Group 15 element.

[0015] 1. Structure FIG. 1A shows a schematic end view of a light-emitting device 100 according to an embodiment of the present invention. As shown in FIG. 1A, the light-emitting device 100 includes a substrate 102 made of amorphous glass and two buffer layers (a first buffer layer 110 and a second buffer layer 112) on the substrate 102. The light-emitting device 100 further includes a gallium nitride layer 120 on the second buffer layer 112 in contact with the second buffer layer 112, and a stacked structure on the gallium nitride layer 120 including an n-type cladding layer 122, a p-type cladding layer 126, and a light-emitting layer 124 sandwiched between the n-type cladding layer 122 and the p-type cladding layer 126. The light-emitting device 100 further includes an anode 128 and a cathode 130 on the p-type cladding layer 126 and the gallium nitride layer 120, respectively. The first buffer layer 110 may be in direct contact with the substrate 102, or may be provided on the substrate 102 via an optional overcoat 104. By applying a potential difference between the anode 128 and the cathode 130 that is equal to or greater than the light emission threshold voltage, holes and electrons are injected from the anode 128 and the cathode 130, respectively, and the holes and electrons recombine in the light emitting layer 124, resulting in light emission.

[0016] The light emitting device 100 may further include a protective film 140 on the anode 128 and the cathode 130. The light emitting device 100 may also include an undercoat 106 under the substrate 102. These configurations will be described below.

[0017] (1) Circuit board The substrate 102 is a component that supports each component provided thereon and includes amorphous glass. Preferably, a substrate with a high strain point and high surface flatness is used as the substrate 102. For example, the strain point of the substrate 102 is preferably 600°C or higher. The substrate 102 may be thick enough to be flexible (e.g., 0.1 mm to 0.5 mm), or may be thicker (e.g., 0.5 mm to 2 mm).

[0018] As an example, the substrate 102 is a glass substrate called alkali-free glass. In this case, the substrate 102 contains silicon dioxide, aluminum oxide, boron oxide, and alkaline earth metal oxides such as calcium oxide and barium oxide. The content of alkali metals such as sodium in the substrate 102 is preferably 0.1% or less.

[0019] (2) Overcoat and undercoat An optional overcoat 104 is provided on the substrate 102 so as to contact the substrate 102. The overcoat 104 has the function of preventing the diffusion of impurities such as trace amounts of alkali metal ions contained in the substrate 102, and is a laminate of one or more films containing silicon-containing inorganic compounds such as silicon oxide and silicon nitride. The overcoat 104 is formed by, for example, sputtering or chemical vapor deposition (CVD).

[0020] The undercoat 106, which is disposed below the substrate 102 and is provided so as to be in contact with the substrate 102, is a film that has the function of suppressing the desorption of water and the like from the substrate 102 under high temperature conditions during the manufacture of the light-emitting element 100, and of preventing impurities containing oxygen from being mixed into the gallium nitride layer 120 that constitutes the light-emitting element 100, and the semiconductor layers provided thereon, such as the n-type cladding layer 122, the light-emitting layer 124, and the p-type cladding layer 126. The undercoat 106 also has the function of preventing warping of the substrate 102 due to the difference in thermal expansion coefficient between the substrate 102 and the gallium nitride layer 120. The undercoat 106, which has such a function, is configured so that its thermal expansion coefficient is between that of the substrate 102 and that of the gallium nitride layer 120. Specifically, the thermal expansion coefficient is 4.0×10 -6 / ℃ higher than 5.0×10 -6 The undercoat 106 is configured so that the temperature is less than / °C. For example, a film containing aluminum nitride, a film containing aluminum oxide, or a laminate of these can be used as the undercoat 106. The undercoat 106 may be formed by applying a sputtering method or the like.

[0021] (3) First buffer layer and second buffer layer The first buffer layer 110 and the second buffer layer 112 are configured to contribute to promoting crystallization of the gallium nitride layer 120 provided thereon. The first buffer layer 110 and the second buffer layer 112 are also films that improve adhesion to the substrate 102, thereby preventing deformation (warping) of the substrate 102 under high-temperature conditions during the manufacture of the light-emitting element 100, and preventing peeling and cracking of the layers provided thereon. Therefore, by using the first buffer layer 110 and the second buffer layer 112, it is possible to prevent cracking in the gallium nitride layer 120 and the semiconductor layers provided thereon, without causing deformation of the substrate 102 or peeling of the gallium nitride layer 120, and to improve the crystallinity of these layers.

[0022] A. First buffer layer The first buffer layer 110 is provided on the substrate 102 directly or via an overcoat 104. The first buffer layer 110 includes an inorganic compound containing aluminum and oxygen, specifically, aluminum oxide. The first buffer layer 110 may also include aluminum oxide (aluminum oxynitride) which contains nitrogen in addition to aluminum and oxygen. For example, the composition of the first buffer layer 110 is Al x O y In the formula 1, y / x may be 1.4 or more and 1.6 or less. Alternatively, the composition of the first buffer layer 110 may be Al x O y N zThis can be expressed by Equation 2. In Equation 2, (2y + 3z) / 3x may be 0.9 or more and 1.1 or less, and z / y may be 0.05 or more and 0.2 or less. When the first buffer layer 110 contains aluminum oxide or nitrogen-containing aluminum oxide, the first buffer layer 110 can form a strong bond with the aluminum oxide contained in the substrate 102, which includes amorphous glass. This effectively prevents delamination between the substrate 102 and the first buffer layer 110. The composition of the first buffer layer 110 may be constant in the thickness direction, or the oxygen concentration may decrease with increasing distance from the substrate 102 (i.e., closer to the second buffer layer 112). By forming the first buffer layer 110 with a low oxygen concentration on its upper surface, the oxygen concentration in the second buffer layer 112 in contact with the first buffer layer 110 can be reduced.

[0023] In order to more effectively grow the crystal of the second buffer layer formed on the first buffer layer 110 in the c-axis direction, it is preferable that the surface of the first buffer layer 110 has high flatness. Furthermore, it is preferable that the first buffer layer 110 has high crystallinity and is formed with a relatively small film thickness so as to reduce stress caused by differences in thermal expansion coefficients with adjacent components (the substrate 102 and the second buffer layer 112) and prevent defects such as peeling and cracks. Specifically, the thickness of the first buffer layer 110 is preferably 50 nm or less, and the first buffer layer 110 is formed with a thickness of, for example, 2 nm to 50 nm.

[0024] A. Second buffer layer The second buffer layer 112 is provided on the first buffer layer 110 so as to be in contact with the first buffer layer 110. The second buffer layer 112 includes an inorganic compound containing aluminum and nitrogen, such as aluminum nitride. For example, the composition of the second buffer layer 112 is Al x N yThe second buffer layer 112 may be expressed by (Equation 3), where x / y may be 0.9 or more and 1.1 or less. The second buffer layer 112 may contain oxygen, but the concentration thereof (e.g., the average concentration of oxygen in the second buffer layer 112) may be lower than that of the first buffer layer 110. The composition of the second buffer layer 112 may also be constant in the thickness direction, or the nitrogen concentration may increase or decrease with increasing distance from the first buffer layer 110 (i.e., closer to the gallium nitride layer 120). Alternatively, the nitrogen concentration may change in the thickness direction so that the ratio of x to y (x / y) in Equation 3 approaches 1 with increasing distance from the first buffer layer 110. Preferably, the composition of the second buffer layer 112 at the top surface of the second buffer layer 112 in contact with the gallium nitride layer 120 is substantially AlN (i.e., x and y are the same or substantially the same).

[0025] As with the first buffer layer 110, the second buffer layer 112 preferably has a highly flat surface in order to more effectively grow crystals in the c-axis direction of the gallium nitride layer 120 formed on the second buffer layer 112. In addition, the second buffer layer 112 is preferably formed to a thickness of, for example, 20 nm to 100 nm in order to have high crystallinity and reduce stress caused by differences in thermal expansion coefficients with adjacent components (the first buffer layer 110 and the gallium nitride layer 120) and suppress the occurrence of defects such as cracks.

[0026] As described above, the second buffer layer 112 can contain aluminum nitride and therefore can have a hexagonal close-packed structure, a face-centered cubic structure, or a structure equivalent thereto. Here, a hexagonal close-packed structure or a structure equivalent thereto includes a crystal structure in which the c-axis is not perpendicular to the a-axis and the b-axis. Therefore, in this structure, the second buffer layer 112 is oriented in the (0001) direction, i.e., the c-axis direction, relative to its surface. Furthermore, a second buffer layer 112 having a face-centered cubic structure or a structure equivalent thereto is oriented in the (111) direction relative to its surface. Therefore, the c-axis of the second buffer layer 112 is oriented perpendicular or approximately perpendicular to the surface on which the second buffer layer 112 is provided (i.e., the top surface of the first buffer layer 110). As will be described later, the second buffer layer 112 and the gallium nitride layer 120, n-type cladding layer 122, light-emitting layer 124, and p-type cladding layer 126 formed thereon contain semiconductors containing Group 13 and Group 15 elements, such as gallium nitride. Gallium nitride has a hexagonal close-packed structure, and it is known that crystal growth occurs in the c-axis direction to minimize its surface energy. Therefore, forming the gallium nitride layer 120 on the second buffer layer 112 promotes crystal growth in the c-axis direction not only of the gallium nitride layer 120 but also of the semiconductor layers formed thereon. As a result, the crystallinity of these layers is improved, resulting in excellent characteristics as a light-emitting device.

[0027] C) Thermal expansion coefficients of the first buffer layer and the second buffer layer The thermal expansion coefficients of the first buffer layer 110 and the second buffer layer 112 having the above-described configuration are both between the thermal expansion coefficient of the substrate 102 and the thermal expansion coefficient of the gallium nitride layer 120. Specifically, the thermal expansion coefficient of the substrate 102 containing amorphous glass is 3.5×10 -6 / ℃ to 3.9 × 10 -6 / °C, and the expansion coefficient of the gallium nitride contained in the gallium nitride layer 120 in the in-plane direction (the direction parallel to the upper surface of the substrate 102, the a-axis direction; the same applies below) is 5.6×10 -6 On the other hand, the thermal expansion coefficient of the first buffer layer 110 in the in-plane direction depends on the composition and is known to be 3.5×10 -6 / ℃ or more 5.6×10-6 / °C or less. Similarly, the thermal expansion coefficient of the second buffer layer 112 in the in-plane direction also depends on its composition, and is 3.6×10 -6 / ℃ or more 4.6×10 -6 / °C or less. Therefore, in the light emitting device 100, the thermal expansion coefficient in the in-plane direction can be changed (increased) stepwise in the direction from the substrate 102 to the gallium nitride layer 120, and there is no large difference in the thermal expansion coefficient between adjacent components. As a result, no large stress is generated under high temperature conditions during the manufacture of the light emitting device 100, and peeling between adjacent components and cracks in each layer can be effectively prevented.

[0028] D) Lattice constants of the first and second buffer layers Unlike crystalline glass (e.g., quartz), amorphous glass does not have a clearly defined crystal structure, and therefore its lattice constant is generally not defined. However, it can be said that the crystal structure of its main component, silicon oxide, determines the crystallinity of the first buffer layer 110 provided on the substrate 102. Therefore, in this specification, the value of 0.491 nm calculated from the broad peak at 2θ of approximately 22° in X-ray diffraction of amorphous glass is used as the lattice constant in the a-axis direction of the substrate 102. The lattice constant in the a-axis direction of gallium nitride contained in the gallium nitride layer 120 is known to be 0.318 nm. In contrast, the lattice constants in the a-axis direction of the first buffer layer 110 and second buffer layer 112 having the above-described configurations both depend on their compositions, with the former being 0.355 nm to 0.480 nm and the latter being 0.300 nm to 0.330 nm.

[0029] Therefore, the relationship of the lattice constants among the substrate 102, first buffer layer 110, second buffer layer 112, and gallium nitride layer 120 is schematically shown in Figure 2. As can be seen from Figure 2, in the light-emitting device 100, the lattice constant in the a-axis direction decreases stepwise in the order of substrate 102, first buffer layer 110, second buffer layer 112, and gallium nitride layer 120. Therefore, the difference in lattice constant in the a-axis direction (Δ1) between the first buffer layer 110 containing aluminum oxide and the gallium nitride layer 120 containing gallium nitride is smaller than the difference in lattice constant (Δ2) between the substrate 102 containing amorphous glass and the gallium nitride layer 120. Furthermore, the difference in lattice constant in the a-axis direction between the second buffer layer 112 containing aluminum nitride and the gallium nitride layer 120 (Δ3) is smaller than that between the substrate 102 and the gallium nitride layer 120 (Δ2), and is also smaller than that between the first buffer layer 110 and the gallium nitride layer 120 (Δ1).

[0030] Because the difference Δ3 in the lattice constant in the a-axis direction between the second buffer layer 112 and the gallium nitride layer 120 is small, the crystal structure of the gallium nitride layer 120 formed on the second buffer layer 112 is easily affected by the second buffer layer 112. Therefore, when the second buffer layer 112 is highly c-axis oriented, crystallization in the c-axis direction of the gallium nitride layer 120 is also effectively promoted. However, when the crystallinity of the second buffer layer 112 is low, the gallium nitride layer 120 cannot be sufficiently crystallized, resulting in a decrease in the crystallite size.

[0031] As can be seen from FIG. 2 , the difference Δ2 between the lattice constant of the substrate 102 and the lattice constant of the second buffer layer 112 is large. If the second buffer layer were formed directly on the substrate 102, the large difference in lattice constant would hinder the crystal growth of the second buffer layer 112. However, by providing the first buffer layer 110 with a lattice constant between the substrate 102 and the second buffer layer 112, the mismatch in lattice constants between the substrate 102 and the second buffer layer 112 is alleviated. Therefore, by forming the second buffer layer 112 on the first buffer layer 110, the crystallization of the second buffer layer 112 can be promoted. As a result, the second buffer layer 112 has improved crystallinity. By forming the gallium nitride layer 120 on the second buffer layer 110, the crystallinity of the gallium nitride layer 120 in the c-axis direction can be improved. This also improves the crystallinity of the semiconductor layer formed on the gallium nitride layer 120, thereby providing a light-emitting device 100 with excellent characteristics.

[0032] (4) Gallium nitride layer The gallium nitride layer 120 contains gallium nitride. Gallium nitride can be imparted with p-type or n-type conductivity by adding a dopant, but the gallium nitride layer 120 may be an undoped gallium nitride layer containing no dopant. Alternatively, the gallium nitride layer 120 may contain n-type gallium nitride containing a dopant (such as silicon or germanium) that imparts n-type conductivity, or p-type gallium nitride containing a dopant (such as magnesium, zinc, cadmium, or beryllium) that imparts p-type conductivity.

[0033] (5) n-type cladding layer, light-emitting layer, p-type cladding layer The n-type cladding layer 122, the light-emitting layer 124, and the p-type cladding layer 126 are configured to emit visible light by recombination of holes and electrons injected from the anode 128 and the cathode 130, respectively. The n-type cladding layer 122, the light-emitting layer 124, and the p-type cladding layer 126 may each have a single-layer structure or a laminated structure in which multiple layers are stacked. In the example shown in FIG. 1A, the n-type cladding layer 122, the light-emitting layer 124, and the p-type cladding layer 126 are stacked in this order from the substrate 102 side, but the semiconductor layers may be configured in the reverse order. In this case, the gallium nitride layer 120 is configured to contain undoped gallium nitride or p-type gallium nitride, and the p-type cladding layer 126, the light-emitting layer 124, and the n-type cladding layer 122 are formed thereon.

[0034] The n-type cladding layer 122, the light-emitting layer 124, and the p-type cladding layer 126 are semiconductor layers containing Group 13 and Group 15 elements, respectively. Specifically, these layers contain semiconductors containing aluminum, gallium, and / or indium, as well as nitrogen, phosphorus, and / or arsenic. Typical semiconductors include gallium-based materials. Examples include gallium nitride-based materials such as gallium nitride, aluminum gallium nitride (AlGaN), and indium gallium nitride (InGaN), as well as gallium phosphide-based materials such as gallium phosphide (GaP) and aluminum indium gallium phosphide (AlGaInP). The n-type cladding layer 122 and the p-type cladding layer 126 may further contain the dopants described above. Adding a dopant allows for valence electron control of each layer, thereby enabling bandgap control. The gallium nitride layer 120 and the layer provided thereon (the n-type cladding layer 122 in the example shown in FIG. 1A) may have the same composition.

[0035] The light-emitting layer 124 may have, for example, a single layer structure of indium gallium nitride, or a quantum well structure. A quantum well structure is a structure in which multiple thin films with different bandgaps and thicknesses of about 1 to 5 nm are alternately stacked, such as an alternating stack of indium gallium nitride and gallium nitride, an alternating stack of indium gallium arsenide phosphide (GaInAsP) and indium phosphide (InP), or an alternating stack of aluminum indium arsenide (AlInAs) and indium gallium arsenide (InGaAs).

[0036] (6) Anode and cathode The anode 128 and the cathode 130 inject holes and electrons into the p-type cladding layer 126 and the n-type cladding layer 122, respectively. The anode 128 can be made of a metal such as palladium or gold, an alloy thereof, or a thin film of a conductive oxide that transmits visible light, such as indium-tin mixed oxide (ITO) or indium-zinc mixed oxide (IZO). The cathode 130 can be made of a metal such as aluminum, titanium, gold, silver, or indium, or an alloy thereof. Both the anode 128 and the cathode 130 can have a single-layer structure or can be a laminate of multiple films having different compositions.

[0037] (7) Protective film The protective film 140 is configured to prevent impurities such as oxygen and water from entering the light-emitting element 100, and is composed of one or more films containing a silicon-containing inorganic compound such as silicon oxide or silicon nitride. Openings are provided in the protective film 140 to expose the anode 128 and the cathode 130, and wiring (not shown) is electrically connected to the anode 128 and the cathode 130 using these openings.

[0038] As described above, in the light-emitting device 100, the first buffer layer 110 and the second buffer layer 112 are stacked on the substrate 102 containing amorphous glass, and the gallium nitride layer 120 is provided thereon. The substrate 102 and the first buffer layer 110 contain aluminum oxide, which provides a strong bond between them. Furthermore, the thermal expansion coefficient increases stepwise from the first buffer layer 110 to the gallium nitride layer 120, and there is no large difference in the thermal expansion coefficient between adjacent components, which prevents peeling and cracking under high-temperature conditions.

[0039] Furthermore, since the first buffer layer 110 having the lattice constant between the substrate 102 and the second buffer layer 112 is provided between the substrate 102 and the second buffer layer 112, which have a large difference in lattice constant, the large lattice mismatch between the substrate 102 and the second buffer layer 112 can be alleviated. Therefore, by providing the second buffer layer 112 on the first buffer layer 110 having a high bonding strength with the substrate 102, the crystallinity of the second buffer layer 112 can be significantly improved compared to when the second buffer layer 112 is provided directly on the substrate 102. As a result, the crystallinity of the n-type cladding layer 122, the light-emitting layer 124, and the p-type cladding layer 126, which determine the functionality of the light-emitting device 100, is improved, making it possible to provide a light-emitting device with excellent characteristics.

[0040] Furthermore, the aluminum oxide, aluminum oxynitride, and aluminum nitride contained in the first buffer layer 110 and the second buffer layer 112 have high resistance to various etchants used in photolithography processes, and therefore will not be lost or damaged during the manufacturing process of the light-emitting element 100, which will be described later. Therefore, a highly reliable light-emitting element 100 can be manufactured using various conventional semiconductor device manufacturing devices.

[0041] 2. Variations The structure of the light-emitting device 100 is not limited to the above-described structure. Specifically, three or more buffer layers may be provided between the substrate 102 and the gallium nitride layer 120. For example, as shown in FIG. 1B , in addition to the first buffer layer 110 and the second buffer layer 112, a third buffer layer 114 on the second buffer layer 112 and a fourth buffer layer 116 on the third buffer layer 114 may be provided. Adjacent buffer layers are provided so as to contact each other.

[0042] The third buffer layer 114 and the fourth buffer layer 116 may have the same configuration as the first buffer layer 110 and the second buffer layer 112, respectively. Alternatively, each of the first buffer layer 110 to the fourth buffer layer 116 may contain aluminum oxide, aluminum oxynitride, or aluminum nitride, with the oxygen concentration decreasing and the nitrogen concentration increasing in the order from the first buffer layer 110 to the fourth buffer layer 116. In this case, it is preferable that the fourth buffer layer 116 contains aluminum nitride.

[0043] Even in such a modified example, the lattice mismatch between the substrate 102 and the buffer layer in contact with the gallium nitride layer 120 can be alleviated, and the difference in thermal expansion coefficient between adjacent components can be reduced. As a result, the gallium nitride layer 120 can be formed with high crystallinity, and the occurrence of peeling and cracking can be suppressed.

[0044] Second Embodiment In this embodiment, a description will be given of a method for manufacturing the light emitting device 100. Description of the same or similar configurations as those described in the first embodiment may be omitted.

[0045] (1) Formation of overcoat and undercoat First, as shown in FIG. 3A , an overcoat 104 and an undercoat 106 are formed on the top and bottom of a substrate 102, respectively. The size of the substrate 102 is not limited, and a large amorphous glass substrate, also known as mother glass, can be used as the substrate 102. For example, amorphous glass substrates of 600 mm × 720 mm (known as 3.5 generation glass), 730 mm × 920 mm (known as 4.5 generation glass), 1500 mm × 1850 mm (known as 6 generation glass), or even larger sizes may be used. Therefore, multiple light-emitting devices 100 can be manufactured using a single substrate 102. This contributes to reducing the manufacturing cost of the light-emitting device 100. The overcoat 104 and undercoat 106 may be formed using a CVD method or a sputtering method. The overcoat 104 and undercoat 106 are optional, and therefore, one or both of them may not be formed.

[0046] (2) Formation of the first buffer layer Subsequently, the first buffer layer 110 is formed on the substrate 102 (FIG. 3B). The first buffer layer 110 can be formed by sputtering. When the first buffer layer 110 contains aluminum oxide, for example, the first buffer layer 110 may be formed by using aluminum or aluminum oxide as a target and irradiating oxygen radicals during reactive sputtering with a mixed gas of argon and oxygen. Alternatively, an aluminum oxide target may be sputtered with argon, and the resulting first buffer layer 110 may be subjected to oxygen radical treatment. Alternatively, the first buffer layer 110 may be formed by irradiating the substrate 102 with oxygen plasma to form an oxygen-excess layer on the surface of the substrate 102, sputtering an aluminum target thereon to form an aluminum thin film, and then heating (annealing) the aluminum thin film to convert it into an aluminum oxide film. Alternatively, an aluminum target may be sputtered using argon or a mixed gas of argon and oxygen to form an aluminum thin film or an aluminum thin film containing aluminum oxide on the substrate 102, followed by oxygen plasma or oxygen radical treatment to oxidize the aluminum, thereby forming the first buffer layer 110.

[0047] When the first buffer layer 110 contains aluminum oxide containing nitrogen, the first buffer layer 110 may be formed by reactive sputtering using an aluminum target or an aluminum oxide target and a mixed gas of argon, oxygen, and nitrogen. At this time, the resulting first buffer layer 110 may be subjected to oxygen radical treatment and / or nitrogen radical treatment. Alternatively, the first buffer layer 110 may be formed by reactive sputtering using an aluminum oxide target and a mixed gas of argon and nitrogen. Alternatively, the first buffer layer 110 may be formed by sputtering an aluminum oxynitride target using argon. Alternatively, the first buffer layer 110 may be formed by oxinitriding the surface of the substrate 102 by irradiating it with nitrogen dioxide plasma, subsequently forming an aluminum thin film by sputtering an aluminum target, and then annealing the aluminum to oxinitride the aluminum. Alternatively, the first buffer layer 110 may be formed by sputtering an aluminum target with argon to form an aluminum thin film, and then oxinitriding the aluminum using oxygen and nitrogen plasma. Alternatively, the first buffer layer 110 may be formed by sputtering an aluminum target, an aluminum oxynitride target, or an aluminum oxide target with argon while simultaneously performing oxygen radical treatment and nitrogen radical irradiation.

[0048] As described above, the first buffer layer 110 can be configured so that the oxygen concentration decreases with increasing distance from the substrate 102. This allows aluminum oxide with a closer stoichiometric ratio to be formed on the upper surface of the first buffer layer 110. In this case, for example, in reactive sputtering using a mixed gas of argon and oxygen, the oxygen partial pressure can be reduced as the film grows.

[0049] After forming the first buffer layer 110, annealing may be performed to promote crystallization and increase the density of the layer. The temperature at this time may be appropriately selected from the range of 500°C to 700°C, for example.

[0050] (3) Formation of the second buffer layer Subsequently, a second buffer layer 112 is formed on the first buffer layer 110 (FIG. 3B). The second buffer layer 112 may also be formed by sputtering. For example, the second buffer layer 112 may be formed by sputtering an aluminum nitride target with argon. Alternatively, the second buffer layer 112 may be formed by reactive sputtering an aluminum target or an aluminum nitride target using a mixed gas of argon and nitrogen. At this time, the obtained second buffer layer 112 may be further subjected to nitrogen radical treatment. Alternatively, the second buffer layer 112 may be formed by irradiating nitrogen radicals while sputtering an aluminum target or an aluminum nitride target with argon.

[0051] As described above, the nitrogen concentration may also vary in the thickness direction of the second buffer layer 112. For example, the nitrogen concentration may be controlled by controlling the partial pressure of nitrogen in reactive sputtering, or the nitrogen concentration on the surface of the second buffer layer 112 may be increased by nitrogen radical treatment.

[0052] As with the first buffer layer 110, the second buffer layer 112 may be annealed to promote crystallization and increase the density of the layer. The temperature at this time may be appropriately selected from the range of 500°C to 700°C, for example.

[0053] It is preferable to form the first buffer layer 110 and the second buffer layer 112 consecutively in the same chamber, or to form them in separate chambers while maintaining a vacuum state without returning them to atmospheric conditions. This prevents impurities from being mixed into the interface between the first buffer layer 110 and the second buffer layer 112, and more effectively promotes crystallization of the second buffer layer 112.

[0054] (4) Formation of gallium nitride layer, n-type cladding layer, light-emitting layer, and p-type cladding layer Subsequently, a gallium nitride layer 120 is formed on the second buffer layer 112, and semiconductor layers, i.e., an n-type cladding layer 122, a light-emitting layer 124, and a p-type cladding layer 126, are sequentially formed thereon (FIG. 3C). These layers can also be formed by sputtering. For example, these layers can be formed by sputtering a semiconductor target such as gallium nitride with argon in the presence of plasma. If a dopant is contained in the layer, a target containing the dopant can be used. Alternatively, a gallium nitride target and a dopant target can be simultaneously sputtered. Furthermore, by using an indium gallium nitride target and a gallium nitride target, the light-emitting layer 124 can be formed in which indium gallium nitride films and gallium nitride films are alternately stacked. Alternatively, if the light-emitting layer 124 is an indium gallium nitride film, the gallium nitride target and the indium target can be simultaneously sputtered, and if a gallium nitride film is to be formed, the light-emitting layer 124 can be formed in which indium gallium nitride films and gallium nitride films are alternately stacked.

[0055] Subsequently, the n-type cladding layer 122 to the p-type cladding layer 126 are patterned. As shown in FIG. 4A , the patterning is performed so that a plurality of stacked layers including the n-type cladding layer 122, the light-emitting layer 124, and the p-type cladding layer 126 are arranged in an island shape on the gallium nitride layer 120. Since each stacked layer constitutes one light-emitting device 100, this method makes it possible to form a plurality of light-emitting devices 100 that share the gallium nitride layer 120 on one substrate 102. Patterning can be performed by applying known photolithography, and therefore a detailed description thereof will be omitted.

[0056] Thereafter, the anode 128 and the cathode 130 are formed on the p-type cladding layer 126 and the n-type cladding layer 122, respectively (FIG. 4B). The anode 128 and the cathode 130 may be formed by vacuum deposition, electron beam deposition, CVD, sputtering, or the like. To provide the protective film 140, one or more films containing a silicon-containing inorganic compound may be formed using CVD or sputtering to cover the anode 128 and the cathode 130, and then the protective film 140 may be etched to expose portions of the anode 128 and the cathode 130. As a result, the protective film 140 is also formed on the side surfaces of the substrate 102 (FIG. 4C).

[0057] Thereafter, the substrate 102 is cut along the dotted lines in FIG. 4C, thereby obtaining the light emitting device 100 shown in FIG. 1A.

[0058] As described above, the first buffer layer 110 to the p-type cladding layer 126 can all be formed by sputtering. Therefore, the temperature during film formation is from room temperature to less than 600°C, typically 100°C to 400°C. Therefore, a plurality of light-emitting devices 100 can be manufactured using a substrate 102 containing inexpensive amorphous glass.

[0059] Furthermore, the gallium nitride layer 120 to the p-type cladding layer 126 are formed on the second buffer layer 112. Therefore, even without applying vapor phase epitaxial growth, which has been conventionally used to form inorganic semiconductor layers, semiconductor particles ejected by sputtering a semiconductor target are deposited to form each layer, and are simultaneously induced in the second buffer layer 112 to be effectively c-axis oriented. As a result, high temperatures are not required when forming the first buffer layer 110 to the p-type cladding layer 126, and each layer can have high crystallinity, allowing the light emitting device 100 to exhibit excellent characteristics as an LED.

[0060] Third Embodiment In this embodiment, a transistor according to one embodiment of the present invention will be described, and descriptions of configurations that are the same as or similar to those described in the first and second embodiments may be omitted.

[0061] 1. High electron mobility field-effect transistor FIG. 5A shows a schematic end view of a high electron mobility field-effect transistor 150 as an example of a transistor according to an embodiment of the present invention. The transistor 150 has a substrate 102, a first buffer layer 110 and a second buffer layer 112 on the substrate 102, and an active layer (also referred to as an electron transit layer) 152 on the second buffer layer 112. The active layer 152 corresponds to the gallium nitride layer 120 of the light-emitting element 100 described in the first embodiment. The transistor 150 further includes an electron supply layer 158 on the active layer 152, and a pair of terminals (a first terminal 154 and a second terminal 156) located on the active layer 152 and electrically connected to the active layer 152 and the electron supply layer 158. The first terminal 154 and the second terminal 156 may be in contact with the active layer 152 or, although not shown, may be connected to the active layer 152 via the electron supply layer 158. The transistor 150 further includes a gate electrode 162 that is in direct contact with the electron supply layer 158 or is provided on the electron supply layer 158 via a gate insulating film 160 of any configuration. These components will be described below, but the configurations of the substrate 102, overcoat 104, undercoat 106, first buffer layer 110, and second buffer layer 112 are similar to those of the first embodiment, so description thereof will be omitted.

[0062] (1) Active layer and electron supply layer The stack of the active layer 152 and the electron supply layer 158 forms a path for source / drain current when the transistor 150 is operating. The active layer 152 and the electron supply layer 158 contain a group 13 element and a group 15 element, respectively. For example, the active layer 152 and the electron supply layer 158 may contain undoped gallium nitride and n-type aluminum gallium nitride, respectively. Alternatively, the active layer 152 and the electron supply layer 158 may contain undoped gallium arsenide (GaAs) and n-type aluminum gallium arsenide (AlGaAs), respectively. The active layer 152 is formed on the second buffer layer 112 by sputtering so as to be in contact with the second buffer layer 112. Therefore, high temperature deposition, which is required for epitaxial growth using MOCVD, is not required, and the active layer 152 and the electron supply layer 158 can be formed even using a substrate 102 containing amorphous glass. Furthermore, the second buffer layer 112, which serves as a base for the active layer 152 and the electron supply layer 158, promotes crystallization in the c-axis direction. Furthermore, as described in the first embodiment, the second buffer layer 112 is not provided directly on the substrate 102, which has a large lattice mismatch, but is provided on the first buffer layer 110, which serves to alleviate the lattice mismatch, and therefore has a high c-axis orientation. Therefore, since the second buffer layer 112 also has a high c-axis orientation, it is possible to achieve a high c-axis orientation in these layers even when the active layer 152 and the electron supply layer 158 are formed using a sputtering method. As a result, a transistor with high field mobility can be provided.

[0063] (2) First terminal, second terminal, gate insulating film, and gate electrode The first terminal 154, the second terminal 156, and the gate electrode 162 contain a metal such as aluminum, gold, silver, tantalum, molybdenum, titanium, or copper, or an alloy containing one or more of these metals. The gate insulating film 160, which is an optional component, contains, for example, a silicon-containing inorganic compound such as silicon oxide or silicon nitride, or a so-called high-k material such as hafnium silicate, zirconium silicate, hafnium oxide, or zirconium oxide. There are no limitations on the method for forming these components, and vacuum evaporation, electron beam evaporation, CVD, or sputtering can be used as appropriate. In particular, sputtering and electron beam evaporation, which have high film formation rates, can be used to efficiently form the first terminal 154, the second terminal 156, the gate insulating film 160, and the gate electrode 162.

[0064] 2. Metal-insulator field-effect transistor The transistor according to this embodiment may be a so-called metal-insulator-semiconductor field-effect transistor (MISFET). For example, as shown in FIG. 5B, the active layer 152 may be formed by a stack of a first active layer 152-1 including a p-type gallium nitride layer and a second active layer 152-2 located on the first active layer 152-1 and including i-type or n-type gallium nitride, without providing the electron supply layer 158. The second active layer 152-2 may be provided in separate portions between the first active layer 152-1 and the first terminal 154 and between the first active layer 152-1 and the second terminal 156, respectively, so as to form source and drain regions on the first active layer 152-1.

[0065] In the transistor 170, the active layer 152, which determines its characteristics, is also provided on the second buffer layer 112, which is provided on the first buffer layer 110 that alleviates the lattice constant mismatch between the substrate 102 and the second buffer layer 112. Therefore, the c-axis orientation of the active layer 152 is promoted on the second buffer layer 112, whose c-axis orientation has been improved by the first buffer layer 110, and as a result, the active layer 152 has high crystallinity. This allows the transistor 170 to have high field mobility.

[0066] The above-described embodiments of the present invention can be combined as appropriate as long as they are not mutually inconsistent. Furthermore, even if a person skilled in the art appropriately adds or deletes components or modifies the design of a display device of each embodiment, or adds or omits processes or modifies conditions, such a display device is included in the scope of the present invention as long as it includes the gist of the present invention.

[0067] Even if there are other effects and advantages different from those brought about by the aspects of each of the above-mentioned embodiments, those that are clear from the description in this specification or that can be easily predicted by a person skilled in the art are naturally understood to be brought about by the present invention. [Explanation of symbols]

[0068] 100: light emitting element, 102: substrate, 104: overcoat, 106: undercoat, 110: first buffer layer, 112: second buffer layer, 114: third buffer layer, 116: fourth buffer layer, 120: gallium nitride layer, 122: n-type cladding layer, 124: light emitting layer, 126: p-type cladding layer, 128: anode, 130: cathode, 140: protective film, 150: transistor, 152: active layer, 152-1: first active layer, 152-2: second active layer, 154: first terminal, 156: second terminal, 158: electron supply layer, 160: gate insulating film, 162: gate electrode, 170: transistor

Claims

1. a substrate comprising amorphous glass; a first buffer layer overlying the substrate, the first buffer layer comprising aluminum and oxygen; a second buffer layer located on the first buffer layer, the second buffer layer comprising aluminum and nitrogen; a gallium nitride layer on the second buffer layer; a stack of layers located on the gallium nitride layer, the stack including an n-type cladding layer, a p-type cladding layer, and a light-emitting layer between the n-type cladding layer and the p-type cladding layer; and a cathode and an anode located on the n-type cladding layer and the p-type cladding layer, respectively; each of the n-type cladding layer, the p-type cladding layer, and the light-emitting layer contains a Group 13 element and a Group 15 element; a thermal expansion coefficient of the first buffer layer in an in-plane direction is between the thermal expansion coefficients of the substrate and the gallium nitride layer; a difference in lattice constant in the a-axis direction between the first buffer layer and the gallium nitride layer is smaller than a difference between the substrate and the gallium nitride layer.

2. The thermal expansion coefficient of the first buffer layer in the in-plane direction is 3.5×10 －６ / ℃ or more 5.6 x 10 －６ / °C or less, The light-emitting device according to claim 1 , wherein the lattice constant of the first buffer layer in the a-axis direction is not less than 0.355 nm and not more than 0.480 nm.

3. a thermal expansion coefficient of the second buffer layer in the in-plane direction is between the thermal expansion coefficients of the substrate and the gallium nitride layer; 2. The light-emitting element described in claim 1, wherein the difference in lattice constant in the a-axis direction between the second buffer layer and the gallium nitride layer is smaller than that between the substrate and the gallium nitride layer and is smaller than that between the first buffer layer and the gallium nitride layer.

4. The thermal expansion coefficient of the second buffer layer in the in-plane direction is 3.6×10 －６ / ℃ or more 4.6 x 10 －６ / °C or less, The light-emitting device according to claim 3 , wherein the lattice constant of the second buffer layer in the a-axis direction is not less than 0.300 nm and not more than 0.330 nm.

5. The light-emitting device of claim 1 , wherein the first buffer layer further comprises nitrogen.

6. The light-emitting device of claim 5 , wherein the oxygen concentration of the first buffer layer decreases with increasing distance from the substrate.

7. 2. The light-emitting device according to claim 1, wherein the atomic ratio of nitrogen to aluminum in the second buffer layer approaches 1 as the distance from the first buffer layer increases.

8. 10. The light-emitting device of claim 1, further comprising an undercoat below the substrate comprising aluminum nitride and / or aluminum oxide.

9. The light-emitting device of claim 1 , wherein the gallium nitride layer is in direct contact with the second buffer layer.

10. A method for manufacturing a light-emitting element, forming a first buffer layer on a substrate comprising an amorphous glass; forming a second buffer layer on the first buffer layer; forming a gallium nitride layer on the second buffer layer by a sputtering method; forming a laminate including an n-type cladding layer, a p-type cladding layer, and a light-emitting layer between the n-type cladding layer and the p-type cladding layer on the gallium nitride layer by a sputtering method; forming a cathode and an anode on the n-type cladding layer and the p-type cladding layer, respectively; each of the n-type cladding layer, the p-type cladding layer, and the light-emitting layer contains a Group 13 element and a Group 15 element; the first buffer layer overlaps the cathode and the anode; a thermal expansion coefficient of the first buffer layer in an in-plane direction is between the thermal expansion coefficients of the substrate and the gallium nitride layer; A method for manufacturing a light-emitting device, wherein a difference in lattice constant in the a-axis direction between the first buffer layer and the gallium nitride layer is smaller than a difference between the substrate and the gallium nitride layer.

11. The thermal expansion coefficient of the first buffer layer in the in-plane direction is 3.5×10 －６ / ℃ or more 5.6 x 10 －６ / °C or less, The manufacturing method according to claim 10 , wherein the lattice constant of the first buffer layer in the a-axis direction is not less than 0.355 nm and not more than 0.480 nm.

12. a thermal expansion coefficient of the second buffer layer in the in-plane direction is between the thermal expansion coefficients of the substrate and the gallium nitride layer; 11. The manufacturing method according to claim 10, wherein a difference in lattice constant in the a-axis direction between the second buffer layer and the gallium nitride layer is smaller than a difference between the substrate and the gallium nitride layer and is smaller than a difference between the first buffer layer and the gallium nitride layer.

13. The thermal expansion coefficient of the second buffer layer in the in-plane direction is 3.6×10 －６ / ℃ or more 4.6 x 10 －６ / °C or less, The manufacturing method according to claim 12 , wherein the lattice constant of the second buffer layer in the a-axis direction is not less than 0.300 nm and not more than 0.330 nm.

14. The method of claim 10 , wherein the first buffer layer further comprises nitrogen.

15. The method of claim 14 , wherein the oxygen concentration of the first buffer layer decreases with increasing distance from the substrate.

16. 11. The method of claim 10, wherein the atomic ratio of nitrogen to aluminum in the second buffer layer approaches 1 as the distance from the first buffer layer increases.

17. The method of claim 10 further comprising forming an undercoat below the substrate comprising aluminum nitride and / or aluminum oxide.

18. The method of claim 10 , wherein the gallium nitride layer is in direct contact with the second buffer layer.

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