Rectifier circuit and power supply using the same

Abstract

To provide a rectification circuit capable of reducing capacity and volume of a capacitor that feeds power for controlling rectification MOSFET, while holding loss reduction effect by synchronous rectification; and to provide a power supply using the same.SOLUTION: According to a rectification circuit, a first control circuit outputs a voltage produced based on a first input voltage as a first output voltage between gate sources of first MOSFET, and clamps the first output voltage to a first threshold voltage when the first input voltage is a voltage as a predetermined first threshold voltage or more. A second control circuit in which a voltage between drain sources of the first MOSFET is input as a second input voltage outputs a voltage produced based on the second input voltage as a second output voltage between gate sources of second MOSFET in a period in which a negative voltage is applied between drain sources of the second MOSFET, and clamps the second output voltage to a second threshold voltage when the second input voltage is a voltage as a predetermined second threshold voltage or more.SELECTED DRAWING: Figure 4

Description

[Technical Field]

[0001] The present invention relates to the configuration of a rectifier circuit and a power supply using the same, and in particular to a technique that is effective when applied to a rectifier circuit that performs synchronous rectification using a rectifying MOSFET. [Background technology]

[0002] In typical rectifier circuits, synchronous rectification using diodes or MOSFETs is used to rectify AC to DC. Rectification using diodes has the problem of large losses due to the voltage drop caused by the built-in potential of the diode. In contrast, synchronous rectification using MOSFETs has low losses because there is no built-in potential in the MOSFET and the forward current rises from 0V. Therefore, synchronous rectification using MOSFETs is mainly used to rectify with even lower losses.

[0003] Background art in this technical field includes, for example, technology such as that disclosed in Patent Document 1. Patent Document 1 discloses a rectifier circuit with a bridge configuration that realizes synchronous rectification.

[0004] This rectifier circuit mainly consists of a rectifier MOSFET and a control circuit. The control circuit consists of a drive circuit for driving the rectifier MOSFET, a capacitor that supplies power to the drive circuit, a charge control circuit that controls charging of the capacitor, and a MOSFET inserted between the charge control circuit and the drain of the rectifier MOSFET (FIG. 5).

[0005] Patent Document 2 discloses a rectifier circuit that achieves synchronous rectification without using a capacitor. In this rectifier circuit, the drain-source voltage of a rectifier MOSFET (233) is divided by resistors (171, 172) and input to the gate-source voltage of another rectifier MOSFET (183) that shares a common source (FIG. 2). [Prior art documents] [Patent documents]

[0006] [Patent Document 1] U.S. Patent No. 10,756,645 [Patent Document 2] Japanese Patent Application Laid-Open No. 2005-295627 Summary of the Invention [Problem to be solved by the invention]

[0007] In the rectifier circuit of Patent Document 1, a capacitor is charged using a voltage applied between the drain and source of the rectifier MOSFET during the rectifier MOSFET's off-period, and the voltage of the capacitor is used to generate a gate-source voltage of the rectifier MOSFET during the rectifier MOSFET's on-period. Therefore, a capacitor with a certain capacitance is required to maintain a desired voltage during the capacitor's non-charging period. The volume of this power supply capacitor is an obstacle to miniaturization and cost reduction of the rectifier circuit.

[0008] Furthermore, in the rectifier circuit of Patent Document 2, the waveform of the gate-source voltage of the rectifier MOSFET (183) is a waveform obtained by resistively dividing the waveform of the drain-source voltage of the rectifier MOSFET (233). For example, when rectifying a sine wave voltage, the gate-source voltage of the rectifier MOSFET (183) also becomes sinusoidal, and the rise and fall of the gate-source voltage become slow, which causes a problem of reducing the loss reduction effect achieved by synchronous rectification.

[0009] Therefore, an object of the present invention is to provide a rectifier circuit that performs synchronous rectification using a rectifier MOSFET, and a power supply using the same, which can reduce the capacitance and volume of a capacitor that supplies power to control the rectifier MOSFET while maintaining the loss reduction effect achieved by synchronous rectification. [Means for solving the problem]

[0010] In order to achieve the above object, the present invention provides a power supply comprising a first MOSFET, a second MOSFET, a first control circuit, and a second control circuit, wherein when the first MOSFET is in a rectifying period, the second MOSFET is in a non-rectifying period, and when the second MOSFET is in a rectifying period, the first MOSFET is in a non-rectifying period, and the first control circuit is configured to input a drain-source voltage of the second MOSFET as a first input voltage, and to apply a voltage generated based on the first input voltage between the gate and source of the first MOSFET as a first output voltage during at least a part of a period in which a negative voltage is applied between the drain and source of the first MOSFET. the second control circuit receives a drain-source voltage of the first MOSFET as a second input voltage, and outputs a voltage generated based on the second input voltage as a second output voltage between the gate and source of the second MOSFET during at least a part of a period in which a negative voltage is applied between the drain and source of the second MOSFET; the first control circuit clamps the first output voltage to a first threshold voltage when the first input voltage is equal to or greater than a predetermined first threshold voltage; and the second control circuit clamps the second output voltage to the second threshold voltage when the second input voltage is equal to or greater than a predetermined second threshold voltage. the first control circuit has a third MOSFET having a drain to which the first input voltage is input, a source connected to the gate of the first MOSFET, a gate connected to its own source via a first resistor and connected to the source of the first MOSFET via a second resistor; the second control circuit has a drain to which the second input voltage is input, a source connected to the gate of the second MOSFET, a gate connected to its own source via a third resistor and connected to the source of the second MOSFET via a fourth resistor; and the third MOSFET and the fourth MOSFET are depletion-type. It is characterized by: [Effects of the Invention]

[0011] According to the present invention, in a rectifier circuit that performs synchronous rectification using a rectifier MOSFET, it is possible to realize a rectifier circuit that can reduce the capacitance and volume of a capacitor that supplies power to control the rectifier MOSFET while maintaining the loss reduction effect achieved by synchronous rectification, and a power supply using the same.

[0012] This allows for the rectifier circuit and the power supply using it to be made more efficient, smaller, and less expensive.

[0013] Problems, configurations, and effects other than those described above will become apparent from the following description of the embodiments. [Brief explanation of the drawings]

[0014] [Figure 1] 1 is a diagram illustrating a configuration of a rectifier circuit according to a first embodiment of the present invention. [Figure 2] 2 is a diagram showing a rectified waveform obtained by the rectifier circuit of FIG. 1. [Figure 3] 2 is a diagram showing the configuration of a rectifier bridge to which the rectifier circuit of FIG. 1 is applied. [Figure 4] FIG. 10 is a diagram illustrating a configuration of a rectifier circuit according to a second embodiment of the present invention. [Figure 5] FIG. 10 is a diagram illustrating a configuration of a rectifier circuit according to a third embodiment of the present invention. [Figure 6] FIG. 10 is a diagram illustrating a configuration of a rectifier bridge according to a third embodiment of the present invention. [Figure 7] FIG. 10 is a diagram illustrating a configuration of a rectifier circuit according to a fourth embodiment of the present invention. [Figure 8] FIG. 10 is a diagram showing the configuration of a rectifier circuit according to a modified example of the fourth embodiment of the present invention. [Figure 9] FIG. 10 is a diagram showing the configuration of a semiconductor package according to a fifth embodiment of the present invention. [Figure 10] FIG. 10 is a diagram illustrating a configuration of a front-end power supply according to a sixth embodiment of the present invention. [Figure 11] FIG. 1 is a diagram illustrating a configuration of a rectifier circuit according to a first conventional example. [Figure 12] 12 is a diagram showing a rectified waveform obtained by the rectifier circuit of FIG. 11. [Figure 13] FIG. 10 is a diagram illustrating the configuration of a rectifier circuit of Conventional Example 2. [Figure 14] 14 is a diagram showing a rectified waveform obtained by the rectifier circuit of FIG. 13. DETAILED DESCRIPTION OF THE INVENTION

[0015] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. In the drawings, the same components are designated by the same reference numerals, and detailed description of overlapping components will be omitted. [Example]

[0016] The configuration of a rectifier circuit according to a first embodiment of the present invention and a control method thereof will be described with reference to Figures 1 to 3 and Figures 11 to 14. Figure 1 is a diagram showing the configuration of the rectifier circuit of this embodiment, and Figure 2 is a diagram showing rectified waveforms obtained by the rectifier circuit of Figure 1. Figure 3 is a diagram showing the configuration of a rectifier bridge to which the rectifier circuit of Figure 1 is applied. Figures 11 to 14 are diagrams showing the configuration and rectified waveforms of a conventional rectifier circuit shown as a comparative example to make the configuration of the present invention easier to understand.

[0017] First, the configuration of the rectifier circuit of this embodiment will be described using Fig. 1. As shown in Fig. 1, the rectifier circuit of this embodiment is composed of rectifier MOSFETs QR1 and QR2 (hereinafter sometimes simply referred to as QR1 and QR2), a control circuit 1 connected to the drain and source terminals of the rectifier MOSFET QR2 and the gate and source terminals of the rectifier MOSFET QR1, and a control circuit 2 connected to the drain and source terminals of the rectifier MOSFET QR1 and the gate and source terminals of the rectifier MOSFET QR2.

[0018] In Figure 1, rectifier MOSFETs QR1 and QR2 are shown as enhancement-type N-channel MOSFETs, taking the case of application to the two rectifier MOSFETs LQ on the low side of the rectifier bridge in Figure 3 as an example.

[0019] Control circuit 1 receives the drain-source voltage Vds2 of rectifier MOSFET QR2 as an input and outputs the gate-source voltage Vgs1 of rectifier MOSFET QR1. Control circuit 2 receives the drain-source voltage Vds1 of rectifier MOSFET QR1 as an input and outputs the gate-source voltage Vgs2 of rectifier MOSFET QR2.

[0020] Next, the operation of the rectifier circuit of this embodiment will be described using Figure 2. Figure 2 shows the voltage waveforms when the rectifier circuit of Figure 1 is applied to two rectifier MOSFETs LQ on the low side of the rectifier bridge of Figure 3 and a sinusoidal voltage is applied to the input voltage Vin. Period T1 is the rectification period of rectifier MOSFET QR1 and the non-rectification period of rectifier MOSFET QR2. Period T2 is the non-rectification period of rectifier MOSFET QR1 and the rectification period of rectifier MOSFET QR2.

[0021] During the rectification period T1 of QR1, the control circuit 1 receives the drain-source voltage Vds2 applied to QR2 as input and outputs the gate-source voltage Vgs1 of QR1. At this time, if the input voltage is smaller than a predetermined threshold voltage Vref1, the control circuit 1 outputs the input voltage as the output voltage, and if the input voltage is equal to or greater than the threshold voltage Vref1, the control circuit 2 clamps the output voltage to the threshold voltage Vref1. Furthermore, during the rectification period T2 of QR2, the control circuit 2 receives the drain-source voltage Vds1 applied to QR1 as input and outputs the gate-source voltage Vgs2 of QR2. At this time, if the input voltage is smaller than the predetermined threshold voltage Vref2, the control circuit 2 outputs the input voltage as the output voltage, and if the input voltage is equal to or greater than the threshold voltage Vref2, the control circuit 2 clamps the output voltage to the threshold voltage Vref2. This prevents the gate-source voltages of QR1 and QR2 from becoming excessively large.

[0022] The threshold voltages Vref1 and Vref2 of control circuits 1 and 2 are higher than the gate threshold voltages Vth1 and Vth2 of QR1 and QR2, respectively, in order to turn on QR1 and QR2, and are lower than the maximum rated gate-source voltages of QR1 and QR2 in order to prevent breakdown of QR1 and QR2. Furthermore, the output voltage of control circuit 1 is lower than the maximum value of the drain-source voltage of rectifier MOSFET QR2, and the output voltage of control circuit 2 is lower than the maximum value of the drain-source voltage of rectifier MOSFET QR1. In this way, synchronous rectification is achieved.

[0023] Here, the above-mentioned clamping means that the output voltage is within a substantially constant range. For example, fluctuations in the output voltage due to noise mixed in the output voltage are included in the clamping.

[0024] <Conventional Example 1> Here, the configuration of a conventional rectifier circuit will be described with reference to Fig. 11. The rectifier circuit in Fig. 11 corresponds to the rectifier circuit in Patent Document 1. The rectifier circuit in Fig. 11 is composed of rectifying MOSFETs QR1 and QR2 and control circuits CC1 and CC2. Furthermore, the control circuits CC1 and CC2 each include drive circuits CC12 and CC22, capacitors C1 and C2, charge control circuits CC13 and CC23, and MOSFETs CC14 and CC24, respectively.

[0025] The operation of the rectifier circuit of Figure 11 will be explained using Figure 12. Figure 12 shows the voltage waveforms when the rectifier circuit of Figure 11 is applied to the two rectifier MOSFETs LQ on the low side of the rectifier bridge of Figure 3 and a sinusoidal voltage is applied to the input voltage Vin. Period T1 is the rectification period of rectifier MOSFET QR1 and the non-rectification period of rectifier MOSFET QR2. Period T2 is the non-rectification period of rectifier MOSFET QR1 and the rectification period of rectifier MOSFET QR2.

[0026] As an example, let us focus on the operation of QR1. First, during period T2, control circuit CC1 charges capacitor C1 with input voltage Vin. By controlling the charging current of capacitor C1 using MOSFET CC14, voltage VC1 of capacitor C1 is controlled to a predetermined voltage. Next, during period T1, voltage VC1 of capacitor C1 is output as gate-source voltage Vgs1 of QR1.

[0027] As described above, the rectifier circuit shown in FIG. 11 requires a capacitor as an energy storage element because the energy required to generate the gate-source voltage of the rectifier MOSFET must be stored during the non-rectifying period of the rectifier MOSFET.

[0028] On the other hand, in the rectifier circuit of this embodiment shown in Fig. 1, the energy required to generate the gate-source voltage of the rectifier MOSFET is obtained from the input voltage Vin by using the drain-source voltage of another rectifier MOSFET that is in a non-rectification period during the rectification period as the input voltage to the control circuit. Therefore, the capacitance of the capacitor can be reduced compared to the conventional rectifier circuit shown in Fig. 11.

[0029] <Conventional Example 2> The configuration of another conventional rectifier circuit will be described with reference to Fig. 13. The rectifier circuit of Fig. 13 corresponds to the rectifier circuit of Patent Document 2. The rectifier circuit of Fig. 13 is composed of rectifying MOSFETs QR1 and QR2 and voltage dividing resistors Rp1 to Rp4.

[0030] The operation of the rectifier circuit of Figure 13 will be explained using Figure 14. Figure 14 shows the voltage waveforms when the rectifier circuit of Figure 13 is applied to the two rectifier MOSFETs LQ on the low side of the rectifier bridge of Figure 3 and a sinusoidal voltage is applied to the input voltage Vin. Period T1 is the rectification period of rectifier MOSFET QR1 and the non-rectification period of rectifier MOSFET QR2. Period T2 is the non-rectification period of rectifier MOSFET QR1 and the rectification period of rectifier MOSFET QR2.

[0031] As an example, let's look at the operation of QR1. During period T1, the drain-source voltage Vds2 of QR2 is divided by voltage-dividing resistors Rp1 and Rp2, and the voltage generated across Rp2 is applied between the gate and source of QR1. In Figure 14, the waveform of the gate-source voltage Vgs1 of QR1 during period T1, which is the rectification period of QR1, is a sine wave that has been reduced by the resistive voltage divider.

[0032] As described above, in the rectifier circuit shown in Figure 13, the gate-source voltages of the rectifier MOSFETs generated during the rectification period are sinusoidal waves reduced by the resistive voltage division. This lengthens the period from the start of the rectification period until the gate-source voltages Vgs1 and Vgs2 exceed the gate threshold voltages Vth1 and Vth2 of the rectifier MOSFETs QR1 and QR2, as well as the period from when the gate-source voltages Vgs1 and Vgs2 fall below the gate threshold voltages Vth1 and Vth2 of the rectifier MOSFETs QR1 and QR2 until the end of the rectification period. In other words, the rise and fall of the gate-source voltages Vgs1 and Vgs2 are slowed. As a result, the proportion of the rectification period during which the rectifier MOSFETs are on decreases, reducing the loss reduction effect achieved by synchronous rectification.

[0033] On the other hand, in the rectifier circuit of this embodiment shown in Figure 1, when the input voltages of the control circuits 1 and 2 are lower than the threshold voltages Vref1 and Vref2, respectively, they output the input voltages as they are as output voltages without reducing them through resistive voltage division (here, voltage drops caused by the resistance components of the switches in the ON state in the control circuit and the resistance components of the wiring are not considered to be part of the resistive voltage division). In other words, the rise and fall of the gate-source voltage in the rectifier circuit of Figure 1 is faster than in the rectifier circuit of Figure 13. As a result, the proportion of the period during which the rectifier MOSFET is on relative to the rectification period is larger, and the loss reduction effect of synchronous rectification is greater.

[0034] As described above, the rectifier circuit of this embodiment can reduce the number of capacitors that supply power to control the rectifying MOSFET while maintaining the loss reduction effect achieved by synchronous rectification. [Example]

[0035] Second Embodiment A configuration of a rectifier circuit and a control method thereof according to a second embodiment of the present invention will be described with reference to Fig. 4. This embodiment is a more specific example of the circuit configuration of the first embodiment.

[0036] As shown in FIG. 4, the rectifier circuit of this embodiment is composed of rectifier MOSFETs QR1 and QR2, a control circuit 1 connected to the drain and source terminals of the rectifier MOSFET QR2 and the gate and source terminals of the rectifier MOSFET QR1, and a control circuit 2 connected to the drain and source terminals of the rectifier MOSFET QR1 and the gate and source terminals of the rectifier MOSFET QR2.

[0037] The control circuit 1 is composed of a depletion-type N-channel MOSFET QS1 whose drain terminal is connected to the drain terminal of the rectifier MOSFET QR2 and whose source terminal is connected to the gate terminal of the rectifier MOSFET QR1, a voltage-dividing resistor R1 connected between the gate terminal and source terminal of the N-channel MOSFET QS1, and a voltage-dividing resistor R2 connected between the source terminal of the rectifier MOSFET QR1 and the gate terminal of the N-channel MOSFET QS1.

[0038] The control circuit 2 is also composed of a depletion-type N-channel MOSFET QS2 whose drain terminal is connected to the drain terminal of the rectifier MOSFET QR1 and whose source terminal is connected to the gate terminal of the rectifier MOSFET QR2, a voltage-dividing resistor R3 connected between the source terminal and gate terminal of the N-channel MOSFET QS2, and a voltage-dividing resistor R4 connected between the gate terminal of the N-channel MOSFET QS2 and the source terminal of the rectifier MOSFET QR2.

[0039] The rectifying MOSFETs QR1 and QR2 are N-channel MOSFETs whose sources are connected to the DC low-voltage terminal side.

[0040] The control circuits 1 and 2 each have a MOSFET QS1 that controls the output voltage based on the drain-source voltage Vds2 of the rectifying MOSFET QR2, which is the input voltage of the control circuit 1, and depletion-type N-channel MOSFETs QS1 and QS2 as switches that control the output voltage based on the drain-source voltage Vds1 of the rectifying MOSFET QR1, which is the input voltage of the control circuit 2.

[0041] This section explains how to determine the threshold voltages Vref1 and Vref2. As an example, let us consider how to determine the threshold voltage Vref1. Assume that the gate threshold voltage of MOSFET QS1 is Vth11, the on-resistance of MOSFET QS1 is rqs1, and the resistances of resistors R1 and R2 are r1 and r2, respectively. When the input voltage of control circuit 1, i.e., the drain-source voltage Vds2 of rectifier MOSFET QR2, is 0, the gate-source voltage of MOSFET QS1 is 0. Since MOSFET QS1 is a depletion-mode N-channel MOSFET, MOSFET QS1 is on. Subsequently, as Vds2 increases, the current flowing from the drain to the source of MOSFET QS1 increases. At this time, the voltage Vds2 × (r1 + r2) / (r1 + r2 + rqs1) is output as the output voltage of control circuit 1 to the gate-source voltage of MOSFET QR1. Therefore, by selecting MOSFET QS1 and resistors R1 and R2 so that the values ​​of r1 and r1 are sufficiently greater than rqs1, the drain-source voltage Vds2 of rectifier MOSFET QR2, which is the input voltage to control circuit 1, and the gate-source voltage of rectifier MOSFET QR1, which is the output voltage of control circuit 1, can be approximated to the same value.

[0042] When the drain-source voltage Vds2 of the rectifier MOSFET QR2 increases, the current flowing from the drain to the source of MOSFET QS1 increases, but the voltage drop across resistor R1 also increases, causing the gate-source voltage of MOSFET QS1 to decrease (since it is a negative voltage, its absolute value increases by the amount of the voltage drop across resistor R1), increasing the on-resistance of QS1. As a result, when the drain-source voltage Vds2 of MOSFET QS2 is above a certain voltage, the current flowing from the drain to the source of MOSFET QS1 becomes constant at a certain value. At this time, the voltage drop across resistors R1 and R2 becomes constant, so the gate-source voltage Vgs1 of rectifier MOSFET QR1 becomes constant at the sum of the voltage drop across resistors R1 and R2. This constant voltage becomes the threshold voltage Vref1 of control circuit 1.

[0043] The threshold voltage Vref1 can be approximated by Vth11 × (r1 + r2) / r1. To obtain the desired threshold voltage Vref1, simply select the gate threshold voltage Vth11 of MOSFET QS1 and the resistance values ​​r1 and r2 of resistors R1 and R2. The threshold voltage Vref2 is determined in the same way. [Example]

[0044] The configuration of a rectifier circuit according to a third embodiment of the present invention and its control method will be described with reference to Figures 5 and 6. As shown in Figure 5, the rectifier circuit of this embodiment has enhancement-type P-channel MOSFETs as rectifier MOSFETs QR1 and QR2, and depletion-type P-channel MOSFETs as MOSFETs QS1 and QS2.

[0045] In the rectifier circuits of Example 1 (FIG. 1) and Example 2 (FIG. 4), the rectifier MOSFETs QR1 and QR2 are enhancement-type N-channel MOSFETs, and QR1 and QR2 share a source terminal. Therefore, the rectifier circuits of FIGS. 1 and 4 cannot be applied to two high-side rectifier MOSFETs HQ that do not share a source terminal in a rectifier bridge configured with four enhancement-type N-channel MOSFETs as shown in FIG. 6.

[0046] Therefore, in the rectifier circuit of this embodiment shown in FIG. 5, enhancement-type P-channel MOSFETs are used for QR1 and QR2, so that the source terminals of QR1 and QR2 can be made common even when applied to the two high-side rectifier MOSFETs HQ in FIG. 6.

[0047] The rectifier MOSFETs QR1 and QR2 are P-channel MOSFETs with their sources connected to the high-voltage DC terminal, and the MOSFETs QS1 and QS2 are depletion-mode P-channel MOSFETs.

[0048] The configuration of the rectifier circuit of this embodiment allows it to be applied as a rectifier circuit on the high side of a rectifier bridge.

[0049] In the rectifier bridge configuration shown in FIG. 6, the rectifier MOSFETs QR1 and QR2 on the DC low-voltage terminal side may be N-channel MOSFETs with their sources connected to the DC low-voltage terminal side, and the rectifier MOSFETs QR1 and QR2 on the DC high-voltage terminal side may be P-channel MOSFETs with their sources connected to the DC high-voltage terminal side. [Example]

[0050] The configuration of a rectifier circuit and its control method according to a fourth embodiment of the present invention will be described with reference to Figures 7 and 8. As shown in Figure 7, in addition to the configuration of the second embodiment (Figure 4), the rectifier circuit of this embodiment has a control circuit 1 that includes a comparator Co1 and a gate driver GD1, and a control circuit 2 that includes a comparator Co2 and a gate driver GD2. The rectifier circuits of Example 1 (FIG. 1), Example 2 (FIG. 4), and Example 3 (FIG. 5) are intended to be applied to a rectifier bridge configuration in which a resistive load is connected in the subsequent stage. If they are applied to a rectifier bridge configuration in which a capacitive load is connected in the subsequent stage, a gate-source voltage of the rectifier MOSFET will be generated during periods other than the rectification period, which could result in a short circuit between the upper and lower arms.

[0051] Therefore, in the rectifier circuit of this embodiment, as shown in FIG. 7, comparators Co1 and Co2 and gate drivers GD1 and GD2 are used to control the generation period of the gate-source voltage.

[0052] As an example, the operation of the control circuit 1 will be described.

[0053] As shown in FIG. 7, in the control circuit 1, the source terminal of the MOSFET QS2 and the source terminal of the rectifying MOSFET QR1 are connected to the differential input terminals of the comparator Co1, the output terminal of the comparator Co1 is connected to the input terminal of the gate driver GD1, the output terminal of the gate driver is connected to the gate terminal of the rectifying MOSFET QR1, and the source terminal of the MOSFET QS1 is connected to the power supply terminal of the comparator Co1 and the gate driver GD1.

[0054] When the rectifying MOSFET QR1 is in the rectifying period, the drain-source voltage of QR1 becomes a negative value due to the rectifying current.

[0055] At this time, MOSFET QS1 is on, so comparator Co1 detects the negative voltage and outputs an on signal to gate driver GD1, and gate driver GD1 outputs an output voltage clamped to threshold voltage Vref1 as gate-source voltage Vgs1 of rectifying MOSFET QR1.

[0056] In this way, synchronous rectification can be achieved.

[0057] The control circuit 2 operates in the same manner.

[0058] In the rectifier circuit of Figure 7, the positive input terminals of comparators Co1 and Co2 are connected to the source terminals of the rectifier MOSFETs QR1 and QR2, so the decision voltages of comparators Co1 and Co2 are 0V. However, when applied to a rectifier bridge connected to a capacitive load, the decision voltage may be set to a negative voltage to prevent short circuits between the upper and lower arms. Also, hysteresis may be added to the decision voltage to suppress chattering, which occurs when the rectifier MOSFETs QR1 and QR2 are rapidly and repeatedly switched on and off.

[0059] Furthermore, as shown in FIG. 8, capacitors C1 and C2 may be used in the control circuits 1 and 2, respectively, to stabilize the power supply voltages of the comparators Co1 and Co2 and the gate drivers GD1 and GD2.

[0060] The capacitors C1 and C2 used in the rectifier circuit shown in Fig. 8 do not need to store energy during both the on and off periods of the rectifier MOSFETs QR1 and QR2, as do the capacitors C1 and C2 used in the conventional rectifier circuits shown in Fig. 11 and 13. Therefore, the capacitances of the capacitors C1 and C2 in this embodiment can be smaller than the capacitances of the capacitors C1 and C2 used in the conventional rectifier circuits shown in Fig. 11 and 13.

[0061] The rectifier circuit of this embodiment has the advantage that in a rectifier bridge configuration in which a capacitive load is connected in the subsequent stage, no gate-source voltage is generated in the rectifier MOSFET during periods other than the rectification period, thereby preventing short circuits in the upper and lower arms. [Example]

[0062] A semiconductor package according to a fifth embodiment of the present invention will be described with reference to Fig. 9. Fig. 9 shows a configuration in which the rectifier circuits described in the first to fourth embodiments are built into a semiconductor package 4.

[0063] The semiconductor package 4 has three external terminals: a first terminal Td1, a second terminal Td2, and a third terminal Ts.

[0064] FIG. 9 shows the rectifier circuit described in the second embodiment (FIG. 4) as an example, but the rectifier circuits described in other embodiments may also be used.

[0065] An advantage of this embodiment is that when designing and manufacturing a product that uses a rectifier circuit, by purchasing and incorporating a rectifier circuit with a built-in control circuit like this embodiment, it becomes unnecessary to incorporate the control circuit into the design and manufacturing process yourself, thereby reducing the number of steps required for design and implementation. [Example]

[0066] A front-end power supply according to a sixth embodiment of the present invention will be described with reference to Fig. 10. Fig. 10 shows an example of a power supply to which the rectifier circuits of the present invention described in the first to fifth embodiments are applied.

[0067] The scope of application of the present invention is general rectifier circuits used in power converters. For example, in a front-end power supply as shown in Fig. 10, the present invention can be applied by replacing commercial rectifier diodes CRD1 to CRD4, freewheeling diodes FWD1 and FWD2, and secondary-side rectifier diodes SSD1 and SSD2 as rectifier circuits used in respective places where they are used.

[0068] It is also possible to consider a configuration in which the commercial rectifier diodes CRD3 and CRD4 are replaced with the rectifier circuit of any one of the first, second, and fourth embodiments, and the commercial rectifier diodes CRD1 and CRD2 are replaced with diodes or synchronous rectifier circuits having power supply capacitors.

[0069] By applying the rectifier circuit of the present invention to a power supply such as a front-end power supply, it is possible to contribute to reducing loss and improving reliability of the power supply.

[0070] The present invention is not limited to the above-described embodiments and includes various modifications. For example, the above-described embodiments have been described in detail to clearly explain the present invention, and the present invention is not necessarily limited to those including all of the described configurations. Furthermore, it is possible to replace part of the configuration of one embodiment with the configuration of another embodiment, or to add the configuration of another embodiment to the configuration of one embodiment. Furthermore, it is possible to add, delete, or replace part of the configuration of each embodiment with other configurations. [Explanation of symbols]

[0071] 1, 2...Control circuit 4...Semiconductor package Td1, Td2, Ts... terminals C1, C2...Capacitors R1, R2, R3, R4...voltage dividing resistors LQ: Two rectifying MOSFETs on the low side of the rectifier bridge HQ: Two rectifying MOSFETs on the high side of the rectifier bridge CRD1 to CRD4: Commercial rectifier diodes FWD1, FWD2...Freewheeling diodes SSD1, SSD2...Secondary side rectifier diodes QR1,QR2… Rectifier MOSFET QS1, QS2... Depletion-type N-channel MOSFET or Depletion-type P-channel MOSFET Co1, Co2...Comparator GD1, GD2...Gate drivers Vds1, Vds2: Drain-source voltage of rectifier MOSFETs QR1 and QR2 Vgs1, Vgs2: Gate-source voltage of rectifier MOSFETs QR1 and QR2 Vin: Input voltage Vth1, Vth2: Gate threshold voltage of rectifier MOSFETs QR1 and QR2 Vth11, Vth22: Gate threshold voltages of MOSFETs QS1 and QS2 Vref1, Vref2: Threshold voltages of control circuit 1 and control circuit 2 Vc1, Vc2: Voltages of capacitors C1 and C2 T1, T2: Rectification period of rectifying MOSFETs QR1 and QR2 Vgs1, Vgs2: Gate-source voltages of rectifying MOSFETs QR1 and QR2 CC1, CC2: Control circuit of conventional rectifier circuit Rp1 to Rp4: Voltage dividing resistors in conventional rectifier circuits

Claims

1. a first MOSFET and a second MOSFET; a first control circuit and a second control circuit; when the first MOSFET is in a rectifying period, the second MOSFET is in a non-rectifying period, and when the second MOSFET is in a rectifying period, the first MOSFET is in a non-rectifying period; the first control circuit receives a drain-source voltage of the second MOSFET as a first input voltage, and outputs a voltage generated based on the first input voltage as a first output voltage between the gate and source of the first MOSFET during at least a part of a period in which a negative voltage is applied between the drain and source of the first MOSFET; the second control circuit receives a drain-source voltage of the first MOSFET as a second input voltage, and outputs a voltage generated based on the second input voltage as a second output voltage between the gate and source of the second MOSFET during at least a part of a period in which a negative voltage is applied between the drain and source of the second MOSFET; the first control circuit clamps the first output voltage to a predetermined first threshold voltage when the first input voltage is equal to or greater than the first threshold voltage; the second control circuit clamps the second output voltage to a predetermined second threshold voltage when the second input voltage is equal to or greater than the second threshold voltage; the first control circuit has a drain to which the first input voltage is input; a source connected to the gate of the first MOSFET; a third MOSFET having a gate connected to its source through a first resistor and to the source of the first MOSFET through a second resistor; the second control circuit has a drain to which the second input voltage is input; a source connected to the gate of the second MOSFET; a fourth MOSFET having a gate connected to its source through a third resistor and to the source of the second MOSFET through a fourth resistor; The rectifier circuit according to claim 1, wherein the third MOSFET and the fourth MOSFET are depletion type MOSFETs.

2. 2. The rectifier circuit according to claim 1, the first control circuit outputs the first input voltage as the first output voltage when the first input voltage is lower than the first threshold voltage; The rectifier circuit according to claim 1, wherein the second control circuit outputs the second input voltage as the second output voltage when the second input voltage is lower than the second threshold voltage.

3. 2. The rectifier circuit according to claim 1, the first output voltage is a voltage lower than a maximum value of the drain-source voltage of the second MOSFET; The rectifier circuit is characterized in that the second output voltage is a voltage lower than the maximum value of the drain-source voltage of the first MOSFET.

4. 2. The rectifier circuit according to claim 1, The rectifier circuit is characterized in that the first MOSFET and the second MOSFET are N-channel MOSFETs having sources connected to a low-voltage terminal side of a direct current.

5. 2. The rectifier circuit according to claim 1, The rectifier circuit is characterized in that the first MOSFET and the second MOSFET are P-channel MOSFETs having sources connected to a high-voltage DC terminal side.

6. 2. The rectifier circuit according to claim 1, the rectifier circuit has a bridge configuration, the first MOSFET and the second MOSFET on the DC low-voltage terminal side are N-channel MOSFETs whose sources are connected to the DC low-voltage terminal side, 1. A rectifier circuit according to claim 1, wherein the first MOSFET and the second MOSFET on the DC high voltage terminal side are P-channel MOSFETs having sources connected to the DC high voltage terminal side.

7. 2. The rectifier circuit according to claim 1, the first control circuit has a first switch for clamping the first output voltage at the first threshold voltage when the first input voltage is equal to or greater than the first threshold voltage; The second control circuit has a second switch for clamping the second output voltage at the second threshold voltage when the second input voltage is equal to or greater than the second threshold voltage.

8. 2. The rectifier circuit according to claim 1, the first control circuit has a first comparator and a first gate driver that control a period during which the first output voltage is generated; The rectifier circuit according to claim 1, wherein the second control circuit has a second comparator and a second gate driver that control a period during which the second output voltage is generated.

9. 9. The rectifier circuit according to claim 8, the first control circuit has a first capacitor for stabilizing voltages of the first comparator and a power supply terminal of the first gate driver; The rectifier circuit according to claim 1, wherein the second control circuit has a second capacitor for stabilizing the voltage of the second comparator and the power supply terminal of the second gate driver.

10. 2. The rectifier circuit according to claim 1, A rectifier circuit characterized in that the rectifier circuit is built into a single semiconductor package.

11. A power supply using the rectifier circuit according to any one of claims 1 to 10.

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