Recording device

Abstract

To provide a method for reading a memory module having an anti-fuse element and a recording device to eliminate the need for a power supply or a control circuit used in over-precharge or the like, and speed up voltage reading when measuring the resistance of the anti-fuse element.SOLUTION: A method for reading a memory module of a substrate having the memory module having an anti-fuse element and a functional module connected in parallel with the memory module and having a resistance element, includes: bringing the functional module into a conductive state when reading the memory module; subsequently bringing the functional module into an open state from the conductive state; and subsequently reading a terminal voltage of the anti-fuse element with the memory module in the conductive state.SELECTED DRAWING: Figure 4

Description

[Technical Field]

[0001] The present invention , written This relates to recording devices. [Background technology]

[0002] Typically, the recording element substrate mounted on a liquid ejection head is equipped with an OTP (One-Time Programmable) ROM for recording unique information such as product information and setting information. One example of an OTP ROM uses antifuse elements. Since this ROM can record one bit of information per antifuse element, a large number of antifuse elements are mounted on the recording element substrate. To read the information recorded in these antifuse elements, the driver element connected in series to each antifuse element is turned on and the terminal voltage of the antifuse element is measured. Therefore, when reading information from multiple antifuse elements, it is necessary to repeatedly turn on and off each driver element in sequence and measure the terminal voltage of each antifuse element. Because it takes a long time to read information from multiple antifuse elements, a faster read operation is required.

[0003] Patent Document 1 describes a potential control method for reading the potential of a multi-level word line of a multi-level mask ROM. In the method described in Patent Document 1, the potential of the word line is set to a potential higher than the read potential using a voltage source other than the read potential just before setting it to the read potential. By over-precharging to a high potential in this way, the potential of the word line can reach the read potential more quickly, thereby shortening the read time. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Publication No. 10-106280 Summary of the Invention [Problem to be solved by the invention]

[0005] However, when the ROM read method described in Patent Document 1 is applied to the read operation of an anti-fuse element mounted on a recording element substrate, a power supply is required to temporarily over-precharge the terminal voltage of the anti-fuse element, and a drive circuit is required to control the potential of the anti-fuse element read line, etc. Providing such a power supply and drive circuit on the recording element substrate increases the cost of the device, which is undesirable.

[0006] An object of the present invention is to solve at least one of the problems of the prior art.

[0007] An object of the present invention is to provide a technique for increasing the speed of the read operation of the terminal voltage of an anti-fuse element while suppressing an increase in cost. [Means for solving the problem]

[0008] In order to achieve the above object, one aspect of the present invention is The recording device A recording apparatus for performing recording using a recording head having a recording element substrate including a memory module having an antifuse element and a functional module connected in parallel to the memory module and having a resistance element connected in place of the antifuse element of the memory module, A control means is provided. When reading the memory module, the control means brings the functional module into a conductive state, brings the functional module into an open state from the conductive state, and then brings the memory module into a conductive state to read the terminal voltage of the anti-fuse element. . [Effects of the Invention]

[0009] According to the present invention, there is an effect that the operation of reading the terminal voltage of the anti-fuse element can be speeded up while suppressing an increase in cost.

[0010] Other features and advantages of the present invention will become apparent from the following description taken in conjunction with the accompanying drawings, in which the same or similar elements are designated by the same reference numerals. [Brief explanation of the drawings]

[0011] The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate embodiments of the invention and, together with the description, serve to explain the principles of the invention. [Figure 1] FIG. 2 is a circuit diagram showing the circuit configuration of a recording element substrate according to the first embodiment. [Figure 2] FIG. 2 is a circuit diagram showing the circuit configuration of a recording element substrate according to the first embodiment. [Figure 3] 5A and 5B are diagrams for explaining writing of information to anti-fuse elements of a memory module of a recording element substrate according to the first embodiment. [Figure 4] 6 is a flowchart for explaining a read process of an anti-fuse element performed by a control unit of the inkjet recording apparatus according to the first embodiment. [Figure 5] FIG. 10 is a diagram illustrating a voltage waveform during a read operation of an anti-fuse element. [Figure 6] FIG. 10 is a circuit diagram showing the circuit configuration of a recording element substrate according to a second embodiment. [Figure 7] FIG. 10 is a diagram illustrating a module group of a recording element substrate according to a second embodiment. [Figure 8] FIG. 1 is a perspective view showing a liquid ejection head according to a first embodiment. [Figure 9] FIG. 10 is a diagram illustrating a module group of a recording element substrate according to a third embodiment. [Figure 10] FIG. 10 is a connection diagram of an inkjet printing apparatus and a printing element substrate according to a second embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0012] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. Note that the following embodiments do not limit the scope of the invention claimed. Although the embodiments describe multiple features, not all of these features are necessarily essential to the invention, and multiple features may be combined in any desired manner. Furthermore, in the accompanying drawings, the same or similar components are designated by the same reference numerals, and redundant description will be omitted. Below, a recording element substrate, a liquid ejection head, and a recording apparatus for ejecting liquid such as ink according to the present invention will be described with reference to the drawings. Note that, while a thermal-type recording element substrate will be used as an example of the present invention, the present invention is not limited to this, and can also be applied to a piezo-type recording element substrate.

[0013] [Embodiment 1] First, a first embodiment of the present invention will be described with reference to FIGS.

[0014] FIG. 8 is a perspective view showing a liquid ejection head (recording head) 200 according to the first embodiment.

[0015] This liquid ejection head 200 is provided with two recording element substrates 400 that eject liquid. The recording element substrates 400 have heaters (not shown) for heating ink, and heating the heaters generates bubbles in the ink, causing the liquid (ink) to be ejected from ejection ports (not shown).

[0016] Next, the circuit formed on the recording element substrate 400 will be described with reference to FIGS.

[0017] 1 and 2 are circuit diagrams showing the circuit configuration of a recording element substrate 400 according to embodiment 1. FIG. 1 shows a circuit diagram in which one memory module 206, which is one of the features of embodiment 1, is formed on the recording element substrate. FIG. 2 shows a circuit diagram in which a plurality (two) of memory modules 206 are formed. The recording element substrate 400 has a plurality of ejection modules 204, a memory module (storage unit) 206, a short function module 208, and a control data supply circuit 201.

[0018] The ejection module 204 includes a pressure-generating element (electrothermal conversion element) Rh that generates energy for ejecting liquid from an ejection port (not shown) formed on the printing element substrate 400, a drive element MD1 for driving the pressure-generating element Rh, and a logic circuit AND1. In the first embodiment, the drive element MD1 is a MOS transistor. Here, the MOS transistor functions as a switch that determines whether or not to apply voltage to the pressure-generating element Rh. The logic circuit AND1 is an AND circuit that drives the drive element MD1 based on signals from the control data supply circuit 201 and performs logical operations on multiple signals. When the output of the AND circuit goes high, the pressure-generating element Rh is driven. That is, when the output of the AND circuit goes high, the drive element MD1 turns on, energizing the pressure-generating element Rh and generating heat. This generates bubbles in the ink, causing the liquid (ink) to be ejected from the ejection port, enabling printing. A power supply voltage VH (e.g., 24 V) is supplied to the opposite side of the pressure-generating element Rh, connected to the drive element MD1. On the other hand, the source side of the MOS transistor MD1, which is the driving element MD1, is connected to the ground potential GNDH.

[0019] The memory module 206 includes an antifuse element Ca, a parallel resistor Rp (resistor) connected in parallel to the antifuse element Ca, a driver MD2, and a logic circuit AND2 for writing data to the antifuse element Ca. The antifuse element Ca permanently retains data when an overvoltage is applied. That is, it functions as a one-time programmable read-only memory (OTP) (One-Time Programmable Read-Only Memory). The antifuse element Ca is in an insulating state before an overvoltage is applied, and becomes a resistive element (resistor) and conductive when an overvoltage is applied. Therefore, the antifuse element Ca performs its memory function by determining, for example, "0" when in an insulating state and "1" when in a conductive state. The parallel resistor Rp prevents data from being erroneously written to the antifuse element Ca when an overvoltage from the power supply voltage VID is applied across both ends of the antifuse element Ca even when the driver MD2 is in a non-conductive state. The driver MD2 is, for example, a transistor. When recording the information "1" in the antifuse element Ca, a voltage is applied to the antifuse element Ca by driving the driving element MD2, and the antifuse element Ca is energized by the applied voltage, thereby storing the information "1." A power supply voltage VID (e.g., 24 V) is supplied to the antifuse element Ca, and a ground potential GNDH is supplied to the source side of the MOS transistor MD2.

[0020] Although the power supply voltage VID of the antifuse element Ca and the power supply voltage VH of the pressure generating element Rh are provided on separate power supply lines, if the minimum voltage required to write to the antifuse element is equal to or lower than the power supply voltage VH, the power supply voltage VH may be used in combination with, for example, a step-down circuit.

[0021] The short function module 208 has the same element configuration as the memory module 206, but after mounting the anti-fuse element Ca, the anti-fuse element is short-circuited (short-circuited) with aluminum material. The part shorted with aluminum material may be a simple resistor element or wiring element, as long as it fulfills the short function. Here, the drive element of the short function module 208 is indicated by MD3, and the logic circuit is indicated by AND3.

[0022] The control data supply circuit 201 is a circuit for driving each of the drive elements MD1, MD2, and MD3, and includes, for example, a shift register (not shown) and a latch circuit (not shown). A clock signal (CLK), a data signal (DATA), a latch signal (LT), and a heat enable signal (HE) are input to the control data supply circuit 201 from outside the recording element substrate 400 via the terminals of the recording element substrate 400. The data signal (DATA) includes information for selecting the ejection module 204, the memory module 206, and the short function module 208. This data signal (DATA) is input in serial format in synchronization with the clock signal (CLK).

[0023] The control data supply circuit 201 receives a data signal (DATA) and generates a block selection signal, a group selection signal, and a switching signal based on the information included in the data signal (DATA). Based on these signals, the ejection module 204, the memory module 206, and the short function module 208 are selected and driven. The control data supply circuit 201 supplies the block selection signal via signal line 202, the group selection signal via signal line 203, and the switching signal via signal line 205 to the logic circuits (AND1 to AND3).

[0024] In order to drive the discharge modules 204, memory modules 206, and short function modules 208 in a time-division manner, as shown in FIG. 1, the discharge modules 204 are divided into eight groups (G1, ..., G8), with three modules in each group. Furthermore, three blocks (1, 2, 3) are assigned to the discharge modules 204 in each group. This allows the discharge modules 204, memory modules 206, and short function modules 208 to be selected and driven in a time-division manner. Furthermore, when reading the antifuse element (described later), the memory module 206 and short function module 208 can be accessed in a time-division manner. Here, the group selection signal is a signal used to select which group to drive when the discharge modules 204 are divided into multiple groups. The block selection signal is a signal used to select which pressure generation element Rh to drive among the multiple pressure generation elements Rh in the same group. A MOS transistor, a DMOS (Double-Diffused MOSFET) transistor capable of withstanding high voltages, is used for the drive element MD1.

[0025] Here, as an example, the multiple ejection modules 204 are divided into eight groups (G1, ..., G8) of three modules per group, but this embodiment is not limited to this, and the modules may be divided into eight groups of 16 modules per group, for example.

[0026] Furthermore, the antifuse element Ca can be driven using these signal lines 202 and 203. In this case, a switching signal line 205 is used. The switching signal line 205 switches between driving the antifuse element Ca and driving the ejection module 204. Therefore, a block selection signal, a group selection signal, and a switching signal are input to the logic circuit AND2 of the memory module 206. Then, a signal corresponding to the input signal is output from AND2 to the driving element MD2 of the memory module 206, driving the antifuse element Ca and changing the antifuse element Ca from an insulating state to a conducting state. The driving element MD2 of the memory module 206 is a DMOS transistor, as is the driving element MD1 of the ejection module 204. Furthermore, the logic circuit AND2 of the memory module 206 is composed of a MOS transistor.

[0027] Similarly, a block selection signal, a group selection signal, and a switching signal are input to the logic circuit AND3 of the short function module 208. A signal corresponding to the input signals is then output from AND3 to the drive element MD3 of the short function module 208. A DMOS transistor is used for this drive element MD3. The logic circuit AND3 is also composed of MOS transistors.

[0028] The memory module 206 into which information is written is determined by a block selection signal, a group selection signal, and a switching signal according to the signals CLK, DATA, LT, and HE.

[0029] Next, with reference to FIG. 3, the operation when writing to the anti-fuse element Ca will be described.

[0030] FIG. 3 is a diagram for explaining writing of information to the anti-fuse element Ca of the memory module 206 of the recording element substrate according to the first embodiment.

[0031] 3, an example will be described in which two memory modules 206 are provided, as shown in Fig. 2. Fig. 3 shows the relationship between the circuit configuration of the recording element substrate 400 according to the first embodiment and an inkjet recording apparatus 301.

[0032] The inkjet recording apparatus 301 includes a control unit 302 and a determination unit 303. The control unit 302 has a CPU 304 and controls the operation of the recording element substrate 400. The determination unit 303 determines whether the anti-fuse element Ca is in an insulating state. The control unit 302 controls the recording apparatus 301 based on the result of determination by the determination unit 303.

[0033] The control unit 302 also controls the switching of a switch (SW1). When SW1 is connected to terminal C, a path is established between the read power supply (e.g., 5 V) and the connection terminal A of the antifuse element Ca. On the other hand, when SW1 is connected to terminal D, a path is established between the write power supply (e.g., 24 V) and the connection terminal A of the antifuse Ca.

[0034] Furthermore, the control unit 302 generates control data to be sent to the internal control data supply circuit 201 through the CLK terminal and DATA terminal of the printing element substrate 400. This control data includes a clock signal (CLK), a data signal (DATA), a latch signal (LT), and a heat enable signal (HE). This control data controls the driving of the driving element MD2 of the memory module 206 and the driving element MD3 of the short function module 208.

[0035] When SW1 is connected to terminal D, terminal A is connected to a write power supply mounted on an inkjet recording apparatus or the like, and terminal B on the ground side is connected to the ground mounted on the inkjet recording apparatus or the like. When writing information to the antifuse element Ca, the drive element MD2 of the memory module 206 is turned on. This applies a high voltage VID to the gate oxide film constituting the antifuse element Ca. This destroys the gate oxide film, making the antifuse element Ca electrically conductive and writing information. Before writing, the antifuse element Ca was a capacitive element, but after writing, it becomes a resistive element Ra. Of the two memory modules 206, memory module 206-1 shows a state in which no information has been written to the antifuse element Ca (a state in which dielectric breakdown has not occurred). On the other hand, memory module 206-2 shows a state in which information has been written to the antifuse element and it has become a resistive element Ra (a state in which dielectric breakdown has occurred).

[0036] Next, the operation of reading information recorded in the antifuse element Ca will be described with reference to Fig. 3. For the sake of explanation, the ejection module 204 and the like shown in Figs. 1 and 2 are omitted in Fig. 3. When reading information, terminal A shown in Fig. 3 is connected to a current source 207 mounted on the recording device or the like, and terminal B is connected to a ground mounted on the recording device or the like. A short function module 208 is connected in parallel to each memory module 206.

[0037] In the first embodiment, when reading information, a constant current is supplied from the current source 207 to the terminal A, and the write state of the anti-fuse element Ca is determined by reading the Vout voltage generated at the terminal A with a recording device or the like. In the first embodiment, the limit voltage of the current source 207 is set to 5 V.

[0038] First, as in the memory module 206-1, when no information is written to the anti-fuse element Ca, the anti-fuse element Ca is insulated. Therefore, when the on-resistance value of the drive element MD2 is Rd2 and the current value of the current source 207 is is, the output voltage Vouta is expressed by the following equation (1).

[0039] Vouta=is×(Rp+Rd2) …Equation (1) For example, if is=20 μA, Rp=70 kΩ, and Rd2=1 kΩ, the output voltage Vouta is approximately 1.4 V.

[0040] On the other hand, when information is written to the anti-fuse element Ca, as in memory module 206-2, the anti-fuse element Ca functions as a resistive element Ra, and if the on-resistance value of the driving element MD2 is Rd2, the output voltage Voutb is expressed by the following equation (2):

[0041] Voutb=is×((Ra×Rp) / (Ra+Rp)+Rd2) …Equation (2) For example, if is=20 μA, Rp=70 kΩ, Rd2=1 kΩ, and Ra=1 kΩ, the output voltage Voutb will be 0.05 V or less.

[0042] In addition, in the short function module 208, the anti-fuse element Ca is short-circuited with aluminum material, so the anti-fuse element functions as a resistance element R0. Therefore, if the on-resistance of the drive element MD3 is Rd3, the output voltage Vouts is expressed by the following equation (3).

[0043] Vouts=is×((R0×Rp) / (R0+Rp)+Rd3) …Equation (3) For example, if is=20 μA, Rp=70 kΩ, Rd3=1 kΩ, and R0=0.01 kΩ, the output voltage Vouts will be 0.03 V or less.

[0044] The resistance element R0 made of aluminum and short-circuited may be any element that fulfills the short-circuit function, such as a simple resistance element or a wiring element.

[0045] Next, the flow of the read operation of the anti-fuse element Ca of the memory module 206-1 will be described with reference to FIG.

[0046] 4 is a flowchart illustrating a readout process of the antifuse element Ca by the control unit 302 of the inkjet recording apparatus 301 according to embodiment 1. The process shown in this flowchart is realized by the CPU 304 executing a program stored in a memory (not shown) of the control unit 302.

[0047] First, in S401, the CPU 304 switches SW1 to the read power supply (terminal C) side to supply a constant current from the current source 207 to terminal A. Next, in S402, the CPU 304 temporarily turns on the driving element MD3 of the short function module 208. As a result, the potential of terminal A becomes 0.03 V or less, the same as the Vouts described above. Then, in S403, the CPU 304 turns off the driving element MD3 (open state). Then, in S404, the CPU 304 turns on the driving element MD2 of the memory module 206-1 to which the antifuse element Ca is connected. Then, in S405, the Vout voltage (information recorded in the antifuse element) is read. Then, in S406, the CPU 304 reads the Vout voltage, then turns off the driving element MD2 of the memory module 206-1 to return it to its initial state, and this process ends.

[0048] FIG. 5 is a diagram illustrating a voltage waveform during a read operation of the anti-fuse element.

[0049] FIG. 5A shows the time-axis waveform of the potential at terminal A during a read operation of the antifuse element Ca of the memory module 206-1, indicated by a solid line. In the first embodiment, the initial value of the voltage at terminal A is 5 V, which is the limit voltage of the current source 207. When the driving element MD3 of the short function module 208 is turned on (S402), current immediately flows through the shorted resistor element R0, causing the Vout voltage to drop to 0.03 V or less, the same as Vouts. Next, when the driving element MD3 is turned off (S403), the potential at terminal A begins to rise, attempting to return to the initial limit voltage of 5 V. Next, when the driving element MD2 of the memory module 206-1 is turned on (S404), current flows through the memory module 206-1, reaching a voltage value (1.4 V) equivalent to Vouta. After the voltage change stabilizes, the control unit 302 of the inkjet recording apparatus 301 reads the voltage value at terminal A.

[0050] 5A shows the voltage waveform at terminal A when only the driving element MD2 of memory module 206-1 is operating without operating the driving element MD3 of short function module 208. The (MD2) in parentheses indicates the timing when the driving element MD2 of memory module 206-1 starts to turn on, and (read) indicates the timing when the voltage at terminal A is read.

[0051] The waveform indicated by the dashed line is the voltage waveform at terminal A when the shorting function module 208 is not installed or is unused, and is a comparison example for the presence and absence of the shorting function module 208. When the drive terminal MD2 of the memory module 206-1 is turned on, the voltage at terminal A gradually rises from its initial value of 5V to the voltage Vouta (1.4V). The reason for this gradual waveform is a transient phenomenon during voltage drop caused by the capacitive components of the antifuse element Ca of the memory module 206-1 and the circuitry of the inkjet recording device connected to terminal A. To accurately measure the voltage value at terminal A during readout, it is necessary to wait until the voltage has sufficiently dropped and reached a steady state. However, in this case, it takes a long time for the voltage to drop sufficiently and reach a steady state, making it difficult to shorten the time required for readout.

[0052] Therefore, in the first embodiment, when reading out the voltage at terminal A of antifuse element Ca of memory module 206-1, short function module 208 shown by the solid line is operated to shorten the time until the voltage at terminal A drops sufficiently and reaches a steady state. This shortens the waiting time until the voltage at terminal A reaches a steady state, thereby enabling the timing for reading out the antifuse element to be advanced.

[0053] In Figure 5(B), the solid line shows the time-axis waveform of the potential at terminal A during a read operation in memory module 206-2. In memory module 206-2, the driving element MD3 of short function module 208 is turned on and then returned to the off state, and the waveform shape until driving element MD2 of memory module 206-2 is turned on is the same as that in Figure 5(A). When driving element MD2 of memory module 206-2 is turned on, anti-fuse element Ca functions as resistive element Ra, so that voltage Voutb at terminal A falls to 0.05 V or less. After the voltage change at terminal A stabilizes, the control unit 302 of the inkjet recording apparatus 301 reads the voltage value at terminal A.

[0054] 5B shows the voltage waveform at terminal A when drive element MD3 of short function module 208 is not operated and drive element MD2 of memory module 206-2 is operated. The (MD2) in parentheses indicates the timing when drive element MD2 starts to turn on, and (read) indicates the timing when the voltage at terminal A is read. When MD2 of memory module 206-2 is turned on, anti-fuse element Ca functions as resistance element Ra, so that voltage Voutb at terminal A becomes 0.05V or less.

[0055] 5, if the short function module 208 is not installed or is unused, the voltage at terminal A is read after waiting 9 ms after turning on the driving element MD2 of the memory module 206. In contrast, by operating the driving element MD3 of the short function module 208, the read waiting time can be reduced to 4 ms.

[0056] As described above, according to the first embodiment, the speed of the read operation of the terminal voltage of the anti-fuse element can be increased without using an external power supply or the like for once over-precharging the terminal voltage of the anti-fuse element.

[0057] [Embodiment 2] Next, a second embodiment of the present invention will be described with reference to Figures 6, 7, and 10. In the first embodiment described above, a configuration in which one or two memory modules 206 and one short function module 208 are provided has been described as shown in Figures 1 and 2.

[0058] 6, in the second embodiment, a configuration will be described in which a plurality of module groups 209 are formed, where an assembly of the modules 204, 206, and 208 is defined as a module group 209. That is, the recording element substrate 400 according to the second embodiment also has a plurality of short-circuit function modules 208.

[0059] FIG. 7 is a diagram illustrating the connection between a plurality of memory modules 206 and a short function module 208 in each module group.

[0060] FIG. 10 is a connection diagram of an inkjet printing apparatus 301 and a printing element substrate 400 according to the second embodiment.

[0061] The circuit configuration in each module of the recording element substrate 400 is the same as that in the first embodiment, and therefore a description thereof will be omitted. The write operation of the anti-fuse element Ca is also the same as that in the first embodiment, and therefore a description thereof will be omitted.

[0062] For y groups each having x memory modules 206 and at least one short function module, the memory modules 206 and the short function module 208 are controlled for each group by the output signal of the control data supply circuit 201. Specifically, the memory modules 206 each receive at least one bit of a block selection signal via a signal line 202, a group selection signal via a signal line 203, and a switching signal via a signal line 205, thereby driving the antifuse element Ca in a time-division manner.

[0063] Similarly, the short function module 208 also drives the resistance element R0 in a time-division manner by each sheet function module receiving at least one bit each of the block selection signal, the group selection signal, and the switching signal.

[0064] At this time, either the ejection module 204 or the memory module 206 is selected to be driven using a switching signal via a signal line 205. Specifically, when the switching signal is at a low level, the ejection module 204 is selected, and when the switching signal is at a high level, the memory module 206 is selected. This switching signal is logically configured so that all of the pressure generation elements Rh and all of the anti-fuse elements Ca are not driven simultaneously. Similarly, the short function module 208 is logically configured so that either the ejection module 204 or the short function module 208 is selected to be driven by a switching signal, and all of the pressure generation elements Rh and all of the resistance elements R0 are not driven simultaneously.

[0065] Here, if the switching signal is 1 bit, the relationship between the total number x' of antifuse elements Ca and resistance elements R0 in one memory group and the number n of time-division selection signals is x'≦n, and the relationship between the number y of memory groups and the number m of block selection signals is y≦m. Furthermore, by providing multiple bits for the recording element / memory switching signal, a configuration may be created in which more than (n×m) antifuse elements Ca and resistance elements R0 can be controlled.

[0066] Next, the operation during read will be described. The basic read operation is the same as in embodiment 1. In a configuration with multiple short function modules 208, the same effect as in embodiment 1 can be obtained by driving and controlling the resistance element R0 of a memory module different from the antifuse element Ca to be read. However, as the number of connected memory module groups increases, the parasitic capacitance increases, which affects the delay in read speed, so it is better to drive the resistance element R0 of the same module group as the antifuse element Ca to be read.

[0067] The resistance element R0 is not limited to the anti-fuse element Ca made of aluminum material and may be any element that fulfills the short-circuit function, such as a simple resistance element or wiring element.

[0068] As described above, according to the second embodiment, by dividing and driving a module group into a module group, it is possible to obtain the same effect as in the first embodiment even if the number of memory modules is increased.

[0069] [Embodiment 3] The third embodiment will be described with reference to Fig. 9. In the second embodiment, when an assembly of modules 204, 206, and 208 is defined as a module group 209 as shown in Fig. 7, a plurality of module groups 209 are formed, and each module group is connected to a common power source.

[0070] FIG. 9 is a diagram illustrating a module group of a recording element substrate according to the third embodiment.

[0071] 9 according to the third embodiment shows a module group of printing element substrates connected to different power supply terminals VID1 and VID2 for the module group 209. In this configuration, the read operation flow of FIG. 4 is executed in parallel for each module at the same time, thereby making it possible to simultaneously read out the terminal voltages of the antifuse elements Ca of multiple modules.

[0072] This makes it possible to increase the speed of the operation when reading out information from all the anti-fuse elements mounted on the recording element substrate.

[0073] (Other embodiments) The present invention can also be realized by supplying a program that realizes one or more functions of the above-described embodiments to a system or device via a network or a storage medium, and having one or more processors in the computer of the system or device read and execute the program. It can also be realized by a circuit (e.g., ASIC) that realizes one or more functions.

[0074] The present invention is not limited to the above-described embodiments, and various modifications and variations can be made without departing from the spirit and scope of the present invention. Therefore, the following claims are appended to apprise the public of the scope of the present invention. [Explanation of symbols]

[0075] 202, 203... signal lines, 204... ejection module, 205... switching signal line, 206... memory module, 208... short function module, 301... inkjet recording device, 302... control unit, 303... determination unit, 304... CPU, 400... recording element substrate

Claims

1. A recording apparatus for performing recording using a recording head having a recording element substrate including a memory module having an antifuse element and a functional module connected in parallel to the memory module and having a resistance element connected in place of the antifuse element of the memory module, A control means is provided. The recording device is characterized in that, when reading the memory module, the control means brings the functional module into a conductive state, brings the functional module into an open state from the conductive state, and then brings the memory module into a conductive state and reads the terminal voltage of the anti-fuse element.

2. The memory module includes: a first resistor connected in parallel with the antifuse element; and a first driving element that controls conduction of the antifuse element; The functional module includes: a second driving element that controls conduction of the resistance element; 2. The recording apparatus according to claim 1, wherein the control means drives the first driving element of the memory module to make it conductive, and drives the second driving element of the functional module to make it conductive.

3. The recording device according to claim 2, characterized in that by bringing the functional module into a conductive state, the voltage applied to the anti-fuse element is reduced to a voltage based on the resistance value of the resistive element, the on-resistance value of the second driving element, and the current value.

4. A recording device as described in any one of claims 1 to 3, characterized in that the memory module and the functional module are supplied with current from a common current source, and the control means switches the current source supplied to the memory module when writing to the memory module and when reading from the memory module.

5. 5. The recording device according to claim 1, wherein the terminal voltage of the anti-fuse element is a voltage generated in the anti-fuse element by a current from a current source that is supplied to the memory module when reading from the memory module.

6. The control means further divides the plurality of memory modules and the plurality of functional modules of the recording element substrate into a plurality of groups, each of which includes at least a plurality of the memory modules and one of the functional modules, and for each of the plurality of groups, when reading the memory module, controls the functional module to be in a conductive state, changes the functional module from the conductive state to an open state, and then controls the memory module to be in a conductive state and reads the terminal voltage of the anti-fuse element.

7. 7. The recording apparatus according to claim 6, wherein the plurality of groups are connected to different current sources, so that the control means executes the control in parallel for each of the plurality of groups.

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