Display device, electronic device, and method for manufacturing a display device.

Abstract

A method for producing a display device having high display quality is provided. The method is a method for producing a display device having first to third insulators, first and second conductors, and first and second EL layers. The first conductor is formed over the first insulator, and the second insulator is formed over the first insulator and the first conductor. A first opening that reaches the first conductor is formed in the second insulator. A sacrificial layer is formed over the second insulator and the bottom of the first opening, and a resist is applied onto the sacrificial layer. The resist is exposed to light and developed to form a second opening that reaches the sacrificial layer in an area overlapping the first conductor. In an area of the bottom of the second opening, a third opening is formed, and a first EL layer is formed over the resist, the sacrificial layer, and the first conductor. Thereafter, the first EL layer over the resist and the sacrificial layer is removed by removing the resist and the sacrificial layer. A second EL layer is formed over the first EL layer and the second insulator, and the second conductor and the third insulator are sequentially formed over the second EL layer.

Description

Technical Field

[0001] One aspect of the present invention relates to a display device, an electronic device, and a method for manufacturing a display device.

[0002] Note that one aspect of the present invention is not limited to the above technical field. The technical field of the invention disclosed in this specification and the like relates to an object, a driving method, or a manufacturing method. Or, one aspect of the present invention relates to a process, a machine, a manufacture, or a composition of matter. Therefore, more specifically, as the technical field of one aspect of the present invention disclosed in this specification, semiconductor devices, display devices, liquid crystal display devices, light-emitting devices, power storage devices, imaging devices, storage devices, signal processing devices, processors, electronic devices, systems, their driving methods, their manufacturing methods, or their inspection methods can be cited as an example.

Background Art

[0003] There is a demand for display devices applicable to XR such as VR (Virtual Reality) and AR (Augmented Reality). Specifically, for example, in order to enhance the sense of reality and immersion, it is desired that the display device has high definition and high color reproducibility.

[0004] Examples of what can be applied to the display device include display devices provided with light-emitting devices such as liquid crystal display devices, organic EL (Electro Luminescence), and light-emitting diodes (LEDs). Further, Patent Document 1 discloses a display device with a high pixel count and high definition provided with a light-emitting device including organic EL.

Prior Art Documents

Patent Documents

[0005]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0006] As mentioned above, XR devices require display devices with high display quality. Furthermore, because XR display devices need to be housed in, for example, glasses-type or goggle-type housings, the size of the display device needs to be reduced to approximately 2 inches or less, or 1 inch or less.

[0007] On the other hand, for display devices used in XR applications, higher resolution is necessary to enhance realism and immersion. In this case, for example, the number of pixels that can be placed within a given size can be increased by designing the display to reduce the pitch width between pixels and wiring, or by reducing the size of the pixels. However, when considering a display device that includes an organic EL light-emitting device, if the pixel size is reduced, it becomes difficult to form organic EL light-emitting layers of different colors for each pixel, which may limit the manufacturing process of the display device.

[0008] One aspect of the present invention aims to provide a method for manufacturing a high-resolution display device. Alternatively, one aspect of the present invention aims to provide a method for manufacturing a low-power consumption display device. Alternatively, one aspect of the present invention aims to provide a method for manufacturing a small-sized display device. Alternatively, one aspect of the present invention aims to provide a method for manufacturing a novel display device. Alternatively, one aspect of the present invention aims to provide a display device that satisfies at least one of the following conditions: high resolution, low power consumption, and small area. Alternatively, one aspect of the present invention aims to provide an electronic device having the above-mentioned display device.

[0009] It should be noted that the problems addressed by one aspect of the present invention are not limited to those listed above. The problems listed above do not preclude the existence of other problems. These other problems are those not mentioned in this section, as described below. Those not mentioned in this section can be derived from the description in the specification or drawings, etc., by those skilled in the art, and can be appropriately extracted from these descriptions. It should be noted that one aspect of the present invention solves at least one of the problems listed above and other problems. It should be noted that one aspect of the present invention does not need to solve all of the problems listed above and other problems. [Means for solving the problem]

[0010] (1) One aspect of the present invention is a method for manufacturing a display device having a first insulator, a second insulator, a third insulator, a first conductor, a second conductor, a first EL layer, and a second EL layer. The method for manufacturing the display device comprises steps 1 to 12. Step 1 comprises forming a first conductor on the first insulator. Step 2 comprises forming a second insulator on the first insulator and on the first conductor. Step 3 comprises forming a first opening in the second insulator in a region where the second insulator overlaps with the first conductor, reaching the first conductor. Step 4 comprises forming a sacrificial layer on the second insulator and on the first conductor located at the bottom surface of the first opening. Step 5 comprises coating a photoresist on the sacrificial layer. Step 6 comprises exposing and developing the photoresist, thereby forming a second opening with an inverse taper structure in a region of the photoresist overlapping with the first conductor, reaching the sacrificial layer. Step 7 includes forming a third opening that reaches the first conductor and the second insulator located at the bottom of the first opening, in a region of the sacrificial layer located at the bottom of the second opening that overlaps the first opening and a region that overlaps the second insulator. Step 8 includes forming a first EL layer on the photoresist, on the sacrificial layer and on the first conductor. Step 9 includes removing the photoresist, the sacrificial layer and the first EL layer formed on the upper surfaces of the photoresist and the sacrificial layer, respectively. Step 10 includes forming a second EL layer on the first EL layer and on the second insulator. Step 11 includes forming a second conductor on the second EL layer. Step 12 includes forming a third insulator on the second conductor.

[0011] (2) Alternatively, one aspect of the present invention is a method for manufacturing a display device that includes a first insulator, a second insulator, a third insulator, a first conductor, a second conductor, a first EL layer, and a second EL layer, and is different from (1) above. The method for manufacturing the display device comprises a first to twelfth step. The first step is to form a first conductor on the first insulator. The second step is to form a second insulator on the first insulator and on the first conductor. The third step is to form a first opening reaching the first conductor in a region of the second insulator where the second insulator overlaps with the first conductor, and to form a fourth opening in a region of the second insulator where the second insulator does not overlap with the first conductor but overlaps with the first insulator. The fourth step is to form a sacrificial layer on the second insulator and on the first conductor located at the bottom surface of the first opening. Step 5 includes coating a photoresist onto a sacrificial layer. Step 6 includes exposing and developing the photoresist to form a second opening with an inverse tapered structure in the region of the photoresist that overlaps the first conductor and the fourth opening. Step 7 includes forming a third opening in the region of the sacrificial layer located at the bottom surface of the second opening, which overlaps the first conductor and the second insulator, and whose sides overlap the bottom surface and / or sides of the fourth opening. Step 8 includes forming a first EL layer on the photoresist, the sacrificial layer and the first conductor. Step 9 includes removing the photoresist, the sacrificial layer and the first EL layer formed on the upper surfaces of the photoresist and the sacrificial layer, respectively. Step 10 includes forming a second EL layer on the first EL layer, the second insulator and the fourth opening. Step 11 includes forming a second conductor on the second EL layer. Step 12 includes forming a third insulator on the second conductor.

[0012] (3) Alternatively, in one aspect of the present invention, in (1) or (2) above, the first EL layer may have either a hole transport layer or an electron transport layer and an emissive layer, and the second EL layer may have the other of the hole transport layer or the electron transport layer.

[0013] (4) Alternatively, one aspect of the present invention may be a method for manufacturing a display device, comprising a 13th step and a 14th step in any one of (1) to (3) above. In particular, it is preferable that the 13th step includes a step of forming a resin layer on the third insulator, and that the 14th step includes a step of bonding a substrate onto the resin layer.

[0014] (5) Alternatively, in one aspect of the present invention, the manufacturing method may be such that the substrate has a colored layer in (4) above. In particular, in step 14, it is preferable that the substrate is bonded to the resin layer at a position where the colored layer is superimposed on the first EL layer.

[0015] (6) Alternatively, one aspect of the present invention is a display device comprising a first insulator, a second insulator, a third insulator, a first conductor, a second conductor, a first EL layer, and a second EL layer. The first conductor is located on the first insulator, and the second insulator is located on the first insulator and on the first conductor. The second insulator also has a first opening that reaches the first conductor in a region where the second insulator overlaps with the first conductor, and a fourth opening in a region where the second insulator does not overlap with the first conductor but overlaps with the first insulator. The first EL layer is located on the second insulator and on the first conductor located at the bottom surface of the first opening, and the second EL layer is located on the first EL layer, on the second insulator, and above the first insulator located at the bottom surface of the fourth opening. Furthermore, the second conductor is located on the second EL layer, and the third insulator is located on the second conductor.

[0016] (7) Alternatively, in one aspect of the present invention, in (6) above, the first EL layer may have a hole transport layer or an electron transport layer and an emissive layer, and the second EL layer may have the other of a hole transport layer or an electron transport layer.

[0017] (8) Alternatively, in one aspect of the present invention, the configuration in (6) or (7) above may include a resin layer and a substrate. In particular, it is preferable that the resin layer is located on the third insulator and the substrate is located on the resin layer.

[0018] (9) Alternatively, in one aspect of the present invention, in (8) above, the substrate may have a colored layer at a position superimposed on the first EL layer.

[0019] (10) Alternatively, one aspect of the present invention is an electronic device having any one of the above-mentioned (6) to (9) display devices and a housing.

[0020] In this specification, a semiconductor device refers to a device that utilizes semiconductor properties, including circuits containing semiconductor elements (transistors, diodes, photodiodes, etc.), devices having such circuits, etc. It also refers to any device that can function by utilizing semiconductor properties. For example, integrated circuits, chips equipped with integrated circuits, and electronic components with chips housed in packages are all examples of semiconductor devices. Furthermore, memory devices, display devices, light-emitting devices, lighting devices, and electronic devices may themselves be semiconductor devices or may contain semiconductor devices.

[0021] Furthermore, when it is stated in this specification that X and Y are connected, it is assumed that this specification discloses the cases in which X and Y are electrically connected, functionally connected, and directly connected. Therefore, it is assumed that the disclosed connections are not limited to predetermined connections, such as those shown in the figures or text, but also include connections other than those shown in the figures or text. X and Y are objects (e.g., devices, elements, circuits, wiring, electrodes, terminals, conductive films, layers, etc.).

[0022] One example of a case where X and Y are electrically connected is that one or more elements that enable electrical connection between X and Y (e.g., switches, transistors, capacitive elements, inductors, resistors, diodes, display devices, light-emitting devices, loads, etc.) can be connected between X and Y. A switch has the function of controlling on / off states. In other words, a switch has the function of controlling whether or not current flows by being in a conductive state (on state) or a non-conductive state (off state).

[0023] One example of a functional connection between X and Y is when one or more circuits that enable the functional connection between X and Y (for example, logic circuits (inverters, NAND gates, NOR gates, etc.), signal conversion circuits (digital-to-analog conversion circuits, analog-to-digital conversion circuits, gamma correction circuits, etc.), potential level conversion circuits (power supply circuits (boost circuits, buck circuits, etc.), level shifter circuits that change the potential level of a signal, etc.), voltage sources, current sources, switching circuits, amplification circuits (circuits that can increase the signal amplitude or current amount, etc., operational amplifiers, differential amplifiers, source follower circuits, buffer circuits, etc.), signal generation circuits, memory circuits, control circuits, etc.) can be connected between X and Y.

[0024] Furthermore, when it is explicitly stated that X and Y are electrically connected, this includes both cases where X and Y are electrically connected (i.e., connected with another element or circuit in between) and cases where X and Y are directly connected (i.e., connected without another element or circuit in between).

[0025] Furthermore, it can be expressed as, for example, "X, Y, the source (or first terminal, etc.) and drain (or second terminal, etc.) of the transistor are electrically connected to each other, and the connection is in the order of X, the source (or first terminal, etc.) of the transistor, the drain (or second terminal, etc.) of the transistor, and Y." Alternatively, it can be expressed as, "The source (or first terminal, etc.) of the transistor is electrically connected to X, and the drain (or second terminal, etc.) of the transistor is electrically connected to Y, and X, the source (or first terminal, etc.) of the transistor, the drain (or second terminal, etc.) of the transistor, and Y are electrically connected in this order." Alternatively, it can be expressed as, "X is electrically connected to Y via the source (or first terminal, etc.) and drain (or second terminal, etc.) of the transistor, and X, the source (or first terminal, etc.) of the transistor, the drain (or second terminal, etc.) of the transistor, and Y are provided in this connection order." By using similar notation to these examples to define the order of connections in a circuit configuration, the source (or first terminal, etc.) and drain (or second terminal, etc.) of a transistor can be distinguished and their technical scope determined. Note that these notational methods are examples only and are not limited to them. Here, X and Y are objects (e.g., devices, elements, circuits, wiring, electrodes, terminals, conductive films, layers, etc.).

[0026] Even if independent components are shown as electrically connected in a circuit diagram, a single component may possess the functions of multiple components. For example, if part of a wire also functions as an electrode, a single conductive film possesses the functions of both a wire and an electrode. Therefore, in this specification, "electrically connected" includes cases where a single conductive film possesses the functions of multiple components.

[0027] Furthermore, in this specification, "resistive element" can refer to, for example, a circuit element having a resistance value higher than 0Ω, or wiring having a resistance value higher than 0Ω. Therefore, in this specification, "resistive element" includes wiring having a resistance value, transistors, diodes, coils, etc., through which current flows between the source and drain. Therefore, the term "resistive element" may be replaced with terms such as "resistance," "load," or "region having a resistance value." Conversely, the terms "resistance," "load," or "region having a resistance value" may be replaced with terms such as "resistive element." The resistance value can be, for example, preferably 1mΩ or more and 10Ω or less, more preferably 5mΩ or more and 5Ω or less, and even more preferably 10mΩ or more and 1Ω or less. Also, for example, 1Ω or more and 1 × 10 9 It may also be less than or equal to Ω.

[0028] Furthermore, in this specification, "capacitive element" can refer to, for example, a circuit element having a capacitance value higher than 0F, a region of wiring having a capacitance value higher than 0F, parasitic capacitance, the gate capacitance of a transistor, etc. Also, terms such as "capacitive element," "parasitic capacitance," and "gate capacitance" can sometimes be replaced with terms such as "capacitance." Conversely, the term "capacitance" can sometimes be replaced with terms such as "capacitive element," "parasitic capacitance," and "gate capacitance." Also, the term "pair of electrodes" in relation to "capacitance" can be replaced with terms such as "pair of conductors," "pair of conductive regions," or "pair of regions." The capacitance value can be, for example, 0.05fF or more and 10pF or less. Alternatively, it may be, for example, 1pF or more and 10μF or less.

[0029] Furthermore, in this specification, a transistor has three terminals called the gate, source, and drain. The gate is a control terminal that controls the conduction state of the transistor. The two terminals that function as either the source or the drain are the input and output terminals of the transistor. Depending on the conductivity type of the transistor (n-channel type, p-channel type) and the potential applied to the three terminals of the transistor, one of the two input and output terminals becomes the source and the other becomes the drain. For this reason, in this specification, the terms source and drain may be interchangeable. Also, in this specification, when describing the connection relationships of a transistor, the notation "one of the source or drain" (or first electrode or first terminal) and "the other of the source or drain" (or second electrode or second terminal) is used. Depending on the structure of the transistor, in addition to the three terminals described above, there may be a back gate. In this case, in this specification, one of the gate or back gate of the transistor may be called the first gate, and the other of the gate or back gate of the transistor may be called the second gate. Furthermore, in the same transistor, the terms "gate" and "back gate" may be interchangeable. Furthermore, if a transistor has three or more gates, in this specification, each gate may be referred to as the first gate, second gate, third gate, and so on.

[0030] For example, in this specification, a transistor with a multi-gate structure having two or more gate electrodes can be used as an example of a transistor. In a multi-gate structure, the channel formation regions are connected in series, resulting in a structure in which multiple transistors are connected in series. Therefore, the multi-gate structure can reduce the off-current and improve the transistor's breakdown voltage (improve reliability). Alternatively, the multi-gate structure allows for a voltage-current characteristic with a flat slope, where the current between the drain and source does not change much even when the voltage between the drain and source changes during operation in the saturation region. By utilizing this flat voltage-current characteristic, an ideal current source circuit or an active load with a very high resistance can be realized. As a result, a differential circuit or current mirror circuit with good characteristics can be realized.

[0031] Furthermore, even if a single circuit element is depicted in a circuit diagram, that element may actually comprise multiple circuit elements. For example, if one resistor is shown in a circuit diagram, it includes cases where two or more resistors are electrically connected in series. Similarly, if one capacitor is shown in a circuit diagram, it includes cases where two or more capacitors are electrically connected in parallel. Similarly, if one transistor is shown in a circuit diagram, it includes cases where two or more transistors are electrically connected in series and the gates of each transistor are electrically connected to each other. Likewise, if one switch is shown in a circuit diagram, it includes cases where the switch has two or more transistors, and these two or more transistors are electrically connected in series or in parallel, and the gates of each transistor are electrically connected to each other.

[0032] Furthermore, in this specification, the term "node" can be replaced with terms such as terminal, wiring, electrode, conductive layer, conductor, impurity region, etc., depending on the circuit configuration, device structure, etc. Also, terminals, wiring, etc. can be replaced with "node."

[0033] Furthermore, in this specification, "voltage" and "potential" may be used interchangeably as appropriate. "Voltage" is the potential difference from a reference potential. For example, if the reference potential is the ground potential (earth potential), then "voltage" can be replaced with "potential." Note that the ground potential does not necessarily mean 0V. Also, potential is relative, and as the reference potential changes, the potential applied to the wiring, the potential applied to the circuit, and the potential output from the circuit also change.

[0034] Furthermore, in this specification, the terms "high-level potential" and "low-level potential" do not refer to specific potentials. For example, if two wires are described as "functioning as wires that supply a high-level potential," the high-level potentials provided by each wire do not have to be equal. Similarly, if two wires are described as "functioning as wires that supply a low-level potential," the low-level potentials provided by each wire do not have to be equal.

[0035] "Electric current" refers to the phenomenon of electric charge movement (electrical conduction). For example, the statement "electrical conduction of positively charged elements is occurring" can be rephrased as "electrical conduction of negatively charged elements is occurring in the opposite direction." Therefore, in this specification, unless otherwise specified, "electric current" refers to the phenomenon of electric charge movement associated with the movement of carriers (electrical conduction). Carriers here include electrons, holes, anions, cations, complex ions, etc., and the carriers differ depending on the system through which the current flows (e.g., semiconductors, metals, electrolytes, vacuum, etc.). Furthermore, the "direction of current" in wiring, etc., is the direction in which positively charged carriers move and is expressed as a positive current quantity. In other words, the direction in which negatively charged carriers move is the opposite direction to the direction of the current and is expressed as a negative current quantity. Therefore, in this specification, if there is no specification regarding the positive or negative (or direction) of the current, a statement such as "current flows from element A to element B" can be rephrased as "current flows from element B to element A," etc. Furthermore, descriptions such as "current is input to element A" can be rephrased as "current is output from element A."

[0036] Furthermore, the ordinal numbers "1st," "2nd," and "3rd" in this specification are used to avoid confusion of constituent elements. Therefore, they do not limit the number of constituent elements, nor do they limit the order of the constituent elements. For example, a constituent element referred to as "1st" in one embodiment of this specification may be referred to as "2nd" in another embodiment or in the claims. Also, for example, a constituent element referred to as "1st" in one embodiment of this specification may be omitted in another embodiment or in the claims.

[0037] Furthermore, in this specification, terms indicating placement such as "above" and "below" are sometimes used for convenience to explain the positional relationship between components with reference to the drawings. Also, the positional relationship between components changes as appropriate depending on the direction in which each component is depicted. Therefore, the terms explained in the specification are not limited to those described and can be appropriately rephrased depending on the situation. For example, the expression "insulator located on the upper surface of the conductor" can be rephrased as "insulator located on the lower surface of the conductor" by rotating the orientation of the drawing shown by 180 degrees.

[0038] Furthermore, the terms "above" or "below" do not limit the positional relationship of the components to being directly above or below each other and in direct contact. For example, the expression "electrode B on insulating layer A" does not require that electrode B be formed in direct contact with insulating layer A, and does not exclude cases where other components are included between insulating layer A and electrode B.

[0039] Furthermore, in this specification, terms such as "film" and "layer" can be interchanged as needed. For example, the term "conductive layer" may be changed to the term "conductive film." Or, for example, the term "insulating film" may be changed to the term "insulating layer." Alternatively, depending on the circumstances, terms such as "film" and "layer" can be omitted and replaced with other terms. For example, the term "conductive layer" or "conductive film" may be changed to the term "conductor." Or, for example, the terms "insulating layer" or "insulating film" may be changed to the term "insulator."

[0040] Furthermore, in this specification, terms such as "electrode," "wiring," and "terminal" do not functionally limit these components. For example, "electrode" may be used as part of "wiring," and vice versa. Moreover, the terms "electrode" or "wiring" include cases where multiple "electrodes" or "wiring" are formed as a single unit. Similarly, for example, "terminal" may be used as part of "wiring" or "electrode," and vice versa. Furthermore, the term "terminal" also includes cases where multiple "electrodes," "wiring," or "terminals" are formed as a single unit. Therefore, for example, an "electrode" can be part of "wiring" or a "terminal," and vice versa. In addition, terms such as "electrode," "wiring," and "terminal" may be replaced with terms such as "region" depending on the circumstances.

[0041] Furthermore, in this specification, terms such as "wiring," "signal line," and "power line" can be interchanged with each other depending on the circumstances or situation. For example, the term "wiring" may be changed to the term "signal line." Also, for example, the term "wiring" may be changed to the term "power line." Similarly, the reverse is also true; terms such as "signal line" and "power line" may be changed to the term "wiring." Terms such as "power line" may be changed to the term "signal line." Similarly, the reverse is also true; terms such as "signal line" may be changed to the term "power line." In addition, the term "potential" applied to the wiring may be changed to the term "signal," depending on the circumstances or situation. Similarly, the reverse is also true; terms such as "signal" may be changed to the term "potential."

[0042] In this specification, semiconductor impurities refer to elements other than the main components that make up the semiconductor layer. For example, elements with a concentration of less than 0.1 atomic percent are impurities. The presence of impurities can cause, for example, an increase in the defect level density of the semiconductor, a decrease in carrier mobility, and a decrease in crystallinity. When the semiconductor is an oxide semiconductor, impurities that alter the properties of the semiconductor include, for example, Group 1 elements, Group 2 elements, Group 13 elements, Group 14 elements, Group 15 elements, and transition metals other than the main components. In particular, examples include hydrogen (which is also found in water), lithium, sodium, silicon, boron, phosphorus, carbon, and nitrogen. Specifically, when the semiconductor is a silicon layer, impurities that alter the properties of the semiconductor include, for example, Group 1 elements, Group 2 elements, Group 13 elements, and Group 15 elements (however, oxygen and hydrogen are not included).

[0043] In this specification, a switch refers to a device that has the function of controlling whether or not to allow current to flow by being in a conductive (on) state or a non-conductive (off) state. Alternatively, a switch refers to a device that has the function of selecting and switching the path through which current flows. Therefore, a switch may have two or more terminals for conducting current in addition to control terminals. Examples include electrical switches and mechanical switches. In other words, a switch is not limited to any particular type, as long as it can control current.

[0044] Examples of electrical switches include transistors (e.g., bipolar transistors, MOS transistors), diodes (e.g., PN diodes, PIN diodes, Schottky diodes, MIM (Metal Insulator Metal) diodes, MIS (Metal Insulator Semiconductor) diodes, diode-connected transistors, etc.), or logic circuits combining these. When a transistor is used as a switch, the "conducting state" of the transistor refers to a state where, for example, the source and drain electrodes of the transistor can be considered electrically short-circuited, or a state where current can flow between the source and drain electrodes. Conversely, the "non-conducting state" of the transistor refers to a state where the source and drain electrodes of the transistor can be considered electrically disconnected. When a transistor is used simply as a switch, the polarity (conductivity type) of the transistor is not particularly limited.

[0045] One example of a mechanical switch is a switch that uses MEMS (Micro-Electro-Mechanical Systems) technology. This switch has mechanically movable electrodes, and it operates by controlling the conduction and non-conductivity through the movement of these electrodes.

[0046] Furthermore, in this specification, devices fabricated using a metal mask or FMM (Fine Metal Mask, a high-resolution metal mask) may be referred to as MM (Metal Mask) structured devices. Also, in this specification, devices fabricated without using a metal mask or FMM may be referred to as MML (Metal Maskless) structured devices.

[0047] In this specification, a structure in which different light-emitting layers are created or painted for each color of light-emitting device (here, blue (B), green (G), and red (R)) may be referred to as an SBS (Side By Side) structure. Also, in this specification, a light-emitting device capable of emitting white light may be referred to as a white light-emitting device. A white light-emitting device can be combined with a colored layer (for example, a color filter) to create a full-color display device.

[0048] Furthermore, light-emitting devices can be broadly classified into single-structure and tandem-structure devices. A single-structure device has one light-emitting unit between a pair of electrodes, and it is preferable that this light-emitting unit includes one or more light-emitting layers. To obtain white light emission, one should select light-emitting layers such that the light emitted from each of the two or more layers is complementary in color. For example, by making the light-emitting color of the first light-emitting layer and the light-emitting color of the second light-emitting layer complementary, a configuration that emits white light as a whole can be obtained. The same applies to light-emitting devices having three or more light-emitting layers.

[0049] A tandem device preferably has two or more light-emitting units between a pair of electrodes, and each light-emitting unit preferably includes one or more light-emitting layers. To obtain white light emission, the device should be configured such that the light from the light-emitting layers of the multiple light-emitting units is combined to produce white light emission. The configuration for obtaining white light emission is the same as that for a single-structure device. In a tandem device, it is preferable to provide an intermediate layer, such as a charge-generating layer, between the multiple light-emitting units.

[0050] Furthermore, when comparing the aforementioned white light-emitting devices (single or tandem structure) with SBS structure light-emitting devices, SBS structure light-emitting devices can consume less power than white light-emitting devices. If you want to keep power consumption low, it is preferable to use SBS structure light-emitting devices. On the other hand, white light-emitting devices are preferable because their manufacturing process is simpler than that of SBS structure light-emitting devices, which can lead to lower manufacturing costs or higher manufacturing yields.

[0051] In this specification, "parallel" means a state in which two lines are positioned at an angle of -10° or more and 10° or less. Therefore, the case of -5° or more and 5° or less is also included. Furthermore, "approximately parallel" or "roughly parallel" means a state in which two lines are positioned at an angle of -30° or more and 30° or less. Furthermore, "perpendicular" means a state in which two lines are positioned at an angle of 80° or more and 100° or less. Therefore, the case of 85° or more and 95° or less is also included. Furthermore, "approximately perpendicular" or "roughly perpendicular" means a state in which two lines are positioned at an angle of 60° or more and 120° or less. [Effects of the Invention]

[0052] According to one aspect of the present invention, a method for manufacturing a high-resolution display device can be provided. Alternatively, according to one aspect of the present invention, a method for manufacturing a low-power consumption display device can be provided. Alternatively, according to one aspect of the present invention, a method for manufacturing a small-sized display device can be provided. Alternatively, according to one aspect of the present invention, a method for manufacturing a novel display device can be provided. Alternatively, according to one aspect of the present invention, a display device satisfying at least one of high resolution, low power consumption, and small area can be provided. Alternatively, according to one aspect of the present invention, an electronic device having the above-mentioned display device can be provided.

[0053] The effects of one aspect of the present invention are not limited to those listed above. The effects listed above do not preclude the existence of other effects. These other effects are those described below and not mentioned in this section. Those not mentioned in this section can be derived from the description in the specification or drawings, etc., by those skilled in the art, and can be appropriately extracted from these descriptions. One aspect of the present invention has at least one of the effects listed above and other effects. Therefore, one aspect of the present invention may, in some cases, not have the effects listed above. [Brief explanation of the drawing]

[0054] Figure 1 is a schematic cross-sectional view showing an example of the configuration of a display device. Figures 2A to 2C are schematic diagrams showing examples of the configuration of a light-emitting device. Figure 3 is a schematic cross-sectional view showing an example of the configuration of a display device. Figure 4 is a schematic cross-sectional view showing an example of the configuration of a display device. Figures 5A to 5E are schematic cross-sectional diagrams illustrating examples of methods for manufacturing display devices. Figures 6A to 6E are schematic cross-sectional diagrams illustrating examples of methods for manufacturing display devices. Figures 7A to 7E are schematic cross-sectional diagrams illustrating examples of methods for manufacturing a display device. Figures 8A to 8D are schematic cross-sectional diagrams illustrating examples of methods for manufacturing display devices. Figures 9A to 9C are schematic cross-sectional diagrams showing examples of the configuration of a display device. Figures 10A to 10C are schematic cross-sectional diagrams showing examples of the configuration of a display device. Figures 11A and 11B are schematic cross-sectional diagrams showing examples of the configuration of a display device. Figures 12A to 12E are schematic cross-sectional diagrams illustrating examples of methods for manufacturing display devices. Figures 13A to 13D are schematic cross-sectional diagrams illustrating examples of methods for manufacturing a display device. Figures 14A and 14B are schematic cross-sectional diagrams showing examples of the configuration of a display device. Figures 15A and 15B are schematic cross-sectional diagrams showing examples of transistor configurations. Figures 16A and 16B are schematic cross-sectional diagrams showing examples of transistor configurations. Figure 17A illustrates the classification of IGZO crystal structures, Figure 17B illustrates the XRD spectrum of crystalline IGZO, and Figure 17C illustrates the micro-electron diffraction pattern of crystalline IGZO. Figures 18A to 18F show examples of electronic device configurations. Figures 19A and 19B show examples of the display module configuration. Figures 20A and 20B show examples of the configuration of electronic equipment. Figures 21A to 21C show examples of the configuration of electronic equipment. Figures 22A to 22D show examples of electronic device configurations. [Modes for carrying out the invention]

[0055] In this specification, "metal oxide" refers to an oxide of a metal in a broad sense. Metal oxides are classified into oxide insulators, oxide conductors (including transparent oxide conductors), oxide semiconductors (also called oxide semiconductors or simply OS), etc. For example, if a metal oxide is included in the channel formation region of a transistor, that metal oxide may be referred to as an oxide semiconductor. In other words, if a metal oxide can constitute the channel formation region of a transistor having at least one of amplification, rectification, and switching functions, that metal oxide can be referred to as a metal oxide semiconductor. Furthermore, when an OS transistor is described, it can be rephrased as a transistor having a metal oxide or oxide semiconductor.

[0056] Furthermore, in this specification, metal oxides containing nitrogen may also be collectively referred to as metal oxides. Alternatively, metal oxides containing nitrogen may be called metal oxynitrides.

[0057] Furthermore, in this specification, the configurations shown in each embodiment can be appropriately combined with the configurations shown in other embodiments to form one aspect of the present invention. Also, if multiple configuration examples are shown within one embodiment, these configuration examples can be appropriately combined with each other.

[0058] Furthermore, any content described in one embodiment (even partial content) may be applied to, combined with, or substituted for at least one of the contents described in another embodiment (even partial content) and one or more other embodiments (even partial content).

[0059] The content described in the embodiments refers to the content described using various figures or the content described using text in the specification in each embodiment.

[0060] Furthermore, a diagram (even a part of it) described in one embodiment can be combined with another part of that diagram, another diagram (even a part of it) described in the same embodiment, and at least one diagram (even a part of it) described in one or more other embodiments to form even more diagrams.

[0061] The embodiments described herein are explained with reference to the drawings. However, it will be readily apparent to those skilled in the art that the embodiments can be implemented in many different ways, and their form and details can be modified in various ways without departing from the spirit and scope thereof. Therefore, the present invention is not to be interpreted as being limited to the contents described in the embodiments. In the configuration of the invention in the embodiments, the same reference numerals are used in common across different drawings for the same parts or parts having similar functions, and repeated explanations may be omitted. Also, in perspective views and the like, some components may be omitted in order to ensure clarity of the drawings.

[0062] In this specification, when the same reference numeral is used for multiple elements, and especially when it is necessary to distinguish them, the reference numeral may be accompanied by an identifying numeral such as "_1", "[n]", or "[m,n]". In addition, in drawings, etc., when an identifying numeral such as "_1", "[n]", or "[m,n]" is accompanied by a reference numeral, the identifying numeral may be omitted in this specification if it is not necessary to distinguish them.

[0063] Furthermore, in the drawings of this specification, the size, layer thickness, or area may be exaggerated for clarity. Therefore, it is not necessarily limited to that scale. The drawings are schematic representations of ideal examples and are not limited to the shapes or values ​​shown in the drawings. For example, they may include variations in signals, voltages, or currents due to noise, or variations in signals, voltages, or currents due to timing differences.

[0064] (Embodiment 1) This embodiment describes a display device according to one aspect of the present invention, and a method for manufacturing the display device.

[0065] <Example of display device configuration> Figure 1 is a cross-sectional view showing an example of a display device according to one aspect of the present invention. The display device 100 shown in Figure 1 has, as an example, a configuration in which a pixel circuit, a driving circuit, and the like are provided on a substrate 101.

[0066] As the substrate 101, for example, a semiconductor substrate (e.g., a single crystal substrate) made of silicon or germanium can be used. In addition to semiconductor substrates, other substrates that can be used for the substrate 101 include, for example, SOI (Silicon On Insulator) substrates, glass substrates, quartz substrates, plastic substrates, sapphire glass substrates, metal substrates, stainless steel substrates, substrates with stainless steel foil, tungsten substrates, substrates with tungsten foil, flexible substrates, laminated films, paper containing fibrous materials, or base films. Examples of glass substrates include barium borosilicate glass, aluminobosilicate glass, or soda-lime glass. Examples of flexible substrates, laminated films, and base films include the following: For example, plastics such as polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyethersulfone (PES), and polytetrafluoroethylene (PTFE). Alternatively, synthetic resins such as acrylic can also be used. Alternatively, examples include polypropylene, polyester, polyvinyl fluoride, or polyvinyl chloride. Alternatively, examples include polyamide, polyimide, aramid, epoxy resin, inorganic vapor-deposited film, or paper. If heat treatment is included in the manufacturing process of the display device 100, it is preferable to select a material with high heat resistance for the substrate 101.

[0067] In this embodiment, the substrate 101 is described as a semiconductor substrate having silicon or the like as its material.

[0068] The display device 100 has a transistor 170 and light-emitting devices 150a to 150c on a substrate 101.

[0069] The transistor 170 is provided on the substrate 101 and has an element isolation layer 171, a conductor 175, an insulator 174, a semiconductor region 173 consisting of a part of the substrate 101, a low-resistance region 172a that functions as a source region or a drain region, and a low-resistance region 172b. Therefore, the transistor 170 is a transistor in which silicon is included in the channel formation region (hereinafter referred to as a Si transistor). In Figure 1, one of the source region or drain region of the transistor 170 is shown to be electrically connected to the pixel electrode (conductor 121, described later) of the light-emitting device 150 via a conductor 126, described later, but the electrical connection configuration of the semiconductor device in one aspect of the present invention is not limited to this. A semiconductor device according to one aspect of the present invention may be configured such that, for example, the source or drain of the transistor 170 is electrically connected to the pixel electrode (conductor 121) of the light-emitting device 150 via the conductor 126, or the gate of the transistor 170 is electrically connected to the pixel electrode (conductor 121, described later) of the light-emitting device 150 via the conductor 126.

[0070] By making transistor 170 a Fin-type transistor, for example, the effective channel width can be increased, thereby improving the on-characteristics of transistor 170. Furthermore, the contribution of the gate electrode's electric field can be increased, thus improving the off-characteristics of transistor 170.

[0071] The transistor 170 may be either a p-channel or an n-channel type. Alternatively, multiple transistors 170 may be provided, allowing for the use of both p-channel and n-channel types.

[0072] In the low-resistance region 172a and low-resistance region 172b, which are the channel-forming region of the semiconductor region 173, the region near it, the source region, or the drain region, it is preferable that a semiconductor such as a silicon-based semiconductor is included, and it is preferable that single-crystal silicon is included. Alternatively, it may be formed from a material having Ge (germanium), SiGe (silicon germanium), GaAs (gallium arsenide), GaAlAs (gallium aluminum arsenide), GaN (gallium nitride), etc. A configuration using silicon in which the effective mass is controlled by applying stress to the crystal lattice and changing the lattice spacing is also possible. Alternatively, the transistor 170 may be made into a HEMT (High Electron Mobility Transistor) by using GaAs, GaAlAs, etc.

[0073] The conductor 175, which functions as the gate electrode, can be a conductive material such as a semiconductor material, metal material, alloy material, or metal oxide material containing an element that imparts n-type conductivity, such as arsenic or phosphorus, or an element that imparts p-type conductivity, such as boron, as well as silicon.

[0074] Furthermore, since the work function is determined by the material of the conductor, the threshold voltage of the transistor can be adjusted by selecting the material of the conductor. Specifically, it is preferable to use materials such as titanium nitride or tantalum nitride as the conductor. In addition, in order to achieve both conductivity and embedding properties, it is preferable to use a laminate of metal materials such as tungsten or aluminum as the conductor, and tungsten is particularly preferable in terms of heat resistance.

[0075] The element isolation layer 171 is provided to separate multiple transistors formed on the substrate 101. The element isolation layer can be formed using methods such as LOCOS (Local Oxidation of Silicon), STI (Shallow Trench Isolation), or mesa isolation.

[0076] Note that the transistor 170 shown in Figure 1 is just one example, and its structure is not limited to this example. Any appropriate transistor can be used depending on the circuit configuration, driving method, etc. For example, transistor 170 may have a planar structure instead of a fin type.

[0077] Insulators 116, 117, and 111 are stacked in order in the transistor 170 shown in Figure 1.

[0078] For insulators 116 and 117, for example, silicon oxide, silicon oxide nitride, silicon oxide nitride, silicon nitride, aluminum oxide, aluminum oxide nitride, aluminum oxide nitride, aluminum nitride, etc. may be used.

[0079] In this specification, silicon oxidizide refers to a material in which the oxygen content is greater than the nitrogen content, and silicon nitride refers to a material in which the nitrogen content is greater than the oxygen content. Furthermore, in this specification, aluminum oxidizide refers to a material in which the oxygen content is greater than the nitrogen content, and aluminum nitride refers to a material in which the nitrogen content is greater than the oxygen content.

[0080] The insulator 117 may also function as a planarizing film that flattens steps caused by the insulator 116 and the transistor 170 covered by the insulator 117. For example, the upper surface of the insulator 117 may be planarized by a planarizing treatment using chemical mechanical polishing (CMP) or the like to improve its flatness.

[0081] Furthermore, it is preferable to use a barrier insulating film for the insulator 111 that prevents water, hydrogen, impurities, etc., from diffusing from the substrate 101 or the transistor 170, etc., to the region above the insulator 111. Therefore, it is preferable to use an insulating material for the insulator 111 that has the function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, and water molecules (i.e., the above impurities do not easily permeate it). Also, depending on the situation, it is preferable to use an insulating material for the insulator 111 that has the function of suppressing the diffusion of impurities such as nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (N2O, NO, NO2, etc.), copper atoms (i.e., the above oxygen does not easily permeate it). Alternatively, it is preferable to have a function of suppressing the diffusion of oxygen (for example, at least one such as oxygen atoms or oxygen molecules).

[0082] In this specification, a barrier insulating film refers to an insulating film that has barrier properties. In this specification, barrier properties refer to the function of suppressing the diffusion of the corresponding substance (also called low permeability), or the function of capturing and fixing the corresponding substance (also called gettering).

[0083] As the insulator 111, it is preferable to use an insulator that has the function of suppressing the diffusion of impurities such as water and hydrogen, and oxygen. For example, aluminum oxide, magnesium oxide, hafnium oxide, gallium oxide, indium gallium zinc oxide, silicon nitride, or silicon nitride oxide can be used. For example, it is preferable to use silicon nitride, which has higher hydrogen barrier properties, as the insulator 111. Also, for example, it is preferable to use aluminum oxide or magnesium oxide, which have high hydrogen capture and hydrogen fixation functions, as the insulator 111.

[0084] The amount of hydrogen desorption can be analyzed, for example, using a thermal desorption gas analysis (TDS) method. For example, in TDS analysis, the amount of hydrogen desorption from the insulator 111, when the film surface temperature is in the range of 50°C to 500°C, is calculated as 10 × 10¹⁶ hydrogen atoms per unit area of ​​the insulator 111. 15 atoms / cm 2 The following is preferably 5 × 1015 atoms / cm 2 The following is acceptable.

[0085] Furthermore, it is preferable that the insulator 111 be a film with high flatness. In this case, for example, organic materials such as acrylic resin and polyimide can be used as the insulator 111.

[0086] Furthermore, it is preferable that the dielectric constant of the insulator 111 is lower than that of the insulator 117. For example, the relative permittivity of the insulator 111 is preferably less than 4, and more preferably less than 3. Also, for example, the relative permittivity of the insulator 111 is preferably 0.7 times or less, and more preferably 0.6 times or less, than that of the relative permittivity of the insulator 117. By using a material with a low dielectric constant as the interlayer film, parasitic capacitance occurring between wiring can be reduced.

[0087] Furthermore, insulators 116, 117, and 111 have a conductor 126 or the like embedded in them, which connects to a light-emitting device or the like that is provided above insulator 111. The conductor 126 functions as a plug or wiring. In addition, multiple structures of a conductor that functions as a plug or wiring may be grouped together and assigned the same reference numeral. Also, in this specification, the wiring and the plug that connects to the wiring may be an integrated unit. That is, there may be cases where a part of the conductor functions as wiring, and cases where a part of the conductor functions as a plug.

[0088] The plugs and wiring (conductor 126, etc.) can be made of conductive materials such as metal materials, alloy materials, metal nitride materials, or metal oxide materials, which can be used in a single layer or in a laminated form. It is preferable to use high-melting-point materials such as tungsten or molybdenum that provide both heat resistance and conductivity, and tungsten is preferred. Alternatively, it is preferable to form them with low-resistance conductive materials such as aluminum or copper. Using low-resistance conductive materials can reduce the wiring resistance.

[0089] Furthermore, a wiring layer may be provided above the insulator 117 and below the insulator 111 (not shown).

[0090] In Figure 1, light-emitting devices 150a to 150c are provided above the insulator 111. Below, we will describe an example of the configuration of the light-emitting devices 150a to 150c provided above the insulator 111 as shown in Figure 1.

[0091] In this specification, if the light-emitting devices 150a to 150c are not distinguished, they may be collectively referred to as light-emitting device 150. Similarly, conductors 121a to 121c may be collectively referred to as conductor 121, and EL layers 141a to 141c may be collectively referred to as EL layer 141.

[0092] Conductors 121a to 121c, which function as pixel electrodes for light-emitting devices 150a to 150c, are provided on the insulator 111. Note that in Figure 1, there are regions on the insulator 111 where the conductors 121a to 121c are not provided.

[0093] An insulator 112 is provided on the insulator 111 and on the conductor 121a. In Figure 1, however, there are areas on the conductor 121a, conductor 121b, and conductor 121c where the insulator 112 is not provided.

[0094] An EL layer 141a is provided on the insulator 112 and on the conductor 121a. An EL layer 141b is provided on the insulator 112 and on the conductor 121b. An EL layer 141c is provided on the insulator 112 and on the conductor 121c. In Figure 1, there is a region on the insulator 112 where the EL layers 141a to 141c are not provided.

[0095] By the way, it is preferable that each of the EL layers 141a to 141c has an emissive layer that emits light of a different color. For example, EL layer 141a may have an emissive layer that emits blue (B) light, EL layer 141b may have an emissive layer that emits green (G) light, and EL layer 141c may have an emissive layer that emits red (R) light. In this specification, a structure in which different emissive layers for each color are formed on a plurality of pixel electrodes (conductors 121a to 121c) is referred to as an SBS (Side By Side) structure.

[0096] The combination of colors emitted by the light-emitting layers contained in each of the EL layers 141a to 141c is not limited to those described above; for example, cyan, magenta, yellow, and other colors may also be used. Furthermore, although the above example shows three colors, the number of colors emitted by the light-emitting device 150 included in the display device 100 may be two, four, or more.

[0097] Each of the EL layers 141a, 141b, and 141c may have, in addition to a layer containing a light-emitting organic compound (light-emitting layer), one or more of the following: an electron injection layer, an electron transport layer, a hole injection layer, and a hole transport layer.

[0098] For example, the light-emitting devices 150a to 150c in Figure 1 can be composed of multiple layers, such as layer 4420, light-emitting layer 4411, and layer 4430, as shown in the light-emitting device 150 in Figure 2A. Also, in Figure 1, the EL layers 141a, 141b, and 141c can each be configured to have light-emitting layers 4411 and 4430, respectively.

[0099] Layer 4420 may include, for example, a layer containing a material with high electron injection properties (electron injection layer) and a layer containing a material with high electron transport properties (electron transport layer). The light-emitting layer 4411 may include, for example, a light-emitting compound. Layer 4430 may include, for example, a layer containing a material with high hole injection properties (hole injection layer) and a layer containing a material with high hole transport properties (hole transport layer).

[0100] A configuration having a layer 4420, a light-emitting layer 4411, and a layer 4430 provided between a pair of electrodes (conductor 121 and conductor 122, which will be described later) can function as a single light-emitting unit, and in this specification, the configuration shown in Figure 2A is referred to as a single structure.

[0101] As shown in Figure 2B, a configuration in which multiple light-emitting layers (light-emitting layer 4411, light-emitting layer 4412, light-emitting layer 4413) are provided between layer 4420 and layer 4430 is also a variation of the single structure.

[0102] Furthermore, a laminate having multiple layers such as layer 4420, light-emitting layer 4411, and layer 4430 may be referred to as a light-emitting unit. Multiple light-emitting units can be connected in series via an intermediate layer (charge generation layer). Specifically, as shown in Figure 2C, multiple light-emitting units, such as light-emitting unit 4400a and light-emitting unit 4400b, can be connected in series via an intermediate layer (charge generation layer) 4440. In this specification, such a structure is referred to as a tandem structure. In this specification and elsewhere, a tandem structure may also be referred to as a stack structure, for example. By using a tandem structure for a light-emitting device, it is possible to create a light-emitting device capable of high-brightness light emission. Furthermore, by using a tandem structure for a light-emitting device, improvements in the luminous efficiency and lifespan of the light-emitting device can be expected. When the light-emitting device 150 of the display device 100 in Figure 1 is in a tandem structure, the EL layer 141 can be configured to include, for example, the light-emitting layer 4411 and layer 4430 and the intermediate layer 4440 of the light-emitting unit 4400a, and the layer 4420, light-emitting layer 4412 and layer 4430 of the light-emitting unit 4400b.

[0103] Furthermore, when displaying white light, the SBS structure described earlier can consume less power than the single and tandem structures mentioned above. Therefore, if you want to keep power consumption low, the SBS structure is preferable. On the other hand, the single and tandem structures are preferable because their manufacturing process is simpler than that of the SBS structure, which can lower manufacturing costs or increase manufacturing yield.

[0104] The light-emitting color of the light-emitting device 150 can be red, green, blue, cyan, magenta, yellow, or white, depending on the material constituting the EL layer 141. Furthermore, the color purity can be further enhanced by adding a microcavity structure to the light-emitting device 150.

[0105] A light-emitting device that emits white light preferably has a configuration that includes two or more types of light-emitting materials in the light-emitting layer. To obtain white light emission, light-emitting materials should be selected such that the light emitted by each of the two or more materials is complementary in color.

[0106] The light-emitting layer preferably contains two or more light-emitting materials that emit light such as R (red), G (green), B (blue), Y (yellow), and O (orange). Alternatively, it is preferable to have two or more light-emitting materials, and for each light-emitting material to emit light that contains spectral components of two or more colors from R, G, and B.

[0107] Furthermore, as shown in Figure 1, a gap is provided between the two EL layers in light-emitting devices of different colors. It is preferable that the EL layers 141a, 141b, and 141c are arranged so that they do not touch each other. This effectively prevents current from flowing through two adjacent EL layers and causing unintended light emission (also known as crosstalk). As a result, contrast can be increased, and a display device with high display quality can be realized.

[0108] An EL layer 142 is provided on the insulator 112, on the EL layer 141a, on the EL layer 141b, and on the EL layer 141c.

[0109] The EL layer 142 corresponds, for example, to layer 4420 in the light-emitting device 150 in Figure 2A, and can be a layer containing an organic compound. In other words, the EL layer 142 can have, for example, a layer containing a material with high electron injection properties (electron injection layer) and a layer containing a material with high electron transport properties (electron transport layer).

[0110] Furthermore, it is preferable that the EL layer 142 is formed to be continuous on the insulator 112, on the EL layer 141a, on the EL layer 141b, and on the EL layer 141c. In other words, the EL layer 142 (electron injection layer and electron transport layer) can be a common EL layer in each of the light-emitting devices 150a to 150c.

[0111] A conductor 122 and an insulator 113 are provided in order on the EL layer 142.

[0112] The conductor 122 functions, for example, as a common electrode for each of the light-emitting devices 150a to 150c. Furthermore, in order to emit light from the light-emitting device 150 upwards onto the display device 100, it is preferable that the conductor 122 be made of a light-transmitting conductive material.

[0113] The insulator 113 functions, for example, as a passivation film that protects the light-emitting devices 150a, 150b, and 150c. Therefore, it is preferable that the insulator 113 is a material that prevents the ingress of water or the like.

[0114] A resin layer 161 is provided on the insulator 113. A substrate 102 is provided on the resin layer 161.

[0115] For the substrate 102, it is preferable to use a translucent substrate, for example. By using a translucent substrate for the substrate 102, the light emitted by the light-emitting devices 150a, 150b, and 150c can be emitted upwards on the substrate 102.

[0116] As described above, by configuring the display device 100 shown in Figure 1, a display device having a resolution of preferably 1000 ppi or more, more preferably 3000 ppi or more, and even more preferably 5000 ppi or more can be realized.

[0117] Incidentally, one aspect of the present invention is not limited to the configuration described above, and the configuration described above can be appropriately modified depending on the circumstances.

[0118] For example, Figure 1 shows a configuration in which a Si transistor is provided on a substrate 101 and a light-emitting device 150 is provided on the Si transistor, but the Si transistor may be replaced with another type of transistor. The display device 100 shown in Figure 3 shows a configuration in which the Si transistor is replaced with an OS transistor in the display device 100 shown in Figure 1. In the display device of Figure 3, an OS transistor, transistor 500, is provided on an insulator 512, an insulator 581 is provided on the transistor 500, and the light-emitting device 150 is provided on the insulator 581. The OS transistor will be described in detail in Embodiment 2.

[0119] Alternatively, for example, as shown in Figure 4, the display device 100 may be configured such that a Si transistor 170 is provided on the substrate 101, an OS transistor 500 is provided on transistor 170, and a light-emitting device 150 is provided on transistor 500. In the display device 100 shown in Figure 4, for example, transistor 500 can be used as a driving transistor for the light-emitting device 150, and transistor 170 can be a transistor included in a driver circuit that drives the display device 100.

[0120] Furthermore, for example, the light-emitting devices 150a, 150b, and 150c described above can each be arranged in a matrix. A matrix arrangement is sometimes called a stripe arrangement. Moreover, the arrangement method of the light-emitting devices is not limited to this, and other arrangement methods such as delta arrangements and zigzag arrangements may be applied, or a pentile arrangement can also be used.

[0121] Furthermore, it is preferable to use EL elements such as OLED (Organic Light Emitting Diode) or QLED (Quantum-dot Light Emitting Diode) as light-emitting devices 150a, 150b, and 150c. Examples of light-emitting materials for EL elements include fluorescent materials, phosphorescent materials, inorganic compounds (such as quantum dot materials), and thermally activated delayed fluorescence (TADF) materials.

[0122] <Method for manufacturing a display device 1> Next, we will explain the method for manufacturing the display device 100 shown in Figure 1.

[0123] Figures 5A to 8D are cross-sectional views showing an example of a method for manufacturing a display device according to one embodiment of the present invention. Figures 5A to 8D show an example of a method for manufacturing the display device 100 of Figure 1. In this embodiment, the method for manufacturing the display device 100 will be described as having steps A1 to A18 as an example.

[0124] [Step A1] In step A1, as shown in Figure 5A, a laminate is prepared in which an insulator 111, conductors 121a to 121c provided on the insulator 111, and an insulator 112 provided on the insulator 111 and on the conductors 121a to 121c are formed. Below the insulator 111, a transistor, wiring, interlayer film, etc., are provided as shown in Figure 1 (not shown in Figures 5A to 8D).

[0125] Figure 5A shows a cross-sectional view of a laminate in the display device 100, in which an insulator 111, conductors 121a to 121c, and an insulator 112 are formed.

[0126] The conductors 121a to 121c can be formed, for example, by depositing a conductive film on the insulator 111 and then performing a patterning process, etching process, etc. on the conductive film. In other words, step A1 includes the step of forming the conductors 121a to 121c on the insulator 111.

[0127] Furthermore, the insulator 112 can be formed, for example, by depositing an insulating film on the insulator 111 and on the conductors 121a to 121c, and providing an opening in the region of the insulating film that overlaps the conductors 121a to 121c. In other words, step A1 includes the steps of depositing insulating films on the insulator 111, on the conductors 121a, on the conductors 121b, and on the conductors 121c, and forming an opening in the region of the insulating film that overlaps the conductors 121a, conductors 121b, and conductors 121c, respectively. In this embodiment, the opening formed in step A1 is referred to as the first opening.

[0128] Each of the conductors 121a to 121c functions, for example, as an anode of the light-emitting devices 150a, 150b, and 150c provided by the display device 100.

[0129] For example, indium tin oxide (sometimes called ITO) can be used as the conductors 121a to 121c.

[0130] Furthermore, each of the conductors 121a to 121c may be a laminated structure of two or more layers, rather than a single layer. For example, the first layer of conductor may be a conductor with high reflectivity to visible light, and the top layer of conductor may be a conductor with high light transmittance. Examples of conductors with high reflectivity to visible light include silver, aluminum, and an alloy film of silver (Ag), palladium (Pd), and copper (Cu) (Ag-Pd-Cu(APC) film). Examples of conductors with high light transmittance include the indium tin oxide mentioned above. Furthermore, conductors 121a to 121c may be, for example, a laminated film of aluminum sandwiched between a pair of titanium (a laminated film in the order of Ti, Al, Ti), or a laminated film of silver sandwiched between a pair of indium tin oxides (a laminated film in the order of ITO, Ag, ITO).

[0131] The insulator 112 is preferably a material that does not melt with the resin 131_1 applied in a later step. Examples of materials that do not melt with the resin 131_1 include insulating inorganic films. Examples of insulating inorganic films include silicon oxide, silicon oxide nitride, silicon oxide nitride, silicon nitride, aluminum oxide, aluminum oxide nitride, aluminum oxide nitride, and aluminum nitride.

[0132] Furthermore, as the insulator 112, an organic film may be used as long as it is a material that does not melt with the resin 131_1 applied in a later step. Examples of organic films that can be applied to the insulator 112 include polyimide.

[0133] Furthermore, the insulator 112 may have a multilayer structure in which the first layer is the organic film described above and the second layer is the inorganic film described above. In this case, the first layer of organic film can be protected by the second layer of inorganic film, so the first layer of organic film can be made of a material that melts with the resin 131_1 that will be applied in a later step.

[0134] [Step A2] Step A2 includes the step of applying resin 131_1 to the upper part of the laminate shown in Figure 5A, that is, on the insulator 112 and on the conductors 121a to 121c. Step A2 also includes the step of curing the resin 131_1 after it has been applied, according to the curing conditions for the resin 131_1 (see Figure 5B).

[0135] The resin 131_1 is preferably a resin that is soluble in water, alcohol, etc. In addition to the above solubility, the resin 131_1 is preferably a thermosetting resin, a photocurable resin, or other such properties. In particular, a photocurable resin is, for example, a resin that hardens in wavelength ranges such as ultraviolet light, visible light, and infrared light.

[0136] Furthermore, when the resin 131_1 is partially removed using etching in step A4 described later, it is preferable to use a material that has a selectivity ratio with the insulator 112.

[0137] Furthermore, it is preferable that the resin 131_1 is, for example, a material that does not melt with the resin 132_1 applied in a later step, or a material that does not melt easily.

[0138] The film thickness of resin 131_1 will be discussed later.

[0139] [Step A3] Step A3 involves applying resin 132_1 to the upper part of the laminate shown in Figure 5B (see Figure 5C). Preferably, resin 132_1 is, for example, a photoresist. The photoresist may be negative or positive. In this manufacturing method, resin 132_1 will be described as a negative-type photoresist.

[0140] Furthermore, it is preferable that the film thickness of resin 132_1 be thicker than that of resin 131_1. Specifically, for example, if the film thickness of resin 131_1 is 1 μm, it is preferable that the film thickness of resin 132_1 be 2 μm. Alternatively, for example, if the film thickness of resin 131_1 is 0.5 μm, it is preferable that the film thickness of resin 132_1 be 1 μm.

[0141] [Step A4] Step A4 includes an exposure step and a development step performed on the resin 132_1 shown in Figure 5C.

[0142] As described above, the resin 132_1 is a negative-type photoresist. In the exposure process, the exposure range for the resin 132_1 is, for example, a range that includes the region of resin 132_1 that does not overlap the conductor 121a. This allows the subsequent development process to form an opening that reaches the resin 131_1 in the region of resin 132_1 that overlaps the conductor 121a (the unexposed region) (see Figure 5D). In this embodiment, the opening formed in step A4 is referred to as the second opening. Furthermore, by using a negative-type photoresist for resin 132_1, the side surface of the opening in resin 132_1 can be made inversely tapered, as shown in Figure 5D.

[0143] Furthermore, even if the resin 132_1 is used as a positive-type photoresist, the side surface of the opening of the resin 132_1 can be similarly made inversely tapered by appropriately determining the conditions in the exposure process and the development process.

[0144] In this specification, the term "taper angle" refers to the angle between the side surface and the bottom surface of a tapered layer when the layer is observed from the direction of its cross-section (the plane perpendicular to the surface of the substrate). Furthermore, a taper angle of less than 90° is referred to as a forward taper, and a taper angle of 90° or more is referred to as a reverse taper.

[0145] Depending on the material of resin 132_1, resin 131_1 may dissolve in chemicals such as the developer used in the developing process of step A4. To prevent this, a step of forming a protective layer on resin 131_1 may be included between step A2 and step A3. Preferably, this protective layer has resistance to the chemicals used in the developing process of step A4. Figure 5E shows a cross-sectional view of a laminate in which a protective layer 133 is formed between step A2 and step A3, and a second opening is formed in resin 132_1 by step A4.

[0146] [Step A5] Step A5 involves forming an opening in the resin 131_1 shown in Figure 5D.

[0147] The area in which the opening is formed is the area inside the second opening and includes the region of resin 131_1 superimposed on the conductor 121a (see Figure 6A). Specifically, in the region of resin 131_1 located on the bottom surface of the second opening that superimposes on the first opening and the region that superimposes on the insulator 112, an opening is formed that reaches the conductor 121a located on the bottom surface of the first opening and the insulator 112. In this embodiment, the opening formed in step A5 is referred to as the third opening.

[0148] One example of a method for forming the third opening is etching.

[0149] Furthermore, as an example of a method for forming the third opening, an ashing process may be performed by introducing oxygen gas and turning the oxygen gas into plasma.

[0150] Furthermore, during the formation of the third opening, a portion of the resin 132_1 may also be removed. To prevent the complete removal of the resin 132_1 during the formation of the third opening, it is preferable that the film thickness of resin 132_1 be greater than that of resin 131_1. However, if the selectivity ratio for removal of resin 131_1 is higher than that of resin 132_1 during the process of forming the third opening (etching, ashing, etc.), the film thickness ratio of resin 131_1 to resin 132_1 is not particularly limited.

[0151] [Step A6] Step A6 involves forming an EL layer 141A on the upper part of the laminate shown in Figure 6A, that is, on the conductor 121a, the insulator 112, the resin 131_1, and the resin 132_1 (see Figure 6B).

[0152] In this case, since the side surface of the second opening of the resin 132_1 is reverse-tapered, the EL layer 141A is not deposited on the entire edge of the second opening of the resin 132_1. In other words, the deposited EL layer 141A is divided by the second opening of the resin 132_1 into a region on the conductor 121a, on the insulator 112, and on the resin 131_1, and a region on the resin 132_1.

[0153] Furthermore, when forming the EL layer 141A, the taper angle of the end of the resin 132_1, which divides the EL layer 141A into a region on the conductor 121a, the insulator 112, and the resin 131_1, and a region on the resin 132_1, is preferably 95° or more, more preferably 100° or more, more preferably 110° or more, and even more preferably 120° or more.

[0154] The EL layer 141A contains an organic compound. As shown in Figure 2A, this organic compound can include, for example, a hole injection layer, a hole transport layer, and a light-emitting layer.

[0155] Furthermore, depending on the circumstances, the EL layer 141A may also include an electron transport layer, an electron injection layer, etc., in addition to a hole injection layer, a hole transport layer, an emissive layer, etc.

[0156] Furthermore, before the formation of the EL layer 141A, the laminate shown in Figure 6A may be subjected to heat treatment under vacuum. Note that the vacuum described herein preferably refers to, for example, a vacuum of 1.0 × 10⁻⁶. -3 It is less than or equal to Pa, and more preferably 1.0 × 10⁻⁶ -5 It is less than or equal to Pa, and more preferably 1.0 × 10⁻⁶ -7 It shall be less than or equal to Pa.

[0157] [Step A7] Step A7 includes the step of removing resin 131_1 and resin 132_1 from the laminate shown in Figure 6B (see Figure 6C).

[0158] One example of a method for removing resin 131_1 and resin 132_1 is washing. Furthermore, it is preferable to use a liquid that dissolves resin 131_1 for the washing. For example, if resin 131_1 is soluble in water, water can be used as the washing liquid; or if resin 131_1 is soluble in alcohol, alcohol can be used as the washing liquid. Also, since the EL layer 141A is relatively resistant to water, alcohol, etc., using water, alcohol, etc., can reduce damage to the EL layer 141A in this removal method.

[0159] As described above, by removing resin 131_1 through cleaning, the EL layer 141A formed on top of resin 131_1, resin 132_1, and the EL layer 141A formed on resin 132_1 can be removed. In addition, this makes it possible to form the EL layer 141a on the bottom surface of the first opening of the insulator 112 (on the conductor 121a) and on a part of the insulator 112.

[0160] [Step A8] Step A8 involves applying resin 131_2 to the upper part of the laminate shown in Figure 6C, that is, on the insulator 112, on the conductor 121b, on the conductor 121c, and on the EL layer 141a. After the resin 131_2 is applied, it is cured according to the curing conditions for the resin 131_2 (see Figure 6D).

[0161] For example, it is preferable that the resin 131_2 is a resin that does not melt the EL layer 141a. Specifically, for example, it is preferable that the resin 131_2 is a resin that does not contain an organic solvent that melts the EL layer 141a.

[0162] Furthermore, it is preferable that resin 131_2 has properties similar to those of resin 131_1, in addition to the properties described above. For example, it is preferable that resin 131_2 is a resin that is soluble in water, alcohol, etc., and is also preferable that it is a resin that has properties such as thermosetting resin and photocuring resin. Also, if resin 131_1 is a resin that does not melt the EL layer 141a, resin 131_2 may be a resin similar to that of resin 131_1.

[0163] Furthermore, it is preferable that the resin 131_2 is a material that does not melt with the resin 132_2 applied in a later step, or a material that does not melt easily.

[0164] The film thickness of resin 131_2 will be described later.

[0165] [Step A9] In step A9, resin 132_2 is applied to the upper part of the laminate shown in Figure 6D (see Figure 6E). It is preferable that resin 132_2 be a negative-type photoresist, similar to resin 132_1. Alternatively, resin 132_2 may be a positive-type photoresist.

[0166] Furthermore, it is preferable that the film thickness of resin 132_2 be thicker than that of resin 131_2. Specifically, for example, if the film thickness of resin 131_2 is 1 μm, it is preferable that the film thickness of resin 132_2 be 2 μm. Alternatively, for example, if the film thickness of resin 131_2 is 0.5 μm, it is preferable that the film thickness of resin 132_2 be 1 μm.

[0167] [Step A10] Step A10, like step A4, includes an exposure step and a development step performed on the resin 132_2 shown in Figure 6E. Therefore, for the explanation of step A10, please refer to the description of step A4.

[0168] As a result, as shown in Figure 7A, the side surface of the opening of resin 132_2 can be made to have a reverse taper, similar to resin 132_1 in Figure 5D.

[0169] [Step A11] Step A11, like step A5, involves forming an opening in the resin 132_1 shown in Figure 7A. Therefore, for the explanation of step A11, please refer to the description of step A5.

[0170] As a result, as shown in Figure 7B, an opening can be provided in resin 131_2, similar to resin 131_1 in Figure 6A.

[0171] [Step A12] Step A12 involves forming an EL layer 141B on the upper part of the laminate shown in Figure 7B, that is, on the conductor 121b, on the insulator 112, on the resin 131_2, and on the resin 132_2 (see Figure 7C).

[0172] At this time, since the side surface of the opening of the resin 132_2 is reverse-tapered, the EL layer 141B is formed in the same way as in step A6, dividing it into regions on the conductor 121b, the insulator 112, and the resin 131_2, and a region on the resin 132_2.

[0173] The EL layer 141B contains an organic compound. As shown in Figure 2A, this organic compound can include, for example, a hole injection layer, a hole transport layer, and a light-emitting layer.

[0174] Furthermore, depending on the circumstances, the EL layer 141B may also include an electron transport layer, an electron injection layer, etc., in addition to a hole injection layer, a hole transport layer, an emissive layer, etc.

[0175] Furthermore, it is preferable that the color exhibited by the light-emitting layer of the EL layer 141B is different from the color exhibited by the light-emitting layer of the EL layer 141A.

[0176] Furthermore, before the formation of the EL layer 141B, the laminate shown in Figure 7B may be subjected to heat treatment under vacuum. The conditions for this heat treatment can be the same as those for the heat treatment described in step A6.

[0177] [Step A13] Step A13, like step A7, includes the step of removing resin 131_2 and resin 132_2 from the laminate shown in Figure 7C (see Figure 7D). Therefore, for the explanation of step A13, please refer to the description of step A7.

[0178] This allows the EL layer 141B, resin 132_2, and the EL layer 141B formed on top of resin 132_2 to be removed by removing resin 131_2. In addition, this allows the EL layer 141b to be formed on a portion of the conductor 121b and the insulator 112.

[0179] [Step A14] Step A14 involves a manufacturing process similar to that of steps A2 to A7, or steps A8 to A13, to which an EL layer 141c is formed on the conductor 121c and on a portion of the insulator 112 (see Figure 7E).

[0180] The EL layer 141c may, for example, contain an organic compound. As shown in Figure 2A, this organic compound may include, for example, a hole injection layer, a hole transport layer, and a light-emitting layer.

[0181] Furthermore, depending on the circumstances, the EL layer 141c may also include an electron transport layer, an electron injection layer, etc., in addition to a hole injection layer, a hole transport layer, an emissive layer, etc.

[0182] Furthermore, it is preferable that the color exhibited by the light-emitting layer of EL layer 141c is different from the color exhibited by the light-emitting layers of EL layer 141A and EL layer 141B.

[0183] Furthermore, after the formation of the EL layer 141c, the laminate shown in Figure 7E may be subjected to heat treatment under vacuum. The conditions for this heat treatment can be the same as those for the heat treatment described in step A6.

[0184] [Step A15] Step A15 involves forming the EL layer 142 on the upper part of the laminate shown in Figure 7E, that is, on the insulator 112, on the EL layer 141a, on the EL layer 141b, and on the EL layer 141c (see Figure 8A).

[0185] The EL layer 142 corresponds, for example, to layer 4420 in the light-emitting device 150 in Figure 2A, and can be a layer containing an organic compound. In other words, the EL layer 142 can have, for example, a layer containing a material with high electron injection properties (electron injection layer) and a layer containing a material with high electron transport properties (electron transport layer).

[0186] [Step A16] Step A16 involves forming a conductor 122 on the upper part of the laminate shown in Figure 8A (see Figure 8B).

[0187] For example, the conductor 122 functions as the cathode of the light-emitting devices 150a, 150b, and 150c provided by the display device 100. In other words, when the conductor 122 functions as the cathode of the light-emitting devices 150a, 150b, and 150c, the conductor 122 functions as a common electrode.

[0188] The conductor 122 is preferably a material that has high conductivity and also possesses light transmission and light reflectivity (sometimes called a semi-transparent / semi-reflective electrode). For example, a silver-magnesium alloy or indium tin oxide can be used as the conductor 122.

[0189] Furthermore, when using a silver-magnesium alloy as the conductor 122, the film thickness of the conductor 122 is preferably 20 nm, and more preferably 15 nm, with a volume ratio of silver to magnesium of 1:0.1.

[0190] Furthermore, to enhance electrical conductivity and prevent the intrusion of components from the outside, a conductor, an insulator, or the like may be provided on top of the conductor 122. For example, if the above-mentioned silver-magnesium alloy is used for the conductor 122, then indium tin oxide, indium-gallium-zinc oxide, or the like can be used as the conductor provided on top of the conductor 122.

[0191] [Step A17] Step A17 involves forming an insulator 113 on top of the laminate shown in Figure 8B (see Figure 8C).

[0192] The insulator 113 functions as a passivation film (sometimes called a protective layer) that protects the light-emitting devices 150a, 150b, and 150c of the display device 100. Therefore, it is preferable that the insulator 113 is made of a material that prevents the ingress of water and other substances. As the insulator 113, for example, a material that can be used for the insulator 111 can be used. Specifically, aluminum oxide, silicon nitride, silicon oxide nitride, and the like can be used.

[0193] Furthermore, the insulator 113, which functions as a protective layer, can be, for example, a single-layer structure or a multilayer structure including at least an inorganic insulating film. Examples of inorganic insulating films include, in addition to the above-mentioned aluminum oxide, silicon nitride, and silicon nitride oxide, oxide films or nitride films such as silicon oxide, silicon oxynitride, aluminum oxynitride, and hafnium oxide. Alternatively, semiconductor materials such as indium gallium oxide and indium gallium zinc oxide may be used as the insulator 113. The insulator 113 may be formed using one or more methods selected from ALD (Atomic Layer Deposition), CVD (Chemical Vapor Deposition), sputtering, etc. Although the insulator 113 is exemplified as a structure including an inorganic insulating film, it is not limited to this. For example, the insulator 113 may be a multilayer structure of an inorganic insulating film and an organic insulating film.

[0194] [Step A18] Step A18 includes the step of applying a resin layer 161 to the upper part of the laminate shown in Figure 8C. Step A18 then includes the step of bonding the substrate 102 onto the resin layer 161 of the laminate (see Figure 8D).

[0195] For the resin layer 161, it is preferable to use, for example, a translucent resin. In addition to the translucency mentioned above, it is also preferable that the resin layer 161 be an organic material such as a reaction-curing adhesive, a photocuring adhesive, a thermosetting adhesive, or / or an anaerobic adhesive. Specifically, for example, the resin layer 161 can be an adhesive containing epoxy resin, acrylic resin, silicone resin, phenolic resin, polyimide resin, imide resin, PVC (polyvinyl chloride) resin, PVB (polyvinyl butyral) resin, EVA (ethylene vinyl acetate) resin, etc.

[0196] For substrate 102, for example, a light-transmitting substrate can be used from among the substrates applicable to substrate 101. By using a light-transmitting substrate for substrate 102, the light emitted by light-emitting devices 150a, 150b, and 150c can be emitted upwards on substrate 102.

[0197] A display device according to one aspect of the present invention and a method for manufacturing the display device are not limited to the above. The configuration of a display device according to one aspect of the present invention and a method for manufacturing the display device may be modified depending on the circumstances.

[0198] For example, the display device 100 may be configured such that the light-emitting device 150 emits two colors. If the light-emitting device 150 included in the display device 100 emits two colors, for example, in the manufacturing method of the display device 100, the second and third openings formed in steps A4 and A5 may be formed not only in the region superimposed on the conductor 121a but also in the region superimposed on the conductor 121c, and in step A6, the EL layer 141A may be deposited on the conductor 121a and the conductor 121c. Alternatively, step A14 may be omitted, and steps A7 to A13 and A15 to A18 may be performed.

[0199] Furthermore, for example, the configuration of the display device 100 may include four or more colors emitted by the light-emitting device 150. If the light-emitting device 150 included in the display device 100 emits four or more colors, for example, after performing step A14, the same process as in step A14 may be performed on the conductor 121 on which the EL layer 141 is not formed on the upper surface.

[0200] Furthermore, as an example, the configuration of the display device 100 may be a multilayer structure in which the insulator 112 has an organic material as the first layer and an inorganic material as the second layer. Figure 9A shows a partial cross-sectional view of the display device 100 as an example, in which the insulator 112a is an organic material insulator and the insulator 112b is an inorganic material insulator, and the insulator 112 including insulators 112a and 112b has a multilayer structure.

[0201] For example, polyimide can be used as the organic material, and materials applicable to the insulator 112 in the display device 100 in Figure 1, the insulator 112 shown in Figure 8D, etc. can be used as the inorganic material.

[0202] Furthermore, for example, the insulator 113 of the display device 100 may be a multilayer structure of two or more layers, rather than a single layer. The insulator 113 may be a three-layer multilayer structure, for example, with an inorganic material insulator as the first layer, an organic material insulator as the second layer, and an inorganic material insulator as the third layer. Figure 9B shows a partial cross-sectional view of the display device 100 in which the insulator 113, including insulators 113a, 113b, and 113c, is a multilayer structure, with insulator 113a being an inorganic material insulator, insulator 113b being an organic material insulator, and insulator 113c being an inorganic material insulator.

[0203] Furthermore, for example, the configuration of the display device 100 may include an electron transport layer and an electron injection layer in each of the EL layers 141a, 141b, and 141c. In other words, if the display device 100 includes an electron transport layer and an electron injection layer in each of the EL layers 141a, 141b, and 141c, then the EL layer 142 does not need to be provided. In other words, step A15 may be omitted. Figure 9C shows a partial cross-sectional view of the display device 100 when each of the EL layers 141a, 141b, and 141c includes an electron transport layer and an electron injection layer.

[0204] Furthermore, for example, the configuration of the display device 100 may include a microcavity structure (micro-resonator structure) in each of the EL layers 141a to 141c. A microcavity structure refers to a structure in which, for example, a conductive material having light transmission and light reflectivity is used as the conductor 122 which is the upper electrode (common electrode), and a conductive material having light reflectivity is used as the conductor 121 which is the lower electrode (pixel electrode), and the distance between the lower surface of the light-emitting layer and the upper surface of the lower electrode, that is, the thickness of the layer 4430 in Figure 2A, is set to a thickness corresponding to the wavelength of the color of light emitted by the light-emitting layer contained in the EL layer 141.

[0205] For example, the light reflected back by the lower electrode (reflected light) interferes significantly with the light that directly enters the upper electrode from the light-emitting layer (incident light). Therefore, it is preferable to adjust the optical distance between the lower electrode and the light-emitting layer to (2n-1)λ / 4 (where n is a natural number greater than or equal to 1, and λ is the wavelength of the light emission to be amplified). By adjusting this optical distance, the phases of the reflected light and the incident light of wavelength λ can be matched, and the light emission from the light-emitting layer can be further amplified. On the other hand, if the reflected light and the incident light have wavelengths other than λ, the phases will not match, and the light will attenuate without resonance.

[0206] In the above configuration, the EL layer may have a structure with multiple light-emitting layers or a structure with a single light-emitting layer. Furthermore, for example, it may be applied to a configuration in which multiple EL layers are provided in a single light-emitting device with a charge generation layer in between, and one or more light-emitting layers are formed in each EL layer, in combination with the tandem type light-emitting device configuration described above.

[0207] By incorporating a microcavity structure, it becomes possible to enhance the emission intensity in the front direction at specific wavelengths, thereby reducing power consumption. In particular, in the case of XR devices such as VR and AR, the light from the front direction of the light-emitting device often enters the eyes of the user wearing the device, so it is preferable to provide a microcavity structure in the display device of an XR device. Furthermore, in the case of a display device that displays images using four sub-pixels of red, yellow, green, and blue, in addition to the brightness enhancement effect of yellow emission, it is possible to apply a microcavity structure matched to the wavelength of each color to all sub-pixels, resulting in a display device with excellent characteristics.

[0208] Figure 10A shows a partial cross-sectional view of the display device 100 when a microcavity structure is provided as an example. Furthermore, if the light-emitting device 150a has a light-emitting layer that emits blue (B) light, the light-emitting device 150b has a light-emitting layer that emits green (G) light, and the light-emitting device 150c has a light-emitting layer that emits red (R) light, it is preferable to increase the film thickness in the order of EL layer 141a, EL layer 141b, and EL layer 141c, as shown in Figure 10A. Specifically, the film thickness of the layer 4430 contained in each of the EL layers 141a, EL layer 141b, and EL layer 141c should be determined according to the color of light emitted by each light-emitting layer. In this case, the layer 4430 contained in EL layer 141a will be the thinnest, and the layer 4430 contained in EL layer 141c will be the thickest.

[0209] Furthermore, the configuration of the display device 100 may include, for example, a colored layer (color filter). Figure 10B shows, as an example, a configuration in which a colored layer 162a, a colored layer 162b, and a colored layer 162c are included between the resin layer 161 and the substrate 102. The colored layers 162a to 162c can be formed on the substrate 102, for example. Also, if the light-emitting device 150a has a light-emitting layer that emits blue (B) light, the light-emitting device 150b has a light-emitting layer that emits green (G) light, and the light-emitting device 150c has a light-emitting layer that emits red (R) light, then the colored layer 162a is blue, the colored layer 162b is green, and the colored layer 162c is red.

[0210] The display device 100 shown in Figure 10B can be constructed by bonding a substrate 102, on which colored layers 162a to 162c are provided, to a substrate 101 on which light-emitting devices 150a to 150c are formed, via a resin layer 161. In this case, it is preferable to bond the substrates so that light-emitting device 150a and colored layer 162a overlap, light-emitting device 150b and colored layer 162b overlap, and light-emitting device 150c and colored layer 162c overlap. By providing colored layers 162a to 162c in the display device 100, for example, the light emitted by light-emitting device 150b is not emitted upwards to the substrate 102 via colored layer 162a or colored layer 162c, but is emitted upwards to the substrate 102 via colored layer 162b. In other words, since it is possible to block light from the light-emitting device 150 of the display device 100 in an oblique direction (the direction of the elevation angle when the upper surface of the substrate 102 is considered a horizontal plane), the dependence of the display device 100 on the viewing angle can be reduced, and a decrease in the display quality of the image displayed on the display device 100 when viewed from an oblique angle can be prevented.

[0211] Furthermore, the colored layers 162a to 162c formed on the substrate 102 may be covered with a resin or the like called an overcoat layer. Specifically, the display device 100 may be laminated in the order of resin layer 161, the overcoat layer, colored layers 162a to 162c, and substrate 102 (not shown). Examples of resins used for the overcoat layer include translucent thermosetting materials based on acrylic resin or epoxy resin.

[0212] Furthermore, for example, the configuration of the display device 100 may include a black matrix in addition to the colored layer. Figure 10C shows an example configuration of the display device 100 of Figure 10B in which a black matrix 163 is provided. By providing the black matrix 163, light from the light-emitting device 150 of the display device 100 in an oblique direction (the direction of the elevation angle when the upper surface of the substrate 102 is considered a horizontal plane) can be blocked more effectively, thereby preventing a decrease in the display quality of the image displayed on the display device 100 when viewed from an oblique angle.

[0213] Furthermore, as shown in Figures 10B and 10C, if the display device has a colored layer, the light-emitting devices 150a to 150c provided in the display device may all be light-emitting devices that emit white light (not shown). In addition, the light-emitting devices can be, for example, in a single structure or a tandem structure.

[0214] Furthermore, for example, the display device 100 may be configured without an insulator 112 formed on the conductors 121a to 121c. Figure 11A shows an example of a display device in which the insulator 112 is not provided, as shown in Figure 1 and Figure 8D. Also, for example, the display device 100 may be configured such that the conductors 121a to 121c are embedded in the insulator 111. Figure 11B shows an example of a display device configuration in which the conductors 121a to 121c are embedded in the insulator 111. As an example of this configuration, an opening for embedding the conductors 121a to 121c may be formed in the insulator 111, then a conductive film which will become the conductors 121a to 121c is formed, and then chemical mechanical polishing (CMP) is performed until the insulator 111 is exposed.

[0215] Furthermore, although the above-described configuration of the display device 100 uses conductors 121a to 121c as anodes and conductor 122 as a cathode, the display device 100 may also be configured with conductors 121a to 121c as cathodes and conductor 122 as an anode. In other words, in the manufacturing process described above, the stacking order of the hole injection layer, hole transport layer, light-emitting layer, electron transport layer, and electron injection layer contained in the EL layers 141a to 141c and EL layer 142 may be reversed.

[0216] Furthermore, the insulators, conductors, semiconductors, etc., disclosed in this specification can be formed by PVD (Physical Vapor Deposition) or CVD (Chemical Vapor Deposition) methods. Examples of PVD methods include sputtering, resistance heating deposition, electron beam deposition, and PLD (Pulsed Laser Deposition). Examples of CVD methods include plasma CVD and thermal CVD. In particular, examples of thermal CVD methods include MOCVD (Metal Organic Chemical Vapor Deposition) and ALD (Alternative Laser Deposition).

[0217] Thermal CVD (Chemical Vapor Deposition) is a film deposition method that does not use plasma, and therefore has the advantage of not generating defects due to plasma damage.

[0218] In the thermal CVD method, the raw material gas and oxidizer may be simultaneously introduced into the chamber, the chamber pressure may be reduced to atmospheric pressure or reduced pressure, and the reaction may occur near or on the substrate, resulting in film deposition on the substrate.

[0219] Furthermore, the ALD method may also be performed by maintaining atmospheric pressure or reduced pressure in the chamber, sequentially introducing the raw material gases for the reaction into the chamber, and repeating the order of gas introduction. For example, two or more types of raw material gases may be supplied to the chamber sequentially by switching each switching valve (also called a high-speed valve), and an inert gas (such as argon or nitrogen) may be introduced simultaneously with or after the first raw material gas to prevent mixing of multiple raw material gases, followed by the introduction of the second raw material gas. When an inert gas is introduced simultaneously, the inert gas acts as a carrier gas, and an inert gas may also be introduced simultaneously with the introduction of the second raw material gas. Alternatively, instead of introducing an inert gas, the first raw material gas may be discharged by vacuum evacuation before introducing the second raw material gas. The first raw material gas adsorbs onto the surface of the substrate to form a first thin layer, which then reacts with the second raw material gas introduced later to laminate a second thin layer on top of the first thin layer, forming a thin film. By controlling the order of gas introduction and repeating this process multiple times until the desired thickness is achieved, a thin film with excellent step coverage can be formed. Since the thickness of the thin film can be adjusted by the number of times the gas introduction sequence is repeated, precise film thickness control is possible, making it suitable for fabricating fine FETs.

[0220] Thermal CVD methods such as MOCVD and ALD can form various films, including metal films, semiconductor films, and inorganic insulating films, as disclosed in the embodiments described above. For example, when forming an In-Ga-Zn-O film, trimethylindium (In(CH3)3), trimethylgallium (Ga(CH3)3), and dimethylzinc (Zn(CH3)2) are used. However, the method is not limited to these combinations; triethylgallium (Ga(C2H5)3) can be used instead of trimethylgallium, and diethylzinc (Zn(C2H5)2) can be used instead of dimethylzinc.

[0221] For example, when forming a hafnium oxide film using an ALD (Advanced Laser Deposition) system, two types of gases are used: a raw material gas obtained by vaporizing a liquid containing a solvent and a hafnium precursor compound (such as hafnium alkoxide, tetrakisdimethylamide hafnium (TDMAH, Hf[N(CH3)2]4), or other hafnium amides), and ozone (O3) as an oxidizing agent. Other materials include tetrakis(ethylmethylamide)hafnium.

[0222] For example, when forming an aluminum oxide film using an ALD (Automated Laser Deposition) system, two types of gases are used: a raw material gas obtained by vaporizing a liquid containing a solvent and an aluminum precursor compound (such as trimethylaluminum (TMA, Al(CH3)3)), and H2O as an oxidizing agent. Other materials include tris(dimethylamide)aluminum, triisobutylaluminum, and aluminum tris(2,2,6,6-tetramethyl-3,5-heptanedionate).

[0223] For example, when forming a silicon oxide film using an ALD-based film deposition apparatus, hexachlorodisilane is adsorbed onto the film deposition surface, and radicals of oxidizing gases (O2, nitrous oxide) are supplied to react with the adsorbed material.

[0224] For example, when depositing a tungsten film using an ALD (Advanced Liquid Processing) system, WF6 gas and B2H6 gas are introduced sequentially and repeatedly to form an initial tungsten film, and then WF6 gas and H2 gas are introduced sequentially and repeatedly to form the final tungsten film. Note that SiH4 gas may be used instead of B2H6 gas.

[0225] For example, when depositing an In-Ga-Zn-O film as an oxide semiconductor film using an ALD (Advanced Laser Deposition) deposition apparatus, the film is formed by sequentially and repeatedly introducing a precursor (generally sometimes called a precursor or metal precursor) and an oxidizing agent (generally sometimes called a reactant or nonmetal precursor). Specifically, for example, an In-O layer is formed by introducing In(CH3)3 gas as a precursor and O3 gas as an oxidizing agent, then a GaO layer is formed by introducing Ga(CH3)3 gas as a precursor and O3 gas as an oxidizing agent, and then a ZnO layer is formed by introducing Zn(CH3)2 gas as a precursor and O3 gas as an oxidizing agent. Note that the order of these layers is not limited to this example. Furthermore, mixed oxide layers such as In-Ga-O layers, In-Zn-O layers, and Ga-Zn-O layers may be formed using these gases. Note that H2O gas obtained by bubbling water with an inert gas such as Ar may be used instead of O3 gas, but it is preferable to use O3 gas that does not contain H. In addition, In(C2H5)3 gas may be used instead of In(CH3)3 gas. Similarly, Ga(C2H5)3 gas may be used instead of Ga(CH3)3 gas. Furthermore, Zn(CH3)2 gas may be used.

[0226] <Method for manufacturing a display device 2> Next, a method for manufacturing a display device according to one embodiment of the present invention, which differs from the method for manufacturing the display device 100 shown in Figures 5A to 8D, will be described. Note that the display device completed by this manufacturing method is also an embodiment of the present invention.

[0227] Figures 12A to 13D are cross-sectional views showing an example of a method for manufacturing a display device according to one embodiment of the present invention. In this embodiment, the manufacturing method will be described as having steps B1 to B8 as an example. Furthermore, in this manufacturing method, any parts that overlap in content with the manufacturing method of the display device 100 shown in Figures 5A to 8D described above will be omitted from the explanation.

[0228] [Step B1] In step B1, as shown in Figure 12A, a laminate is prepared in which an insulator 111, conductors 121a to 121c provided on the insulator 111, and an insulator 112 provided on the insulator 111 and on the conductors 121a to 121c are formed. Note that the laminate shown in Figure 12A differs from the laminate shown in Figure 5A in that an opening KKB is formed in the insulator 112 in a region of the insulator 112 that does not overlap with the conductors 121a to 121c. Below the insulator 111, transistors, wiring, interlayer films, etc. are provided as shown in Figure 1, similar to the fabrication examples in Figures 5A to 8D (not shown in Figures 12A to 13D).

[0229] The formation of the opening KKB can be performed, for example, simultaneously with the formation of the first opening in the insulating film that will become the insulator 112. Furthermore, if it is desired to adjust the taper angle of the opening KKB, particularly to a different angle from the taper angle of the first opening, the formation of the first opening and the opening KKB in the insulating film that will become the insulator 112 can be performed in two stages, such as a patterning process and an etching process. In this case, when forming the opening KKB in the insulating film that will become the insulator 112, an anisotropic etching process can be performed to make the taper angle larger than that of the first opening. For example, the taper angle of the opening KKB is preferably 60° or more, and more preferably 80° or more. The taper angle of the opening KKB may also be 90° or more.

[0230] As described above, step B1 includes the steps of forming conductors 121a to 121c on the insulator 111, forming an insulating film on the insulator 111, on the conductor 121a, on the conductor 121b, and on the conductor 121c, and forming openings in the regions of the insulating film that overlap the conductors 121a, 121b, and 121c, respectively. Furthermore, step B1 includes the step of forming opening KKB.

[0231] [Step B2] In step B2, the same process as in step A2 in Figure 5B and step A3 in Figure 5C is carried out. That is, resin 131_1 and resin 132_1 are sequentially formed on the upper part of the laminate shown in Figure 12A, i.e., on insulator 111, on insulator 112, and on conductors 121a to conductors 121c (see Figure 12B).

[0232] [Step B3] In step B3, the same process as in step A4 in Figure 5D and step A5 in Figure 6A is performed. That is, in the laminate shown in Figure 12B, a second opening is formed in resin 132_1 and a third opening is formed in resin 131_1 (see Figure 12C).

[0233] Specifically, in step B3, an exposure process and a development process are performed on the laminate shown in Figure 12B (corresponding to step A4 in Figure 5D). For example, when the resin 132_1 is a negative-type photoresist, the exposure range for the resin 132_1 in the exposure process is set to include, for example, a region of the resin 132_1 that does not overlap with the conductor 121a and the opening KKB around the conductor 121a. This allows the subsequent development process to form a second opening that reaches the resin 131_1 in the region of the resin 132_1 that overlaps with the conductor 121a (the unexposed region).

[0234] Furthermore, the side surface of the second opening of resin 132_1 is assumed to have an inverse tapered structure, similar to resin 132_1 of the laminate in Figure 5D.

[0235] Furthermore, if the resin 132_1 dissolves in the chemical solution, such as the developer used in the development process described above, a protective layer resistant to the chemical solution may be provided between the resin 131_1 and the resin 132_2 during the formation of the laminate shown in Figure 12B, similar to the laminate shown in Figure 5E.

[0236] Furthermore, step B3 includes a step in which, after the second opening is formed, etching, ashing, or the like is performed on the region including the bottom surface of the second opening to form a third opening in the resin 131_1 to expose the insulator 112 and the conductor 121a (corresponding to step A5 in Figure 6A).

[0237] Furthermore, in this case, the third opening of the resin 131_1 is formed such that the side surface of the third opening of the resin 131_1 is included inside the opening KKB. For example, it is preferable that the side surface of the third opening of the resin 131_1 is located on the insulator 111, which is the bottom surface of the opening KKB. Alternatively, the side surface of the third opening of the resin 131_1 may be located, for example, on the side surface of the opening KKB, that is, in a region including the side surface of the insulator 112. Alternatively, as shown in Figure 12D, for example, the side surface of the third opening of the resin 131_1 may not be located on the insulator 111, which is the bottom surface of the opening KKB, but may be located on the side surface of the opening KKB and at or near the boundary between the upper surface of the insulator 112.

[0238] [Step B4] In step B4, the same process as in step A6 in Figure 6B is performed. That is, the EL layer 141A is formed on the upper part of the laminate shown in Figure 12C, i.e., on the insulator 111, the conductor 121a, the insulator 112, the resin 131_1, and the resin 132_1 (see Figure 12E).

[0239] In this case, since the end of the second opening of the resin 132_1 has an inverse taper, the EL layer 141A is not deposited on the entire end of the second opening of the resin 132_1. In other words, the deposited EL layer 141A is divided by the second opening of the resin 132_1 into a region on the conductor 121a, on the insulator 112, and on the resin 131_1, and a region on the resin 132_1.

[0240] Furthermore, in the display device 100 shown in FIG. 12C, since the opening KKB is formed in the insulator 112, the EL layer 141A is formed at the end and bottom surfaces of the opening KKB. In particular, the steeper the side surface of the opening KKB is, the easier it is to remove the EL layer 141A on the resin 131_1 in the subsequent step B5. Alternatively, in step B1, by forming the taper angle of the opening KKB to, for example, 90° or more, in this step, the EL layer 141A may be divided into a region on the insulator 112 and a region on the resin 131_1.

[0241] [Step B5] In step B5, the same process as step A7 in FIG. 6C is performed. That is, in the laminate shown in FIG. 12E, the resin 131_1 and the resin 132_1 are removed (see FIG. 13A).

[0242] Thereby, the EL layer 141a is formed on a part of the insulator 112 and on the conductor 121a. Also, at this time, in some cases, the EL layer 14la may also be formed on the insulator 111.

[0243] [Step B6] In step B6, the same processes as steps A8 to A14 are performed. Thereby, the EL layer 141b is formed on a part of the insulator 112 and on the conductor 121b. Also, at this time, in some cases, the EL layer 141b may also be formed on the insulator 111. Similarly, the EL layer 141c is formed on a part of the insulator 112 and on the conductor 121c (see FIG. 13B). Also, at this time, in some cases, the EL layer 141c may also be formed on the insulator 111.

[0244] [Step B7] In step B7, the same processes as steps A15 to A17 are performed. That is, in the laminate shown in FIG. 13B, the EL layer 142, the conductor 122, and the insulator 113 are formed in this order (see FIG. 13C).

[0245] [Step B8] In step B8, the same process as in step A18 is performed. That is, in the laminate shown in FIG. 13C, the substrate 102 is bonded via the resin layer 161 (see FIG. 13D).

[0246] As described above, by performing the manufacturing method of steps B1 to B8, a display device according to one aspect of the present invention can be manufactured. Also, as described above, by providing the opening KKB in the insulator 112, in the removal of the resin 131_1 and the resin 132_1, the EL layer 141a can be easily divided, so that the yield in the manufacture of the display device can be increased.

[0247] Note that the display device or the manufacturing method of one aspect of the present invention is not limited to the above-described configuration. For example, the display device of one aspect of the present invention may have a configuration in which the configuration of the display device shown in FIGS. 9A to 10C and the like is combined with the display device manufactured in steps B1 to B8. Also, for example, the manufacturing method of one aspect of the present invention may be a manufacturing method in which steps for configuring the display device shown in FIGS. 9A to 10C and the like are combined with the manufacturing method of steps B1 to B8.

[0248] Also, for example, in the above-described steps B1 to B8, the depth of the opening KKB formed in the insulator 112 is set to reach the insulator 111, but as shown in FIG. 14A, the depth of the opening KKB may be set to a depth that does not reach the insulator 111. Or, as shown in FIG. 14B, the depth of the opening KKB may be set to a depth that penetrates the insulator 112 and reaches the inside of the insulator 111.

[0249] By manufacturing a display device by the manufacturing method described in the present embodiment, the pitch width between pixels can be narrowed. Thereby, in the display device, more pixels can be provided with a determined size, so that the resolution of the display device can be increased. Also, by narrowing the pitch width, for example, a display device with a high aperture ratio can be realized as compared with the case of using a shadow mask such as a metal mask.

[0250] Furthermore, in the fabrication method described in this embodiment, the organic EL material is patterned and formed using a mask formed from a sacrificial layer and a resist, rather than using photolithography. This eliminates damage to the organic EL material caused by chemicals used in photolithography. As a result, the lifespan of the organic EL material can be extended, and the reliability of the light-emitting device can be increased.

[0251] Furthermore, since the display device manufactured by the above-described manufacturing method has a configuration in which the light-emitting layers of adjacent light-emitting devices do not come into contact with each other, it is possible to effectively prevent current from flowing through two adjacent EL layers 141 and causing unintended light emission (also known as crosstalk). As a result, contrast can be increased, and a display device with high display quality can be realized. In addition, since the display device manufactured by the above-described manufacturing method has an SBS structure, power consumption due to the operation of the display device can be kept low.

[0252] Furthermore, in a display device or method for manufacturing a display device according to one aspect of the present invention, there are no particular limitations on the aspect ratio of the display unit of the display device. For example, the display device can accommodate various aspect ratios such as 1:1 (square), 4:3, 16:9, and 16:10.

[0253] This embodiment can be appropriately combined with other embodiments shown in this specification.

[0254] (Embodiment 2) This embodiment describes an OS transistor that can be provided in the display device described in the above embodiment.

[0255] Figures 15A and 15B show an example of the configuration of an OS transistor that can be provided in the display device according to the above embodiment. Figure 15A is a cross-sectional view of the OS transistor in the channel length direction, and Figure 15B is a cross-sectional view of the OS transistor in the channel width direction.

[0256] The OS transistor, transistor 500, is, for example, provided on an insulator 512. It is preferable that the insulator 512 be made of a material that provides a barrier to oxygen and hydrogen.

[0257] Furthermore, as the insulator 512, for example, silicon oxide, silicon oxide nitride, silicon oxide nitride, silicon nitride, aluminum oxide, aluminum oxide nitride, aluminum oxide nitride, aluminum nitride, etc. may be used.

[0258] Furthermore, the insulator 512 may also function as a planarizing film that flattens steps caused by circuit elements, wiring, etc., located below the insulator 512. For example, the upper surface of the insulator 512 may be planarized by a planarizing treatment using chemical mechanical polishing (CMP) or the like to improve its flatness.

[0259] Furthermore, as shown in Figures 15A and 15B, insulators 514 and 516 are formed on insulator 512.

[0260] It is preferable to use a film for the insulator 514 that has barrier properties to prevent hydrogen and impurities from diffusing from the substrate 101 or the region below the insulator 512 where circuit elements are provided to the region where the transistor 500 is provided. Therefore, for example, silicon nitride formed by the CVD method can be used for the insulator 514.

[0261] As an example of a film having barrier properties against hydrogen, silicon nitride formed by the CVD method can be used. Here, hydrogen may diffuse into the circuit element located above the insulator 514, i.e., the transistor 500 which is an OS transistor, causing a decrease in the characteristics of the OS transistor. For this reason, it is preferable to use a film that suppresses hydrogen diffusion between the OS transistor and the substrate 101, or the circuit element formed above the substrate 101. Specifically, a film that suppresses hydrogen diffusion is a film that has a low hydrogen desorption rate.

[0262] The amount of hydrogen desorption can be analyzed using, for example, temperature-programmed desorption gas analysis method (TDS). For example, the amount of hydrogen desorption of the insulator 514 is such that in the TDS analysis, when the surface temperature of the film is in the range of 50°C to 500°C, the desorption amount converted to hydrogen atoms, per unit area of the insulator 514, is 10×10 15 atoms / cm 2 Hereinafter, preferably 5×10 15 atoms / cm 2 or less may be sufficient.

[0263] Also, as the insulator 516, for example, the same material as the insulator 512 can be used.

[0264] As shown in Figures 15A and 15B, the transistor 500 comprises an insulator 516 on an insulator 514, a conductor 503 (conductor 503a and conductor 503b) arranged to be embedded in the insulator 514 or insulator 516, an insulator 522 on the insulator 516 and on the conductor 503, an insulator 524 on the insulator 522, an oxide 530a on the insulator 524, an oxide 530b on the oxide 530a, a conductor 542a on the oxide 530b, an insulator 571a on the conductor 542a, and an oxide The structure includes a conductor 542b on 530b, an insulator 571b on the conductor 542b, an insulator 552 on the oxide 530b, an insulator 550 on the insulator 552, an insulator 554 on the insulator 550, a conductor 560 (conductor 560a and conductor 560b) located on the insulator 554 and overlapping with a portion of the oxide 530b, and an insulator 544 arranged on the insulator 522, insulator 524, oxide 530a, oxide 530b, conductor 542a, conductor 542b, insulator 571a, and insulator 544 on the insulator 571b. Here, as shown in Figures 15A and 15B, insulator 552 is in contact with the top surface of insulator 522, the side surface of insulator 524, the side surface of oxide 530a, the side surface and top surface of oxide 530b, the side surface of conductor 542, the side surface of insulator 571 (insulators 571a and 571b are collectively referred to as insulator 571), the side surface of insulator 544, the side surface of insulator 580, and the bottom surface of insulator 550. The top surface of conductor 560 is positioned so as to be roughly the same height as the top of insulator 554, the top of insulator 550, the top of insulator 552, and the top surface of insulator 580. Insulator 574 is in contact with at least a portion of the top surface of conductor 560, the top of insulator 552, the top of insulator 550, the top of insulator 554, and the top surface of insulator 580.

[0265] The insulator 580 and the insulator 544 are provided with openings reaching the oxide 530b. Inside the openings, an insulator 552, an insulator 550, an insulator 554, and a conductor 560 are arranged. Also, in the channel length direction of the transistor 500, a conductor 560, an insulator 552, an insulator 550, and an insulator 554 are provided between the insulator 571a and the conductor 542a and between the insulator 571b and the conductor 542b. The insulator 554 has a region in contact with the side surface of the conductor 560 and a region in contact with the bottom surface of the conductor 560.

[0266] The oxide 530 preferably has an oxide 530a disposed on the insulator 524 and an oxide 530b disposed on the oxide 530a. By having the oxide 530a under the oxide 530b, diffusion of impurities from a structure formed below the oxide 530a to the oxide 530b can be suppressed.

[0267] Note that in the transistor 500, the oxide 530 is shown as a structure in which two layers of the oxide 530a and the oxide 530b are stacked, but the present invention is not limited to this. For example, the transistor 500 can have a single layer of the oxide 530b or a stacked structure of three or more layers. Or, each of the oxide 530a and the oxide 530b can have a stacked structure.

[0268] The conductor 560 functions as a first gate (also referred to as a top gate) electrode, and the conductor 503 functions as a second gate (also referred to as a back gate) electrode. Also, the insulator 552, the insulator 550, and the insulator 554 function as a first gate insulator, and the insulator 522 and the insulator 524 function as a second gate insulator. Note that the gate insulator may also be referred to as a gate insulating layer or a gate insulating film. Also, the conductor 542a functions as one of a source or a drain, and the conductor 542b functions as the other of the source or the drain. Also, at least a part of the region of the oxide 530 that overlaps with the conductor 560 functions as a channel formation region.

[0269] Here, an enlarged view of the vicinity of the channel formation region in Figure 15A is shown in Figure 16A. When oxygen is supplied to the oxide 530b, a channel formation region is formed in the region between the conductor 542a and the conductor 542b. Therefore, as shown in Figure 16A, the oxide 530b has a region 530bc that functions as the channel formation region of the transistor 500, and regions 530ba and 530bb that are provided so as to sandwich region 530bc and function as the source region or drain region. At least a portion of region 530bc is superimposed on the conductor 560. In other words, region 530bc is provided in the region between the conductor 542a and the conductor 542b. Region 530ba is provided superimposed on the conductor 542a, and region 530bb is provided superimposed on the conductor 542b.

[0270] Region 530bc, which functions as a channel-forming region, has more oxygen vacancies than regions 530ba and 530bb (in this specification, oxygen vacancies in metal oxides are defined as V O This region is sometimes referred to as (oxygen vacancy). Because the amount of (oxygen) is small or the impurity concentration is low, it is a high-resistance region with a low carrier concentration. Therefore, region 530bc can be said to be type i (intrinsic) or substantially type i.

[0271] In transistors using metal oxides, impurities or oxygen vacancies (V) can be found in the region where the channel is formed within the metal oxide. O The presence of oxygen deficiency (V) can cause fluctuations in electrical properties and reduce reliability. O ) Nearby hydrogen, oxygen vacancy (V O A defect in which hydrogen has entered (hereinafter referred to as V O Sometimes referred to as H, it can form a channel and generate electrons that become carriers. For this reason, if the region in the oxide semiconductor where the channel is formed contains oxygen vacancies, the transistor is likely to exhibit normally-on characteristics (a characteristic in which the channel exists and current flows through the transistor even without applying voltage to the gate electrode). Therefore, in the region in the oxide semiconductor where the channel is formed, impurities, oxygen vacancies, and V OIt is preferable that H be reduced as much as possible.

[0272] Furthermore, regions 530ba and 530bb, which function as source or drain regions, are oxygen-deficient (V O This region has a high concentration of ) or high concentrations of impurities such as hydrogen, nitrogen, and metallic elements, which increases the carrier concentration and lowers the resistance. In other words, regions 530ba and 530bb are n-type regions with higher carrier concentrations and lower resistance compared to region 530bc.

[0273] Here, the carrier concentration in region 530bc, which functions as a channel-forming region, is 1 × 10⁻⁶. 18 cm -3 The following is preferable: 1 × 10 17 cm -3 It is more preferable that it be less than 1 × 10 16 cm -3 It is even more preferable that it be less than 1 × 10 13 cm -3 It is even more preferable that it be less than 1 × 10 12 cm -3 It is even more preferable that it be less than . There are no particular limitations on the lower limit of the carrier concentration in the region 530bc that functions as a channel-forming region, but for example, 1 × 10 -9 cm -3 It can be done this way.

[0274] Furthermore, a region may be formed between region 530bc and region 530ba or region 530bb, where the carrier concentration is equal to or lower than that of region 530ba and region 530bb, and equal to or higher than that of region 530bc. In other words, this region functions as a junction region between region 530bc and region 530ba or region 530bb. The hydrogen concentration in this junction region may be equal to or lower than that of region 530ba and region 530bb, and equal to or higher than that of region 530bc. Also, the oxygen deficiency in this junction region may be equal to or less than that of region 530ba and region 530bb, and equal to or greater than that of region 530bc.

[0275] Although Figure 16A shows an example in which regions 530ba, 530bb, and 530bc are formed in oxide 530b, the present invention is not limited to this. For example, each of the above regions may be formed not only in oxide 530b but also in oxide 530a.

[0276] Furthermore, in oxide 530, it can be difficult to clearly detect the boundaries between each region. The concentrations of metal elements, as well as impurity elements such as hydrogen and nitrogen, detected within each region may not be limited to stepwise changes between regions, but may also change continuously within each region. In other words, the closer a region is to the channel-forming region, the lower the concentrations of metal elements, as well as impurity elements such as hydrogen and nitrogen should be.

[0277] In transistor 500, it is preferable to use a metal oxide (hereinafter also referred to as an oxide semiconductor) that functions as a semiconductor for the oxide 530 (oxide 530a and oxide 530b) which includes the channel formation region.

[0278] Furthermore, it is preferable to use a metal oxide that functions as a semiconductor and has a band gap of 2 eV or more, preferably 2.5 eV or more. By using a metal oxide with a large band gap in this way, the off-current of the transistor can be reduced.

[0279] As oxide 530, for example, a metal oxide such as In-M-Zn oxide having indium, element M, and zinc (element M is one or more selected from aluminum, gallium, yttrium, tin, copper, vanadium, beryllium, boron, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, or magnesium) may be used. Alternatively, In-Ga oxide, In-Zn oxide, or indium oxide may be used as oxide 530.

[0280] Here, it is preferable that the atomic ratio of In to element M in the metal oxide used for oxide 530b is greater than the atomic ratio of In to element M in the metal oxide used for oxide 530a.

[0281] In this way, by placing oxide 530a below oxide 530b, the diffusion of impurities and oxygen from structures formed below oxide 530a to oxide 530b can be suppressed.

[0282] Furthermore, because oxides 530a and 530b share a common element other than oxygen (as a main component), the defect level density at the interface between oxide 530a and oxide 530b can be reduced. Because the defect level density at the interface between oxide 530a and oxide 530b can be reduced, the influence of interfacial scattering on carrier conduction is small, resulting in a high on-current.

[0283] The oxide 530b is preferably crystalline. In particular, it is preferable to use CAAC-OS (c-axis aligned crystalline oxide semiconductor) as the oxide 530b.

[0284] CAAC-OS has a highly crystalline, dense structure and is free from impurities and defects (e.g., oxygen deficiencies (V)). O It is a metal oxide with low ions. In particular, by heat-treating the metal oxide after its formation at a temperature that does not cause polycrystallization of the metal oxide (for example, between 400°C and 600°C), the CAAC-OS can be made to have a more crystalline and dense structure. By increasing the density of the CAAC-OS in this way, the diffusion of impurities or oxygen in the CAAC-OS can be further reduced.

[0285] On the other hand, because it is difficult to identify clear grain boundaries in CAAC-OS, the decrease in electron mobility caused by grain boundaries is less likely to occur. Therefore, metal oxides containing CAAC-OS have stable physical properties. As a result, metal oxides containing CAAC-OS are heat resistant and highly reliable.

[0286] In transistors using oxide semiconductors, the electrical properties tend to fluctuate and reliability may be poor if impurities and oxygen vacancies are present in the region where the channel is formed in the oxide semiconductor. Furthermore, hydrogen near the oxygen vacancy can fill the oxygen vacancy, creating a defect (hereinafter referred to as V). O Sometimes called H, it forms a channel and generates electrons that become carriers. For this reason, if the region where the channel is formed in the oxide semiconductor contains oxygen vacancies, the transistor is likely to exhibit normally-on characteristics (a characteristic in which the channel exists and current flows through the transistor even without applying voltage to the gate electrode). Therefore, in the region where the channel is formed in the oxide semiconductor, impurities, oxygen vacancies, and V are likely to be present. O It is preferable that H is reduced as much as possible. In other words, it is preferable that the region in the oxide semiconductor where the channel is formed has a reduced carrier concentration and is type i (intrinsed) or substantially type i.

[0287] In contrast, by placing an insulator containing oxygen that is released by heating (hereinafter sometimes referred to as excess oxygen) near the oxide semiconductor and performing heat treatment, oxygen is supplied from the insulator to the oxide semiconductor, eliminating oxygen deficiencies and V O H can be reduced. However, if an excessive amount of oxygen is supplied to the source or drain region, it may cause a decrease in the on-current of transistor 500 or a decrease in the field-effect mobility. Furthermore, variations in the amount of oxygen supplied to the source or drain region within the substrate surface will result in variations in the characteristics of the semiconductor device containing the transistor.

[0288] Therefore, in an oxide semiconductor, the region 530bc, which functions as a channel-forming region, preferably has a reduced carrier concentration and is i-type or substantially i-type, while the regions 530ba and 530bb, which function as a source region or drain region, preferably have a high carrier concentration and are n-type. In other words, oxygen vacancies in region 530bc of the oxide semiconductor, and V O It is preferable to reduce H so that an excessive amount of oxygen is not supplied to regions 530ba and 530bb.

[0289] Therefore, in this embodiment, with the conductor 542a and conductor 542b placed on the oxide 530b, microwave treatment is performed in an oxygen-containing atmosphere to eliminate oxygen deficiencies in region 530bc, and V O The aim is to reduce H. Here, microwave processing refers to processing using a device that has a power supply that generates high-density plasma using microwaves, for example.

[0290] By performing microwave treatment in an oxygen-containing atmosphere, the oxygen gas can be plasmaized using microwaves or high-frequency waves such as RF, and this oxygen plasma can be applied. At this time, microwaves or high-frequency waves such as RF can also be irradiated into region 530bc. Due to the action of plasma, microwaves, etc., the V of region 530bc O By cleaving H, hydrogen H is removed from region 530bc, and oxygen is lost V. OThis can be compensated for with oxygen. In other words, in region 530bc, "V O H → H + V O The following reaction occurs, which reduces the hydrogen concentration in region 530bc. Therefore, the oxygen deficiency in region 530bc, and V O This can reduce H and lower the carrier concentration.

[0291] Furthermore, when performing microwave processing in an oxygen-containing atmosphere, the effects of microwaves, high frequencies such as RF, and oxygen plasma are shielded by conductors 542a and 542b and do not reach regions 530ba and 530bb. In addition, the effects of oxygen plasma can be reduced by insulators 571 and 580, which are provided covering oxide 530b and conductor 542. As a result, during microwave processing, V O This prevents a decrease in H and avoids excessive oxygen supply, thus preventing a drop in carrier concentration.

[0292] Furthermore, it is preferable to perform microwave treatment in an oxygen-containing atmosphere after the deposition of the insulating film that will become the insulator 552, or after the deposition of the insulating film that will become the insulator 550. By performing microwave treatment in an oxygen-containing atmosphere via the insulator 552 or insulator 550 in this way, oxygen can be efficiently injected into region 530bc. In addition, by arranging the insulator 552 in contact with the side surface of the conductor 542 and the surface of region 530bc, the injection of more oxygen than necessary into region 530bc can be suppressed, thereby suppressing oxidation of the side surface of the conductor 542. Furthermore, oxidation of the side surface of the conductor 542 can be suppressed when the insulating film that will become the insulator 550 is deposited.

[0293] Furthermore, the oxygen injected into region 530bc can take various forms, such as oxygen atoms, oxygen molecules, and oxygen radicals (also called O radicals, which are atoms or molecules with unpaired electrons, or ions). It is preferable that the oxygen injected into region 530bc be one or more of the above forms, and particularly preferable that it be oxygen radicals. Additionally, the film quality of insulators 552 and 550 can be improved, thereby increasing the reliability of transistor 500.

[0294] In this way, oxygen vacancies are selectively created in the oxide semiconductor region 530bc, and V O By removing H, region 530bc can be made i-type or substantially i-type. Furthermore, it is possible to suppress the supply of excess oxygen to regions 530ba and 530bb, which function as source or drain regions, and maintain the state of the n-type region before microwave processing. This suppresses variations in the electrical characteristics of transistor 500 and reduces variations in the electrical characteristics of transistor 500 within the substrate plane.

[0295] By adopting the above configuration, it is possible to provide a semiconductor device with minimal variation in transistor characteristics. Furthermore, it is possible to provide a semiconductor device with good reliability and excellent electrical characteristics.

[0296] Furthermore, as shown in Figure 15B, in a cross-sectional view of the transistor 500 in the channel width direction, there may be a curved surface between the side surface and the top surface of the oxide 530b. In other words, the ends of the side surface and the ends of the top surface may be curved (hereinafter also referred to as rounded).

[0297] The radius of curvature of the curved surface is preferably greater than 0 nm and less than the film thickness of the oxide 530b in the region overlapping with the conductor 542, or less than half the length of the region without the curved surface. Specifically, the radius of curvature of the curved surface is greater than 0 nm and 20 nm or less, preferably 1 nm to 15 nm, and more preferably 2 nm to 10 nm. By adopting such a shape, the coverage of the oxide 530b by the insulator 552, insulator 550, insulator 554, and conductor 560 can be improved.

[0298] The oxide 530 preferably has a laminated structure of multiple oxide layers with different chemical compositions. Specifically, in the metal oxide used for oxide 530a, it is preferable that the atomic ratio of element M to the main metal element is greater than the atomic ratio of element M to the main metal element in the metal oxide used for oxide 530b. Furthermore, in the metal oxide used for oxide 530a, it is preferable that the atomic ratio of element M to In is greater than the atomic ratio of element M to In in the metal oxide used for oxide 530b. Furthermore, in the metal oxide used for oxide 530b, it is preferable that the atomic ratio of In to element M is greater than the atomic ratio of In to element M in the metal oxide used for oxide 530a.

[0299] Furthermore, it is preferable that the oxide 530b is a crystalline oxide such as CAAC-OS. Crystalline oxides such as CAAC-OS have few impurities and defects (such as oxygen deficiencies), and possess a dense structure with high crystallinity. Therefore, the extraction of oxygen from the oxide 530b by the source electrode or drain electrode can be suppressed. As a result, even when heat treatment is performed, the extraction of oxygen from the oxide 530b can be reduced, and the transistor 500 is stable against high temperatures (so-called thermal budget) in the manufacturing process.

[0300] Here, at the junction of oxide 530a and oxide 530b, the lower end of the conduction band changes smoothly. In other words, the lower end of the conduction band at the junction of oxide 530a and oxide 530b can be said to change continuously or to be a continuous junction. To achieve this, it is desirable to lower the defect level density of the mixed layer formed at the interface between oxide 530a and oxide 530b.

[0301] Specifically, by having oxides 530a and 530b share a common element other than oxygen as a main component, a mixed layer with a low defect level density can be formed. For example, if oxide 530b is In-M-Zn oxide, oxide 530a may be In-M-Zn oxide, M-Zn oxide, an oxide of element M, In-Zn oxide, indium oxide, etc.

[0302] Specifically, for oxide 530a, a metal oxide with an atomic ratio of In:M:Zn = 1:3:4 or a similar composition, or an atomic ratio of In:M:Zn = 1:1:0.5 or a similar composition, may be used. Similarly, for oxide 530b, a metal oxide with an atomic ratio of In:M:Zn = 1:1:1 or a similar composition, or an atomic ratio of In:M:Zn = 4:2:3 or a similar composition, may be used. Note that "similar composition" includes a range of ±30% of the desired atomic ratio. Furthermore, it is preferable to use gallium as element M.

[0303] Furthermore, when depositing metal oxide films by sputtering, the above atomic ratio is not limited to the atomic ratio of the deposited metal oxide film, but may also be the atomic ratio of the sputtering target used for depositing the metal oxide film.

[0304] Furthermore, as shown in Figure 15A and other figures, by providing an insulator 552 made of aluminum oxide or the like in contact with the top and side surfaces of the oxide 530, the indium contained in the oxide 530 may be unevenly distributed at and near the interface between the oxide 530 and the insulator 552. As a result, the atomic ratio near the surface of the oxide 530 becomes similar to that of indium oxide, or similar to that of In-Zn oxide. In this way, increasing the atomic ratio of indium near the surface of the oxide 530, especially oxide 530b, can improve the field-effect mobility of the transistor 500.

[0305] By configuring oxides 530a and 530b as described above, the defect level density at the interface between oxide 530a and oxide 530b can be reduced. As a result, the influence of interface scattering on carrier conduction is reduced, and transistor 500 can obtain a large on-current and high frequency characteristics.

[0306] It is preferable that at least one of the insulators 512, 514, 544, 571, 574, 576, and 581 function as a barrier insulating film that suppresses the diffusion of impurities such as water and hydrogen from the substrate side or from above the transistor 500 into the transistor 500. Therefore, it is preferable that at least one of the insulators 512, 514, 544, 571, 574, 576, and 581 be an insulating material that has the function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (N2O, NO, NO2, etc.), and copper atoms (i.e., the above impurities do not easily permeate through it). Alternatively, it is preferable to use an insulating material that has the function of suppressing the diffusion of oxygen (e.g., at least one of oxygen atoms, oxygen molecules, etc.) (i.e., the above oxygen does not easily permeate through it).

[0307] For insulators 512, 514, 544, 571, 574, 576, and 581, it is preferable to use insulators that have the function of suppressing the diffusion of impurities such as water and hydrogen, and oxygen. For example, aluminum oxide, magnesium oxide, hafnium oxide, gallium oxide, indium-gallium-zinc oxide, silicon nitride, or silicon nitride oxide can be used. For example, for insulators 512, 544, and 576, it is preferable to use silicon nitride, which has higher hydrogen barrier properties. Also, for example, for insulators 514, 571, 574, and 581, it is preferable to use aluminum oxide or magnesium oxide, which have high hydrogen capture and hydrogen fixation functions. This makes it possible to suppress the diffusion of impurities such as water and hydrogen from the substrate side to the transistor 500 side via insulators 512 and 514. Alternatively, it is possible to suppress the diffusion of impurities such as water and hydrogen from the interlayer insulating film located outside the insulator 581 towards the transistor 500. Alternatively, it is possible to suppress the diffusion of oxygen contained in the insulator 524, etc., towards the substrate side via the insulators 512 and 514. Alternatively, it is possible to suppress the diffusion of oxygen contained in the insulator 580, etc., upward from the transistor 500 via the insulator 574, etc. Thus, it is preferable to have a structure in which the transistor 500 is surrounded by insulators 512, 514, 571, 544, 574, 576, and 581, which have the function of suppressing the diffusion of impurities such as water and hydrogen, and oxygen.

[0308] Here, it is preferable to use oxides having an amorphous structure as insulators 512, 514, 544, 571, 574, 576, and 581. For example, AlO x (x is any number greater than 0), or MgO yIt is preferable to use a metal oxide such as (y is any number greater than 0). In such an amorphous metal oxide, oxygen atoms have dangling bonds, and these dangling bonds may have the property of capturing or fixing hydrogen. By using such an amorphous metal oxide as a component of the transistor 500, or by providing it around the transistor 500, hydrogen contained in the transistor 500, or hydrogen present around the transistor 500, can be captured or fixed. It is particularly preferable to capture or fix hydrogen contained in the channel formation region of the transistor 500. By using an amorphous metal oxide as a component of the transistor 500, or by providing it around the transistor 500, it is possible to manufacture a transistor 500 and a semiconductor device that have good characteristics and are highly reliable.

[0309] Furthermore, while insulators 512, 514, 544, 571, 574, 576, and 581 are preferably amorphous, they may also have regions of polycrystalline structure. In addition, insulators 512, 514, 544, 571, 574, 576, and 581 may have a multilayer structure in which an amorphous layer and a polycrystalline layer are stacked. For example, a stacked structure in which a polycrystalline layer is formed on top of an amorphous layer may also be possible.

[0310] The insulators 512, 514, 544, 571, 574, 576, and 581 may be deposited using, for example, a sputtering method. Since the sputtering method does not require the use of hydrogen-containing molecules in the deposition gas, the hydrogen concentration of insulators 512, 514, 544, 571, 574, 576, and 581 can be reduced. Note that the deposition method is not limited to sputtering, and chemical vapor deposition (CVD), molecular beam epitaxy (MBE), pulsed laser deposition (PLD), atomic layer deposition (ALD), etc., may be used as appropriate.

[0311] Furthermore, it may be preferable to lower the resistivity of insulators 512, 544, and 576. For example, the resistivity of insulators 512, 544, and 576 may be approximately 1 × 10⁻⁶. 13 By setting the resistivity to Ωcm, insulators 512, 544, and 576 can mitigate charge-up of conductors 503, 542, and 560 in processes using plasma in semiconductor device manufacturing. The resistivity of insulators 512, 544, and 576 is preferably 1 × 10⁻⁶. 10 Ωcm or more, 1 × 10 15 The density should be less than or equal to Ωcm.

[0312] Furthermore, it is preferable that insulators 516, 574, 580, and 581 have a lower dielectric constant than insulator 514. By using a material with a low dielectric constant as the interlayer film, parasitic capacitance between wirings can be reduced. For example, silicon oxide, silicon oxynitride, silicon oxide with added fluorine, silicon oxide with added carbon, silicon oxide with added carbon and nitrogen, and porous silicon oxide may be used as insulators 516, 580, and 581 as appropriate.

[0313] Furthermore, it is preferable that the insulator 581 functions as an insulator, for example, an interlayer film, a planarization film, or the like.

[0314] The conductor 503 is arranged to overlap with the oxide 530 and the conductor 560. Here, it is preferable that the conductor 503 is embedded in an opening formed in the insulator 516. In some cases, a portion of the conductor 503 may be embedded in the insulator 514.

[0315] The conductor 503 comprises a conductor 503a and a conductor 503b. Conductor 503a is provided in contact with the bottom surface and side wall of the opening. Conductor 503b is provided so as to be embedded in a recess formed in conductor 503a. Here, the upper height of conductor 503b is approximately equal to the upper height of conductor 503a and the upper height of insulator 516.

[0316] Here, it is preferable to use a conductive material for the conductor 503a that has the function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (N2O, NO, NO2, etc.), and copper atoms. Alternatively, it is preferable to use a conductive material that has the function of suppressing the diffusion of oxygen (for example, at least one such as oxygen atoms or oxygen molecules).

[0317] By using a conductive material that has the function of reducing hydrogen diffusion for the conductor 503a, it is possible to prevent impurities such as hydrogen contained in the conductor 503b from diffusing into the oxide 530 via the insulator 524, etc. Furthermore, by using a conductive material that has the function of suppressing oxygen diffusion for the conductor 503a, it is possible to suppress the oxidation of the conductor 503b and the resulting decrease in conductivity. As a conductive material that has the function of suppressing oxygen diffusion, it is preferable to use, for example, titanium, titanium nitride, tantalum, tantalum nitride, ruthenium, ruthenium oxide, etc. Therefore, the conductive material can be used as a single layer or in a laminate for the conductor 503a. For example, titanium nitride can be used for the conductor 503a.

[0318] Furthermore, it is preferable that the conductor 503b be a conductive material mainly composed of tungsten, copper, or aluminum. For example, tungsten may be used for the conductor 503b.

[0319] The conductor 503 may function as a second gate electrode. In this case, the threshold voltage (Vth) of transistor 500 can be controlled by changing the potential applied to conductor 503 independently of the potential applied to conductor 560, rather than in conjunction with it. In particular, by applying a negative potential to conductor 503, it is possible to increase the Vth of transistor 500 and reduce the off-current. Therefore, applying a negative potential to conductor 503 reduces the drain current when the potential applied to conductor 560 is 0V compared to not applying a negative potential.

[0320] Furthermore, if the oxide 530 is made of high-purity intrinsic material and impurities are removed from the oxide 530 as much as possible, it may be possible to normally turn off the transistor 500 (set the threshold voltage of the transistor 500 to greater than 0V) without applying a potential to the conductor 503 and / or the conductor 560. In this case, it is preferable to connect the conductor 560 and the conductor 503 so that they are given the same potential.

[0321] Furthermore, the electrical resistivity of the conductor 503 is designed considering the potential applied to the conductor 503, and the film thickness of the conductor 503 is set to match this electrical resistivity. The film thickness of the insulator 516 is approximately the same as that of the conductor 503. Here, it is preferable to make the film thicknesses of the conductor 503 and the insulator 516 as thin as possible within the limits permitted by the design of the conductor 503. By making the film thickness of the insulator 516 thin, the absolute amount of impurities such as hydrogen contained in the insulator 516 can be reduced, thereby reducing the diffusion of these impurities into the oxide 530.

[0322] Furthermore, the conductor 503 should be larger than the area of ​​the oxide 530 that does not overlap with the conductors 542a and 542b when viewed from above. In particular, as shown in Figure 15B, it is preferable that the conductor 503 extends to the area outside the edges of the oxide 530a and oxide 530b in the channel width direction. That is, it is preferable that the conductor 503 and the conductor 560 are superimposed on the outside of the side surface of the oxide 530 in the channel width direction, with an insulator in between. With this configuration, the channel formation region of the oxide 530 can be electrically surrounded by the electric field of the conductor 560 which functions as the first gate electrode and the electric field of the conductor 503 which functions as the second gate electrode. In this specification, a transistor structure in which the channel formation region is electrically surrounded by the electric fields of the first gate and the second gate is called a surrounded channel (S-channel) structure.

[0323] In this specification, an S-channel transistor refers to a transistor structure in which the channel formation region is electrically surrounded by the electric fields of one and the other of a pair of gate electrodes. Furthermore, the S-channel structure disclosed in this specification is different from the Fin-type structure and the Planar-type structure. By adopting an S-channel structure, it is possible to create a transistor that has improved resistance to short-channel effects, or in other words, a transistor in which short-channel effects are less likely to occur.

[0324] By setting transistor 500 to normally off and adopting the above-described S-Channel structure, the channel formation region can be electrically surrounded. Therefore, transistor 500 can also be considered as a GAA (Gate All Around) structure or an LGAA (Lateral Gate All Around) structure. By making transistor 500 an S-Channel, GAA, or LGAA structure, the channel formation region formed at or near the interface between oxide 530 and the gate insulating film can be the entire bulk of oxide 530. In other words, by making transistor 500 an S-Channel, GAA, or LGAA structure, it can be made into a so-called bulk-flow type, where the carrier path is used as the entire bulk. By adopting a bulk-flow type transistor structure, it is possible to improve the current density flowing through the transistor, and thus an improvement in the transistor's on-current or an increase in the transistor's field-effect mobility can be expected.

[0325] Furthermore, as shown in Figure 15B, the conductor 503 is extended to function as wiring. However, the configuration is not limited to this, and a conductor that functions as wiring may be provided beneath the conductor 503. Also, it is not necessary to provide one conductor 503 for each transistor. For example, the conductor 503 may be shared by multiple transistors.

[0326] In the transistor 500, the conductor 503 is shown as a stacked structure of conductor 503a and conductor 503b, but the present invention is not limited to this. For example, the conductor 503 may be provided as a single layer or as a stacked structure of three or more layers.

[0327] Insulators 522 and 524 function as gate insulators.

[0328] Preferably, the insulator 522 has the function of suppressing the diffusion of hydrogen (for example, at least one such as a hydrogen atom or a hydrogen molecule). Furthermore, preferably, the insulator 522 has the function of suppressing the diffusion of oxygen (for example, at least one such as an oxygen atom or an oxygen molecule). For example, it is preferable that the insulator 522 has the function of suppressing the diffusion of one or both hydrogen and oxygen more effectively than the insulator 524.

[0329] The insulator 522 may be an insulator containing an oxide of either or both of the insulating materials aluminum and hafnium. Preferably, the insulator is an oxide containing aluminum oxide, hafnium oxide, or an oxide containing aluminum and hafnium (hafnium aluminate). When the insulator 522 is formed using such a material, the insulator 522 functions as a layer that suppresses the release of oxygen from the oxide 530 to the substrate side and the diffusion of impurities such as hydrogen from the periphery of the transistor 500 to the oxide 530. Therefore, by providing the insulator 522, it is possible to suppress the diffusion of impurities such as hydrogen into the inside of the transistor 500 and suppress the generation of oxygen vacancies in the oxide 530. In addition, it is possible to suppress the reaction of the conductor 503 with the oxygen contained in the insulator 524 or the oxide 530.

[0330] Alternatively, aluminum oxide, bismuth oxide, germanium oxide, niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide, or zirconium oxide may be added to the above-mentioned insulator. Alternatively, these insulators may be subjected to nitriding treatment. Furthermore, insulator 522 may be used by laminating silicon oxide, silicon oxide nitride, or silicon nitride onto these insulators.

[0331] Furthermore, the insulator 522 may be a single-layer or multi-layer insulator containing so-called high-k materials, such as aluminum oxide, hafnium oxide, tantalum oxide, or zirconium oxide. As transistors become smaller and more integrated, thinning of the gate insulator can lead to problems such as leakage current. By using a high-k material as the insulator that functions as the gate insulator, it is possible to reduce the gate potential during transistor operation while maintaining the physical film thickness. In addition, materials with high dielectric constants, such as lead zirconate titanate (PZT), strontium titanate (SrTiO3), and (Ba,Sr)TiO3 (BST), may also be used as the insulator 522.

[0332] The insulator 524 in contact with the oxide 530 can be, for example, silicon oxide, silicon oxide nitride, or the like, as appropriate.

[0333] Furthermore, during the manufacturing process of the transistor 500, it is preferable to perform a heat treatment while the surface of the oxide 530 is exposed. This heat treatment may be performed at, for example, 100°C to 600°C, more preferably 350°C to 550°C. The heat treatment should be performed in an atmosphere of nitrogen gas or an inert gas, or in an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of an oxidizing gas. For example, it is preferable to perform the heat treatment in an oxygen atmosphere. This supplies oxygen to the oxide 530, thereby preventing oxygen deficiency (V OThis can reduce the amount of oxygen released. The heat treatment may also be performed under reduced pressure. Alternatively, the heat treatment may be performed in an atmosphere of nitrogen gas or an inert gas, and then in an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of an oxidizing gas to replenish the oxygen that has been removed. Alternatively, the heat treatment may be performed in an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of an oxidizing gas, and then continuously in an atmosphere of nitrogen gas or an inert gas.

[0334] Furthermore, by performing an oxygenation treatment on oxide 530, oxygen deficiencies in oxide 530 are repaired by the supplied oxygen, or in other words, "V O This can accelerate the reaction "+O→null". Furthermore, the oxygen supplied reacts with the hydrogen remaining in oxide 530, removing the hydrogen as H2O (dehydration). As a result, the hydrogen remaining in oxide 530 recombines with the oxygen vacancy and V O This can suppress the formation of H.

[0335] Furthermore, the insulators 522 and 524 may have a laminated structure of two or more layers. In this case, the laminated structure is not limited to being made of the same material, but may be made of different materials. Also, the insulator 524 may be superimposed with the oxide 530a to form an island-like structure. In this case, the insulator 544 will be in contact with the side surface of the insulator 524 and the upper surface of the insulator 522.

[0336] Conductors 542a and 542b are provided in contact with the upper surface of oxide 530b. Conductors 542a and 542b function as the source electrode or drain electrode of transistor 500, respectively.

[0337] As the conductor 542 (conductor 542a and conductor 542b), it is preferable to use, for example, a nitride containing tantalum, a nitride containing titanium, a nitride containing molybdenum, a nitride containing tungsten, a nitride containing tantalum and aluminum, or a nitride containing titanium and aluminum. In one embodiment of the present invention, a nitride containing tantalum is particularly preferred. Alternatively, for example, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, or an oxide containing lanthanum and nickel may be used. These materials are preferred because they are conductive materials that are resistant to oxidation or maintain conductivity even when absorbing oxygen.

[0338] Furthermore, hydrogen contained in oxide 530b, etc., may diffuse into conductor 542a or conductor 542b. In particular, by using tantalum-containing nitrides for conductor 542a and conductor 542b, hydrogen contained in oxide 530b, etc., is more likely to diffuse into conductor 542a or conductor 542b, and the diffused hydrogen may combine with nitrogen present in conductor 542a or conductor 542b. In other words, hydrogen contained in oxide 530b, etc., may be absorbed by conductor 542a or conductor 542b.

[0339] Furthermore, it is preferable that no curved surface is formed between the side surface of the conductor 542 and the top surface of the conductor 542. By using a conductor 542 without such a curved surface, the cross-sectional area of ​​the conductor 542 in the channel width direction can be increased. This increases the conductivity of the conductor 542 and increases the on-current of the transistor 500.

[0340] The insulator 571a is provided in contact with the upper surface of the conductor 542a, and the insulator 571b is provided in contact with the upper surface of the conductor 542b. Preferably, the insulator 571 functions as a barrier insulating film against oxygen. Therefore, it is preferable that the insulator 571 has a function to suppress the diffusion of oxygen. For example, it is preferable that the insulator 571 has a function to suppress the diffusion of oxygen more effectively than the insulator 580. As the insulator 571, for example, a silicon-containing nitride such as silicon nitride may be used. Furthermore, it is preferable that the insulator 571 has a function to capture impurities such as hydrogen. In that case, as the insulator 571, an amorphous metal oxide, such as aluminum oxide or magnesium oxide, may be used. In particular, it is preferable to use amorphous aluminum oxide or amorphous aluminum oxide as the insulator 571 because it may be possible to capture or fix hydrogen more effectively. This makes it possible to manufacture a transistor 500 and semiconductor device with good characteristics and high reliability.

[0341] The insulator 544 is provided so as to cover the insulator 524, oxide 530a, oxide 530b, conductor 542, and insulator 571. Preferably, the insulator 544 has the function of capturing and fixing hydrogen. In that case, it is preferable that the insulator 544 includes silicon nitride or an insulator such as an amorphous metal oxide, for example, aluminum oxide or magnesium oxide. Alternatively, for example, a laminated film of aluminum oxide and silicon nitride on the aluminum oxide may be used as the insulator 544.

[0342] By providing the insulators 571 and 544 as described above, the conductor 542 can be surrounded by an insulator that has barrier properties against oxygen. In other words, the oxygen contained in insulators 524 and 580 can be prevented from diffusing into the conductor 542. This prevents the conductor 542 from being directly oxidized by the oxygen contained in insulators 524 and 580, which would increase its resistivity and reduce the on-current.

[0343] The insulator 552 functions as part of the gate insulator. Preferably, the insulator 552 is a barrier insulating film against oxygen. The insulator 552 can be any insulator that can be used for the insulator 574 described above. The insulator 552 may be an insulator containing an oxide of either or both aluminum and hafnium. Examples of such insulators include aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), and an oxide containing hafnium and silicon (hafnium silicate). In this embodiment, aluminum oxide is used as the insulator 552. In this case, the insulator 552 is an insulator containing at least oxygen and aluminum.

[0344] As shown in Figure 15B, the insulator 552 is provided in contact with the top and side surfaces of oxide 530b, the side surface of oxide 530a, the side surface of insulator 524, and the top surface of insulator 522. In other words, the regions of oxide 530a, oxide 530b, and insulator 524 that overlap with the conductor 560 are covered by the insulator 552 in the cross-section in the channel width direction. This allows the insulator 552, which has an oxygen barrier property, to block the desorption of oxygen from oxide 530a and oxide 530b during heat treatment, etc. Thus, the formation of oxygen vacancies (Vo) in oxide 530a and oxide 530b can be reduced. O H can be reduced. Therefore, the electrical characteristics of transistor 500 can be improved, and its reliability can be enhanced.

[0345] Conversely, even if an excess amount of oxygen is present in the insulator 580 and insulator 550, it is possible to suppress the excessive supply of such oxygen to oxides 530a and 530b. Therefore, it is possible to suppress the excessive oxidation of regions 530ba and 530bb via region 530bc, which would otherwise cause a decrease in the on-current of transistor 500 or a decrease in field-effect mobility.

[0346] Furthermore, as shown in Figure 15A, the insulator 552 is provided in contact with the sides of the conductor 542, insulator 544, insulator 571, and insulator 580. Therefore, oxidation of the side surface of the conductor 542 and the formation of an oxide film on that side surface can be reduced. This makes it possible to suppress a decrease in the on-current of the transistor 500 or a decrease in the field-effect mobility.

[0347] Furthermore, the insulator 552, along with the insulator 554, the insulator 550, and the conductor 560, must be provided in the opening formed in the insulator 580 or the like. When miniaturizing the transistor 500, it is preferable that the film thickness of the insulator 552 be thin. The film thickness of the insulator 552 is preferably 0.1 nm or more, 0.5 nm or more, or 1.0 nm or more, and preferably 1.0 nm or less, 3.0 nm or less, or 5.0 nm or less. The above-mentioned lower and upper limits can be combined. In this case, it is sufficient that the insulator 552 has a region with the above-mentioned film thickness in at least a part of it. Furthermore, it is preferable that the film thickness of the insulator 552 is thinner than the film thickness of the insulator 550. In this case, it is sufficient that the insulator 552 has a region with a thinner film thickness than the insulator 550 in at least a part of it.

[0348] To deposit the insulator 552 with a thin film thickness as described above, it is preferable to use the ALD method. The ALD method is a method of film deposition in which a first raw material gas (also called a precursor, metal precursor, or metal precursor) and a second raw material gas (also called a reactant, reactant, oxidizing agent, or nonmetal precursor) are alternately introduced into a chamber, and the introduction of these raw material gases is repeated to deposit the film. There are various types of ALD methods, including the thermal ALD method, in which the reaction of the precursor and reactant is carried out using only thermal energy, and the PEALD (Plasma Enhanced ALD) method, which uses a plasma-excited reactant. In the PEALD method, the use of plasma allows for film deposition at lower temperatures, which is sometimes preferable.

[0349] The ALD method utilizes the self-regulating properties of atoms to deposit atoms layer by layer, resulting in several advantages: ultra-thin film deposition is possible, deposition on structures with high aspect ratios is possible, film deposition with fewer defects such as pinholes is possible, film deposition with excellent coverage is possible, and film deposition is possible at low temperatures. Therefore, the insulator 552 can be deposited with good coverage on the sides of openings formed in the insulator 580, etc., with the thin film thickness described above.

[0350] Note that precursors used in the ALD method may contain carbon and other impurities. Therefore, films formed by the ALD method may contain more carbon and other impurities compared to films formed by other film deposition methods. The quantity of impurities can be quantified using secondary ion mass spectrometry (SIMS) or X-ray photoelectron spectroscopy (XPS).

[0351] The insulator 550 functions as part of the gate insulator. It is preferable that the insulator 550 is placed in contact with the upper surface of the insulator 552. The insulator 550 can be silicon oxide, silicon oxynitride, silicon nitride, silicon nitride, silicon oxide with added fluorine, silicon oxide with added carbon, silicon oxide with added carbon and nitrogen, or silicon oxide with vacancies. In particular, silicon oxide and silicon oxynitride are preferred because they are stable with respect to heat. In this case, the insulator 550 will be an insulator having at least oxygen and silicon.

[0352] Similar to the insulator 524, it is preferable that the insulator 550 has a reduced concentration of impurities such as water and hydrogen. The film thickness of the insulator 550 is preferably 1 nm or 0.5 nm at the lower limit and 15 nm or 20 nm at the upper limit. The lower and upper limits mentioned above can be combined. For example, the film thickness of the insulator 550 is preferably 0.5 nm or more and 20 nm or less, and preferably 1 nm or more and 15 nm or less. In this case, it is sufficient that the insulator 550 has a region with the above-mentioned film thickness in at least a portion of it.

[0353] Figures 15A and 15B show a configuration in which the insulator 550 is a single layer, but the present invention is not limited to this, and a laminated structure of two or more layers may be used. For example, as shown in Figure 16B, the insulator 550 may be a laminated structure of two layers: an insulator 550a and an insulator 550b on top of the insulator 550a.

[0354] As shown in Figure 16B, when the insulator 550 has a two-layer laminated structure, it is preferable that the lower insulator 550a is formed using an insulator that is permeable to oxygen, and the upper insulator 550b is formed using an insulator that has the function of suppressing the diffusion of oxygen. With this configuration, it is possible to suppress the diffusion of oxygen contained in the insulator 550a to the conductor 560. In other words, it is possible to suppress the reduction in the amount of oxygen supplied to the oxide 530. Furthermore, it is possible to suppress the oxidation of the conductor 560 by the oxygen contained in the insulator 550a. For example, the insulator 550a may be made using a material that can be used for the insulator 550 as described above, and the insulator 550b may be an insulator containing an oxide of aluminum and / or hafnium. As such an insulator, aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), an oxide containing hafnium and silicon (hafnium silicate), etc., can be used. In this embodiment, hafnium oxide is used as the insulator 550b. In this case, the insulator 550b is an insulator having at least oxygen and hafnium. Furthermore, the film thickness of the insulator 550b is preferably 0.5 nm or more, or 1.0 nm or more, and preferably 3.0 nm or less, or 5.0 nm or less. The above-mentioned lower and upper limits can be combined. In this case, the insulator 550b only needs to have a region with the above-mentioned film thickness in at least a portion of it.

[0355] Furthermore, when silicon oxide, silicon oxynitride, or the like is used for insulator 550a, insulator 550b may be an insulating material that is a high-k material with a high dielectric constant. By making the gate insulator a laminated structure of insulator 550a and insulator 550b, a laminated structure that is stable against heat and has a high dielectric constant can be made. Therefore, it is possible to reduce the gate potential applied during transistor operation while maintaining the physical film thickness of the gate insulator. In addition, it is possible to make the equivalent oxide film thickness (EOT) of the insulator that functions as a gate insulator thinner. Thus, the dielectric breakdown voltage of insulator 550 can be increased.

[0356] The insulator 554 functions as part of the gate insulator. Preferably, a barrier insulating film against hydrogen is used as the insulator 554. This prevents impurities such as hydrogen contained in the conductor 560 from diffusing into the insulator 550 and oxide 530b. The insulator 554 can be any insulator that can be used for the insulator 576 described above. For example, silicon nitride deposited by the PEALD method can be used as the insulator 554. In this case, the insulator 554 will be an insulator containing at least nitrogen and silicon.

[0357] Furthermore, the insulator 554 may also have barrier properties against oxygen. This can suppress the diffusion of oxygen contained in the insulator 550 into the conductor 560.

[0358] Furthermore, the insulator 554, along with the insulator 552, the insulator 550, and the conductor 560, must be provided in an opening formed in the insulator 580 or the like. In order to miniaturize the transistor 500, it is preferable that the film thickness of the insulator 554 be thin. The film thickness of the insulator 554 is preferably 0.1 nm or more, 0.5 nm or more, or 1.0 nm or more, and preferably 3.0 nm or less, or 5.0 nm or less. The above-mentioned lower and upper limits can be combined. In this case, it is sufficient that the insulator 554 has a region with the above-mentioned film thickness in at least a part of it. Furthermore, it is preferable that the film thickness of the insulator 554 is thinner than the film thickness of the insulator 550. In this case, it is sufficient that the insulator 554 has a region with a thinner film thickness than the insulator 550 in at least a part of it.

[0359] The conductor 560 functions as the first gate electrode of the transistor 500. Preferably, the conductor 560 has a conductor 560a and a conductor 560b disposed on top of the conductor 560a. For example, it is preferable that the conductor 560a is arranged to enclose the bottom and sides of the conductor 560b. Also, as shown in Figures 15A and 15B, the height of the top surface of the conductor 560 roughly coincides with the height of the top of the insulator 550. In Figures 15A and 15B, the conductor 560 is shown as a two-layer structure of conductor 560a and conductor 560b, but the conductor 560 can also be a single-layer structure or a stacked structure of three or more layers.

[0360] It is preferable to use a conductive material for the conductor 560a that has the function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules, and copper atoms. Alternatively, it is preferable to use a conductive material that has the function of suppressing the diffusion of oxygen (for example, at least one such as oxygen atoms or oxygen molecules).

[0361] Furthermore, because the conductor 560a has the function of suppressing oxygen diffusion, it is possible to suppress the oxidation of the conductor 560b by the oxygen contained in the insulator 550, which would otherwise reduce its conductivity. As a conductive material that has the function of suppressing oxygen diffusion, it is preferable to use, for example, titanium, titanium nitride, tantalum, tantalum nitride, ruthenium, ruthenium oxide, etc.

[0362] Furthermore, since the conductor 560 also functions as wiring, it is preferable to use a conductor with high conductivity. For example, the conductor 560b can be a conductive material mainly composed of tungsten, copper, or aluminum. The conductor 560b can also be in a laminated structure. Specifically, for example, the conductor 560b can be a laminated structure of titanium, or titanium nitride, and the above conductive material.

[0363] Furthermore, in transistor 500, the conductor 560 is formed self-aligningly to fill the openings formed in the insulator 580 and the like. By forming the conductor 560 in this way, the conductor 560 can be reliably positioned in the region between the conductors 542a and 542b without the need for alignment.

[0364] Furthermore, as shown in Figure 15B, in the channel width direction of the transistor 500, it is preferable that the height of the bottom surface of the region of the conductor 560 that does not overlap with the oxide 530b, with reference to the bottom surface of the insulator 522, is lower than the height of the bottom surface of the oxide 530b. By configuring the conductor 560, which functions as a gate electrode, to cover the side and top surfaces of the channel formation region of the oxide 530b via the insulator 550 or the like, it becomes easier to apply the electric field of the conductor 560 to the entire channel formation region of the oxide 530b. Therefore, the on-current of the transistor 500 can be increased and the frequency characteristics can be improved. With respect to the bottom surface of the insulator 522, the difference between the height of the bottom surface of the conductor 560 and the height of the bottom surface of oxide 530b in the region where the oxides 530a and 530b and the conductor 560 do not overlap is preferably 0 nm or more, 3 nm or more, or 5 nm or more, and preferably 20 nm or less, 50 nm or less, or 100 nm or less. The above-mentioned lower and upper limits can be combined.

[0365] The insulator 580 is provided on the insulator 544, and openings are formed in the regions where the insulator 550 and the conductor 560 are provided. The upper surface of the insulator 580 may also be flattened.

[0366] The insulator 580, which functions as an interlayer film, preferably has a low dielectric constant. By using a material with a low dielectric constant as the interlayer film, parasitic capacitance occurring between wiring can be reduced. The insulator 580 is preferably made of the same material as the insulator 516, for example. Silicon oxide and silicon oxynitride are particularly preferred because they are thermally stable. Materials such as silicon oxide, silicon oxynitride, and silicon oxide with vacancies are particularly preferred because they can easily form regions containing oxygen that is desorbed by heating.

[0367] Preferably, the insulator 580 has a reduced concentration of impurities such as water and hydrogen. For example, the insulator 580 may be made of silicon oxide such as silicon oxide or silicon oxynitride.

[0368] The insulator 574 preferably functions as a barrier insulating film that suppresses the diffusion of impurities such as water and hydrogen into the insulator 580 from above, and preferably has the function of capturing impurities such as hydrogen. Furthermore, the insulator 574 preferably functions as a barrier insulating film that suppresses the permeation of oxygen. As the insulator 574, an amorphous metal oxide, such as aluminum oxide, may be used. In this case, the insulator 574 will be an insulator having at least oxygen and aluminum. By providing an insulator 574 in the region sandwiched between the insulator 512 and the insulator 580, in contact with the insulator 580, and having the function of capturing impurities such as hydrogen, impurities such as hydrogen contained in the insulator 580 can be captured, and the amount of hydrogen in that region can be kept constant. In particular, using aluminum oxide with an amorphous structure as the insulator 574 is preferable because it may be possible to capture or fix hydrogen more effectively. This makes it possible to manufacture a transistor 500 and a semiconductor device with good characteristics and high reliability.

[0369] The insulator 576 functions as a barrier insulating film that suppresses the diffusion of impurities such as water and hydrogen from above into the insulator 580. The insulator 576 is placed on top of the insulator 574. Preferably, the insulator 576 is a silicon-containing nitride such as silicon nitride or silicon nitride oxide. For example, silicon nitride deposited by sputtering may be used as the insulator 576. By depositing the insulator 576 by sputtering, a high-density silicon nitride film can be formed. Alternatively, as the insulator 576, silicon nitride deposited by PEALD or CVD may be further laminated on top of the silicon nitride deposited by sputtering.

[0370] Furthermore, one of the first or second terminals of transistor 500 is electrically connected to conductor 540a, which functions as a plug, and the other of the first or second terminal of transistor 500 is electrically connected to conductor 540b. Conductors 540a and 540b may function as wiring for electrically connecting to the light-emitting device 150 above. In the case of the display device 100 shown in Figure 4, conductors 540a and 540b may also be used as wiring for electrically connecting to the transistor 170. In this specification, conductors 540a and 540b are collectively referred to as conductor 540.

[0371] As an example, the conductor 540a is provided in a region that overlaps with the conductor 542a. Specifically, in the region that overlaps with the conductor 542a, openings are formed in the insulators 571, 544, 580, 574, 576, and 581 shown in Figure 15A, and the conductor 540a is provided inside these openings. Similarly, as an example, the conductor 540b is provided in a region that overlaps with the conductor 542b. Specifically, in the region that overlaps with the conductor 542b, openings are formed in the insulators 571, 544, 580, 574, 576, and 581 shown in Figure 15A, and the conductor 540b is provided inside these openings.

[0372] Furthermore, as shown in Figure 15A, an insulator 541a may be provided between the side surface of the opening in the region overlapping with the conductor 542a and the conductor 540a, as an insulator that provides a barrier against impurities. Similarly, an insulator 541b may be provided between the side surface of the opening in the region overlapping with the conductor 542b and the conductor 540b, as an insulator that provides a barrier against impurities. In this specification, insulators 541a and 541b will be collectively referred to as insulator 541.

[0373] It is preferable that the conductors 540a and 540b are made of conductive materials mainly composed of tungsten, copper, or aluminum. Furthermore, the conductors 540a and 540b may be arranged in a laminated structure.

[0374] Furthermore, when the conductor 540 has a laminated structure, it is preferable to use a conductive material that has the function of suppressing the permeation of impurities such as water and hydrogen for the first conductor arranged near the insulators 574, 576, 581, 580, 544, and 571. For example, it is preferable to use tantalum, tantalum nitride, titanium, titanium nitride, ruthenium, ruthenium oxide, etc. The conductive material that has the function of suppressing the permeation of impurities such as water and hydrogen may be used in a single layer or a laminate. In addition, it is possible to suppress the mixing of impurities such as water and hydrogen contained in the layer above insulator 576 into the oxide 530 through conductors 540a and 540b.

[0375] As insulators 541a and 541b, any barrier insulating film that can be used for insulator 544 and the like may be used. For example, as insulators 541a and 541b, insulators such as silicon nitride, aluminum oxide, and silicon oxide nitride may be used. Since insulators 541a and 541b are provided in contact with insulators 574, 576, and 571, it is possible to suppress the mixing of impurities such as water and hydrogen contained in insulator 580 and the like into the oxide 530 through conductors 540a and 540b. Silicon nitride is particularly suitable because it has high blocking properties for hydrogen. In addition, it is possible to prevent oxygen contained in insulator 580 from being absorbed by conductors 540a and 540b.

[0376] When the insulators 541a and 541b are arranged in a laminated structure as shown in Figure 15A, it is preferable that the first insulator in contact with the inner wall of the opening, such as the insulator 580, and the second insulator inside it, use a combination of an oxygen barrier insulating film and a hydrogen barrier insulating film.

[0377] For example, aluminum oxide deposited by the ALD method can be used as the first insulator, and silicon nitride deposited by the PEALD method can be used as the second insulator. This configuration suppresses oxidation of the conductor 540 and further reduces the incorporation of hydrogen into the conductor 540.

[0378] While the transistor 500 shows a configuration in which the first insulator and the second conductor of the insulator 541 are stacked, the present invention is not limited thereto. For example, the insulator 541 may be provided as a single layer or as a stacked structure of three or more layers. Similarly, while the transistor 500 shows a configuration in which the first conductor and the second conductor of the conductor 540 are stacked, the present invention is not limited thereto. For example, the conductor 540 may be provided as a single layer or as a stacked structure of three or more layers.

[0379] The structure of the transistor included in one embodiment of the present invention is not limited to the transistor 500 shown in Figures 15A and 15B. The structure of the transistor included in one embodiment of the present invention may be changed depending on the circumstances.

[0380] This embodiment can be appropriately combined with other embodiments shown in this specification.

[0381] (Embodiment 3) This embodiment describes metal oxides (hereinafter also referred to as oxide semiconductors) that can be used in the OS transistor described in the above embodiment.

[0382] The metal oxide preferably contains at least indium or zinc. It is particularly preferable that it contains indium and zinc. In addition, it is preferable that it contains aluminum, gallium, yttrium, tin, etc. It may also contain one or more selected from boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, cobalt, etc.

[0383] <Classification of crystal structures> First, we will explain the classification of crystal structures in oxide semiconductors using Figure 17A. Figure 17A is a diagram illustrating the classification of crystal structures in oxide semiconductors, specifically IGZO (a metal oxide containing In, Ga, and Zn).

[0384] As shown in Figure 17A, oxide semiconductors are broadly classified into "Amorphous," "Crystalline," and "Crystal." "Amorphous" includes completely amorphous materials. "Crystalline" includes CAAC (c-axis-aligned crystalline), nc (nanocrystalline), and CAC (Cloud-Aligned Composite) (excluding single crystal and polycrystal). Note that single crystal, polycrystal, and completely amorphous materials are excluded from the "Crystalline" classification. "Crystal" includes single crystal and polycrystal materials.

[0385] The structure within the thick frame shown in Figure 17A represents an intermediate state between "Amorphous" and "Crystal," and belongs to a new boundary region (New crystalline phase). In other words, this structure can be described as being completely different from the energetically unstable "Amorphous" and "Crystal" states.

[0386] The crystal structure of a film or substrate can be evaluated using X-ray diffraction (XRD) spectroscopy. Figure 17B shows the XRD spectrum obtained by GIXD (Grazing-Incidence XRD) measurement of a CAAC-IGZO film classified as "Crystalline" (the vertical axis represents intensity in arbitrary units (au)). The GIXD method is also called the thin-film method or the Seemann-Bohlin method. Hereafter, the XRD spectrum obtained by the GIXD measurement shown in Figure 17B may be simply referred to as the XRD spectrum. The composition of the CAAC-IGZO film shown in Figure 17B is approximately In:Ga:Zn = 4:2:3 [atomic ratio]. The thickness of the CAAC-IGZO film shown in Figure 17B is 500 nm.

[0387] As shown in Figure 17B, the XRD spectrum of the CAAC-IGZO film shows a peak indicating clear crystallinity. Specifically, the XRD spectrum of the CAAC-IGZO film shows a peak indicating c-axis orientation near 2θ=31°. As shown in Figure 17B, the peak near 2θ=31° is asymmetrical with respect to the angle at which the peak intensity was detected.

[0388] Furthermore, the crystal structure of a film or substrate can be evaluated by the diffraction pattern (also called the nano-beam electron diffraction pattern) observed by nano-beam electron diffraction (NBED). The diffraction pattern of a CAAC-IGZO film is shown in Figure 17C. Figure 17C shows the diffraction pattern observed by NBED with the electron beam incident parallel to the substrate. The composition of the CAAC-IGZO film shown in Figure 17C is approximately In:Ga:Zn=4:2:3 [atomic ratio]. In nano-beam electron diffraction, electron diffraction is performed with a probe diameter of 1 nm.

[0389] As shown in Figure 17C, the diffraction pattern of the CAAC-IGZO film shows multiple spots indicating c-axis orientation.

[0390] <<Oxide semiconductor structure>> Note that when focusing on the crystal structure, oxide semiconductors may be classified differently from those shown in Figure 17A. For example, oxide semiconductors can be divided into single-crystal oxide semiconductors and other non-single-crystal oxide semiconductors. Examples of non-single-crystal oxide semiconductors include the aforementioned CAAC-OS and nc-OS. Non-single-crystal oxide semiconductors also include polycrystalline oxide semiconductors, pseudo-amorphous oxide semiconductors (a-like OS), and amorphous oxide semiconductors.

[0391] Here, we will explain the details of the CAAC-OS, nc-OS, and a-like OS mentioned above.

[0392] [CAAC-OS] CAAC-OS is an oxide semiconductor having multiple crystalline regions, the c-axis of which is oriented in a specific direction. This specific direction is the thickness direction of the CAAC-OS film, the normal direction to the surface on which the CAAC-OS film is formed, or the normal direction to the surface of the CAAC-OS film. A crystalline region is a region with periodic atomic arrangement. If we consider the atomic arrangement as a lattice arrangement, then a crystalline region is also a region with a aligned lattice arrangement. Furthermore, CAAC-OS has regions where multiple crystalline regions are connected in the ab-plane direction, and these regions may exhibit distortion. Distortion refers to a point in the connected region where the orientation of the lattice arrangement changes between a region with a aligned lattice arrangement and another region with a aligned lattice arrangement. In short, CAAC-OS is an oxide semiconductor that is c-axis oriented and does not exhibit clear orientation in the ab-plane direction.

[0393] Each of the multiple crystalline regions described above is composed of one or more minute crystals (crystals with a maximum diameter of less than 10 nm). When a crystalline region is composed of a single minute crystal, the maximum diameter of that crystalline region is less than 10 nm. When a crystalline region is composed of many minute crystals, the size of that crystalline region may be around several tens of nanometers.

[0394] Furthermore, in In-M-Zn oxides (where element M is one or more elements selected from aluminum, gallium, yttrium, tin, titanium, etc.), CAAC-OS tends to have a layered crystalline structure (also called a layered structure) consisting of layers containing indium (In) and oxygen (hereinafter referred to as the In layer) and layers containing element M, zinc (Zn), and oxygen (hereinafter referred to as the (M,Zn) layer). Note that indium and element M are mutually substitutable. Therefore, the (M,Zn) layer may contain indium. Also, the In layer may contain element M. Also, the In layer may contain Zn. This layered structure can be observed, for example, as a lattice image in high-resolution TEM images.

[0395] When structural analysis of a CAAC-OS film is performed using an XRD instrument, for example, out-of-plane XRD measurements using θ / 2θ scanning show a peak indicating c-axis orientation at 2θ = 31° or nearby. Note that the position of the c-axis orientation peak (value of 2θ) may vary depending on the type and composition of the metal elements constituting the CAAC-OS.

[0396] Furthermore, for example, multiple bright spots are observed in the electron diffraction pattern of a CAAC-OS film. These spots are observed at point-symmetric positions with respect to the incident electron beam spot (also called the direct spot) that passed through the sample.

[0397] When the crystal region is observed from the specific direction described above, the lattice arrangement within that crystal region is based on a hexagonal lattice, but the unit cell is not necessarily a regular hexagon and may be non-regular hexagonal. Furthermore, the strain may have lattice arrangements such as pentagons or heptagons. Moreover, in CAAC-OS, clear grain boundaries cannot be observed even near the strain. In other words, it can be seen that the formation of grain boundaries is suppressed by the strain in the lattice arrangement. This is thought to be because CAAC-OS can tolerate strain due to factors such as the non-dense arrangement of oxygen atoms in the ab-plane direction and the change in interatomic bond distances due to the substitution of metal atoms.

[0398] A crystal structure in which clear grain boundaries are observed is called a polycrystal. Grain boundaries act as recombination centers, trapping carriers and potentially causing a decrease in transistor on-current and field-effect mobility. Therefore, CAAC-OS, in which clear grain boundaries are not observed, is one of the crystalline oxides with a suitable crystal structure for the semiconductor layer of a transistor. In addition, a structure containing Zn is preferred for the composition of CAAC-OS. For example, In-Zn oxide and In-Ga-Zn oxide are preferred because they suppress the generation of grain boundaries more than In oxide.

[0399] CAAC-OS is an oxide semiconductor with high crystallinity and no clearly defined grain boundaries. Therefore, CAAC-OS is less susceptible to the decrease in electron mobility caused by grain boundaries. Furthermore, since the crystallinity of oxide semiconductors can decrease due to the inclusion of impurities and the generation of defects, CAAC-OS can be said to be an oxide semiconductor with few impurities and defects (such as oxygen vacancies). Consequently, oxide semiconductors containing CAAC-OS have stable physical properties. Therefore, oxide semiconductors containing CAAC-OS are heat-resistant and highly reliable. In addition, CAAC-OS is stable even at high temperatures (so-called thermal budget) during the manufacturing process. Therefore, using CAAC-OS in OS transistors allows for greater flexibility in the manufacturing process.

[0400] [nc-OS] nc-OS exhibits periodicity in atomic arrangement in minute regions (e.g., regions between 1 nm and 10 nm, particularly between 1 nm and 3 nm). In other words, nc-OS contains minute crystals. These minute crystals are also called nanocrystals because their size is, for example, between 1 nm and 10 nm, particularly between 1 nm and 3 nm. Furthermore, nc-OS shows no regularity in crystal orientation between different nanocrystals. Therefore, no orientation is observed throughout the film. Consequently, depending on the analytical method, nc-OS may be indistinguishable from a-like OS and amorphous oxide semiconductors. For example, when structural analysis of an nc-OS film is performed using an XRD instrument, no peaks indicating crystallinity are detected in out-of-plane XRD measurements using θ / 2θ scanning. Also, when electron diffraction (also called limited-field electron diffraction) is performed on an nc-OS film using an electron beam with a probe diameter larger than that of the nanocrystals (e.g., 50 nm or larger), a diffraction pattern resembling a halo pattern is observed. On the other hand, when electron diffraction (also called nanobeam electron diffraction) is performed on an nc-OS film using an electron beam with a probe diameter close to or smaller than the size of the nanocrystal (for example, 1 nm to 30 nm), an electron diffraction pattern may be obtained in which multiple spots are observed within a ring-shaped region centered on a direct spot.

[0401] [a-like OS] a-like OS is an oxide semiconductor having a structure between nc-OS and amorphous oxide semiconductors. a-like OS has porous or low-density regions. That is, a-like OS has lower crystallinity compared to nc-OS and CAAC-OS. Also, a-like OS has a higher hydrogen concentration in the film compared to nc-OS and CAAC-OS.

[0402] <<Oxide Semiconductor Composition>> Next, we will explain the details of CAC-OS mentioned above. Note that CAC-OS refers to the material composition.

[0403] [CAC-OS] CAC-OS is a material composition in which, for example, the elements constituting the metal oxide are unevenly distributed in sizes of 0.5 nm to 10 nm, preferably 1 nm to 3 nm, or close to that size. In the following, a state in which one or more metal elements are unevenly distributed in a metal oxide, and the regions containing these metal elements are mixed in sizes of 0.5 nm to 10 nm, preferably 1 nm to 3 nm, or close to that size, is also referred to as a mosaic or patchy state.

[0404] Furthermore, CAC-OS is a composite metal oxide having a mosaic-like structure formed by the separation of the material into a first region and a second region, with the first region distributed within the film (hereinafter also referred to as a cloud-like structure). In other words, CAC-OS is a composite metal oxide having a structure in which the first region and the second region are mixed.

[0405] Here, the atomic ratios of In, Ga, and Zn to the metal elements constituting the CAC-OS in In-Ga-Zn oxide are denoted as [In], [Ga], and [Zn], respectively. For example, in the CAC-OS of In-Ga-Zn oxide, the first region is the region where [In] is greater than the [In] in the composition of the CAC-OS film. The second region is the region where [Ga] is greater than the [Ga] in the composition of the CAC-OS film. Alternatively, for example, the first region is the region where [In] is greater than the [In] in the second region, and [Ga] is smaller than the [Ga] in the second region. The second region is the region where [Ga] is greater than the [Ga] in the first region, and [In] is smaller than the [In] in the first region.

[0406] Specifically, the first region described above is a region whose main components are indium oxide, indium zinc oxide, etc. The second region described above is a region whose main components are gallium oxide, gallium zinc oxide, etc. In other words, the first region can be rephrased as a region whose main component is In. Similarly, the second region can be rephrased as a region whose main component is Ga.

[0407] Furthermore, a clear boundary may not be observed between the first region and the second region described above.

[0408] For example, in the case of CAC-OS in In-Ga-Zn oxide, EDX mapping obtained using energy dispersive X-ray spectroscopy (EDX) confirms that it has a structure in which regions mainly composed of In (first region) and regions mainly composed of Ga (second region) are unevenly distributed and mixed.

[0409] When CAC-OS is used in a transistor, the conductivity due to the first region and the insulation due to the second region work complementaryly to give CAC-OS a switching function (on / off function). In other words, CAC-OS has conductive function in part of the material, insulating function in part of the material, and semiconductor function as a whole. By separating the conductive function and the insulating function, both functions can be maximized. Therefore, by using CAC-OS in a transistor, a high on-current (I) can be achieved. on This enables high field-effect mobility (μ) and good switching operation.

[0410] Oxide semiconductors can take on diverse structures, each possessing different properties. One embodiment of the present invention may include two or more of the following: amorphous oxide semiconductors, polycrystalline oxide semiconductors, a-like OS, CAC-OS, nc-OS, and CAAC-OS.

[0411] <Transistors containing oxide semiconductors> Next, we will explain the case where the above oxide semiconductor is used in a transistor.

[0412] By using the above-mentioned oxide semiconductor in transistors, it is possible to realize transistors with high field-effect mobility. Furthermore, it is possible to realize highly reliable transistors.

[0413] It is preferable to use an oxide semiconductor with a low carrier concentration for the transistor. For example, the carrier concentration of an oxide semiconductor is 1 × 10⁻⁶. 17 cm -3 The following is preferably 1 × 10 15 cm -3 More preferably 1 × 10 13 cm -3 More preferably 1 × 10 11 cm -3 More preferably 1 × 10 10 cm -3 It is less than 1 × 10 -9 cm -3 This concludes the explanation. Furthermore, when lowering the carrier concentration of an oxide semiconductor film, the impurity concentration in the oxide semiconductor film should be lowered to reduce the defect level density. In this specification, a low impurity concentration and low defect level density are referred to as high-purity intrinsic or substantially high-purity intrinsic. Note that oxide semiconductors with low carrier concentrations may also be referred to as high-purity intrinsic or substantially high-purity intrinsic oxide semiconductors.

[0414] Furthermore, oxide semiconductor films that are highly pure or substantially highly pure have a low defect level density, which may result in a low trap level density.

[0415] Furthermore, charges trapped in the trap levels of oxide semiconductors can take a long time to disappear, sometimes behaving like fixed charges. Therefore, transistors in which channel formation regions are formed in oxide semiconductors with a high trap level density may exhibit unstable electrical properties.

[0416] Therefore, reducing the impurity concentration in the oxide semiconductor is effective in stabilizing the electrical characteristics of the transistor. Furthermore, in order to reduce the impurity concentration in the oxide semiconductor, it is preferable to also reduce the impurity concentration in adjacent films. Examples of impurities include hydrogen, nitrogen, alkali metals, alkaline earth metals, iron, nickel, and silicon.

[0417] <Impurities> Here, we will explain the effects of various impurities in oxide semiconductors.

[0418] In oxide semiconductors, the presence of silicon and carbon, which are Group 14 elements, leads to the formation of defect levels within the oxide semiconductor. Therefore, the concentrations of silicon and carbon in the oxide semiconductor and the concentrations of silicon and carbon near the interface with the oxide semiconductor (concentrations obtained by secondary ion mass spectrometry (SIMS)) are compared by 2 × 10⁻⁶. 18 atoms / cm 3 The following is preferably 2 × 10 17 atoms / cm 3 The following applies:

[0419] Furthermore, if an oxide semiconductor contains alkali metals or alkaline earth metals, it may form defect levels and generate carriers. Therefore, transistors using oxide semiconductors containing alkali metals or alkaline earth metals tend to exhibit normally-on characteristics. For this reason, the concentration of alkali metals or alkaline earth metals in the oxide semiconductor obtained by SIMS should be set to 1 × 10⁻⁶. 18 atoms / cm 3 The following is preferably 2 × 10 16 atoms / cm 3 Do the following:

[0420] In addition, in an oxide semiconductor, when nitrogen is contained, electrons as carriers are generated, the carrier concentration increases, and it tends to be n-type. As a result, a transistor using an oxide semiconductor containing nitrogen tends to have normally-on characteristics. Or, in an oxide semiconductor, when nitrogen is contained, trap levels may be formed. As a result, the electrical characteristics of the transistor may become unstable. Therefore, the nitrogen concentration in the oxide semiconductor obtained by SIMS is 5×10 19 atoms / cm 3 less than, preferably 5×10 18 atoms / cm 3 or less, more preferably 1×10 18 atoms / cm 3 or less, even more preferably 5×10 17 atoms / cm 3 or less.

[0421] In addition, hydrogen contained in the oxide semiconductor may react with oxygen bonded to metal atoms to form water, thereby forming oxygen vacancies. When hydrogen enters the oxygen vacancies, electrons as carriers may be generated. Also, a part of hydrogen may bond with oxygen bonded to metal atoms to generate electrons as carriers. Therefore, a transistor using an oxide semiconductor containing hydrogen tends to have normally-on characteristics. For this reason, it is preferable that the hydrogen in the oxide semiconductor is reduced as much as possible. Specifically, in the oxide semiconductor, the hydrogen concentration obtained by SIMS is 1×10 20 atoms / cm 3 less than, preferably 1×10 19 atoms / cm 3 less than, more preferably 5×10 18 atoms / cm 3 less than, even more preferably 1×10 18 atoms / cm 3 or less.

[0422] By using an oxide semiconductor with sufficiently reduced impurities in the channel formation region of a transistor, stable electrical characteristics can be imparted.

[0423] This embodiment can be appropriately combined with other embodiments shown in this specification.

[0424] (Embodiment 4) In this embodiment, an example of a head-mounted display to which a display device is applied will be described as an example of an electronic device according to one aspect of the present invention.

[0425] Figures 18A and 18B show the external appearance of the head-mounted display 8300.

[0426] The head-mounted display 8300 includes a housing 8301, a display unit 8302, operation buttons 8303, and a band-shaped fastening device 8304.

[0427] The operation button 8303 has functions such as a power button. The head-mounted display 8300 may also have buttons other than the operation button 8303.

[0428] Furthermore, as shown in Figure 18C, a lens 8305 may be provided between the display unit 8302 and the user's eye position. The lens 8305 allows the user to view the display unit 8302 in a magnified manner, thereby enhancing the sense of realism. In this case, as shown in Figure 18C, a dial 8306 may be provided to change the position of the lens for diopter adjustment.

[0429] A display device according to one embodiment of the present invention can be applied to the display unit 8302. Because the display device according to one embodiment of the present invention has extremely high resolution, even when magnified using the lens 8305 as shown in Figure 18C, the user cannot see the pixels, and a more realistic image can be displayed.

[0430] Figures 18A to 18C show an example where there is one display unit 8302. This configuration allows for a reduction in the number of parts.

[0431] The display unit 8302 can display two images side-by-side in its left and right regions, one for the right eye and the other for the left eye. This allows for the display of stereoscopic images using binocular parallax.

[0432] Alternatively, a single image visible to both eyes may be displayed across the entire area of ​​the display unit 8302. This makes it possible to display a panoramic image across both ends of the field of view, thereby enhancing the sense of realism.

[0433] Here, it is preferable that the head-mounted display 8300 has a mechanism to change the curvature of the display unit 8302 to an appropriate value according to the size of the user's head or the position of their eyes. For example, the user may adjust the curvature of the display unit 8302 themselves by operating a dial 8307 for adjusting the curvature of the display unit 8302. Alternatively, the housing 8301 may be provided with a sensor (e.g., a camera, a contact sensor, a non-contact sensor, etc.) that detects the size of the user's head or the position of their eyes, and the housing may have a mechanism to adjust the curvature of the display unit 8302 based on the sensor detection data.

[0434] Furthermore, when using lens 8305, it is preferable to provide a mechanism that adjusts the position and angle of lens 8305 in synchronization with the curvature of display unit 8302. Alternatively, dial 8306 may have a function to adjust the angle of the lens.

[0435] Figures 18E and 18F show an example in which a drive unit 8308 controls the curvature of the display unit 8302. The drive unit 8308 is fixed to at least a portion of the display unit 8302. The drive unit 8308 has the function of deforming the display unit 8302 by deforming or moving the portion to which it is fixed.

[0436] Figure 18E is a schematic diagram showing a user 8310 with a relatively large head size wearing the housing 8301. In this case, the shape of the display unit 8302 is adjusted by the drive unit 8308 so that the curvature is relatively small (the radius of curvature is large).

[0437] On the other hand, Figure 18F shows the case where user 8311, who has a smaller head size compared to user 8310, is wearing the housing 8301. Also, user 8311 has a narrower distance between their eyes compared to user 8310. In this case, the shape of the display unit 8302 is adjusted by the drive unit 8308 so that the curvature of the display unit 8302 is large (the radius of curvature is small). In Figure 18F, the position and shape of the display unit 8302 in Figure 18E are shown by dashed lines.

[0438] Thus, the head-mounted display 8300, by having a mechanism to adjust the curvature of the display unit 8302, can provide optimal display to a wide range of users, regardless of age or gender.

[0439] Furthermore, by changing the curvature of the display unit 8302 according to the content displayed on it, a high level of realism can be provided to the user. For example, vibration can be simulated by vibrating the curvature of the display unit 8302. In this way, various effects can be applied to match the scenes in the content, providing the user with a new experience. Moreover, by linking this with the vibration module installed in the housing 8301, an even more immersive display becomes possible.

[0440] The head-mounted display 8300 may also have two display units 8302, as shown in Figure 18D.

[0441] Having two display units 8302 allows the user to view one display unit per eye. This enables the display of high-resolution images even when performing 3D displays using parallax. Furthermore, the display units 8302 are curved in an arc shape with the user's eye as the approximate center. This ensures that the distance from the user's eye to the display surface of the display unit remains constant, allowing the user to see a more natural image. In addition, even if the brightness and chromaticity of the light from the display unit change depending on the viewing angle, the user's eye is positioned in the direction of the normal to the display surface of the display unit, so this effect can be practically ignored, resulting in a more realistic image.

[0442] This embodiment can be appropriately combined with other embodiments shown in this specification.

[0443] (Embodiment 5) This embodiment describes a display module that can be manufactured using a display device according to one aspect of the present invention.

[0444] The display module 6000 shown in Figure 19A includes a display device 6006 with an FPC 6005 connected between an upper cover 6001 and a lower cover 6002, a frame 6009, a printed circuit board 6010, and a battery 6011.

[0445] For example, a display device manufactured using one aspect of the present invention can be used as the display device 6006. The display device 6006 makes it possible to realize a display module with extremely low power consumption.

[0446] The shape and dimensions of the upper cover 6001 and the lower cover 6002 can be appropriately changed to match the size of the display device 6006.

[0447] The display device 6006 may also have the functionality of a touch panel.

[0448] Frame 6009 may have functions such as protecting the display device 6006, blocking electromagnetic waves generated by the operation of the printed circuit board 6010, and acting as a heat sink.

[0449] The printed circuit board 6010 includes a power supply circuit, a signal processing circuit for outputting video signals and clock signals, a battery control circuit, and the like.

[0450] Figure 19B is a schematic cross-sectional view of a display module 6000 equipped with an optical touch sensor.

[0451] The display module 6000 has a light-emitting section 6015 and a light-receiving section 6016 provided on the printed circuit board 6010. It also has a pair of light guides (light guide section 6017a, light guide section 6017b) in the area enclosed by the upper cover 6001 and the lower cover 6002.

[0452] The display device 6006 is mounted on top of the printed circuit board 6010 and the battery 6011 with a frame 6009 in between. The display device 6006 and the frame 6009 are fixed to the light guide section 6017a and the light guide section 6017b.

[0453] Light 6018 emitted from the light-emitting unit 6015 passes over the top of the display device 6006 via the light guide unit 6017a, and then through the light guide unit 6017b to reach the light-receiving unit 6016. Touch operation can be detected when the light 6018 is blocked, for example, by an object to be detected such as a finger or stylus.

[0454] Multiple light-emitting units 6015 are provided, for example, along two adjacent sides of the display device 6006. Multiple light-receiving units 6016 are provided at positions opposite the light-emitting units 6015. This makes it possible to acquire information about the location where a touch operation was performed.

[0455] The light-emitting unit 6015 can use a light source such as an LED element, and it is particularly preferable to use a light source that emits infrared rays. The light-receiving unit 6016 can use a photoelectric element that receives the light emitted by the light-emitting unit 6015 and converts it into an electrical signal. Preferably, a photodiode capable of receiving infrared rays can be used.

[0456] The light guides 6017a and 6017b, which transmit light 6018, allow the light-emitting unit 6015 and the light-receiving unit 6016 to be positioned below the display device 6006, thereby suppressing external light from reaching the light-receiving unit 6016 and causing the touch sensor to malfunction. In particular, using a resin that absorbs visible light and transmits infrared light can more effectively suppress touch sensor malfunctions.

[0457] This embodiment can be appropriately combined with other embodiments shown in this specification.

[0458] (Embodiment 6) This embodiment describes an example of an electronic device to which a display device according to one aspect of the present invention can be applied.

[0459] The electronic device 6500 shown in Figure 20A is a portable information terminal that can be used as a smartphone.

[0460] The electronic device 6500 includes a housing 6501, a display unit 6502, a power button 6503, a button 6504, a speaker 6505, a microphone 6506, a camera 6507, and a light source 6508, etc. The display unit 6502 has a touch panel function.

[0461] A display device according to one aspect of the present invention can be applied to the display unit 6502.

[0462] Figure 20B is a schematic cross-sectional view of the housing 6501, including the end on the microphone 6506 side.

[0463] A light-transmitting protective member 6510 is provided on the display side of the housing 6501, and the display panel 6511, optical member 6512, touch sensor panel 6513, printed circuit board 6517, battery 6518, etc. are arranged in the space enclosed by the housing 6501 and the protective member 6510.

[0464] The protective member 6510 is fixed to the display panel 6511, the optical member 6512, and the touch sensor panel 6513 by an adhesive layer (not shown).

[0465] Furthermore, a portion of the display panel 6511 is folded back in the area outside the display unit 6502. The FPC 6515 is connected to this folded portion. IC 6516 is mounted on the FPC 6515. The FPC 6515 is also connected to terminals provided on the printed circuit board 6517.

[0466] For example, a flexible display panel can be applied to the display panel 6511. This makes it possible to realize an extremely lightweight electronic device. Also, because the display panel 6511 is extremely thin, it is possible to incorporate a large-capacity battery 6518 while keeping the thickness of the electronic device low. Furthermore, by folding back a part of the display panel 6511 and placing the connection part with the FPC 6515 on the back of the pixel area, a narrow-bezel electronic device can be realized.

[0467] This embodiment can be appropriately combined with other embodiments shown in this specification.

[0468] (Embodiment 7) This embodiment describes an electronic device equipped with a display device manufactured using one aspect of the present invention.

[0469] The electronic device described below is equipped with a display device according to one embodiment of the present invention in its display unit. Therefore, it is an electronic device that achieves high resolution. Furthermore, it is possible to create an electronic device that achieves both high resolution and a large screen.

[0470] One aspect of the present invention comprises a display device and at least one of the following: an antenna, a battery, a housing, a camera, a speaker, a microphone, a touch sensor, and an operation button.

[0471] An electronic device according to one aspect of the present invention may have a secondary battery, and it is preferable that the secondary battery can be charged using contactless power transmission.

[0472] Examples of secondary batteries include lithium-ion secondary batteries such as lithium polymer batteries (lithium-ion polymer batteries) that use a gel-like electrolyte, nickel-metal hydride batteries, nickel-cadmium batteries, organic radical batteries, lead-acid batteries, air secondary batteries, nickel-zinc batteries, and silver-zinc batteries.

[0473] An electronic device according to one aspect of the present invention may have an antenna. By receiving a signal with the antenna, the display unit can display images, information, etc. Furthermore, if the electronic device has an antenna and a secondary battery, the antenna may be used for contactless power transmission.

[0474] The display unit of an electronic device according to one aspect of the present invention can display video having a resolution of, for example, Full HD, 4K2K, 8K4K, 16K8K, or higher.

[0475] Examples of electronic devices include those with relatively large screens, such as television sets, notebook computers, monitors, digital signage, pachinko machines, and game consoles, as well as digital cameras, digital video cameras, digital photo frames, mobile phones, portable game consoles, personal digital assistants, and audio playback devices.

[0476] An electronic device to which one aspect of the present invention is applied can be incorporated along a flat or curved surface of the interior or exterior walls of a house or building, the interior or exterior of an automobile, etc.

[0477] Figure 21A shows the external appearance of the camera 8000 with the viewfinder 8100 attached.

[0478] The camera 8000 includes a housing 8001, a display unit 8002, operation buttons 8003, a shutter button 8004, etc. The camera 8000 also has a detachable lens 8006 attached.

[0479] The camera 8000 may have the lens 8006 and the housing integrated into a single unit.

[0480] Camera 8000 can take an image by pressing the shutter button 8004 or by touching the display unit 8002, which functions as a touch panel.

[0481] The housing 8001 has a mount with electrodes, and in addition to the viewfinder 8100, a strobe device and the like can be connected to it.

[0482] The viewfinder 8100 includes a housing 8101, a display unit 8102, buttons 8103, etc.

[0483] The housing 8101 is attached to the camera 8000 by a mount that engages with the camera 8000's mount. The viewfinder 8100 can display images and other data received from the camera 8000 on the display unit 8102.

[0484] Button 8103 functions as a power button, etc.

[0485] A display device according to one embodiment of the present invention can be applied to the display unit 8002 of the camera 8000 and the display unit 8102 of the viewfinder 8100. The camera 8000 may also have a built-in viewfinder.

[0486] Figure 21B shows the external appearance of an information terminal 5900, which is an example of a wearable device. The information terminal 5900 includes a housing 5901, a display unit 5902, operation buttons 5903, an operating element 5904, a band 5905, and the like.

[0487] By applying the display device described in the above embodiment, the wearable terminal can display images with high display quality in the display unit 5902.

[0488] Figure 21C shows the external appearance of a portable game console 5200, which is an example of a game console. The portable game console 5200 has a casing 5201, a display unit 5202, buttons 5203, etc.

[0489] Furthermore, the video output from the 5200 portable game console can be displayed on display devices such as television systems, personal computer displays, game displays, and head-mounted displays.

[0490] By applying the display device described in the above embodiment to the portable game console 5200, the display unit 5202 can display images with high display quality. Furthermore, a portable game console 5200 with low power consumption can be realized. In addition, because the low power consumption reduces heat generation from the circuit, the impact of heat on the circuit itself, peripheral circuits, and modules can be reduced.

[0491] Figure 22A shows the external appearance of the head-mounted display 8200.

[0492] The head-mounted display 8200 includes a mounting section 8201, lenses 8202, a main unit 8203, a display unit 8204, a cable 8205, etc. The mounting section 8201 also has a built-in battery 8206.

[0493] Cable 8205 supplies power from battery 8206 to main unit 8203. Main unit 8203 is equipped with a wireless receiver and can display received video information on display unit 8204. In addition, main unit 8203 is equipped with a camera and can use information about the user's eyeball or eyelid movements as an input means.

[0494] Furthermore, the attachment unit 8201 may be provided with multiple electrodes at a position that touches the user, capable of detecting the current flowing in accordance with the user's eye movements, and may have a function to recognize the user's gaze. It may also have a function to monitor the user's pulse rate based on the current flowing through the electrodes. In addition, the attachment unit 8201 may have various sensors such as a temperature sensor, a pressure sensor, and an acceleration sensor, and may have a function to display the user's biometric information on the display unit 8204, or a function to change the image displayed on the display unit 8204 in accordance with the user's head movements.

[0495] A display device according to one aspect of the present invention can be applied to the display unit 8204.

[0496] Figures 22B, 22C, and 22D show the external appearance of the head-mounted display 8300. The head-mounted display 8300 comprises a housing 8301, a display unit 8302, a band-shaped fixing device 8304, and a pair of lenses 8305.

[0497] The user can view the display on the display unit 8302 through the lens 8305. It is preferable to position the display unit 8302 in a curved shape, as this allows the user to experience a greater sense of presence. Furthermore, by viewing different images displayed in different areas of the display unit 8302 through the lens 8305, three-dimensional display using parallax can be performed. Note that the configuration is not limited to a single display unit 8302; two display units 8302 may be provided, with one display unit for each of the user's eyes.

[0498] Furthermore, a display device according to one embodiment of the present invention can be applied to the display unit 8302. Because the display device having the semiconductor device according to one embodiment of the present invention has extremely high resolution, even when magnified using the lens 8305 as shown in Figure 22D, the user cannot see the pixels, and a more realistic image can be displayed.

[0499] This embodiment can be appropriately combined with other embodiments shown in this specification. [Explanation of Symbols]

[0500] KKB: Opening, 100: Display device, 101: Substrate, 102: Substrate, 111: Insulator, 112: Insulator, 112a: Insulator, 112b: Insulator, 113: Insulator, 113a: Insulator, 113b: Insulator, 113c: Insulator, 116: Insulator, 117: Insulator, 121: Conductor, 121a: Conductor, 121b: Conductor, 121c: Conductor, 122: Conductor, 126: Conductor, 131_1: Resin, 131_2: Resin, 132_1: Resin, 132_2: Resin, 133: Protective layer, 141: EL layer, 141A: EL layer, 141a: EL layer, 141B: EL layer, 14 1b: EL layer, 141c: EL layer, 142: EL layer, 150: Light-emitting device, 150a: Light-emitting device, 150b: Light-emitting device, 150c: Light-emitting device, 161: Resin layer, 162a: Colored layer, 162b: Colored layer, 162c: Colored layer, 163: Black matrix, 170: Transistor, 171: Element isolation layer, 172a: Low resistance region, 172b: Low resistance region, 173: Semiconductor region, 174: Insulator, 175: Conductor, 500: Transistor, 503: Conductor, 503a: Conductor, 503b: Conductor, 512: Insulator, 514: Insulator, 516: Insulator Body, 522: Insulator, 524: Insulator, 530: Oxide, 530a: Oxide, 530b: Oxide, 530ba: Region, 530bb: Region, 530bc: Region, 540: Conductor, 540a: Conductor, 540b: Conductor, 541: Insulator, 541a: Insulator, 541b: Insulator, 542: Conductor, 542a: Conductor, 542b: Conductor, 544: Insulator, 550: Insulator, 550a: Insulator, 550b: Insulator, 552: Insulator, 554: Insulator, 560: Conductor, 560a: Conductor, 560b: Conductor, 571: Insulator, 571a: Insulator, 571b: Insulator Edge body, 574: insulator, 576: insulator, 580: insulator, 581: insulator, 4400a: light-emitting unit, 4400b: light-emitting unit, 4411: light-emitting layer, 4412: light-emitting layer, 4413: light-emitting layer, 4420: layer, 4430: layer, 4440: intermediate layer, 5200: portable game console, 5201: housing, 5202: display unit, 5203: button, 5900: information terminal, 5901: housing, 5902: display unit, 5903: operation button, 5904: control unit, 5905: band, 6000: display module, 6001: upper cover, 6002: lower cover, 6005: FPC,6006: Display device, 6009: Frame, 6010: Printed circuit board, 6011: Battery, 6015: Light-emitting part, 6016: Light-receiving part, 6017a: Light guide part, 6017b: Light guide part, 6018: Light, 6500: Electronic device, 6501: Housing, 6502: Display unit, 6503: Power button, 6504: Button, 6505: Speaker, 6506: Microphone, 6507: Camera, 6508: Light source, 6510: Protective component, 6511: Display panel, 6512: Optical component, 6513: Touch sensor panel, 6515: FPC, 6516: IC, 6517: Printed circuit board, 6518: Battery, 8000: Camera, 8001: Housing, 8002: Display unit, 8003: Operation buttons, 8004: Shutter button, 8006: Lens, 8100: Viewfinder, 8101: Housing, 8102: Display unit, 8103: Buttons, 8200: Head-mounted display, 8201: Mounting unit, 8202: Lens, 8203: Main unit, 8204: Display unit, 8205: Cable, 8206: Battery, 8300: Head-mounted display, 8301: Housing, 8302: Display unit, 8303: Operation buttons, 8304: Fixing device, 8305: Lens, 8306: Dial, 8307: Dial, 8308: Drive unit, 8310: User, 8311: User

Claims

1. A method for manufacturing a display device having a first insulator, a second insulator, a third insulator, a first conductor, a second conductor, a first EL layer, and a second EL layer, The process comprises steps 1 through 12, The first step includes the step of forming the first conductor on the first insulator, The second step comprises the step of forming the second insulator on the first insulator and on the first conductor, The third step includes a step in which a first opening reaching the first conductor is formed in the region of the second insulator in which the second insulator overlaps with the first conductor, The fourth step includes forming a sacrificial layer on the second insulator and on the first conductor located at the bottom surface of the first opening, The fifth step comprises a step of applying a photoresist onto the sacrificial layer, The sixth step includes exposing and developing the photoresist, thereby forming a second opening with an inverse tapered structure that reaches the sacrificial layer in the region of the photoresist superimposed on the first conductor, The seventh step comprises a region of the sacrificial layer located at the bottom surface of the second opening that overlaps the first opening and a region that overlaps the second insulator, wherein a third opening is formed that reaches the first conductor located at the bottom surface of the first opening and the second insulator. The eighth step includes the step of forming the first EL layer on the photoresist, on the sacrificial layer, and on the first conductor, The ninth step includes removing the photoresist, the sacrificial layer, and the first EL layer formed on the upper surfaces of the photoresist and the sacrificial layer, respectively. The tenth step includes the step of forming the second EL layer on the first EL layer and on the second insulator, The 11th step includes the step of forming the second conductor on the second EL layer, The 12th step includes the step of forming the third insulator on the second conductor. Method for manufacturing a display device.

2. A method for manufacturing a display device having a first insulator, a second insulator, a third insulator, a first conductor, a second conductor, a first EL layer, and a second EL layer, The process comprises steps 1 through 12, The first step includes the step of forming the first conductor on the first insulator, The second step comprises the step of forming the second insulator on the first insulator and on the first conductor, The previous third step is, The steps include forming a first opening that reaches the first conductor in a region of the second insulator where the second insulator overlaps with the first conductor, The method includes the step of forming a fourth opening in a region of the second insulator where the second insulator does not overlap with the first conductor, but overlaps with the first insulator, The fourth step includes forming a sacrificial layer on the second insulator and on the first conductor located at the bottom surface of the first opening, The fifth step comprises a step of applying a photoresist onto the sacrificial layer, The sixth step includes exposing and developing the photoresist, thereby forming a second opening with an inverse tapered structure that reaches the sacrificial layer in a region of the photoresist that overlaps the first conductor and the fourth opening, The seventh step comprises a region of the sacrificial layer located on the bottom surface of the second opening that overlaps the first conductor and the second insulator, in which a third opening is formed that reaches the first conductor and the second insulator located on the bottom surface of the first opening, and whose side surface overlaps the bottom surface and / or side surface of the fourth opening, The eighth step includes the step of forming the first EL layer on the photoresist, on the sacrificial layer, and on the first conductor, The ninth step includes removing the photoresist, the sacrificial layer, and the first EL layer formed on the upper surfaces of the photoresist and the sacrificial layer, respectively. The tenth step includes the step of forming the second EL layer on the first EL layer, on the second insulator, and on the fourth opening, The 11th step includes the step of forming the second conductor on the second EL layer, The 12th step includes the step of forming the third insulator on the second conductor. Method for manufacturing a display device.

3. In claim 1 or claim 2, The first EL layer comprises either a hole transport layer or an electron transport layer, and an emissive layer. The second EL layer has the other of the hole transport layer or the electron transport layer. Method for manufacturing a display device.

4. In any one of claims 1 to 3, It comprises a 13th step and a 14th step, The 13th step includes the step of forming a resin layer on the third insulator, The 14th step includes a step of bonding a substrate onto the resin layer. Method for manufacturing a display device.

5. In claim 4, The substrate has a colored layer, In the 14th step, the substrate is bonded to the resin layer at the position where the colored layer is superimposed on the first EL layer. Method for manufacturing a display device.

6. It comprises a first insulator, a second insulator, a third insulator, a first conductor, a second conductor, a first EL layer, and a second EL layer. The first conductor is located on the first insulator, The second insulator is located on the first insulator and on the first conductor, The second insulator is A first opening that reaches the first conductor is located in a region where the second insulator overlaps with the first conductor, The second insulator does not overlap with the first conductor, and has a fourth opening located in a region where it overlaps with the first insulator, The first EL layer is located on the second insulator and on the first conductor located at the bottom surface of the first opening. The second EL layer is located on the first EL layer, on the second insulator, and above the first insulator located at the bottom surface of the fourth opening. The second conductor is located on the second EL layer, The third insulator is located on the second conductor, Display device.

7. In claim 6, The first EL layer comprises either a hole transport layer or an electron transport layer, and an emissive layer. The second EL layer has the other of the hole transport layer or the electron transport layer. Display device.

8. In claim 6 or claim 7, It has a resin layer and a substrate, The resin layer is located on the third insulator, The substrate is located on the resin layer, Display device.

9. In claim 8, The substrate has a colored layer in a position superimposed on the first EL layer. Display device.

10. A display device according to any one of claims 6 to 9, and a housing, electronic equipment.

Images