Wireless frequency switch driver

Abstract

An RF switching circuit for switching RF signals, the RF switching circuit including one or more RF switch drivers and one or more RF switches, the RF switch driver configured to drive the one or more RF switches by providing power to the one or more RF switches, the RF switch driver including an isolated gate driver including one or more inputs, one or more outputs, and electrical isolation between an input circuit and an output circuit of the isolated gate driver, the RF switch driver receiving an input signal indicating when the one or more RF switches should be turned on and / or off, and in response sending an appropriate signal at an appropriate voltage to the one or more RF switches to turn those switches on or off according to the input signal.

Description

Technical Field

[0001] The present invention relates to a radio frequency (RF) switch driver and an RF switching circuit for switching one or more antennas between a receive mode and a transmit mode. The present invention also relates to a method of driving one or more RF switches and a method of switching the state of one or more antennas.

Background Art

[0002] Radio frequency (RF) switches, also known as microwave switches, are used to route high-frequency signals in various types of circuits. RF switches are either electromechanical switches or solid-state switches based on semiconductor technology. Solid-state switches function similarly to electromechanical switches but do not contain moving parts. Instead, they may include MOSFETs (metal-oxide-semiconductor field-effect transistors) or PIN (positive-intrinsic-negative) solid-state devices. A PIN diode is composed of a region of intrinsic (I) or undoped semiconductor material sandwiched between an N-doped region and a P-doped region. In the case of high-frequency signals, they essentially function as variable resistors, and the impedance varies depending on the applied bias. In the "off" state, the PIN diode essentially functions as an open circuit to RF signals, but in the "on" state, the PIN diode has a low impedance, sometimes as low as about 1 ohm, and can pass high-frequency signals. PIN diodes are well known in the art to be suitable for RF switches because they have these characteristics with relatively fast switching times compared to electromechanical switches.

[0003] RF switches can be used in combination with power amplifiers in various RF circuits. Power amplifiers (PAs) are used in a variety of applications to amplify RF signals transmitted to electronic components. These components may include, but are not limited to, antennas used in satellite communications. An antenna may be, for example, a phased array antenna containing multiple antenna elements that enable beam steering. In an antenna used for both transmitting and receiving signals, one amplifier may be used to amplify the transmitted signal sent to the antenna, and another amplifier, such as a Low Noise Amplifier (LNA), may be used to amplify the signal received by the same antenna.

[0004] RF frequency typically refers to any signal that can be transmitted / received by an antenna, ranging from approximately 30 kHz to 300 GHz, and even further from 30 Hz to 300 GHz if very low frequency radio waves are included.

[0005] Many PA boards for operating antennas that both transmit and receive RF signals utilize a common architecture, where the antenna is connected to an RF switch that switches between a power amplifier (PA) and a low-noise amplifier (LNA) during the transmit and receive phases. One example is shown in UK patent application GB2578926A. The RF switch is controlled by applying voltages of different polarities to its input. Therefore, the RF switch driver circuit must apply the correct voltage to the RF switch input at the correct timing. These RF switch driver circuits can be complex, requiring many different components and multiple voltage sources. They also need to be able to drive the RF switch so that it switches very quickly while avoiding short circuits. In some implementations, the length of a typical transmit / receive (Tx / Rx) pulse for a particular antenna circuit can be between 100μs and 250μs, meaning the RF switch needs to switch between the PA and LNA very quickly. Even with the use of PIN diodes, the RF switch driver and RF switch combination is the slowest part of the entire switching circuit, with a switching time of approximately 460ns.

[0006] The embodiments described below are not limited to implementations that resolve any or all of the shortcomings of the known methods described above. [Overview of the project]

[0007] This summary is provided to illustrate in a simplified form the selection of concepts that will be further described in the detailed description below. This summary is not intended to identify the main or basic features of the claimed subject matter, nor is it intended to be used to determine the scope of the claimed subject matter. Modifications and alternative features used to facilitate the implementation of the invention and / or to achieve substantially similar technical effects are deemed to fall within the scope of the invention disclosed herein.

[0008] In a first embodiment, the disclosure provides an RF switch driver for powering and driving one or more RF switches, wherein the RF switch driver includes an isolated gate driver. Thus, in one embodiment, the isolated gate driver is used in a situation significantly different from the intended use of the isolated gate driver.

[0009] The RF switch driver receives periodic switching signals indicating when one or more RF switches should be turned on and / or off. Arranged to The RF switch driver may also be configured to transmit an output in response to one or more RF switches at an appropriate voltage to turn the switches on or off based on the state of the input signal.

[0010] Furthermore, here is a method for supplying voltage and current to one or more RF switches to supply an RF signal to one or more components, wherein a periodic switching signal is received. composition The method is also provided, which includes the step of driving the RF switch via an isolated gate driver.

[0011] Here, we also provide an RF switching circuit that includes an isolated gate driver and one or more RF switch drivers, which include one or more RF switches.

[0012] An RF switching circuit for supplying signals to multiple components, including an isolated gate driver, arranged in parallel. (arranged in parallel) To drive multiple RF switches and switch RF signals to each of multiple components composition It may also include an RF switch driver.

[0013] In a specific implementation of the switching circuit, a system is provided to switch one or more antennas between a transmit mode and a receive mode, wherein the RF signal is amplified during the transmit mode and the receive mode of the antenna. composition The system includes a power amplifier and a low-noise amplifier for each antenna, and an RF switching circuit, wherein the RF switching circuit connects one of the amplifiers to one or more antennas during each transmit mode and receive mode. composition A system is also provided which includes one or more RF switches for each antenna, and first and second RF switch drivers connected to the one or more RF switches to drive the one or more RF switches during each transmit mode and receive mode.

[0014] Each RF switch driver may be connected to multiple RF switches.

[0015] The apparatus and methods described here utilize isolated gate drivers in ways not previously considered. Isolated gate drivers are used in high-power applications where safety is paramount and is ensured by isolation between the low-voltage control circuit and the high-voltage output. Several implementations described below take advantage of other benefits offered by isolated gate drivers, such as the elimination of the requirement for a specific power supply voltage. For example, there is no need to switch between 0V and ground.

[0016] In some implementations, the RF switch driver circuit can drive more RF switches than before, for example, more than 100 RF switches. The RF switch driver circuit can also be space-efficient and / or require a minimal number of components.

[0017] As will be apparent to those skilled in the art, the optional features can be combined as needed and can be combined with any aspect of the present invention. Embodiments of the present invention will be described by reference to the following drawings, for example.

Brief Description of the Drawings

[0018] [Figure 1] Schematic diagram of a system for switching an antenna between a transmission mode and a reception mode according to some embodiments of the present invention. [Figure 2] Schematic diagram of two RF switch drivers connected to an RF switch according to an embodiment of the present invention. [Figure 3] Schematic diagram of a system for switching modes of multiple antennas between transmission and reception according to some embodiments of the present invention. [Figure 4] Schematic diagram of a system for using multiple RF switch drivers in combination with an RF switch for RF test automation. [Figure 5] Electrical circuit diagram of the system of FIG. 1 according to some embodiments of the present invention. [Figure 6] Electrical circuit diagram of an RF switch driving circuit according to some embodiments of the present invention. [Figure 7] Electrical circuit diagram of a prior art RF switch. [Figure 8] Flowchart of steps performed by the system of FIG. 1 according to some embodiments of the present invention. Common reference numerals are used throughout the drawings to represent similar features.

Best Mode for Carrying Out the Invention

[0019] Embodiments of the present invention are described below by way of example only. These examples represent the best mode known to the applicant for carrying out the present invention, but are not the only way to achieve this. In this description, the functions of this example and a series of steps for constructing and operating this example are described.

[0020] Some embodiments of the present invention include an RF switch driver for driving one or more RF switches used to switch RF signals with an antenna on a satellite, and a method of supplying power to the RF switches. The signal itself from the RF switch driver to the RF switch is not inherently an RF signal, but in an example where the RF switch needs to operate at a high frequency, the RF switch itself may operate at a frequency high enough to be within the radio frequency range. The antenna is used on a satellite in various situations, such as communication for imaging the Earth using synthetic aperture radar. An example of a device on a satellite according to some embodiments of the present invention will be described with reference to FIG. 1. The same configuration and principle of operation used in this example can also be applied to other RF switching applications and situations.

[0021] Note that such functions are not specific to satellites or satellite operations, and may be common to general RF switching unless otherwise specified.

[0022] FIG. 1 shows a schematic diagram of a system 100 for switching an antenna 110 between a transmit mode and a receive mode according to some embodiments of the present invention. The thick solid arrows between components are used to indicate RF signal connections, the bright solid arrows are used to indicate power connections, and the dotted arrows are used to indicate data connections. In practice, the system 100 and the antenna 110 may be located on a satellite, but similar systems may also be used on airplanes, ships, land vehicles, and static locations on the ground.

[0023] The components shown in Figure 1 include a first RF switch driver 155 and a second RF switch driver 156, the outputs of which are connected to terminals on the RF switch 170. In one example, the RF switch 170 is a single-pole double-throw (SPDT) switch that switches between a transmit mode in which an RF signal 121 is sent to the antenna 110 via a signal path 113, and a receive mode in which the signal received from the antenna 110 is sent to a low-noise amplifier (LNA) 130 via a signal path 131. A control signal 112 (e.g., a transmit / receive pulse train) from the computer system 140 indicates to the circuit when to transmit to the antenna 110 and when to receive from the antenna 110. The RF switch driver 155 supplies a power signal 180 to the RF switch 170, and the RF switch driver 156 supplies a power signal 181 to the RF switch 170. The inverter 111 inverts the control signals such that when the RF switch driver 155 receives a signal to turn on one side of the RF switch 170 (for example, in transmit mode), the RF switch driver 165 receives the opposite (inverted) signal to turn off that side of the RF switch 170 (for example, in receive mode), and vice versa.

[0024] Other components shown in Figure 1 include a power amplifier (PA) 120 and a low-noise amplifier (LNA) 130 connected to the RF switch 170. The PA 120 is used to amplify the RF signal 122 from the RF divider 143, which is used when the antenna 110 is in transmit mode. The LNA 130 is used to amplify the RF signal 131 from the antenna 110 during receive mode. Once amplified, the LNA 130 outputs the received signal 114 to the RF combiner 145 for further signal processing (not shown). The PA 120 is driven by a power amplifier (PA) driver 107, and the LNA 130 is driven by an LNA driver 108. The PA driver 107 has an output 116 to the PA 120, and the LNA driver circuit 108 has an output 118 to the LNA 130. In some embodiments, the PA driver circuit 107 may be the same as the LNA driver circuit 108. The RF switch 170 comprises two separate solid-state switches (not shown), one for conducting the RF signal 121 from PA120 to antenna 110, and the other for returning the RF signal 113 from antenna 110 to LNA130.

[0025] System 100 further includes a second inverter 111. The inverter 111 is intended to invert the control signals 112 from the computer system 140 to the RF switch driver 156 (signal 115) and the LNA driver 108 (signal 115) for the signals output to the RF switch driver 155 and PA 120. However, it can be seen that the inverter 111 could instead be placed before the RF switch driver 155. Note that Figure 1 excludes timing and delay components (e.g., dead time generators) that could be used in such a system 100.

[0026] In one example, the antenna is mounted on a satellite in low Earth orbit as part of a synthetic aperture radar system used for Earth imaging. In such a system, the transmit / receive pulses can be very short, and it is desirable to have fast switching between each cycle. For example, the length of a typical transmit / receive cycle may be between 100 μs and 250 μs.

[0027] For example, antenna 110 is an antenna for transmitting / receiving synthetic aperture radio (SAR) waves to image the Earth. X-band radio waves in the 8GHz-12GHz range can be used for this purpose. SAR imaging can also be performed using C-band (4-8GHz), S-band (2-4GHz), L-band (12GHz), and P-band (0.3-1GHz) frequencies. Generally, SAR imaging can be performed at frequencies from 300MHz to 300GHz.

[0028] The term “computer system” is used herein to refer to any device or group of devices having processing capabilities capable of executing instructions. As those skilled in the art will know, such processing capabilities can be incorporated into many different devices, and therefore the term “computing system” as used herein will be understood to include PCs, servers, mobile communication devices, and many other devices.

[0029] The satellite may include one or more RF antennas 110, such as radar antennas, located on one or more wings 106. Each antenna or each antenna element 110 may have associated PAs 120 and LNAs 130, which are powered via amplifier drive circuits 107 and 108.

[0030] Figure 2 is a schematic block diagram showing RF switch drive circuits 155 and 156 of system 100 (similar to circuits 107 and 108 in Figure 1) according to an embodiment of the present invention. The RF switches 155 and 156 are arranged in series. (arranged in series)It can be seen that the RF switch 170 comprises three components: a dead time generator 202, an isolated gate driver 210, and a power switch 220. It can also be seen that the RF switch 170 includes two switches 171 and 172. In one example, switch 170 is a single-pole double-throw (SPDT) switch. Switch 171 receives a power signal 180 from the power switch 220 of the RF switch driver 155, and switch 172 receives a power signal 181 from the power switch 220 of the RF switch driver 156.

[0031] Referring back to Figure 1, antenna 110 can only ever be in either transmit mode or receive mode. In transmit (or transmit) mode, computer system 140 sends an "on" signal to RF switch driver 155 and PA driver 107. The PA driver 107 turns on PA 120, and the RF switch driver 155 drives (i.e., turns on) RF switch 170, so that RF signal 121 is passed to antenna 110 via RF signal 113. Inverter 111 inverts the signals so that RF switch driver 156 and LNA driver 108 receive an "off" signal, and RF switch driver 155 and PA driver 107 receive an "on" signal. In this case, RF switch 170 does not pass signal 113 from antenna 110 to LNA 130.

[0032] During reception mode, the computer system 140, along with the PA driver 108, sends an "on" signal to the RF switch driver 156. The LNA driver 108 turns on the LNA 130, and the RF switch driver 156 drives (i.e., turns on) the RF switch 170, so that the RF signal 113 is passed to the LNA 130 via the RF signal 131. Since the signal 115 received by the LNA driver 108 and the RF switch 156 is inverted, the RF switch driver 155 and the LNA driver 107 receive an "off" signal. In this case, the RF switch 170 does not allow the signal 121 to pass from the PA 120 to the antenna 110. Thus, during a complete transmit / receive pulse, the antenna 110 switches between transmit mode and receive mode (or vice versa), and this cycle is repeated with the next transmit / receive signal.

[0033] The dead time generator 202 has the function of generating a dead time for switching the transmit / receive phase of the antenna 110, as described below, and preventing a short circuit through the RF switch 170 circuit.

[0034] Isolated gate drivers 210, used in power supply circuits and motor drives, are well-known in the industry. In these applications, isolated gate drivers are used to supply the voltage and drive current required to turn the power switches used in these circuits on and off. For example, they can be used to apply the appropriate voltage and drive current to the gates of power transistors such as IGBTs (isolated gate bipolar transistors) and power MOSFETs (metal oxide semiconductor field-effect transistors). An example of an isolated gate driver is the Texas Instruments model UCC21520AQDWRQ1. The CC21520AQDWRQ1 model is a two-channel isolated gate driver with dual inputs, disable, dead time, and 8V UVLO (undervoltage lockout). An isolated gate driver typically includes one or more inputs, one or more outputs, and electrical isolation between the input and output circuits of the isolated gate driver. Isolated gate drivers are designed to operate high-power and / or high-voltage transistors, as seen in high-power converters and electric motors.

[0035] In electrical circuits, isolation refers to separating different functional sections of a circuit so that there are no direct conductive electrical connections between them. For example, for safety reasons, it may be important to electrically isolate the high-voltage side of a power supply circuit from a low-voltage control circuit that requires human intervention. Various parts of a circuit can communicate with each other through capacitive, inductive, or optical means. While the RF signals used in this invention are not always strong enough to necessitate the use of an isolated gate driver, integrating an isolated gate driver within an RF switch driver offers several remarkable advantages. For example, an RF switch driver can switch between any two voltages, allowing it to be used with a wide variety of RF switches while maintaining very good switching times. Without such a gate driver, an RF switch driver would always switch between 0V (ground) and any other arbitrary voltage.

[0036] Isolated gate drivers are typically rated for much higher power and current than what is usually required for switching RF switches, so it's not obvious that they should be used as is. However, in RF applications where a single RF switch driver can drive multiple switches, the higher power capability is actually an advantage. This configuration is particularly useful, for example, in phased array antennas, where a separate RF switch is required for each phase / patch element of the antenna, and many of these are timed to be driven by a single RF switch driver.

[0037] A schematic diagram of such a system 200 is shown in Figure 3, in which a pair of RF switch drivers (155 and 156 in Figures 1 and 2, respectively, in transmit and receive modes) can drive multiple RF switches 170, and if each RF switch 170 is connected to one antenna patch element 600, then using isolated gate drivers 210 for RF switch drivers 155 and 156, more than 100 RF switches 170 can be driven by just one pair of RF switch drivers 155 and 156.

[0038] In another embodiment, as shown in System 300 of Figure 4, RF switch drivers 155 and 156 can be used to drive RF switches in applications involving automated testing of high-frequency RF components. This figure illustrates an example of a system that supplies, collects, and analyzes RF signals to and from multiple devices under test (DUTs). Such a system can be used, for example, in research and development, product development, and quality control. System 300 comprises multiple RF switch drivers as described herein and is configured to drive multiple RF switches arranged in parallel to collect signals from each of multiple components, in this example, from the device under test. Multiple devices can be tested simultaneously, with the output of each device under test 700 (DUT) connected to the input of a test device such as a VNA (Vector Network Analyzer) 710.

[0039] In the example in Figure 4, a vector network analyzer 710 is used to analyze RF frequency signals from multiple devices under test (DUTs) 700. The vector network analyzer 710 supplies test signals 790 to one or more DUTs 700 via a signal generator 770. Although the signal generator 770 is shown as a separate device from the vector network analyzer 710 in this example, it can also be integrated into the vector network analyzer 710. RF switch drivers 155 and 156, controlled by control signal 112, are used to select pairs of DUTs 700 via RF switches 170. In this example, RF switch 170 may be an SPDT switch. In other examples of similar applications, the RF switch may be another type of RF switch, such as a single-pole single-throw (SPST) RF switch or a double-pole double-throw (DPDT) RF switch. In one example, RF switch 170 may be an RF PIN diode switch.

[0040] RF switch drivers 755 and 756 are controlled by control signal 712 and select between groups of DUTs by switching other RF switches 170. RF switch drivers 765 and 766 are controlled by control signal 722 and make a final selection via other RF switches 170 before signals from the selected DUT 700 are supplied to the vector network analyzer 710. In this way, multiple DUTs 700 can be connected and analyzed by one vector network analyzer 710 without disconnecting one DUT 700 and connecting another DUT to the vector network analyzer 710. Control signals 112, 712, and 722 come from a computer (not shown) and can control and select which DUT 700 is tested at a given time. System 300 can sequentially test each DUT 700 by sending appropriate control signals to RF switch drivers 155, 156, 755, 756, 765, and 766. Alternatively, System 300 can repeatedly cycle through each DUT 700, dedicating a "time slice" to testing each DUT 700. System 300 has the advantage of facilitating comparison of the output signals of multiple DUT 700s and identifying outliers or non-compliant DUTs. In this example, eight DUTs under test are shown, but it can be seen that more (or fewer) DUTs can be mounted in a similar manner (as shown by the three vertical dots). It can also be seen that additional RF switches and RF switch drivers can be added in a similar manner (as shown by the three horizontal dots) to match the number of DUTs under test.

[0041] Using a different type of RF switch (e.g., DPDT) as RF switch 170 may allow combining signals from multiple DUTs 700 rather than selecting only a single DUT. RF switch drivers, including isolated gate drivers, also offer the advantage of improved isolation on the RF board, even though they are not designed for use in RF circuits. This has the benefit of reducing noise on the RF board, potentially leading to improved signal quality. Other RF applications that would benefit from using RF switch drivers with isolated gate drivers will be obvious to those skilled in the art.

[0042] Figure 5 shows an electrical circuit diagram 400 of some components of the system 100 shown in Figure 1. The input signal 112 (from the computer system 140) is found to be split between RF switch drivers 155 and 156. However, before reaching the RF switch driver 156, the signal 122 is inverted for the signal that reaches the RF switch diver 155. In one embodiment, the inversion is achieved using an XOR gate 240, shown to perform the function of the inverter 111 in Figures 1 and 2. Both RF switch drivers 155 and 156 also receive an enable (EN) signal 250. The output 180 of the RF switch drivers is received by an RF switch 171 connected to a PA 120, as in the conventional case. Similarly, the output 181 of the RF switch driver 156 is received by an RF switch 172 connected to an LNA 130.

[0043] Figure 6 shows the electrical circuit diagram 500 of the RF switch drivers 155 and 156 shown in Figures 1 and 2. As can be seen from the figure, the circuit 500 includes an isolated gate driver 210 with an output connected to a power switch 220, and an adjustable dead time generator 202 with an output connected to the isolated gate driver 210.

[0044] In this example, the adjustable dead time generator 202 is a dual 4:1 multiplexer including a first multiplexer 205 and a second multiplexer 215. The dead time generator 202 has two outputs 320 and 330 which are input to the isolated gate driver 210. Output 320 is connected to four input pins labeled 1L0-L3 (i.e., of the first multiplexer 205) of the dead time generator 202. Pin 1L0 is connected to ground, while pins 1L1-3 are connected to a finite voltage (e.g., 5V). Output 330 is connected to four input pins labeled 2L0-3 (i.e., of the second multiplexer 205). However, pins 2L0-2 are connected to ground, and pin 2L3 is connected to a finite voltage (e.g., 5V). The isolated gate driver 210 also has outputs 350 and 360. Outputs 350 and 360 correspond to outputs 320 and 330 of the dead time generator 202. This means, for example, that if output 320 is in state (or bit) 1, then output 350 will also be in state 1.

[0045] In one embodiment, output 350 is applied to gate 362 of a P-channel MOSFET (PMOS) 370. Similarly, output 360 is applied to gate 364 of an N-channel MOSFET (NMOS) 380. The PMOS transistor 370 requires a constant voltage to be applied (indefinitely) to its gate 362. This is made possible by including an RF circuit 376 connected to pin 16 of an isolated gate driver 210, as shown in Figure 6. However, it is understood that other types of transistors can also be used.

[0046] The source terminal 375 of transistor 370 is connected to a +5V power supply, and the source terminal 385 of transistor 380 is connected to a -30V power supply. As previously mentioned, in this configuration, by using an isolated gate driver, the voltages of source terminals 375 and 385 can be selected almost arbitrarily (within the safe operating limits of system 500). In one embodiment, -30V and +5V are used. However, it is understood that almost any voltage can be selected and used. This allows the isolated driver 210 to drive different RF switches in different operating voltage ranges (for example, the voltage range is, for example, 35V, and the difference between +5V and -30V). Using an isolated gate driver in this way provides many additional unexpected advantages, such as less heat dissipation, higher efficiency, the possibility of orders of magnitude faster switching compared to conventional technology, and the use of minimal components.

[0047] Transistors 370 and 380 constitute a pair of switches arranged in series between power supplies of different voltages. The transistors share a common drain terminal 392 and form a complementary transistor circuit or switch 220. The output 180 of switch 220 is input to either RF switch 171 or 172 (see Figure 2).

[0048] Figure 7 shows a simplified functional diagram of an example of RF switch 170. In this diagram, J1, J2, and J3 are RF inputs and outputs, and B3 and B2 are control pins. Referring to Figure 2, in this example, J1 is connected to antenna 110, J2 is connected to PA 120, and J3 is connected to LNA 130. B2 is connected to RF switch driver 155, and B3 is connected to RF switch driver 156. Switch 170 is driven by receiving appropriate voltage signals from RF switch drivers 155 and 156, for example, -30V (to switch the switch "on") and +5V (to switch the switch "off") (i.e., switching "on" and "off"). An example of such an RF switch is the Macom model MASW-011071 from Massachusetts, USA. The MASW011071 is a silicon PIN diode SPDT (single-pole double-throw) RF switch designed for high-performance X-band RF applications. The Switch 170 is designed to supply a maximum transmit power of approximately 20W.

[0049] During the operation of system 100, the dead time generator 202 receives periodic switching signals (e.g., transmit / receive pulses) 172, including signals SO and S1. These signals constitute the select line inputs of the dead time generator 202. Table 1 below shows the truth table for one transmit / receive pulse of the dead time generator 202 of the present invention. [Table 1]

[0050] Therefore, depending on the state of the selected line input S0S1, the dead time generator 202 selectively couples one of the four input pins (L0-L3) to outputs 320 and 330, as shown in the table. For example, referring to Figures 1 and 6, if the selected line input is S0S1=00 at time t=0 (corresponding to the transmit / receive pulse 172 of state 0 listed in Table 1), then pin L0 of both the first multiplexer 205 and the second multiplexer 215 is selected. This means that both outputs 320 and 330 of the dead time generator 202 are 0V because both pins 1L0 and 2L0 are connected to ground. As a result, transistor 370 is activated (because it is a PMOS transistor) and transistor 380 remains inactive. Since the source terminal 375 of transistor 370 is connected to the +5V power supply, the output of system 500 (i.e., RF switch driver 155 or 156) is +5V. In this case, system 500 switches the RF switch (171 or 172 in Figure 2, depending on which switch is connected to the RF switch driver) to the "off" state, preventing the signal from passing through RF switch 171 or 172.

[0051] Subsequently, the SO state becomes state 1, and S1 remains in state 0 (corresponding to the transition state 0→1 of the transmit / receive pulse 172). In this combination, pins 1L1 and 2L1 are selected, meaning that output 320 is in state 1 and output 330 remains in state 0. This means that output 180 of system 500 is zero volts, since neither transistors 370 nor 380 are activated. As can be seen from Figure 4, the dead time generator 202 is connected to the RC circuit 395. As a result, outputs 320 and 330 remain in the S0S1=10 state for a short time before moving to the next phase (i.e., both transistors 370 and 380 are deactivated). This delay is approximately equal to the RC constant of circuit 395. In one embodiment, the RC constant is 50 ns. However, it is understood that different RC time constants can be selected by selecting appropriate capacitance and resistance in the RC circuit 395. In this case, the RF switch 171 or 172 remains in the "off" state.

[0052] After a short delay, S1 also enters state 1, so S0S1=11 (state 1 of transmit / receive pulse 172), and pins 1L3 and 2L3 are selected according to Table 1, so outputs 320 and 330 are both equal to 1. This means that transistor 370 is deactivated and transistor 380 is activated so that the output of system 500 is -30V. As a result, the system switches RF switch 171 or 172 to the ON state, and such signals can pass through RF switch 171 or 172. Referring to Figure 2, when system 500 is connected to RF switch 171, antenna 110 switches to transmit mode (inverter 111 turns RF switch 172 "off"), and when system 500 is connected to RF switch 172, antenna 110 switches to receive mode (inverter 111 turns RF switch 171 "off").

[0053] Therefore, it can be seen that the dead time generator 202 is intended to generate a dead time between the switching of the two switches 171 and 172 so that the RF switches 171 and 172 do not turn "on" at the same time. In the latter case, a short circuit would occur from the power amplifier 120 to the low-noise amplifier 130 via the RF switch 170. This could lead to damage to the low-noise amplifier 130 in addition to damage to the RF switch 170.

[0054] Finally, S0S1 proceeds to state 01, selecting pins 1L2 and 2L2 (a 1→0 transmit / receive 172-pulse transition). Here, since output 320 is 1 and output 330 is 0, neither transistors 370 nor 380 are activated. As a result of the RC circuit 295 of the dead time generator 202, when the dead time generator 202 receives a new transmit / receive signal 172, the circuit 500 maintains this state for a short time before repeating the entire cycle again.

[0055] Figure 8 shows a flowchart of the operation of system 100 for a single transmit / receive pulse. Referring to Figures 1 and 2, the left branch in Figure 8 shows the operation of RF switch driver 155, and the right branch shows the operation of RF switch driver 156. Note that the steps contained within the side-by-side boxes occur simultaneously. Also, the term "connected" here refers to the RF switch that transmits an RF signal to the device, and the term "disconnected" refers to the RF switch blocking the transmission of an RF signal to the device. In step 502, the computer system 140 generates a transmit / receive pulse. For the right branch, the pulse is inverted using inverter 111 in step 504. However, it is understood that inverter 111 can be in either branch.

[0056] Referring to Table 1, since the transmit / receive pulses are zero for the left branch, the RF switch driver 155 outputs -30V to the RF switch 171, turning the RF switch 171 "on". This means that in step 506a, the RF switch 171 connects the antenna 110 and the PA 120. In addition, since the PA driver 107 receives the same transmit / receive pulses, the PA driver 107 is activated, and as a result, the PA 120 is also activated (not shown). However, the RF switch driver 156 outputs +5V to the RF switch 172, turning the switch 172 "off". This makes it possible to disconnect the antenna 110 from the LNA 130 in step 506b (note that the disconnection step 506b specifically refers to the time when the RF switch driver 156 outputs +5V to the RF switch 172). Since the LNA driver 108 also receives the same (inverted) pulse, the LNA driver 108 is deactivated, and therefore the LNA 130 is also deactivated (steps are not shown). Antenna 110 is now in transmit mode.

[0057] Subsequently, the transmit / receive pulse transitions from state 0 to 1 in the left branch and from state 1 to 0 in the right branch. This means that RF switch drivers 155 and 156 output 0V to RF switches 171 and 172, respectively, switching both RF switches 155 and 156 "off". Thus, in step 508a, PA 120 is disconnected from antenna 110, and in step 508b, LNA 130 remains disconnected from antenna 110. In addition, PA 120 is deactivated, and LNA 130 remains deactivated. As previously mentioned, this transition period exists for a finite time as a result of the dead time generator 202 to protect RF switch 170 and other components of the system from short circuits. During this transition period, antenna 110 is neither in transmit mode nor receive mode. This marks the end of the first half of the transmit / receive pulse.

[0058] The transmit / receive pulse enters state 1 at the left branch and state 0 at the right branch. Therefore, the RF switch driver 155 turns RF switch 171 "off" and outputs +5V, and turns RF switch 172 "on" and outputs -30V to RF switch 172. This allows antenna 110 to remain disconnected from PA 120 in step 510a and to be connected to LNA 130 in step 510b. In addition, PA driver 120 remains deactivated, and LNA 130 is now activated. Antenna 110 is now in receive mode.

[0059] Subsequently, the transmit / receive pulse transitions from 1 to 0 for the left branch and from 0 to 1 for the right branch. This means that both RF switch drivers 155 and 156 again output 0V to RF switches 171 and 172 respectively, switching both RF switches 155 and 156 "off". In step 512a, PA 120 remains disconnected from antenna 110, and in step 512b, LNA 130 is disconnected from antenna 110. In addition, PA 120 remains deactivated, and LNA 130 is deactivated. As before, this transition period exists for a finite time as a result of the dead time generator 202 protecting RF switch 170. As before, during this period, antenna 110 is not considered to be in transmit or receive mode. This marks the end of the second (or last) half of the transmit / receive pulse.

[0060] Next, the entire process is repeated with the arrival of the next transmit / receive pulse (step 514).

[0061] It will be understood that the advantages and benefits described above may apply to one embodiment or to several embodiments. The embodiments are not limited to those that solve any or all of the problems mentioned, or that possess the advantages and benefits mentioned. Variations should be considered to fall within the scope of the invention.

[0062] A reference to an item means one or more of those items. The term "contains" is used here to indicate that an identified method step or element is included, but these steps or elements do not include an exclusive list, and the method or apparatus may contain additional steps or elements.

[0063] As used herein, the terms “component” and “system” are intended to include a computer-readable data store consisting of computer-executable instructions that, when executed by a processor, perform a specific function. Computer-executable instructions may include routines, functions, and the like. It should also be understood that a component or system may be localized on a single device or distributed across multiple devices.

[0064] Furthermore, as used herein, the term “exemplary” is intended to mean “as an example or illustration of something.”

[0065] Furthermore, regarding the extent to which the term "inclusion" is used in the detailed description or claims, since the term "inclusion" is interpreted as a transitional term within the claims, it is intended to have the same inclusiveness as the term "inclusion."

[0066] The attached diagram illustrates an exemplary method. While the method is presented and described as a series of actions performed in a specific order, it should be understood that the method is not limited by order. For example, some actions may occur in a different order than those described herein. Also, some actions may occur simultaneously with others. Furthermore, in some cases, not all calculations may be required to implement the methods described herein.

[0067] The order of steps in the methods described herein is illustrative, but these steps may be performed in any suitable order, or, where appropriate, simultaneously. In addition, steps may be added to or replaced in any method, or a single step may be removed from any method, without departing from the scope of the subject matter described herein. An aspect of any of the examples described above may be combined with an aspect of any other example described to form a further example without losing the desired effect.

[0068] The above description of preferred embodiments is presented for illustrative purposes only, and it should be understood that those skilled in the art can make various modifications. The above description includes examples of one or more embodiments. Of course, it is impossible to describe all possible modifications and changes to the above device or method for the purpose of illustrating the aforementioned embodiments, but those skilled in the art will recognize that many further modifications and substitutions of various embodiments are possible. Therefore, the embodiments described are intended to include all such modifications, changes, and variations that fall within the scope of the appended claims.

Claims

1. A system for switching between one or more antennas between transmit mode and receive mode, For each of the one or more antennas, The system includes a power amplifier and a low-noise amplifier configured to amplify the RF signal during the transmit and receive modes of the antenna, and an RF switching circuit, wherein the RF switching circuit is configured The system includes one or more RF switches, each including a first RF switch element configured to connect the power amplifier to the antenna during the transmission mode, and a second RF switch element configured to connect the low-noise amplifier to the antenna during the reception mode, and the system is The system further includes: a first RF switch driver connected to each first RF switch element of the one or more RF switches to drive the one or more RF switches during the transmit mode of each of the one or more antennas, each of which includes an isolated gate driver configured to receive periodic switching signals; and a second RF switch driver connected to each second RF switch element of the one or more RF switches to drive the one or more RF switches during the receive mode of each of the one or more antennas. system.

2. The system according to claim 1, wherein the first RF switch driver and the second RF switch driver further include a power switch connected to the output of the isolated gate driver, which periodically supplies voltage to the one or more RF switches to drive the one or more RF switches.

3. The system according to claim 2, wherein the power switch includes a P-channel (PMOS) MOSFET and an N-channel (NMOS) MOSFET.

4. The system according to claim 1, wherein the first RF switch driver and the second RF switch driver further include adjustable dead time generators connected to the inputs of the isolated gate driver, the adjustable dead time generators configured to cause a delay in the switching of one or more switches.

5. The system according to claim 4, wherein the adjustable dead time generator includes a plurality of multiplexers.

6. The system according to claim 5, wherein the multiplexer includes a 4-1 multiplexer.

7. The system according to claim 5, comprising two multiplexers.

8. The system according to claim 7, wherein at least one of the RF switches includes an RF PIN diode switch.

9. The system according to claim 7, wherein at least one of the RF switches includes one of an SPDT RF switch, a DPDT RF switch, and an SPST RF switch.

10. The system according to any one of claims 1 to 9, wherein the first RF switch driver and the second RF switch driver are connected to a plurality of RF switches.

11. The system according to any one of claims 1 to 9, wherein each of the aforementioned antennas includes a phased array antenna.

12. The system according to claim 11, wherein the phased array antenna includes a synthetic aperture radar antenna.

13. The system according to any one of claims 1 to 9, wherein each of the aforementioned antennas is mounted on a satellite.

14. The system according to any one of claims 1 to 9, wherein the antenna includes an antenna configured for synthetic aperture radar imaging.

15. The system according to any one of claims 1 to 9, further comprising a power amplifier driver for each of the power amplifiers, the power amplifier driver being configured to receive transmit / receive pulses and drive the power amplifiers.

16. The system according to any one of claims 1 to 9, further comprising a low-noise amplifier driver connected to the low-noise amplifier, wherein the low-noise amplifier driver is configured to receive transmit / receive pulses and drive the low-noise amplifier.

17. The system according to any one of claims 1 to 9, further comprising an RF divider connected to each power amplifier for supplying signals to the power amplifiers.

18. The system according to any one of claims 1 to 9, further comprising an RF combiner connected to each low-noise amplifier for receiving signals from the low-noise amplifiers, for each low-noise amplifier.

19. The system according to any one of claims 1 to 9, wherein each of the RF switches includes a first RF switch element and a second RF switch element corresponding to the transmit and receive modes, respectively.

20. The system according to claim 19, wherein the first RF switch element and the second RF switch element each include a PIN diode.

21. A method for switching the mode of one or more antennas between transmit and receive, A first RF switch driver, which includes an isolated gate driver configured to receive periodic switching signals, receives transmit / receive pulses; The steps include receiving the transmit / receive pulses by a second RF switch driver, which includes an isolated gate driver configured to receive periodic switching signals, The first RF switch element and the second RF switch element of one or more RF switches receive the outputs of the first RF switch driver and the second RF switch driver, respectively, thereby, A method comprising the steps of: each RF switch transmits an RF signal from a power amplifier to a corresponding antenna via the first RF switch element, blocking the transmission of an RF signal from the antenna to a low-noise amplifier via the second RF switch element during the first half of the transmit / receive pulse, thereby switching the antenna to transmit mode; and transmits an RF signal from the antenna to a low-noise amplifier via the second RF switch element, blocking the transmission of an RF signal from the power amplifier to the antenna via the first RF switch element during the second half of the transmit / receive pulse, wherein the first half of the transmit / receive pulse is the period during which the antenna is in transmit mode, and the second half of the transmit / receive pulse is the period during which the antenna is in receive mode.

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