Voltage source circuit

Abstract

To provide a voltage source circuit capable of outputting a supply voltage which is stable for a temperature change.SOLUTION: A voltage source circuit includes a band gap reference circuit, a reference temperature setting circuit, and a bias current supply circuit. The band gap reference circuit includes a first PNP bipolar transistor and a second PNP bipolar transistor whose bases are connected to each other and whose collectors are grounded, and outputs a supply voltage. The reference temperature setting circuit sets a reference temperature. The bias current supply circuit supplies a bias current to the bases of the first PNP bipolar transistor and the second PNP bipolar transistor based on results of comparison between the temperature of the band gap reference circuit and the reference temperature. The supply of the bias current is performed in a manner such as to reduce a non-linear component for the temperature of an emitter-to-base voltage of the first PNP bipolar transistor.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] This disclosure relates to a voltage source circuit. [Background technology]

[0002] For example, a voltage source circuit for supplying a reference voltage to a load is known as a type of analog circuit used in integrated circuits mounted on power supply ICs such as linear regulators and DC-DC converters (for example, Non-Patent Documents 1-3). [Prior art documents] [Non-patent literature]

[0003] [Non-Patent Document 1] Translated under the supervision of Kunihiro Asada and Minoru Nagata, co-authored by PR Gray, PJ Hulst, SH Levis, and RG Mayer, "Analog Integrated Circuit Design Techniques for System LSIs (Basic Edition) (Applied Edition)," Baifukan, 2004. [Non-Patent Document 2] KAREL E. KUIJK, “A precision reference voltage source,” IEEE Journal of Solid-State Circuits, vol. 8, no. 3, pp.222-226, June. 1973. [Non-Patent Document 3] Meijer, GCMeijer, “Integrated circuits and components for bandgap references and temperature transducers,” TU Delft Repositories, Mar. 1982. [Overview of the Initiative] [Problems that the invention aims to solve]

[0004] Here, FIG. 8 is an example of a voltage source circuit 1' according to the prior art. The voltage source circuit 1' includes a bandgap reference circuit. Specifically, it includes a first PNP bipolar transistor Q whose collector and base are each grounded p1p , and a second PNP bipolar transistor Q p2p . An output terminal T REFp for outputting a power supply voltage V out is connected to one end of a first resistor R 1p . A second resistor R out is connected between the output terminal T p2p and the emitter of the second PNP bipolar transistor Q 2p A third resistor R 1p is connected between the other end of the first resistor R p1p and the emitter of the first PNP bipolar transistor Q 3p The differential amplifier circuit A 1p has its non-inverting input terminal connected to a node between the first resistor R 1p and the third resistor R 3p and its inverting input terminal connected to the emitter of the second PNP bipolar transistor Q p2p A first capacitor C 1p is connected between the output terminal of the differential amplifier A out and the output terminal T 1p Also, the gate of a PMOS transistor M 1p is connected to the output terminal of the differential amplifier A [[ID=3x]] p1p The source of the PMOS transistor M p1p is connected to the power supply V DDp and the drain is connected to the output terminal T out .

[0005] In the voltage source circuit 1' having such a circuit configuration, when R 1p = R 2p holds, the power supply voltage V out at the output terminal T REFp as well as the bias currents I 1p and I 2p flowing through the first resistor R R1p and the second resistor R R2p are expressed by the following equation. TIFF0007837160000001.tif21170Nao, V EBQp1p Q is the first PNP bipolar transistor. p1p V is the emitter-base voltage, where q is the elementary charge, k is Boltzmann's constant, T is the absolute temperature, and V T (=kT / q) is the thermal voltage.

[0006] According to Non-Patent Document 3, the emitter-base voltage V of a PNP bipolar transistor is EB The reference temperature T r , mobility μ, exponent n representing the temperature characteristics of mobility μ, and first-order approximation insertion value V of the bandgap voltage at 0[K]. g0 Using this, it can be expressed by the following equation. TIFF0007837160000002.tif47170

[0007] In equation (3-1) above, the first term V EB0 is a constant term (approximately 1.2V) that does not depend on temperature T, the second term λT is a linear term with a negative slope λ with respect to temperature T, and the third term c(T) is a nonlinear term that depends on temperature T. In the voltage source circuit 1', since the second term of equation (1) above is a linear term with a positive slope with respect to temperature T, the second term of equation (3-1) can be canceled out by adjusting it so that the slope (positive value) and the slope (negative value) of the second term λT in equation (3-1) above are equal with opposite signs. At this time, equation (1) above can be transformed into the following equation. TIFF0007837160000003.tif7170

[0008] In equation (4) above, as mentioned above, the linear term with respect to temperature T is canceled out, but a nonlinear component c(T) that depends on temperature T remains. Therefore, in the voltage source circuit 1', the output terminal T out Power supply voltage V output from REFp The function exhibits a degree of nonlinear behavior with respect to temperature T, and its flatness with respect to temperature T is compromised.

[0009] At least one embodiment of this disclosure has been made in view of the above circumstances and aims to provide a voltage source circuit capable of outputting a stable power supply voltage in response to temperature changes. [Means for solving the problem]

[0010] (1) A voltage source circuit according to at least one aspect of the present disclosure solves the above problem, It includes a first PNP bipolar transistor and a second PNP bipolar transistor whose bases are connected to each other and whose collectors are grounded. , electric A bandgap reference circuit capable of outputting a source voltage, Includes a third PNP bipolar transistor with its base and collector grounded and capable of supplying a reference temperature voltage corresponding to a reference temperature from its emitter. Reference temperature setting circuit, Based on the comparison result between the temperature of the bandgap reference circuit and the reference temperature, a bias current supply circuit capable of supplying bias current to the bases of the first PNP bipolar transistor and the second PNP bipolar transistor is provided. Equipped with, The normalized emitter area ratio of the first PNP bipolar transistor, the second PNP bipolar transistor, and the third PNP bipolar transistor is set to first PNP bipolar transistor: second PNP bipolar transistor: third PNP bipolar transistor = m:1:1 (where m is a positive number), The bias current supply circuit supplies the bias current in such a way that it reduces the nonlinear component of the emitter-base voltage of the first PNP bipolar transistor with respect to temperature.

[0011] According to the embodiment of (1) above, a bias current is supplied to the bases connected to each other of the first PNP bipolar transistor and the second PNP bipolar transistor based on the comparison result between the temperature and the reference temperature. The bias current is applied in such a way that it reduces the nonlinear component of the emitter-base voltage of the first PNP bipolar transistor with respect to temperature. As a result, the power supply voltage output from the bandgap reference circuit is adjusted by the bias current, and the effects of temperature can be suppressed.

[0012] (2) In other embodiments, in the embodiment of (1) above, The bias current supply circuit is configured such that the bias current increases as the temperature difference between the temperature and the reference temperature increases.

[0013] According to the embodiment of (2) above, the nonlinear component increases as the temperature difference between the temperature and the reference temperature increases, but the nonlinear component can be reduced by adjusting the bias current to a high value, thereby effectively suppressing the effects of temperature.

[0014] (3) In other embodiments, in the embodiment of (2) above, The bias current supply circuit includes a plurality of bias current generation circuits for generating different bias currents based on the temperature difference.

[0015] According to the embodiment of (3) above, the bias current supply circuit for supplying bias current is configured to include a plurality of bias current generation circuits for generating different bias currents. This makes it possible to supply a bias current such that the nonlinear component of the emitter-base voltage of the first PNP bipolar transistor with respect to temperature is reduced by operating each bias current generation circuit based on the temperature difference between the temperature and the reference temperature.

[0016] (4) In other embodiments, in any one embodiment of (1) to (3) above, The bias current supply circuit includes a switching circuit for enabling the bias current when the temperature difference between the temperature and the reference temperature exceeds a threshold.

[0017] According to the embodiment of (4) above, when the temperature difference between the temperature and the reference temperature exceeds a threshold, and the influence of nonlinear components becomes large enough, the switching circuit activates the bias current. As a result, when the temperature difference between the temperature and the reference temperature is below the threshold, and the influence of nonlinear components is small, the supply of bias current is unnecessary, thus avoiding unnecessary energy consumption.

[0018] (5) In other embodiments, in any one embodiment of (1) to (4) above, The bias current supply circuit is, A high-temperature side bias current supply circuit for generating the bias current when the temperature is higher than the reference temperature, A low-temperature bias current supply circuit for generating the bias current when the temperature is lower than the reference temperature, Includes.

[0019] According to the embodiment of (5) above, the bias current supply circuit is configured to include a high-temperature bias current supply circuit that can operate when the temperature is on the higher side of the reference temperature, and a low-temperature bias current supply circuit that can operate when the temperature is on the lower side of the reference temperature. This makes it possible to reduce the influence of nonlinear components over a wide temperature range from high to low temperatures and realize a voltage source circuit that can provide a stable output.

[0020] (6) In other embodiments, in any one embodiment of (1) to (5) above, The reference temperature is set as the temperature at which the nonlinear component falls below a reference value.

[0021] According to the embodiment of (6) above, by supplying a bias current when the nonlinear component exceeds a reference value, the influence of the nonlinear component is reduced, and a stable output becomes possible.

[0022] (7) In other embodiments, in any one embodiment of (1) to (6) above, The bias current supply circuit includes a comparator for comparing the temperature with a reference temperature. The comparator has hysteresis characteristics.

[0023] According to the embodiment of (7) above, a hysteresis characteristic is provided to the comparator for comparing and deciding whether to supply bias current. This prevents unstable behavior such as the comparator's magnitude judgment result repeatedly switching when the temperature is close to the reference temperature, and stabilizes the output power supply voltage. [Effects of the Invention]

[0024] According to at least one embodiment of the present disclosure, a voltage source circuit capable of outputting a stable power supply voltage with respect to temperature changes can be provided. [Brief explanation of the drawing]

[0025] [Figure 1] This is a circuit diagram showing a voltage source circuit according to the first embodiment. [Figure 2] Figure 1 shows the simulation results illustrating the temperature characteristics of the power supply voltage output by the voltage source circuit. [Figure 3] This is an example of the internal circuitry of the comparator used in the bias current supply circuit 6 in Figure 1. [Figure 4] This is a circuit diagram showing a voltage source circuit according to the second embodiment. [Figure 5] Figure 4 shows the simulation results illustrating the temperature characteristics of the power supply voltage output by the voltage source circuit. [Figure 6] This is a circuit diagram showing a voltage source circuit according to the third embodiment. [Figure 7] Figure 6 shows the simulation results illustrating the temperature characteristics of the power supply voltage output by the voltage source circuit. [Figure 8] This is an example of a voltage source circuit related to the reference technology. [Modes for carrying out the invention]

[0026] Several embodiments will be described below with reference to the attached drawings. However, the dimensions, materials, shapes, relative arrangements, etc., of the components described or shown in the drawings as embodiments are not intended to limit the scope of the invention, but are merely illustrative examples.

[0027] (First Embodiment) Figure 1 is a circuit diagram showing a voltage source circuit 1A according to the first embodiment. The voltage source circuit 1A comprises a bandgap reference circuit 2, a reference temperature setting circuit 4, and a bias current supply circuit 6.

[0028] The bandgap reference circuit 2 has an output terminal T out From the power supply voltage V REF This is a circuit for outputting a signal, and the first PNP bipolar transistor Q has a normalized emitter area ratio set to m:1.p1 and the second PNP bipolar transistor Q p2 Includes the first PNP bipolar transistor Q p1 and the second PNP bipolar transistor Q p2 The bases are connected to each other, and the collectors of each are grounded.

[0029] Power supply voltage V REF Output terminal T for outputting the output. out One end of the first resistor R1 is connected to this. Output terminal T out and the second PNP bipolar transistor Q p2 A second resistor R2 is connected between the emitter of the first resistor R1 and the first PNP bipolar transistor Q. p1 A third resistor R3 is connected between the emitter and the signal. The differential amplifier circuit A1 has its non-inverting input terminal connected to a node between the first resistor R1 and the third resistor R3, and its inverting input terminal connected to the second PNP bipolar transistor Q p2 It is connected to the emitter of differential amplifier A1 and output terminal T. out A first capacitance C1 is connected between them. Also, a PMOS transistor M is connected to the output terminal of the differential amplifier A1. p1 The gate is connected to the PMOS transistor M p1 The source is the power supply V DD It is connected to the output terminal T, and the drain is at output terminal T out It connects to the network.

[0030] Reference temperature setting circuit 4 sets reference temperature T REF This is a circuit for setting the reference temperature T. REF This is a reference temperature set value relative to the temperature T of the voltage source circuit 1A (for example, the temperature of the ambient air to which the voltage source circuit 1A is exposed). The reference temperature setting circuit 4 is configured to handle such reference temperature T REF Corresponding reference voltage V TEM It is configured to generate. In Figure 1, as an example of the configuration of the reference temperature setting circuit 4, the source is the power supply voltage V DD It is connected to the first PMOS transistor M, and the gate is connected to the first PMOS transistor M p1 It is connected to the gate of the third PNP bipolar transistor Q, and the drain is connected to the third PNP bipolar transistor Qp3 The second PMOS transistor M connected to the emitter of p2 The base and collector are grounded, and a third PNP bipolar transistor Q is supplied from the drain with a reference temperature voltage corresponding to the reference temperature. p3 It is equipped with the following.

[0031] The bias current supply circuit 6 connects to the first PNP bipolar transistor Q, which constitutes the bandgap reference circuit 2. p1 and the second PNP bipolar transistor Q p2 This is a circuit for supplying bias current to the base. The bias current supplied by the bias current supply circuit 6 is supplied by the power supply voltage V output by the voltage source circuit 1' (a voltage source circuit having the same configuration as the bandgap reference circuit 2 in this embodiment) as described above (see Figure 8). REFp This is done to reduce the nonlinear component c(T) (see equation (4) above). As a result, in the voltage source circuit 1A, the power supply voltage V output from the bandgap reference circuit 2 is reduced. REF In this configuration, the nonlinear component c(T) is reduced, and a stable output is obtained with respect to temperature T.

[0032] Typically, the nonlinear component c(T) is obtained when the temperature T of the voltage source circuit 1A is equal to the reference temperature T. REF It tends to increase as it moves away from the reference temperature T. Therefore, the bias current supply circuit 6 is configured with respect to temperature T and reference temperature T. REF The system may be configured such that the bias current increases as the temperature difference between the reference temperature T increases. REF Based on the temperature difference, the nonlinear component c(T) is reduced more accurately, and the power supply voltage V REF This can improve the flatness with respect to temperature T.

[0033] Figure 1 shows an example configuration of such a bias current supply circuit 6. In this example, the bias current supply circuit 6 is connected to a temperature T and a reference temperature T. REF The system includes a switching circuit 8 for enabling a bias current when the temperature difference between the temperature T and the reference temperature T exceeds a threshold. REFWhen the temperature difference from [a certain temperature] reaches or exceeds a threshold value and the influence of the non-linear component c(T) becomes large enough, it is configured to enable the bias current.

[0034] Specifically, the switching circuit 8 has a third PMOS transistor M DD whose source is connected to the power supply voltage V p1 and whose gate is connected to the gate of the first PMOS transistor M p3 , a fourth resistor R4 having one end connected to the drain of the first NMOS transistor M n and the other end grounded, a fifth resistor R5 having one end connected to the drain of the third PMOS transistor M p3 and the other end grounded, a positive input terminal connected to the drain of the second PMOS transistor M p2 , a negative input terminal connected to the drain of the third PMOS transistor M p3 , a first comparator Comp1 having these, a first NMOS transistor M p1 whose gate is connected to the output terminal of the first comparator Comp1, whose source is grounded, and whose drain is connected to the base of the first PNP bipolar transistor Q n1 , and the like.

[0035] In the switching circuit 8 having such a configuration, when the temperature difference between the temperature T and the reference temperature T REF is less than the threshold value, the first NMOS transistor M n1 is turned on by the first comparator Comp1, so that the bases of the first PNP bipolar transistor Q p1 and the second PNP bipolar transistor Q p2 are grounded and the bias current is not supplied (that is, the bias current becomes invalid). On the other hand, when the temperature difference between the temperature T and the reference temperature T REF is greater than or equal to the threshold value, the first NMOS transistor M n1 is turned off by the first comparator Comp1, so that the bases of the first PNP bipolar transistor Q p1 and the second PNP bipolar transistor Q p2A bias current corresponding to a fourth resistor R4 between the base and the ground point is supplied (i.e., the bias current becomes effective).

[0036] In this way, by including the switching circuit 8 in the bias current supply circuit 6, when the temperature difference between the temperature T and the reference temperature T REF becomes greater than or equal to the threshold value, the bias current becomes effective to reduce the influence of the non-linear component c(T) in the power supply voltage V REF . On the other hand, when the temperature difference between the temperature T and the reference temperature T REF is less than the threshold value, unnecessary energy consumption can be avoided by disabling the bias current.

[0037] The bias current supply circuit 6 may also include a plurality of bias current generation circuits 10 for generating different bias currents based on the temperature difference. The number of bias current generation circuits 10 included in the bias current supply circuit 6 may be arbitrary. In FIG. 1, among the plurality of bias current generation circuits 10, the first bias current generation circuit 10A and the second bias current generation circuit 10B are typically shown.

[0038] The first bias current generation circuit 10A has a fourth PMOS transistor M DD whose source is connected to the power supply voltage V p1 and whose gate is connected to the gate of the first PMOS transistor M p4 , a sixth resistor R6 whose one end is connected to the drain of the fourth PMOS transistor M p4 and whose other end is grounded, a positive input terminal connected to the drain of the fourth PMOS transistor M p4 , a negative input terminal connected to the drain of the second PMOS transistor M p2 , a second comparator Comp2 having these, a second NMOS transistor M p1 whose gate is connected to the output terminal of the second comparator Comp2 and whose source is connected to the base of the first PNP bipolar transistor Q n2 , and a second NMOS transistor M DD whose source is connected to the power supply voltage V p1It is connected to the gate of the second NMOS transistor M, and the drain is connected to the gate of the second NMOS transistor M n2 The fifth PMOS transistor M connected to the drain p5 It is equipped with the following.

[0039] The second bias current generation circuit 10B has a source that is the power supply voltage V. DD It is connected to the first PMOS transistor M, and the gate is connected to the first PMOS transistor M p1 The sixth PMOS transistor M connected to the gate p6 And the 6th PMOS transistor M p6 A seventh resistor R7 is connected to the drain at one end and to ground at the other end, and a sixth PMOS transistor M p6 The positive input terminal connected to the drain, and the second PMOS transistor M p2 A third comparator Comp3 has a negative input terminal connected to the drain of a first PNP bipolar transistor Q, the gate of which is connected to the output terminal of the third comparator Comp3 and the source of which is connected to a first PNP bipolar transistor Q p1 The third NMOS transistor M is connected to the base of n3 And the source is the power supply voltage V DD It is connected to the first PMOS transistor M, and the gate is connected to the first PMOS transistor M p1 It is connected to the gate of the 3rd NMOS transistor M, and the drain is connected to the gate of the 3rd NMOS transistor M n3 The 7th PMOS transistor M connected to the drain p7 It is equipped with the following.

[0040] Thus, the multiple bias current generation circuits 10 provided by the bias current supply circuit 6 each have an equivalent configuration, and in each circuit, the comparator sets the reference temperature T set by the reference temperature setting circuit 4. REF Corresponding reference voltage V TEM Based on the comparison results, a bias current is supplied. Here, each of the multiple bias current generation circuits 10 is configured to have a different temperature threshold at which the bias current supply operation is performed. This configuration for setting such thresholds is achieved by adjusting the aforementioned elements that make up each bias current generation circuit 10.

[0041] In this embodiment, the temperature T of the voltage source circuit 1A is the reference temperature T REF When the temperature rises above a certain threshold, the system is configured to supply bias current sequentially starting from the first bias current generation circuit 10A. Specifically, when the temperature T of the voltage source circuit 1A exceeds the threshold T1 of the first bias current generation circuit 10A, the output of the second comparator Comp2 in the first bias current generation circuit 10A becomes High, and the second NMOS transistor M n2 It is turned on. Then the 5th PMOS transistor M p5 Power supply voltage V DD The bias current from the first PNP bipolar transistor Q p1 and the second PNP bipolar transistor Q p2 By supplying it to the base, the nonlinear component c(T) is suppressed.

[0042] When the temperature T of the voltage source circuit 1A rises further and exceeds the threshold T2 (>T1) of the second bias current generation circuit 10B, the output of the third comparator Comp3 in the second bias current generation circuit 10B becomes High, and the third NMOS transistor M n3 It is turned on. Then the 7th PMOS transistor M p7 Power supply voltage V DD The bias current from the first PNP bipolar transistor Q p1 and the second PNP bipolar transistor Q p2 By supplying it to the base, the nonlinear component c(T) is suppressed.

[0043] To explain in more detail, in the configuration shown in Figure 1, the first PMOS transistor M p1 , 2nd PMOS transistor M p2 , 3rd PMOS transistor M p3 , 4th PMOS transistor M p4 , the 5th PMOS transistor M p5 , the 6th PMOS transistor M p6 , and the 7th PMOS transistor M p7The source and gate of each are connected in common, forming a current mirror circuit using seven PMOS transistors. This is because the bias current of the seven PMOS transistors is I in equation (2) above. PTAT This means it is a real multiple of .

[0044] Also, the first PNP bipolar transistor Q p1 , 2nd PNP bipolar transistor Q p2 , and the third PNP bipolar transistor Q p3 The normalized emitter area ratio of the first PMOS transistor M is set to m:1:1 (where m is a positive real number greater than 1), and the first PMOS transistor M p1 , 2nd PMOS transistor M p2 , 3rd PMOS transistor M p3 , 4th PMOS transistor M p4 , the 6th PMOS transistor M p6 If the ratio of gate width W to gate length L is 2:1:n3:n4:n6 (where n3, n4, and n6 are positive real numbers greater than 0), then the third PNP bipolar transistor Q p3 emitter-base voltage V EBQp3 Using the second PMOS transistor M p2 The drain and the third PNP bipolar transistor Q p3 The node voltage between the emitter and the reference temperature T set by the reference temperature setting circuit 4 (reference temperature T) REF (Voltage corresponding to this voltage) V TEM The potentials V5 of the fifth resistor R5, V6 of the sixth resistor R6, and V7 of the seventh resistor R7 are expressed as follows: TIFF0007837160000004.tif36170

[0045] 1st PMOS Transistor M p1 and the second PMOS transistor M p2 The aspect ratio is 2:1, and the second PNP bipolar transistor Q p2 and the 3rd PNP bipolar transistor Q p3If the normalized emitter area ratio is 1:1 and R1 = R2 as in the prior art (see FIG. 8), then for the second PNP bipolar transistor Q p2 and the third PNP bipolar transistor Q p3 the bias currents flowing through them are equal, so the emitter-base voltages generated are equal. That is, it becomes the same as the aforementioned equations (3-1) to (3-6).

[0046] And from equations (5-1) to (5-4) and equations (3-1) to (3-6), V TEM decreases with an increase in temperature T, and the potentials V5 of the fifth resistor R5, V6 of the sixth resistor R6, and V7 of the seventh resistor R7 have the property of increasing with an increase in temperature T. Also, V TEM and V5 are respectively input to the two input terminals of the first comparator Comp1, V TEM and V6 are respectively input to the two input terminals of the second comparator Comp2, and V TEM and V7 are respectively input to the two input terminals of the third comparator Comp3. Therefore, the outputs of these three comparators are according to the temperature T.

[0047] For example, when V TEM > V5, the first comparator Comp1 becomes High (the voltage corresponding to High is electrically equal to the power supply voltage V DD ), the first NMOS transistor M[[ID=2​​​​​​​​​​​​​​​​The source is connected. At this time, by setting n3R5 > n4R6 > n6R7, the first NMOS transistor M n1 is in the off state, the second NMOS transistor M n2 is in the off state, the third NMOS transistor M n3 is in the off state, and only the fourth resistor R4 is connected to the base of the second PNP bipolar transistor Q p2 . As a result, the switching circuit 8 enables the bias current, and the bias current is supplied to the bases of the first PNP bipolar transistor Q p1 and the second PNP bipolar transistor Q p2 .

[0049] At this time, referring to FIG. 8, compared with the voltage source circuit 1' described above, the base of the second PNP bipolar transistor Q p2 which was GND becomes a form in which the fourth resistor R4 is inserted between GND, so the base current of the first PNP bipolar transistor Q p1 and the second PNP bipolar transistor Q p2 flows through the fourth resistor R4. At this time, what occurs in the fourth resistor R4 TIFF0007837160000005.tif6170is generated. TIFF0007837160000006.tif9170As a result, the power supply voltage V out output from the output terminal T REF increases by the voltage represented by equation (6) compared to when the base of the second PNP bipolar transistor Q p2 is shorted to GND.

[0050] And when V TEM < V6, the output of the second comparator Comp2 becomes High, and the second NMOS transistor M n2 is in the on state. At this time, the drain current of the fifth PMOS transistor M p5 flows through the fourth resistor R4. The second PMOS transistor M p2When the aspect ratio of the fifth PMOS transistor Mp5 is 1:n5, the voltage generated in the fourth resistor R4 is the following V 4-2 changes to. TIFF0007837160000007.tif9170

[0051] And when V TEM < V7, the output of the third comparator Comp3 becomes High and the third NMOS transistor M n3 becomes on. At this time, the drain current of the seventh PMOS transistor M p7 flows through the fourth resistor R4. When the aspect ratio of the second PMOS transistor M p2 and the seventh PMOS transistor M p7 is 1:n7, the voltage generated in the fourth resistor R4 changes to the following V 4-3 changes to. TIFF0007837160000008.tif9170

[0052] FIG. 2 shows the simulation results of the temperature characteristics of the power supply voltage V REF output by the power supply voltage circuit 1A in FIG. 1. In FIG. 2, when the temperature change points of the second comparator Comp2 and the third comparator Comp3 are set to 50°C and 80°C, respectively, they are shown together with the comparative example (see FIG. 8).

[0053] As shown in FIG. 2, the power supply voltage V REF of the power supply voltage circuit 1A increases at the timing when the temperature T of the power supply voltage circuit 1A reaches the temperature T0 (9°C) corresponding to the operation threshold temperature of the switching circuit 8, the temperature T1 (50°C) corresponding to the operation threshold temperature of the first bias current generation circuit 10A, and the temperature T2 (80°C) corresponding to the operation threshold temperature of the second bias current generation circuit 10B as the temperature T of the power supply voltage circuit 1A rises. This is because the non-linear component c(T) is preferably canceled by supplying the bias current to the bases of the first PNP bipolar transistor Q<00​​​​This indicates an improvement in the flatness with respect to temperature T (specifically, while the comparative example showed a change of approximately 9.2 mV with respect to temperature T, this embodiment shows a decrease to approximately 3.1 mV, confirming an improvement in flatness).

[0054] Thus, as the temperature T of the voltage source circuit 1A rises, the bias current supply circuit 6 supplies bias current to reduce the nonlinear component c(T) by sequentially operating multiple bias current generation circuits 10A, 10B, ..., each having different thresholds T1, T2, .... This reduces the temperature T and the reference temperature T. REF As the temperature difference with increases (i.e., as the temperature T increases), the nonlinear component c(T) increases, and by increasing the supplied bias current in response to this, the nonlinear component c(T) is effectively canceled out, and the power supply voltage V REF This can be flattened with respect to temperature.

[0055] Furthermore, hysteresis comparators with hysteresis characteristics may be used as the comparators (Comp1, Comp2, Comp3, ...) included in the bias current supply circuit 6. Figure 3 shows an example of the internal circuit when hysteresis comparators are used in the bias current supply circuit 6 of Figure 1.

[0056] In the internal circuit of the hysteresis comparator shown in Figure 3, hysteresis characteristics can be provided by setting the W / L ratio of the four NMOS transistors Mc3, Mc5, Mc6, and Mc4 to 1:n:n:1. Even when constructed with a hysteresis comparator, the flatness is almost the same as the simulation results mentioned above, as shown in Figure 2. This prevents the output of each comparator (the aforementioned comparators Comp1, Comp2, Comp3, ...) from chattering between high and low, enabling the realization of a stable and flatter voltage source circuit 1A.

[0057] (Second Embodiment) Figure 4 is a circuit diagram showing the voltage source circuit 1B according to the second embodiment, and Figure 5 shows the power supply voltage V output by the voltage source circuit 1B of Figure 4.REF This is a simulation result showing the temperature characteristics. The voltage source circuit 1B has a common circuit with the voltage source circuit 1A and the bias current supply circuit 6 described above, except for the configuration of the first embodiment. The bias current supply circuit 6 of the voltage source circuit 1B is common in that it has a plurality of bias current generation circuits 10A, 10B, ... but differs in that the two input terminals of each comparator (first comparator Comp1, second comparator Comp2, ...) of these plurality of bias current generation circuits 10A, 10B, ... are inverted compared to the voltage source circuit 1A.

[0058] As a result, in the bias current supply circuit 6 of the voltage source circuit 1B, as the temperature T of the voltage source circuit 1 decreases, multiple bias current generation circuits 10A, 10B, ..., each having different thresholds T1', T2', ..., operate sequentially to supply bias current to reduce the nonlinear component c(T). This allows the temperature T and the reference temperature T to work together. REF As the temperature difference with increases (i.e., as the temperature T decreases), the nonlinear component c(T) increases, and by increasing the supplied bias current in response to this, the nonlinear component c(T) is effectively canceled out, and the power supply voltage V REF This can be flattened with respect to temperature.

[0059] As shown in Figure 5, the power supply voltage V of the voltage source circuit 1B REF As the temperature T of the voltage source circuit 1 decreases, the bias current increases at the timing when the temperature T corresponds to the operating threshold temperature T0' of the switching circuit 8, the operating threshold temperature T1' of the first bias current generation circuit 10A, and the operating threshold temperature T2' of the second bias current generation circuit 10B. This is because at temperatures T0', T1', and T2', the bias current of the first PNP bipolar transistor Q p1 and the second PNP bipolar transistor Q p2 By supplying a bias current to the base, the nonlinear component c(T) is suitably canceled out, resulting in a power supply voltage V compared to the comparative example. REF This indicates improved flatness with respect to temperature T.

[0060] (Third embodiment) Figure 6 is a circuit diagram of the voltage source circuit 1C according to the third embodiment, and Figure 7 shows the power supply voltage V of the voltage source circuit 1C in Figure 6. REF This is a simulation result showing the temperature characteristics. In the voltage source circuit 1C, the bias current supply circuit 6 is configured to include the circuit configuration of the bias current supply circuit 6 in the voltage source circuit 1A according to the first embodiment described above (high temperature side bias current supply circuit 6-1) and the circuit configuration of the bias current supply circuit 6 in the voltage source circuit 1B according to the second embodiment described above (low temperature side bias current supply circuit 6-2). In Figure 6, to clearly show the correspondence with the embodiments described above, the corresponding components in the high-temperature bias current supply circuit 6-1 and the low-temperature bias current supply circuit 6-2 are denoted by a common reference numeral; however, various parameters related to the components may be adjusted independently.

[0061] The high-temperature side bias current supply circuit 6-1, similar to the bias current supply circuit 6 of the voltage source circuit 1A according to the first embodiment, supplies a bias current to reduce the nonlinear component c(T) by sequentially operating a plurality of bias current generation circuits 10A, 10B, ..., each having different thresholds T1, T2, ..., as the temperature T of the voltage source circuit 1 rises. This allows for the relationship between temperature T and reference temperature T REF As the temperature difference with increases (i.e., as the temperature T increases), the nonlinear component c(T) increases, and by increasing the supplied bias current in response to this, the nonlinear component c(T) is effectively canceled out, and the power supply voltage V REF This can be flattened with respect to temperature.

[0062] On the other hand, the low-temperature bias current supply circuit 6-2, similar to the bias current supply circuit 6 of the voltage source circuit 1B according to the second embodiment, supplies a bias current to reduce the nonlinear component c(T) by sequentially operating a plurality of bias current generation circuits 10A, 10B, ..., each having different thresholds T1', T2', ..., as the temperature T of the voltage source circuit 1 decreases. This allows for the relationship between temperature T and the reference temperature T REFAs the temperature difference with increases (i.e., as the temperature T decreases), the nonlinear component c(T) increases, and by increasing the supplied bias current in response to this, the nonlinear component c(T) is effectively canceled out, and the power supply voltage V REF This can be flattened with respect to temperature.

[0063] As shown in Figure 7, the power supply voltage V of the voltage source circuit 1C REF On the side of the reference temperature (e.g., room temperature), as the temperature T of the voltage source circuit 1 rises, the bias current increases at the timing when the temperature T corresponds to the operating threshold temperature T0 of the switching circuit 8 in the high-temperature side bias current supply circuit 6-1, the operating threshold temperature T1 of the first bias current generation circuit 10A in the high-temperature side bias current supply circuit 6-1, and the operating threshold temperature T2 of the second bias current generation circuit 10B in the high-temperature side bias current supply circuit 6-1. This is because at temperatures T0, T1, and T2, the bias current of the first PNP bipolar transistor Q p1 and the second PNP bipolar transistor Q p2 By supplying a bias current to the base, the nonlinear component c(T) is suitably canceled out, resulting in a higher power supply voltage V at higher temperatures compared to the comparative example. REF This indicates improved flatness with respect to temperature T.

[0064] On the other hand, at temperatures lower than the reference temperature (e.g., room temperature), as the temperature T of the voltage source circuit 1 decreases, the bias current increases at the timing when the temperature T corresponds to the operating threshold temperature T0' of the switching circuit 8 in the low-temperature bias current supply circuit 6-2, the operating threshold temperature T1' of the first bias current generation circuit 10A in the low-temperature bias current supply circuit 6-2, and the operating threshold temperature T2' of the second bias current generation circuit 10B in the low-temperature bias current supply circuit 6-2. This is because at temperatures T0', T1', and T2', the bias current of the first PNP bipolar transistor Q p1 and the second PNP bipolar transistor Q p2By supplying a bias current to the base, the nonlinear component c(T) is suitably canceled out, resulting in a lower power supply voltage V at lower temperatures compared to the comparative example. REF This indicates improved flatness with respect to temperature T.

[0065] Thus, in the voltage source circuit 1C according to the third embodiment, the bias current supply circuit 6 includes a high-temperature side bias current supply circuit 6-1 and a low-temperature side bias current supply circuit 6-2, thereby reducing the influence of the nonlinear component c(T) over a wide temperature range from the high-temperature side to the low-temperature side, and the power supply voltage V with respect to temperature T. REF This can improve the flatness of the surface. [Explanation of symbols]

[0066] 1 (1A, 1B, 1C) Voltage Source Circuit 2 Bandgap Reference Circuit 4 Reference temperature setting circuit 6. Bias current supply circuit 8 Switching Circuit 10. Bias current generation circuit 10A First Bias Current Generation Circuit 10B Second bias current generation circuit

Claims

1. A bandgap reference circuit capable of outputting a power supply voltage includes a first PNP bipolar transistor and a second PNP bipolar transistor, the bases of which are connected to each other and the collectors of which are grounded, and a second PNP bipolar transistor. A reference temperature setting circuit including a third PNP bipolar transistor whose base and collector are grounded and which can supply a reference temperature voltage corresponding to the reference temperature from its emitter, Based on the comparison result between the temperature of the bandgap reference circuit and the reference temperature, a bias current supply circuit capable of supplying bias current to the bases of the first PNP bipolar transistor and the second PNP bipolar transistor is provided. Equipped with, The normalized emitter area ratio of the first PNP bipolar transistor, the second PNP bipolar transistor, and the third PNP bipolar transistor is set to first PNP bipolar transistor: second PNP bipolar transistor: third PNP bipolar transistor = m:1:1 (where m is a positive number), The bias current supply circuit is a voltage source circuit that supplies the bias current in such a way that it reduces the nonlinear component of the emitter-base voltage of the first PNP bipolar transistor with respect to temperature.

2. The voltage source circuit according to claim 1, wherein the bias current supply circuit is configured such that the bias current increases as the temperature difference between the temperature and the reference temperature increases.

3. The voltage source circuit according to claim 2, wherein the bias current supply circuit includes a plurality of bias current generation circuits for generating different bias currents based on the temperature difference.

4. The bias current supply circuit is, A first bias current generation circuit that generates a first bias current supplied as the bias current when the temperature difference exceeds a first threshold, A first bias current generation circuit generates a second bias current that is supplied together with the first bias current as the bias current when the temperature difference becomes greater than or equal to a second threshold which is greater than the first threshold, Equipped with, The power supply voltage circuit according to claim 3, wherein the first bias current and the second bias current are each generated to be positive real multiples of the reference bias current corresponding to the power supply voltage of the bandgap reference circuit.

5. The voltage source circuit according to any one of claims 1 to 4, wherein the bias current supply circuit includes a switching circuit for enabling the bias current when the temperature difference between the temperature and a reference temperature exceeds a threshold.

6. The bias current supply circuit is, A high-temperature side bias current supply circuit for generating the bias current when the temperature is higher than the reference temperature, A low-temperature bias current supply circuit for generating the bias current when the temperature is lower than the reference temperature, A voltage source circuit according to any one of claims 1 to 5, including the voltage source circuit described in any one of claims 1 to 5.

7. The bias current supply circuit includes a comparator for comparing the temperature with a reference temperature. The voltage source circuit according to any one of claims 1 to 6, wherein the comparator has hysteresis characteristics.

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