Operating method of vacuum processing equipment

Abstract

To provide a method for operating a vacuum processing device with which it is possible to avoid reduction in throughput.SOLUTION: In a vacuum processing device, a conveyance schedule processing unit of a control unit calculates the time for first and second processing units to process prescribed number of wafers after unloading, separately for the case where the first and second processing units of the vacuum processing device are connected to one of vacuum conveyance chambers and wafer unloading from one processing unit, out of the first and second processing units, with which processing is finished earlier, before wafer processing carried out in parallel by the first and second processing units is finished, is carried out after having waited for wafer unloading from the other processing unit, with which processing is finished later, and for the case where wafer unloading from the one processing unit is carried out before unloading from the other processing unit. Then, whichever smaller of the calculated times is adopted as a schedule according to which a plurality of wafers on and after processing by the one processing unit is finished are unloaded from the first and second processing units.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present invention relates to the technology of a vacuum processing apparatus. For example, it relates to an operation method of a vacuum processing apparatus having a configuration in which a plurality of vacuum transfer chambers, each having a vacuum processing chamber for disposing a substrate-like sample such as a semiconductor wafer and processing the sample, are connected.

Background Art

[0002] As a vacuum processing apparatus, there is known a link-type vacuum processing apparatus having a transfer robot inside, a plurality of vacuum transfer chambers (hereinafter also referred to as vacuum transfer containers) connected to each other, and a plurality of processing units connected to each of the vacuum transfer chambers.

[0003] A technology related to an operation method of such a vacuum processing apparatus is described in, for example, Patent Document 1.

[0004] Patent Document 1 describes a technology for improving the throughput (number of processed wafers per unit time) when continuously processing a plurality of wafers in a linear tool vacuum processing apparatus that transfers substrate-like wafers such as semiconductor wafers and liquid crystal displays between a plurality of transfer robots. That is, Patent Document 1 describes that, before starting the transfer of a plurality of wafers, a plurality of transfer algorithms for controlling the transfer of wafers are simulated for each combination of the number and arrangement of the processing chambers of the processing unit and the processing time of the wafers, and a transfer algorithm that predicts the maximum throughput value is selected from the obtained transfer algorithm determination rules, and the transfer destination of the wafers is calculated based on the selected transfer algorithm, thereby providing transfer control with the maximum throughput.

Prior Art Documents

Patent Documents

[0005]

Patent Document 1

Summary of the Invention

[0006] When the present inventors examined the technology described in Patent Document 1, they found that the following points were not adequately considered, leading to problems.

[0007] In other words, when two processing units, transported by the same (common) transport robot, are performing similar processes in their processing chambers, Patent Document 1 shows two cases: one where the wafer transport process to the processing chambers is performed alternately, and another where priority is given to the processing that finishes earlier. That is, Patent Document 1 does not consider waiting for the processing in the processing chamber that finishes later to complete before prioritizing the transport process in that chamber. The inventors of this invention have realized that there are cases where prioritizing the transport process of the processing chamber that finishes later can optimize throughput.

[0008] Because the same transport robot is used for the transport process, it is structurally impossible to transport wafers to the processing chambers of the two processing units simultaneously. Therefore, if the wafer processing (product processing) is completed in both processing units at approximately the same time, or if the cleaning of the processing chambers of the two processing units is completed at approximately the same time, the transport to the processing chambers of the two processing units will overlap, resulting in an idle period in one of the two processing units where neither transport nor product processing is taking place.

[0009] Furthermore, if different processes using the same recipe are running in parallel in two processing units, the timing of the completion of product processing or cleaning will be staggered in the two processing units. Therefore, even if idle time occurs, the transport cycle will be shifted accordingly, and idle time will not occur from the next product processing onward.

[0010] However, when processing multiple processing units connected to the same processing chamber (i.e., the same vacuum transport chamber) are performing product processing in parallel using recipes with different processing times, where the time difference between these processing times is less than the wafer transport time between the lock chamber and the processing chamber, a problem called a cross-chamber occurs. If the processing chamber with the longer processing time finishes processing first, subsequent product processing will repeatedly result in idle time in the processing chamber with the shorter processing time, leading to a decrease in throughput.

[0011] The object of the present invention is to identify whether phenomena such as cross-chambering may occur and to provide a method for operating a vacuum processing apparatus that can avoid a decrease in throughput.

[0012] Other objects and novel features of the present invention will become apparent from the description herein and the accompanying drawings. [Means for solving the problem]

[0013] A brief overview of some of the representative embodiments disclosed in this application is as follows.

[0014] In other words, the vacuum processing apparatus according to one embodiment comprises a plurality of vacuum transport chambers arranged in a front-to-back direction, each containing a robot that transports wafers to be processed within a depressurized internal transport chamber; an intermediate container positioned between two adjacent vacuum transport chambers in the plurality of vacuum transport chambers, connecting the two vacuum transport chambers and having a storage chamber inside which wafers are stored; a lock chamber positioned to be connected in front of the foremost of the plurality of vacuum transport chambers, and having a wafer storage chamber inside which the internal pressure can be reduced to a predetermined pressure or increased to atmospheric pressure; and a plurality of processing units connected to the side walls of the plurality of vacuum transport chambers, each of which has a processing chamber inside and processes wafers transported into the internal processing chamber, and each of the plurality of wafers stored inside a cassette positioned in front of the lock chamber is transported between the lock chamber and one of the plurality of processing units according to a predetermined schedule for processing. In this embodiment of the operation method for a vacuum processing apparatus, the processing units are provided as first and second processing units, with one processing unit having a longer processing time for wafers and the other having a shorter processing time for wafers. The first and second processing units are connected to one of a plurality of vacuum transport chambers. Before the parallel processing of wafers by the first and second processing units is completed, the first and second processing units calculate the time it will take for the first and second processing units to process a predetermined number of wafers after the first processing unit finishes processing, in two cases: when the wafers from the first processing unit finish processing first are unloaded after the wafers from the other processing unit finish processing later, and when the wafers from the first processing unit are unloaded before the wafers from the other processing unit are unloaded. The smaller of these calculated times is then adopted as the schedule for unloading multiple wafers from the first and second processing units after the completion of processing by the first processing unit. [Effects of the Invention]

[0015] Among the inventions disclosed in the present application, the effects obtained by representative embodiments will be briefly described. It is possible to provide an operation method for a vacuum processing apparatus that can identify whether a phenomenon such as cross-chamber can occur and avoid a decrease in throughput.

Brief Description of the Drawings

[0016] [Figure 1] It is a diagram showing the overall configuration of a vacuum processing apparatus according to an embodiment. [Figure 2] It is a flowchart showing the operation of a transfer schedule processing unit according to an embodiment. [Figure 3] It is a diagram for explaining cross-chamber. [Figure 4] It is a diagram for explaining an operation method of a vacuum processing apparatus according to an embodiment. [Figure 5] It is a flowchart for explaining the determination of the replacement of the transfer order according to an embodiment. [Figure 6] It is a diagram showing the effect by the operation method of a vacuum processing apparatus according to an embodiment. [Figure 7] It is a diagram showing a mathematical formula according to an embodiment.

Modes for Carrying Out the Invention

[0017] The embodiments will be described with reference to the drawings. Note that the embodiments described below do not limit the invention according to the claims, and not all of the elements and combinations thereof described in the embodiments are essential for the solution means of the invention.

[0018] In the following embodiments, a semiconductor wafer (wafer) used for manufacturing a semiconductor device will be used as a sample, and a vacuum processing apparatus of a linear tool that processes the sample in a processing chamber of a processing unit will be described as an example. Of course, the sample is not limited to a semiconductor wafer.

[0019] (Embodiment) FIG. 1 is a diagram showing the overall configuration of a vacuum processing apparatus according to an embodiment. In FIG. 1, reference numeral 100 denotes a vacuum processing apparatus. The vacuum processing apparatus 100 includes a vacuum processing apparatus unit 101 and a control unit 104 that controls the vacuum processing apparatus unit 101. In the embodiment, an example in which the vacuum processing apparatus 100 includes the control unit 104 will be described, but the vacuum processing apparatus 100 may be constituted by the vacuum processing apparatus unit 101.

[0020] In FIG. 1, the schematic configuration of the vacuum processing apparatus unit 101 as viewed from above is shown, and the configuration of a processing unit realized by executing software is shown for the control unit 104.

[0021] <Vacuum processing apparatus unit> The vacuum processing apparatus unit 101 includes an atmospheric-side apparatus 102 and a vacuum-side apparatus 103. The atmospheric-side apparatus 102 is a part that performs unloading and loading of wafers from a cassette (hereinafter also referred to as a FOUP) that can store a plurality of wafers under atmospheric pressure. The vacuum-side apparatus 103 is a part that conveys wafers under a pressure reduced from atmospheric pressure to a predetermined degree of vacuum and performs product processing on the wafers in processing chambers (vacuum processing chambers) 113, 114, 118, and 119 in the processing unit. The control unit 104 is a part that monitors the overall state of the vacuum processing apparatus 100 and controls the operation of each station associated with wafer conveyance and wafer processing.

[0022] <<Atmospheric-side apparatus 102>> The atmospheric-side apparatus 102 includes a plurality of load ports 105 on which FOUPs capable of storing a plurality of wafers are placed, an atmospheric-side transfer robot (hereinafter also simply referred to as a robot) 107 that conveys wafers under atmospheric pressure, a rectangular atmospheric transfer container 106, an aligner 108 that adjusts the orientation of the wafers and detects the center position of the wafers, and a retraction station 109 that is a place for temporarily retracting the wafers.

[0023] In the atmospheric-side equipment 102, the wafers to be processed are unloaded from the FOUP by the atmospheric-side transport robot 107, and the unloaded wafers are transported via the aligner 108 to the load lock chamber (hereinafter also referred to as the lock chamber) 110 connected to the vacuum-side equipment 103. The processed wafers that have been transported from the vacuum-side equipment 103 to the lock chamber 110 are then stored in the FOUP by the atmospheric-side transport robot 107.

[0024] The lock chamber 110 is configured to reduce pressure to a predetermined vacuum and increase pressure to atmospheric pressure. For example, when a wafer is brought into the lock chamber 110 from the atmospheric-side device 102, the lock chamber 110 is depressurized to the same vacuum state as the vacuum-side device 103, and the wafer is brought from the lock chamber 110 to the vacuum-side device 103. Conversely, after a wafer is brought into the lock chamber 110 from the vacuum-side device 103, the lock chamber 110 is increased in pressure, the inside of the lock chamber 110 is brought to atmospheric pressure, and the wafer is transported from the lock chamber 110 to the atmospheric-side device 102.

[0025] <<Vacuum side device 103>> The vacuum-side device 103 comprises vacuum-side transfer robots (hereinafter also simply referred to as robots) 112 and 117 that transport wafers inside the vacuum chamber, vacuum transfer chambers 111 and 116, a waiting space (hereinafter also referred to as an intermediate container) 115 installed between the multiple vacuum transfer chambers 111 and 116, and a processing unit having processing chambers 113, 114, 118, and 119 inside that perform product processing on wafers such as etching, ashing, and film deposition. As shown in Figure 1, the vacuum-side transfer robots 112 and 117 are installed inside the vacuum transfer chambers 111 and 116. Gate valves, not shown in the figure, are placed between the vacuum chambers that make up these components and are opened when wafers are loaded and unloaded. An example of the location where the gate valves are placed will be described later.

[0026] The waiting space 115 is provided with space for placing wafers, and the vacuum-side transport robots 112 and 117 in the vacuum transport chambers 111 and 116 adjacent to the waiting space 115 transport the wafers between the waiting space 115 and the processing chambers 113, 114, 118, and 119 of the processing unit and the locking chamber 110. For example, after the vacuum-side transport robot 112 at the front of the vacuum processing unit 101 (bottom of the page: load port 105 side) loads the wafer from the locking chamber 110 into the waiting space 115, the vacuum-side transport robot 117 at the rear of the vacuum processing unit 100 loads the wafer from the waiting space 115 into the processing chamber 118 or 119 of the processing unit. This ensures that wafers are loaded from the locking chamber 110 and transferred between the vacuum transport chambers 111 and 116.

[0027] <Control Unit 104> The control unit 104 monitors the overall state of the vacuum processing apparatus 100 and controls the operation of each station involved in wafer transport and wafer processing. Specifically, the control unit 104 includes a calculation unit 120 that determines the wafer transport schedule and instructs wafer transport operations, and a storage unit 121 that stores various information.

[0028] The arithmetic unit 120 implements various processing functions by executing software, but Figure 1 shows only the processing functions necessary to explain the vacuum processing apparatus 100.

[0029] The transport schedule processing unit 122, implemented by the calculation unit 120, determines the order in which multiple wafers stored in the FOUP installed in the load port 105 will be transported. The transport control processing unit 123, also implemented by the calculation unit 120, controls the transport process according to the transport order determined by the transport schedule processing unit 122, for example, by controlling the operation of equipment such as robots and gate valves that transport the wafers.

[0030] The memory unit 121 is a storage device that stores information required by the processing unit implemented by the arithmetic unit 120. As shown in Figure 1, the information stored in the memory unit 121 includes device status information 124, processing room information 125, processing instruction information 126, processing progress information 127, wafer transport order information 128, transport limit information 129, and device throughput information (hereinafter referred to as device THP information) 130.

[0031] The control unit 104 is connected to the host computer (labeled "host" in Figure 1) 132 via the network 131. The host computer 132 issues commands to the control unit 104 as needed, and the control unit 104 controls the vacuum processing unit 101 according to these commands. As a result, the vacuum processing unit 100 executes the processing according to the commands from the host computer 132. The status of the vacuum processing unit 100 is also monitored by the host computer 132.

[0032] <<Operation of the processing unit in the calculation unit 120>> Next, we will describe each processing unit implemented by the arithmetic unit 120.

[0033] The transport schedule processing unit 122 and the transport control processing unit 123 are connected to the storage unit 121 by communication means (not shown).

[0034] The transport schedule processing unit 122 acquires equipment status information 124, processing room information 125, processing instruction information 126, processing progress information 127, and equipment THP information 130, which are pre-stored in the storage unit 121, via communication means, according to an algorithm defined by software (not shown) pre-stored in the storage unit 121. Based on this acquired information, the transport schedule processing unit 122 calculates wafer transport order information 128 and stores it in the storage unit 121.

[0035] The transport control processing unit 123 acquires wafer transport order information 128 calculated by the transport schedule processing unit 122 and stored in the storage unit 121, and transport limit information 129 that is pre-stored in the storage unit 121. Based on the acquired information, the transport control processing unit 123 generates a command signal to the vacuum processing unit 101 to transport the wafers. This command signal controls individual operations such as loading and unloading wafers by robots located inside the vacuum processing unit 101, wafer movement, depressurization and pressurization of the load lock chamber 110, processing in the processing unit, and opening and closing of gate valves.

[0036] <<Information in Memory Unit 121>> Here, we will explain the various types of information stored in the memory unit 121.

[0037] The device status information 124 includes information such as the operating status and pressure values ​​of multiple parts in the vacuum processing unit 101.

[0038] Processing room information 125 is information that stores data indicating the internal state and processing status of processing rooms 113, 114, 118, and 119 of the current processing unit.

[0039] This information changes as the operation of the vacuum side transport robots 112 and 117 inside the vacuum processing unit 101 or the processing chambers 113, 114, 118, 119 and vacuum transport chambers 111 and 116 of the processing unit progresses, and is updated periodically at predetermined time intervals. This information includes past data as well as the latest data, and the latest data and past data are distinguished and stored in the storage unit 121 as equipment status information 124 and processing chamber information 125.

[0040] The processing instruction information 126 is information that includes multiple sequence recipes. These multiple sequence recipes are pre-set by the user of the vacuum processing apparatus 100 before processing the wafer.

[0041] A sequence recipe includes the route, including the stations and their order, that a wafer passes through from the FOUP containing the wafer, after it is transported to the processing chambers 113, 114, 118, 119 (hereinafter, sometimes referred to as PU1, PU2, PU3, PU4) of any processing unit for processing, and then transported back to its original position in the FOUP; information about the processing to be performed in the target processing unit; and the processing time and processing conditions for cleaning the processing chamber of the processing unit. Here, the processing conditions for cleaning the processing chamber are, for example, to perform cleaning after processing every 10 product wafers. Each sequence recipe is managed and identified by number or name within the processing instruction information 126. That is, the sequence recipe within the processing instruction information 126 is identified by number or name.

[0042] In this embodiment, the vacuum processing apparatus 100 transports wafers to processing chambers within each processing unit in accordance with processing instructions from the host computer 132, and then performs predetermined product processing on the wafers in each processing chamber. The product processing instructions include a number that specifies the sequence recipe of the processing instruction information 126 for each single or multiple wafers to be processed. In this embodiment, the processing instructions from the host computer 132 are called JOBs, and the information contained in those JOBs is called JOB information. The host computer 132 also transmits the JOBs to the control unit 104 via the network 131.

[0043] The processing progress information 127 stores data indicating the processing progress of a job that is currently being processed by the vacuum processing apparatus 100. For example, if a FOUP contains multiple wafers, for example 25 wafers, and information is acquired at predetermined time intervals, the processing progress information stores information indicating which wafer in a given wafer processing sequence has been removed from the FOUP and is being processed at any given time, and which sequence in the processing instruction information 126 for the corresponding wafer is currently being executed.

[0044] The wafer transport order information 128 stores information indicating the transport order for each of the multiple wafers stored in the FOUP. More specifically, the wafer transport order information 128 stores information such as a number indicating the transport order of each wafer, a number indicating the slot in the FOUP in which each wafer is stored, a number for the processing chamber PU1 to PU4 of the processing unit in which each wafer is processed, and the setting of an event that makes each wafer available for transport. Here, an event refers to the completion of processing in a processing chamber of a processing unit or the elapsed of a specified waiting time. In the vacuum processing apparatus 100, the transport of wafers begins with the wafers that are available for transport, according to the transport order.

[0045] The transport limit information 129 is information used to limit the number of wafers being processed and transported in the processing chamber of the processing unit of the vacuum processing apparatus 100 during job execution so that the number of wafers being transported remains below a certain number. This information is intended to prevent a situation where wafers become jammed in the stations within the vacuum processing apparatus 101 due to a large number of wafers being transported simultaneously, preventing wafer transport from continuing for a certain period of time. In this embodiment, the transport limit information 129 is used to determine whether or not wafers not yet removed from the FOUP can be transported. Note that when it is necessary to perform a cleaning process without wafers, if wafers are jammed in the stations within the vacuum processing apparatus 101, a deadlock situation may occur because it is necessary to create an empty state in the processing chamber of the processing unit to be cleaned where no wafers are present. To avoid this, the transport limit information 129 includes conditions for the transport limit number for wafer-free cleaning, and based on these conditions, a determination is made as to whether or not wafers not yet removed from the FOUP can be transported.

[0046] The device THP information 130 pre-records the combination of processing units and the device's throughput (THP) information for the wafer processing time in the processing chambers within each processing unit, as recorded in the vacuum processing unit 101. The device THP information 130 also stores a reference value for the transport rate-limiting state of the device, based on the combination of processing units and the wafer processing time in the processing chambers within each processing unit, as recorded in the vacuum processing unit 101. Here, transport rate-limiting means that in any of the processing chambers PU1 to PU4 of the processing unit, if the processing time for the wafer is sufficiently short, the processing time ends earlier than the time when the next wafer can be transported to that processing unit. For example, when using the processing chambers PU1 and PU2 of the processing unit, the transport rate-limiting reference value is, for example, 40 seconds. These values ​​are calculated based on the operating times of various devices in the vacuum processing unit 100, and can be calculated or obtained through simulation once the device specifications are known.

[0047] The configuration of the vacuum processing apparatus 100 is not limited to that shown in Figure 1. For example, the number of load ports 105 may be less than or more than five. Also, in the vacuum side apparatus 103, the number of processing chambers is not limited to four (PU1 to PU4), but may be less than or more than four. Furthermore, the number of processing chambers of the processing units connected to the side walls of the vacuum transfer chambers 111 and 116 is not limited to two, but may be less than or more than two.

[0048] <Example of wafer transport operation> Next, with reference to Figure 1, the sequence of wafer transport operations in the vacuum processing apparatus 100 will be explained. Here, the processing chamber of the processing unit that performs product processing is PU3(118), and the sequence of operations when transporting a single wafer in the vacuum processing apparatus 100 will be listed in order in chronological order. The sequence of transport operations described below is realized by the transport control processing unit 123 in the calculation unit 120 controlling the vacuum processing apparatus unit 101. 1) Any FOUP capable of accommodating multiple wafers, installed in the load port 105, is set as the FOUP containing the wafer to be transported. 2) A command is supplied from the host computer 132 to the control unit 104 via the network 131, thereby starting a job in the vacuum processing apparatus 100. 3) The wafer transport order information 128 is updated by the transport schedule processing unit 122.

[0049] 4) According to the updated wafer transport order information 128 and the transport limit information 129, the wafers to be transported are removed from the FOUP by the atmospheric transport robot 107. 5) The wafers unloaded by the atmospheric transport robot 107 are loaded into the aligner 108, where the wafers to be transported are aligned. 6) Once the alignment is complete, the wafers are removed from the aligner 108 by the atmospheric transport robot 107.

[0050] 7) After pressurizing the inside of the load lock chamber 110 to atmospheric pressure, a gate valve (not shown) connecting the atmospheric transport container 106 and the load lock chamber 110 opens, and the atmospheric transport robot 107 loads the wafers unloaded from the aligner 108 into the load lock chamber 110. Subsequently, the gate valve connecting the atmospheric transport container 106 and the load lock chamber 110 closes.

[0051] 8) After the pressure inside the load lock chamber 110 is reduced from atmospheric pressure to a predetermined vacuum, a gate valve (not shown) connecting the load lock chamber 110 and the vacuum transfer chamber 111 opens, and the vacuum-side transfer robot 112 unloads the wafer from inside the load lock chamber 110 and transfers the wafer to the vacuum transfer chamber 111. After that, the gate valve connecting the load lock chamber 110 and the vacuum transfer chamber 111 closes.

[0052] 9) The vacuum-side transfer robot 112, while holding the wafer that has been brought into the vacuum transfer chamber 111, rotates until it is facing the waiting space 115, and then transfers the wafer into the waiting space 115. 10) A vacuum-side transfer robot 117, located behind the vacuum processing unit 101, unloads a wafer from the waiting space 115. 11) The vacuum-side transfer robot 117 rotates while holding the unloaded wafer until it faces the processing chamber PU3 of the processing unit. A gate valve (not shown) connecting the vacuum transfer chamber 116 and the processing chamber PU3 of the processing unit opens, and the vacuum-side transfer robot 117 loads the wafer into the processing chamber PU3. The gate valve then closes. 12) Inside the processing chamber PU3 of the processing unit, the wafers that have been brought in undergo product processing for commercialization.

[0053] 13) When product processing is completed inside the processing chamber PU3 of the processing unit, the gate valve connecting the vacuum transport chamber 116 and the processing chamber PU3 of the processing unit opens, and the vacuum-side transport robot 117 transports the wafer from the processing chamber PU3 to the vacuum transport chamber 116. After that, the gate valve closes.

[0054] 14) The vacuum-side transfer robot 117 rotates while holding the transferred wafer until it faces the waiting space 115. After rotating, the vacuum-side transfer robot 117 carries the held wafer into the waiting space 115. 15) The vacuum-side transfer robot 112, which is installed in front of the vacuum processing unit 101, transfers the wafer from the waiting space 115 to the vacuum transfer chamber 116.

[0055] 16) The vacuum-side transfer robot 112 rotates while holding the unloaded wafer until it faces the load lock chamber 110. Then, the gate valve connecting the load lock chamber 110 and the vacuum transfer chamber 111 opens, and the vacuum-side transfer robot 112 loads the wafer into the load lock chamber 110. After that, the gate valve closes.

[0056] 17) After the load lock chamber 110 is pressurized to atmospheric pressure, the gate valve connecting the atmospheric transport container 106 and the load lock chamber 110 opens, and the atmospheric transport robot 107 unloads the wafer from the load lock chamber 110. The gate valve then closes. 18) The atmospheric transport robot 107 places the wafer back into the original slot of the FOUP from which it was unloaded in step 4).

[0057] In the series of transport operations described here, if the target processing chamber is, for example, processing chamber PU4 of the processing unit, the only difference is that the processing chamber into which the vacuum-side transport robot 117 loads the wafer changes from PU3 to PU4; the rest of the transport operations remain the same as described above.

[0058] Furthermore, if the target processing chamber is processing chamber PU1 or PU2 of the processing unit, the transport operation will be to transport the wafer to the target processing chamber PU1 or PU2 once the wafer is transported to the vacuum side transport robot 112, and there will be no significant change in the flow of the transport operation.

[0059] Furthermore, although the above transport operation is performed on a single wafer, the vacuum processing apparatus 100 can handle multiple wafers simultaneously. In this case, the transport operation will be performed on each of the multiple wafers. It is also possible to perform the transport operation on multiple different FOUPs.

[0060] <Operation of the transport scheduling processing unit> Figure 2 is a flowchart showing the operation of the transport schedule processing unit according to the embodiment. Next, the processing performed in the transport schedule processing unit 122, which is implemented by the calculation unit 120, will be described with reference to Figures 1 and 2.

[0061] The operation starts with step Start.

[0062] When a new JOB request is generated from the host computer 132, in step 201, the transport schedule processing unit 122 obtains JOB information related to the generated JOB via the network 131. The JOB information is stored in a temporary buffer (not shown) of the arithmetic unit 120, although this is not particularly limited.

[0063] Next, in step 202, the transport schedule processing unit 122 repeatedly performs the JOB execution status check in step 203 for the number of JOB information held in the temporary buffer. Specifically, the transport schedule processing unit 122 checks whether the vacuum processing unit 101 is capable of transporting wafers in the relevant JOB based on the device status information 124, processing room information 125, processing instruction information 126, and processing progress information 127 stored in the storage unit 121. If the vacuum processing unit 101 is capable of executing multiple JOBs simultaneously, for example, it may perform the transport of multiple wafers simultaneously. Alternatively, it may control which JOBs are executed simultaneously, for example, by prioritizing the JOB requested first by the host computer 132.

[0064] If the transport scheduling processing unit 122 determines in step 202 that there are no new jobs to execute after the completion of the repeating step 202, it proceeds to step End and the transport scheduling processing unit 122 terminates.

[0065] In response to this, if step 202 determines that there is a new job to be executed, the transport schedule processing unit 122 updates the wafer transport order information 128 in steps 204 and 205, including the wafers assigned to the new job to be executed. Specifically, in step 204, the transport schedule processing unit 122 calculates and determines the ratio of the number of wafers to be transported to the processing chamber of each processing unit based on the job information and the sequence recipe information set for the job. Furthermore, in step 205, the transport schedule processing unit 122 determines the order in which the wafers will be transported to the processing chamber of each processing unit based on the job information of the job to be executed, the sequence recipe information, and the ratio of the number of wafers calculated in step 204, and then updates the wafer transport order information 128.

[0066] When the wafer transport order information 128 is updated, the process moves to step End, and the transport schedule processing unit 122 terminates.

[0067] <Cross-chamber phenomenon> Next, the phenomenon known as the cross-chamber, as described in the section [Problems to be Solved by the Invention], and its conditions for occurrence will be explained using the drawings. Figure 3 is a diagram illustrating the cross-chamber. In Figure 3, VR represents the vacuum-side transfer robot, and PU1 and PU2 represent the processing chambers of a processing unit where wafers are transferred by a single vacuum-side transfer robot VR. That is, processing chambers PU1 and PU2 represent processing chambers where wafers are loaded and unloaded by the same (shared) vacuum-side transfer robot VR. Referring to Figure 1, for example, the vacuum-side transfer robot VR corresponds to the vacuum-side transfer robot 112, and processing chambers PU1 and PU2 correspond to processing chambers 113 and 114. Figure 3 shows the processing sequence of two processing chambers PU1 and PU2 where wafers are transferred by the same vacuum-side transfer robot VR.

[0068] In Figure 3, different processing steps are performed in processing chambers PU1 and PU2, resulting in different processing times. The time required for cleaning (in-situ) processing chambers PU1 and PU2 is the same. Furthermore, in Figure 3, the processing time in processing chamber PU1 is assumed to be longer than the processing time in processing chamber PU2.

[0069] In Figure 3, the white area 401 represents product processing, and the processing time for processing room PUn will be denoted as processing time Tnp. Here, n is a number that identifies the processing room. For example, the processing time for processing room PU1 is T1p, and the processing time for processing room PU2 is T2p.

[0070] In Figure 3, the diamond-shaped region 402 represents the process by which the vacuum-side transport robot VR loads and unloads wafers into processing chambers PU1 and PU2. Hereafter, the time taken for this process will be referred to as the transport time Tt.

[0071] In Figure 3, the region 403 filled with vertical lines represents the cleaning process. Hereafter, the time spent on this process will be referred to as the cleaning time Ti.

[0072] Furthermore, in Figure 3, the area 404 filled with white dots represents the process in which the vacuum-side transfer robot VR loads and unloads wafers into the load lock chamber and then transfers them to processing chambers PU1 and PU2. Hereafter, the time taken for this process will be referred to as the VR operation time Tvr.

[0073] Furthermore, in Figure 3, the areas 405 and 406, which are filled with squares, represent a state in which no processing is taking place in processing chamber PU2. In other words, the time in areas 405 and 406 is idle time.

[0074] In the processing sequence shown in FIG. 3, the product processing performed in processing chamber PU1 ends earlier by the time difference indicated by reference numeral 407 compared to the product processing in processing chamber PU2. Therefore, as shown in FIG. 3, the process of taking out the wafer from processing chamber PU1 first (region 402) is performed, and the wafer is carried out from processing chamber PU1. Hereinafter, the time difference indicated by reference numeral 407 is represented by symbol d.

[0075] In processing chamber PU2, as shown in FIG. 3, after the wafer is taken out from processing chamber PU1, after waiting for the VR operation time Tvr, the wafer taking-out starts. Therefore, the idle time 405 from when the product processing in processing chamber PU2 ends until the wafer taking-out starts is equal to VR operation time Tvr + transfer time Tt - time difference d. After this, no idle time occurs until the next product processing in both processing chambers PU1 and PU2 ends. However, for processing chamber PU2, as shown in FIG. 3, idle time 406 will occur again from when the next product processing ends until the wafer is taken out. The time of this idle time 406 is equal to the difference in product processing time between processing chambers PU1 and PU2. Hereinafter, this difference in product processing time is denoted as δ.

[0076] After the idle time 406 ends, processing chambers PU1, PU2, and the vacuum-side transfer robot VR repeat the sequence indicated by reference numeral 408 in FIG. 3. That is, sequence 408 is repeated until a lot composed of a plurality of wafers to be subjected to product processing ends. In each cycle of the repetition of this sequence 408, a phenomenon called cross-chamber occurs in which idle time occurs in processing chamber PU2 by time difference δ.

[0077] The conditions for the occurrence of this cross-chamber are that the time difference d is small enough for idle time to occur, that is, time difference d < VR operation time Tvr + transfer time Tt, and that the time difference δ is small as processing chamber PU2 finishes the second and subsequent product processings first, that is, time difference δ < VR operation time Tvr + transfer time Tt are both required.

[0078] <Changing the wafer transport order> In the vacuum processing apparatus according to this embodiment, when the occurrence of the cross-chamber phenomenon is identified, the wafer transport order is changed in multiple processing chambers where wafers are transported by the same vacuum-side transport robot. Next, the reduction of idle time and improvement of throughput by changing the wafer transport order will be explained with reference to the drawings. The conditions under which throughput can be improved will also be explained with reference to the drawings.

[0079] Figure 4 is a diagram illustrating the operation method of a vacuum processing apparatus according to an embodiment. Figure 4 is similar to Figure 3, and the display method is the same as in Figure 3. To give an example of the display method, in Figure 4, the white area 501 represents product processing in the processing chamber, similar to area 401 in Figure 3, and the diamond-shaped area 503 represents the process of the vacuum-side transport robot VR loading and unloading wafers into the processing chamber, similar to area 402 in Figure 3. The other areas 502 and 505 shown in Figure 4 are the same as areas 405 and 404 in Figure 3.

[0080] Furthermore, in Figure 4, the values ​​of processing time Tnp, transport time Tt, cleaning time Ti, VR operation time Tvr, and time difference d are the same as in Figure 3.

[0081] The difference between Figure 4 and Figure 3 is that in Figure 4, the transport process in processing room PU2, which completes product processing later than processing room PU1, is given priority. Because the transport process in processing room PU2, which completes product processing later, is executed with priority over that of processing room PU1, an idle time 502 occurs in processing room PU1, as shown in Figure 4. The duration of this idle time 502 is equal to the sum of the time difference d (time in region 507), the transport time Tt, and the VR operation time Tvr. After the idle time 502, wafers are loaded and unloaded in region 503 in processing room PU1. Subsequently, processing rooms PU1 and PU2 and the vacuum-side transport robot VR repeat the sequence shown in region 506 a certain number of times. That is, similar to region 408 in Figure 3, the sequence in region 506 is repeated, resulting in product processing and transport processing being performed on multiple wafers constituting a lot.

[0082] As shown in Figure 4, no idle time occurs in the interval of region 506. However, in the intervals indicated by regions 508 and 509, the time difference δ is shortened each time the sequence of region 506 is repeated, and idle time occurs again when the length of these intervals becomes less than the VR operation time Tvr.

[0083] The time intervals shown by regions 508 and 509 are, in the first sequence, cleaning time Ti - VR operation time Tvr - transport time Tt and processing time Tnp - VR operation time Tvr - transport time Tt - time difference δ. If N is the number of times the sequence in region 506 can be repeated without generating idle time, then the number N is expressed by equation (1) shown in Figure 7. In equation (1), [x] represents the largest integer less than or equal to x.

[0084] Obtain the number of times N calculated by Equation (1) and the remaining number of wafers for each lot to be processed in processing chambers PU1 and PU2 (that is, the number of wafers to be processed in processing chambers PU1 and PU2 respectively from now on), and set the smallest integer among the three obtained integers (the number of times N and the obtained number of wafers) as W. This integer W indicates the maximum number of wafers that can be processed in processing chambers PU1 and PU2 without causing idle time when the transfer process of processing chamber PU2 is prioritized.

[0085] As shown in FIG. 3, when the transfer process of processing chamber PU1 is prioritized and product processing and transfer processing are performed on W wafers, the total throughput T1 is calculated by Equation (2) shown in FIG. 7. Similarly, as shown in FIG. 4, when the transfer process of processing chamber PU2 is prioritized and product processing and transfer processing are performed on W wafers, the total throughput T2 is calculated by Equation (3) shown in FIG. 7.

[0086] The condition for throughput improvement by changing the transfer order from FIG. 3 to FIG. 4 is T1 < T2. Furthermore, as a sufficient condition for improving throughput, there is the inequality of Equation (4) shown in FIG. 7.

[0087] <Flowchart for determining transfer order swap> FIG. 5 is a flowchart for explaining the determination of the transfer order swap according to the embodiment.

[0088] The wafer transfer order in the vacuum processing apparatus 100 is basically selected so as to increase the throughput by the technique described in Patent Document 1. However, when the cross-chamber phenomenon occurs as described in FIG. 3, the throughput decreases with the technique described in Patent Document 1. In the embodiment, by changing the wafer transfer order as shown in FIG. 4, the cross-chamber phenomenon is prevented from occurring, and the throughput is improved. Hereinafter, a method for predicting the occurrence of the cross-chamber phenomenon and determining whether it is necessary to change the transfer order will be described using FIGS. 5 and 1.

[0089] The flowchart shown in FIG. 5 is called every time product processing starts in the processing chamber and is executed in the transfer control processing unit 123 of FIG. 1. For ease of explanation, here, the processing chamber where product processing starts is assumed to be processing chamber PU1. Assume that there exists a processing chamber PU2 that shares the same link as processing chamber PU1, that is, the vacuum-side transfer robot, with processing chamber PU1 as shown in FIG. 1.

[0090] The flowchart of FIG. 5 starts at step Start. Next, in step 601, collection of JOB information is performed. For example, in step 601, information such as what kind of JOB is a JOB that processes how many wafers and which recipe is used in the processing is collected. In this collection, for example, product processing in the first step of the recipe and the processing chamber of the processing unit that performs this product processing are collected in the form of a pair.

[0091] In step 602 for checking the process, based on the information collected in step 601, a determination is made as to whether or not a cross-chamber may occur in the link to which the chamber where product processing has started belongs, according to the following conditions 1) to 4). 1) Both processing chambers PU1 and PU2 are not used by a plurality of recipes. 2) The recipes used in processing chambers PU1 and PU2 are the same other than during product processing in terms of processing time. 3) The time difference δ in product processing between processing chamber PU1 and processing chamber PU2 is sufficiently small. That is, the time difference δ < VR operation time Tvr + transfer time Tt. 4) The processing time is longer for processing chamber PU1 than for processing chamber PU2.

[0092] If all of the above conditions 1) to 4) are satisfied, then the process proceeds to step 603 next. If even one of conditions 1) to 4) is not satisfied, the process proceeds to step End and ends.

[0093] In addition, if the product processing in processing chamber PU1 is shorter than the product processing in processing chamber PU2, the subsequent steps cannot be advanced. Therefore, in the subsequent steps, it is assumed that the time for product processing in processing chamber PU1 is longer than the time for product processing in processing chamber PU2.

[0094] In step 603, the cross-chamber is checked. That is, in step 603, processing chamber PU1 acquires the time when the next product processing ends, and immediately checks whether a cross-chamber occurs. In step 603, this check is performed based on the following conditions 5) and 6). 5) At the time when the next product processing in processing chamber PU1 ends, processing chamber PU2 is performing product processing. 6) The time difference d between the times when product processing ends in processing chamber PU1 and processing chamber PU2 is sufficiently small, that is, the time difference d < VR operation time Tvr + transfer time Tt.

[0095] When both conditions 5) and 6) are satisfied, the process then proceeds to step 604. When at least one of the conditions is not satisfied, the process proceeds to step End and ends.

[0096] Step 604 is a step of determining whether the throughput (THP) improves when the transfer of processing chamber PU2 is prioritized. Specifically, in step 604, when the transfer of processing chamber PU2 is prioritized, the maximum number of wafers W that can be processed without generating an idle time is calculated by the method described using FIG. 4. Using the calculated number of wafers W, 2d + Tvr < δ·W is evaluated. If this is true, it is determined that the throughput improves, and the process then proceeds to step 605. On the other hand, if the result of the above evaluation is false, it cannot be determined that the throughput necessarily improves, so the process proceeds to step End and ends.

[0097] In step 605, the wafer transfer order information 128 is updated to prioritize processing chamber PU2, and the process ends.

[0098] In this embodiment, as explained in Figure 2, the transport schedule processing unit 122 updates the wafer transport order information 128. However, if the occurrence of a cross chamber is predicted, the transport control processing unit 123 updates the wafer transport order information 128 to change the transport order, as described above. This makes it possible to improve throughput. Of course, the transport schedule processing unit 122 may also execute the flowchart shown in Figure 5. In this case, the wafer transport order information 128 will be updated by the transport schedule processing unit 122 to change the transport order.

[0099] The flowchart shown in Figure 5 is executed during the operation of the vacuum processing apparatus 100, which transports each of the multiple wafers stored inside the cassette placed in the load port 105 between the locking chamber 110 and one of the processing chambers 113, 114, 118, and 119 of the multiple processing units according to a predetermined schedule for processing.

[0100] If a processing unit that takes a long time to process the wafer (in Figures 3 and 4, the processing unit equipped with processing chamber PU1) is designated as the first processing unit, and a processing unit that takes a short time to process the wafer (in Figures 3 and 4, the processing unit equipped with processing chamber PU2) is designated as the second processing unit, then the first and second processing units correspond to processing units equipped with processing chambers 113 and 114, and are connected to the vacuum transport chamber 111, as shown in Figure 1. The flowchart shown in Figure 5 is executed, for example, by the transport control processing unit 123 before the processing performed in parallel on the wafer by the first and second processing units is completed.

[0101] By executing the flowchart in Figure 5, it is possible to identify whether the cross-chamber phenomenon occurs (or is likely to occur), thereby avoiding a decrease in throughput. More specifically, in the first and second processing units, the time required for the first and second processing units to process a predetermined number of wafers after the first processing unit (processing unit of processing chamber PU1) finishes processing first, and then the second processing unit (processing unit of processing chamber PU2) finishes processing later, is calculated using equations (2) to (4). The smaller of the calculated times is adopted as the schedule for removing multiple wafers from the first and second processing units after the completion of processing by one processing unit. In other words, the transport order is switched depending on whether equation (4) is true or not. This makes it possible to improve throughput.

[0102] Furthermore, if wafers are unloaded from one processing unit only after waiting for wafers to be unloaded from the other processing unit, then for a predetermined period (for example, the period of multiple consecutive regions 506 (Figure 4)), each of the multiple consecutive wafers in one processing unit will be unloaded after the processing of that wafer is completed, without waiting for the processing in the other processing unit to be completed.

[0103] Figure 6 shows the effects of the operating method of the vacuum processing apparatus according to the embodiment.

[0104] In Figure 6, reference numeral 301 indicates the processing sequence when the wafer transport order is not switched between processing chambers PU1 and PU2, according to the technology described in Patent Document 1. In contrast, reference numeral 302 indicates the processing sequence when the occurrence of the cross-chamber phenomenon is predicted and the wafer transport order is switched, according to the embodiment. The display method in Figure 6, such as the display method of the white-out area, is the same as in Figures 3 and 4.

[0105] In both processing sequences 301 and 302, product processing is carried out in parallel in processing chambers PU1 and PU2. Although the product processing times differ, the cleaning time is the same. Figure 6 also shows the case where the product processing time in processing chamber PU1 is longer than that in processing chamber PU2.

[0106] In processing sequence 301, which prioritizes transporting wafers from processing chamber PU1 where product processing is completed first, multiple idle times occur in processing chamber PU2. In contrast, in processing sequence 302, which switches the transport order and prioritizes transporting wafers from processing chamber PU2 where product processing is completed later, the occurrence of multiple idle times can be suppressed. As a result, in the example in Figure 6, in processing sequence 302, the idle time can be reduced by the amount obtained by subtracting time 304 from time 303, thereby improving throughput.

[0107] Although the present invention has been specifically described above based on embodiments, it goes without saying that the present invention is not limited to the above embodiments and can be modified in various ways without departing from its essence. [Explanation of symbols]

[0108] 100 Vacuum Processing Equipment 101 Vacuum Processing Unit 102 Atmospheric side device 103 Vacuum side equipment 104 Control Unit 105 Load Port 106 Atmospheric transport container 107 Atmospheric-side transport robot 108 Aligners 109 Shelter Station 110 Load Lock Room 111, 116 Vacuum Transfer Chamber 112, 117 Vacuum-side transfer robot 113, 114, 118, 119 Processing chambers within the processing unit 115 Waiting area

Claims

1. Multiple vacuum transport chambers are arranged in a front-to-back direction, each housing a robot that transports wafers to be processed within a depressurized internal transport chamber. In the plurality of vacuum transport chambers, an intermediate container is provided, which is located between two adjacent vacuum transport chambers, connects the two vacuum transport chambers, and has a storage chamber inside which the wafers are stored. A lock chamber is arranged to be connected in front of the foremost of the plurality of vacuum transport chambers, and is equipped with a wafer storage chamber whose interior can be depressurized to a predetermined pressure or increased to atmospheric pressure, A plurality of processing units connected to the side walls of the plurality of vacuum transport chambers, each of the plurality of processing units having a processing chamber inside, and processing the wafers transported to the internal processing chamber, Equipped with, A method for operating a vacuum processing apparatus, which involves transporting and processing each of a plurality of wafers stored inside a cassette positioned in front of the locking chamber between the locking chamber and one of the plurality of processing units according to a predetermined schedule, The plurality of processing units include a processing unit that processes the wafer for a long time and a processing unit that processes the wafer for a short time, as first and second processing units, and the first and second processing units are connected to one of the plurality of vacuum transfer chambers. A method for operating a vacuum processing apparatus, wherein, before the completion of the wafer processing carried out in parallel by the first and second processing units, the first and second processing units calculate the time it takes for the first and second processing units to process a predetermined number of wafers after the removal of wafers from one processing unit, which completes its processing first, after the removal of wafers from the other processing unit, and the second processing unit, which removes wafers before the removal of wafers from the other processing unit, respectively, and adopt the smaller of the calculated times as the schedule for removing the plurality of wafers from the first and second processing units after the completion of the processing by the first processing unit.

2. In the method for operating a vacuum apparatus according to claim 1, A method for operating a vacuum processing apparatus, wherein the wafer is unloaded from one processing unit after waiting for the wafer to be unloaded from the other processing unit, and each of a plurality of consecutive wafers in the one processing unit is unloaded after the processing of that wafer is completed, without waiting for the processing to be completed in the other processing unit.

3. In the method for operating a vacuum apparatus according to claim 1 or 2, The first processing unit corresponds to one of the processing units, and the second processing unit corresponds to the other processing unit. A method for operating a vacuum processing apparatus, wherein the time for the first processing unit to process the wafer is longer than the time for the second processing unit to process the wafer.

4. In the method for operating a vacuum apparatus according to claim 1 or 2, A method for operating a vacuum processing apparatus, wherein a robot housed in a vacuum transfer chamber connected to the first and second processing units transports wafers from the processing chambers of the first and second processing units.

Images